Current detection device and motor drive device including the same

Abstract

This current detection device comprises: a main current detection circuit and an offset correction current detection circuit for detecting the current through a current pathway at the same detection position; a short-circuit unit for short-circuiting between the current input terminals of an AD converter in the offset correction current detection circuit; a first offset correction unit for measuring a first offset of the offset correction current detection circuit while short-circuiting is occurring between the current input terminals, and removing a first offset equivalent from the output of the offset correction current detection circuit; and a second offset correction unit for calculating a second offset amount of the main current detection circuit on the basis of the corrected output of the offset correction current detection circuit and the output of the main current detection circuit obtained at the same detection timing while no short-circuiting is occurring between the current input terminals, and removing a second offset equivalent from the output of the main current detection circuit.

Description

Technical Field

[0001] The present invention relates to a current detection device and a motor drive device including the same.

Background Art

[0002] In a motor drive device, a current detection device for detecting a current flowing through a motor is provided to control the drive of the motor.

[0003] For example, an auto-zero amplifier (2) having a main amplifier (21) and an offset adjustment circuit (22) connected to the main amplifier (21), and when the offset adjustment circuit (22) operates, an output voltage (Vo) obtained by removing the input offset voltage (ΔVm) of the main amplifier (21) is generated from the main amplifier (21); a voltage measurement unit (3) for measuring the output voltage (Vo); and a control circuit unit (4) connected to the auto-zero amplifier (2) and the voltage measurement unit (3). The control circuit unit (4) switches between an auto-zero mode for operating the offset adjustment circuit (22) and a non-auto-zero mode for not operating the offset adjustment circuit (22). The control circuit unit (4) measures the output voltage (Vo) before and after switching from the auto-zero mode to the non-auto-zero mode, and calculates the input offset voltage (ΔVm) by subtracting the measured value of the output voltage (Voa) in the auto-zero mode from the measured value of the output voltage (Von) in the non-auto-zero mode. Then, in the non-auto-zero mode, the output voltage (Vo) is measured, and the measured value of the output voltage (Vo) is corrected using the calculated value of the input offset voltage (ΔVm). An output voltage measurement system (1) having such a configuration is known (see, for example, Patent Document 1).

[0004] For example, an auto-zero amplifier circuit that corrects the offset of an input differential signal, and a comparator circuit that converts an output signal output from the auto-zero amplifier circuit into a digital signal, are provided, and the auto-zero amplifier circuit and the comparator circuit are configured in the same package, and an arithmetic circuit is known (see, for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] Conventionally, offset correction of a current detection circuit has been achieved by measuring in advance, as an offset, the output value of the current detection circuit when the current input to the current detection circuit is set to 0 (zero) by stopping the operation of the motor drive device, and then removing (subtracting) the offset equivalent amount from the current detection value by the current detection circuit during normal operation. That is, in order to perform offset correction, the normal current detection process had to be stopped once to set the input of the current detection circuit to 0, which was inefficient. Also, when continuously detecting current by the current detection circuit during normal use, the offset of the current detection circuit changes due to temperature drift. Conventionally, since the previously measured offset was continuously used as it was for offset correction, offset correction corresponding to the change in offset was not performed. Therefore, a technique that can continuously correct the offset of the current detection circuit without stopping the current detection process is desired.

Means for Solving the Problems

[0007] According to one aspect of the present disclosure, a current detection device includes: a main current detection circuit that detects a current in a current path and outputs digital data corresponding to the current; an offset correction current detection circuit that detects a current in the current path at the same detection location as the main current detection circuit and outputs digital data corresponding to the current; a short-circuit section that short-circuits the current input terminals of the AD converter in the offset correction current detection circuit; a first offset correction section that measures a first offset output from the offset correction current detection circuit when the current input terminals are short-circuited by the short-circuit section, and performs correction to remove an amount corresponding to the first offset from the output of the offset correction current detection circuit; and a second offset correction section that calculates a second offset output from the main current detection circuit based on the output of the main current detection circuit and the corrected output of the first offset correction section of the offset correction current detection circuit obtained at the same detection timing when the short-circuit section does not short-circuit the current input terminals, and performs correction to remove an amount corresponding to the second offset from the output of the main current detection circuit.

[0008] Further, according to one aspect of the present disclosure, a motor drive device includes the above-described current detection device, and controls the driving of a motor using the output corrected by the second offset correction section of the main current detection circuit.

Advantages of the Invention

[0009] According to one aspect of the present disclosure, it is possible to continuously correct the offset of the current detection circuit without stopping the current detection process.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0011] Hereinafter, a current detection device and a motor drive device including the same will be described with reference to the drawings. In each drawing, the same members are denoted by the same reference numerals. Also, for ease of understanding, the scales of these drawings are appropriately changed. The illustrated embodiments are one example for implementation and are not limited to these embodiments. Also, in the following description, the offset of the offset correction current detection circuit is referred to as the "first offset", and the offset of the main current detection circuit is referred to as the "second offset".

[0012] FIG. 1 is a circuit diagram showing a current detection device according to an embodiment of the present disclosure. Hereinafter, it is assumed that components denoted by the same reference numerals in different drawings have the same function or similar functions.

[0013] A current detection device 1 according to an embodiment of the present disclosure includes a main current detection circuit 11, an offset correction current detection circuit 12, a short-circuit portion 13, a first offset correction portion 14, and a second offset correction portion 15.

[0014] The main current detection circuit 11 detects the current on the current path 2 and outputs digital data corresponding to the current. The main current detection circuit 11 may be any of a shunt resistor type current detection circuit, a Hall element type current detection circuit, or a core type current detection circuit. In FIG. 1, as an example, the case where the main current detection circuit 11 is configured by a shunt resistor type current detection circuit is shown.

[0015] The main current detection circuit 11 includes a current detection resistor (shunt resistor) 21, an isolated AD converter 22, filter resistors 31 and 32, and a filter capacitor 33. As the conversion method of the AD converter 22, there are a successive approximation type, a delta-sigma type, a dual-slope integration type, a flash type (parallel comparison type), and a pipeline type. A filter composed of the filter resistors 31 and 32 and the filter capacitor 33 is provided on the input side of the AD converter 22. A filter capacitor 33 is electrically connected between the non-inverting input terminal (+) and the inverting input terminal (-) of the AD converter 22, and filter resistors 31 and 32 are electrically connected to both terminals of the filter capacitor 33, respectively. When a current flows on the current path 2, a potential difference is generated between both terminals of the current detection resistor 21, and each potential signal is input to the non-inverting input terminal (+) and the inverting input terminal (-) of the AD converter 22 through the filter resistors 31 and 32 and the filter capacitor 33. The AD converter 22 outputs digital data corresponding to the current on the current path 2 based on the input potential signals. The digital data output from the AD converter 22 is input to an LSI (large-scale integrated circuit) 40 which is a digital arithmetic circuit, and after offset correction described later, it is output to the outside as current value digital data.

[0016] The current detection circuit 12 for offset correction detects the current on the current path 2 at the same detection location as the main current detection circuit 11 and outputs digital data corresponding to the current. The current detection circuit 12 for offset correction may be any of a shunt resistance type current detection circuit, a Hall element type current detection circuit, or a core type current detection circuit. In FIG. 1, as an example, the case where the current detection circuit 12 for offset correction is configured by a shunt resistance type current detection circuit is shown. The current detection circuit 12 for offset correction is preferably installed in the vicinity of the main current detection circuit 11.

[0017] The current detection circuit 12 for offset correction includes a current detection resistor (shunt resistor) 21, an insulated AD converter 23, filter resistors 34 and 35, and a filter capacitor 36. By sharing the current detection resistor 21 between the main current detection circuit 11 and the current detection circuit 12 for offset correction, the main current detection circuit 11 and the current detection circuit 12 for offset correction can detect the current on the current path 2 at the same detection location. As the conversion method of the AD converter 23, there are a successive comparison type, a delta-sigma type, a dual-slope type, a flash type (parallel comparison type), and a pipeline type. A filter composed of the filter resistors 34 and 35 and the filter capacitor 36 is provided on the input side of the AD converter 23. A filter capacitor 36 is electrically connected between the non-inverting input terminal (+) and the inverting input terminal (-) of the AD converter 23, and the filter resistors 34 and 35 are electrically connected to both terminals of the filter capacitor 36, respectively. When a current flows on the current path 2, a potential difference is generated between both terminals of the current detection resistor 21, and each potential signal is input to the non-inverting input terminal (+) and the inverting input terminal (-) of the AD converter 23 via the filter resistors 34 and 35 and the filter capacitor 36. The AD converter 23 outputs digital data corresponding to the current on the current path 2 based on the input potential signals. The digital data output from the AD converter 23 is input to an LSI (large-scale integrated circuit) 40 which is a digital arithmetic circuit.

[0018] The short - circuit part 13 is an open - close switch that short - circuits and opens the non - inverting input terminal (+) and the inverting input terminal (-) between the current input terminals of the AD converter 23 in the offset - correction current detection circuit 12. The short - circuit part 13 is composed of a semiconductor switching element such as a unipolar transistor like an FET, a bipolar transistor, an IGBT, a thyristor, a GTO, etc. However, the type of the semiconductor switching element itself does not limit this embodiment, and other semiconductor switching elements may also be used. Under the control of the first offset - correction unit 14 in the LSI (Large - Scale Integration Circuit) 40, the short - circuit part 13 periodically repeats short - circuiting and opening.

[0019] The first offset - correction unit 14 measures the first offset output from the offset - correction current detection circuit 12 when the short - circuit part 13 shorts the current input terminals of the AD converter 23, and executes a correction to remove an amount corresponding to the first offset from the output of the offset - correction current detection circuit 12.

[0020] When the short - circuit part 13 shorts the current input terminals of the AD converter 23, no current flows into the AD converter 23 in the offset - correction current detection circuit 12 from the current path 2. Therefore, only the offset of the offset - correction current detection circuit 12 (i.e., the first offset) is output from the AD converter 23 in the offset - correction current detection circuit 12. The first offset - correction unit 14 measures this first offset when the short - circuit part 13 shorts the current input terminals of the AD converter 23, and executes a correction to remove an amount corresponding to the first offset from the output of the offset - correction current detection circuit 12 so that the first offset is not included in the output of the offset - correction current detection circuit 12 after the measurement.

[0021] Thus, the measurement of the first offset by the first offset correction unit 14 and the correction for the output of the offset correction current detection circuit 12 are performed when the short - circuit unit 13 short - circuits the current input terminals of the AD converter 23. Since the short - circuit unit 13 periodically repeats short - circuiting and opening, the measurement of the first offset by the first offset correction unit 14 and the correction for the output of the offset correction current detection circuit 12 are repeatedly executed at a predetermined period. Therefore, even if the first offset of the offset correction current detection circuit 12 changes due to temperature drift, the correction for the output of the offset correction current detection circuit 12 is immediately executed when the short - circuit unit 13 short - circuits the current input terminals of the AD converter 23, and when the current input terminals of the AD converter 23 are open following the short - circuit, corrected digital data with the first offset removed is output from the offset correction current detection circuit 12. Thus, the influence of temperature drift on the output of the offset correction current detection circuit 12 can be minimized.

[0022] The second offset correction unit 15 calculates the second offset output from the main current detection circuit 11 based on a plurality of outputs of the main current detection circuit 11 and a plurality of corrected outputs by the first offset correction unit 14 of the offset correction current detection circuit 12 obtained at the same detection timing when the short - circuit unit 13 does not short - circuit the current input terminals of the AD converter 23 (i.e., when the current input terminals of the AD converter 23 are open), and executes a correction to remove (subtract) an amount corresponding to the second offset from the output of the main current detection circuit 11.

[0023] When the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23 as described above (i.e., when it is open between the current input terminals of the AD converter 23), corrected digital data with the first offset removed is output from the offset - correction current detection circuit 12. When the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23, the second offset correction unit 15 calculates the second offset output from the main current detection circuit 11 based on a plurality of outputs of the main current detection circuit 11 and a plurality of corrected outputs of the first offset correction unit 14 of the offset - correction current detection circuit 12 obtained at the same detection timing. In order to obtain a plurality of outputs of the main current detection circuit 11 and a plurality of corrected outputs of the first offset correction unit 14 of the offset - correction current detection circuit 12, simultaneous detection (simultaneous input) of the current on the current path 2 in the main current detection circuit 11 and the offset - correction current detection circuit 12 is performed a plurality of times while the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23.

[0024] Here, a method for calculating the second offset output from the main current detection circuit 11 will be described. FIG. 2 is a block diagram for explaining the method for calculating the second offset output from the main current detection circuit.

[0025] When the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when it is open), let the value of the current on the current path 2 at time t be I(t), the output of the main current detection circuit 11 be I1(t), and the corrected output of the first offset correction unit 14 of the offset - correction current detection circuit 12 be I2(t).

[0026] When the gain of the main current detection circuit 11 is G1 and the second offset of the main current detection circuit 11 is I of , the output I1(t) of the main current detection circuit 11 at time t is expressed as in Equation 1.

[0027]

Equation

[0028] When the gain of the offset correction current detection circuit 12 is G2, the corrected output I2(t) of the first offset correction unit 14 of the offset correction current detection circuit 12 at time t is expressed as in Equation 2. Since the output I2(t) of the offset correction current detection circuit 12 has already been corrected by the first offset correction unit 14 at the short circuit time before the open circuit time between the current input terminals of the AD converter 23, the first offset is 0, that is, the first offset does not appear in Equation 2.

[0029]

Equation

[0030] Substituting Equation 2 into Equation 1, Equation 3 is obtained.

[0031]

Equation

[0032] An example of calculating the second offset based on the output of the main current detection circuit 11 and the corrected output of the offset correction current detection circuit 12 obtained at the same detection timing at two times using Equations 1 to 3 is described as follows.

[0033] In order to obtain two outputs of the main current detection circuit 11 and two corrected outputs of the first offset correction unit 14 of the offset correction current detection circuit 12, simultaneous detection (simultaneous input) of the current on the current path 2 in the main current detection circuit 11 and the offset correction current detection circuit 12 is performed twice while the short circuit unit 13 does not short-circuit between the current input terminals of the AD converter 23.

[0034] When the short - circuit part 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when the current input terminals of the AD converter 23 are open), the output I1(t1) of the main current detection circuit 11 at time t1 is represented by Equation 4, and the corrected output I2(t1) by the first offset correction unit 14 of the offset correction current detection circuit 12 at time t1 is represented by Equation 5.

[0035]

Number

[0036]

Number

[0037] When the short - circuit part 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when the current input terminals of the AD converter 23 are open), the output I1(t2) of the main current detection circuit 11 at time t2 is represented by Equation 6, and the corrected output I2(t2) by the first offset correction unit 14 of the offset correction current detection circuit 12 at time t2 is represented by Equation 7.

[0038]

Number

[0039]

Number

[0040] When subtracting each side of Equation 4 from each side of Equation 6, Equation 8 is obtained.

[0041]

Number

[0042] When subtracting each side of Equation 5 from each side of Equation 7, Equation 9 is obtained.

[0043]

Mathematics

[0044] Substituting Equation 9 into Equation 8 and simplifying gives Equation 10.

[0045]

Mathematics

[0046] Substituting Equation 10 into Equation 3 when t = t1 gives Equation 11.

[0047]

Mathematics

[0048] Simplifying Equation 11 gives Equation 12.

[0049]

Mathematics

[0050] The second offset correction unit 15 can calculate I of which is the second offset, according to Equation 12.

[0051] In the above embodiment, the second offset was calculated based on each output obtained at the same detection timing at each of two times. However, the second offset may also be calculated based on each output obtained at the same detection timing at each of three or more times. Hereinafter, several forms of calculating the second offset based on each output at three or more times will be listed.

[0052] The first form calculates the second offset based on the average of each output measured at each time. Here, taking as an example the case of calculating the second offset based on the output of the main current detection circuit 11 and the corrected output of the offset correction current detection circuit 12 obtained at the same detection timing at each of six times, the first form will be described.

[0053] To obtain six outputs of the main current detection circuit 11 and six corrected outputs by the first offset correction unit 14 of the offset correction current detection circuit 12, simultaneous detection (simultaneous input) of the current on current path 2 in the main current detection circuit 11 and the offset correction current detection circuit 12 is performed six times while the short - circuit unit 13 does not short - circuit between the current input terminals of the AD converter 23.

[0054] When the short - circuit unit 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when the current input terminals of the AD converter 23 are open), let the output of the main current detection circuit 11 measured at time t1 be I1(t1), the output of the main current detection circuit 11 measured at time t2 be I1(t2), the output of the main current detection circuit 11 measured at time t3 be I1(t3), the output of the main current detection circuit 11 measured at time t4 be I1(t4), the output of the main current detection circuit 11 measured at time t5 be I1(t5), and the output of the main current detection circuit 11 measured at time t6 be I1(t6).

[0055] The average output I’1(T1) of I1(t1), I1(t2), and I1(t3) is as shown in Equation 13.

[0056]

Equation

[0057] The average output I’1(T2) of I1(t4), I1(t5), and I1(t6) is as shown in Equation 14.

[0058]

Equation

[0059] Similarly, when the short-circuit portion 13 does not short-circuit between the current input terminals of the AD converter 23 (i.e., when the current input terminals of the AD converter 23 are open), the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t1 is I2(t1), the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t2 is I2(t2), the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t3 is I2(t3), the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t4 is I2(t4), the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t5 is I2(t5), and the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12 measured at time t6 is I2(t6).

[0060] The average output I’2(T1) of I2(t1), I2(t2), and I2(t3) is as shown in Equation 15.

[0061]

Equation

[0062] The average output I’2(T2) of I2(t4), I2(t5), and I2(t6) is as shown in Equation 16.

[0063]

Equation

[0064] When I1(t1), I1(t2), I2(t1), and I2(t2) in Equation 12 are replaced with I’1(T1), I’1(T2), I’2(T1), and I’2(T2), the second offset I as shown in Equation 17 ofis obtained. The second offset correction unit 15 can calculate the second offset I of in accordance with Equation 17.

[0065] [Number]

[0066] The second form calculates a plurality of provisional second offset values calculated based on the outputs at every two times, and calculates the final second offset by taking the average of these provisional second offset values. Here, the second form will be described taking as an example the case of calculating the second offset based on the output of the main current detection circuit 11 and the corrected output of the offset correction current detection circuit 12 obtained at the same detection timing at each of the four times.

[0067] In order to obtain four outputs of the main current detection circuit 11 and four corrected outputs by the first offset correction unit 14 of the offset correction current detection circuit 12, simultaneous detection (simultaneous input) of the current on the current path 2 in the main current detection circuit 11 and the offset correction current detection circuit 12 is performed four times while the short-circuit unit 13 does not short-circuit between the current input terminals of the AD converter 23.

[0068] When the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when the between the current input terminals of the AD converter 23 is open), let the output of the main - current detection circuit 11 measured at time t1 be I1(t1), the output of the main - current detection circuit 11 measured at time t2 be I1(t2), the output of the main - current detection circuit 11 measured at time t3 be I1(t3), and the output of the main - current detection circuit 11 measured at time t4 be I1(t4). Also, when the short - circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23 (i.e., when the between the current input terminals of the AD converter 23 is open), let the corrected output by the first offset correction unit 14 of the offset - correction current detection circuit 12 measured at time t1 be I2(t1), the corrected output by the first offset correction unit 14 of the offset - correction current detection circuit 12 measured at time t2 be I2(t2), the corrected output by the first offset correction unit 14 of the offset - correction current detection circuit 12 measured at time t3 be I2(t3), and the corrected output by the first offset correction unit 14 of the offset - correction current detection circuit 12 measured at time t4 be I2(t4).

[0069] Substituting the output I1(t1) of the main - current detection circuit 11 and the corrected output I2(t1) of the offset - correction current detection circuit 12 measured at time t1, and the output I1(t2) of the main - current detection circuit 11 and the corrected output I2(t2) by the first offset correction unit 14 of the offset - correction current detection circuit 12 measured at time t2 into Equation 12, a second offset provisional value I as shown in Equation 18 oft1 is obtained.

[0070] [Number]

[0071] Similarly, when I1(t1), I1(t2), I2(t1), and I2(t2) in Equation 12 are replaced with I1(t3), I1(t4), I2(t3), and I2(t4), a second offset provisional value I as shown in Equation 19 oft2 is obtained.

[0072] [Number]

[0073] The second offset provisional value I shown by Formula 18 oft1 and the second offset I provisional value shown by Formula 19 oft2 Taking the average, finally, the second offset I as shown by Formula 20 of is obtained. The second offset correction unit 15 can calculate the second offset I of according to Formula 20.

[0074] [Number]

[0075] Subsequently, a specific example will be shown and described for the operation of the current detection device according to an embodiment of the present disclosure. FIG. 3 is a diagram showing a timing chart exemplifying the operation of the current detection device according to an embodiment of the present disclosure. In FIG. 3, the execution timings for each of the first offset correction, the second offset correction, the measurement of the first offset by the offset correction current detection circuit 12, and the measurement of the current by the main current detection circuit 11 are indicated by "thick bar lines".

[0076] Here, an example of calculating the second offset based on the output of the main current detection circuit 11 and the corrected output of the offset correction current detection circuit 12 obtained at the same detection timing at each of the two times will be described.

[0077] As shown in FIG. 3, the short circuit part 13 periodically repeats the short circuit (ON) and release (OFF) between the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 under the control of the first offset correction unit 14 in the LSI (Large Scale Integration) 40.

[0078] The main current detection circuit 11 detects the current on the current path 2 at a predetermined current detection period regardless of the cycle of short - circuit (ON) and open - circuit (OFF) by the short - circuit part 13. The current detection period by the main current detection circuit 11 is preferably shorter than the cycle of short - circuit (ON) and open - circuit (OFF) by the short - circuit part 13.

[0079] When the short - circuit part 13 shorts (turns ON) the current input terminals of the AD converter 23, the first offset correction unit 14 measures the first offset of the offset - correction current detection circuit 12 at time t1, and executes correction to remove (subtract) an amount corresponding to the first offset from the output of the offset - correction current detection circuit 12 at time t2. At this time, the main current detection circuit 11 outputs "corrected digital data" from which an amount corresponding to the second offset I of1 calculated in the previous cycle has been removed. When the AD converter 23 opens (turns OFF) between the current input terminals following the short - circuit (ON), the offset - correction current detection circuit 12 detects the current on the current path 2 at times t3 and t4 which are the detection timings of the main current detection circuit 11. Since the main current detection circuit 11 detects the current on the current path 2 at a predetermined current detection period as described above, the LSI (Large - Scale Integration Circuit) 40 having the first offset correction unit 14 monitors the current detection period by the main current detection circuit 11, and controls the offset - correction current detection circuit 12 to detect the current at a timing that coincides with the detection timing of the main current detection circuit 11. As a result, the main current detection circuit 11 and the offset - correction current detection circuit 12 detect the current on the current path 2 at time t3 which is the same detection timing, and detect the current on the current path 2 at time t4 which is the same detection timing. The second offset correction unit 15 calculates the second offset I of2 output from the main current detection circuit 11 at time t5 based on the output of the main current detection circuit 11 obtained at times t3 and t4 which are the same detection timing and the corrected output by the first offset correction unit 14 of the offset - correction current detection circuit 12, and subtracts the second offset I of2Execute correction to remove (subtract) an amount corresponding thereto. After time t5, the main current detection circuit 11 outputs "corrected digital data" from which an amount corresponding to the second offset I calculated at time t5 has been removed. of2 will be output.

[0080] When there is a short circuit (ON) between the current input terminals of the AD converter 23 due to the short circuit portion 13 following the above opening (OFF), the first offset correction unit 14 measures the first offset of the offset correction current detection circuit 12 at time t6, and executes correction to remove (subtract) an amount corresponding to the first offset from the output of the offset correction current detection circuit 12 at time t7. When there is an opening (OFF) between the current input terminals of the AD converter 23 following the short circuit (ON), the main current detection circuit 11 and the offset correction current detection circuit 12 detect the current on current path 2 at time t8 which is the same detection timing, and detect the current on current path 2 at time t9 which is the same detection timing. The second offset correction unit 15 calculates the second offset I output from the main current detection circuit 11 at time t based on the output of the main current detection circuit 11 obtained at the same detection timings t8 and t9 and the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12, and executes correction to remove (subtract) an amount corresponding to the second offset I from the output of the main current detection circuit 11. After time t 10 the main current detection circuit 11 will output "corrected digital data" from which an amount corresponding to the second offset I calculated at time t of3 has been removed. After time t of3 the same processing as described above will be repeatedly executed. That is, the first offset correction unit 14 measures the first offset of the offset correction current detection circuit 12 at time t 10 and executes correction to remove (subtract) an amount corresponding to the first offset from the output of the offset correction current detection circuit 12 at time t 10 . of3 After time t 10 the main current detection circuit 11 will output "corrected digital data" from which an amount corresponding to the second offset I calculated at time t 11 has been removed. After time t 12 the first offset correction unit 14 measures the first offset of the offset correction current detection circuit 12 at time t

[0081] FIG. 4 is a flowchart showing the operation flow of the current detection device according to an embodiment of the present disclosure.

[0082] The main current detection circuit 11 continuously detects the current on the current path 2 at a predetermined current detection period regardless of the short-circuit / open cycle by the short-circuit part 13 (step S200). The current detection period by the main current detection circuit 11 is preferably shorter than the short-circuit / open cycle by the short-circuit part 13.

[0083] In step S101, the non-inverting input terminal (+) and the inverting input terminal (-) which are between the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 are short-circuited.

[0084] In step S102, the first offset correction unit 14 measures the first offset output from the offset correction current detection circuit 12.

[0085] In step S103, the first offset correction unit 14 executes a correction to remove (subtract) an amount corresponding to the first offset from the output of the offset correction current detection circuit 12.

[0086] In step S104, the non-inverting input terminal (+) and the inverting input terminal (-) which are between the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 are opened.

[0087] In step S105, the offset correction current detection circuit 12 detects the current on the current path 2 at a plurality of times at the same detection timing as the main current detection circuit 11.

[0088] In step S106, the second offset correction unit 15 calculates a second offset output from the main current detection circuit 11 based on the output of the main current detection circuit 11 obtained at the same detection timing and the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12. Note that for the second offset and the provisional value of the second offset, the denominators shown in Equation 12 and Equations 17 to 19 may become zero. When the denominators shown in Equation 12 and Equations 17 to 19 become zero, the second offset calculated in step S106 will diverge. To prevent such divergence, if the second offset calculated in step S106 diverges, the process returns to step S105, and the current detection at the same timing by the main current detection circuit 11 and the offset correction current detection circuit 12, and the subsequent calculation of the second offset in step S106 are executed again.

[0089] In step S107, the second offset correction unit 15 performs a correction to remove (subtract) an amount corresponding to the second offset from the output of the main current detection circuit 11. As a result, the main current detection circuit 11 outputs "corrected digital data" from which an amount corresponding to the second offset has been removed (step S200). Then, the process returns to step S101, and the above-described processing is executed again. In this way, since the current detection process of the main current detection circuit 11 continues to be executed at a different period from the offset correction process, the correction of the second offset of the main current detection circuit 11 can be continuously performed without stopping the current detection process of the main current detection circuit 11.

[0090] In the above-described embodiment, the short-circuit portion 13 short-circuits the current input terminals of the AD converter 23 in the offset correction current detection circuit 12. However, the current detection device 1 should be provided with a configuration such that this short circuit does not affect the current detection process of the main current detection circuit 11. For this reason, for example, when each of the main current detection circuit 11 and the offset correction current detection circuit 12 is a shunt resistor type current detection circuit, the filter resistors 31 and 32 provided on the input side of the AD converter 22 in the main current detection circuit 11, and the filter resistors 34 and 35 provided on the input side of the AD converter 23 of the offset correction current detection circuit 12 are set to have a resistance value larger than that of the current detection resistor (shunt resistor) 21 shared in the main current detection circuit 11 and the offset correction current detection circuit 12. It is preferable to set the resistance values of the filter resistors 31, 32, 34, and 35 to be, for example, about 1000 times higher than the resistance value of the current detection resistor 21. For example, with respect to the resistance value of 6.4 mΩ of the current detection resistor 21, the resistance values of the filter resistors 31, 32, 34, and 35 are each set to 22 Ω. Note that the numerical values given here are merely examples, and other numerical values may also be used. The same applies when each of the main current detection circuit 11 and the offset correction current detection circuit 12 is a Hall element type current detection circuit or a core type current detection circuit. The filter resistors 31 and 32 provided on the input side of the AD converter 22 in the main current detection circuit 11, and the filter resistors 34 and 35 provided on the input side of the AD converter 23 of the offset correction current detection circuit 12 are set to have a resistance value larger than the resistance value (impedance) of the Hall element or the core shared in the main current detection circuit 11 and the offset correction current detection circuit 12.

[0091] Subsequently, a current detection device according to a modification of an embodiment of the present disclosure will be described.

[0092] FIG. 5 is a circuit diagram showing a current detection device according to a modification of an embodiment of the present disclosure.

[0093] In this modification example, a switch unit 51 is further provided in the current detection device 1 to ensure that the short circuit between the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 by the short circuit portion 13 does not affect the current detection process of the main current detection circuit 11.

[0094] When the short circuit portion 13 short - circuits between the current input terminals of the AD converter 23, the switch unit 51 turns off (OFF: open) to block the inflow of current from the current path 2 to the current input terminals of the AD converter 23. When the short circuit portion 13 does not short - circuit between the current input terminals of the AD converter 23, the switch unit 51 turns on (ON: closed) to not block the inflow of current from the current path 2 to the current input terminals of the AD converter 23. The switch unit 51 is composed of a semiconductor switching element such as a unipolar transistor like an FET, a bipolar transistor, an IGBT, a thyristor, a GTO, etc. However, the type of the semiconductor switching element itself does not limit this embodiment, and other semiconductor switching elements may also be used. Under the control of the first offset correction unit 14 in the LSI (Large - Scale Integration Circuit) 40, the switch unit 51 periodically repeats turning off (OFF) and turning on (ON). Note that since the circuit components other than the switch unit 51 are the same as the circuit components shown in FIG. 1, the same reference numerals are given to the same circuit components and the detailed description of these circuit components is omitted.

[0095] FIG. 6 is a diagram showing a timing chart illustrating the operation of the current detection device shown in FIG. 5. In FIG. 6, the execution timings of the first offset correction, the second offset correction, the measurement of the first offset by the offset correction current detection circuit 12, and the measurement of the current by the main current detection circuit 11 are shown by "thick bar - shaped lines". FIG. 6 is obtained by further adding the operation state of the switch unit 51 to the timing chart particularly shown in FIG. 3.

[0096] When the short - circuit section 13 shorts (turns ON) the current input terminals of the AD converter 23, the switch section 51 turns OFF to block the inflow of current from the current path 2 to the current input terminals of the AD converter 23. When the short - circuit section 13 does not short (turns OFF) the current input terminals of the AD converter 23, the switch section 51 turns ON to not block the inflow of current from the current path 2 to the current input terminals of the AD converter 23. Regarding the execution timing of each of the first offset correction, the second offset correction, the measurement of the first offset by the offset correction current detection circuit 12, and the measurement of the current by the main current detection circuit 11, since it is the same as that described with reference to FIG. 3, a detailed description of each execution timing is omitted.

[0097] FIG. 7 is a flowchart showing the operation flow of the current detection device shown in FIG. 5.

[0098] The main current detection circuit 11 continuously detects the current on the current path 2 at a predetermined current detection period regardless of the short - circuit / open cycle by the short - circuit section 13 (step S200). The current detection period by the main current detection circuit 11 is preferably shorter than the short - circuit / open cycle by the short - circuit section 13 and the open (OFF) / closed (ON) cycle of the switch section 51.

[0099] In step S301, the switch section 51 turns OFF to block the inflow of current from the current path 2 to the current input terminals of the AD converter 23.

[0100] In step S302, the non - inverting input terminal (+) and the inverting input terminal (-) between the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 are short - circuited.

[0101] In step S303, the first offset correction unit 14 measures the first offset output from the offset correction current detection circuit 12.

[0102] In step S304, the first offset correction unit 14 performs a correction to remove (subtract) an amount corresponding to the first offset from the output of the offset correction current detection circuit 12.

[0103] In step S305, the non-inverting input terminal (+) and the inverting input terminal (-) between which are the current input terminals of the AD converter 23 in the offset correction current detection circuit 12 are opened.

[0104] In step S306, in order not to cut off the inflow of current from the current path 2 to the current input terminal of the AD converter 23, it is turned on (ON).

[0105] In step S307, the offset correction current detection circuit 12 detects the current on the current path 2 at a plurality of times with the same detection timing as that of the main current detection circuit 11.

[0106] In step S308, the second offset correction unit 15 calculates a second offset output from the main current detection circuit 11 based on the output of the main current detection circuit 11 obtained at the same detection timing and the corrected output by the first offset correction unit 14 of the offset correction current detection circuit 12. Note that for the second offset and the provisional second offset value, the denominator shown in Equation 12 and Equations 17 to 19 may become zero. When the denominator shown in Equation 12 and Equations 17 to 19 becomes zero, the second offset calculated in step S308 will diverge. To prevent such divergence, if the second offset calculated in step S308 diverges, the process returns to step S307, and again, the current detection at the same timing by the main current detection circuit 11 and the offset correction current detection circuit 12, and the subsequent calculation of the second offset in step S308 are executed.

[0107] In step S309, the second offset correction unit 15 performs correction to remove (subtract) an amount corresponding to the second offset from the output of the main current detection circuit 11. As a result, the main current detection circuit 11 outputs "corrected digital data" from which an amount corresponding to the second offset has been removed (step S200). Then, the process returns to step S301, and the above-described process is executed again. In this way, since the current detection process of the main current detection circuit 11 continues to be executed at a period different from the offset correction process, the correction of the second offset of the main current detection circuit 11 can be continuously performed without stopping the current detection process of the main current detection circuit 11.

[0108] Using the current detection device 1 according to one embodiment of the present disclosure and its modification described above, the current flowing through the motor can be detected in order to control the driving of the motor.

[0109] FIG. 8 is a diagram showing a motor drive device including a current detection device according to an embodiment of the present disclosure.

[0110] As an example, a case of controlling a three-phase AC motor 300 by a motor drive device 100 connected to a three-phase AC power supply 200 will be described. In the illustrated example, the number of phases of the AC power supply 200 is three, but the number of phases of the AC power supply 200 does not particularly limit the present invention. In addition to three phases, for example, a single-phase or other polyphase AC power supply may be used. Examples of the AC power supply 200 include a three-phase AC 400V power supply, a three-phase AC 200V power supply, a three-phase AC 600V power supply, and a single-phase AC 100V power supply. Further, in the illustrated example, the number of phases of the motor 300 is three, but the number of phases of the motor 300 does not particularly limit the present invention. In addition to three phases, for example, a single-phase or other polyphase motor may be used. Also, the motor 300 may be an induction motor or a synchronous motor. The motor 300 is used, for example, as a drive source for a feed shaft or a main shaft of a machine tool, or an arm of an industrial machine or an industrial robot.

[0111] The motor drive device 100 includes a converter 61, an inverter 62, a smoothing capacitor 63, a motor control unit 64, and a current detection device 1.

[0112] The converter 61 converts the AC power supplied from the AC power source 200 into DC power and outputs it to the DC link. When three-phase AC power is supplied from the AC power source 200, the converter 61 is composed of a three-phase bridge circuit, and when single-phase AC power is supplied from the AC power source 200, it is composed of a single-phase bridge circuit. In the illustrated example, since the AC power source 200 is a three-phase AC power source, the converter 61 is composed of a three-phase bridge circuit. Examples of the converter 61 include a diode rectifier circuit, a 120-degree conduction type rectifier circuit, and a rectifier circuit of the PWM switching control method.

[0113] A smoothing capacitor 63 is provided in the DC link, which is a circuit portion that electrically connects the DC output side of the converter 61 and the DC input side of the inverter 62. The DC link may be referred to as a "DC link section", "DC link", "DC link section", "DC bus", or "DC intermediate circuit", etc. The smoothing capacitor 63 may be referred to as a "DC link capacitor", etc. The smoothing capacitor 63 has a function of accumulating energy (DC power) in the DC link and a function of suppressing the pulsation component of the output on the DC side of the converter 61. When the smoothing capacitor 63 is charged with electric charge, DC power is accumulated in the DC link.

[0114] The inverter 62 converts the DC power in the DC link into AC power and outputs it to the motor 300 side. The inverter 62 is composed of a switching element and a bridge circuit of diodes connected in anti-parallel thereto. When the motor 300 is a three-phase AC motor, the inverter 62 is composed of a three-phase bridge circuit, and when the motor 300 is a single-phase AC motor, the inverter 62 is composed of a single-phase bridge circuit. In the illustrated example, since the motor 300 is a three-phase AC motor, the inverter 62 is composed of a three-phase bridge circuit. Examples of the inverter 62 include a PWM inverter having a semiconductor switching element inside. The semiconductor switching element is composed of, for example, a unipolar transistor such as an FET, a bipolar transistor, an IGBT, a thyristor, a GTO, etc., but the type of the semiconductor switching element itself does not limit this embodiment, and other semiconductor switching elements may also be used.

[0115] For example, a current detection device 1 is provided on the power line connecting the inverter 62 and the motor 300.

[0116] The motor control unit 64 generates drive commands for on / off control of each semiconductor switching element of the inverter 62 and outputs them to the inverter 62. The motor control unit 64 controls the power conversion operation of the inverter 62 based on the current value digital data (corrected by the second offset correction unit 15) output from the current detection device 1, the rotational speed (speed feedback) of the motor 300 detected by a position detector (not shown), a predetermined torque command, and the operation program of the motor 300. The motor 300 has its speed, torque, or rotor position controlled based on the AC power supplied from the inverter 62. Note that the configuration of the motor control unit 64 described here is merely an example, and for example, the configuration of the motor control unit 64 may be defined including terms such as a position command generation unit, a position control unit, a speed control unit, a current control unit, and a torque command creation unit. An arithmetic processing device (processor) is provided within the motor control unit 64. Examples of the arithmetic processing device include an IC, LSI, CPU, MPU, DSP, etc. The motor control unit 64 having the arithmetic processing device is a functional module realized, for example, by a computer program executed on a processor. For example, when constructing the motor control unit 64 in the form of a computer program, the functions of each part can be realized by operating the arithmetic processing device according to this computer program. The computer program for executing the processing of the motor control unit 64 may be provided in a form recorded on a computer-readable recording medium such as a semiconductor memory, a magnetic recording medium, or an optical recording medium. Alternatively, the motor control unit 64 may be realized as a semiconductor integrated circuit in which a computer program for realizing the function is written.

[0117] Note that the installation location and application of the current detection device 1 shown in FIG. 8 are merely examples. For example, the current detection device 1 may be provided on the power line on the input side of the converter 61 and used to detect the input current to the motor drive device 100. Also, for example, the current detection device 1 may be provided in the DC link and used to detect the DC link current. Further, the current detection device 1 may be used to detect various currents in a motor drive device that controls the drive of a DC motor. Moreover, the current detection device 1 is not limited to motor drive devices and may be used to detect currents in various electrical devices such as computer products, home appliances, trains, automobiles, and aircraft. In any of the above application examples, the current value digital data (corrected by the second offset correction unit 15) output from the current detection device 1 is used as the current detection value in the electrical device.

[0118] As described above, the preferred embodiments of the present invention have been explained. However, the present invention is not limited to these embodiments, and various modifications and changes can be made within the scope of the claims.

Explanation of Reference Numerals

[0119] 1 Current detection device 2 Current path 11 Main current detection circuit 12 Offset correction current detection circuit 13 Short-circuit part 14 First offset correction unit 15 Second offset correction unit 21 Current detection resistor 22, 23 AD converters 31, 32, 34, 35 Filter resistors 33, 36 Filter capacitors 40 LSI (Large Scale Integration circuit) 51 Switch part 61 Converter 62 Inverter 63 Smoothing capacitor 64 Motor control unit 100 Motor drive device 200 AC power supply 300 Motor

Claims

1. A main current detection circuit that detects a current in a current path and outputs digital data corresponding to the current, An offset correction current detection circuit that detects the current in the current path at the same detection location as the main current detection circuit and outputs digital data corresponding to the current, A short-circuit section that short-circuits the current input terminals of the AD converter in the offset correction current detection circuit, A first offset correction unit that measures a first offset output from the offset correction current detection circuit when the short-circuit section short-circuits the current input terminals, and performs correction to remove an amount corresponding to the first offset from the output of the offset correction current detection circuit, Based on the output of the main current detection circuit and the corrected output by the first offset correction unit of the offset correction current detection circuit obtained at the same detection timing when the short-circuit section does not short-circuit the current input terminals, a second offset output from the main current detection circuit is calculated, and a second offset correction unit that performs correction to remove an amount corresponding to the second offset from the output of the main current detection circuit, A current detection device comprising:

2. The first offset correction unit measures the first offset and performs correction on the output of the offset correction current detection circuit at a predetermined period, and the current detection device according to claim 1.

3. The second offset correction unit calculates the second offset based on the output of the main current detection circuit and the corrected output by the first offset correction unit of the offset correction current detection circuit obtained at the same detection timing at each of a plurality of times when the short-circuit section does not short-circuit the current input terminals, and the current detection device according to claim 1 or 2.

4. When the short-circuiting portion does not short-circuit the current input terminals, 1 The output of the main current detection circuit at I 1 (t 1 ), the time t 1 The output corrected by the first offset correction unit of the offset correction current detection circuit in 2 (t 1 ), time t 2 The output of the main current detection circuit at I 1 (t 2 ), the time t 2 The output corrected by the first offset correction unit of the offset correction current detection circuit in 2 (t 2 ), the second offset correction unit 【Number 1】 Calculate I which is the second offset according to the above. of The current detection device according to claim 3.

5. Each of the main current detection circuit and the offset correction current detection circuit is a shunt resistance type current detection circuit, Each filter resistor provided on the input side of the AD converter of each of the main current detection circuit and the offset correction current detection circuit has a resistance value larger than that of the shunt resistance shared in the main current detection circuit and the offset correction current detection circuit, and the current detection device according to any one of claims 1 to 4.

6. When short - circuiting between the current input terminals by the short - circuit portion, a switch portion that blocks the inflow of current from the current path to the current input terminals is further provided, and when the short - circuit portion does not short - circuit between the current input terminals, the switch portion does not block the inflow of current from the current path to the current input terminals. The current detection device according to any one of claims 1 to 5.

7. Comprising the current detection device according to any one of claims 1 to 6, A motor drive device that controls the drive of a motor using the output corrected by the second offset correction unit of the main current detection circuit.

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