Passive Optical Network (PON) Frame Design

Abstract

To provide an improved PON frame design.SOLUTION: A method comprises generating a PON frame comprising a plurality of FEC codewords, in which the FEC codewords comprise a first codeword, and the first codeword comprises a PSB; and transmitting the PON frame. The method comprises receiving a PON frame comprising a plurality of FEC codewords, in which the FEC codewords comprise a first codeword, and the first codeword comprises a PSB; and processing the PON frame.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 62 / 827,598, entitled "Passive Optical Network (PON) Frame Design," filed April 1, 2019, by Futureway Technologies, Inc.

[0002] The disclosed embodiments relate generally to optical networks and, more particularly, to PON frame designs. [Background technology]

[0003] An optical network is a network that uses light waves or optical signals to carry data. A light source such as a laser generates the optical signal, a modulator modulates the optical signal with data to create a modulated optical signal, and various components propagate, amplify, receive, and process the modulated optical signal. Optical networks implement various forms of multiplexing to achieve high bandwidth. Optical networks implement data centers, metropolitan networks, PONs, long haul, and other applications. Summary of the Invention [Means for solving the problem]

[0004] A first aspect relates to a method that includes generating a PON frame that includes an FEC codeword, the FEC codeword including a first codeword, the first codeword including a PSB, and transmitting the PON frame.

[0005] A second aspect relates to a method that includes receiving a PON frame that includes a plurality of FEC codewords, the FEC codewords including a first codeword, the first codeword including a PSB, and processing the PON frame.

[0006] In a first embodiment of the method according to the first aspect or the second aspect, the PON frame has a duration of about 125 μs.

[0007] In a second embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the PON frame includes 360 FEC codewords with a codeword length of 17,280 bits, resulting in a PON frame length of 6,220,800 bits and a line speed of approximately 49.7664G.

[0008] In a third embodiment of the method according to the first aspect itself, any preceding embodiment of the first aspect, the second aspect itself, or any preceding embodiment of the second aspect, the PON frame includes 360 FEC codewords with a codeword length of 17,408 bits, resulting in a PON frame length of 6,266,880 bits and a line speed of approximately 50.13504G.

[0009] In a fourth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the PON frame includes 370 FEC code words with a code word length of 17,408 bits, resulting in a PON frame length of 6,440,960 bits and a line speed of approximately 51.52768G.

[0010] In a fifth embodiment of the method according to the first aspect itself, any preceding embodiment of the first aspect, the second aspect itself, or any preceding embodiment of the second aspect, the FEC codewords are LDPC FEC codewords.

[0011] In a sixth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, each of the LDPC FEC code words includes a payload and a parity check, and the LDPC FEC code words implement LDPC(17,280, 14,208) based on a mother code of LDPC(17,664, 14,592) and shorten the 14,592 bits in the payload by 384 bits to obtain 14,208 bits, and the LDPC FEC code words provide an FEC rate of approximately 82.22%.

[0012] In a seventh embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, each of the LDPC FEC code words includes a payload and a parity check, the LDPC FEC code words implement LDPC(17,280, 14,208) based on an LDPC(17,664, 14,592) mother code, shorten the 14,592 bits in the payload by 128 bits to obtain 14,464 bits, and puncture the 3,072 bits in the parity check by 256 bits to obtain 2,816 bits, and the LDPC FEC code words provide an FEC rate of approximately 83.70%.

[0013] In an eighth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the PON frame includes an integer number of FEC code words.

[0014] In a ninth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the integer is divisible by 2 and 5.

[0015] In a tenth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the integer is 360.

[0016] In an eleventh embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the integer is 370.

[0017] In a twelfth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the first code word is at the beginning of the PON frame.

[0018] In a thirteenth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the PON frame is a downstream PON frame and the PSB is a PSBd.

[0019] In a fourteenth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the PSB is longer than 192 bits.

[0020] In a 15th embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself, or any preceding embodiment of the second embodiment, the PON frame is an upstream PON frame and the PSB is a PSBu.

[0021] In a 16th embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the upstream PON frame provides a line rate that is 1 / n of the downstream line rate, where n is a positive integer.

[0022] In a 17th embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the upstream PON frame provides a line rate that is half the corresponding downstream line rate.

[0023] In an 18th embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the upstream PON frame provides a line rate that is 1 / 5 of the corresponding downstream line rate.

[0024] In a 19th embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the PSBu comprises a preamble, the preamble comprising a pattern that is repeated multiple times, the pattern being longer than 64 bits.

[0025] In a twentieth embodiment of the method according to the first embodiment itself, any preceding embodiment of the first embodiment, the second embodiment itself or any preceding embodiment of the second embodiment, the pattern is 128 bits.

[0026] A third aspect relates to an apparatus configured to perform the first aspect itself, any preceding implementation of the first aspect, the second aspect itself, or any preceding implementation of the second aspect.

[0027] In a first embodiment of the device according to the third aspect itself, said device is an OLT.

[0028] In a second embodiment of the device according to the third aspect itself, the device is an ONU.

[0029] A fourth aspect relates to a computer program product comprising computer-executable instructions stored on a non-transitory medium that, when executed by a processor, causes an apparatus to perform the first aspect itself, any preceding implementation of the first aspect, the second aspect itself, or any preceding implementation of the second aspect.

[0030] Any of the above embodiments can be combined with any of the other above embodiments to create new embodiments. These and other features will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings and claims. [Brief explanation of the drawings]

[0031] For a more complete understanding of this disclosure, reference is now made to the following brief description taken in conjunction with the accompanying drawings and detailed description, wherein like reference numerals represent like parts. [Figure 1] FIG. 1 is a schematic diagram of a PON. [Figure 2] FIG. 2 is a schematic diagram of a downstream PON frame according to one embodiment of the present disclosure. [Figure 3] FIG. 3 is a schematic diagram of a codeword according to one embodiment of the present disclosure. [Figure 4] FIG. 4 is a schematic diagram of a codeword according to another embodiment of the present disclosure. [Figure 5] FIG. 5 is a schematic diagram of an upstream PON frame according to one embodiment of the present disclosure. [Figure 6] FIG. 6 is a flowchart illustrating a method for PON frame communication according to one embodiment of the present disclosure. [Figure 7] FIG. 7 is a flowchart illustrating a method for PON frame communication according to another embodiment of the present disclosure. [Figure 8] FIG. 8 is a schematic diagram of an apparatus according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0032] First, while example implementations of one or more embodiments are provided below, it should be understood that the disclosed systems and / or methods may be implemented using any number of technologies, whether currently known or in existence. The present disclosure should not be limited to the example implementations, drawings, and technologies shown below, including the example designs and implementations shown and described herein, but may vary within the scope of the appended claims together with their full range of equivalents.

[0033] The following abbreviations apply: ASIC: Application Specific Integrated Circuit BCH:Bose-Chaudhuri-Hocquenghem CO: Central Secretariat CPU: Central Processing Unit DSP: Digital Signal Processor EO: Electric-Optical FEC: Forward Error Correction FPGA: Field Programmable Gate Array G: Gigabits per second HEC: Hybrid Error Correction ID: Identifier ITU-T: International Telecommunication Union Telecommunication Standardization Sector LDPC: Low Density Parity Check ODN: Optical Distribution Network OE: Optical-electrical OLT: Optical Line Terminal ONU: Optical Network Unit PHY: Physical Interface PON: Passive Optical Network PSBd: Physical Synchronization Block for Downstream PSBu: Physical synchronization block for upstream PSync: Physical synchronization sequence P2MP: Point to Multipoint RAM: Random Access Memory RF: Radio Frequency ROM: Read-Only Memory RX: Receiver unit SFC: Super Frame Counter SRAM: static RAM TCAM: Ternary Content Addressable Memory TX: Transmitter unit μs: microseconds

[0034] 1 is a schematic diagram of a PON 100. The PON 100 includes an OLT 110, ONUs 120, and an ODN 130 that couples the OLT 110 to the ONUs 120. The PON 100 is a communications network that may not require active components to distribute data between the OLT 110 and the ONUs 120. Instead, the PON 100 may use passive optical components in the ODN 130 to distribute data between the OLT 110 and the ONUs 120.

[0035] The OLT 110 communicates with other networks and the ONUs 120. Specifically, the OLT 110 acts as an intermediary between the other networks and the ONUs 120. For example, the OLT 110 forwards data received from the other networks to the ONUs 120 and forwards data received from the ONUs 120 to the other networks. The OLT 110 includes a transmitter and a receiver. If the other networks use a network protocol different from the protocol used by the PON 100, the OLT 110 includes a converter that converts the network protocol to the PON protocol and vice versa. Typically, the OLT 110 is located in a central location such as a CO, but may be located in other suitable locations.

[0036] ODN 130 is a data distribution network that includes fiber optic cables, couplers, splitters, distributors, and other suitable components, including passive optical components that do not require power to distribute signals between OLT 110 and ONUs 120. ODN 130 spans from OLT 110 to ONUs 120 in a branching configuration as shown, although ODN 130 may be configured in any other suitable P2MP configuration.

[0037] The ONU 120 communicates with the OLT 110 and the customers and acts as an intermediary between the OLT 110 and the customers. For example, the ONU 120 forwards data from the OLT 110 to the customers and forwards data from the customers to the OLT 110. The ONU 120 includes an optical transceiver that receives optical signals from the OLT 110, converts the optical signals to electrical signals, and provides the electrical signals to the customers. The transceiver also receives electrical signals from the customers, converts the electrical signals to optical signals, and transmits the optical signals to the OLT 110. The ONU 120 and the ONT are similar, and these terms may be used interchangeably. Typically, the ONUs 120 are located in distributed locations such as customer premises, although they may also be located in other suitable locations.

[0038] The PON 100 may be compatible with various standards that provide various line rates. For example, ITU-T G.987.3, January 2014 ("G.987.3") provides a 10G line rate, while other standards provide 1G, 12.5G, 25G, 50G, and other line rates. G.987.3 specifies that the OLT 110 and ONU 120 communicate with each other using PON frames that are 125 μs long. This length also applies to other standards. The PON frame length (125 μs) can be multiplied by the respective line rate to obtain the number of bits per PON frame. For example, a 10G line rate provides 1,244,160 bits per PON frame, while a 50G line rate provides 6,220,800 bits per PON frame.

[0039] In addition, standards typically divide PON frames into codewords, which can then be processed by a parity check matrix. However, after dividing a PON frame into codewords, standards may leave additional unused bits. Therefore, there is a need for a PON frame design that uses bits wisely in a manner that is scalable to various line rates.

[0040] Disclosed herein are embodiments for PON frame design. The embodiments provide a PON frame including a first codeword. The first codeword includes a PSB. The embodiments provide various advantages. First, the embodiments use bits wisely in a manner that is scalable to several major line rates. Second, the length of the PSB is adjusted, and the number of codewords and the length of the codeword are independent of the length of the PSB. Third, the PON frame includes an integer number of codewords regardless of their associated line speed. Fourth, the length of the codeword is suitable for parallel implementation. While a PON frame is discussed, the same principles apply to optical networks other than PONs and data structures other than frames.

[0041] 2 is a schematic diagram of a downstream PON frame 200 according to one embodiment of the present disclosure. Downstream refers to the direction from the OLT 110 to the ONU 120. The downstream PON frame 200 can provide a line rate of 50G.

[0042] Downstream PON frame 200 includes codeword 1 205, codeword 2 210, codeword 359 215, and codeword 360 220. The ellipsis between codeword 2 210 and codeword 239 215 indicates the presence of codewords 3 through 358. Each codeword 205 through 220 is 17,280 bits or has a codeword length of 17,280 bits, such that codeword 1 205 is from 1 through 17,280 bits, codeword 2 210 is from 17,281 through 34,560 bits, codeword 359 215 is from 6,186,241 through 6,203,520 bits, and codeword 360 220 is from 6,203,521 through 6,220,800 bits. Codewords 205 through 220 may implement FEC and therefore may be FEC codewords.

[0043] Codeword 1 205 includes PSBd 225, payload 230, and parity check 235. PSBd 225 is adjustable in length and is described below. Payload 230 contains data that OLT 110 desires to pass to ONU 120, e.g., user data. Parity check 235 includes bits that ensure accurate data transmission. As an example, PSBd 225 is 256 bits, payload 230 is 13,952 (14,208 - 256) bits, and parity check 235 is 3,072 bits. In this case, the 256 bits of PSBd 225 are expanded from the 192 bits allowed by G.987.3. Codeword 360 220 includes payload 240 similar to payload 230 in codeword 1 205 and includes parity check 245 similar to parity check 235 in codeword 1 205. However, codeword 360 220 does not contain a PSBd similar to PSBd 225 in codeword 1 205. Similarly, none of the remaining codewords 210-215 contain a PSBd. Therefore, in downstream PON frame 200, only codeword 1 205 contains PSBd 225, and the remaining codewords 210-220 are independent of PSBd, so PSBd 225 is the only PSBd or PSB in downstream PON frame 200. This differs from other approaches in which PSBd 225 is outside codeword 1 205 and precedes all of codewords 205-220.

[0044] PSBd 225 includes PSync 250, SFC structure 255, and PON-ID structure 260. PSync 250 includes a fixed 64-bit pattern used by ONU 120 to achieve alignment at downstream PHY boundaries. SFC structure 255 is described below. PON-ID 260 structure is described below. As an example, PSync 250 is 128 bits, SFC structure 255 is 64 bits, and PON-ID structure 260 is 64 bits. In this case, PSync 250's 128 bits are an extension of the 64 bits allowed by G.987.3.

[0045] The SFC structure 255 includes a superframe counter 265 and an HEC field 270. The superframe counter 265 contains a value that is incremented by one for the previous downstream PON frame. When the value reaches its maximum value (meaning all ones), the OLT 110 sets it to zero for the subsequent downstream PON frame. The HEC field 270 is a combination of a BCH code and a single parity bit that operates on the 63 initial bits of the SFC structure 255. As an example, the superframe counter 265 is 51 bits and the HEC field 270 is 13 bits.

[0046] PON-ID structure 260 includes a PON-ID 275 and an HEC field 280. PON-ID 275 is set by OLT 110 at its discretion and defaults to all zeros. HEC field 280 is a combination of a BCH code and a single parity bit that operates on 63 initial bits of PON-ID structure 260. As an example, PON-ID 275 is 51 bits and HEC field 280 is 13 bits.

[0047] First, downstream PON frame 200 includes 360 codewords 205-220, each of which is 17,280 bits. Unless PSBd 225 increases dramatically, e.g., beyond 17,280 bits, fewer bits are required for payload 230 and parity check 235, and the number of codewords 205-220 and their lengths are independent of the length of PSBd 225. This is because PSBd 225 is within codeword 1 205, and therefore increasing or decreasing its length does not affect the number of bits available for codewords 205-220. In contrast, if PSBd 225 is outside codeword 1 205, for example if PSBd 225 precedes codeword 1 205, increasing its size reduces the number of bits available for codewords 205-220, and therefore reduces the number of codewords 205-220 or their lengths.

[0048] Second, the downstream PON frame 200 includes an integer number of codewords 205-220 regardless of its associated line speed. For example, as shown, if the downstream PON frame 200 implements a 50G line speed, the downstream PON frame 200 includes 360 codewords 205-220, each of 17,280 bits. However, if the downstream PON frame 200 implements a 10G line speed, the downstream PON frame 200 includes 72 codewords, each of 17,280 bits. If the downstream PON frame 200 implements a 12.5G line speed, the downstream PON frame 200 includes 90 codewords, each of 17,280 bits. If the downstream PON frame 200 implements a 25G line speed, the downstream PON frame 200 includes 180 codewords, each of 17,280 bits. The numbers 72, 90, 180 and 360 are all integers, with 72 being 360 / 5, 90 being 360 / 4 and 180 being 360 / 2.

[0049] Third, the 17,280-bit length of codewords 205-220 lends itself to parallel implementation because 17,280 is a multiple of 128. Parallel implementation is the ability to split high-speed data into multiple parallel paths for processing, with each parallel path operating at an acceptably slower speed.

[0050] 3 is a schematic diagram of a codeword 300 according to one embodiment of the present disclosure. The codeword 300 may implement the codewords 210-220 in the downstream PON frame 200 of FIG. 2. The codeword 300 includes a payload 310 and a parity check 320.

[0051] Codeword 300 is based on the mother code for a 25G line rate described in "LDPC Adjustments from Motion #6, Chicago" (Mark Laubach et al., May 14, 2018). The mother code is LDPC(17,664, 14,592), which indicates an LDPC codeword containing 17,664 total bits, 14,592 payload bits, and therefore 3,072 parity-check bits. However, codeword 300 shortens the 14,592 payload bits of the mother code by 384 bits to obtain 14,208 bits for payload 310, shortening the 17,664 total bits by 384 bits to obtain 17,280 bits for codeword 300, while retaining 3,072 bits for parity check 320. Therefore, codeword 300 implements LDPC(17,280, 14,208). Dividing 14,208 by 17,280 gives an FEC rate of 82.22%. Because LDPC is a type of FEC, LDPC codewords or codewords that implement LDPC FEC are sometimes called LDPC FEC codewords.

[0052] 4 is a schematic diagram of a codeword 400 according to another embodiment of the present disclosure. The codeword 400 may implement the codewords 210-220 in the downstream PON frame 200 of FIG. 2. The codeword 400 includes a payload 410 and a parity check 420.

[0053] Codeword 400 is based on the LDPC(17,664, 14,592) mother code described above. However, codeword 400 shortens the 14,592 payload bits of the mother code by 128 bits to obtain 14,464 bits for payload 410, and punctures the 3,072 parity-check bits of the mother code by 256 bits to obtain 2,816 bits for parity-check 420, thus shortening the total number of 17,664 bits by 384 bits (128 bits + 256 bits) to obtain 17,280 bits for codeword 400. Puncturing means shortening by subtracting. Therefore, codeword 400 implements LDPC(17,280, 14,464). Dividing 14,464 by 17,280 results in an FEC rate of 83.70%.

[0054] The same concepts as above can also apply to other codeword schemes. For example, we can assume that the downstream PON frame 200 has a length of 125 μs, the number of codewords is an integer for some major line speeds, and ends with a 0 to allow divisibility by 2 and 5, and the codeword contains a number of bits that can be multiplied by 256 to implement LDPC (17,664, 14,592) mother codes. By having an integer number of codewords for some major line speeds, the scheme is scalable for those line speeds. Table 1 shows three codeword schemes that follow these assumptions.

[0055] [Table 1]

[0056] Scheme 1 illustrates the implementation of codewords 300, 400 in downstream PON frame 200. Specifically, downstream PON frame 200 includes 360 codewords 205-220. Each codeword 205-220 may include 67.5 codeword blocks of 256 bits each, resulting in a PON frame length of 17,280 bits for each codeword 205-220 and 17,280 x 360 = 6,220,800 bits or 6,220,800 bits for the downstream PON frame. The resulting line rate is 6,220,800 bits / 125 μs = 49.7664 G, an actual line rate of 50 G. FEC Rate 1 refers to codeword 300 implementing LDPC(17,280, 14,208) and resulting in an FEC rate of 82.22%. The corresponding payload rate 1 is the line rate × FEC rate 1 or 49.7664G × 82.22% = 40.92G. FEC rate 2 refers to codeword 400, which implements LDPC(17,280, 14,208) and results in an FEC rate of 83.70%. The corresponding payload rate 2 is the line rate × FEC rate 2 or 49.7664G × 83.70% = 41.65G.

[0057] Scheme 2 is similar to Scheme 1. However, instead of 67.5 codeword blocks as in Scheme 1, Scheme 2 uses 68 codeword blocks, resulting in 17,408 bits for each codeword and 6,266,880 bits for the downstream PON frame. The resulting line rate is 50.13504G, the resulting FEC Rate 1 is 82.35%, the resulting Payload Rate 1 is 41.29G, the resulting FEC Rate 2 is 83.82%, and the resulting Payload Rate 2 is 42.02G.

[0058] Scheme 3 is similar to Scheme 2. However, instead of 360 codeword blocks as in Scheme 2, Scheme 3 uses 370 codeword blocks, resulting in 6,440,960 bits for the downstream PON frame. The resulting line rate is 51.52768G, the resulting FEC Rate 1 is 82.35%, the resulting Payload Rate 1 is 42.43G, the resulting FEC Rate 2 is 83.82%, and the resulting Payload Rate 2 is 43.19G.

[0059] 5 is a schematic diagram of an upstream PON frame 500 according to one embodiment of the present disclosure. By upstream, we mean the direction from the ONU 120 to the OLT 110. The upstream PON frame 500 may provide a line rate that is 1 / n of the corresponding downstream line rate, where n is a positive integer. For example, the upstream PON frame 500 provides a line rate that is 1 / 2 the downstream line rate or 1 / 5 the downstream line rate.

[0060] Upstream PON frame 500 includes codeword 1 505, codeword 2 510, codeword n-1 515, and codeword n 520. The ellipsis between codeword 2 510 and codeword n-1 515 indicates the presence of codeword 3-(n-2). Each codeword 505-520 is 17,280 bits, so codeword 1 505 is bits 1-17,280, codeword 2 510 is bits 17,281-34,560, etc. Codewords 505-520 may implement FEC and thus may be FEC codewords.

[0061] Codeword 1 505 includes PSBu 525, payload 530, and parity check 535. PSBu 525 is adjustable in length, as described below. Payload 530 is the payload that ONU 120 sends to OLT 535. The PSBu 525 contains data, e.g., user data, desired to be passed to the upstream PON frame 500. The parity check 535 contains bits that ensure accurate data transmission. As an example, the PSBu 525 is m bits, the payload 530 is 14208-m bits, and the parity check 535 is 3,072 bits. The codeword n 520 contains a payload 540 similar to the payload 530 in the codeword 1 505 and a parity check 545 similar to the parity check 535 in the codeword 1 505. However, the codeword n 520 does not contain a PSBu similar to the PSBu 525 in the codeword 1 505. Similarly, none of the remaining codewords 510-515 contain a PSBu. Therefore, in the upstream PON frame 500, only the codeword 1 505 contains the PSBu 525, and the remaining codewords 510-520 are independent of the PSBu, so the PSBu 525 is the only PSBu or PSB in the upstream PON frame 500. This differs from other approaches in that PSBu 525 is outside codeword 1 505 and precedes all of codewords 505-520.

[0062] PSBu 525 includes a preamble 550 and a delimiter 555. Preamble 550 includes a pattern that is repeated multiple times. Codeword 1 505 protects preamble 550. The pattern is adjustable in length, and vendors may modify the pattern. As an example, the pattern is 64 bits and is repeated 31 times, resulting in preamble 550 of 64 x 31 = 1,984 bits. In this case, the 1,984 bits of preamble 550 conform to G.987.3. Preamble 550 and delimiter 555 together contain data that allow OLT 110 to identify the presence of a PHY burst from ONU 120, delineate the PHY burst, and identify the signal clock in order to properly recover the transmitted signal.

[0063] The upstream PON frame 500 may have similar characteristics to the downstream PON frame 200. For example, first, the number of codewords 505-520 and the lengths of the codewords 505-520 are independent of the length of the PSBu 525. Second, the upstream PON frame 500 includes an integer number of codewords 505-520 regardless of the associated line rate. Third, the lengths of the codewords 505-520 are suitable for parallel implementation.

[0064] FIG. 6 is a flowchart illustrating a method 600 of PON frame communication according to one embodiment of the present disclosure. The OLT 110 or the ONU 120 performs the method 600. In step 610, a PON frame including a plurality of FEC codewords is generated. The FEC codeword includes a first codeword, and the first codeword includes a PSB. In a first example, the PON frame is downstream PON frame 200, the codewords are codewords 205-220, the first codeword is codeword 1 205, and the PSB is PSBd 225. In a second example, the PON frame is upstream PON frame 500, the codewords are codewords 505-520, the first codeword is codeword 1 505, and the PSB is PSBu 525. Finally, in step 620, the PON frame is transmitted. In a first example, the OLT 110 transmits the downstream PON frame 200 to the ONU 120. In the second example, the ONU 120 transmits an upstream PON frame 500 to the OLT 110 .

[0065] 7 is a flowchart illustrating a method 700 of PON frame communication according to another embodiment of the present disclosure. The OLT 110 or the ONU 120 performs the method 700. In step 710, a PON frame including a plurality of FEC codewords is received. The FEC codeword includes a first codeword, and the first codeword includes a PSB. In a first example, the PON frame is downstream PON frame 200, the codewords are codewords 205-220, the first codeword is codeword 1 205, and the PSB is PSBd 225. In a second example, the PON frame is upstream PON frame 500, the codewords are codewords 505-520, the first codeword is codeword 1 505, and the PSB is PSBu 525. Finally, in step 720, the PON frame is processed.

[0066] 8 is a schematic diagram of an apparatus 800 according to one embodiment of the present disclosure. The apparatus 800 may implement all or part of the disclosed embodiments, such as the OLT 110 and the ONU 120. The apparatus 800 includes an ingress port 810 and an RX 820 for receiving data, a processor, logic unit, baseband unit, or CPU 830 for processing the data, a TX 840 and an egress port 850 for transmitting data, and a memory 860 for storing data. The apparatus 800 may also include an OE component, an EO component, or an RF component coupled to the ingress port 810, the RX 820, the TX 840, and the egress port 850 to provide an ingress or egress for an optical signal, an electrical signal, or an RF signal.

[0067] The processor 830 is any combination of hardware, middleware, firmware, or software. The processor 830 may include any combination of one or more CPU chips, cores, FPGAs, ASICs, or DSPs. The processor 830 is in communication with the ingress port 810, the RX 820, the TX 840, the egress port 850, and the memory 860. The processor 830 includes an FEC component 870 that implements the disclosed embodiments. Thus, the inclusion of the FEC component 870 substantially improves the functionality of the device 800 and allows the device 800 to be transformed into a different state. Alternatively, the memory 860 stores the FEC component 870 as instructions, and the processor 830 executes those instructions.

[0068] Memory 860 may include any combination of disks, tape drives, or solid-state drives. Device 800 may use memory 860 as overflow data storage to store programs when device 800 selects those programs for execution, and to store instructions and data that device 800 reads during the execution of those programs, e.g., as a computer program product. Memory 860 may be volatile or non-volatile, and may be any combination of ROM, RAM, TCAM, or SRAM. In some embodiments, memory 860 stores computer instructions that include FEC component 870.

[0069] The computer program product may include computer-executable instructions stored on a non-transitory medium, for example, memory 860, which, when executed by a processor, for example, processor 830, cause the device to perform any of the embodiments.

[0070] In some examples, when the apparatus 800 includes an OLT, the processor 830 executes the FEC component 870 to generate a passive optical network (PON) frame including a plurality of forward error correction (FEC) code words, the FEC code words including a first code word, the first code word including a physical synchronization block (PSB), and the processor 830 executes the FEC component 870 to transmit the PON frame.

[0071] In some examples, when the apparatus 800 includes an ONU, the processor 830 executes the FEC component 870 to receive a passive optical network (PON) frame including a plurality of forward error correction (FEC) code words, the FEC code words including a first code word, the first code word including a physical synchronization block (PSB), and the processor 830 executes the FEC component 870 to process the PON frame.

[0072] In some examples, when the apparatus 800 includes an OLT, the apparatus 800 includes a frame module that generates a passive optical network (PON) frame that includes multiple forward error correction (FEC) codewords, where the FEC codewords include a first codeword, where the first codeword includes a physical synchronization block (PSB), and a transmitter module that transmits the PON frame. In some embodiments, the apparatus 800 may include other or additional modules to perform any one or combination of steps described in the embodiments. It is also contemplated that any additional or alternative embodiments or aspects of the method may include similar modules, as shown in any drawing or recited in any claim.

[0073] In some examples, when apparatus 800 includes an ONU, apparatus 800 includes a receiver module that receives a passive optical network (PON) frame including multiple forward error correction (FEC) codewords, where the FEC codeword includes a first codeword, where the first codeword includes a physical synchronization block (PSB), and a processor module that processes the PON frame. In some embodiments, apparatus 800 may include other or additional modules to perform any one or combination of steps described in the embodiments. It is also contemplated that any additional or alternative embodiments or aspects of the method may include similar modules, as shown in any drawing or recited in any claim.

[0074] In an example embodiment, apparatus 800 includes a frame generation module that generates a passive optical network (PON) frame including a plurality of forward error correction (FEC) codewords, the FEC codewords including a first codeword, the first codeword including a physical synchronization block (PSB), and a frame transmission module that transmits the PON frame. In some embodiments, apparatus 800 may include other or additional modules to perform any one or combination of steps described in the embodiments. It is also contemplated that any additional or alternative embodiments or aspects of the method may include similar modules, as shown in any drawing or recited in any claim.

[0075] In an example embodiment, apparatus 800 includes a frame receiving module that receives a passive optical network (PON) frame that includes multiple forward error correction (FEC) codewords, the FEC codewords including a first codeword, the first codeword including a physical synchronization block (PSB), and a frame processing module that processes the PON frame. In some embodiments, apparatus 800 may include other or additional modules to perform any one or combination of steps described in the embodiments. It is also contemplated that any additional or alternative embodiments or aspects of the method may include similar modules, as shown in any drawing or recited in any claim.

[0076] The term "about," unless otherwise stated, refers to a range that includes ±10% of the subsequent number. While several embodiments have been provided in this disclosure, it will be understood that the disclosed systems and methods may be embodied in many other specific forms without departing from the spirit or scope of the disclosure. The examples are considered to be illustrative and not restrictive, and are not intended to be limited to the details presented herein. For example, various elements or components may be combined or integrated into another system, or certain features may be omitted or not implemented.

[0077] Additionally, the techniques, systems, subsystems, and methods described and illustrated in various embodiments as individually or separately may be combined or integrated with other systems, components, techniques, or methods without departing from the scope of the present disclosure. Other items shown or described as being coupled may be directly coupled or may be indirectly coupled or in communication, whether electrically, mechanically, or otherwise, through interfaces, devices, or intermediate components. Other examples of changes, substitutions, and alterations will be ascertainable by those skilled in the art and may be made without departing from the spirit and scope of the present disclosure.

Claims

1. generating a passive optical network (PON) frame, the PON frame including an integer number of forward error correction (FEC) code words having the same code word length, the FEC code words including a first code word at the beginning of the PON frame, the first code word consisting only of a physical synchronization block (PSB), a payload, and a parity check, and each of the other FEC code words of the PON frame consisting only of a payload and a parity check; transmitting the PON frame; A method comprising:

2. receiving a passive optical network (PON) frame, the PON frame including an integer number of forward error correction (FEC) code words having the same code word length, the FEC code words including a first code word at the beginning of the PON frame, the first code word consisting only of a physical synchronization block (PSB), a payload, and a parity check, and each of the other FEC code words of the PON frame consisting only of a payload and a parity check; processing the PON frame; A method comprising:

3. The method of claim 1 or 2, wherein the PON frame has a duration of about 125 microseconds (μs).

4. 4. The method of claim 1, wherein the PON frame includes 360 FEC code words, each of which is 17,280 bits in length, resulting in a PON frame length of 6,220,800 bits and a line speed of approximately 49.7664 gigabits per second (G).

5. The method of claim 1 , wherein the FEC codewords are low-density parity-check (LDPC) FEC codewords.

6. 6. The method of claim 5, wherein the LDPC FEC codeword implements LDPC(17,280, 14,208) based on a mother code of LDPC(17,664, 14,592) and shortens 14,592 bits in the payload by 384 bits to obtain 14,208 bits, and the LDPC FEC codeword provides an FEC rate of approximately 82.22%.

7. 6. The method of claim 5, wherein the LDPC FEC codeword implements LDPC(17,280, 14,464) based on an LDPC(17,664, 14,592) mother code, shortens 14,592 bits in the payload by 128 bits to obtain 14,464 bits, and punctures 3,072 bits in the parity check by 256 bits to obtain 2,816 bits, and the LDPC FEC codeword provides an FEC rate of approximately 83.70%.

8. The method of claim 1 , wherein the integer number is divisible by 2 and 5.

9. The method of claim 1 , wherein the integer number is 360.

10. The method according to claim 1 , wherein the PON frame is a downstream PON frame and the PSB is a PSB for downstream (PSBd).

11. 11. The method of claim 1, wherein the PSB is longer than 192 bits.

12. The method according to claim 1 , wherein the PON frame is an upstream PON frame and the PSB is a PSB for upstream (PSBu).

13. The method of claim 12 , wherein the upstream PON frame provides a line rate that is 1 / n of the corresponding downstream line rate, where n is a positive integer.

14. The method of claim 12 , wherein the upstream PON frame provides a line rate that is half the corresponding downstream line rate.

15. The method of claim 12 , wherein the upstream PON frame provides a line rate that is ⅕ of the corresponding downstream line rate.

16. 16. The method of any one of claims 12 to 15, wherein the PSBu includes a preamble, the preamble including a pattern that is repeated multiple times, the pattern being longer than 64 bits.

17. 17. The method of claim 16, wherein the pattern is 128 bits.

18. Apparatus configured to perform the method of any one of claims 1 to 17.

19. 20. The device of claim 18, wherein the device is an optical line terminal (OLT).

20. The device of claim 18, wherein the device is an optical network unit (ONU).

21. 18. A computer program product comprising computer executable instructions stored on a non-transitory medium which, when executed by a processor, causes an apparatus to perform the method of any one of claims 1 to 17.

22. a storage device containing instructions; one or more processors in communication with the storage device, the one or more processors executing the instructions, generating a passive optical network (PON) frame, the PON frame including an integer number of forward error correction (FEC) code words having the same code word length, the FEC code words including a first code word at the beginning of the PON frame, the first code word consisting only of a physical synchronization block (PSB), a payload, and a parity check, and each of the other FEC code words of the PON frame consisting only of a payload and a parity check; transmitting the PON frame; one or more processors that perform the An apparatus comprising:

23. 23. The apparatus of claim 22, wherein the integer number is divisible by 2 and 5.

24. 23. The apparatus of claim 22, wherein the integer number is 360 and each of the FEC codewords is 17,280 bits in length.

25. 25. The apparatus of claim 22, wherein the PON frame is a downstream PON frame and the PSB is a PSB for downstream (PSBd).

26. 26. Apparatus according to any one of claims 22 to 25, wherein the PSB is longer than 192 bits.

27. 25. The apparatus of claim 22, wherein the PON frame is an upstream PON frame and the PSB is a PSB for upstream (PSBu).

28. 28. The apparatus of claim 27, wherein the upstream PON frame provides a line rate that is 1 / n of the corresponding downstream line rate, where n is a positive integer.

29. 28. The apparatus of claim 27, wherein the upstream PON frame provides a line rate that is half the corresponding downstream line rate.

30. 28. The apparatus of claim 27, wherein the upstream PON frame provides a line rate that is 1 / 5 of the corresponding downstream line rate.

31. 31. The apparatus of any one of claims 27 to 30, wherein the PSBu includes a preamble, the preamble including a pattern that is repeated multiple times, the pattern being longer than 64 bits.

32. 32. The apparatus of claim 31, wherein the pattern is 128 bits.

33. 33. The device of any one of claims 22 to 32, wherein the device is an optical line terminal (OLT).

34. a storage device containing instructions; one or more processors in communication with the storage device, the one or more processors executing the instructions, receiving a passive optical network (PON) frame, the PON frame including an integer number of forward error correction (FEC) code words having the same code word length, the FEC code words including a first code word at the beginning of the PON frame, the first code word consisting only of a physical synchronization block (PSB), a payload, and a parity check, and each of the other FEC code words of the PON frame consisting only of a payload and a parity check; processing the PON frame; one or more processors that perform the An apparatus comprising:

35. 35. The device of claim 34, wherein the device is an optical network unit (ONU).

36. 36. The apparatus of claim 34 or 35, wherein the integer number is 360 and each of the FEC codewords is 17,280 bits in length.

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