Method, apparatus and medium for video processing

Abstract

An embodiment of the present disclosure provides a video processing method, the method including: performing a conversion between a target video block of a video and a bitstream of the video based on a general profile indicator of a profile defining capabilities for decoding the bitstream, where at least two bits of the general profile indicator are combined to indicate a bit depth of the profile.

Description

[Technical Field]

[0001] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 253,890, filed October 8, 2021, the entire contents of which are incorporated herein by reference.

[0002] FIELD Embodiments of the present disclosure relate generally to video encoding techniques, and more particularly to indicating a profile using a profile indicator value. [Background technology]

[0003] Video coding standards have evolved primarily through the development of well-known ITU-T and ISO / IEC standards. ITU-T created H.261 and H.263, while ISO / IEC created MPEG-1 and MPEG-4 Visual. These two organizations jointly developed the H.262 / MPEG-2 Video, H.264 / MPEG-4 Advanced Video Coding (AVC), and H.265 / HEVC standards. Since H.262, video coding standards have been based on a hybrid video coding architecture that utilizes temporal prediction plus transform coding. To explore future video coding technologies beyond HEVC, the Joint Video Exploration Team (JVET) was jointly established by VCEG and MPEG in 2015. Since then, many new methods have been adopted by JVET and incorporated into reference software named the Joint Exploration Model (JEM). When the VVC project was officially launched, JVET was renamed JVET. VVC is a new coding standard that aims to reduce the bitrate by 50% compared to HEVC.

[0004] The VVC standard and associated Versatile Supplemental Enhancement Information (VSEI) standard for coded video bitstreams are designed for use in the widest possible range of applications, including both traditional uses such as television broadcasting, videoconferencing, or playback from storage media, and newer, more advanced uses such as adaptive bitrate streaming, video region extraction, content synthesis and combining from multiple coded video bitstreams, multiview video, scalable layered coding, and viewport-adaptive 360-degree immersive media. The latest draft amendments to the VVC standard include the specification of range extension profiles and other aspects. Summary of the Invention

[0005] The embodiments of the present disclosure provide a solution for video processing.

[0006] In a first aspect, a video processing method is proposed, the method including: performing conversion between a target video block of a video and a bitstream of the video based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile. The method according to the first aspect of the present disclosure effectively improves the efficiency of indicating the bit depth of a profile.

[0007] In a second aspect, an apparatus for processing video data is proposed, said apparatus comprising a processor and a non-transitory memory with instructions that, when executed by the processor, cause the processor to perform a method according to the first aspect.

[0008] In a third aspect, an apparatus for processing video data is proposed. A non-transitory computer-readable storage medium stores instructions for causing a processor to perform the method according to the first aspect.

[0009] In a fourth aspect, a non-transitory computer-readable recording medium is proposed, the non-transitory computer-readable recording medium storing a video bitstream generated by a method executed by a video processing device, the method including generating the bitstream based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile.

[0010] In a fifth aspect, a method for storing a bitstream of another video is proposed, the method comprising the steps of generating the bitstream based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile, and storing the bitstream on a non-transitory computer-readable recording medium.

[0011] This description is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. It is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. [Brief explanation of the drawings]

[0012] These and other objects, features, and advantages of exemplary embodiments of the present disclosure will become more apparent through the following detailed description taken in conjunction with the accompanying drawings, in which like reference numerals generally refer to like components.

[0013] [Figure 1] 1 shows a block diagram illustrating an example video encoding system 100 according to some embodiments of the present disclosure.

[0014] [Figure 2] 2 shows a block diagram illustrating a first exemplary video encoder 200 according to some embodiments of the present disclosure.

[0015] [Figure 3] 3 shows a block diagram illustrating an example video decoder 300 according to some embodiments of the present disclosure.

[0016] [Figure 4] 4 shows a flowchart of a video processing method 400 according to some embodiments of the present disclosure.

[0017] [Figure 5] 5 illustrates a block diagram of a computing device 500 capable of implementing various embodiments of the present disclosure.

[0018] Throughout the drawings, the same or similar reference numbers generally refer to the same or similar elements. DETAILED DESCRIPTION OF THE INVENTION

[0019] Next, the principles of the present disclosure will be explained with reference to some embodiments. It should be understood that these embodiments are provided for illustrative purposes only, to help those skilled in the art understand and embody the present disclosure, and are not intended to imply any limitations on the scope of the present disclosure. The disclosure described herein can be embodied in various ways other than those described below.

[0020] In the following description and claims, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.

[0021] References in this disclosure to "one embodiment," "one embodiment," "exemplary embodiment," etc. indicate that the described embodiment may include a particular feature, structure, or characteristic, but not necessarily all embodiments include the particular feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in connection with an exemplary embodiment, it is noted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments, whether or not explicitly stated.

[0022] Terms such as "first" and "second" may be used herein to describe various elements, but it should be understood that these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element could be referred to as a second element, and similarly, a second element could be referred to as a first element, without departing from the scope of the exemplary embodiments. As used herein, the term "and / or" includes any and all combinations of one or more of the listed terms.

[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit example embodiments. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly dictates otherwise. It will be further understood that the terms "comprise," "comprise," "have," "have," "include," and / or "comprise," when used herein, specify the presence of stated features, elements, and / or components, etc., but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof.

[0024] Example Environment 1 is a block diagram illustrating an example video encoding system 100 that may utilize the techniques of this disclosure. As shown, video encoding system 100 may include a source device 110 and a destination device 120. Source device 110 may also be referred to as a video encoding device, and destination device 120 may also be referred to as a video decoding device. In operation, source device 110 may be configured to generate encoded video data, and destination device 120 may be configured to decode the encoded video data generated by source device 110. Source device 110 may include a video source 112, a video encoder 114, and an input / output (I / O) interface 116.

[0025] Video source 112 may include sources such as a video capture device. Examples of a video capture device include, but are not limited to, an interface that receives video data from a video content provider, a computer graphics system that generates video data, and / or combinations thereof.

[0026] The video data may include one or more pictures. The video encoder 114 encodes the video data from the video source 112 to generate a bitstream. The bitstream may include a series of bits forming a coded representation of the video data. The bitstream may include coded pictures and associated data. A coded picture is a coded representation of a picture. The associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. The I / O interface 116 may include a modulator / demodulator and / or transmitter. The coded video data may be transmitted directly to the destination device 120 through the network 130A via the I / O interface 116. The coded video data may be stored on a storage medium / server 130B for access by the destination device 120.

[0027] Destination device 120 may include an I / O interface 126, a video decoder 124, and a display device 122. I / O interface 126 may include a receiver and / or a modem. I / O interface 126 may obtain encoded video data from source device 110 or storage medium / server 130B. Video decoder 124 may decode the encoded video data. Display device 122 may display the decoded video data to a user. Display device 122 may be integrated with destination device 120 or may be external to destination device 120 configured to interface with an external display device.

[0028] Video encoder 114 and video decoder 124 may operate according to video compression standards such as the High Efficiency Video Coding (HEVC) standard, the Versatile Video Coding (VVC) standard, and other current and / or future standards.

[0029] FIG. 2 is a block diagram illustrating an example of a video encoder 200, which may be an example of the video encoder 114 in the system 100 shown in FIG. 1, according to some embodiments of the disclosure.

[0030] Video encoder 200 may be configured to embody any or all of the techniques of this disclosure. In the example of FIG. 2, video encoder 200 includes multiple functional components. The techniques described in this disclosure may be shared among various components of video encoder 200. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0031] In some embodiments, the video encoder 200 may include a division unit 201, a prediction unit 202, which may include a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205, and an intra prediction unit 206, a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy coding unit 214.

[0032] In other examples, video encoder 200 may include more, fewer, or different functional components. In one example, prediction unit 202 may include an intra block copy (IBC) unit. The IBC unit may perform prediction in an IBC mode in which at least one reference picture is the picture in which the current video block is located.

[0033] Furthermore, some components, such as the motion estimation unit 204 and the motion compensation unit 205, may be integrated but are depicted separately in the example of FIG. 2 for illustrative purposes.

[0034] Partition unit 201 may divide a picture into one or more video blocks. Video encoder 200 and video decoder 300 may support a variety of video block sizes.

[0035] The mode selection unit 203 may, for example, select one of intra or inter coding modes based on an error result, and provide the resulting intra-coded or inter-coded block to the residual generation unit 207 to generate residual block data, and to the reconstruction unit 212 to reconstruct the coded block and use it as a reference picture. In some examples, the mode selection unit 203 may select a combined intra- and inter-prediction (CIIP) mode in which prediction is based on an inter-prediction signal and an intra-prediction signal. In the case of inter-prediction, the mode selection unit 203 may select a resolution (e.g., sub-pixel or integer-pixel precision) of the motion vector of the block.

[0036] To perform inter prediction on the current video block, motion estimation unit 204 may generate motion information for the current video block by comparing one or more reference frames from buffer 213 with the current video block. Motion compensation unit 205 may determine a predictive video block for the current video block based on the motion information and decoded samples of pictures from buffer 213 other than the picture associated with the current video block.

[0037] Motion estimation unit 204 and motion compensation unit 205 may perform different operations on a current video block depending, for example, on whether the current video block is in an I slice, a P slice, or a B slice. As used herein, an "I slice" may refer to a portion of a picture composed of macroblocks, all of which are based on macroblocks within the same picture. Additionally, as used herein, in some aspects, "P slice" and "B slice" may refer to portions of a picture composed of macroblocks that are independent of macroblocks within the same picture.

[0038] In some examples, motion estimation unit 204 may perform unidirectional prediction on the current video block, and motion estimation unit 204 may look up a reference picture in list 0 or list 1 for a reference video block of the current video block. Motion estimation unit 204 may then generate a reference index indicating a reference picture in list 0 or list 1 that contains the reference video block, and a motion vector indicating a spatial displacement between the current video block and the reference video block. Motion estimation unit 204 may output the reference index, the prediction direction indicator, and the motion vector as motion information for the current video block. Motion compensation unit 205 may generate a predictive video block for the current video block based on the reference video block indicated by the motion information of the current video block.

[0039] Alternatively, in other examples, motion estimation unit 204 may perform bidirectional prediction on the current video block. Motion estimation unit 204 may look up a reference picture in list 0 for a reference video block of the current video block, or look up a reference picture in list 1 for another reference video block of the current video block. Motion estimation unit 204 may then generate a reference index indicating the reference picture in list 0 or list 1 that contains the reference video block, and a motion vector indicating the spatial displacement between the reference video block and the current video block. Motion estimation unit 204 may output the reference index and the motion vector for the current video block as motion information for the current video block. Motion compensation unit 205 may generate a predictive video block for the current video block based on the reference video block indicated by the motion information of the current video block.

[0040] In some examples, motion estimation unit 204 may output a full set of motion information for the decoder's decoding process. Alternatively, in some embodiments, motion estimation unit 204 may signal the motion information of the current video block by reference to the motion information of another video block. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.

[0041] In one example, motion estimation unit 204 may indicate, in a syntax structure associated with the current video block, a value that indicates to video decoder 300 that the current video block has the same motion information as another video block.

[0042] In another example, motion estimation unit 204 may identify another video block and a motion vector differential (MVD) in a syntax structure associated with the current video block. The motion vector differential indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 300 may determine the motion vector of the current video block using the motion vector and the motion vector differential of the indicated video block.

[0043] As discussed above, video encoder 200 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by video encoder 200 include advanced motion vector prediction (AMVP) and merge mode signaling.

[0044] Intra prediction unit 206 may perform intra prediction on the current video block. When intra prediction unit 206 performs intra prediction on the current video block, intra prediction unit 206 may generate predictive data for the current video block based on decoded samples of other video blocks within the same picture. The predictive data for the current video block may include a predicted video block and various syntax elements.

[0045] Residual generation unit 207 may generate residual data for the current video block by subtracting (e.g., as indicated by a minus sign) the prediction video block of the current video block from the current video block. The residual data for the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.

[0046] In other examples, such as in skip mode, residual data may not exist for the current video block, and residual generation unit 207 may not perform the subtraction operation.

[0047] Transform processing unit 208 may apply one or more transforms to the residual video block associated with the current video block to generate one or more transform coefficient video blocks for the current video block.

[0048] After transform processing unit 208 generates the transform coefficient video block associated with the current video block, quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values associated with the current video block.

[0049] Inverse quantization unit 210 and inverse transform unit 211 may apply inverse quantization and inverse transform, respectively, to the transform coefficient video block to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 212 may add the reconstructed residual video block to corresponding samples from one or more prediction video blocks generated by prediction unit 202 to generate a reconstructed video block associated with the current video block for storage in buffer 213.

[0050] After reconstruction unit 212 reconstructs the video blocks, a loop filtering operation may be performed to reduce video blocking artifacts in the video blocks.

[0051] Entropy encoding unit 214 may receive data from other functional components of video encoder 200. Once entropy encoding unit 214 receives the data, entropy encoding unit 214 may perform one or more entropy encoding operations to generate entropy-encoded data and output a bitstream including the entropy-encoded data.

[0052] FIG. 3 is a block diagram illustrating an example of a video decoder 300, which may be an example of the video decoder 124 in the system 100 shown in FIG. 1, according to some embodiments of this disclosure.

[0053] Video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 3, video decoder 300 includes multiple functional components. The techniques described in this disclosure may be shared among various components of video decoder 300. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0054] 3, video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, an intra prediction unit 303, an inverse quantization unit 304, an inverse transform unit 305, a reconstruction unit 306, and a buffer 307. Video decoder 300 may, in some examples, perform a decoding path that is generally inverse to the encoding path described with respect to video encoder 200.

[0055] The entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy-encoded video data (e.g., encoded blocks of video data). The entropy decoding unit 301 may decode the entropy-encoded video data, and from the entropy-decoded video data, the motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. The motion compensation unit 302 may determine such information by, for example, performing AMVP and merge mode. AMVP is used and includes deriving several most likely candidates based on data from neighboring PB and reference pictures. The motion information typically includes horizontal and vertical motion vector displacement values, one or two reference picture indexes, and, for prediction regions in B slices, identification of which reference picture list is associated with each index. As used herein, in some aspects, "merge mode" may refer to deriving motion information from spatially or temporally neighboring blocks.

[0056] The motion compensation unit 302 may generate the motion-compensated blocks, possibly performing interpolation based on an interpolation filter. Identifiers of the interpolation filters used with sub-pixel precision may be included in syntax elements.

[0057] Motion compensation unit 302 may calculate interpolated values for sub-integer pixels of the reference block using an interpolation filter used by video encoder 200 during encoding of the video block. Motion compensation unit 302 may determine the interpolation filter used by video encoder 200 according to received syntax information and use the interpolation filter to generate the predictive block.

[0058] The motion compensation unit 302 may use at least a portion of the syntax information to determine the size of blocks used to encode frames and / or slices of the encoded video sequence, partition information describing how each macroblock of a picture of the encoded video sequence is divided, a mode indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter-encoded block, and other information for decoding the encoded video sequence. As used herein, in some aspects, a "slice" may refer to a data structure that can be decoded independently from other slices of the same picture with respect to entropy coding, signal prediction, and residual signal reconstruction. A slice can be either an entire picture or a region of a picture.

[0059] The intra prediction unit 303 may form a prediction block from spatially adjacent blocks, e.g., using an intra prediction mode received in the bitstream. The inverse quantization unit 304 inverse quantizes, or dequantizes, the quantized video block coefficients provided in the bitstream and decoded by the entropy decoding unit 301. The inverse transform unit 305 applies an inverse transform.

[0060] Reconstruction unit 306 may obtain decoded blocks, for example, by adding residual blocks and corresponding prediction blocks generated by motion compensation unit 302 or intra prediction unit 303. Optionally, a deblocking filter may be applied to filter the decoded blocks to remove blockiness artifacts. The decoded video blocks are then stored in buffer 307, which provides reference blocks for subsequent motion compensation / intra prediction and also generates decoded video for presentation on a display device.

[0061] Several exemplary embodiments of the present disclosure will be described in detail below. While section headings are used herein for ease of understanding, it should be understood that they do not limit the embodiments disclosed in a section to that section alone. Furthermore, while certain embodiments are described with reference to versatile video encoding or other specific video codecs, the disclosed techniques are applicable to other video encoding techniques. Furthermore, while some embodiments describe video encoding steps in detail, it will be understood that the corresponding decoding steps that undo the encoding are performed by a decoder. Furthermore, the term video processing encompasses video encoding or compression, video de-encoding or decompression, and video transcoding, which represents video pixels from one compressed format to another compressed format or at a different compressed bit rate. 1. Overview This disclosure relates to image / video coding techniques, particularly to indicating a profile using a profile indicator value. This idea can be applied individually or in various combinations to video bitstreams encoded by any codec, such as the Universal Video Coding (VVC) standard. 2. Abbreviations APS Adaptation Parameter Set AU Access Unit CLVS Coded Layer Video Sequence CLVSS Coded Layer Video Sequence Start CRC Cyclic Redundancy Check CTI Colour Transform Information CVS Coded Video Sequence FIR Finite Impulse Response IRAP Intra Random Access Point NAL Network Abstraction Layer PPS Picture Parameter Set PU Picture Unit RASL Random Access Skipped Leading SAR Sample Aspect Ratio SARI Sample Aspect Ratio Information SEI Supplemental Enhancement Information VCL Video Coding Layer VSEI versatile supplemental enhancement Information (Rec. ITU-T H.274 | ISO / IEC 23002-7) VUI Video Usability Information VVC versatile video coding (Rec. ITU-T H.266 | ISO / IEC 23090-3) 3. Background 3.1. Video Coding Standards Video coding standards have evolved primarily through the development of well-known ITU-T and ISO / IEC standards. ITU-T created H.261 and H.263, while ISO / IEC created MPEG-1 and MPEG-4 Visual. These two organizations jointly developed the H.262 / MPEG-2 Video, H.264 / MPEG-4 Advanced Video Coding (AVC), and H.265 / HEVC standards. Since H.262, video coding standards have been based on a hybrid video coding architecture that utilizes temporal prediction plus transform coding. To explore future video coding technologies beyond HEVC, the Joint Video Exploration Team (JVET) was jointly established by VCEG and MPEG in 2015. Since then, many new methods have been adopted by JVET and incorporated into reference software called the Joint Exploration Model. Later, when the Versatile Video Coding (VVC) project was officially launched, JVET was renamed the Joint Video Experts Team (JVET). VVC is a new coding standard that aims to reduce the bitrate by 50% compared to HEVC, and was finalized by JVET at its 19th meeting, which ended on July 1, 2020. The Versatile Video Coding (VVC) standard (ITU-T H.266 | ISO / IEC 23090-3) and the associated Versatile Supplemental Enhancement Information (VSEI) standard for coded video bitstreams (ITU-T H.274 | ISO / IEC 23002-7) are designed for use in the widest range of applications, including both traditional uses such as television broadcasting, videoconferencing, or playback from storage media, and newer, more advanced uses such as adaptive bitrate streaming, video region extraction, content synthesis and combining from multiple coded video bitstreams, multiview video, scalable layered coding, and viewport-adaptive 360-degree immersive media. The Essential Video Coding (EVC) standard (ISO / IEC 23094-1) is another video coding standard recently developed by MPEG. The latest draft of the proposed amendments to the VVC standard is available in JVET-W2005, which includes the specification of range extension profiles and other aspects. 3.2. VVC Range Extension Profile The draft text for specifying the VVC Range Extension Profile in JVET-W2005 is provided below. A3.5 Format Range Extension Profile The following profiles, collectively known as Format Range Extension Profiles, are specified in this subclause: - Main 12, Main 12 4:4:4 and Main 16 4:4:4 profiles - Main 12 Intra, Main 12 4:4:4 Intra and Main 16 4:4:4 Intra profiles - Main 12 Still, Main 12 4:4:4 Still and Main 16 4:4:4 Still profiles Bitstreams conforming to the Format Range Extension Profile shall adhere to the following constraints: - The ptl_multilayer_enabled_flag of the referenced SPS shall be equal to 0. - In bitstreams conforming to the Main 12 Still Image, Main 12 4:4:4 Still Image and Main 16 4:4:4 Still Image profiles, the bitstream shall contain only one picture. - In bitstreams conforming to the Main 12, Main 12 4:4:4, Main 16 4:4:4, Main 12 Intra, Main 12 4:4:4 Intra, or Main 16 4:4:4 Intra profiles, general_level_idc for all values of i in an active SPS shall not be equal to 255 (indicating level 15.5). - The tier and level constraints specified for the Main 12, Main 12 4:4:4, Main 16 4:4:4, Main 12 Intra, Main 12 4:4:4 Intra or Main 16 4:4:4 Intra profiles in subclause A.4 shall be fulfilled, where applicable. [Table 1] Conformance of a bitstream to the Main 12 profile is indicated by general_profile_idc equal to 2. Conformance of a bitstream to the Main 12 Intra profile is indicated by general_profile_idc equal to 10. Conformance of a bitstream to the Main 12 still image profile is indicated by general_profile_idc equal to 66. Conformance of a bitstream to the Main 12 4:4:4 profile is indicated by general_profile_idc equal to 34. Conformance of a bitstream to the Main 12 4:4:4 Intra profile is indicated by general_profile_idc equal to 42. Conformance of a bitstream to the Main 12 4:4:4 Still Image Profile is indicated by general_profile_idc equal to 98. Conformance of a bitstream to the Main 16 4:4:4 profile is indicated by general_profile_idc equal to 36. Conformance of a bitstream to the Main 16 4:4:4 Intra profile is indicated by general_profile_idc equal to 44. Conformance of a bitstream to the Main 16 4:4:4 Still Image Profile is indicated by general_profile_idc equal to 100. All other combinations of syntax elements in Table A.1 where general_profile_idc is equal to 2, 10, 66, 34, 42, 98, 36, 44, or 100 are reserved for future use by ITU-T | ISO / IEC. Such combinations shall not occur in bitstreams conforming to this document. However, decoders conforming to the Format Range Extension Profile shall allow the other combinations specified below in this subclause to appear in the bitstream. [Table 2] A decoder conforming to the Format Range Extension Profile at a particular level (identified by a particular value of general_level_idc) of a particular tier (identified by a particular value of general_tier_flag) shall be able to decode all bitstream and sub-layer representations for which all of the following conditions apply: - One of the following conditions applies: - The decoder is indicated as conforming to the Main 12 4:4:4 or Main 16 4:4:4 profile, and the bitstream or sublayer representation is indicated as conforming to the Main 10 profile or the Main 10 still image profile. - The decoder is shown to conform to the Main 12 4:4:4 Intra, Main 16 4:4:4 Intra, Main 12 Still, Main 12 4:4:4 Still, or Main 16 4:4:4 Still Profile, and the bitstream or sub-layer representation conforms to the Main 10 Still Profile. - the bitstream's general_profile_idc is equal to 2, 10, 66, 34, 42, 98, 36, 44, or 100, and the value of each constraint flag listed in Table A.1 is greater than or equal to the value specified in the row of Table A.1 for the Format Range Extension profile for which decoder conformance is being evaluated. - A bitstream or sub-layer representation is indicated to conform to the layer below the specified layer. - A bitstream or sublayer representation is shown to conform to a specified level or lower, but not to level 15.5. 4. Problems The current design for a given VVC profile follows this set of rules: 1) For any 10-bit profile, bit 0 (i.e., least significant bit, LSB) of the 7-bit general_profile_idc is equal to 1. 2) For any 12-bit profile, bit 1 of general_profile_idc is equal to 1. 3) For any 16-bit profile, bit 2 of general_profile_idc is equal to 1. 4) For any Intra profile, bit 3 of general_profile_idc is equal to 1. 5) For any multi-layer profile, bit 4 of general_profile_idc is equal to 1. 6) For any 4:4:4 profile, bit 5 of general_profile_idc is equal to 1. 7) For any still image profile, bit 6 of general_profile_idc is equal to 1. As can be seen from items 1) to 3) above, the current design uses the three LSBs of the general_profile_idc to indicate the maximum allowed bit depth individually, with each bit indicating one maximum allowed bit depth value, making it efficient to use three bits with the ability to specify three different maximum allowed bit depth values. However, it would be more efficient to use a combination of only two LSBs to indicate four different maximum allowed bit depth values (e.g., if specified, a value of 00 for the two LSBs could be used for an 8-bit profile), and at the same time, bit 2 could be used for other purposes in the future, allowing for many more future general_profile_idc values with the same rules. 5. Detailed Plan In order to solve the above problems, the method summarized below is disclosed. The embodiments of the present disclosure should be considered as examples for explaining the general concept, and should not be construed narrowly. Furthermore, these embodiments can be applied individually or in any combination. 1) Use the two least significant bits (LSBs) of the 7-bit general_profile_idc to indicate the maximum allowed bit depth for the profile. In one example, the two LSBs of general_profile_idc have the value 00, which indicates that the profile is an 8-bit profile. b. In one example, the two LSBs of general_profile_idc have the value 01, indicating that the profile is a 10-bit profile. c. In one example, a value of 10 in the two LSBs of general_profile_idc indicates that the profile is a 12-bit profile. d. In one example, a value of 11 in the two LSBs of general_profile_idc indicates that the profile is a 16-bit profile. e. In one example, conformance of a bitstream to the Main 16 4:4:4 profile is indicated by general_profile_idc equal to 35. f. In one example, conformance of a bitstream to the Main 16 4:4:4 Intra profile is indicated by general_profile_idc equal to 43. g. In one example, a bitstream's conformance to the Main 16 4:4:4 Still Image Profile is indicated by general_profile_idc equal to 99. 6. Implementation Below are some exemplary embodiments of all aspects of the detailed solutions summarized in Section 5 above, including its subsections. 6.1. Embodiment 1 This embodiment can be applied to VVC. A3.5 Format Range Extension Profile The following profiles, collectively known as Format Range Extension Profiles, are specified in this subclause: - Main 12, Main 12 4:4:4 and Main 16 4:4:4 profiles - Main 12 Intra, Main 12 4:4:4 Intra and Main 16 4:4:4 Intra profiles - Main 12 Still, Main 12 4:4:4 Still and Main 16 4:4:4 Still profiles Bitstreams conforming to the Format Range Extension Profile shall adhere to the following constraints: - The ptl_multilayer_enabled_flag of the referenced SPS shall be equal to 0. - In a bitstream conforming to the Main 12 Still Image, Main 12 4:4:4 Still Image, or Main 16 4:4:4 Still Image Profile, the bitstream shall contain only one picture. - In a bitstream conforming to the Main 12 Intra, Main 12 4:4:4 Intra, or Main 16 4:4:4 Intra profile, the value of ph_inter_slice_allowed_flag shall be equal to 0 for all pictures. - In bitstreams conforming to the Main 12, Main 12 4:4:4, Main 16 4:4:4, Main 12 Intra, Main 12 4:4:4 Intra, or Main 16 4:4:4 Intra profiles, general_level_idc in the referenced SPS shall not be equal to 255 (indicating level 15.5). - Shall comply with the allowed values of syntax elements specified in Table A.1. - The tier and level constraints specified for the Main 12, Main 12 4:4:4, Main 16 4:4:4, Main 12 Intra, Main 12 4:4:4 Intra or Main 16 4:4:4 Intra profiles in subclause A.4 shall be fulfilled, where applicable. [Table 3] Conformance of a bitstream to the Main 12 profile is indicated by general_profile_idc equal to 2. Conformance of a bitstream to the Main 12 Intra profile is indicated by general_profile_idc equal to 10. Conformance of a bitstream to the Main 12 still image profile is indicated by general_profile_idc being equal to 66. Conformance of a bitstream to the Main 12 4:4:4 profile is indicated by general_profile_idc equal to 34. Conformance of a bitstream to the Main 12 4:4:4 Intra profile is indicated by general_profile_idc equal to 42. Conformance of a bitstream to the Main 12 4:4:4 Still Image Profile is indicated by general_profile_idc equal to 98. Conformance of a bitstream to the Main 16 4:4:4 profile is indicated by general_profile_idc equal to 35. Conformance of a bitstream to the Main 16 4:4:4 Intra profile is indicated by general_profile_idc equal to 43. Conformance of a bitstream to the Main 16 4:4:4 Still Image Profile is indicated by general_profile_idc equal to 99. A decoder conforming to the Format Range Extension Profile at a particular level (identified by a particular value of general_level_idc) of a particular tier (identified by a particular value of general_tier_flag) shall be able to decode all bitstream and sub-layer representations for which all of the following conditions apply: - One of the following conditions applies: - The decoder conforms to the Main 12 profile and the bitstream is indicated as conforming to the Main 10, Main 10 Still, Main 12, Main 12 Intra, or Main 12 Still profile. - The decoder conforms to the Main 12 4:4:4 profile and the bitstream is indicated as conforming to the Main 10, Main 10 Still, Main 10 4:4:4, Main 10 4:4:4 Still, Main 12, Main 12 Intra, Main 12 Still, Main 12 4:4:4, Main 12 4:4:4 Intra, or Main 12 4:4:4 Still profile. - The decoder conforms to the Main 16 4:4:4 profile and the bitstream is indicated as conforming to either the Main 10, Main 10 Still, Main 10 4:4:4, Main 10 4:4:4 Still, or Format Range Extended profile. - The decoder conforms to the Main 12 Intra profile and the bitstream is indicated as conforming to the Main 10 Still, Main 12 Intra, or Main 12 Still profile. - The decoder conforms to the Main 12 4:4:4 Intra profile and the bitstream is indicated as conforming to the Main 10 Still, Main 10 4:4:4 Still, Main 12 Intra, Main 12 4:4:4 Intra, Main 12 Still, or Main 12 4:4:4 Still profile. - The decoder conforms to the Main 16 4:4:4 Intra profile and the bitstream is indicated as conforming to the Main 10 Still, Main 10 4:4:4 Still, Main 12 Intra, Main 12 4:4:4 Intra, Main 16 4:4:4 Intra, Main 12 Still, Main 12 4:4:4 Still, or Main 16 4:4:4 Still profile. - The decoder conforms to the Main 12 still image profile and the bitstream is indicated as conforming to the Main 10 still image or Main 12 still image profile. - The decoder conforms to the Main 12 4:4:4 Still Image profile and the bitstream is indicated as conforming to the Main 10 Still Image, Main 10 4:4:4 Still Image, Main 12 Still Image or Main 12 4:4:4 Still Image profile. - The decoder conforms to the Main 16 4:4:4 Still Picture profile and the bitstream is indicated as conforming to the Main 10 Still Picture, Main 10 4:4:4 Still Picture, Main 12 Still Picture, Main 12 4:4:4 Still Picture, or Main 16 4:4:4 Still Picture profile. - The bitstream is shown to conform to the specified stratum or lower. - The bitstream is shown to conform to a level below the specified level, but not to level 15.5. A decoder conforming to the Main 12 Still Image Profile at a particular level in a particular hierarchy shall also be able to decode the first picture of the bitstream if both of the following conditions are true: - The bitstream conforms to the Main 10, Main 12, or Main 12 Intra profile, conforms to a specified level or lower, and is indicated as conforming to a level or lower than the specified level, but not to level 15.5. - The picture is an IRAP picture or a GDR picture with ph_recovery_poc_cnt equal to 0, is in the output layer, and ph_pic_output_flag equal to 1. A decoder that conforms to the Main 12 4:4:4 Still Image Profile at a particular level in a particular hierarchy shall also be able to decode the first picture of the bitstream if both of the following conditions are true: - The bitstream conforms to the Main 10, Main 10 4:4:4, Main 12, Main 12 Intra, Main 12 4:4:4, or Main 12 4:4:4 Intra profile, conforms to a specified level or lower, and is indicated as conforming to a level or lower than the specified level, but not to level 15.5. - The picture is an IRAP picture or a GDR picture with ph_recovery_poc_cnt equal to 0, is in the output layer, and ph_pic_output_flag equal to 1. A decoder that conforms to the Main 16 4:4:4 Still Image Profile at a particular level in a particular hierarchy shall also be able to decode the first picture of the bitstream if both of the following conditions are true: - The bitstream conforms to the Main 10, Main 10 4:4:4, Main 12, Main 12 Intra, Main 12 4:4:4, Main 12 4:4:4 Intra, Main 16 4:4:4, or Main 16 4:4:4 Intra profile, conforms to a specified level or lower, and is indicated as conforming to a level or lower than the specified level, but not to level 15.5. - The picture is an IRAP picture or a GDR picture with ph_recovery_poc_cnt equal to 0, is in the output layer, and ph_pic_output_flag equal to 1.

[0062] Embodiments of the present disclosure relate to indicating a profile using a profile indicator value. These embodiments may be applied individually or in various combinations to video bitstreams encoded according to any codec, such as the VVC standard.

[0063] As used herein, the term "block" may refer to a slice, a tile, a brick, a subpicture, a coding tree unit (CTU), a coding tree block (CTB), a CTU row, a CTB row, one or more coding units (CUs), one or more coding blocks (CBs), one or more CTUs, one or more CTBs, one or more virtual pipeline data units (VPDUs), a sub-region within a picture / slice / tile / brick, an inference block, etc. In some embodiments, a block may include one or more samples or one or more pixels in a video.

[0064] As discussed above, the current design for indicating a specified VVC profile follows a set of rules. For example, for any 10-bit profile, bit 0 (i.e., least significant bit, LSB) of the 7-bit general_profile_idc is equal to 1; for any 12-bit profile, bit 1 of general_profile_idc is equal to 1; and for any 16-bit profile, bit 2 of general_profile_idc is equal to 1. It can be seen that the current design uses the three LSBs of general_profile_idc to individually indicate the maximum allowed bit depths, with each bit indicating one maximum allowed bit depth. That is, although three bits are used individually, it only achieves the ability to specify three different maximum allowed bit depth values, which is inefficient.

[0065] To address at least some of these and other potential issues, embodiments of the present disclosure propose a method for indicating a profile using a profile indicator value. Specifically, it is proposed to indicate multiple different maximum allowable bit depth values using a combination of two or more bits. For example, it is more efficient to indicate four different maximum allowable bit depth values using a combination of only two LSBs, while at the same time allowing bit 2 to be used for other purposes in the future, thereby allowing for many more future general_profile_idc values under the same rule.

[0066] It should be understood that these embodiments are examples to illustrate the general concept and should not be construed narrowly, and that these embodiments may be applied individually or in any combination.

[0067] 4 illustrates a flowchart of a method 400 for video processing according to some embodiments of the present disclosure. As shown in FIG. 4, at 402, conversion between a target video block of a video and a bitstream of the video is performed based on a general profile indicator of a profile that defines capabilities for decoding the bitstream. The general profile indicator may include multiple bits. According to embodiments of the present disclosure, at least two bits of the general profile indicator are combined to indicate the bit depth of the profile.

[0068] Therefore, the bit depth of a profile, e.g., the maximum allowed bit depth, can be indicated by using a combination of two or more bits instead of individual bits of the general profile indicator, thus effectively improving the efficiency of indicating the profile.

[0069] A profile specifies restrictions on a bitstream and therefore on the capabilities required to decode the bitstream. Profiles are also used to indicate the capabilities of individual decoder implementations and interoperability points between encoders and decoders. Each profile specifies a subset of algorithmic features and restrictions that are supported by all decoders conforming to that profile. A profile can be indicated through a syntax element, general_profile_idc, which can have a predetermined number of bits.

[0070] According to embodiments of the present disclosure, two or more bits, e.g., the LSB, may be used to indicate different profiles. In some embodiments, the profile may be the Main 16 4:4:4 profile, and conformance of a bitstream to the Main 16 4:4:4 profile may be indicated by a General Profile Indicator equal to 35.

[0071] Alternatively or additionally, in some embodiments, the profile may be the Main 16 4:4:4 Intra profile, and conformance of a bitstream to the Main 16 4:4:4 Intra profile may be indicated by a General Profile Indicator equal to 43.

[0072] Alternatively or additionally, in some embodiments, the profile may be the Main 16 4:4:4 Still Image Profile, and conformance of a bitstream to the Main 16 4:4:4 Still Image Profile may be indicated by a General Profile Indicator equal to 99.

[0073] It should be understood that the above examples of profiles and / or values indicated by the general profile indicator are not intended to imply any limitations on the present disclosure, but are discussed for illustrative purposes. It should also be understood that other suitable profiles or values may be applied to embodiments of the present disclosure.

[0074] In some embodiments, two bits, e.g., the two LSBs, of the general profile indicator may combine to indicate the maximum allowable bit depth of the profile. In this case, for example, the values of the two LSBs of the general profile indicator may be "00," which may indicate that the profile is an 8-bit profile. Alternatively, in some embodiments, the values of the two LSBs of the general profile indicator may be "01," which may indicate that the profile is a 10-bit profile. In some further alternative embodiments, the values of the two LSBs of the general profile indicator may be "10," indicating that the profile may be a 12-bit profile. Furthermore, the values of the two LSBs of the general profile indicator may be "11," indicating that the profile may be a 16-bit profile.

[0075] It should be understood that the above example of two LSB values for the General Profile Indicator is not intended to imply any limitations on the present disclosure, but is discussed for illustrative purposes. It should also be understood that other suitable combinations or values of two or more LSBs may be applied to embodiments of the present disclosure.

[0076] In some embodiments, the conversion may include encoding the target video block into a bitstream. Alternatively, the conversion may include decoding the target video block from the bitstream. In other words, method 400 may be performed in both an encoder and a decoder of a bitstream.

[0077] According to a further embodiment of the present disclosure, a video bitstream may be stored on a non-transitory computer-readable recording medium, the bitstream being generated by a method performed by a video processing device based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator combine to indicate a bit depth of the profile.

[0078] In some embodiments, a method for storing a video bitstream is proposed, wherein the bitstream is generated based on a general profile indicator of a profile that defines capabilities for decoding the bitstream, and at least two bits of the general profile indicator are combined to indicate a bit depth of the profile, and the generated bitstream is then stored on a non-transitory computer-readable storage medium.

[0079] Implementations of the present disclosure can be described in view of the following clauses, the features of which can be combined in any reasonable manner.

[0080] Clause 1. A video processing method comprising: 1. A method comprising: performing a conversion between a target video block of a video and a bitstream of the video based on a general profile indicator of a profile that defines capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile.

[0081] Clause 2. The method of clause 1, wherein the general profile indicator is represented as a syntax element general_profile_idc and has a predetermined number of bits.

[0082] Clause 3. The method of clause 1 or 2, wherein the profile is the Main 16 4:4:4 profile and conformance of the bitstream to the Main 16 4:4:4 profile is indicated by the general profile indicator being equal to 35.

[0083] Clause 4. A method according to any one of clauses 1 to 3, wherein the profile is the Main 16 4:4:4 Intra profile and conformance of the bitstream to the Main 16 4:4:4 Intra profile is indicated by the general profile indicator being equal to 43.

[0084] Clause 5. The method of any one of clauses 1 to 4, wherein the profile is a Main 16 4:4:4 still image profile and conformance of the bitstream to the Main 16 4:4:4 still image profile is indicated by the general profile indicator being equal to 99.

[0085] Clause 6. The method of any one of clauses 1 to 5, wherein the two least significant bits (LSBs) of the general profile indicator combine to indicate the maximum allowable bit depth of the profile.

[0086] Clause 7. The method of clause 6, wherein the values of the two LSBs of the general profile indicator are "00", indicating that the profile is an 8-bit profile.

[0087] Clause 8. The method of clause 6 or 7, wherein the values of the two LSBs of the general profile indicator are '01', indicating that the profile is a 10-bit profile.

[0088] Clause 9. The method of any one of clauses 6 to 8, wherein the value of the two LSBs of the general profile indicator is "10", indicating that the profile is a 12-bit profile.

[0089] Clause 10. The method of any one of clauses 6 to 9, wherein the values of the two LSBs of the general profile indicator are "11", indicating that the profile is a 16-bit profile.

[0090] Clause 11. The method of any one of clauses 1 to 10, wherein the transforming includes encoding the target video block into the bitstream.

[0091] Clause 12. The method of any one of clauses 1 to 10, wherein the converting includes decoding the target video block from the bitstream.

[0092] Clause 13. An apparatus for processing video data comprising a processor and a non-transitory memory comprising instructions that, when executed by the processor, cause the processor to perform a method according to any one of clauses 1 to 12.

[0093] Clause 14. A non-transitory computer-readable storage medium storing instructions that cause a processor to perform the method of any one of clauses 1 to 12.

[0094] Clause 15. A non-transitory computer-readable recording medium storing a video bitstream generated by a method performed by a video processing device, the method comprising the step of generating the bitstream based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate the bit depth of the profile.

[0095] Clause 16. A method for storing a video bitstream, the method comprising the steps of generating the bitstream based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile, and storing the bitstream on a non-transitory computer-readable recording medium.

[0096] Exemplary Devices 5 shows a block diagram of a computing device 500 capable of implementing various embodiments of the present disclosure. Computing device 500 may be embodied as or included in source device 110 (or video encoder 114 or 200) or destination device 120 (or video decoder 124 or 300).

[0097] It will be understood that the computing device 500 shown in FIG. 5 is for illustrative purposes only and is not intended to limit in any way the functionality and scope of the embodiments of the present disclosure.

[0098] 5, the computing device 500 includes a general-purpose computing device 500. The computing device 500 may include at least one or more processors or processing units 510, a memory 520, a storage unit 530, one or more communication units 540, one or more input devices 550, and one or more output devices 560.

[0099] In some embodiments, computing device 500 may be embodied as any user terminal or server terminal having computing capabilities. The server terminal may be a server provided by a service provider, a large-scale computing device, or the like. The user terminal may be any type of mobile, fixed, or portable terminal, including, for example, a mobile phone, a station, a unit, a device, a multimedia computer, a multimedia tablet, an Internet node, a communicator, a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a personal communication system (PCS) device, a personal navigation device, a personal digital assistant (PDA), an audio / video player, a digital camera / camcorder, a positioning device, a television receiver, a radio receiver, an electronic book device, a gaming device, or any combination thereof (including accessories and peripherals of these devices, or any combination thereof). It is contemplated that computing device 500 may support any type of interface to a user (e.g., "wearable" circuitry, etc.).

[0100] The processing unit 510 may be a physical or virtual processor and may implement various processes based on programs stored in the memory 520. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to increase the parallel processing capabilities of the computing device 500. The processing unit 510 may be referred to as a central processing unit (CPU), a microprocessor, a controller, or a microcontroller.

[0101] Computing device 500 typically includes a variety of computer storage media. Such media may be any media accessible by computing device 500, including, but not limited to, volatile and nonvolatile media, or removable and non-removable media. Memory 520 may be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or any combination thereof. Storage unit 530 may be any removable or non-removable media, including machine-readable media such as memory, a flash memory drive, a magnetic disk, or another medium, that can be used to store information and / or data and that can be accessed by computing device 500.

[0102] The computing device 500 may further include additional removable / non-removable, volatile / non-volatile memory media. Although not shown in FIG. 5, a magnetic disk drive that reads from and writes to a removable non-volatile magnetic disk and an optical disk drive that reads from and writes to a removable non-volatile optical disk may be provided. In such cases, each drive may be connected to a bus (not shown) via one or more data medium interfaces.

[0103] The communications unit 540 communicates with additional computing devices via a communications medium. Furthermore, the functionality of the components within the computing device 500 may be embodied by a single computing cluster or multiple computing machines that can communicate via communications connections. Thus, the computing device 500 may operate in a networked environment using logical connections with one or more other servers, networked personal computers (PCs), or additional general network nodes.

[0104] The input device(s) 550 may be one or more of a variety of input devices such as a mouse, a keyboard, a tracking ball, an audio input device, etc. The output device(s) 560 may be one or more of a variety of output devices such as a display, a loudspeaker, a printer, etc. The communication unit 540 may further enable the computing device 500 to communicate with one or more external devices (not shown), such as a storage device and a display device, one or more devices that allow a user to interact with the computing device 500, or any device (such as a network card, a modem, etc.) that allows the computing device 500 to communicate with one or more other computing devices, as needed. Such communication may be performed via an input / output (I / O) interface (not shown).

[0105] In some embodiments, instead of being integrated into a single device, some or all of the components of computing device 500 may be located in a cloud computing architecture. In a cloud computing architecture, components may be provided remotely and work together to perform the functions described in this disclosure. In some embodiments, cloud computing provides computing, software, data access, and storage services without requiring end users to be aware of the physical location or configuration of the systems or hardware providing these services. In various embodiments, cloud computing provides services over a wide area network (e.g., the Internet) using appropriate protocols. For example, a cloud computing provider may provide applications over a wide area network that can be accessed through a web browser or other computing component. Software or components of a cloud computing architecture and corresponding data may be stored on servers in remote locations. Computing resources in a cloud computing environment may be consolidated or distributed at remote data center locations. A cloud computing infrastructure may act as a single access point for users but provide services through a shared data center. Thus, a cloud computing architecture may be used to provide the components and functions described herein from a remote service provider. Alternatively, they may be provided from traditional servers or installed directly or otherwise on client devices.

[0106] The computing device 500 may be used to implement video encoding / decoding in embodiments of the present disclosure. The memory 520 may include one or more video encoding modules 525 having one or more program instructions. These modules are accessible and executable by the processing unit 510 to perform the functions of various embodiments described herein.

[0107] In an example embodiment that performs video encoding, input device 550 may receive video data to be encoded as input 570. The video data may be processed, for example, by video encoding module 525 to generate an encoded bitstream. The encoded bitstream may be provided as output 580 via output device 560.

[0108] In an example embodiment that performs video decoding, input device 550 may receive an encoded bitstream as input 570. The encoded bitstream may be processed, for example, by video encoding module 525 to generate decoded video data. The decoded video data may be provided as output 580 via output device 560.

[0109] While the present disclosure has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present application as defined by the appended claims. Such variations are intended to be within the scope of the present application. Accordingly, the foregoing description of the embodiments of the present application is not intended to be limiting.

Claims

1. 1. A video processing method comprising:

1. A method comprising: performing a conversion between target video blocks of a video and a bitstream of the video based on a general profile indicator of a profile defining capabilities for decoding the bitstream, wherein at least two bits of the general profile indicator are combined to indicate a bit depth of the profile, and conformance of the bitstream to the Main 16 4:4:4 profile is indicated by the general profile indicator being equal to 35.

2. The method of claim 1 , wherein the general profile indicator is represented as a syntax element general_profile_idc and has a predetermined number of bits.

3. 2. The method of claim 1, wherein conformance of the bitstream to the Main 16 4:4:4 Intra profile is indicated by the general profile indicator being equal to 43.

4. 2. The method of claim 1, wherein conformance of the bitstream to the Main 16 4:4:4 Still Image Profile is indicated by the general profile indicator being equal to 99.

5. The method of claim 1 , wherein the two least significant bits (LSBs) of the general profile indicator combine to indicate a maximum allowable bit depth for the profile.

6. 6. The method of claim 5, wherein the values of the two least significant bits of the general profile indicator are "00", indicating that the profile is an 8-bit profile.

7. 6. The method of claim 5, wherein the values of the two least significant bits of the general profile indicator are "01", indicating that the profile is a 10-bit profile.

8. 6. The method of claim 5, wherein the value of the two least significant bits of the general profile indicator is "10," indicating that the profile is a 12-bit profile.

9. 6. The method of claim 5, wherein the value of the two least significant bits of the general profile indicator is "11", indicating that the profile is a 16-bit profile.

10. The method of claim 1 , wherein the converting comprises encoding the target video block into the bitstream.

11. The method of claim 1 , wherein the converting comprises decoding the target video block from the bitstream.

12. 1. An apparatus for processing video data comprising a processor and a non-transitory memory with instructions, Apparatus, wherein the instructions, when executed by the processor, cause the processor to perform the method of any one of claims 1 to 11.

13. A non-transitory computer readable storage medium storing instructions that cause a processor to perform the method of any one of claims 1 to 11.

14. 1. A method for storing a video bitstream, comprising: generating said bitstream based on a general profile indicator of a profile defining capabilities for decoding said bitstream, wherein at least two bits of said general profile indicator are combined to indicate a bit depth of said profile, and conformance of said bitstream to the Main 16 4:4:4 profile is indicated by said general profile indicator being equal to 35; and storing the bitstream on a non-transitory computer-readable recording medium.

Images