Inrush current prevention circuit

Abstract

To reduce power applied to a current limiting element to the same as or lower than that in startup even in rapid power recovery after an instantaneous interruption or a deep instantaneous voltage drop of a power supply circuit.SOLUTION: A rush current prevention circuit 5 is provided with: a current limiting element FET disposed on a power supply line, and gradually increasing a control voltage at the time of startup and power recovery of a power supply circuit 1 to prevent a rush current to a primary side capacitor CL on the power supply circuit 1 side of a load circuit 2; an integration circuit capacitor C3 and an integration circuit resistor R1 connected in parallel with the power supply circuit 1 to gradually increase a control voltage of the current limiting element FET at the time of startup and power recovery of the power supply circuit 1; and a rapid discharging capacitor C8 connected in series with the integration circuit capacitor C3 and connected in parallel with the integration circuit resistor R1 to discharge together with a discharge of the integration circuit capacitor C3 along with a discharge of the primary side capacitor CL at the time of an instantaneous interruption or an instantaneous voltage drop of the power supply circuit 1.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present disclosure relates to an inrush current prevention circuit that prevents an inrush current from flowing to a primary-side capacitor on the power supply circuit side of a load circuit when the power supply circuit is started up or restored to power. [Background technology]

[0002] Patent Documents 1 and 2 disclose inrush current prevention circuits that prevent inrush current from flowing into a primary-side capacitor on the power supply circuit side of a load circuit when the power supply circuit is started up.

[0003] First, the inrush current prevention circuit of the first prior art (Patent Document 1) will be described. FIG. 1 shows the circuit configuration of the inrush current prevention circuit of the first prior art. FIG. 2 shows example circuit characteristics of the inrush current prevention circuit of the first prior art. The inrush current prevention circuit 3 includes an integrator circuit resistor R1, a power supply voltage dividing resistor R2, an integrator circuit capacitor C3, a feedback circuit resistor R4, a feedback circuit capacitor C5, an oscillation prevention resistor R6, and a current limiting element FET. The load circuit 2 includes a primary-side capacitor CL. In FIG. 2, the input voltage Vin from the power supply circuit 1 is DC 48 V, the equivalent resistance RL of the load circuit 2 is 48 Ω, the current IL of the equivalent resistance RL of the load circuit 2 is 1 A, the primary-side capacitor CL is 100 μF, the gate ON / OFF threshold voltage Vth of the current limiting element FET is 2 V, and the gate upper limit voltage VGSmax of the current limiting element FET is 12 V.

[0004] The current limiter FET gradually increases its gate voltage during startup of the power supply circuit 1, preventing inrush current from flowing into the primary-side capacitor CL. The integrator capacitor C3, integrator resistor R1, and power supply voltage divider resistor R2 gradually increase the gate voltage of the current limiter FET during startup. The integrator resistor R1 and power supply voltage divider resistor R2 set the upper limit of the gate voltage of the current limiter FET lower than the input voltage from the power supply circuit 1. In the left column of Figure 2, the voltage across the power supply voltage divider resistor R2 reaches the gate ON / OFF threshold voltage Vth of the current limiter FET (Vth = 2V) 2 ms after startup of the power supply circuit 1 and reaches a stable state 200 ms after startup of the power supply circuit 1. During startup of the power supply circuit 1, the power consumption of the current limiter FET is 26 W 10 ms after startup of the power supply circuit 1, and the accumulated heat of the current limiter FET is 340 mJ 20 ms after startup of the power supply circuit 1. When the power supply circuit 1 is started up, these characteristics of the current limiting element FET are equivalent to 6 W in terms of the allowable loss of the current limiting element FET.

[0005] Next, an inrush current prevention circuit according to a second prior art (Patent Document 2) will be described. FIG. 3 shows the circuit configuration of the inrush current prevention circuit according to the second prior art. FIG. 4 shows exemplary circuit characteristics of the inrush current prevention circuit according to the second prior art. The inrush current prevention circuit 4 includes an integrating circuit resistor R1, a clamping element D1, a power supply voltage dividing resistor R2, a switching element D2, an integrating circuit capacitor C3, a rapid discharge resistor R9, a current limiting element FET, and a transistor TR. The load circuit 2 includes a primary-side capacitor CL. In FIG. 4, the input voltage Vin from the power supply circuit 1 is DC 48 V, the equivalent resistance RL of the load circuit 2 is 48 Ω, the current IL through the equivalent resistance RL of the load circuit 2 is 1 A, the primary-side capacitor CL is 100 μF, the gate ON / OFF threshold voltage Vth of the current limiting element FET is 2 V, and the gate upper limit voltage VGSmax of the current limiting element FET is 12 V.

[0006] The current limiting element FET has a gate voltage that gradually increases during startup of the power supply circuit 1, preventing inrush current to the primary-side capacitor CL. The integrator capacitor C3, integrator resistor R1, and power supply voltage divider resistor R2 gradually increase the gate voltage of the current limiting element FET during startup of the power supply circuit 1. The switch element D2 provides conduction between the integrator capacitor C3 and the integrator resistor R1. The integrator resistor R1 and power supply voltage divider resistor R2 set the upper limit of the gate voltage of the current limiting element FET to a value lower than the input voltage from the power supply circuit 1. In the left column of Figure 4, the voltage across the power supply voltage divider resistor R2 reaches the gate ON / OFF threshold voltage Vth of the current limiting element FET (Vth = 2V) 2 ms after startup of the power supply circuit 1, and reaches a stable state 200 ms after startup of the power supply circuit 1. When the power supply circuit 1 starts up, the power consumption of the current limiting element FET is 26 W 10 ms after the power supply circuit 1 starts up, and the amount of heat accumulated in the current limiting element FET is 340 mJ 20 ms after the power supply circuit 1 starts up. When the power supply circuit 1 starts up, these characteristics of the current limiting element FET are converted into an allowable loss of the current limiting element FET, which is equivalent to 6 W. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-045957 [Patent Document 2] Japanese Patent Application Publication No. 05-336737 Summary of the Invention [Problem to be solved by the invention]

[0008] First, we will explain the problem solved by the first prior art (Patent Document 1). During a momentary interruption or voltage drop in the power supply circuit 1, the integrator circuit capacitor C3, integrator circuit resistor R1, and power supply voltage divider resistor R2 gradually decrease the gate voltage of the current limiting element FET as the primary-side capacitor CL discharges. The time constant of the CR discharge circuit, comprised of the integrator circuit capacitor C3, integrator circuit resistor R1, and power supply voltage divider resistor R2, is several tens of times larger than the time constant of the discharge circuit for the primary-side capacitor CL. Furthermore, the voltage drop across the integrator circuit capacitor C3 is only R2 / (R1+R2) times the voltage drop across the primary-side capacitor CL. Therefore, in the first row of the middle column of Figure 2, the gate voltage of the current limiting element FET remains at 11 V even 10 ms after a momentary interruption or deep voltage drop in the power supply circuit 1, and does not decrease to the gate ON / OFF threshold voltage Vth = 2 V. In the second row of the middle column of FIG. 2, the voltage across the primary side capacitor CL remains at only 5V as a residual voltage 10 ms after the power supply circuit 1 is momentarily interrupted and after a deep voltage drop.

[0009] Here, the power supply circuit 1 may transition from a momentary interruption or deep voltage sag to a power recovery state before the gate voltage of the current limiting element FET drops to the gate ON / OFF threshold voltage Vth = 2V. In this case, in the first stage of the right column of Figure 2, the drain current of the current limiting element FET (which remains in the barely ON state) reaches a re-inrush current of 160A immediately after power is restored to the power supply circuit 1. In the second stage of the right column of Figure 2, the power consumption of the current limiting element FET reaches a maximum of 2.5kW within 20μs after power is restored to the power supply circuit 1. Furthermore, in the third stage of the right column of Figure 2, the accumulated heat of the current limiting element FET reaches 39mJ within 20μs after power is restored to the power supply circuit 1. Therefore, when power is rapidly restored to the power supply circuit 1, these characteristics of the current limiting element FET are converted into an allowable power dissipation of 24W, which is four times the allowable power dissipation of the current limiting element FET when the power supply circuit 1 is started. This requires a large-sized type of current limiting element FET.

[0010] Next, the problem solved by the second prior art (Patent Document 2) will be explained. During a momentary interruption or drop in the power supply circuit 1, the integrator capacitor C3 and the rapid discharge resistor R9 gradually decrease the gate voltage of the current limiting element FET as the primary-side capacitor CL discharges. When the voltage across the integrator capacitor C3 becomes higher than the voltage across the power supply voltage divider resistor R2, the switch element D2 turns on the transistor TR, thereby establishing conduction between the integrator capacitor C3 and the rapid discharge resistor R9. The time constant of the CR discharge circuit formed by the integrator capacitor C3 and the rapid discharge resistor R9 is approximately equal to the time constant of the discharge circuit for the primary-side capacitor CL. The voltage drop across the integrator capacitor C3 is only R2 / (R1+R2) times the voltage drop across the primary-side capacitor CL. Therefore, in the first stage of the middle column of Figure 4, the gate voltage of the current limiting element FET drops to the gate ON / OFF threshold voltage Vth = 2V 8ms after the momentary interruption and deep momentary sag of the power supply circuit 1. Then, in the second stage of the middle column of Figure 4, the voltage across the primary-side capacitor CL remains as a residual voltage of only 8V 8ms after the momentary interruption and deep momentary sag of the power supply circuit 1.

[0011] Here, the power supply circuit 1 may transition from a momentary interruption or deep voltage sag to a power recovery state before the gate voltage of the current limiter FET drops to the gate ON / OFF threshold voltage Vth = 2V. In this case, in the first stage of the right column of Figure 4, the drain current of the current limiter FET (which remains in the barely ON state) reaches 130A as a re-inrush current immediately after power is restored to the power supply circuit 1. In the second stage of the right column of Figure 4, the power consumption of the current limiter FET reaches a maximum of 1.8kW within 20μs after power is restored to the power supply circuit 1. Furthermore, in the third stage of the right column of Figure 4, the accumulated heat of the current limiter FET reaches 27mJ within 20μs after power is restored to the power supply circuit 1. Therefore, when power is rapidly restored to the power supply circuit 1, these characteristics of the current limiter FET are converted into an allowable power dissipation of 18W, which is three times the allowable power dissipation of the current limiter FET when the power supply circuit 1 is started. This requires a large-sized type of current limiting element FET.

[0012] Therefore, in order to solve the above problem, the present disclosure aims to reduce the power applied to the current limiting element to the same level as at startup, even when power is rapidly restored after a momentary power outage or a deep momentary drop in the power supply circuit, while maintaining the inrush current prevention function at startup of the power supply circuit at the same level as in the prior art. [Means for solving the problem]

[0013] To solve the above problem, the integrating circuit capacitor and the rapid discharge capacitor are connected in series with each other and in parallel with the primary-side capacitor. Then, during a momentary power interruption or voltage drop in the power circuit, the integrating circuit capacitor and the rapid discharge capacitor discharge in conjunction with the discharge of the primary-side capacitor. Here, the discharge circuit consisting of the integrating circuit capacitor and the rapid discharge capacitor is not a CR discharge circuit, and discharges integrally with the discharge of the primary-side capacitor without a CR time constant.

[0014] Specifically, the present disclosure provides an inrush current prevention circuit that prevents inrush current from flowing to a primary-side capacitor on the power supply circuit side of a load circuit when the power supply circuit is started up and when power is restored, the inrush current prevention circuit comprising: a current limiting element that is arranged on a power supply line, and whose control voltage gradually increases when the power supply circuit is started up and when power is restored, thereby preventing inrush current from flowing to the primary-side capacitor; an integrating circuit capacitor and an integrating circuit resistor that are connected in parallel with the power supply circuit, and that gradually increase the control voltage of the current limiting element when the power supply circuit is started up and when power is restored; and a rapid discharge capacitor that is connected in series with the integrating circuit capacitor and in parallel with the integrating circuit resistor, and that discharges in conjunction with the discharge of the primary-side capacitor when the power supply circuit is momentarily interrupted or dips.

[0015] With this configuration, when the power supply circuit experiences a momentary interruption or a deep momentary sag, the control voltage of the current limiting element can be rapidly reduced to below the control ON / OFF threshold voltage Vth, and the inrush current prevention circuit can be stopped at a point when the residual voltage of the primary-side capacitor is higher. Therefore, even when the power supply circuit subsequently recovers rapidly, the power applied to the current limiting element can be reduced to the same level as at startup or lower.

[0016] The present disclosure also provides an inrush current prevention circuit, characterized in that, during a momentary interruption or deep momentary drop in the power supply circuit, the amount of voltage drop in the integrating circuit capacitor becomes larger than the amount of voltage drop in the rapid discharge capacitor, and the capacitance of the integrating circuit capacitor is set smaller than the capacitance of the rapid discharge capacitor so that the control voltage of the current limiting element accelerates the timing at which the current limiting element switches from an on state to an off state.

[0017] With this configuration, when the power supply circuit experiences an instantaneous interruption or deep sag, the control voltage of the current limiting element can be rapidly reduced to below the control ON / OFF threshold voltage Vth in a short time, and the inrush current prevention circuit can be stopped at a point when the residual voltage of the primary-side capacitor is higher. Even if the power supply circuit is restored just before the inrush current prevention circuit is stopped, the maximum value of the re-inrush current to the current limiting element can be kept low.

[0018] The present disclosure also provides an inrush current prevention circuit characterized by further comprising a switch element connected between the integrating circuit capacitor and the rapid discharge capacitor, which disconnects the control terminal of the current limiting element and the integrating circuit capacitor and the rapid discharge capacitor when the power supply circuit is started up and when power is restored, and which connects the integrating circuit capacitor and the rapid discharge capacitor when the power supply circuit is momentarily interrupted or drops.

[0019] According to this configuration, by separating the integrating circuit capacitor and the rapid discharge capacitor when the power supply circuit is started up and when power is restored, it is possible to prevent inrush current into the series circuit of these capacitors, and at the same time, since the control voltage of the current limiting element is not rapidly increased, the inrush current prevention function of the current limiting element can be maintained.

[0020] The present disclosure also provides an inrush current prevention circuit further comprising a power supply voltage dividing resistor connected in series with the rapid discharge capacitor without passing through the switch element and connected in parallel with the integrating circuit capacitor via the switch element, and a bleeder resistor connected in parallel with the rapid discharge capacitor without passing through the switch element and connected in parallel with the integrating circuit resistor via the switch element, wherein the rapid discharge capacitor, the power supply voltage dividing resistor, and the bleeder resistor form a CR charging circuit for the rapid discharge capacitor when the power supply circuit is started up and when power is restored.

[0021] This configuration allows the rapid discharge capacitor to be charged when the power supply circuit is started up or restored, and prepares for discharging the rapid discharge capacitor in the event of a momentary power interruption or voltage drop in the power supply circuit. Furthermore, the CR charging circuit for the rapid discharge capacitor and the CR charging circuit for the integrating circuit capacitor can be designed independently when the switch element is in the off state.

[0022] The present disclosure also provides an inrush current prevention circuit characterized in that, when the power supply circuit is started up or restored to power, CR charging of the rapid discharge capacitor is completed and the terminal voltage of the integrator circuit capacitor becomes equal to the input voltage from the power supply circuit * the power supply voltage dividing resistance / (the power supply voltage dividing resistance + the bleeder resistance), the switch element establishes conduction between the integrator circuit capacitor and the rapid discharge capacitor.

[0023] According to this configuration, when the power supply circuit is started up and when power is restored, the upper limit of the control voltage of the current limiting element can be set lower than the input voltage from the power supply circuit.

[0024] The present disclosure also provides an inrush current prevention circuit, characterized in that, when the power supply circuit is started up and when power is restored, the time constant of a CR charging circuit consisting of the rapid discharge capacitor, the power supply voltage dividing resistor, and the bleeder resistor is set to be smaller than the time constant of a CR charging circuit consisting of the integrating circuit capacitor and the integrating circuit resistor.

[0025] According to this configuration, when the power supply circuit is started up or when power is restored, the control voltage of the current limiting element can be prevented from becoming higher than the set upper limit voltage. [Effects of the Invention]

[0026] In this way, the present disclosure can reduce the power applied to the current limiting element to the same level as at startup, even when power is rapidly restored after a momentary power outage or a deep momentary drop in the power supply circuit, while maintaining the inrush current prevention function at startup equivalent to that of the prior art. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a diagram showing a circuit configuration of a first prior art inrush current prevention circuit. [Figure 2] FIG. 10 is a diagram showing an example of circuit characteristics of an inrush current prevention circuit according to a first prior art technique. [Figure 3] FIG. 10 is a diagram showing the circuit configuration of a second prior art inrush current prevention circuit. [Figure 4] FIG. 10 is a diagram showing an example of circuit characteristics of an inrush current prevention circuit according to a second prior art technique. [Figure 5] FIG. 1 is a diagram illustrating a circuit configuration of an inrush current prevention circuit according to the present disclosure. [Figure 6] 1A and 1B are diagrams illustrating the inrush current prevention circuit of the present disclosure at startup and power recovery. [Figure 7] 1A and 1B are diagrams illustrating the inrush current prevention circuit of the present disclosure during an instantaneous interruption and a deep instantaneous sag. [Figure 8] 10A and 10B are diagrams illustrating an example of circuit characteristics of an inrush current prevention circuit according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0028]

[0023] The following embodiments of the present disclosure will be described with reference to the accompanying drawings. The embodiments described below are examples of implementation of the present disclosure, and the present disclosure is not limited to the following embodiments.

[0029] (Circuit configuration of the inrush current prevention circuit disclosed herein) First, the circuit configuration of the inrush current prevention circuit of the present disclosure will be described. The circuit configuration of the inrush current prevention circuit of the present disclosure is shown in Fig. 5. The inrush current prevention circuit 5 includes an integrating circuit resistor R1, a power supply voltage dividing resistor R2, an integrating circuit capacitor C3, a feedback circuit resistor R4, a feedback circuit capacitor C5, an oscillation prevention resistor R6, a bleeder resistor R7, a rapid discharge capacitor C8, a current limiting element FET, and a switch element D. The load circuit 2 includes a primary-side capacitor CL.

[0030] The inrush current prevention circuit 5 prevents an inrush current from flowing to the primary-side capacitor CL on the power supply circuit 1 side of the load circuit 2 when the power supply circuit 1 is started up or when power is restored. That is, the current limiting element FET is disposed in the power supply line, and when the power supply circuit 1 is started up or when power is restored, the control voltage is gradually increased to prevent an inrush current from flowing to the primary-side capacitor CL. The integrating circuit capacitor C3 and integrating circuit resistor R1 are connected in parallel with the power supply circuit 1, and when the power supply circuit 1 is started up or when power is restored, the control voltage of the current limiting element FET is gradually increased.

[0031] In this embodiment, the current limiting element FET is a MOSFET, but as a modification, it may be a bipolar transistor or the like. In this embodiment, the current limiting element FET is arranged in the power supply line from -IN to -OUT, but as a modification, the current limiting element FET may be arranged in the power supply line from +IN to +OUT. If the power supply circuit 1 outputs AC instead of DC, a rectifying element (not shown in FIG. 5) may be inserted in the stage preceding the input terminals (+IN terminal and -IN terminal) of the inrush current prevention circuit 5.

[0032] The feedback circuit resistor R4 and the feedback circuit capacitor C5 stabilize the charging current of the primary side capacitor CL when the power supply circuit 1 starts up and when power is restored. The oscillation prevention resistor R6 prevents the current limiting element FET from oscillating when the power supply circuit 1 starts up and when power is restored.

[0033] The quick discharge capacitor C8 is connected in series with the integrating circuit capacitor C3 and in parallel with the integrating circuit resistor R1, and discharges together with the integrating circuit capacitor C3 when the primary side capacitor CL discharges during a momentary power interruption or momentary voltage drop in the power supply circuit 1.

[0034] Here, the discharge circuit composed of the integrating circuit capacitor C3 and the rapid discharge capacitor C8 is not a CR discharge circuit further comprising an integrating circuit resistor R1, a power supply voltage dividing resistor R2, and a bleeder resistor R7, and can perform discharge integrally with the discharge of the primary side capacitor CL without involving a CR time constant.

[0035] Therefore, when the power supply circuit 1 experiences an instantaneous interruption or deep instantaneous sag, the gate voltage of the current limiting element FET can be rapidly reduced to below the ON / OFF threshold voltage Vth, and the inrush current prevention circuit 5 can be stopped at a point when the residual voltage of the primary-side capacitor CL is higher. Even when the power supply circuit 1 subsequently rapidly recovers, the power applied to the current limiting element FET can be reduced to the same level as at startup or lower.

[0036] During a momentary interruption or deep momentary drop in the power supply circuit 1, the amount of voltage drop across the integrating circuit capacitor C3 becomes larger than the amount of voltage drop across the rapid discharge capacitor C8, and the capacitance of the integrating circuit capacitor C3 is set smaller than the capacitance of the rapid discharge capacitor C8 so that the gate voltage of the current limiting element FET accelerates the timing at which the current limiting element FET switches from the ON state to the OFF state.

[0037] If the capacitance of the integrating circuit capacitor C3 is set to be larger than the capacitance of the rapid discharge capacitor C8, then during a momentary interruption or deep momentary drop in the power supply circuit 1, the amount of voltage drop across the integrating circuit capacitor C3 will be smaller than the amount of voltage drop across the rapid discharge capacitor C8, and the time it takes for the gate voltage of the current limiting element FET to switch the current limiting element FET from the ON state to the OFF state will be longer.

[0038] On the other hand, in the present disclosure, when the power supply circuit 1 experiences an instantaneous interruption or deep instantaneous sag, the gate voltage of the current limiting element FET can be rapidly reduced to below the ON / OFF threshold voltage Vth in a short time, and the inrush current prevention circuit 5 can be stopped at a point when the residual voltage of the primary-side capacitor CL is higher. Even if the power supply circuit 1 is restored just before the inrush current prevention circuit 5 is stopped, the maximum value of the re-inrush current to the current limiting element FET can be kept low.

[0039] The switch element D is connected between the integrator circuit capacitor C3 and the rapid discharge capacitor C8, and when the power supply circuit 1 is started up or restored, it cuts off the connection between the gate terminal of the current limiting element FET and the integrator circuit capacitor C3 and the rapid discharge capacitor C8, and when the power supply circuit 1 experiences an instantaneous interruption or instantaneous drop, it connects the integrator circuit capacitor C3 and the rapid discharge capacitor C8.

[0040] If the switch element D conducts between the gate terminal of the current limiting element FET and the integrating circuit capacitor C3 and rapid discharge capacitor C8 when the power supply circuit 1 is started up or restored to power, it will not be possible to prevent inrush currents in the integrating circuit capacitor C3 and rapid discharge capacitor C8, and at the same time, the gate voltage of the current limiting element FET will rise rapidly, making it impossible to maintain the inrush current prevention function of the current limiting element FET.

[0041] On the other hand, in the present disclosure, by separating the integrator circuit capacitor C3 and the rapid discharge capacitor C8 when the power supply circuit 1 is started up or restored to power, it is possible to prevent an inrush current from flowing into the series circuit of these capacitors, and at the same time, the gate voltage of the current limiting element FET is not rapidly increased, thereby maintaining the inrush current prevention function of the current limiting element FET. As described above, during an instantaneous interruption or deep voltage sag in the power supply circuit 1, the gate voltage of the current limiting element FET can be rapidly reduced to below the ON / OFF threshold voltage Vth, and the inrush current prevention circuit 5 can be stopped at a point when the residual voltage of the primary-side capacitor CL is higher.

[0042] The power supply voltage dividing resistor R2 is connected in series with the rapid discharge capacitor C8 without passing through the switch element D, and is connected in parallel with the integrating circuit capacitor C3 via the switch element D. The bleeder resistor R7 is connected in parallel with the rapid discharge capacitor C8 without passing through the switch element D, and is connected in parallel with the integrating circuit resistor R1 via the switch element D.

[0043] Here, when the power supply circuit 1 is started up or restored to power, the rapid discharge capacitor C8, the power supply voltage dividing resistor R2, and the bleeder resistor R7 form a CR charging circuit for the rapid discharge capacitor C8. On the other hand, when the power supply circuit 1 is started up or restored to power, the integrating circuit capacitor C3 and the integrating circuit resistor R1 form a CR charging circuit for the integrating circuit capacitor C3. Then, when the power supply circuit 1 is started up or restored to power, the CR charging circuit for the rapid discharge capacitor C8 and the CR charging circuit for the integrating circuit capacitor C3 can operate independently with the switch element D in the cutoff state.

[0044] Therefore, the rapid discharge capacitor C8 can be charged when the power supply circuit 1 is started up or restored, and the rapid discharge capacitor C8 can be prepared for discharge in the event of an instantaneous power interruption or voltage drop in the power supply circuit 1. Furthermore, the CR charging circuit for the rapid discharge capacitor C8 and the CR charging circuit for the integrating circuit capacitor C3 can be designed independently when the switch element D is in the cut-off state.

[0045] When the power supply circuit 1 is started up or restored to power, CR charging of the rapid discharge capacitor C8 is completed and the voltage across the integrator circuit capacitor C3 becomes equal to the input voltage Vin from the power supply circuit 1 * power supply voltage dividing resistor R2 / (power supply voltage dividing resistor R2 + bleeder resistor R7), and the switch element D then establishes conduction between the integrator circuit capacitor C3 and the rapid discharge capacitor C8. Then, when the bleeder resistor R7 and the integrator circuit resistor R1 are connected in parallel after the switch element D becomes conductive, the voltage across the integrator circuit capacitor C3 eventually rises to and stabilizes at the input voltage Vin from the power supply circuit 1 * power supply voltage dividing resistor R2 / (power supply voltage dividing resistor R2 + bleeder resistor R7 / / integrator circuit resistor R1) (where " / / " indicates a parallel connection).

[0046] Therefore, when the power supply circuit 1 is started up and when power is restored, the upper limit of the gate voltage of the current limiting element FET (=input voltage Vin from the power supply circuit 1 * power supply voltage dividing resistor R2 / (power supply voltage dividing resistor R2 + bleeder resistor R7 / / integration circuit resistor R1)) can be set lower than the input voltage from the power supply circuit 1.

[0047] When the power supply circuit 1 is started up or restored to power, the time constant of the CR charging circuit consisting of the rapid discharge capacitor C8, the power supply voltage dividing resistor R2, and the bleeder resistor R7 is set to be smaller than the time constant of the CR charging circuit consisting of the integrating circuit capacitor C3 and the integrating circuit resistor R1.

[0048] Therefore, when the power supply circuit 1 is started up or restored to power, the gate voltage of the current limiting element FET can be prevented from becoming higher than the set upper limit voltage (= input voltage Vin from the power supply circuit 1 * power supply voltage dividing resistor R2 / (power supply voltage dividing resistor R2 + bleeder resistor R7 / / integrator circuit resistor R1)).

[0049] (When the inrush current prevention circuit of the present disclosure is started up and when power is restored) Taking into account the circuit configuration of the inrush current prevention circuit of the present disclosure, Fig. 6 shows the start-up and power restoration from a stopped state of the inrush current prevention circuit of the present disclosure. The upper part of Fig. 6 shows the initial start-up and power restoration from a stopped state of the inrush current prevention circuit 5. The lower part of Fig. 6 shows the final start-up and power restoration from a stopped state of the inrush current prevention circuit 5.

[0050] First, we will explain the initial startup and power recovery periods from a stopped state of the inrush current prevention circuit 5. The voltage VR2 across the power supply voltage dividing resistor R2 is equal to the input voltage Vin from the power supply circuit 1, and the voltage VGS across the integrator circuit capacitor C3 (= the gate voltage of the current limiting element FET) is 0 or below the ON / OFF threshold voltage Vth. The current limiting element FET is set to the OFF state, and the switch element D cuts off communication between the integrator circuit capacitor C3 and the rapid discharge capacitor C8. The voltage across the primary-side capacitor CL is 0 or a residual voltage Vres.

[0051] The CR charging circuit, which is composed of primary-side capacitor CL and load circuit 2, charges primary-side capacitor CL with a time constant CL*Rin, where Rin is the sum of the internal resistance of power supply circuit 1 and Ron of current limiting element FET. The CR charging circuit, which is composed of quick-discharge capacitor C8, power supply voltage dividing resistor R2, and bleeder resistor R7, charges quick-discharge capacitor C8 with a time constant C8*(R2 / / R7). The CR charging circuit, which is composed of integrator circuit capacitor C3 and integrator circuit resistor R1, charges integrator circuit capacitor C3 with a time constant C3*R1.

[0052] Next, we will explain the final stages of startup and power recovery from a state in which the inrush current prevention circuit 5 is stopped. First, the voltage VR2 across the power supply voltage divider resistor R2 becomes equal to the input voltage Vin from the power supply circuit 1 * power supply voltage divider resistor R2 / (power supply voltage divider resistor R2 + bleeder resistor R7). After that, the voltage VGS across the integrator circuit capacitor C3 (= the gate voltage of the current limiting element FET) becomes equal to the voltage VR2 across the power supply voltage divider resistor R2. The current limiting element FET is switched to the ON state, and the switch element D conducts electricity between the integrator circuit capacitor C3 and the rapid discharge capacitor C8. The voltage across the primary-side capacitor CL becomes equal to the input voltage Vin from the power supply circuit 1.

[0053] (Inrush current prevention circuit of the present disclosure during momentary interruption and deep momentary sag) Taking into account the circuit configuration of the inrush current prevention circuit of the present disclosure, Fig. 7 shows the time of an instantaneous interruption and a deep instantaneous sag when the inrush current prevention circuit of the present disclosure is in a steady state. The upper part of Fig. 7 shows the beginning of an instantaneous interruption and an early part of a deep instantaneous sag when the inrush current prevention circuit 5 is in a steady state. The lower part of Fig. 7 shows the end of an instantaneous interruption and an end of a deep instantaneous sag when the inrush current prevention circuit 5 is in a steady state.

[0054] First, we will explain the initial stage of a momentary interruption and the initial stage of a deep momentary sag when the inrush current prevention circuit 5 is in a steady state. The voltage VR2 across the power supply voltage divider resistor R2 remains equal to the steady-state input voltage Vin from the power supply circuit 1 * power supply voltage divider resistor R2 / (power supply voltage divider resistor R2 + bleeder resistor R7 / / integrator circuit resistor R1), and the voltage VGS across the integrator circuit capacitor C3 (= gate voltage of the current limiting element FET) remains equal to the steady-state voltage VR2 across the power supply voltage divider resistor R2. The current limiting element FET remains ON, and the switch element D conducts current between the integrator circuit capacitor C3 and the rapid discharge capacitor C8. The voltage across the primary-side capacitor CL is equal to the steady-state input voltage Vin from the power supply circuit 1.

[0055] The CR discharge circuit composed of the primary capacitor CL and the equivalent resistance RL of the load circuit 2 discharges the primary capacitor CL with a time constant CL*RL. The discharge circuit composed of the integration circuit capacitor C3 and the rapid discharge capacitor C8 discharges the integration circuit capacitor C3 and the rapid discharge capacitor C8 in integration with the discharge of the primary capacitor CL without a CR time constant as the primary capacitor CL discharges. The voltage drop of the integration circuit capacitor C3 (= C8 / (C3 + C8) times the voltage drop of the primary capacitor CL, where C8 > C3) is larger than the voltage drop of the rapid discharge capacitor C8 (= C3 / (C3 + C8) times the voltage drop of the primary capacitor CL, where C3 < C8).

[0056] Next, the end period of the momentary interruption and the end period of the deep momentary voltage dip from the state where the inrush current prevention circuit 5 is steady will be described. First, the voltage VGS between the terminals of the integration circuit capacitor C3 (= the gate voltage of the current limiting element FET) becomes equal to the ON / OFF threshold voltage Vth of the current limiting element FET, and the voltage VR2 between the terminals of the power supply voltage dividing resistor R2 becomes equal to the voltage VGS between the terminals of the integration circuit capacitor C3. The current limiting element FET is switched to the OFF state, and the switch element D conducts between the integration circuit capacitor C3 and the rapid discharge capacitor C8. The voltage between the terminals of the primary capacitor CL remains a residual voltage Vres of sufficient magnitude. Thereafter, the CR discharge circuit composed of the integration circuit capacitor C3 and the power supply voltage dividing resistor R2 additionally discharges the integration circuit capacitor C3 with a time constant C3*R2, and the CR discharge circuit composed of the rapid discharge capacitor C8 and the bleeder resistor R7 additionally discharges the rapid discharge capacitor C8 with a time constant C8*R7.

[0057] (Circuit characteristic example of the inrush current prevention circuit of the present disclosure) Based on the circuit configuration of the inrush current prevention circuit of the present disclosure, an example of the circuit characteristics of the inrush current prevention circuit of the present disclosure is shown in FIG. 8. In FIG. 8, the input voltage Vin from the power supply circuit 1 is 48 V DC, the equivalent resistance RL of the load circuit 2 is 48 Ω, the current IL of the equivalent resistance RL of the load circuit 2 is 1 A, the primary side capacitor CL is 100 μF, the gate ON / OFF threshold voltage Vth of the current limiting element FET is 2 V, and the gate upper limit voltage VGSmax of the current limiting element FET is 12 V. The circuit constants of the inrush current prevention circuit 5 are set as follows.

[0058] The integration circuit resistor Rl needs to conduct a current sufficiently larger than the gate leakage current Igss of the current limiting element FET when the power supply circuit 1 is stable: (Vin - VGS) / Rl >> Igss. The power supply voltage dividing resistor R2 needs to conduct a current sufficiently larger than the current flowing through the integration circuit resistor Rl when the power supply circuit 1 is stable: VGS / R2 >> (Vin - VGS) / Rl. The integration circuit capacitor C3 needs to be set to the startup delay period of the current limiting element FET, taking T3 as the longer period of the chattering period at startup of the power supply circuit 1 and the stabilization period of the input voltage Vin from the power supply circuit 1: C3 * Rl * Vth / Vin = T3.

[0059] After setting the integration circuit resistor Rl, the power supply voltage dividing resistor R2, and the integration circuit capacitor C3, as described in the circuit configuration of the inrush current prevention circuit of the present disclosure, it is necessary to set the circuit constants of the inrush current prevention circuit 5 so as to satisfy C3 < C8, Vin * R2 / (R2 + R7 / / Rl) = VGS, Vth < VGS < VGSmax, and C8 * (R2 / / R7) < C3 * Rl.

[0060] In the left column of Figure 8, the voltage across the power supply voltage divider resistor R2 is equal to the 48V input voltage from the power supply circuit 1 immediately after the power supply circuit 1 starts up, and reaches a stable state 100 ms after the power supply circuit 1 starts up. The gate voltage of the current limiter FET reaches the ON / OFF threshold voltage Vth of the current limiter FET = 2V 2 ms after the power supply circuit 1 starts up, and reaches a stable state 100 ms after the power supply circuit 1 starts up. When the power supply circuit 1 starts up, the power consumption of the current limiter FET is 26 W 10 ms after the power supply circuit 1 starts up, and the accumulated heat of the current limiter FET is 340 mJ 20 ms after the power supply circuit 1 starts up. When the power supply circuit 1 starts up, these characteristics of the current limiter FET are equivalent to an allowable loss of 6 W.

[0061] In the first stage of the middle column of Figure 8, the gate voltage of the current limiting element FET drops to the ON / OFF threshold voltage Vth = 2V 2ms after the power supply circuit 1 experiences a momentary interruption or deep momentary sag. In the second stage of the middle column of Figure 8, the terminal voltage of the primary-side capacitor CL remains at a sufficiently high residual voltage of 32V 2ms after the power supply circuit 1 experiences a momentary interruption or deep momentary sag. Assume that the power supply circuit 1 returns to its power-recovery state with the current limiting element FET in the barely ON state.

[0062] In the first row in the right column of Figure 8, the drain current of the current limiter FET is limited to 30A as a re-inrush current immediately after power is restored to the power supply circuit 1. In the second row in the right column of Figure 8, the power consumption of the current limiter FET is limited to 0.3kW at maximum within 20μs after power is restored to the power supply circuit 1. In the third row in the right column of Figure 8, the accumulated heat of the current limiter FET is limited to 4.3mJ within 20μs after power is restored to the power supply circuit 1. Therefore, when power is rapidly restored to the power supply circuit 1, these characteristics of the current limiter FET are converted into an allowable loss of 3W, which is smaller than the allowable loss of the current limiter FET when the power supply circuit 1 is started up. This allows for a compact current limiter FET that only considers the allowable loss of the current limiter FET when the power supply circuit 1 is started up. [Industrial Applicability]

[0063] The inrush current prevention circuit of the present disclosure can, when supplying AC power or DC power to the internal circuit of a device that is operated by connecting to an AC power source or a DC power source (the use of the device is not limited to a specific use), make it possible to make the power applied to the current limiting element during a momentary interruption or deep momentary sag equal to or less than the power applied to the current limiting element at startup. [Explanation of symbols]

[0064] 1:Power circuit 2: Load circuit 3, 4, 5: Inrush current prevention circuit R1: Integral circuit resistance D1: Clamp element R2: Power supply voltage divider resistor D2: Switch element C3: Integrator circuit capacitor R4: Feedback circuit resistor C5: Feedback circuit capacitor R6: Oscillation prevention resistor R7: Bleeder resistor C8: Quick discharge capacitor R9: Rapid discharge resistor FET: Current limiting element TR: Transistor D: Switch element CL: Primary side capacitor

Claims

1. An inrush current prevention circuit that prevents an inrush current from flowing into a primary-side capacitor on a power supply circuit side of a load circuit when the power supply circuit is started up or restored to power, a current limiting element disposed on a power supply line, the control voltage of which gradually increases when the power supply circuit is started up and when power is restored, thereby preventing an inrush current from flowing into the primary-side capacitor; an integrating circuit capacitor and an integrating circuit resistor connected in parallel with the power supply circuit, which gradually increase the control voltage of the current limiting element when the power supply circuit is started up and when power is restored; a rapid discharge capacitor connected in series with the integrating circuit capacitor and in parallel with the integrating circuit resistor, which discharges together with the integrating circuit capacitor in response to the discharge of the primary side capacitor when the power supply circuit is momentarily interrupted or drops, In an inrush current prevention circuit, the capacitance of the integrating circuit capacitor is set smaller than the capacitance of the rapid discharge capacitor so that, during an instantaneous interruption or deep instantaneous drop of the power supply circuit, the voltage drop of the integrating circuit capacitor becomes larger than the voltage drop of the rapid discharge capacitor, and the control voltage of the current limiting element accelerates the timing at which the current limiting element switches from an on state to an off state.

2. a switch element connected between the integrating circuit capacitor and the rapid discharge capacitor, which disconnects the control terminal of the current limiting element and the integrating circuit capacitor from the rapid discharge capacitor when the power supply circuit is started up or restored to power, and which connects the integrating circuit capacitor to the rapid discharge capacitor when the power supply circuit is momentarily interrupted or dips 2. The inrush current prevention circuit according to claim 1, wherein:

3. a power supply voltage dividing resistor connected in series with the rapid discharge capacitor without passing through the switch element and connected in parallel with the integrating circuit capacitor via the switch element; a bleeder resistor connected in parallel to the rapid discharge capacitor without the switch element and connected in parallel to the integrating circuit resistor via the switch element; When the power supply circuit is started up and when power is restored, the rapid discharge capacitor, the power supply voltage dividing resistor, and the bleeder resistor form a CR charging circuit for the rapid discharge capacitor.

3. The inrush current prevention circuit according to claim 2.

4. When the power supply circuit is started up or restored to power, CR charging of the rapid discharge capacitor is completed and the voltage across the integrating circuit capacitor becomes equal to the input voltage from the power supply circuit * the power supply voltage dividing resistance / (the power supply voltage dividing resistance + the bleeder resistance), and the switch element conducts electricity between the integrating circuit capacitor and the rapid discharge capacitor.

4. The inrush current prevention circuit according to claim 3.

5. When the power supply circuit is started up and when power is restored, the time constant of the CR charging circuit composed of the rapid discharge capacitor, the power supply voltage dividing resistor, and the bleeder resistor is set to be smaller than the time constant of the CR charging circuit composed of the integrating circuit capacitor and the integrating circuit resistor.

5. The inrush current prevention circuit according to claim 3 or 4.

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