Power supply superimposed communication device and power supply superimposed communication system

Abstract

To provide a power supply superimposed communication device capable of suppressing an increase in mode conversion loss due to variations in electrical characteristics.SOLUTION: A power supply superimposed communication device 1-1 includes differential wiring 5-1 with signal wiring 6-1 and 7-1 connected to differential signal wiring 8, a power supply element 30-1 for supplying first applied voltage and second applied voltage to the signal wiring 6-1 and 7-1, a high frequency cut filter 11-1 connected to the wiring 6-1, a high frequency cut filter 11-12 connected to the wiring 7-1, and coils 12-1 and 12-2. The coil 12-1 is connected to the cut filter 11-1, the coil 12-2 is connected to the cut filter 11-2, and the coils 12-1 and 12-2 are reversely wound and have an inductor 10-1 that is magnetically coupling, and a power supply is superimposed on the differential signal wiring 8. An inductance value L1 of the cut filter 11-1 and an inductance value of L3 of the coil 12-1 are L1<1.5×L3, and an inductance values L2 of the cut filter 11-2 and an inductance value L4 of the coil 12-2 are L2<1.5×L4.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power supply superimposed communication device and a power supply superimposed communication system. [Background technology]

[0002] In recent years, the speed of signal transmission between devices installed in vehicles using twisted pair cables has been increasing. For example, in-vehicle Ethernet is being standardized from 100BASE-T1, which was the main standard up until now and transmitted at 100Mbps, to 1000BASE-T1, which enables transmission at Gbps or higher, and from multi-gigabit to 25G BASE-T1.

[0003] Additionally, MIPI A-Phy, a communication standard for sensors, primarily cameras, is also working on standardizing a method for transmitting high-speed signals exceeding Gbps over twisted pair cables.

[0004] Furthermore, these standards are also promoting the standardization of power over data line (PoDL) technology, which transmits power by superimposing it on a cable for signal transmission, in order to reduce the weight of harnesses.

[0005] The challenge of increasing the speed of in-vehicle cable transmission is maintaining EMC performance as frequencies increase. Because the current spectrum used for signal transmission extends to a large level beyond the GHz band, it is necessary to suppress radiation in this high-frequency band.

[0006] At the same time, since the communication LSI has the sensitivity to send and receive signals up to the GHz band, it is also necessary to suppress the leakage of GHz-band noise.

[0007] The challenge of increasing the speed of in-vehicle cable transmission is maintaining EMC performance as frequencies increase. Because the current spectrum used for signal transmission extends to a large level beyond the GHz band, it is necessary to suppress radiation in this high-frequency band. At the same time, because the communication LSI has the sensitivity to send and receive signals up to the GHz band, it is also necessary to suppress the leakage of GHz-band noise.

[0008] In the differential signal transmission that is the subject of this invention, ideally the positive (P) side transmission line and the negative (N) side transmission line that make up the differential transmission path are symmetrical, so that when currents of opposite phases flow, the magnetic fields that are generated when currents flow in each wiring can be canceled out, and radiation can be suppressed.

[0009] Furthermore, when common mode noise is superimposed on both signal lines, it can be canceled by the differential receiver, improving resistance to external noise.

[0010] However, in the P and N signal wiring that make up the differential transmission line, variations in electrical characteristics caused by various factors can disrupt the differential balance, making it impossible to enjoy the benefits of differential transmission and resulting in a deterioration in EMC performance. The degree of variation in this differential line is defined as mode conversion loss, and is used as a criterion for judging EMC performance, especially in the high-frequency range above 10 MHz.

[0011] This represents the amount of differential mode that is converted to common mode in differential wiring, or the amount of common mode that is converted to differential mode.If this is large, it can lead to an increase in radiated noise due to the generation of unintended common mode components, or a deterioration in noise resistance due to the conversion of common mode components to differential components.

[0012] A known prior art document related to the present invention is Patent Document 1. Patent Document 1 discloses a system in which electronic devices are connected by twisted pair cables and a differential signal and a power supply are superimposed on the twisted pair cables for transmission.

[0013] In this system, a DC blocking capacitor is placed on the signal line, and filter elements such as a common mode choke coil and inductor are inserted as PoDL filters on the power supply line.

[0014] This separates the signal and power supply according to the frequency range of the filter element. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] U.S. Patent No. 10,594,519 Summary of the Invention [Problem to be solved by the invention]

[0016] The technology of Patent Document 1 reduces the leakage of common mode noise from the circuit on the wiring board to the twisted pair cable by placing a filter element between the communication circuit and the twisted pair cable, and also suppresses the propagation of common mode noise picked up by the twisted pair cable to the circuit on the wiring board.

[0017] However, when power supply superposition occurs in the PoDL filter components that make up the transmission system, an imbalance in the electrical characteristics between P and N occurs, which increases the mode conversion loss in the transmission path and deteriorates EMC performance.In particular, at low frequencies, variations in the inductor components of the PoDL filter components occur due to differences in the magnitude of the bias voltage, which contributes to an increase in mode conversion loss.

[0018] Patent Document 1 does not take into consideration the increase in mode conversion loss.

[0019] The mode conversion loss is expressed by the Scd term of the mixed mode S-parameter.

[0020] An object of the present invention is to provide a power supply superimposed communication device and a power supply superimposed communication system that can suppress an increase in mode conversion loss due to variations in electrical characteristics. [Means for solving the problem]

[0021] In order to achieve the above object, the present invention is configured as follows.

[0022] The power supply superimposed communication device includes a first differential wiring having a first signal wiring and a second signal wiring connected to a differential signal wiring, a first power supply element that supplies a first applied voltage and a second applied voltage to the first signal wiring and the second signal wiring, respectively, a first high frequency cut filter having one end connected to the first signal wiring, a second high frequency cut filter having one end connected to the second signal wiring, a first coil, and a second coil, one end of the first coil being connected to the other end of the first high frequency cut filter, and one end of the second coil being connected to a front end of the first high frequency cut filter. a first inductor connected to the other end of the second high-frequency cut filter, the first coil and the second coil being magnetically coupled with each other through opposite windings, and a power superimposed communication device in which power is superimposed on the differential signal wiring, wherein an inductance value L1 of the first high-frequency cut filter and an inductance value L3 of the first coil of the first inductor have a relationship of L1<1.5×L3, and an inductance value L2 of the second high-frequency cut filter and an inductance value L4 of the second coil of the first inductor have a relationship of L2<1.5×L4. [Effects of the Invention]

[0023] According to the present invention, it is possible to realize a power supply superimposed communication device and a power supply superimposed communication system that can suppress an increase in mode conversion loss due to variations in electrical characteristics.

[0024] Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiments of the invention. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a diagram illustrating a configuration of a power supply superimposed communication system according to a first embodiment of the present invention. [Figure 2] FIG. 10 is a diagram showing a first example of a circuit configuration of a PoDL filter different from that of the present invention. [Figure 3] FIG. 10 is a diagram showing a second example of a circuit configuration of a PoDL filter different from that of the present invention. [Figure 4] 1 is a diagram illustrating a configuration of a power supply superimposed communication device according to a first embodiment of the present invention. [Figure 5] FIG. 1 is a diagram showing an equivalent circuit of a four-terminal inductor component. [Figure 6A] FIG. 10 is a diagram illustrating the effect of the present invention. [Figure 6B] FIG. 10 is a diagram illustrating the effect of the present invention. [Figure 7] FIG. 1 is a diagram illustrating a problem to be solved by the present invention. [Figure 8] FIG. 10 is a diagram for explaining the basis of the numerical values ​​used in the present invention. [Figure 9] FIG. 10 is a diagram for explaining the basis of the numerical values ​​used in the present invention. [Figure 10] FIG. 10 is a diagram illustrating a circuit configuration according to a second embodiment of the present invention. [Figure 11] FIG. 10 is a diagram showing a layout pattern according to a third embodiment of the present invention. [Figure 12] FIG. 10 is a diagram showing a circuit configuration according to a fourth embodiment of the present invention. [Figure 13] FIG. 10 is a diagram showing a circuit configuration according to a fifth embodiment of the present invention. [Figure 14] FIG. 10 is a diagram illustrating a configuration of a power source superimposed communication system according to a sixth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0027] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0028] When there are multiple components with the same or similar functions, they may be described using the same reference numeral with different subscripts. However, when there is no need to distinguish between these multiple components, the subscripts may be omitted. [Example]

[0029] Example 1 FIG. 1 is a diagram showing the configuration of a redundant-power-source communication system having a redundant-power-source communication device 1-1 (first redundant-power-source communication device) and a redundant-power-source communication device 1-2 (second redundant-power-source communication device) according to a first embodiment of the present invention.

[0030] 1, a power supply superimposed communication device 1-1, which is an electronic device, is connected to a twisted pair cable (differential signal wiring) 8 via a cable connector 16-1, and is connected to another external electronic device, a power supply superimposed communication device 1-2, for signal transmission. At the same time, the power supply superimposed communication device 1-1 supplies power to the power supply superimposed communication device 1-2 by superimposing a power supply current in addition to a signal onto the twisted pair cable 8.

[0031] In the power supply superimposed communication device 1-1, a communication LSI 2-1 for communication is connected to a cable connector 16-1 by differential wiring 5-1 laid out on a printed circuit board. The differential wiring 5-1 is configured as a pair of a P-side signal wiring 6-1 (first signal wiring) and an N-side signal wiring 7-1 (second signal wiring).

[0032] Between the communication LSI 2-1 and the cable connector 16-1, there are arranged AC coupling capacitors 14P-1 and 14N-1 for cutting DC potential, a common-mode choke coil (CMCC) 15-1 for reducing common-mode noise flowing into the communication LSI, and electrostatic protection elements 17P-1 and 17N-1 for preventing electrostatic breakdown. Also arranged are a power supply element (power supply IC) 30-1 (first power supply element) for superimposing power on the signal wiring, a power supply superimposing filter (PoDL filter) 10-1 (four-terminal differential mode inductor (first inductor)) for connecting the power line and the signal line, a first high-frequency cut filter 11-1 (two-terminal differential mode inductor (second inductor)), and a second high-frequency cut filter 11-2 (two-terminal differential mode inductor (second inductor)). The power supply element 30-1 receives a voltage Vbat from an external power supply (not shown).

[0033] The power supply element 30-1 is configured to supply a first applied voltage Vout,P and a second applied voltage Vout,N to the first signal wiring 6-1 and the second signal wiring 7-1, respectively.

[0034] The four-terminal differential mode inductor 10-1 has two coils wound in opposite directions and magnetically coupled to each other.

[0035] That is, one end of the coil (first coil) on one side of four-terminal differential mode inductor 10-1 is connected to the other end of two-terminal differential mode inductor 11-1, which is a first high-frequency cut filter, and one end of the coil (second coil) on the other side of four-terminal differential mode inductor 10-1 is connected to the other end of two-terminal differential mode inductor 11-2, which is a second high-frequency cut filter. The coil on one side and the coil on the other side of four-terminal differential mode inductor 10-1 are magnetically coupled by being wound in opposite directions.

[0036] The coil on one side of the four-terminal differential mode inductor 10-1 can be defined as a first inductor, and the coil on the other side of the four-terminal differential mode inductor 10-1 can be defined as a second inductor.

[0037] The configuration of the PoDL filter will be explained in detail later.

[0038] The communication LSI 2-1 is connected to the information processing LSI 9-1, and the information processing LSI 9-1 exchanges data with the communication LSI 2-1 to perform various processes. The power supply superimposed communication device 1-2 has the same circuit configuration as the power supply superimposed communication device 1-1.

[0039] That is, the power supply superimposed communication device 1-2 is arranged with a cable connector 16-2, a P-side signal wiring 6-2 (third signal wiring), an N-side signal wiring 7-2 (fourth signal wiring), electrostatic protection elements 17N-2 and 17P-2, a differential mode inductor 10-2 (four-terminal inductor (second inductor)), 11-3 (two-terminal inductor (third high-frequency cut filter)), and 11-4 (two-terminal inductor (fourth high-frequency cut filter)), and a common mode choke coil 15-2.

[0040] The power supply superimposed communication device 1-2 also includes AC coupling capacitors 14P-2 and 14N-2, a communication LSI 2-2, an information processing LSI 9-2, and a power supply element 30-2 (second power supply element). The power supply element 30-2 receives a first applied voltage Vout,P and a second applied voltage Vout,N via a signal wiring 6-2 (third signal wiring) and a signal wiring 7-2 (fourth signal wiring), respectively, and converts them into operating voltages.

[0041] However, unlike the power supply element 30-1 of the power supply superimposed communication device 1-1, the power supply element 30-2 of the power supply superimposed communication device 1-2 is not supplied with voltage from an external power supply. The power supply element 30-2 of the power supply superimposed communication device 1-2 is supplied with voltage superimposed on the signal wiring and supplied from the power supply superimposed communication device 1-1.

[0042] Note that this configuration is a general circuit configuration, and components other than those described here (e.g., common mode termination components, filter components, power supply superimposition filter components, etc.) may be added, and some of the components described here may not be included as components.

[0043] Mode conversion loss is a representative value of the EMC performance of power supply superimposed communication devices 1-1 and 1-2. By checking whether the Scd11 value measured using a network analyzer from cable connectors 16-1 and 16-2 is smaller than the target value, the pass / fail of the EMC performance can be determined. An example of such power supply superimposed communication devices 1-1 and 1-2 is an automatic driving electronic control unit (AD-ECU) for automobiles.

[0044] The feature of the components of the present invention is the circuit configuration of the PoDL filter, which aims to keep this mode conversion loss low. The issues and differences in effects of filter components different from those of the present invention will be explained using Figures 2 to 6B.

[0045] 2 shows a first example (Comparative Example 1) of a circuit configuration of a PoDL filter different from the present invention. In this example, a differential mode inductor 10-1, which is a four-terminal inductor component, is used as the PoDL filter.

[0046] Differential mode inductor 10-1 has two coils wound in opposite directions, arranged close to each other in parallel, which strongly couples them magnetically, thereby increasing the differential impedance around the self-resonant frequency of the component and preventing the inflow of high-frequency differential current. This prevents the high-frequency differential signal passing through P-side signal wiring 6-1, which is the differential transmission path, from leaking to power supply element 30-1.

[0047] A simplified equivalent circuit of four-terminal differential mode inductor 10-1 is shown in FIG. 5 (four-terminal differential mode inductor 10-2 has a similar equivalent circuit).

[0048] In FIG. 5, a four-terminal differential mode inductor 10-1 has a first coil 12-1 and a second coil 12-2, one end of the first coil 12-1 is connected to the other end of a first high-frequency cut filter 11-1, one end of the second coil 12-2 is connected to the other end of a second high-frequency cut filter 11-2, and the first coil 12-1 and the second coil 12-2 are magnetically coupled to each other with their windings reversed.

[0049] Two coils 12-1 (first coil) and 12-2 (second coil) facing in opposite directions have the same inductance value. Furthermore, these coils 12-1 and 12-2 must be strongly coupled to each other, and because they are placed close to each other in the same component, parasitic capacitances 13-1 and 13-2 exist between the coils.

[0050] The problems with electrical characteristics in such a circuit configuration will be explained using Figures 6A and 6B. Figure 6A shows the insertion loss. In Comparative Example 1, which is different from the present invention and was explained in Figure 2, the insertion loss deteriorated above several hundred MHz, and there was a problem in achieving signal transmission performance of several Gbps.

[0051] Next, Fig. 3 shows a second example (comparison example 2) of a circuit configuration of a PoDL filter that differs from the present invention. In this example, two-terminal inductor components 11-1 and 11-2 are used as a PoDL filter. This increases the differential impedance around the self-resonant frequency of the two-terminal inductor components 11-1 and 11-2, thereby preventing the inflow of high-frequency current.

[0052] This prevents the high-frequency P-side signal and N-side signal passing through differential wiring 5-1 (first differential differential wiring) from leaking to power supply element 30-1. Problems with the electrical characteristics of such a circuit configuration will be described with reference to Figures 6A and 6B.

[0053] Fig. 6A shows the characteristics of mode conversion noise. In comparative example 2 described in Fig. 3, it can be seen that mode conversion noise increases significantly below 100 MHz. This is because, when voltage is applied via power supply element 30-1, a high voltage (e.g., 12 V) relative to ground is applied to two-terminal inductor component 11-1 connected to the P-side wiring, while the same potential as ground (0 V) is applied to two-terminal inductor component 11-2 connected to the N-side. As a result, the inductance of only P-side two-terminal inductor component 11-1 decreases due to the application of voltage, disrupting the balance between the inductance values ​​of P and N, and this difference causes mode conversion loss.

[0054] In Figure 6A, the Ethernet 1000BASE-T1 standard values ​​are shown for reference, but it can be seen that the specifications are exceeded below a few tens of MHz. On the other hand, in terms of insertion loss, because independent two-terminal components are mounted on the P and N wiring, there is almost no adverse effect on loss in the differential transmission line, as shown in Figure 6A.

[0055] The problem of low-frequency mode conversion noise, which is an issue in the circuit configuration shown in Figure 3, hardly appears in the circuit configuration shown in Figure 2. This is because with a four-terminal inductor, the effective inductance is expressed as the sum of the inductance and the mutual inductance, which has the effect of canceling out the influence of one of the inductors.

[0056] To summarize, in Comparative Example 1, mode conversion noise can be kept low, but there is a problem with insertion loss, making it difficult to support Gbps-class high frequencies. On the other hand, in Comparative Example 2, there is no problem with insertion loss, but there is a problem with mode conversion noise increasing when a bias is applied, making it difficult to achieve EMC performance.

[0057] Therefore, in the present invention, as shown in the configuration in Figure 4, two-terminal differential mode inductors 11-1 and 11-2 are connected to P-side signal wiring 6-1 and N-side signal wiring 7-1, respectively, and four-terminal differential mode inductor 10-1 is connected to the other end, which is then connected to power supply element 30-1.

[0058] In this configuration, two-terminal differential mode inductors 11-1 and 11-2 connected to the signal wiring serve to cut high-frequency components, effectively improving high-speed signal transmission performance. Meanwhile, the effect of changes in the inductance balance of two-terminal differential mode inductors 11-1 and 11-2 due to the application of a voltage bias is mitigated by connecting four-terminal differential mode inductor 10-1, which is less susceptible to the bias voltage, in series to relatively reduce the influence of two-terminal differential mode inductors 11-1 and 11-2, thereby suppressing mode conversion noise.

[0059] FIG. 4 shows the power supply superimposed communication device 1-1, but the power supply superimposed communication device 1-2 is also configured in the same way as the power supply superimposed communication device 1-1, with two-terminal differential mode inductors 11-1 and 11-2 connected to the P-side signal wiring 6-1 and the N-side signal wiring 7-1, respectively, and a four-terminal differential mode inductor 10-1 connected to the other end, which is then connected to the power supply element 30-1.

[0060] Fig. 6A shows the insertion loss when the circuit configuration of Example 1 is adopted, and Fig. 6B shows the mode conversion noise characteristics of Example 1. As shown in Fig. 6A and Fig. 6B, both high-speed transmission properties and EMC performance have been achieved.

[0061] FIG. 7 shows the frequency characteristics of mode conversion noise when the circuit configuration of FIG. 4 according to the first embodiment of the present invention is adopted.

[0062] As shown in Fig. 7, there are two frequency regions where the mode conversion noise has a maximum value, each of which is surrounded by a dotted line.

[0063] The first is region 1 present on the low frequency side, which is a component that increases mode conversion noise by disrupting the balance of the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 when a voltage is applied.

[0064] The second is region 2, which exists on the high frequency side, and is a component resulting from impedance imbalance caused by the shift between the P side and N side of the impedance peak due to LC antiresonance generated by the inductance components of two-terminal differential mode inductors 11-1 and 11-2 and the capacitance component of four-terminal differential mode inductor 10-1.

[0065] 7, even in the circuit configuration according to Example 1, mode conversion noise may become large in region 1. This is because, when the ratio between the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 constituting the PoDL filter and the inductance value of four-terminal differential mode inductor 10-1 is insufficient, the change in inductance of two-terminal differential mode inductors 11-1 and 11-2 appears relatively large, and the benefit of the stability of the inductance value of four-terminal differential mode inductor 10-1 cannot be obtained.

[0066] Here we will discuss this more quantitatively. If we consider the standard values ​​of the 1000BASE-T1 automotive Ethernet standard as the standard, we have analytically confirmed that if the difference in inductance value between P and N is less than 5%, it will serve as a guideline for the amount of mode conversion noise to have a margin relative to the standard. However, this 5% criterion changes depending on the inductance value, so it is only a reference value.

[0067] In other words, the electrical characteristic values ​​of the components should be selected so that the change in the inductance value of P-side two-terminal differential mode inductors 11-1 and 11-2 due to bias is less than 5% of the total inductance value, including the inductance value of four-terminal differential mode inductor 10-1.

[0068] What is important to achieve this is the ratio between the inductance value (L1) of the two-terminal differential mode inductor 11-1, the inductance value (L2) of the two-terminal differential mode inductor 11-2, the inductance value (L3) of the first coil 12-1 of the four-terminal differential mode inductor 10-1, and the inductance value (L4) of the second coil 12-2 of the four-terminal differential mode inductor 10-1.

[0069] Since the four-terminal differential mode inductor 10-1 also has mutual inductance, it is difficult to mathematically determine the exact numerical value, so a design space map that can ensure a margin for the standard value of mode conversion noise by parametric analysis was obtained by simulation.

[0070] Experiments have shown that the amount of variation due to the bias voltage of two-terminal differential mode inductors 11-1 and 11-2 is approximately 8% to 10% when 10 V is applied. For example, the 1000BASE-T1 standard is discussing the application of bias voltages from 12 V to 48 V, so on the premise that an 8% variation occurs in L1 when 10 V is applied, a design space map was created as shown in Figure 8 to determine how the margin for mode conversion noise changes depending on the combination of values ​​for L1 (L2) and L3 (L4).

[0071] As a result, it was confirmed that in order to ensure a margin in region 1 shown in Figure 7, the inductance values ​​L1 and L2 of two-terminal differential mode inductors 11-1 and 11-2 must be less than 1.5 times the inductance values ​​L3 and L4 of four-terminal differential mode inductor 10-1 (differential mode inductor: DMI), and that this margin can be ensured for various L values.

[0072] That is, the conditions for achieving the effect of the present invention are satisfied when the expressions L1<1.5×L3 and L2<1.5×L4 are satisfied. This is the area beyond the arrow a from the inclined dashed line shown in FIG.

[0073] From the above considerations, the inductance value L1 of two-terminal differential mode inductor 11-1, which is the first high-frequency cut filter, and the inductance value L3 of one side of four-terminal differential mode inductor 10-1 (first inductor (first coil 12-1)) satisfy the relationship L1<1.5×L3, and the inductance value L2 of two-terminal differential mode inductor 11-2, which is the second high-frequency cut filter, and the inductance value L4 of the other side of 10-1 (second inductor (second coil 12-2)) satisfy the relationship L2<1.5×L4.

[0074] As described above, in the first embodiment of the present invention, the power supply superimposed communication devices 1-1 and 1-2 are configured such that two-terminal differential mode inductors 11-1 and 11-2 are connected to the P-side signal wiring 6-1 and the N-side signal wiring 7-1, respectively, and further to the four-terminal differential mode inductor 10-1, which is then connected to the power supply element 30-1.

[0075] Therefore, it is possible to realize a power supply superimposed communication device and a power supply superimposed communication system that can suppress an increase in mode conversion loss due to variations in electrical characteristics, and that can achieve Gbps-class signal transmission performance while improving EMC performance.

[0076] Example 2 Next, a second embodiment of the present invention will be described.

[0077] The overall configuration of the second embodiment is similar to that of the first embodiment, so the illustration of the overall configuration will be omitted and only the differences from the first embodiment will be described.

[0078] Constraint values ​​for component parameters according to the second embodiment of the present invention will be described with reference to Figure 8. As explained above, it is preferable that the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 be relatively small relative to the inductance value of four-terminal differential mode inductor 10-1. However, if the values ​​themselves are small, adverse side effects will occur.

[0079] That is, the characteristics of region 2 shown in Figure 7. As mentioned above, this characteristic is caused by the resonance of the parasitic components of two-terminal differential mode inductors 11-1 and 1-2 and four-terminal differential mode inductor 10-1. The higher the Q value of this resonance, the sharper the impedance peak characteristic difference becomes, resulting in significant mode conversion noise.

[0080] In other words, it is important to keep the Q value of this resonance below a certain level. In order to keep the Q value of the parallel LC resonance down, it is necessary to increase the L value. Assuming resonance with a parasitic capacitance of sub-pF to approximately 1 pF that generally parasitizes four-terminal differential mode inductor 10-1, we obtained the analysis space as shown in Figure 8, and found that there is a margin with respect to the standard value when the inductance value of L1 is greater than 2.1 μH.

[0081] That is, in the circuit configuration shown in Fig. 4, in addition to the numerical limitations of Example 1, Example 2 of the present invention is to set the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 to 2.1 μH or more. As shown in Fig. 8, the region in the direction indicated by arrow a from the dashed line (L1<1.5×L3) and the region in the direction indicated by arrow b from the dot-dash line (L1≧2.1 μH) are set.

[0082] The inductance values ​​of the two-terminal differential mode inductors 11-3 and 11-4 of the power supply superimposed communication device 1-2 are also set to 2.1 μH or more.

[0083] According to the second embodiment, in addition to being able to obtain the same effects as those of the first embodiment, it is also possible to obtain the effect of further suppressing mode conversion noise.

[0084] Example 3 Next, a third embodiment of the present invention will be described.

[0085] The overall configuration of the third embodiment is similar to that of the first embodiment, so the illustration of the overall configuration will be omitted and only the differences from the first embodiment will be described.

[0086] Third Embodiment A circuit configuration and component parameter constraint values ​​according to a third embodiment of the present invention will be described with reference to FIGS.

[0087] 7 is generated by the resonance of the parasitic components of two-terminal differential mode inductors 11-1 and 11-2 and four-terminal differential mode inductors 11-1 and 11-2, and the maximum value depends on the Q value of the resonance. It is important to keep the Q value of this resonance below a certain level.

[0088] We have explained above the conditions for suppressing the Q value by increasing the L value above a certain level (Line 2 in Figure 9). Another way to suppress the Q value is to insert a resistor in parallel with the LC parallel resonant circuit.

[0089] Specifically, as shown in Figure 10, resistive components 3-1 and 3-2 are connected in parallel to two two-terminal differential mode inductors 11-1 and 11-2, respectively. In this case, the resistance values ​​of these resistive components 3-1 and 3-2 are between 500 Ω and 1.5 kΩ. The lower limit of 500 Ω is 10 times the characteristic impedance of the signal wiring, 50 Ω, and is the minimum value required to suppress leakage from the signal wiring.

[0090] The upper limit of 1.5 kΩ is the limit at which the resistance must be reduced to a certain value or less in order to lower the Q value.

[0091] Figure 9 shows the boundary between Examples 1 and 2, as well as the change in the boundary conditions of two-terminal differential mode inductors 11-1 and 11-2 when parallel resistors 3-1 and 3-2 are inserted. Inserting resistors in parallel lowers the Q-factor due to the added resistance, lowering the constraint on the lower limit of the inductor. Specifically, the boundary conditions are lowered to 1.5 μH.

[0092] That is, when resistance components of 500Ω to 1.5 kΩ are connected in parallel, the inductance value of two-terminal differential mode inductors 11-1 and 11-2 should be 1.5 μH or more.

[0093] For reference, the analysis results of mode conversion noise near the boundary conditions are shown in Figure 9. It can be seen that when the boundary conditions determined here are deviated from, the standard values ​​are deviated slightly.

[0094] 10 shows the configuration of power supply superimposed communication device 1-1, but resistors can also be connected in parallel to two-terminal differential mode inductors 11-3 and 11-4 in power supply superimposed communication device 1-2. In this case, the inductance values ​​of two-terminal differential mode inductors 11-3 and 11-4 need only be 1.5 μH or more.

[0095] According to the third embodiment, in addition to being able to obtain the same effects as those of the first and second embodiments, there is also an effect that by inserting resistors in parallel with two-terminal differential mode inductors 11-1 and 11-2 and adding the effect of reducing the Q value due to the resistors, the constraint on the lower limit of two-terminal differential mode inductors 11-1 and 11-2 can be lowered.

[0096] Example 4 Next, a fourth embodiment of the present invention will be described.

[0097] The overall configuration of the fourth embodiment is similar to that of the first embodiment, so the illustration of the overall configuration will be omitted and only the differences from the first embodiment will be described.

[0098] Fig. 11 is a diagram showing a mounting pattern according to Example 1 of the present invention. As shown in Fig. 11, a P-side signal wiring 6-1 and an N-side signal wiring 7-1 that constitute a differential wiring 5-1 are formed on the surface (one side) of a printed circuit board 19 in a power source superimposed communication device 1-1. Two-terminal differential mode inductor components 11-1 and 11-2 are formed on both sides of the differential wiring 5-1, respectively, and connected to the differential wiring 5-1.

[0099] Two-terminal differential mode inductor components 11-1 and 11-2 are connected via through holes 18-1 and 18-2 to four-terminal differential mode inductor 10-1 mounted on the back surface (other side) of printed circuit board 19. Power is supplied to four-terminal differential mode inductor 10-1 through power supply lines G and V formed on the back surface of printed circuit board 19.

[0100] By using the configuration shown in Figure 11, the distance between the P-side wiring 6-1 and the N-side wiring 7-1 can be kept constant, and the differential impedance consisting of the two wirings, the P-side signal wiring 6-1 and the N-side signal wiring 7-1, can be kept uniform, which has the effect of maintaining good high-frequency electrical characteristics.

[0101] FIG. 11 shows an example of a power supply superimposed communication device 1-1, but a power supply superimposed communication device 1-2 also has a similar configuration.

[0102] Furthermore, if four-terminal differential mode inductor 10-1 is placed on the same layer (surface) as two-terminal differential mode inductors 11-1 and 11-2, P-side signal wiring 6-1 and N-side signal wiring 7-1 must be routed on the outside so as to make a large detour around four-terminal differential mode inductor 10-1.

[0103] In this case, the electromagnetic coupling between the P-side signal wiring 6-1 and the N-side signal wiring 7-1 changes, which can cause impedance mismatch. In addition, there is the disadvantage of a decrease in noise resistance due to the difference in the amount of noise mixed into the P-side signal wiring 6-1 and the N-side signal wiring 7-1.

[0104] Therefore, by taking measures such as arranging two-terminal differential mode inductors 11-1 and 11-2 and four-terminal differential mode inductor 10-1 separately on the front and back surfaces of the printed circuit board, it is possible to prevent deterioration of noise resistance.

[0105] The fourth embodiment can be configured as shown in FIG. 11, with the same configuration as any one of the first to third embodiments described above.

[0106] According to the fourth embodiment, in addition to obtaining the same effects as those of the first, second, and third embodiments, it is possible to obtain the effect of maintaining a uniform differential impedance between the P-side signal wiring 6-1 and the N-side signal wiring 7-1, thereby maintaining good high-frequency electrical characteristics.

[0107] Example 5 Next, a fifth embodiment of the present invention will be described.

[0108] The overall configuration of the fifth embodiment is similar to that of the first embodiment, so the illustration of the overall configuration will be omitted and only the differences from the first embodiment will be described.

[0109] Fig. 12 is a diagram showing a circuit configuration according to Example 5 of the present invention. The example shown in Fig. 12 is an example in which the two-terminal differential mode inductors 11-1 and 11-2 of the circuit configuration described in Example 1 are configured with a larger number of inductors.

[0110] In the example shown in FIG. 12, two two-terminal differential mode inductors 11-1 and 11-5 are connected in series to P-side signal wiring 6-1, and two two-terminal differential mode inductors 11-2 and 11-6 are connected in series to N-side signal wiring 7-1, with four-terminal differential mode inductor 10-1 placed beyond them.

[0111] The advantage of dividing the inductor into two parts, two-terminal differential mode inductors 11-1 and 11-5, and two-terminal differential mode inductors 11-2 and 11-6, is that wideband filter performance can be obtained by using a plurality of inductor components with different self-resonant frequencies.

[0112] For example, in Example 1, rather than using one component with a self-resonant frequency of 700 MHz, dividing it into two components with self-resonant frequencies of 1 GHz and 500 MHz will result in a filter with high impedance over a wider frequency range.

[0113] In the present invention, the inductance value condition can be considered by replacing the condition for the inductance value of the two-terminal overlap mode inductance components in Examples 1 to 3 with the total value of the two two-terminal overlap mode inductor components.

[0114] That is, L1 in the first embodiment and L1A+L1B in the fifth embodiment can be considered to be equivalent.

[0115] Although FIG. 12 shows an example of the power supply superimposition communication device 1-1, the power supply superimposition device 1-2 also has a similar configuration.

[0116] According to the fifth embodiment, in addition to being able to obtain the same effects as those of the first, second, third and fourth embodiments, there is also an effect that wideband filter performance can be obtained.

[0117] Example 6 Next, a sixth embodiment of the present invention will be described.

[0118] The overall configuration of the sixth embodiment is similar to that of the first embodiment, so the illustration of the overall configuration will be omitted and only the differences from the first embodiment will be described.

[0119] 13 is a diagram showing a circuit configuration according to Example 6 of the present invention. Example 6 is an example in which, when there are two pairs of differential wiring, power is supplied from a common power supply element.

[0120] 13, there are differential wiring 5-1 and differential wiring 5-2 (second differential wiring) (differential wiring 5-1 of power supply superimposed communication device 1-1 and differential wiring 5-2 of power supply superimposed communication device 1-2 shown in FIG. 1), and two-terminal differential mode inductors 11-1, 11-2 and 11-3, 11-4 are connected to them, respectively. Furthermore, one four-terminal differential mode inductor 10-1 is connected to two-terminal differential mode inductors 11-1, 11-2 and 11-3, 11-4, and the two-terminal differential mode inductors 11-1, 11-3, and 11-4, which are P-side components, are connected to the power supply side of four-terminal differential mode inductor 10-1, and the two-terminal differential mode inductors 11-2, 11-4, which are N-side components, are connected to the ground side of four-terminal differential mode inductor 10-1.

[0121] That is, four-terminal differential mode inductor 10-1 operates as four-terminal differential mode inductor 10-1 and also as four-terminal differential mode inductor 10-2.

[0122] With this configuration, four-terminal differential mode inductor 10-1, which is a large component, can be shared, reducing the number of components and the cost.

[0123] Even with this configuration, two-terminal differential mode inductors 11-1, 11-2, 11-3, and 11-4 are placed at the connection points of the high-frequency section, so high-frequency characteristics do not deteriorate, and further, the balance change in the inductance values ​​of two-terminal differential mode inductors 11-1, 11-2, 11-3, and 11-4 can be guaranteed by the ratio of their inductance values ​​to that of four-terminal differential mode inductor 10-1.

[0124] According to the sixth embodiment, in addition to being able to obtain the same effects as the first embodiment, it is also possible to reduce the number of components and reduce costs by sharing the four-terminal differential mode inductor 10-1, which is a large component.

[0125] Example 7 Next, a seventh embodiment of the present invention will be described.

[0126] The overall circuit configuration of the seventh embodiment is the same as that of the first embodiment, so illustration of the overall circuit configuration is omitted, and only the differences from the first embodiment will be described.

[0127] 14 is a diagram showing an application example according to a seventh embodiment of the present invention. The seventh embodiment shows an application example in a zone architecture that is expected to be used as a future in-vehicle architecture. In the zone architecture, a central ECU 41 of an automobile vehicle 40 is at the center, and Zone ECUs 42-1, 42-2, 42-3, 42-4, 42-5, 42-6, 42-7, 42-8, 42-9, 42-10, 42-11, 42-12, 42-13, 42-14, 42-15, 42-16, 42-17, 42-18, 42-19, 42-20, 42-21, 42-22, 42-23, 42-24, 42-25, 42-26, 42- The Zone ECU 42-2, the Zone ECU 42-3, and the Zone ECU 42-4 are connected to each other by cables 8-1, 8-2, 8-3, 8-4, and 8-5. The Zone ECU 42-2, Zone ECU 42-3, and Zone ECU 42-4 are further connected to ECUs 43-1, 43-2, 43-3, 43-4, and 43-5, each of which corresponds to a different Zone.

[0128] It is assumed that Zone ECU 42-1, Zone ECU 42-2, Zone ECU 42-3, and Zone ECU 42-4 have a redundant power supply line configuration between the Zone ECUs, and that power is superimposed using cables connecting the Zone ECUs.

[0129] Any of the power supply superimposed communication devices 1-1 and 1-2 according to the first to sixth embodiments described above can be applied to the Zone ECU 42-1, the Zone ECU 42-2, the Zone ECU 42-3, and the Zone ECU 42-4.

[0130] In this case, it is expected that a high voltage will be used to supply power to the Zone ECU, which consumes relatively large amounts of power. Therefore, it is essential to utilize the PoDL filter circuit configuration of the present invention to avoid degradation of EMC performance due to the application of a high bias, and it is believed that Example 7 is effective.

[0131] According to the seventh embodiment, it is possible to obtain an effect that a vehicle-mounted power source superimposed communication system having the effects of the first to sixth embodiments can be realized.

[0132] Although the present specification will be described with reference to an in-vehicle device, the invention can also be applied to other applications that use similar communication systems. For example, the invention can be similarly effective in communication between an industrial robot and an electronic camera.

[0133] The above-described embodiments and various modifications are merely examples, and the present invention is not limited to these details as long as the features of the invention are not impaired.

[0134] Furthermore, although various embodiments and modifications have been described above, the present invention is not limited to these.

[0135] Other embodiments conceivable within the scope of the technical idea of ​​the present invention are also included within the scope of the present invention. [Explanation of symbols]

[0136] 1-1, 1-2... Power supply superimposed communication device (electronic device), 2-1, 2-2... Communication LSI, 3-1, 3-2... Resistive components, 5-1, 5-2... Differential wiring, 6-1, 6-2... P-side signal wiring, 7-1, 7-2... N-side signal wiring, 8, 8-1, 8-2, 8-3, 8-4... Twisted pair cable (differential signal wiring), 9-1, 9-2... Information processing LSI, 10-1, 10-2... Four-terminal differential mode inductor, 11-1, 11-2, 11-3, 11-4, 11-5, 11-6... Two-terminal differential mode inductor, 12-1, 12-2... Coil inside differential mode inductor (first coil) coil, second coil), 13-1, 13-2... Parasitic capacitance between differential mode inductors, 14N-1, 14N-2, 14P-1, 14N-2... AC coupling capacitor, 15-1, 15-2... Common mode choke coil (CMCC), 16-1, 16-2... Cable connector, 17N-1, 17-2, 17P-1, 17P-2... Electrostatic protection element, 18-1, 18-2... Through hole, 19... Printed circuit board, 30-1, 30-2... Power supply element (power supply IC), 40... Automotive vehicle, 41... Central ECU, 42-1, 42-2, 42-3, 42-4... Zone ECU, 43-1, 43-2, 43-3, 43-4... ECU

Claims

1. a first differential wiring having a first signal wiring and a second signal wiring connected to the differential signal wiring; a first power supply element that supplies a first applied voltage and a second applied voltage to the first signal wiring and the second signal wiring, respectively; a first high frequency cut filter having one end connected to the first signal wiring; a second high frequency cut filter having one end connected to the second signal wiring; a first inductor having a first coil and a second coil, one end of the first coil connected to the other end of the first high-frequency cut filter, one end of the second coil connected to the other end of the second high-frequency cut filter, the first coil and the second coil being magnetically coupled with each other through reverse windings; A power supply superimposed communication device comprising: an inductance value L1 of the first high-frequency cut filter and an inductance value L3 of the first coil of the first inductor have a relationship of L1<1.5×L3, 10. A power supply superimposed communication device, wherein an inductance value L2 of the second high frequency cut filter and an inductance value L4 of the second coil of the first inductor satisfy the relationship L2<1.5×L4.

2. A power supply superimposed communication system, A power supply superimposed communication system comprising: a first power supply superimposed communication device comprising the power supply superimposed communication device according to claim 1; and a second power supply superimposed communication device; The second power supply superimposed communication device a second differential wiring having a third signal wiring and a fourth signal wiring connected to the differential signal wiring; a second power supply element that receives a first applied voltage and a second applied voltage via the third signal wiring and the fourth signal wiring, respectively, and converts the voltages into operating voltages; a third high frequency cut filter having one end connected to the third signal wiring; a fourth high frequency cut filter having one end connected to the fourth signal line; a second inductor having a third coil and a fourth coil, one end of the third coil being connected to the other end of the third high-frequency cut filter, one end of the second coil being connected to the other end of the fourth high-frequency cut filter, and the third coil and the fourth coil being magnetically coupled with each other through reverse windings; Equipped with an inductance value L5 of the third high-frequency cut filter and an inductance value L7 of the third coil of the second inductor have a relationship of L5<1.5×L7; an inductance value L6 of the fourth high-frequency cut filter and an inductance value L8 of the fourth coil of the second inductor have a relationship of L6<1.5×L8; The power supply superimposed communication system is characterized in that the first power supply superimposed communication device and the second power supply superimposed communication device are connected via the differential signal wiring.

3. 3. The power source superimposed communication system according to claim 2, a power supply superimposed communication system, characterized in that power is supplied from the first power supply superimposed communication device to the second power supply superimposed communication device via the differential signal wiring;

4. 4. The power source superimposed communication system according to claim 2, wherein: A power supply superimposed communication system, characterized in that the inductance value L1 of the first high-frequency cut filter, the inductance value L2 of the second high-frequency cut filter, the inductance value L5 of the third high-frequency cut filter, and the inductance value L6 of the fourth high-frequency cut filter are 2.1 μH or more.

5. 2. The power supply superimposed communication device according to claim 1, a first resistor arranged in parallel with the first high-frequency cut filter; a second resistor disposed in parallel with the second high-frequency cut filter, a resistance value r1 of the first resistor is 500Ω≦r1≦1500Ω; The resistance value r2 of the second resistor is 500Ω≦r2≦1500Ω, A power supply superimposed communication device, characterized in that the inductance value L1 of the first high frequency cut filter is 1.5 μH or more, and the inductance value L2 of the second high frequency cut filter is 1.5 μH or more.

6. 3. The power source superimposed communication system according to claim 2, a third resistor arranged in parallel with the third high-frequency cut filter; a fourth resistor disposed in parallel with the fourth high-frequency cut filter, The resistance value r3 of the third resistor is 500Ω≦r3≦1500Ω, The resistance value r4 of the fourth resistor is 500Ω≦r4≦1500Ω, A power supply superimposed communication system, wherein the inductance value L5 of the third high frequency cut filter is 1.5 μH or more, and the inductance value L6 of the fourth high frequency cut filter is 1.5 μH or more.

7. 2. The power supply superimposed communication device according to claim 1, the first high-frequency cut filter and the second high-frequency cut filter are two-terminal differential mode inductors, the first inductor is a four-terminal differential mode inductor; the first high-frequency cut filter and the second high-frequency cut filter are formed on one surface of a substrate on which the first signal wiring and the second signal wiring are formed, The power supply superimposed communication device is characterized in that the first inductor is formed on the other surface of the substrate.

8. 3. The power source superimposed communication system according to claim 2, the third high-frequency cut filter and the fourth high-frequency cut filter are two-terminal differential mode inductors, the second inductor is a four-terminal differential mode inductor; the third high-frequency cut filter and the fourth high-frequency cut filter are formed on one surface of a substrate on which the third signal wiring and the fourth signal wiring are formed, The power supply superimposed communication system is characterized in that the second inductor is formed on the other surface of the substrate.

9. 2. The power supply superimposed communication device according to claim 1, the first high-frequency cut filter is a plurality of two-terminal differential mode inductors connected in series with each other, The power supply superimposed communication device is characterized in that the second high frequency cut filter is a plurality of two-terminal differential mode inductors connected in series with each other.

10. 3. The power source superimposed communication system according to claim 2, the other end of the third high-frequency cut filter is connected to one end of the first coil of the first inductor of the first power source superimposed communication device, the other end of the fourth high-frequency cut filter is connected to one end of the second coil of the first inductor of the first power source superimposed communication device, A power supply superimposed communication system, characterized in that the first inductor of the first power supply superimposed communication device operates as the first inductor and also operates as the second inductor of the second power supply superimposed communication device.

11. 3. The power source superimposed communication system according to claim 2, A power supply superimposed communication system characterized in that a network is formed having at least one first power supply superimposed communication device and at least two second power supply superimposed communication devices connected to the first power supply superimposed communication device via the differential signal wiring.

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