Power Conversion Device

Abstract

To provide an electric power conversion device that allows reduction in the number of components or cost while reducing noise and also permits a reduced size.SOLUTION: An electric power conversion device that converts an input DC power and outputs it, comprises: a switching unit that converts the input power by switching of a switching element; an input cable way that inputs the DC power to the switching unit; an output cable way including a plurality of output lines that output the converted power from the switching unit; and a bypass circuit that connects the input cable way with the output cable way. The bypass circuit includes: a first bypass capacitor with one end connected to a first output line included in the plurality of output lines; a second bypass capacitor with one end connected to a second output line included in the plurality of output lines; and a bypass cable way connecting the other end of the first bypass capacitor and the other end of the second bypass capacitor with the input cable way.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power conversion device. [Background technology]

[0002] Conventionally, power conversion devices have been used that include switching circuits having switching elements made of semiconductor elements, and convert power by switching these switching elements. In power conversion devices that include such switching circuits, noise is generated by the switching of the switching elements, so techniques have been proposed to suppress the leakage of the generated noise to the outside.

[0003] For example, Patent Document 1 proposes a bypass circuit for suppressing common-mode noise in a main circuit including an inverter circuit, which is a switching circuit, in a three-phase inverter, which is a type of power conversion device. This bypass circuit is configured to return common-mode noise to the N phase on the input side of the inverter circuit through capacitors connected to the output lines of each phase on the output side of the inverter circuit.

[0004] In this way, when a noise bypass circuit is configured using a capacitor separate from the main circuit, a noise bypass capacitor is required in addition to the AC capacitor of the main circuit, which increases the number of parts and increases the size of the device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 6690317 Summary of the Invention [Problem to be solved by the invention]

[0006] The present invention has been made in view of the above-mentioned problems, and has an object to provide a power conversion device that can reduce noise, the number of parts or costs, and can be made smaller. [Means for solving the problem]

[0007] To solve the above problems, the present invention provides: A power conversion device that converts input DC power and outputs the converted power, a switching unit that converts the DC power by switching a switching element; an input electrical path for inputting the DC power to the switching unit; an output electric path including a plurality of output lines that outputs the converted power from the switching unit; a bypass circuit connecting the input electric path and the output electric path; Equipped with The bypass circuit is a first bypass capacitor having one end connected to a first output line included in the plurality of output lines; a second bypass capacitor having one end connected to a second output line included in the plurality of output lines; a bypass electric line connecting the other end of the first bypass capacitor and the other end of the second bypass capacitor to the input electric line; The present invention is characterized by having the following.

[0008] According to this, the first bypass capacitor and the second bypass capacitor provided in the bypass circuit function equivalently as two capacitors connected in series between the first output line and the second output line, and can suppress ripple in the power output from the switching unit and improve control stability. Therefore, by omitting the capacitor connected between the first output line and the second output line for the purpose of achieving such functions, the number of parts can be reduced and the power conversion device can be made smaller, or by replacing the capacitor with one having a smaller capacitance, the cost can be reduced and the power conversion device can be made smaller.

[0009] In addition, in the present invention, an input noise filter circuit provided in the input electrical path to reduce noise; an output noise filter circuit provided in the output electric path for reducing noise; Equipped with The bypass circuit may connect between the input noise filter circuit and the switching unit, and between the switching unit and the output noise filter circuit.

[0010] According to this, by increasing the capacitance of the first bypass capacitor and the second bypass capacitor included in the bypass circuit, the impedance of the bypass circuit can be reduced, and the effect of reducing low-frequency noise can be improved.

[0011] In addition, in the present invention, the switching unit includes an inverter unit that converts the DC power into single-phase three-wire AC power; the input electric path includes a first phase input line connected to a first phase input terminal and a second phase input line connected to a second phase input terminal; the output electric circuit includes a first-phase output line as a first output line connected to a first-phase output terminal, a second-phase output line as a second output line connected to a second-phase output terminal, and a neutral output line connected to a neutral output terminal; a first capacitor connected between the first phase output line and the neutral output line; a second capacitor connected between the second phase output line and the neutral output line; Equipped with The bypass circuit is a third bypass capacitor having one end connected to the neutral output line; The bypass electrical path may connect the other end of the first bypass capacitor, the other end of the second bypass capacitor, or the other end of the third bypass capacitor to either the first phase input line or the second phase input line.

[0012] According to this, in a power conversion device having an inverter unit as a switching unit that converts DC power to single-phase three-wire AC power, the first and second bypass capacitors provided in the bypass circuit equivalently function as two capacitors connected in series between the first and second phase output lines, thereby suppressing ripple in the power output from the inverter unit and improving control stability. Therefore, by omitting the capacitor connected between the first and second phase output lines for such purposes, the number of components can be reduced, thereby making the power conversion device more compact. Furthermore, in a power conversion device having a DC noise filter circuit that reduces DC noise as an input noise filter circuit and an AC noise filter circuit that reduces AC noise as an output noise filter circuit, increasing the capacitance of the first, second, and third bypass capacitors in the bypass circuit provided in the region between the DC noise filter circuit and the AC noise filter circuit can reduce the impedance of the bypass circuit and improve the effect of reducing low-frequency noise.

[0013] In addition, in the present invention, The bypass circuit is a first sub-bypass capacitor having a capacitance smaller than that of the first bypass capacitor, the first sub-bypass capacitor being connected in parallel with the first bypass capacitor between the first phase output line and the bypass electric line; a second sub-bypass capacitor having a capacitance smaller than that of the second bypass capacitor, the second sub-bypass capacitor being connected in parallel with the second bypass capacitor between the second phase output line and the bypass electric line; a third sub-bypass capacitor having a capacitance smaller than that of the third bypass capacitor, the third sub-bypass capacitor being connected in parallel with the third bypass capacitor between the neutral output line and the bypass electric line; The above configuration may be adopted.

[0014] This allows the bypass circuit to have low impedance over a wide range from low frequencies to high frequencies, making it possible to reduce noise over a wide frequency band.

[0015] In addition, in the present invention, the switching unit includes a DC / DC converter unit that converts the voltage of the DC power and outputs the converted voltage; the input electric path includes a first phase input line connected to a first phase input terminal and a second phase input line connected to a second phase input terminal; the output electric circuit includes a first-phase output line as a first output line connected to a first-phase output terminal, and a second-phase output line as a second output line connected to a second-phase output terminal, a capacitor connected between the first phase output line and the second phase output line; The above configuration may be adopted.

[0016] According to this, in a power conversion device having a DC / DC converter unit as a switching unit that converts DC power to a predetermined DC voltage, the first and second bypass capacitors provided in the bypass circuit equivalently function as two capacitors connected in series between the first and second phase output lines, thereby suppressing ripple in the power output from the DC / DC converter unit and improving control stability. Therefore, by omitting the capacitor connected between the first and second phase output lines for such functions, the number of components can be reduced, and the power conversion device can be made more compact. Furthermore, by increasing the capacitances of the first, second, and third bypass capacitors in the bypass circuit provided in the region between the input noise filter circuit and the output noise filter circuit, the impedance of the bypass circuit can be reduced, thereby improving the low-frequency noise reduction effect.

[0017] In addition, in the present invention, The bypass circuit is a first sub-bypass capacitor connected in parallel with the first bypass capacitor between the first output line and the bypass electrical path, the first sub-bypass capacitor having a capacitance smaller than that of the first bypass capacitor; a second sub-bypass capacitor having a capacitance smaller than that of the second bypass capacitor, the second sub-bypass capacitor being connected in parallel with the second bypass capacitor between the second output line and the bypass electrical path; The above configuration may be adopted.

[0018] This allows the bypass circuit to have low impedance over a wide range from low frequencies to high frequencies, making it possible to reduce noise over a wide frequency band. [Effects of the Invention]

[0019] According to the present invention, it is possible to provide a power conversion device that can reduce noise, the number of components or costs, and the size. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a diagram showing an outline of a circuit configuration of an inverter device according to a first embodiment of the present invention. [Figure 2] FIG. 5 is a diagram showing an outline of a circuit configuration of a DC / DC converter device according to a second embodiment of the present invention. [Figure 3] FIG. 10 is a diagram showing an outline of a circuit configuration of an inverter device according to a third embodiment of the present invention. [Figure 4] FIG. 10 is a diagram showing an outline of a circuit configuration of an inverter device according to a fourth embodiment of the present invention. [Figure 5] FIG. 10 is a diagram showing an outline of a circuit configuration of an inverter device according to a fifth embodiment of the present invention. [Figure 6] FIG. 1 is a diagram illustrating an outline of a circuit configuration of an inverter device according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0021] [Application example] An application example of the present invention will be described below with reference to the drawings. Fig. 1 shows an outline of the circuit configuration of an inverter device 10 which is an application example of the present invention. The inverter device 10 is a power conversion device that is connected at input terminals Ip and In to the positive and negative terminals of a DC power supply Sd, respectively, and converts DC power into single-phase three-wire AC power. The converted AC power in the inverter device 10 is supplied to loads RLiu and RLiw connected between output terminals Ou and Oo, and between output terminals Ow and Oo, respectively, and can also be interconnected with a commercial power grid.

[0022] The inverter device 10 generally includes a single-phase three-wire inverter 11, a noise bypass circuit 12, and a control unit 13. The inverter 11 is a three-arm inverter in which legs each consisting of two switches connected in series are connected in parallel to a DC power supply Sd, and converts input DC power into single-phase three-wire AC power by switching switches SW1 to SW6, and outputs the AC power via a U-phase power line Liu, a W-phase power line Liw, and an O-phase neutral line.

[0023] A capacitor Cu serving as an AC capacitor is connected between the output end Ou of the reactor Lu in the U-phase power line Liu and the output end Oo of the reactor Lo in the O-phase neutral line Lio. Also, a capacitor Cw serving as an AC capacitor is connected between the output end Lo of the reactor Lo in the O-phase neutral line Lio and the output end Ow of the reactor Lw in the W-phase power line Liw.

[0024] The inverter device 10 is provided with a noise bypass circuit 12 that connects the input side and output side of the inverter 11 and bypasses noise generated by switching of the switches SW1 to SW6 of the inverter 11. The noise bypass circuit 12 includes capacitors Cnu, Cno, and Cnw, and a bypass line Lbp1 that connects the other ends of these capacitors to the input side of the inverter 11.

[0025] One end of capacitor Cnu is connected to a connection point Bpu between one end of capacitor Cu in the U-phase power line Liu and the output terminal Ou. One end of capacitor Cno is connected to a connection point Bpo between the other end of capacitor Cu in the O-phase neutral line Lio and one end of capacitor Cw and the output terminal Lo. One end of capacitor Cnw is connected to a connection point Bpw between the other end of capacitor Cw in the W-phase power line Liw and the output terminal Ow. The other ends of capacitors Cnu, Cno, and Cnw are connected to one end of a bypass line Lbp1. The other end of this bypass line Lbp1 is connected to a connection point Bpn between the input terminal In of the negative input line Lin and the input side of the inverter 11.

[0026] Such a noise bypass circuit 12 functions as a noise filter that reduces common mode noise, which is generated by switching of the switches SW1 to SW6 that constitute the inverter 11 in the inverter device 10, by capacitively coupling the output side (AC side) and input side (DC side) of the inverter 11 using capacitors Cnu, Cno, and Cnw.

[0027] In inverter device 10, one end of capacitor Cnu, which is connected to U-phase power line Liu, and the other end of capacitor Cnw, which is connected to W-phase power line, are both connected to one end of bypass line Lbp1 in noise bypass circuit 12, thereby providing capacitors Cnu and Cnw connected in series between U-phase power line Liu and W-phase power line Liw. Therefore, by employing capacitors Cnu and Cnw with capacitances similar to those of capacitors Cu and Cw, a composite capacitor equivalent to the AC capacitor connected between U-phase power line Liu and W-phase power line Liw is provided, making it possible to omit such an AC capacitor between U-phase power line Liu and W-phase power line Liw. This reduces noise, reduces the number of components, and enables miniaturization.

[0028] Example 1 Hereinafter, the configuration of an inverter device 10 according to a first embodiment of the present invention will be described with reference to the drawings. However, the configurations of the device and system described in this embodiment should be modified as appropriate depending on various conditions. In other words, it is not intended that the scope of the present invention be limited to the following embodiment.

[0029] FIG. 1 is a circuit diagram showing a schematic configuration of an inverter device 10. As shown in FIG. The inverter device 10 is a power converter that converts DC power into AC power. The inverter device 10 has input terminals Ip and In connected to the positive and negative terminals of a DC power source Sd, respectively. The converted AC power is supplied to loads RLiu and RLiw connected between output terminals Ou and Oo, and between output terminals Ow and Oo, respectively, and can also be connected to a commercial power grid. The output terminal Oo is grounded. The DC power source Sd may be a power source that outputs DC power. It may be a DC power source such as a solar panel or a storage battery, or a combination of a DC power source and a power supply device having a DC / DC converter that converts the DC voltage output from the DC power source into a predetermined DC voltage. It may also be a device that converts AC power supplied from a grid power source and outputs the DC power. Here, the input terminals Ip and In correspond to the first-phase input terminal and the second-phase input terminal, respectively, of the present invention. Moreover, the output terminal Ou, the output terminal Ow, and the output terminal Ou correspond to the first phase output terminal, the second phase output terminal, and the neutral output terminal of the present invention, respectively.

[0030] The inverter device 10 generally includes a single-phase three-wire inverter 11, a noise bypass circuit 12, and a control unit 13. Here, the inverter 11 corresponds to the switching unit and inverter unit of the present invention, and the noise bypass circuit 12 corresponds to the bypass circuit of the present invention.

[0031] (inverter) The single-phase three-wire inverter 11 is a three-arm inverter in which a leg consisting of two switches connected in series is connected in parallel to a DC power supply Sd. That is, the inverter 11 is configured such that three legs, an O-phase midpoint leg Lgo, a U-phase leg Lgu, and a W-phase leg Lgw, are connected in parallel between a positive input line Lip and a negative input line Lin, in that order from the input terminals Ip and In. Here, the switches are made of semiconductor switching elements ranging from n-channel enhancement-type MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) to An IGBT (Insulated Gate Bipolar Transistor) can also be used as the semiconductor switching element, but in this case, a free-wheeling diode connected in reverse parallel to the IGBT is used. In this case, the positive input line Lip and the negative output line Lon correspond to the first phase input line and the second phase input line of the present invention, respectively, and together correspond to the input electric path of the present invention.

[0032] The U-phase leg Lgu is composed of switches SW1 and SW2, with the drain terminal of switch SW1 connected to the positive input line Lip, the source terminal of switch SW1 connected to the drain terminal of switch SW2, and the source terminal of switch SW2 connected to the negative input line Lin. The O-phase midpoint leg Lgo is composed of switches SW3 and SW4, with the drain terminal of switch SW3 connected to the positive input line Lip, the source terminal of switch SW3 connected to the drain terminal of switch SW4, and the source terminal of switch SW4 connected to the negative input line Lin. The W-phase leg Lgw is composed of switches SW5 and SW6, with the drain terminal of switch SW5 connected to the positive input line Lip, the source terminal of switch SW5 connected to the drain terminal of switch SW6, and the source terminal of switch SW6 connected to the negative input line Lin. Here, switches SW1 to SW6 correspond to switching elements of the present invention.

[0033] An O-phase neutral conductor Lio is drawn from the midpoint of the O-phase midpoint leg Lgo, i.e., the midpoint Cpo between the source terminal of switch SW3 and the drain terminal of switch SW4. A U-phase power line Liu is drawn from the midpoint of the U-phase leg Lgu, i.e., the midpoint Cpu between the source terminal of switch SW1 and the drain terminal of switch SW2. A W-phase power line Liw is drawn from the midpoint of the W-phase leg Lgw, i.e., the midpoint Cpw between the source terminal of switch SW5 and the drain terminal of switch SW6. Here, the O-phase neutral conductor Lio corresponds to the neutral output conductor of the present invention. The U-phase power line Liu corresponds to the first output conductor and first-phase output conductor of the present invention. The W-phase power line Liw corresponds to the second output conductor and second-phase output conductor of the present invention. The O-phase neutral conductor Lio, the U-phase power line, and the W-phase power line Liw constitute an output electric circuit of the present invention.

[0034] A reactor Lu and a reactor Lw are connected in series to the output terminal O of the U-phase power line Liu and the output terminal Ow of the W-phase neutral line Liw, respectively. The O-phase neutral line Lio is connected to the output terminal Oo via a reactor Lo connected in series.

[0035] A capacitor Cu is connected between the output end Ou of the reactor Lu in the U-phase power line Liu and the output end Oo of the reactor Lo in the O-phase neutral line Lio as an AC capacitor for suppressing ripple between the U and O phases and improving control stability. A capacitor Cw is also connected between the output end Lo of the reactor Lo in the O-phase neutral line Lio and the output end Ow of the reactor Lw in the W-phase power line Liw as an AC capacitor for suppressing ripple between the W and O phases and improving control stability. Here, the capacitors Cu and Cw correspond to the first and second capacitors of the present invention.

[0036] The noise bypass circuit 12 includes capacitors Cnu, Cno, and Cnw, and a bypass line Lbp1 that connects the other ends of these capacitors to the input side of the inverter 11. One end of capacitor Cnu is connected to a connection point Bpu between one end of capacitor Cu in the U-phase power line Liu and the output terminal Ou. One end of capacitor Cno is connected to a connection point Bpo between the other end of capacitor Cu in the O-phase neutral line Lio and one end of capacitor Cw and the output terminal Lo. One end of capacitor Cnw is connected to a connection point Bpw between the other end of capacitor Cw in the W-phase power line Liw and the output terminal Ow. The other ends of capacitor Cnu, Cno, and Cnw are connected to one end of a bypass line Lbp1. The other end of this bypass line Lbp1 is connected to the input terminal I of the negative input line Lin. n and the input side of the inverter 11. Here, the capacitors Cnu, Cno, and Cnw correspond to the first bypass capacitor, the third bypass capacitor, and the second bypass capacitor of the present invention, respectively.

[0037] Such a noise bypass circuit 12 functions as a noise filter that reduces common mode noise, which is generated by switching of the switches SW1 to SW6 that constitute the inverter 11 in the inverter device 10, by capacitively coupling the output side (AC side) and input side (DC side) of the inverter 11 using capacitors Cnu, Cno, and Cnw.

[0038] In addition, in inverter device 10, capacitors Cu and Cw are connected between the U-phase power line and the O-phase neutral line, and between the W-phase power line and the O-phase neutral line. In such a single-phase three-wire inverter device 10, it is desirable to further connect capacitor Cuw as an AC capacitor between the U-phase power line and the W-phase power line, as shown in FIG. 6 . However, in the noise bypass circuit 12 described above, one end of capacitor Cnu, which is connected to the U-phase power line Liu, and the other end of capacitor Cnw, which is connected to the W-phase power line, are both connected to one end of bypass line Lbp1, thereby providing capacitors Cnu and Cnw connected in series between the U-phase power line Liu and the W-phase power line Liw. Therefore, by employing capacitors Cnu and Cnw as capacitors with capacitances similar to those of capacitors Cu and Cw, a composite capacitor equivalent to capacitor Cuw is provided. For example, if the capacitance of capacitor Cu (the capacitance of a capacitor is represented by the same symbol Cu as the capacitor) is Cu=10 μF and Cw=10 μF, then by using capacitors with capacitances of Cnu=10 μF, Cnw=10 μF, and Cno=0 to 10 μF, capacitors Cnu and Cnw in noise bypass circuit 12 can replace the function of capacitor Cuw (e.g., Cuw=5 μF), and capacitor Cuw between U-phase power line Liu and W-phase power line Liw can be omitted. This reduces noise, reduces the number of components, and enables miniaturization.

[0039] In the inverter device 10, the input side of the noise bypass circuit 12 is connected to the negative input line Lin, but it may also be connected to the positive input line Lip.

[0040] Example 2 2 shows a schematic configuration of a DC / DC converter 20 according to a second embodiment. In the first embodiment, the inverter 10 has been described, but this is not limited to a power conversion device having an inverter 11 as a switching circuit, and as will be described below, a similar bypass circuit can also be provided in a DC / DC converter 20 having a chopper circuit or the like. Common reference numerals are used for components common to the inverter 10, and detailed description thereof will be omitted.

[0041] The DC / DC converter 20 is a power conversion device whose input terminals Ip and In are connected to the positive and negative terminals of a DC power supply Sd, respectively, and which boosts, lowers, or boosts and lowers a DC voltage. Here, the input terminals Ip and In correspond to the first phase input terminal and the second phase input terminal of the present invention, respectively.

[0042] The DC / DC converter device 20 generally comprises a DC / DC converter 21, a noise bypass circuit 22, and a control unit (the control unit is not shown). Here, the DC / DC converter 21 corresponds to the switching unit and DC / DC converter unit of the present invention.

[0043] The input side of the DC / DC converter 21 is provided with a DC filter Fdc11 for reducing DC noise, and a capacitor Cpn1 connected between the positive input line Lip and the negative input line Lin. are provided. On the output side of the DC / DC converter 21, a capacitor Cacc and a DC filter Fdc12 for reducing DC noise are connected between the positive output line Lop and the negative output line Lon, and output terminals Op and On are provided, with a load RL connected between the output terminals Op and On. Here, the positive input line Lip and the negative input line Lin correspond to the first phase input line and the second phase input line of the present invention, respectively. The positive output line Lop corresponds to the first output line and the first phase output line of the present invention. The negative output line Lon corresponds to the second output line and the second phase output line of the present invention. The capacitor Cacc corresponds to the capacitor connected between the first phase output line and the second phase output line of the present invention. The DC filters Fdc11 and Fdc12 correspond to the input noise filter circuit and the output noise filter circuit of the present invention, respectively.

[0044] The DC / DC converter 21 includes, on the input side, a reactor Lp having one end connected to the positive input line Lip via one end of a capacitor Cpn1, a diode D1 having an anode terminal connected to the other end of the reactor Lp, and a switch SW having a collector connected between the other end of the reactor Lp and the anode terminal of the diode D1. Here, the switch SW is configured as a p-channel IGBT, which is a switching element, but it may also be configured as a MOSFET. The cathode terminal of the diode D1 is connected to the positive output line Lop. The emitter of the switch SW is connected to the negative input line Lin via the other end of the capacitor Cpn1 on the input side, and is connected to the negative output line Lon via a capacitor Cacc on the output side.

[0045] The noise bypass circuit 22 includes, on the output side of the DC / DC converter 21, a capacitor Cp having one end connected to a connection point Bpop between one end of the capacitor Cacc on the positive output line Lop and the DC filter Fdc12, and a capacitor Cn having one end connected to a connection point Bpon between the other end of the capacitor Cacc on the negative output line Lon and the DC filter Fdc12. The other ends of the capacitors Cp and Cn are connected to one end of a bypass line Lbp2. The other end of this bypass line Lbp2 is connected on the input side of the DC / DC converter 21 between the DC filter Fdc11 on the negative input line Lin and the other end of the capacitor Cpn1. Here, the capacitors Cp and Cn correspond to the first and second bypass capacitors of the present invention, respectively. The bypass line Lbp2 corresponds to the bypass electrical circuit of the present invention.

[0046] Such a noise bypass circuit 22 functions as a noise filter that reduces common mode noise, which is generated by switching of the switch SW included in the DC / DC converter 21 in the DC / DC converter device 20, by capacitively coupling the output side and input side of the DC / DC converter 21 using the capacitors Cp and Cn.

[0047] Furthermore, in the DC / DC converter device 20, a capacitor Cacc is connected between the positive output line Lop and the negative output line Lon. Although a capacitor with a capacitance of Cacc=10 μF should be used as this capacitor Cacc, by using capacitors with Cp=10 μF and capacitors with Cn=10 μF as the capacitors Cp and Cn of the noise bypass circuit 22, it is possible to replace the capacitor Cacc with a capacitance of Cacc=5 μF, and the DC / DC converter device 20 can be configured using capacitors with smaller capacitance, thereby reducing noise, reducing costs, and making it possible to make the device smaller.

[0048] 2, DC filters Fdc11 and Fdc12 are provided, but one or both of these DC filters may be omitted. Also, although the input side of the noise bypass circuit 22 is connected to the negative input line Lin, it may be connected to the positive input line Lip. 2, capacitors with smaller capacitances may be connected in parallel to bypass capacitors Cp and Cn, as in a fifth embodiment described below. This allows the noise bypass circuit 52 to have a low impedance over a wide frequency band from low to high frequencies, further improving the noise reduction effect. In this case, the capacitor connected in parallel to capacitor Cp corresponds to the first sub-bypass capacitor of the present invention, and the capacitor connected in parallel to capacitor Cn corresponds to the second sub-bypass capacitor.

[0049] Example 3 Third Embodiment A configuration of an inverter device 30 according to a third embodiment of the present invention will be described below with reference to Fig. 3. The same components as those of the inverter device 10 according to the first embodiment will be designated by the same reference numerals and detailed description thereof will be omitted.

[0050] In the inverter device 30, a DC filter Fdc2 and a capacitor Cpn2 for reducing DC noise are provided on the input side of the inverter 11. The DC filter Fdc2 is connected to the input terminals Ip and In, and the capacitor Cpn2 is connected between the positive input line Lip and the negative output line Lon via the DC filter Fdc2. Here, the DC filter Fdc2 corresponds to the input noise filter circuit of the present invention.

[0051] In addition, in inverter device 50, an AC filter Fac2 that reduces AC noise is provided on the output side of inverter 11 in U-phase power line Liu, O-phase neutral line Lio, and W-phase power line Liw, and output terminals Ou, Oo, and Ow are provided on the U-phase power line Liu, O-phase neutral line Lio, and W-phase power line Liw via AC filter Fac2. Here, AC filter Fac2 corresponds to the output noise filter circuit of the present invention.

[0052] In the inverter device 30, the noise bypass circuit 32 is provided between the inverter 11, the DC filter Fdc2, and the AC filter Fac2. Specifically, a connection point Bpu3 on the output side of the noise bypass circuit 32 is provided between one end of the capacitor Cu on the U-phase power line Liu and the AC filter Fac2. A connection point Bpo3 is provided between the other end of the capacitor Cu on the O-phase neutral line Lio and one end of the capacitor Cw and the AC filter Fac2. A connection point Bpw3 is connected between the other end of the capacitor Cw on the W-phase power line Liw and the AC filter Fac2. That is, the connection points Bpu3, Bpo3, and Bpw3 on the output side of the noise bypass circuit 32 are provided downstream of the inverter 11 and upstream of the AC filter Fac2. Furthermore, a connection point Bpn3 on the output side of the noise bypass circuit 32 is provided between the DC filter Fdc2 on the negative input line Lin and the other end of the capacitor Cpn2. That is, a connection point Bpn3 on the input side of the noise bypass circuit 32 is provided subsequent to the DC filter Fdc2 and prior to the inverter 11. The other end of capacitor Cnu, one end of which is connected to connection point Bpu3, the other end of capacitor Cno, one end of which is connected to connection point Bpo3, and the other end of capacitor Cnw, one end of which is connected to connection point Bpw3, are connected to one end of a bypass line Lbp3. The other end of this bypass line Lbp3 is connected to connection point Bpn3 on the input side of the noise bypass circuit 32. Here, the noise bypass circuit 32 and the bypass line Lbp3 correspond to the bypass circuit and bypass electrical path of the present invention, respectively.

[0053] Such a noise bypass circuit 32 functions as a noise filter that reduces common mode noise generated by switching of the switches SW1 to SW6 that constitute the inverter 11 in the inverter device 30, by capacitively coupling the output side (AC side) and input side (DC side) of the inverter 11 using capacitors Cnu, Cno, and Cnw in the area sandwiched between the DC filter Fdc2 and the AC filter Fac2.

[0054] In addition, the inverter device 30 uses a capacitor called an AC capacitor to improve controllability. Capacitors Cu and Cw are connected between the U-phase power line and the O-phase neutral line, and between the W-phase power line and the O-phase neutral line. For example, if the capacitance of capacitor Cu (the capacitance of a capacitor is represented by the same symbol Cu as the capacitor) is Cu=10 μF and Cw=10 μF, then capacitors Cnu=10 μF, Cnw=10 μF, and Cno=0 to 10 μF are used. By using capacitors Cnu and Cnw in noise bypass circuit 12, capacitor Cuw between the U-phase power line Liu and the W-phase power line Liw can be eliminated. This reduces noise, reduces the number of components, and enables miniaturization. Furthermore, increasing the capacitance of capacitors Cnu, Cno, and Cnw lowers the impedance of noise bypass circuit 32, improving noise reduction, particularly for low-frequency noise. Furthermore, a capacitor for grounding the noise bypass circuit 32 (bypass line Lbp3) is not required.

[0055] Example 4 A configuration of an inverter device 40 according to a fourth embodiment of the present invention will be described below with reference to Fig. 4. The same components as those of the inverter device 10 according to the first embodiment and the inverter device 30 according to the third embodiment will be designated by the same reference numerals and will not be described in detail.

[0056] The configuration of the inverter device 40 is the same as that of the inverter device 30 according to the third embodiment, except for the configuration of the connection point on the input side of the noise bypass circuit 42. In the inverter device 40, the noise bypass circuit 42 is also provided between the inverter 11 and the DC filter Fdc2 and AC filter Fac2. In the noise bypass circuit 42, the connection points Bpu3, Bpo3, and Bpw3 on the output side are also provided after the inverter 11 and before the AC filter Fac2. In the noise bypass circuit 42, the connection point Bpp4 of the noise bypass circuit 42 is connected between the DC filter Fdc2 of the positive input line Lip and one end of the capacitor Cpn2. The connection point Bpp4 on the input side of the noise bypass circuit 42 is provided after the DC filter Fdc2 and before the inverter 11. The other end of capacitor Cnu, one end of which is connected to connection point Bpu3, the other end of capacitor Cno, one end of which is connected to connection point Bpo3, and the other end of capacitor Cnw, one end of which is connected to connection point Bpw3, are connected to one end of a bypass line Lbp4. The other end of this bypass line Lbp4 is connected to connection point Bpn3 on the input side of the noise bypass circuit 42. Here, the noise bypass circuit 42 and the bypass line Lbp4 correspond to the bypass circuit and bypass electrical path of the present invention, respectively.

[0057] Such a noise bypass circuit 42 functions as a noise filter that reduces common mode noise, which is generated by switching of the switches SW1 to SW6 that constitute the inverter 11 in the inverter device 40, by capacitively coupling the output side (AC side) and input side (DC side) of the inverter 11 using capacitors Cnu, Cno, and Cnw in the area sandwiched between the DC filter Fdc2 and the AC filter Fac2.

[0058] To improve controllability, inverter device 40 also connects capacitors Cu and Cw, known as AC capacitors, between the U-phase power line and the O-phase neutral line, and between the W-phase power line and the O-phase neutral line. For example, if capacitor Cu (the capacitance of a capacitor is represented by the same symbol Cu as a capacitor) has a capacitance of Cu=10 μF and Cw=10 μF, and capacitors Cnu=10 μF, capacitors Cnw=10 μF, and capacitors Cno=0 to 10 μF are used, capacitors Cnu and Cnw in noise bypass circuit 12 can be used to eliminate capacitor Cuw between the U-phase power line Liu and the W-phase power line Liw. This reduces noise, reduces the number of components, and enables miniaturization. Furthermore, increasing the capacitance of capacitors Cnu, Cno, and Cnw lowers the impedance of noise bypass circuit 42, improving noise reduction, particularly for low-frequency noise. Furthermore, a capacitor for grounding the noise bypass circuit 42 (bypass line Lbp4) is not required.

[0059] Example 5 Hereinafter, the configuration of an inverter device 50 according to a fifth embodiment of the present invention will be described with reference to Fig. 5. The same components as those of the inverter device 10 according to the first embodiment and the inverter device 30 according to the third embodiment will be designated by the same reference numerals, and detailed description thereof will be omitted.

[0060] In the inverter device 50, a DC filter Fdc2 and a capacitor Cpn2 are provided on the input side of the inverter 11. The DC filter Fdc2 is connected to input terminals Ip and In, and the capacitor Cpn2 is connected between the positive input line Lip and the negative output line Lon via the DC filter Fdc2. In addition, in the inverter device 50, an AC filter Fac2 is provided on the output side of the inverter 11 in the U-phase power line Liu, the O-phase neutral line Lio, and the W-phase power line Liw, and output terminals Ou, Oo, and Ow are provided on the U-phase power line Liu, the O-phase neutral line Lio, and the W-phase power line Liw via the AC filter Fac2.

[0061] In the noise bypass circuit 52 of the inverter device 50, one end of each of capacitors Cnu1 and Cnu2 connected in parallel is connected to a connection point Bpu3 with the U-phase power line Liu. Furthermore, one end of each of capacitors Cno1 and Cno2 connected in parallel is connected to a connection point Bpo3 with the O-phase neutral line Lio. Furthermore, one end of each of capacitors Cnw1 and Cnw2 is connected to a connection point Bpw3 with the W-phase power line Liw. In the noise bypass circuit 52, the other ends of each of capacitors Cnu1 and Cnu2, capacitors Cno1 and Cno2, and capacitors Cnw1 and Cnw2 are connected to one end of a bypass line Lbp5, and the other end of this bypass line Lbp5 is connected to a connection point Bpn3 with the negative input line Lin. Here, the noise bypass circuit 52 and the bypass line Lbp5 correspond to the bypass circuit and bypass electrical path of the present invention, respectively. Furthermore, capacitors Cnu1 and Cnu2 correspond to the first bypass capacitor and the first sub-bypass capacitor of the present invention, respectively. Capacitors Cnw1 and Cnw2 correspond to the second bypass capacitor and the second sub-bypass capacitor of the present invention, respectively. Capacitors Cno1 and Cno2 correspond to the third bypass capacitor and the third sub-bypass capacitor of the present invention, respectively.

[0062] Such a noise bypass circuit 52 functions as a noise filter that reduces common mode noise, which is generated by switching of the switches SW1 to SW6 that constitute the inverter 11 in the inverter device 50, by capacitively coupling the output side (AC side) and input side (DC side) of the inverter 11 using capacitors Cnu, Cno, and Cnw in the area sandwiched between the DC filter Fdc2 and the AC filter Fac2.

[0063] Furthermore, in the noise bypass circuit 52 of the inverter device 50, for example, capacitors Cnu1 = 10 μF, Cnu2 = 1 μF, Cnw1 = 10 μF, Cnw2 = 1 μF, Cno1 = 0 to 10 μF, and Cno2 = 5 μF are used. That is, a high-capacitance capacitor Cnu1 and a smaller-capacitance capacitor Cnu2 are connected in parallel between the U-phase power line Liu and the bypass line Lbp5, a high-capacitance capacitor Cnw1 and a smaller-capacitance capacitor Cnw2 are connected in parallel between the W-phase power line Liw and the bypass line Lbp5, and a high-capacitance capacitor Cno1 and a smaller-capacitance capacitor Cno2 are connected in parallel between the O-phase neutral line and the bypass line Lbp5. This allows for a wide frequency band from low to high frequencies. This allows the noise bypass circuit 52 to have a low impedance, further improving the noise reduction effect.

[0064] In the noise bypass circuit 52, the capacitance of the smaller capacitor Cno2 can be adjusted depending on the frequency band in which you want to reduce noise passing through the O-phase neutral wire Lio. For example, if you want to reduce noise in a frequency band of 100 kHz or less, you can select a capacitor Cno2 of 1 μF, and if you want to reduce noise in a frequency band of 3 GHz or less, you can select a capacitor Cno2 of 0.1 μF. Furthermore, in the noise bypass circuit 52, if it is desired to suppress ripples between the U phase and the O phase and between the W phase and the O phase and improve control stability, the capacitance of the capacitor with a large capacitance can be increased. For example, if Cno1 = 5 μF, the combined capacitance between the U phase and the O phase and the O phase and the W phase becomes 10 + 1 / {1 / (10 + 1) + 1 / (5 + 1)} = 13.88 μF, and the amount of capacitance can be increased.

[0065] <Appendix 1> A power conversion device (10, 20, 30, 40, 50) that converts input DC power and outputs the converted power, a switching unit (11, 21) that converts the DC power by switching switching elements (SW1 to SW6); an input circuit (Lip, Lin) for inputting the DC power to the switching unit (11, 21); an output circuit (Liu, Lio, Liw, Lop, Lon) including a plurality of output lines that output the converted power from the switching unit (11, 21); bypass circuits (12, 22, 32, 42, 52) connecting the input electric paths (Lip, Lin) and the output electric paths (Liu, Lio, Liw, Lop, Lon); Equipped with The bypass circuits (12, 22, 32, 42, 52) a first bypass capacitor (Cnu, Cp) having one end connected to a first output line (Liu, Lop) included in the plurality of output lines; second bypass capacitors (Cnw, Cn) having one end connected to second output lines (Liw, Lon) included in the plurality of output lines; bypass electric circuits (Lbp1, Lbp2, Lbp3, Lbp4, Lbp5) connecting the other end of the first bypass capacitor (Cnu, Cp) and the other end of the second bypass capacitor (Cnw, Cn) to the input electric circuits (Lip, Lin); A power conversion device (10, 20, 30, 40, 50) comprising: [Explanation of symbols]

[0066] 10, 30, 40, 50: Inverter device 11: Inverter 12, 22, 32, 42, 52: Bypass circuit 20: DC / DC converter device 21: DC / DC converter section Lip: Positive input wire Lin: Negative input line Liu :U phase power line Liw :W phase power line Lio :O phase neutral wire Lop: Positive output line Lon: Negative output line Cnu, Cnw, Cp, Cn: Capacitors

Claims

1. A power conversion device that converts input DC power and outputs the converted power, a switching unit that converts the DC power by switching a switching element; an input electrical path for inputting the DC power to the switching unit; an output electric path including a plurality of output lines that outputs the converted power from the switching unit; a bypass circuit connecting the input electric path and the output electric path; Equipped with the switching unit includes an inverter unit that converts the DC power into single-phase three-wire AC power; the input electrical path includes a first phase input line connected to a first phase input terminal and a second phase input line connected to a second phase input terminal; the output electric circuit includes a first-phase output line as a first output line included in the plurality of output lines and connected to a first-phase output terminal, a second-phase output line as a second output line included in the plurality of output lines and connected to a second-phase output terminal, and a neutral output line included in the plurality of output lines and connected to a neutral output terminal; a first capacitor connected between the first phase output line and the neutral output line; a second capacitor connected between the second phase output line and the neutral output line; Equipped with The bypass circuit is a first bypass capacitor having one end connected to the first output line; a second bypass capacitor having one end connected to the second output line; a third bypass capacitor having one end connected to the neutral output line; a bypass line connecting the other end of the first bypass capacitor, the other end of the second bypass capacitor, the other end of the third bypass capacitor to either the first phase input line or the second phase input line; a first sub-bypass capacitor having a capacitance smaller than that of the first bypass capacitor, the first sub-bypass capacitor being connected in parallel with the first bypass capacitor between the first phase output line and the bypass electric line; A power supply is connected between the second phase output line and the bypass line in parallel with the second bypass capacitor. a second sub-bypass capacitor having a capacitance smaller than that of the second bypass capacitor; a third sub-bypass capacitor having a capacitance smaller than that of the third bypass capacitor, the third sub-bypass capacitor being connected in parallel with the third bypass capacitor between the neutral output line and the bypass electric line; A power conversion device comprising:

2. A power conversion device that converts input DC power and outputs the converted power, a switching unit that converts the DC power by switching a switching element; an input electrical path for inputting the DC power to the switching unit; an output electric path including a plurality of output lines that outputs the converted power from the switching unit; a bypass circuit connecting the input electric path and the output electric path; Equipped with the switching unit includes a DC / DC converter unit that converts the voltage of the DC power and outputs the converted voltage; the input electrical path includes a first phase input line connected to a first phase input terminal and a second phase input line connected to a second phase input terminal; the output electric path includes a first-phase output line connected to a first-phase output terminal as a first output line included in the plurality of output lines, and a second-phase output line connected to a second-phase output terminal as a second output line included in the plurality of output lines, a capacitor connected between the first phase output line and the second phase output line; Equipped with The bypass circuit is a first bypass capacitor having one end connected to the first phase output line; a second bypass capacitor having one end connected to the second phase output line; a bypass line connecting the other end of the first bypass capacitor and the other end of the second bypass capacitor to the input line; a first sub-bypass capacitor connected in parallel with the first bypass capacitor between the first output line and the bypass electrical path, the first sub-bypass capacitor having a capacitance smaller than that of the first bypass capacitor; a second sub-bypass capacitor having a capacitance smaller than that of the second bypass capacitor, the second sub-bypass capacitor being connected in parallel with the second bypass capacitor between the second output line and the bypass electrical path; A power conversion device comprising:

3. An input noise filter circuit provided in the input electric path to reduce noise; an output noise filter circuit provided in the output electric path for reducing noise; Equipped with 3. The power conversion device according to claim 1, wherein the bypass circuit connects between the input noise filter circuit and the switching unit, and between the switching unit and the output noise filter circuit.

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