IP transmission system, IPRF conversion device, RFIP conversion device, IP transmission method, IPRF conversion method, and RFIP conversion method

Abstract

To retransmit broadcasting signals of more channels with a simple configuration while restraining delay caused at retransmission of a broadcasting signal for terrestrial digital signal, in a system for retransmission after IP transmission of an RF band broadcasting signal.SOLUTION: An IP transmission system includes an RFIP conversion device and an IPRF conversion device, the RFIP conversion device generates a plurality of digital signals by performing digital conversion for a plurality of channel signals extracted from a broadcasting signal of terrestrial digital broadcasting using mutually synchronized first clocks of the same frequency or a common first clock, and transmits a plurality of IP packets respectively including the generated plurality of digital signals, the IPRF conversion device generates a plurality of channel signals by performing analog conversion for the plurality of digital signals contained in the plurality of received IP packets using a common second clock, and outputs the generated plurality of channel signals.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to an IP transmission system, an IPRF conversion device, an RFIP conversion device, an IP transmission method, an IPRF conversion method, and an RFIP conversion method. [Background technology]

[0002] 2. Description of the Related Art Conventionally, systems have been proposed for retransmitting terrestrial digital broadcast signals.

[0003] For example, Patent Document 1 (JP 2008-211587 A) discloses the following IP / RF conversion device as a device used in such a system: That is, the IP / RF conversion device includes IP packet receiving devices (32-1 to 32-n) that receive IP packets carrying broadcast TS packets, broadcast TS packet processing devices (34-1 to 34-n) that extract the broadcast TS packets from the IP packets received by the IP packet receiving devices and output them in chronological order on the transmitting side, clock extraction devices (36-1 to 36-n) that extract a synchronization clock required for OFDM modulation from the broadcast TS packets supplied from the broadcast TS packet processing devices and output the synchronization clock and the broadcast TS packets in synchronization with each other, and OFDM modulation devices (38-1 to 38-n) that OFDM-modulate the broadcast TS packets from the clock extraction devices in synchronization with the synchronization clock from the clock extraction devices.

[0004] Furthermore, Patent Document 2 (JP 2011-10186 A) discloses the following digital broadcast retransmission system: That is, the digital broadcast retransmission system includes a packet conversion device that receives a radio frequency signal broadcast from a digital broadcast device, demodulates the radio frequency signal to extract line coding information that has been line coded from the radio frequency signal, packetizes the line coding information, and transmits the packets to a network, and a frequency conversion device that receives the packets from the packet conversion device via the network, extracts the line coding information from the packets, modulates the line coding information to generate a radio frequency signal, and transmits the radio frequency signal to a digital broadcast receiving device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-211587 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-10186 [Patent Document 3] Japanese Patent Application Publication No. 2018-11236 Summary of the Invention [Problem to be solved by the invention]

[0006] There is a need for a technology that goes beyond the technologies described in Patent Documents 1 to 3 and that can retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals in a system that transmits RF (Radio Frequency) band broadcast signals via IP (Internet Protocol) and then retransmits them.

[0007] The present disclosure has been made to solve the above-mentioned problems, and its purpose is to provide an IP transmission system, an IPRF conversion device, an RFIP conversion device, an IP transmission method, an IPRF conversion method, and an RFIP conversion method that are capable of retransmitting broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals in a system that transmits RF band broadcast signals via IP and then retransmits them. [Means for solving the problem]

[0008] The IP transmission system of the present disclosure comprises an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock of the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each containing the generated plurality of digital signals to the IPRF conversion device, and the IPRF conversion device generates a plurality of channel signals by analog converting the plurality of digital signals contained in the plurality of IP packets received from the RFIP conversion device using a common second clock, and outputs the generated plurality of channel signals.

[0009] The IPRF conversion device of the present disclosure includes a receiving unit that receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock, a generating unit that generates a plurality of channel signals by analog converting the plurality of digital signals contained in the plurality of IP packets received by the receiving unit using a common second clock, and an output unit that outputs the plurality of channel signals generated by the generating unit.

[0010] The RFIP conversion device of the present disclosure includes a receiving unit that receives a terrestrial digital broadcasting signal, an extracting unit that extracts multiple channel signals from the broadcasting signal received by the receiving unit, a generating unit that generates multiple digital signals by digitally converting the multiple channel signals extracted by the extracting unit using a first clock of the same frequency that is synchronized with each other or a common first clock, and an output unit that outputs multiple IP packets each including the multiple digital signals generated by the generating unit.

[0011] The IP transmission method disclosed herein is an IP transmission method in an IP transmission system equipped with an RFIP conversion device and an IPRF conversion device, and includes the steps of: the RFIP conversion device generating a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock of the same frequency that is synchronized with each other or a common first clock; and transmitting a plurality of IP packets each containing the generated plurality of digital signals to the IPRF conversion device; and the IPRF conversion device generating a plurality of channel signals by analog converting the plurality of digital signals contained in the plurality of IP packets received from the RFIP conversion device using a common second clock; and outputting the generated plurality of channel signals.

[0012] The IPRF conversion method disclosed herein is an IPRF conversion method in an IPRF conversion device, and includes the steps of receiving a plurality of IP packets, each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock; generating a plurality of channel signals by analog converting the plurality of digital signals contained in the received plurality of IP packets using a common second clock; and outputting the generated plurality of channel signals.

[0013] The RFIP conversion method disclosed herein is an RFIP conversion method in an RFIP conversion device, and includes the steps of receiving a terrestrial digital broadcast signal, extracting a plurality of channel signals from the received broadcast signal, generating a plurality of digital signals by digitally converting the extracted plurality of channel signals using a first clock of the same frequency that is synchronized with each other or a common first clock, and outputting a plurality of IP packets each including the generated plurality of digital signals.

[0014] One aspect of the present disclosure can be realized not only as an IPRF conversion device equipped with such a characteristic processing unit, but also as a program for causing a computer to execute such characteristic processing steps, or as a semiconductor integrated circuit that realizes part or all of the IPRF conversion device.

[0015] Furthermore, one aspect of the present disclosure can be realized not only as an RFIP conversion device having such a characteristic processing unit, but also as a program for causing a computer to execute such characteristic processing steps, or as a semiconductor integrated circuit that realizes part or all of the RFIP conversion device. [Effects of the Invention]

[0016] According to the present disclosure, in a system in which RF band broadcast signals are transmitted via IP and then retransmitted, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a diagram illustrating a configuration of an IP transmission system according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram illustrating a configuration of an RFIP conversion device according to the first embodiment of the present disclosure. [Figure 3]FIG. 3 is a diagram illustrating a configuration of an IP transmission unit in the RFIP conversion device according to the first embodiment of the present disclosure. [Figure 4] FIG. 4 is a diagram illustrating a configuration of an IPRF conversion device according to the first embodiment of the present disclosure. [Figure 5] FIG. 5 is a diagram illustrating a configuration of an IP receiving unit in an IPRF conversion device according to the first embodiment of the present disclosure. [Figure 6] FIG. 6 is a flowchart defining an example of an operation procedure when the RFIP conversion device according to the first embodiment of the present disclosure transmits an IP packet. [Figure 7] FIG. 7 is a flowchart defining an example of an operation procedure when the IPRF conversion device according to the first embodiment of the present disclosure outputs a channel signal. [Figure 8] FIG. 8 is a diagram illustrating an example of a sequence of IP packet transmission processing in the IP transmission system according to the first embodiment of the present disclosure. [Figure 9] FIG. 9 is a diagram illustrating a configuration of an IP transmission system according to the second embodiment of the present disclosure. [Figure 10] FIG. 10 is a diagram illustrating an example of the configuration of a control unit in an RFIP conversion device according to the second embodiment of the present disclosure. [Figure 11] FIG. 11 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure. [Figure 12] FIG. 12 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure. [Figure 13] FIG. 13 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0018] First, the contents of the embodiments of the present disclosure will be listed and described.

[0019] (1) An IP transmission system according to an embodiment of the present disclosure includes an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock of the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each containing the generated plurality of digital signals to the IPRF conversion device, and the IPRF conversion device generates a plurality of channel signals by analog converting the plurality of digital signals contained in the plurality of IP packets received from the RFIP conversion device using a common second clock, and outputs the generated plurality of channel signals.

[0020] In this way, by configuring the IPRF conversion device to convert multiple digital signals contained in multiple IP packets to analog using a common second clock, components such as DACs (Analog to Digital Converters) required to generate multiple channel signals corresponding to multiple channels can be shared, which reduces the number of components and mounting area required to generate channel signals compared to a configuration in which a single DAC is used to generate a channel signal corresponding to a single channel, thereby achieving lower costs. Therefore, in a system in which RF band broadcast signals are transmitted via IP and then retransmitted, it is possible to retransmit broadcast signals for more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals.

[0021] (2) An IPRF conversion device according to an embodiment of the present disclosure includes a receiving unit that receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock; a generating unit that generates a plurality of channel signals by analog converting the plurality of digital signals contained in the plurality of IP packets received by the receiving unit using a common second clock; and an output unit that outputs the plurality of channel signals generated by the generating unit.

[0022] In this way, by using a common second clock to convert multiple digital signals contained in multiple IP packets into analog signals, components such as DACs required to generate multiple channel signals corresponding to multiple channels can be shared, which reduces the number of components and mounting area required to generate channel signals compared to a configuration in which a single DAC is used to generate a channel signal corresponding to a single channel, thereby achieving lower costs. Therefore, in a system in which RF band broadcast signals are transmitted over IP and then retransmitted, it is possible to retransmit broadcast signals for more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals.

[0023] (3) The IPRF conversion device may further include a buffer that stores the IP packets received by the receiving unit, and an adjustment unit that adjusts the second clock based on the amount of IP packets stored in the buffer, and the generation unit may generate the multiple channel signals by converting the multiple digital signals to analog using one DAC that operates in accordance with the second clock.

[0024] With this configuration, the second clock can be made to follow the clock used to generate a digital signal in the device that sent the IP packet, thereby enabling IP transmission of a broadcast signal between the device and the IPRF conversion device while suppressing the discrepancy between the clock and the second clock.

[0025] (4) An RFIP conversion device according to an embodiment of the present disclosure includes a receiving unit that receives a terrestrial digital broadcast signal, an extracting unit that extracts multiple channel signals from the broadcast signal received by the receiving unit, a generating unit that generates multiple digital signals by digitally converting the multiple channel signals extracted by the extracting unit using a first clock of the same frequency that is synchronized with each other or a common first clock, and an output unit that outputs multiple IP packets each including the multiple digital signals generated by the generating unit.

[0026] In this manner, a configuration that digitally converts multiple channel signals using a first clock of the same frequency that is synchronized with each other or a common first clock to generate multiple digital signals and outputs multiple IP packets each containing the generated multiple digital signals allows a destination device of the IP packets to analog-convert the multiple digital signals using a common clock to generate multiple channel signals. This allows the destination device to share components such as DACs required to generate multiple channel signals corresponding to multiple channels. This reduces the number of components and mounting area required to generate channel signals compared to a configuration that uses a single DAC to generate a channel signal corresponding to a single channel, thereby achieving lower costs. Therefore, in a system that transmits RF broadcast signals via IP and then retransmits them, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing delays that occur when retransmitting terrestrial digital broadcast signals.

[0027] (5) An IP transmission method according to an embodiment of the present disclosure is an IP transmission method in an IP transmission system including an RFIP conversion device and an IPRF conversion device, and includes the steps of: generating a plurality of digital signals by the RFIP conversion device digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock of the same frequency that is synchronized with each other or a common first clock; transmitting a plurality of IP packets each containing the generated plurality of digital signals to the IPRF conversion device; and generating a plurality of channel signals by the IPRF conversion device analog converting the plurality of digital signals contained in the plurality of IP packets received from the RFIP conversion device using a common second clock; and outputting the generated plurality of channel signals.

[0028] In this way, by using a common second clock to convert multiple digital signals contained in multiple IP packets, the IPRF conversion device can share components such as DACs required to generate multiple channel signals corresponding to multiple channels, which reduces the number of components and mounting area required to generate the channel signals and realizes lower costs compared to a method in which a single DAC is used to generate a channel signal corresponding to a single channel. Therefore, in a system in which RF band broadcast signals are transmitted over IP and then retransmitted, it is possible to retransmit broadcast signals for more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals.

[0029] (6) An IPRF conversion method according to an embodiment of the present disclosure is an IPRF conversion method in an IPRF conversion device, and includes the steps of receiving a plurality of IP packets, each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock; generating a plurality of channel signals by analog converting the plurality of digital signals contained in the received plurality of IP packets using a common second clock; and outputting the generated plurality of channel signals.

[0030] In this way, by using a common second clock to convert multiple digital signals contained in multiple IP packets into analog signals, components such as DACs required to generate multiple channel signals corresponding to multiple channels can be shared, which reduces the number of components and mounting area required to generate channel signals compared to a method of using a single DAC to generate a channel signal corresponding to one channel, thereby achieving lower costs. Therefore, in a system that transmits RF band broadcast signals via IP and then retransmits them, it is possible to retransmit broadcast signals for more channels with a simple configuration while suppressing delays that occur when retransmitting terrestrial digital broadcast signals.

[0031] (7) An RFIP conversion method according to an embodiment of the present disclosure is an RFIP conversion method in an RFIP conversion device, and includes the steps of receiving a terrestrial digital broadcast signal, extracting multiple channel signals from the received broadcast signal, generating multiple digital signals by digitally converting the extracted multiple channel signals using a first clock of the same frequency that is synchronized with each other or a common first clock, and outputting multiple IP packets each including the generated multiple digital signals.

[0032] In this way, by using a first clock having the same frequency and synchronized with each other or a common first clock to digitally convert multiple channel signals to generate multiple digital signals, and outputting multiple IP packets each containing the generated multiple digital signals, a destination device of the IP packets can generate multiple channel signals by analog converting the multiple digital signals using a common clock. This allows the destination device to share components such as DACs required to generate multiple channel signals corresponding to multiple channels, thereby reducing the number of components and mounting area required to generate the channel signals and achieving lower costs compared to a method of using a single DAC to generate a channel signal corresponding to a single channel. Therefore, in a system that transmits RF broadcast signals via IP and then retransmits them, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing delays that occur when retransmitting terrestrial digital broadcast signals.

[0033] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, identical or corresponding parts are designated by the same reference numerals, and their description will not be repeated. Furthermore, at least some of the embodiments described below may be combined in any manner.

[0034] First Embodiment [Configuration and basic operation] 1 is a diagram showing a configuration of an IP transmission system according to a first embodiment of the present disclosure. Referring to FIG. 1, an IP transmission system 401 includes an RFIP conversion device 101 and an IPRF conversion device 201. For example, the RFIP conversion device 101 is provided in a cable television station building 301, and the IPRF conversion device 201 is provided in a building 302 located different from the building 301.

[0035] The RFIP conversion device 101 receives a terrestrial digital broadcasting RF band broadcast signal, which includes, for example, a stream. Hereinafter, the terrestrial digital broadcasting broadcast signal will also be referred to as a terrestrial signal. For example, the terrestrial signal includes multiple channel signals corresponding to multiple channels. The stream includes program information, etc. The program information includes, for example, audio information, video information, EPG (Electronic Program Guide) information, SI (Service Information), and subtitle information. The audio information and video information have been compressed and encrypted, for example, according to a predetermined method.

[0036] The RFIP conversion device 101 extracts a plurality of channel signals corresponding to a predetermined plurality of channels from the received terrestrial signal. The RFIP conversion device 101 generates a plurality of digital signals corresponding to the plurality of channels by digitally converting the extracted channel signals using a clock CL1 having the same frequency and synchronized with each other. More specifically, the RFIP conversion device 101 generates a plurality of digital signals by digitally converting the extracted channel signals at the same timing according to the clock CL1. The clock CL1 is an example of a first clock. The RFIP conversion device 101 transmits a plurality of IP packets, each including the generated digital signals, to the IPRF conversion device 201 via the IP network 311.

[0037] For example, an IP packet output by the RFIP converter 101 is converted into an optical signal in the IP network 311 and transmitted to the IPRF converter 201 by wavelength division multiplexing communication.

[0038] The IPRF conversion device 201 receives a plurality of IP packets from the RFIP conversion device 101 via the IP network 311. The IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals respectively corresponding to a plurality of channels included in the received plurality of IP packets using a common clock CL2. More specifically, the IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals according to the timing of the clock CL2. The clock CL2 is an example of a second clock. The IPRF conversion device 201 outputs the generated plurality of channel signals to the multiplexer 321.

[0039] The multiplexer 321 multiplexes the plurality of channel signals output from the IPRF conversion device 201 and transmits them to each subscriber's home via the cable television network.

[0040] <RFIP conversion device> FIG. 2 is a diagram showing the configuration of the RFIP conversion device according to the first embodiment of the present disclosure. Referring to FIG. 2, the RFIP conversion device 101 includes a plurality of IP transmission units 111, a control unit 121, a backplane 131, and a sub-chassis 141. For example, the RFIP conversion device 101 includes 12 IP transmission units 111.

[0041] The sub-chassis 141 houses the IP transmission units 111, the control unit 121, and the backplane 131. More specifically, the backplane 131 is fixed to the inner wall surface of the sub-chassis 141. The plurality of IP transmission units 111 and the control unit 121 are detachably attached to the backplane 131.

[0042] The backplane 131 transmits various signals between the IP transmission unit 111 and the control unit 121.

[0043] The control unit 121 includes, for example, a high-precision crystal oscillator, and outputs a clock generated by the high-precision crystal oscillator to each IP transmission unit 111 via the backplane 131.

[0044] The IP transmitting unit 111 generates a clock CL1 by dividing or multiplying the clock received from the control unit 121 via the backplane 131. The division or multiplication ratio of the clock in each IP transmitting unit 111 is fixed in advance and is the same for each IP transmitting unit 111. In other words, the clocks CL1 generated in each IP transmitting unit 111 are synchronized with each other and have the same frequency.

[0045] Furthermore, the IP transmission unit 111 receives, via an antenna 191, terrestrial RF signals transmitted from a radio tower (not shown) for relaying streams from broadcast stations. Each IP transmission unit 111 extracts channel signals corresponding to different channels from the terrestrial signals received via the antenna 191. For example, the channel signals to be extracted by each IP transmission unit 111 are predetermined for each IP transmission unit 111. Hereinafter, the channel corresponding to the channel signal to be extracted by each IP transmission unit 111 is also referred to as the target channel.

[0046] For example, the IP transmission unit 111A, which is the IP transmission unit 111, extracts a channel signal chX of a target channel X from a terrestrial signal received via the antenna 191. The IP transmission unit 111A generates a digital signal DX by digitally converting the extracted channel signal chX in accordance with the timing of the generated clock CL1. The IP transmission unit 111A transmits an IP packet PAX including the digital signal DX to the IPRF conversion device 201 via the IP network 311.

[0047] Also, for example, the IP transmission unit 111B, which is the IP transmission unit 111, extracts the channel signal chY of the Y channel, which is the target channel, from the terrestrial wave signal received via the antenna 191. The IP transmission unit 111B generates a digital signal DY by digitally converting the extracted channel signal chY according to the timing of the generated clock CL1. The IP transmission unit 111B transmits an IP packet PAY including the digital signal DY to the IPRF conversion device 201 via the IP network 311.

[0048] <IP transmission unit> FIG. 3 is a diagram showing the configuration of the IP transmission unit in the RFIP conversion device according to the first embodiment of the present disclosure. Referring to FIG. 3, the IP transmission unit 111 includes a reception unit 11, an extraction unit 12, an amplification unit 13, a clock synthesizer 14, an AD (Analog to Digital) conversion unit 15, a filter unit 16, an IP packet generation unit 17, an output unit 18, and a storage unit 19. The AD conversion unit 15 is an example of a generation unit. The storage unit 19 is, for example, a non-volatile memory.

[0049] (Reception unit) The reception unit 11 receives the terrestrial wave signal. More specifically, for example, the reception unit 11 receives the OFDM (Orthogonal Frequency Division Multiplexing) modulated RF band terrestrial wave signal via the antenna 191.

[0050] The reception unit 11 generates a baseband signal by down-converting the received terrestrial wave signal using the direct conversion method. The reception unit 1十一 outputs the generated baseband signal to the extraction unit 12.

[0051] (Extraction unit) The extraction unit 12 extracts the channel signal of the target channel from the terrestrial signal received by the receiving unit 11. More specifically, the extraction unit 12 extracts the channel signal of the target channel from the baseband signal received from the receiving unit 11. The extraction unit 12 outputs the extracted channel signal to the amplification unit 13.

[0052] Specifically, the extraction unit 12 in the IP transmission unit 111A extracts the channel signal chX from the baseband signal received from the reception unit 11 and outputs it to the amplification unit 13. In addition, the extraction unit 12 in the IP transmission unit 111B extracts the channel signal chY from the baseband signal received from the reception unit 11 and outputs it to the amplification unit 13.

[0053] (Amplification section) The amplifier 13 amplifies the channel signal received from the extractor 12. For example, the amplifier 13 performs automatic gain control on the channel signal. More specifically, a detector (not shown) generates a control signal for adjusting the gain of the amplifier 13 so that the level indicated by the digital signal output from the AD converter 15 (described later) becomes a predetermined value, and outputs the generated control signal to the amplifier 13. The amplifier 13 receives the control signal from the detector and changes the gain in accordance with the received control signal, thereby amplifying the channel signal so that the level of the channel signal becomes a predetermined value. The amplifier 13 outputs the amplified channel signal to the AD converter 15.

[0054] (clock synthesizer) The clock synthesizer 14 receives a clock from the control unit 121. The clock synthesizer 14 divides the received clock by a predetermined division ratio or multiplies the clock by a predetermined multiplication ratio to generate a clock CL1 and outputs it to the AD conversion unit 15. The clock synthesizers 14 in each IP transmission unit 111 generate clocks CL1 of the same frequency that are synchronized with each other and output them to the AD conversion unit 15.

[0055] (AD conversion section) In each IP transmission unit 111, the AD conversion unit 15 generates a digital signal by digitally converting the channel signal extracted by the extraction unit 12 using a clock CL1 received from the clock synthesizer 14. More specifically, the AD conversion unit 15 includes an ADC (Analog to Digital Converter) that operates in accordance with the clock CL1 received from the clock synthesizer 14. The AD conversion unit 15 generates a digital signal by digitally converting the channel signal received from the amplification unit 13 in accordance with the timing of the clock CL1, and outputs the generated digital signal to the filter unit 16.

[0056] Specifically, the AD conversion unit 15 in the IP transmission unit 111A receives the channel signal chX from the amplification unit 13, digitally converts the received channel signal chX in accordance with the timing of the clock CL1 to generate a digital signal DX, and outputs the digital signal DX to the filter unit 16. Also, the AD conversion unit 15 in the IP transmission unit 111B receives the channel signal chY from the amplification unit 13, digitally converts the received channel signal chY in accordance with the timing of the clock CL1 to generate a digital signal DY, and outputs the digital signal DY to the filter unit 16.

[0057] (filter section) For example, the filter unit 16 includes an FIR (Finite Impulse Response) filter. The filter unit 16 performs filtering to attenuate signal components of channels other than the target channel in the frequency components indicated by the digital signal generated by the AD conversion unit 15, and outputs the filtered digital signal to the IP packet generation unit 17.

[0058] Specifically, the filter section 16 in the IP sending unit 111A receives the digital signal DX from the AD conversion section 15, attenuates signal components of channels other than the X channel in the frequency components indicated by the received digital signal DX, and outputs the result to the IP packet generation section 17. Also, the filter section 16 in the IP sending unit 111B receives the digital signal DY from the AD conversion section 15, attenuates signal components of channels other than the Y channel in the frequency components indicated by the received digital signal DY, and outputs the result to the IP packet generation section 17.

[0059] (IP packet generation unit) The IP packet generator 17 generates an IP packet including the digital signal generated by the AD converter 15 .

[0060] More specifically, the IP packet generator 17 receives digital signals from the filter unit 16 and stores the received digital signals in a buffer in the storage unit 19. The IP packet generator 17 acquires a predetermined number of samples of digital signals from the storage unit 19 at packet generation timing according to a predetermined cycle, and generates IP packets addressed to the IPRF converter 201 with the acquired digital signals stored in the payload. The IP packet generator 17 outputs the generated IP packets to the output unit 18.

[0061] Specifically, the IP packet generator 17 in the IP transmitting unit 111A generates an IP packet PAX having a predetermined number of samples of the digital signal DX stored in its payload, and outputs the generated IP packet PAX to the output unit 18. Also, the IP packet generator 17 in the IP transmitting unit 111B generates an IP packet PAY having a predetermined number of samples of the digital signal DY stored in its payload, and outputs the generated IP packet PAY to the output unit 18.

[0062] (output section) In each IP transmission unit 111 , the output section 18 outputs an IP packet including the digital signal generated by the AD conversion section 15 .

[0063] More specifically, the output unit 18 in the IP transmission unit 111A transmits the IP packet PAX received from the IP packet generation unit 17 to the IPRF conversion device 201 via the IP network 311. The output unit 18 in the IP transmission unit 111B transmits the IP packet PAY received from the IP packet generation unit 17 to the IPRF conversion device 201 via the IP network 311.

[0064] <IPRF conversion device> FIG. 4 is a diagram showing the configuration of an IPRF conversion device according to the first embodiment of the present disclosure. Referring to FIG. 4, the IPRF conversion device 201 includes a plurality of IP reception units 211, a control unit 221, a backplane 231, and a sub-chassis 241. For example, the IPRF conversion device 201 includes a smaller number of IP reception units 211 than the number of IP transmission units 111 in the RFIP conversion device 101. For example, the IPRF conversion device 201 includes six IP reception units 211.

[0065] The sub-chassis 241 houses the IP reception units 211, the control unit 221, and the backplane 231. More specifically, the backplane 231 is fixed to the inner wall surface of the sub-chassis 241. The IP reception units 211 and the control unit 221 are detachably attached to the backplane 231.

[0066] The backplane 231 transmits various signals between the IP reception units 211 and the control unit 221.

[0067] The control unit 221 includes, for example, a high-precision crystal oscillator. The control unit 221 supplies the clock generated by the high-precision crystal oscillator to each IP reception unit 211 via the backplane 231.

[0068] The IP reception unit 211 generates a clock CL2 obtained by dividing or multiplying the clock received from the control unit 221 via the backplane 231.

[0069] The IP reception unit 211 receives, via the IP network 311, a plurality of IP packets each including a plurality of digital signals generated by digitally converting a plurality of channel signals using the clock CL1 from the RFIP conversion device 101.

[0070] More specifically, for example, the IP reception unit 211A which is the IP reception unit 211 receives the IP packet PAX including the digital signal DX from the IP transmission unit 111A via the IP network 311, and receives the IP packet PAY including the digital signal DY from the IP transmission unit 111B via the IP network 311.

[0071] The IP reception unit 211A generates the channel signals chX and chY by analog-converting the digital signal DX included in the IP packet PAX and the digital signal DY included in the IP packet PAY according to the timing of the generated clock CL2. The IP reception unit 211A outputs the generated channel signals chX and chY to the combiner 321.

[0072] <IP reception unit> FIG. 5 is a diagram showing the configuration of the IP reception unit in the IPRF conversion device according to the first embodiment of the present disclosure. Referring to FIG. 5, the IP reception unit 211 includes a reception unit 21, separation filters 22A and 22B, buffers 23A and 23B, acquisition units 24A and 24B, an adjustment unit 25, a clock synthesizer 26, a DA (Digital to Analog) conversion unit 27, an output unit 28, and a storage unit 29. The DA conversion unit 27 is an example of a generation unit. The storage unit 29 is, for example, a non-volatile memory. The buffers 23A and 23B are, for example, FIFO (First In First Out), and accumulate the IP packets received by the reception unit 21.

[0073] (Reception unit) The receiver 21 receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using the clock CL1. The receiver 21 outputs the received IP packets to the classification filters 22A and 22B.

[0074] More specifically, for example, the receiving unit 21 in the IP receiving unit 211A receives an IP packet PAX containing a digital signal DX and an IP packet PAY containing a digital signal DY from the RFIP conversion device 101 via the IP network 311, and outputs the received IP packets PAX and PAY to the classification filters 22A and 22B.

[0075] (sorting filter) The classification filters 22A and 22B receive a plurality of IP packets from the receiving unit 21 and extract IP packets that contain digital signals corresponding to a predetermined channel from the received plurality of IP packets.

[0076] For example, the classification filter 22A in the IP receiving unit 211A extracts IP packets PAX containing the digital signal DX from a plurality of IP packets received from the receiving unit 21, and stores the extracted IP packets PAX in the buffer 23A. More specifically, the classification filter 22A receives IP packets from the receiving unit 21 and checks the source MAC addresses of the received IP packets. If the source MAC address of the received IP packets does not match the MAC address of the IP transmitting unit 111A, the classification filter 22A discards the IP packets. On the other hand, if the source MAC address of the received IP packets matches the MAC address of the IP transmitting unit 111A, the classification filter 22A stores the IP packets, i.e., the IP packets PAX, in the buffer 23A.

[0077] Also, for example, the classification filter 22B in the IP receiving unit 211A extracts the IP packet PAY containing the digital signal DY from the multiple IP packets received from the receiving unit 21, and stores the extracted IP packet PAY in the buffer 23B. More specifically, the classification filter 22B receives the IP packet from the receiving unit 21 and checks the source MAC address of the received IP packet. If the source MAC address of the received IP packet does not match the MAC address of the IP transmitting unit 111B, the classification filter 22B discards the IP packet. On the other hand, if the source MAC address of the received IP packet matches the MAC address of the IP transmitting unit 111B, the classification filter 22B stores the IP packet, i.e., the IP packet PAY, in the buffer 23B.

[0078] (Acquisition Department) The acquiring units 24A and 24B receive the IP packets output from the buffers 23A and 23B, acquire digital signals corresponding to the channel signals from the received IP packets, and output the digital signals to the DA conversion unit 27.

[0079] More specifically, the acquisition unit 24A in the IP receiving unit 211A receives the IP packets PAX output from the buffer 23A, acquires the digital signal DX from the received IP packets PAX, and outputs the digital signal DX to the DA conversion unit 27. Furthermore, the acquisition unit 24B in the IP receiving unit 211A receives the IP packets PAY output from the buffer 23B, acquires the digital signal DY from the received IP packets PAY, and outputs the digital signal DY to the DA conversion unit 27.

[0080] (clock synthesizer) Clock synthesizer 26 receives a clock from control unit 221. Clock synthesizer 26 generates clock CL2 by dividing or multiplying the received clock, and outputs the clock CL2 to DA conversion unit 27 and adjustment unit 25. When clock synthesizer 26 receives a control signal from adjustment unit 25 as described below, it changes the division ratio or multiplication ratio of the clock received from control unit 221 in accordance with the received control signal.

[0081] (DA conversion section) The DA converter 27 converts the digital signals contained in the IP packets received by the receiver 21 into analog signals using a common clock CL2, thereby generating a plurality of channel signals.

[0082] For example, the DA conversion unit 27 includes one multi-channel DAC that operates in accordance with the clock CL2 received from the clock synthesizer 26. The DA conversion unit 27 uses the DAC to convert a plurality of digital signals into analog signals to generate a plurality of channel signals.

[0083] More specifically, the DA conversion unit 27 generates a plurality of channel signals by converting the digital signals received from the acquisition units 24A and 24B into analog signals in accordance with the timing of the clock CL2 received from the clock synthesizer 26. The DA conversion unit 27 outputs the generated plurality of channel signals to the output unit 28.

[0084] Specifically, the DA conversion unit 27 in the IP receiving unit 211A converts the digital signals DX and DY received from the acquisition units 24A and 24B into analog signals in accordance with the timing of the clock CL2 received from the clock synthesizer 26, thereby generating channel signals chX and chY and outputting them to the output unit 28.

[0085] (output section) The output unit 28 outputs the multiple channel signals generated by the DA conversion unit 27.

[0086] More specifically, the output unit 28 in the IP receiving unit 211A up-converts the channel signals chX and chY received from the DA conversion unit 27 to a desired frequency and outputs the up-converted signals to the multiplexer 321.

[0087] (adjustment section) The adjusting unit 25 adjusts the clock CL2 based on the amount of IP packets stored in the buffers 23A and 23B.

[0088] For example, the adjustment unit 25 monitors the buffers 23A and 23B and counts the IP packets accumulated in the buffers 23A and 23B. Based on the count result of the IP packets, the adjustment unit 25 detects a difference between the clock CL1 used in the RFIP conversion device 101 and the clock CL2 generated by the clock synthesizer 26. Based on the detection result, the adjustment unit 25 performs processing to reduce the difference between the clock CL1 and the clock CL2.

[0089] More specifically, the storage unit 29 stores the number C1 of clocks of the clock CL1 in the period required for the RFIP conversion device 101 to transmit N IP packets, where N is an integer equal to or greater than 1.

[0090] The adjustment unit 25 periodically or irregularly counts the number of clock pulses CNTA of the clock CL2 received from the clock synthesizer 26 during a period until IP packets are accumulated N times in the buffer 23A by the classification filter 22A, and the number of clock pulses CNTB of the clock CL2 received from the clock synthesizer 26 during a period until IP packets are accumulated N times in the buffer 23B by the classification filter 22B. After counting the numbers of clock pulses CNTA and CNTB, the adjustment unit 25 calculates an average value CNTAB of the numbers of clock pulses CNTA and CNTB.

[0091] Then, the adjustment unit 25 calculates the difference between the calculated average value CNTAB and the clock count C1 in the storage unit 29. For example, if the average value CNTAB is greater than the clock count C1, the adjustment unit 25 determines that the frequency of the clock CL2 is greater than the frequency of the clock CL1, whereas if the average value CNTAB is smaller than the clock count C1, the adjustment unit 25 determines that the frequency of the clock CL2 is smaller than the frequency of the clock CL1.

[0092] Based on the calculated difference, the adjustment unit 25 determines the setting value of the clock division ratio or multiplication ratio in the clock synthesizer 26 to bring the frequency of the clock CL2 closer to the frequency of the clock CL1, and outputs a control signal indicating the determined setting value to the clock synthesizer 26.

[0093] When clock synthesizer 26 receives a control signal from adjustment section 25, it changes the division ratio or multiplication ratio of the clock received from control unit 221 to the set value indicated by the received control signal.

[0094] [Operation flow] Each device in the IP transmission system according to the first embodiment of the present disclosure includes a computer including a memory, and a processing unit such as a CPU in the computer reads from the memory and executes a program including some or all of the steps in the following flowcharts and sequences. The programs for each of these devices can be installed externally. The programs for each of these devices are distributed in a state stored on a recording medium or via a communication line.

[0095] FIG. 6 is a flowchart defining an example of an operation procedure when the RFIP conversion device according to the first embodiment of the present disclosure transmits an IP packet.

[0096] 6, first, the RFIP conversion device 101 starts receiving a terrestrial signal, and then down-converts the received terrestrial signal to generate a baseband signal (step S11).

[0097] Next, the RFIP conversion device 101 extracts multiple channel signals from the received terrestrial signal. More specifically, the IP transmission unit 111A in the RFIP conversion device 101 extracts a channel signal chX of an X channel from the baseband signal, and the IP transmission unit 111B in the RFIP conversion device 101 extracts a channel signal chY of a Y channel from the baseband signal (step S12).

[0098] Next, the RFIP conversion device 101 digitally converts the extracted channel signals using a clock CL1 to generate a plurality of digital signals corresponding to the respective channels. More specifically, the IP transmission units 111A and 111B generate a clock CL1 by dividing or multiplying the clock received from the control unit 121. The IP transmission unit 111A then digitally converts the extracted channel signal chX using the generated clock CL1 to generate a digital signal DX, and stores the generated digital signal DX in a buffer in the storage unit 19. The IP transmission unit 111B also digitally converts the extracted channel signal chY using the generated clock CL1 to generate a digital signal DY, and stores the generated digital signal DY in a buffer in the storage unit 19 (step S13).

[0099] Next, the RFIP conversion device 101 waits for a packet generation timing according to a predetermined cycle (NO in step S14), and when the packet generation timing arrives (YES in step S14), it generates an IP packet addressed to the IPRF conversion device 201. More specifically, the IP transmission unit 111A acquires a predetermined number of samples of digital signals DX from the storage unit 19 at the packet generation timing, and generates an IP packet PAX having the acquired predetermined number of samples of digital signals DX stored in its payload. Also, the IP transmission unit 111B acquires a predetermined number of samples of digital signals DY from the storage unit 19 at the packet generation timing, and generates an IP packet PAY having the acquired predetermined number of samples of digital signals DY stored in its payload (step S15).

[0100] Next, the RFIP converter 101 outputs a plurality of IP packets each including a plurality of digital signals. More specifically, the IP transmission unit 111A transmits the IP packet PAX including the digital signal DX to the IPRF converter 201 via the IP network 311. Furthermore, the IP transmission unit 111B transmits the IP packet PAY including the digital signal DY to the IPRF converter 201 via the IP network 311 (step S16).

[0101] Next, the RFIP conversion device 101 waits for a new packet generation timing (NO in step S14).

[0102] FIG. 7 is a flowchart defining an example of an operation procedure when the IPRF conversion device according to the first embodiment of the present disclosure outputs a channel signal.

[0103] 7, first, the IPRF converter 201 waits for the arrival of IP packets (NO in step S21), and upon receiving a plurality of IP packets each including a plurality of digital signals generated by digitally converting a plurality of channel signals using the clock CL1 (YES in step S21), stores the received IP packets in buffers 23A and 23B. More specifically, the IP receiving unit 211A in the IPRF converter 201 receives the IP packets PAX and PAY from the RFIP converter 101 via the IP network 311, and stores the received IP packets PAX and PAY in buffers 23A and 23B, respectively (step S22).

[0104] Next, the IPRF converter 201 generates a plurality of channel signals by converting the plurality of digital signals contained in the IP packets output from the buffers 23A and 23B into analog signals using a common clock CL2. More specifically, the IP receiving unit 211A in the IPRF converter 201 acquires the digital signals DX and DY from the IP packets PAX and PAY output from the buffers 23A and 23B, and generates the channel signals chX and chY by converting the acquired digital signals DX and DY into analog signals using the common clock CL2 (step S23).

[0105] Next, the IPRF conversion device 201 outputs the generated multiple channel signals. More specifically, the IP receiving unit 211A up-converts the generated channel signals chX and chY to a desired frequency and outputs them to the multiplexer 321 (step S24).

[0106] Next, the IPRF converter 201 waits for the arrival of a new IP packet (NO in step S21).

[0107] FIG. 8 is a diagram illustrating an example of a sequence of IP packet transmission processing in the IP transmission system according to the first embodiment of the present disclosure.

[0108] Referring to FIG. 8, first, IP transmission units 111A and 111B in RFIP conversion device 101 receive terrestrial signals via antenna 191 (step S31).

[0109] Next, the IP transmission unit 111A extracts the channel signal chX from the terrestrial signal (step S32).

[0110] Furthermore, the IP transmission unit 111B extracts the channel signal chY from the terrestrial signal (step S33).

[0111] Next, the IP transmission unit 111A converts the channel signal chX into a digital signal DX using the clock CL1 (step S34).

[0112] Furthermore, the IP transmission unit 111B converts the channel signal chY into a digital signal using the clock CL1 to generate a digital signal DY (step S35).

[0113] Next, the IP transmission unit 111A generates an IP packet PAX in which a predetermined number of samples of the digital signal DX are stored in the payload (step S36).

[0114] Furthermore, the IP transmission unit 111B generates an IP packet PAY in which a predetermined number of samples of the digital signal DY are stored in the payload (step S37).

[0115] Next, the IP transmission unit 111A transmits the IP packet PAX to the IPRF conversion device 201 via the IP network 311 (step S38).

[0116] Furthermore, the IP transmission unit 111B transmits the IP packet PAY to the IPRF conversion device 201 via the IP network 311 (step S39).

[0117] Next, the IP receiving unit 211A in the IPRF converter 201 accumulates the IP packets PAX and PAY received from the IP transmitting units 111A and 111B via the IP network 311 in the buffers 32A and 32B, respectively (step S40).

[0118] Next, the IP receiving unit 211A generates channel signals chX and chY by converting the digital signals DX and DY contained in the IP packets PAX and PAY output from the buffers 23A and 23B into analog signals using the clock CL2 (step S41).

[0119] Next, the IP receiving unit 211A up-converts the channel signals chX and chY to a desired frequency and outputs the up-converted signals to the multiplexer 321 (step S42).

[0120] In the IPRF conversion device 201 according to the first embodiment of the present disclosure, the IP receiving unit 211 is configured to include the adjustment unit 25, but this is not limiting. The IP receiving unit 211 may not include the adjustment unit 25.

[0121] Furthermore, in the IPRF conversion device 201 according to the first embodiment of the present disclosure, the adjustment unit 25 is configured to calculate an average value CNTAB of the clock numbers CNTA and CNTB, and determine a setting value for the clock division ratio or multiplication ratio in the clock synthesizer 26 based on the difference between the calculated average value CNTAB and the clock number C1 in the storage unit 29. However, this is not limited to this. The adjustment unit 25 may be configured to count the clock number CNTA and determine the setting value based on the difference between the clock number CNTA and the clock number C1. Alternatively, the adjustment unit 25 may be configured to count the clock number CNTB and determine the setting value based on the difference between the clock number CNTB and the clock number C1.

[0122] A configuration in which the setting value is determined based on the difference between the average value CNTAB and the clock count C1 makes it possible to determine a more appropriate setting value for the frequency division ratio or multiplication ratio compared to a configuration in which the setting value is determined based on the difference between the clock count CNTA or the clock count CNTB and the clock count C1 when packet loss occurs between the RFIP conversion device 101 and the IPRF conversion device 201. On the other hand, when the frequency of packet loss between the RFIP conversion device 101 and the IPRF conversion device 201 is low and there is a high possibility that multiple IP packets corresponding to multiple channels will be lost all at once due to congestion in the IP network 311, a simple configuration in which the setting value is determined based on the difference between the clock count CNTA or the clock count CNTB and the clock count C1 may be employed.

[0123] In the RFIP conversion device 101 according to the first embodiment of the present disclosure, the receiving unit 11 in the IP transmission unit 111 is configured to generate a baseband signal by down-converting the received terrestrial signal using a direct conversion method, but this is not limited to this. The receiving unit 11 may be configured to generate an intermediate frequency (IF) signal by down-converting the terrestrial signal using a superheterodyne method and output the generated IF signal to the extraction unit 12.

[0124] Furthermore, in the RFIP conversion device 101 according to the first embodiment of the present disclosure, each IP transmission unit 111 is configured to extract a channel signal of one target channel from a terrestrial signal received via the antenna 191, generate digital signals by digitally converting the extracted channel signals using a clock CL1 having the same frequency that is synchronized with each other, and output an IP packet including the generated digital signals, but this is not limited to this. The IP transmission unit 111 may also be configured to extract channel signals of multiple target channels from a terrestrial signal received via the antenna 191, generate multiple digital signals by digitally converting the extracted channel signals using a common clock CL1, and output multiple IP packets including each of the generated digital signals.

[0125] In systems that transmit RF broadcast signals via IP and then retransmit them, there is a need for a technology that can retransmit broadcast signals of more channels with a simple configuration while minimizing the delay that occurs when retransmitting terrestrial digital broadcast signals. For example, in cable television broadcasting emergency news, there is a need to reduce the delay that occurs when retransmitting.

[0126] In the technologies described in Patent Documents 1 and 3, the modulated signal must be demodulated before IP transmission, and then modulated again after IP transmission and retransmitted, resulting in a significant delay when the broadcast signal is retransmitted. For example, in a system that retransmits terrestrial digital broadcast signals, the demodulation and remodulation of the modulated signal takes a particularly long time, resulting in a significant delay.

[0127] Furthermore, Patent Document 2 discloses a system in which a frequency conversion device that converts IP packets into RF signals for terrestrial digital broadcasting is installed within viewer equipment. When installing such a frequency conversion device in a cable television station building, it is desirable to make the device more compact. In particular, compared to a building that installs a device that receives terrestrial signals and transmits IP packets, a building that installs a device that receives the IP packets and outputs RF signals is often smaller in size and has limited space for installing the device.

[0128] In contrast, in the IP transmission system 401 according to the first embodiment of the present disclosure, the RFIP conversion device 101 generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial signal using a clock CL1 having the same frequency that is synchronized with each other or a common clock CL1, and transmits a plurality of IP packets each including the generated plurality of digital signals to the IPRF conversion device 201. The IPRF conversion device 201 generates a plurality of channel signals by analog converting the plurality of digital signals included in the plurality of IP packets received from the RFIP conversion device 101 using a common clock CL2, and outputs the generated plurality of channel signals.

[0129] In this way, by configuring the IPRF conversion device to convert multiple digital signals contained in multiple IP packets to analog signals using a common clock CL2, components such as DACs required to generate multiple channel signals corresponding to multiple channels can be shared. This allows for a reduction in the number of components and mounting area required to generate channel signals, thereby achieving cost reduction compared to a configuration in which a single DAC is used to generate channel signals corresponding to a single channel. Specifically, in a configuration in which the IPRF conversion device includes an IP receiving unit that receives IP packets and generates channel signals, and a sub-chassis that accommodates the IP receiving unit, the sub-chassis can accommodate the IP receiving unit more efficiently. Therefore, in a system that transmits RF broadcast signals via IP and then retransmits them, it is possible to retransmit broadcast signals for more channels with a simple configuration while keeping the delay that occurs when retransmitting terrestrial digital broadcast signals within an acceptable range.

[0130] Next, other embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals and their description will not be repeated.

[0131] <Second embodiment> In comparison with the IP transmission system 401 according to the first embodiment, this embodiment relates to an IP transmission system 402 including a plurality of RFIP conversion devices 101 and a plurality of IPRF conversion devices 201. The contents other than those described below are the same as those of the IP transmission system 401 according to the first embodiment.

[0132] 9 is a diagram illustrating a configuration of an IP transmission system according to the second embodiment of the present disclosure. Referring to FIG. 9, an IP transmission system 402 includes a plurality of RFIP conversion devices 101 and a plurality of IPRF conversion devices 201.

[0133] For example, the multiple RFIP conversion devices 101 generate multiple digital signals corresponding to the multiple channels by digitally converting the multiple channel signals using clocks CL1 that are synchronized with each other and have the same frequency. That is, the clocks CL1 used in the multiple RFIP conversion devices 101 are synchronized with each other and have the same frequency.

[0134] Fig. 10 is a diagram illustrating an example of the configuration of a control unit in an RFIP conversion device according to the second embodiment of the present disclosure, which shows a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

[0135] 10, the control units 121A, 121B, and 121C include switches SWA, SWB, and SWC and high-precision crystal oscillators VA, VB, and VC, respectively. The control unit 121 outputs the clock to be output to the IP transmission unit 111 to the control unit 121 in the RFIP conversion device 101 at the subsequent stage. In the following, the RFIP conversion device 101A is assumed to be the RFIP conversion device 101 at the front stage.

[0136] The switch SWA can be switched between a state in which the IP transmission unit 111 in the RFIP conversion device 101A and the control unit 121 in another RFIP conversion device 101 are connected, and a state in which the IP transmission unit 111 in the RFIP conversion device 101A and the high-precision crystal oscillator VA are connected, in accordance with a switch control signal from a control device not shown.

[0137] In addition, the switch SWB can be switched between a state in which the IP transmitting unit 111 in the RFIP conversion device 101B and the control unit 121A in the other RFIP conversion device 101A are connected, and a state in which the IP transmitting unit 111 in the RFIP conversion device 101B and the high-precision crystal oscillator VB are connected, in accordance with a switch control signal from a control device not shown.

[0138] In addition, the switch SWC can be switched between a state in which the IP transmission unit 111 in the RFIP conversion device 101C and the control unit 121B in the other RFIP conversion device 101B are connected, and a state in which the IP transmission unit 111 in the RFIP conversion device 101C and the high-precision crystal oscillator VC are connected, in accordance with a switch control signal from a control device not shown.

[0139] 10, the switch SWA in the RFIP conversion device 101A, which does not have a previous RFIP conversion device 101, is connected to the IP transmission unit 111 and high-precision crystal oscillator VA in the RFIP conversion device 101A. The switch SWB is connected to the IP transmission unit 111 in the RFIP conversion device 101B and the control unit 121A in the previous RFIP conversion device 101A. The switch SWC is connected to the IP transmission unit 111 in the RFIP conversion device 101C and the control unit 121B in the previous RFIP conversion device 101B.

[0140] In this way, the clock generated by the high-precision crystal oscillator VA in the control unit 121A is output to each IP transmitting unit 111 in the RFIP conversion device 101A and each IP transmitting unit 111 in the RFIP conversion device 101 subsequent to the RFIP conversion device 101A. Each IP transmitting unit 111 in the RFIP conversion device 101A and each IP transmitting unit 111 in the RFIP conversion device 101 subsequent to the RFIP conversion device 101A receives the clock generated by the high-precision crystal oscillator VA and generates a clock CL1 by dividing or multiplying the received clock. As a result, clocks CL1 that are synchronized with each other and have the same frequency are generated in the multiple RFIP conversion devices 101.

[0141] Therefore, in an IP transmission system 402 in which an IPRF conversion device 201 receives IP packets from multiple RFIP conversion devices 101 via an IP network 311, the IPRF conversion device 201 can convert multiple digital signals contained in the received multiple IP packets into analog signals using a common clock CL2 to generate multiple channel signals.

[0142] 11 is a diagram illustrating another example of the configuration of a control unit in an RFIP conversion device according to the second embodiment of the present disclosure, which illustrates a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

[0143] 11, control units 121A, 121B, and 121C include PLL control units PA, PB, and PC and high-precision crystal oscillators VA, VB, and VC, respectively. Control unit 121 outputs the clock to be output to IP transmission unit 111 to control unit 121 in RFIP conversion device 101 at the subsequent stage.

[0144] In an RFIP conversion device 101A in which there is no preceding RFIP conversion device 101, a PLL control unit PA in a control unit 121A outputs a free-running clock, i.e., a clock output from a high-precision crystal oscillator VA, to each IP transmission unit 111 in the RFIP conversion device 101A and to a control unit 121B in an RFIP conversion device 101B subsequent to the RFIP conversion device 101A.

[0145] Furthermore, the PLL control unit PB in the control unit 121B receives a clock from the control unit 121A and high-precision crystal oscillator VB in the RFIP conversion device 101A at the preceding stage. Using the clock received from the control unit 121A as a reference signal, the PLL control unit PB performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator VB with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101B and to the control unit 121C in the RFIP conversion device 101C at the subsequent stage of the RFIP conversion device 101B.

[0146] Furthermore, the PLL control unit PC in the control unit 121C receives a clock from the control unit 121B and high-precision crystal oscillator VC in the RFIP conversion device 101B at the preceding stage. Using the clock received from the control unit 121B as a reference signal, the PLL control unit PC performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator VC with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101C and the control unit 121 in the RFIP conversion device 101 at the subsequent stage of the RFIP conversion device 101C.

[0147] As a result, the plurality of RFIP conversion devices 101 generate clocks CL1 that are synchronized with each other and have the same frequency.

[0148] Fig. 12 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure, which illustrates a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

[0149] 12, control units 121A, 121B, and 121C include PLL control units PA, PB, and PC and high-precision crystal oscillators VA, VB, and VC, respectively. Control unit 121 outputs the clock to be output to IP transmission unit 111 to control unit 121 in RFIP conversion device 101 at the subsequent stage.

[0150] The GPS (Global Positioning System) receiving unit 122 receives radio waves transmitted from GPS satellites, generates a reference signal based on time information contained in the received radio waves, and transmits the generated reference signal to the control unit 121A.

[0151] The PLL control unit PA in the control unit 121A receives a reference signal from the GPS receiving unit 122 and also receives a clock from the high-precision crystal oscillator VA. Using the reference signal received from the GPS receiving unit 122, the PLL control unit PA performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator VA with the reference signal, and outputs the feedback-controlled clock to each IP transmitting unit 111 in the RFIP conversion device 101A and to the control unit 121B in the RFIP conversion device 101B downstream of the RFIP conversion device 101A.

[0152] The operations of the PLL control units PB and PC in the control units 121B and 121C are as described with reference to FIG.

[0153] Fig. 13 is a diagram illustrating another example of the configuration of a control unit in an RFIP conversion device according to the second embodiment of the present disclosure, which illustrates a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

[0154] Referring to FIG. 13, control units 121A, 121B, and 121C include PLL control units PA, PB, and PC and high-precision crystal oscillators VA, VB, and VC, respectively.

[0155] The GPS receiver 122 receives radio waves transmitted from GPS satellites, generates a reference signal based on the time information contained in the received radio waves, and transmits the generated reference signal to the control unit 121 in each RFIP conversion device 101.

[0156] The PLL control unit in the control unit 121 of each RFIP conversion device 101 receives a reference signal from the GPS receiving unit 122 and also receives a clock from the high-precision crystal oscillator. Using the reference signal received from the GPS receiving unit 122, the PLL control unit performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101.

[0157] The above-described embodiments should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0158] The above description includes the following additional features. [Appendix 1] an RFIP conversion device; an IPRF conversion device; the RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock having the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each including the generated plurality of digital signals to the IPRF conversion device; the IPRF converter generates a plurality of channel signals by converting the plurality of digital signals included in the plurality of IP packets received from the RFIP converter using a common second clock, and outputs the generated plurality of channel signals; The RFIP conversion device includes a plurality of IP transmission units; The IPRF conversion device includes one or more IP receiving units; each of the IP receiving units digitally converts the channel signal using the first clock to generate the digital signal, and transmits the IP packet including the generated digital signal to the IPRF converting device; the IP receiving unit generates the plurality of channel signals by converting the plurality of digital signals included in the plurality of IP packets received from the RFIP converting device into analog signals using the second clock, and outputs the generated plurality of channel signals; The IP transmission system, wherein the IPRF conversion device includes a smaller number of the IP receiving units than the number of the IP transmitting units in the RFIP conversion device. [Explanation of symbols]

[0159] 11 Receiving unit 12 Extraction part 13 Amplification section 14 Clock Synthesizer 15 AD conversion section 16 Filter section 17 IP packet generator 18 Output section 19 Memory section 21 Receiving unit 22A, 22B Separation Filter 23A, 23B buffer 24A,24B Acquisition Department 25 Adjustment part 26 Clock Synthesizer 27 DA conversion section 28 Output section 29 Memory section 101 RFIP conversion device 111, 111A, 111B IP transmission unit 121, 121A, 121B, 121C control unit 122 GPS receiver 131 Backplane 141 subchassis 191 Antenna 201 IPRF conversion device 211, 211A IP receiving unit 221 Control Unit 231 Backplane 241 subchassis 301,302 Station Building 311 IP network 321 Multiplexer 401,402 IP Transmission System SWA, SWB, SWC switches VA, VB, VC high precision crystal oscillator PA, PB, PC PLL control section

Claims

1. an RFIP conversion device; an IPRF conversion device; the RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock having the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each including the generated plurality of digital signals to the IPRF conversion device; the IPRF converter generates a plurality of channel signals by converting the plurality of digital signals included in the plurality of IP packets received from the RFIP converter using a common second clock, and outputs the generated plurality of channel signals; The RFIP conversion device includes a plurality of IP transmission units; the IPRF conversion device includes one or more IP receiving units; each of the IP transmitting units digitally converts the channel signal using the first clock to generate the digital signal, and transmits the IP packet including the generated digital signal to the IPRF converting device; the IP receiving unit generates the plurality of channel signals by converting the plurality of digital signals included in the plurality of IP packets received from the RFIP converting device into analog signals using the second clock, and outputs the generated plurality of channel signals; The IP transmission system, wherein the IPRF conversion device includes a number of the IP receiving units that is less than the number of the IP transmitting units in the RFIP conversion device.

2. An IP transmission method in an IP transmission system including an RFIP conversion device and an IPRF conversion device, a step in which the RFIP conversion device digitally converts a plurality of channel signals extracted from a terrestrial digital broadcasting signal using a first clock having the same frequency that is synchronized with each other or a common first clock to generate a plurality of digital signals, and transmits a plurality of IP packets each including the generated plurality of digital signals to the IPRF conversion device; the IPRF converting device converts the digital signals included in the IP packets received from the RFIP converting device into analog signals using a common second clock, thereby generating a plurality of channel signals, and outputting the generated channel signals; The RFIP conversion device includes a plurality of IP transmission units; the IPRF conversion device includes one or more IP receiving units; In the step of transmitting the plurality of IP packets from the RFIP conversion device to the IPRF conversion device, each of the IP transmission units generates the digital signal by digitally converting the channel signal using the first clock, and transmits the IP packet including the generated digital signal to the IPRF conversion device; In the step of the IPRF converting device outputting the plurality of channel signals, the IP receiving unit generates the plurality of channel signals by converting the plurality of digital signals included in the plurality of IP packets received from the RFIP converting device into analog signals using the second clock, and outputs the generated plurality of channel signals; The IP transmission method, wherein the IPRF conversion device includes a number of the IP receiving units that is less than the number of the IP transmitting units in the RFIP conversion device.

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