Method and apparatus for bonding chips

Abstract

To provide a method and a device for bonding a chip to a substrate, particularly a semiconductor substrate or another chip.SOLUTION: In a method of bonding a chip to a substrate or another chip, a chip 7 is bonded to a substrate 11' or another chip by performing direct-bonding to obtain a final product 19.SELECTED DRAWING: Figure 1g

Description

[Technical Field]

[0001] The present invention relates to a method and apparatus for bonding chips.

[0002] Chip-to-wafer (C2W) or chip-to-chip (C2C) processes are conventionally implemented via copper pillars with solder balls or solder caps, but these are extremely large, increasing the thickness of the chips thus formed.

[0003] It is therefore an object of the present invention to provide an improved joining method or an improved joining device or an improved product.

[0004] This problem is solved by the subject matter of the independent claims. The dependent claims describe advantageous developments of the invention. The scope of the invention also includes all combinations of at least two of the features described in the description, claims and / or drawings. Furthermore, where ranges of values ​​are given, the values ​​within the stated limits are also to be considered as disclosed limits, and any combination of these values ​​may be claimed.

[0005] The present invention proposes a method for bonding a chip to a substrate, in particular a semiconductor substrate or another chip, in which the chip is bonded to the substrate or another chip by direct bonding. Direct bonding is a bond formed through the direct interaction of two surfaces without the formation of a liquid phase. According to another conceptual definition, direct bonding is a bond that does not require the use of additional materials. In particular, direct bonding refers to solid-state bonding of metal to metal, in particular diffusion bonding, pre-bonding or fusion bonding resulting from pre-bonding, or hybrid bonding, i.e., bonding based on fusion bonding components and metal bonding components.

[0006] Furthermore, the present invention proposes an apparatus for bonding a chip to a substrate or another chip, whereby the chip can be bonded to the substrate or another chip by direct bonding.

[0007] Furthermore, the present invention proposes a chip stack consisting of a plurality of chips, which are bonded to one another by direct bonding.

[0008] Furthermore, the present invention proposes a substrate (product) equipped with a chip, the chip being bonded to the substrate by direct bonding.

[0009] The present invention realizes the possibility of direct bonding in the C2C or C2W plane. Advantageously, copper pillars with solder balls or solder caps are no longer required. The thickness of the resulting chip stack or product is reduced, increasing throughput and enhancing chip-to-chip communication performance. This direct bonding in particular has a bonding strength greater than 0.1 J / m², preferably greater than 0.5 J / m², more preferably greater than 1.0 J / m², most preferably greater than 2.0 J / m², and most preferably greater than 2.5 J / m². This direct bonding is particularly performed at temperatures below 400°C, preferably below 300°C, more preferably below 200°C, most preferably below 150°C, and most preferably below 100°C. Furthermore, this direct bonding is performed without the formation of a liquid phase.

[0010] The idea behind the present invention is to keep the chip surface clean so that a subsequent direct bonding step can be performed: the chip with the clean bonding surface thus prepared can then be bonded to a substrate (in English chip-to-wafer, C2W) or to another chip (in English chip-to-chip, C2C).

[0011] In the remainder of this specification, a substrate or semiconductor substrate refers to a semi-finished product of the semiconductor industry that has not yet been singulated and is in particular circular. Particularly preferably, the substrate is a wafer. The substrate can have any arbitrary shape, but is preferably circular. The diameter of the substrate is particularly standardized in the industry. Common diameters in the industry for wafers are 1 inch, 2 inches, 3 inches, 4 inches, 5 inches, 6 inches, 8 inches, 12 inches and 18 inches. However, embodiments of the present invention can handle essentially any substrate, regardless of its diameter.

[0012] For the remainder of this specification, a chip refers to a usually rectangular portion obtained by singulation of a semiconductor substrate (wafer). A chip typically contains an integrated circuit resulting from processing of the semiconductor substrate.

[0013] By bonding surface, we mean a surface that will become part of the bonding interface at some point during the process. More specifically, the bonding surface is the chip surface that needs to be treated, especially cleaned, according to the present invention before bonding the chip. If the chip is bonded to a substrate, the substrate surface can also be referred to as the bonding surface.

[0014] According to one preferred embodiment, the bonding surface is a hybrid bonding surface. A hybrid bonding surface is a bonding surface consisting of a metal region and a dielectric region, i.e., a metal bonding surface portion and a dielectric bonding surface portion. Therefore, all methods and / or devices generally described herein that relate to direct bonding can be applied to bonding hybrid surfaces. Preferably, the metal surface portion and the dielectric surface portion are located over a large area within a single plane. In particular, the metal surface portion is recessed or protrudes from the dielectric surface portion by less than 0.5 μm, preferably less than 100 nm, more preferably less than 50 nm, and most preferably less than 10 nm.

[0015] Cleaning method In the remainder of this specification, cleaning refers to the removal of dirt from the joining surfaces by one and / or more of the following methods: Wet chemical cleaning, especially o Water, especially *CO2-containing water Alcohol o acids, especially *Formic acid *Citric acid *Persulfuric acid *Standard Clean 1 (SC1) *Standard Clean 2 (SC2) o bases, especially *NH4OH Wet chemical cleaning by Plasma cleaning Plasma ashing Mechanical cleaning, especially Brushing

[0016] Plasma cleaning is the bombardment of a surface, typically with high energy, by the ionized portion of a plasma, where the ions are accelerated by an electric and / or magnetic field and have a non-negligible penetration depth. Plasma cleaning can be accompanied by plasma activation of the surface.

[0017] Plasma ashing is a generally low-energy process for cleaning organic materials from surfaces. This cleaning is achieved by oxidation of organic species, particularly with oxygen and / or fluorine, or any other suitable ionizable oxidizing agent. The organic components oxidized by plasma ashing are preferably removed from the reaction chamber. This can be achieved by a continuous flow of plasma or by sequential evacuation and venting of the plasma chamber. Of course, according to one preferred embodiment, the ashed and oxidized organic components are bound by chemical and / or physical methods in the plasma chamber to prevent them from returning to the substrate surface. This avoids the complex mechanism of circulating the plasma.

[0018] Optionally, after the plasma ashing, a wet chemical cleaning with one or more of the above-mentioned liquids is carried out in order to further improve the cleanliness of the surface and / or the surface chemistry of the surface to be cleaned, in particular to optimize it by stopping the surface with species known to those skilled in the art that are suitable for bonding. Advantageously, this method is used in particular to remove particles generated during the plasma ashing and / or left behind on the surface.

[0019] That is, cleaning of the bonding surfaces can be performed by more than one of the above methods. Cleaning can be performed on a single chip or on multiple chips simultaneously. In particular, individual chips can be cleaned as they are transferred between the two stations.

[0020] Self-alignment According to one preferred embodiment, the chip is positioned and self-aligned: self-alignment is the process of positioning an object, in this case a chip, driven by the laws of physics of minimization.

[0021] Self-alignment is preferably achieved by the chip being forced onto the joining surface, in particular into a central position between structures of the joining surface, due to the slight static friction caused by the liquid deposited on the joining surface.

[0022] For example, consider a case where four metal regions, especially metal bonding areas, are present on the bonding surface, such as contact pads or vias, as part of the hybrid bonding surface. A chip also has four regions on its bonding surface. When such a chip is placed on a liquid, it must be assumed that the hydrophilic regions are positioned on top of the hydrophilic regions and the hydrophobic regions are positioned on top of the hydrophobic regions. This causes alignment, whereby the metal regions of the hybrid bonding surface are aligned.

[0023] As will be apparent to those skilled in the art, the more symmetrical the structures involved in self-alignment, the better this type of self-alignment can be achieved. These structures include the geometry of the chip, the spacing between the metal regions of the hybrid bonding surface, and the shape of the metal regions. Preferably, the chip is square. Furthermore, the metal regions of the hybrid bonding surface are preferably located at the corners of an imaginary square. Further advantages can be obtained if the difference between the hydrophilicity and hydrophobicity of the corresponding hybrid bonding regions is as large as possible. A standard measure of hydrophilicity or hydrophobicity is the contact angle formed between a test droplet, particularly water, and the surface to be measured. A hydrophilic surface flattens the droplet because the adhesive forces between the liquid and the surface overcome the cohesive forces of the liquid, resulting in a small contact angle. A hydrophobic surface causes the droplet to assume a spherical shape because the cohesive forces of the liquid overcome the adhesive forces between the liquid and the surface. Preferably, the contact angle difference between the two different hybrid bonded regions is greater than 1°, preferably greater than 5°, even more preferably greater than 25°, most preferably greater than 50°, and very most preferably greater than 100°.

[0024] The thickness of the liquid layer applied to the joining surface is less than 2 mm, preferably less than 1.5 mm, more preferably less than 1 mm, most preferably less than 0.5 mm, and most preferably less than 0.1 mm. The liquid is preferably water, although any other liquid, e.g. ·alcohol ·ether ·acid ·base It is also possible to use

[0025] Ethers, in particular, have a significantly higher vapor pressure and therefore evaporate almost completely from the surface, resulting in automatic removal of the liquid after self-alignment has been achieved. Advantageously, pre-bonding occurs automatically after removal of the liquid between the surfaces.

[0026] According to a particular embodiment of the invention, grooves are provided in the bonding surfaces of the substrate and / or chip, in particular in the dielectric region, which facilitate or only allow the removal of the liquid after self-alignment of the chip, preferably leading from the region of the chip surface to the chip periphery, so that the liquid can be removed by flowing outwards and / or by evaporation, preferably automatically, more preferably with the aid of gravity, which pushes the liquid outwards.

[0027] Bonding device and bonding method Several devices and processes for bonding chips according to the present invention are disclosed. The methods according to the present invention can be divided into individual bonding methods and collective bonding methods. The corresponding devices are therefore individual bonding devices or collective bonding devices. What all the methods and devices according to the present invention have in common is that the bonding surfaces of the chips must be clean leading up to the bonding process. The process steps and equipment according to the present invention for achieving this goal are described in more detail below.

[0028] Individual joining device and individual joining method Individual bonding is a common process in the prior art for placing chips individually, i.e., one after the other, on another chip (C2C) or wafer (C2W). The advantage of such a method is that chips of different sizes and / or different functions can be bonded.

[0029] Individualization on tape sheets According to a first exemplary method according to the invention, the substrate is fixed on a support, in particular a tape sheet (in English: tape), and there it is singulated into a plurality of chips. In the remainder of the description, a tape sheet is used as an exemplary embodiment. However, it is also conceivable to use a rigid support; in this case, the chips are only produced after the substrate has been fixed on the tape sheet.

[0030] In the first process step of this method, the support, in particular the tape sheet, is fixed on a fixing means, in particular a frame (in English a dicing frame). If the support is a rigid support, this process step can be omitted or the rigid support can be fixed on a substrate holder / support holder.

[0031] In an optional second process step, the bonding surface of the substrate, from which the subsequent bonding surface of the chip is produced, is cleaned. This cleaning can be one of the cleaning methods already mentioned. In particular, cleaning is carried out with plasma and / or liquids and / or gases. Preferably, the plasma treatment additionally results in plasma activation of the bonding surface. The bonding surface only needs to be cleaned if it has been contaminated by a previous process, such that the contamination is transferred to the tape sheet, or if contamination is present that would subsequently prevent and / or impair the formation of a direct bond. However, preferably, the bonding surface of the substrate is always cleaned before fastening.

[0032] In the third process step according to the invention, the substrate is fixed on the support, in particular at its bonding surface, which has been cleaned and preferably plasma activated. The tape sheet according to the invention is designed in such a way that the bonding surface is as little contaminated as possible after the substrate is removed from the support. If the support is rigid, it may be necessary to provide a protective layer on the support surface before the substrate is fixed. In the case of a tape sheet, such a protective layer is usually already provided.

[0033] Furthermore, the support also serves as a protection for the bonding surfaces after contact and prevents contamination of the bonding surfaces. Preferably, the support is coated so that slight adhesion occurs between the bonding surface of the substrate and the support, at least in the central majority of the substrate, while the support can have sufficient adhesion properties in the peripheral region of the substrate. Areas with high adhesion, i.e., areas with stronger adhesion, will likely cause contamination at the periphery of the substrate, which can preferably be ignored unless they correspond to the areas of the bonding surface from which chips will later be fabricated. Preferably, the tape sheet is formed so that the adhesive force can be weakened by energy injection (UV, heat) into the tape sheet, thereby making it easier to later remove the chips. Such tape sheets are known in the prior art.

[0034] Preferably, however, particularly clean tape sheets are used for the process according to the invention.

[0035] Preferably, the tape sheet contains an adhesive that cannot penetrate the joining surface, especially into the reservoirs formed by the previous plasma activation. This is preferably ensured by the adhesive having a significantly higher viscosity, which prevents penetration into the nanoporous surface. More preferably, the adhesive molecules are so large that they cannot penetrate the pores. The pores are particularly smaller than 10 nm, more preferably smaller than 5 nm, most preferably smaller than 1 nm, even more preferably smaller than 0.5 nm, and most preferably smaller than 0.2 nm. The pore sizes are also disclosed in WO2012100786A1. Most preferably, the adhesive is a solid bound within a polymer matrix. Preferably, this form of adhesive makes it possible to dispense with solvent cleaning after removing the tape sheet, thus avoiding solvent deposition in the reservoirs formed on the joining surface by plasma activation. This improves the joining result. This is because it is possible to prevent the solvent from being released as a gas after bonding, that is, to prevent bubbles from being formed at the bonding interface.

[0036] The formation of such reservoirs is disclosed in the following publications: International Publication No. 2012100786 (WO2012100786A1), International Publication No. 2012136267 (WO2012136267A1), International Publication No. 2012136268 (WO2012136268A1), International Publication No. 2012136266 (WO2012136266A1) and International Publication No. 2014015899 (WO2014015899A1).

[0037] However, according to a highly preferred embodiment of the present invention, the support is coated so that the substrate can be fixed over its entire surface, no dirt is left on the substrate and the subsequently formed chips can be easily removed.

[0038] In the fourth process step of the present invention, the substrates are singulated. This singulation can be performed by any method as long as the joining surfaces are not contaminated. Several singulation methods will be detailed in the following description, which will ensure that the joining surfaces remain clean during the singulation process.

[0039] In a fifth process step according to the invention, the individual chips are removed from the support by a machine, in particular a chip joiner. According to a particularly preferred embodiment according to the invention, during the chip removal and / or transfer of the chip to another position, in particular a joining position, a further, in particular continuous cleaning of the joining surface of the chip is performed. This cleaning is preferably performed by plasma. The chip passes through an area where this cleaning is performed, or the chip is removed from the support in a chamber where this cleaning occurs automatically. Thus, for example, it is conceivable to remove the chip from the support by the chip joiner in a plasma chamber. More preferably, after the chip has been removed from the support, it is moved past an atmospheric plasma source. In particular, oxygen plasma is preferably used, which preferably results in ashing of residues.

[0040] In a sixth process step according to the present invention, the bonding surface of the transferred singulated chip is bonded to a second bonding surface by bonding, particularly by direct bonding or hybrid bonding. This bonding process is preceded by an alignment process of the chip with respect to the second bonding surface to which the chip is to be bonded, which is generally carried out relatively quickly. The improvements according to the present invention for optimal bonding are discussed in more detail in another section of this specification. Preferably, this alignment process takes less than 5 seconds, more preferably less than 2 seconds, and most preferably less than 1 second.

[0041] Individualization method A fundamental aspect of embodiments of the present invention is to maintain the cleanliness of the bonding surfaces of the substrate or of the chips singulated from the substrate. To ensure the cleanliness of the bonding surfaces, the singulation process must cause as little contamination as possible. In particular, no burrs should be produced during the singulation of the substrate. According to the present invention, this can be ensured by several different processes.

[0042] In the first possible process, known as stealth dicing, a focused laser beam changes the material properties so that the chips can be easily diced. Among other advantages, this eliminates the need for mechanical dicing tools such as cutting disks. The basic function of the stealth dicing process is known in the prior art.

[0043] According to a second possible process, the chips are diced together using plasma.

[0044] According to a third possible process, the chips are diced together using mechanical dicing means. In this case, according to a highly preferred embodiment of the invention, cuts are made on the joining side before optional cleaning of the joining surface and fixing of the substrate to the support. Then, in a singulation process from the back side of the substrate, the mechanical dicing means is applied to the pre-made cuts. In this way, the cuts allow the mechanical dicing means to reach the gap spaces more quickly, thereby avoiding contamination of the joining surfaces of the individual chips.

[0045] The cuts can also be preferably used in the dicing methods mentioned above, since these dicing methods can also cause stains and / or burrs at the edge. In particular, due to the layer structure of the chip, especially in the case of stealth dicing, cracks extend discontinuously vertically through the wafer. In particular, the cuts are formed in order to prevent at least the formation of burrs at the joining surface.

[0046] The discontinuities may also be the result of a masking process applied when depositing material on a surface, where no material is deposited in the masked locations, and therefore the discontinuities are formed by the masked areas.

[0047] Assembled joining device and assembled joining method In some circumstances, it may be disadvantageous to bond chips using the individual bonding method. In particular, if the bonding surfaces of the chips must be cleaned in order to achieve a high bonding quality, it may be advantageous to first position all chips on one support so that the surfaces that will later become the bonding surfaces are facing upwards. In this pre-fixed state, all bonding surfaces of the chips can then be cleaned and pre-treated simultaneously, especially in a machine provided for this purpose. Afterwards, in a further process step, all chips are simultaneously bonded to the substrate or chips that are to be bonded.

[0048] A fundamental quality characteristic that must be met in such collective bonding is the flatness of the bonding surface formed by all the bonding surfaces of all the chips, which should ideally all be coincident with each other.

[0049] Temporary support The following process describes the fabrication of a temporary support with multiple chips, the bonding surfaces of which are aligned with one another for the purpose of carrying out the collective bonding process.

[0050] In the first process step according to the invention, a first support, in particular a support substrate, most preferably a support wafer, and even more preferably a tape sheet in a dicing frame, is coated with a protective layer. In particular, when a tape sheet is used, it is conceivable that the protective layer is already applied to the tape sheet. Otherwise, the coating of the support can be carried out by conventional known coating methods such as spin coating, spray coating, lamination, etc.

[0051] Another option is to provide a protective layer on the surface of the chips, which can be done already before the chips are cut from the wafer.

[0052] In a second process step according to the invention, the chips are fixed on the first support with a very high alignment accuracy, which is achieved in particular by using alignment marks and an optical system, in this case better than 1 mm, preferably better than 100 μm, more preferably better than 10 μm, most preferably better than 1 μm, and most preferably better than 100 nm.

[0053] The fastening is performed via the surfaces of the chips that will later become the joining surfaces. The joining surfaces of the chips should be as closely aligned as possible. Furthermore, the protective layer should be as thin as possible, have as little viscosity as possible, and have as much elasticity as possible, to prevent the chips from penetrating the layer at different depths, which would disrupt the alignment of the joining surfaces of the chips. Preferably, the protective layer is as thin as possible to minimize its elastic properties. The first support thus acts as an infinitely rigid resistor, and the protective layer acts solely as a separator between the joining surfaces and the first support.

[0054] In this case, the E modulus of the tape sheet is 1 GPa to 1000 GPa, preferably 1 GPa to 500 GPa, more preferably 1 GPa to 100 GPa, most preferably 1 GPa to 50 GPa, and most preferably 1 GPa to 20 GPa. The E modulus of the polyamide is, for example, 3 to 6 GPa.

[0055] Furthermore, in this case, the E modulus of the stiffer support is between 1 GPa and 1000 GPa, preferably between 10 GPa and 1000 GPa, more preferably between 25 GPa and 1000 GPa, most preferably between 50 GPa and 1000 GPa, and most preferably between 100 GPa and 1000 GPa. The E modulus of some steels is, for example, around 200 GPa.

[0056] In the third process step of the present invention, a second support, particularly a support substrate, most preferably a support wafer, is coated with an adhesive. The second support is a temporary support. Unlike the protective layer of the second process step of the present invention, the adhesive is preferably elastically and / or plastically adaptable to compensate for any height differences between the chips so that the conformity of their joining surfaces is not lost. Therefore, the adhesive should have as little viscosity as possible and be permanently deformable.

[0057] The viscosity of the adhesive at room temperature is between 10E6 mPa*s and 1 mPa*s, preferably between 10E5 mPa*s and 1 mPa*s, more preferably between 10E4 mPa*s and 1 mPa*s, and most preferably between 10E3 mPa*s and 1 mPa*s.

[0058] In a fourth process step according to the present invention, the back surface of the chip, which is opposite the bonding surface of the chip, is connected to the temporary support. In this case, the first support maintains the conformity of the bonding surface of the chip, while the back surface correspondingly deforms the adhesive on the temporary support, if necessary, and, particularly preferably, allows it to flow out due to its low viscosity. Therefore, after the bonding process, the thickness of the adhesive between the chip and the temporary support may vary from chip to chip. In one enhanced embodiment according to the present invention, the adhesive between the chips can be removed. Preferably, alignment between the first support and the temporary support is achieved via alignment marks arranged on the first support and the temporary support. It is also conceivable to arrange alignment marks on the chip surface and align them with the alignment marks on the temporary support. Alignment devices (in English aligners) for aligning substrates are described in detail in the following publications: U.S. Pat. No. 6,214,692 (US6,214,692B1), WO2015082020A1, WO2014202106A1.

[0059] In the fifth process step according to the invention, the first support is removed together with the protective layer. For this reason, the adhesive force between the adhesive and the temporary support and the chip is greater than the static friction between the protective layer and the bonding surface of the chip. In a particularly preferred embodiment according to the invention, the protective layer is designed so that its removal from the bonding surface of the chip is particularly clean. If the first support is a tape sheet, it can be peeled off, which facilitates the removal. It may be necessary to modify the protective layer chemically or mechanically using chemicals and / or electromagnetic radiation, in particular UV, visible or infrared light and / or heat, in order to eliminate or at least reduce the adhesive properties of the protective layer.

[0060] In this case, the bonding strength between the protective layer and the chip is less than 1 J / m2, preferably less than 0.1 J / m2, more preferably less than 0.01 J / m2, most preferably less than 0.001 J / m2, and most preferably less than 0.0001 J / m2.

[0061] In an optional sixth process step, cleaning and / or plasma activation of the exposed bonding surfaces of the chips is carried out simultaneously. This is particularly important if the first support was not removed from the bonding surfaces of the chips without any contamination. Cleaning of all chips can then be carried out simultaneously, which increases the throughput of the method according to the invention.

[0062] In the seventh process step of the present invention, all chips fixed on the temporary supports are then simultaneously bonded to a single product substrate, in particular a single wafer. This includes the option of bonding chips on the temporary supports to chips already present on the product substrate. This allows for the possibility of sequentially building a chip stack on the product substrate. Preferably, alignment between the temporary supports and the product substrate is achieved via alignment marks arranged between the supports and the product substrate. It is also conceivable to arrange alignment marks on the bonding surfaces of the chips and align them with the alignment marks on the product substrate.

[0063] In an eighth process step according to the invention, the temporary support is detached from the chip. It may be necessary to use chemicals and / or electromagnetic radiation, in particular UV, visible or infrared light and / or heat, to change the adhesive's chemical or mechanical properties, especially its viscosity, so that it loses its adhesive properties. Particularly preferably, the temporary support is a support that is transparent to photons in a specific wavelength range of the electromagnetic spectrum. Preferably, this is a glass support. This allows the use of an adhesive that can be broken from the backside using a laser, thereby enabling the temporary support to be peeled off from the backside.

[0064] In the ninth process step of the present invention, the adhesive on the back surface of the chip is cleaned by one of the cleaning methods described above. After this process step, any additional chips can be stacked on top of the existing chips, thus building a chip stack on the product substrate.

[0065] The positioning accuracy of the chip on the first support in process step 2 and on the temporary support by the assembly bonding process in process step 7 is preferably achieved or at least assisted by chip self-alignment. The positioning accuracy is in this case better than 1 mm, preferably better than 100 μm, more preferably better than 10 μm, most preferably better than 1 μm, and most preferably better than 100 nm. Self-alignment assistance is only possible if the chip can be laterally displaced relative to the first support and / or relative to the temporary support. For this purpose, the protective layer on the first support and / or the adhesive on the temporary support must have a correspondingly small shear modulus or even be capable of plastic deformation so that the chip can be laterally displaced.

[0066] fixed support Instead of using the temporary supports just mentioned, it is conceivable to fix the chip on a fixed support which has corresponding fixing elements. ·Vacuum fixing means Electrostatic fixing means Magnetic fastening means Gel pack fixing means The chips can be fixed directly to the fixed support at their rear surface. The drawback in this case is that, unlike the temporary supports described above, there is no adhesive that can make the joining surfaces of all chips uniform in one plane. At best, a similar effect can be achieved by the flexibility of the gel pack of the gel pack fixing means described above. In particular, the ejector mechanism described later can also be used as the fixed support.

[0067] Ejector mechanism In the following description, several devices and methods are described that require the accommodation and fixation of chips. All methods and devices disclosed therefore relate to already singulated chips and their treatment, which must be carried out according to the invention so that the bonding surfaces are as far as possible free from contamination. The primary task of this embodiment, called an ejector mechanism, is to carry out a cleaning process on a number of already singulated chips and to fix them in order to prepare their bonding surfaces for the actual bonding process.

[0068] Ejector mechanism with recessed part The essence of the first ejector mechanism according to the invention for treating the joining surface of the chip and then transferring it directly to the joining process is to stock the chip on a support which has a recess in which the chip can be positioned and / or fixed.

[0069] According to one preferred embodiment, the contour of the recess is congruent with the contour of the tip. According to a further variant embodiment of the invention, the contour of the recess can be different from the contour of the tip. In particular, the recess is larger than the tip. This allows the cleaning liquid and / or plasma to more easily access the surface of the tip. In this case, the distance between the contour of the tip and the contour of the recess is less than 5 mm, preferably less than 1 mm, more preferably less than 0.5 mm, most preferably less than 0.1 mm, and most preferably less than 0.05 mm.

[0070] The bottom surface of the recess is provided with a passage (hereinafter also referred to as a through-passage), in particular a hole, through which a lifting mechanism can lift the chip so that the gripper (hereinafter also referred to as a gripping head) can access the chip. In a particularly preferred embodiment of the invention, the height of the chip exactly corresponds to the depth of the recess. In this way, the joining surface to be cleaned and the carrier surface coincide. This type of embodiment facilitates mechanical cleaning processes in particular. Since the chip does not protrude from the recess, there is no risk of mechanical damage to the chip. Furthermore, the chip does not sink into the recess, which allows optimal access to the chip with any type of cleaning equipment. Furthermore, this embodiment of the invention is ideally suited for plasma cleaning of the chip. This is because the uniformity of the plasma used is extremely high due to the seamless flatness formed between the joining surface and the carrier surface. This high uniformity ensures a high degree of reproducibility and, in particular, uniform cleaning of the joining surface, in particular uniform plasma activation.

[0071] All supports used in the plasma chambers contemplated herein should preferably have specific properties. In particular, they should be made of an electrically conductive material. Thus, they preferably have: Conductors, especially o Metals, especially o alloys, especially *steel *aluminum *Stainless steel alloy *titanium o Conductive ceramics, especially *Doped SiC *Doped Si3N4 It consists of:

[0072] Metallic supports are preferably coated in order to prevent contamination of the tip with the metal. As coatings, preferably dielectrics come into consideration, in particular oxides, nitrides or carbides.

[0073] Preferably, the support is also configured as a two-part structure, so that the chip is placed on a metal plate, and then a diaphragm made of a dielectric material, particularly Si, SiC, or Si3N4, is placed on it for plasma activation. In this case, the diaphragm has similar or identical dielectric properties to the chip. This ensures as uniform a plasma as possible. In particular, the diaphragm is made of the same dielectric material as the chip.

[0074] The absolute value of the difference between the height h of the tip and the depth t of the recess is less than 1 mm, preferably less than 0.5 mm, more preferably less than 0.1 mm, most preferably less than 0.05 mm, and very most preferably less than 0.01 mm.

[0075] This embodiment of the invention allows the mating surfaces of multiple chips to be treated simultaneously, resulting in a significant increase in efficiency for cleaning already singulated chips.

[0076] After the chip has been protruded to a sufficiently defined height, a gripping head is used to receive and transport the chip. In this case, the gripping head fixes the chip not to the freshly cleaned joining surface, but to a fixing surface opposite the joining surface. The fixing surface may become particularly contaminated during these process steps. However, the fixing surface may become a new joining surface in a further process step, on which a further chip may be placed, in which case the fixing surface must be cleaned accordingly.

[0077] In the case of the ejector mechanism described above, the recess depth t is preset. If chips with slightly different chip heights h are fixed in accordance with the present invention, the joining surfaces of the chips to be cleaned no longer coincide with each other. In this case, it is conceivable that the lift mechanism will perform height corrections for some chips, especially chips whose height h is less than the recess depth t.

[0078] Ejector mechanism with attached attachment A further second ejector mechanism according to the invention consists of a support provided with passages, in particular holes. Unlike the first ejector implementation described above, this ejector mechanism does not have recesses. The chip to be cleaned is fixed directly to the support surface. In particular, the surrounding atmosphere is separated from the passages by means of a sealing element. In this way, cleaning of the chip can be carried out without contaminating the passages with cleaning agents, e.g. chemicals such as liquids or ions from the plasma. A fixing element for fixing the chip can be arranged in the sealed space. The fixing element can be one of the following fixing elements: Vacuum fastening means (preferred) Electrostatic fixing means Magnetic fastening means ·Adhesive fixing means Mechanical fastening (least preferred) At least one of the following is true:

[0079] Most preferably, vacuum fastening means are used, which can evacuate the space between the passage and the sealing member, so that the tip is pressed against the sealing member. The sealing member may be a solid, especially a polymer, or a particularly viscous and / or hardened polymer. Preferably, the sealing member is then a wax, glue, paste, etc. These polymers must be replaced regularly, since they are removed over time, especially when cleaning processes are carried out.

[0080] mask In particular, according to an extension of the present invention to the above-mentioned ejector mechanism, a mask with openings is used to protect the joining surface of the chip from contamination. The gripping of the chip is always performed by mechanical parts that must necessarily move back and forth over the chip. In addition to the actual gripping head and the corresponding arm on whose end the gripping head is located, cables and conductors must also move. All of these mechanical elements inevitably contribute to contamination of the joining surface of the chip as they move back and forth over the chip.

[0081] In a particularly preferred embodiment of the present invention, a relative movement is performed between the mask with the opening and the chip. Preferably, the mechanism on which the chip is placed moves. It is also conceivable that the mask moves. To remove the chip, the opening is positioned above the chip to be removed. A lift mechanism lifts the chip to be bonded above the mask. Above the mask, a gripping head removes the chip via its backside without touching the bonding surface and transports it to a position where it will be further processed. In a particular next step, the alignment mark of the chip is captured by the first optical system. The chip is then moved below the bonding position and then precisely positioned relative to the bonding position, particularly using the second optical system, for bonding. Thus, according to the present invention, the bonding position can be located sufficiently far from the chip removal point. Furthermore, the chip can pass through several stations before the actual bonding process, in particular an alignment station, a measurement station, a cleaning station, and / or a test station. According to the present invention, only the back surface of the chip is contacted throughout the entire chip transfer, never its bonding surface, so the gripping head preferably holds the chip in place from the time of removal by the lift mechanism until the end of bonding.

[0082] According to one particular embodiment, the product substrate to which the chip is to be bonded is positioned directly above the chip to be bonded. All other chips and their bonding surfaces are protected from contamination by the mask surface, as before. The ejector removes the chip from the ejector mechanism and bonds it directly to the product substrate or to a chip / chip stack on the product substrate. In this case, the bonding surface of the product substrate or chip on the product substrate faces directly toward the ejector and thus points in the direction of gravity. The mask prevents contamination of the bonding surface of the chip that is yet to be ejected from the ejector mechanism. This embodiment according to the invention is less preferable than the above-described embodiment in which the gripping head transports the chip to another location and bonds it there, since in this variant, further process steps cannot be performed on the chip.

[0083] In this case, the mask itself must be free of contamination in all embodiments. In particular, the mask can be cleaned during the mounting process by one of the cleaning methods described above. The mask according to the present invention is used in particular for bonding processes in which the substrate on which the chip is to be mounted is positioned on its bonding surface in the direction of gravity. The mask according to the present invention prevents contamination from the substrate or moving mechanical elements from being transferred to the chip located below the substrate. The mask is particularly used in conjunction with the ejector mechanism described in detail herein. These embodiments, in particular, make it possible to avoid chip rotation and thus chip contact with the bonding surface. Further detailed embodiments are described in detail elsewhere in this specification and in the description of the figures and their associated drawings.

[0084] Furthermore, a downward flow occurs in the clean room. Therefore, air always circulates from higher to lower positions, carrying dust particles with it. This flow direction also adversely affects the contamination of the bonding surfaces. According to the present invention, a machine for generating a lateral flow for the purpose of ejecting dust particles laterally can be provided near a mechanism for fixing multiple chips having exposed bonding surfaces, particularly near the aforementioned ejector mechanism or fixing support.

[0085] Joining head In yet another embodiment of the present invention, a clamping mechanism for clamping and bonding chips is described. This clamping mechanism, also called a bond head, is a mechanical part that clamps, transports, and bonds individual chips to the bonding surface. To be able to take advantage of the present invention's advantage of a clean bonding surface at the chip, it is necessary to make the bonding process as controllable as possible. It is particularly essential that the chips do not bond first at their periphery, but rather that the bonding wave propagates from the center of the chip to the outside. The concept of a bonding wave is already known to those skilled in the art from wafer-to-wafer (W2W) bonding. See the following publications, to name just a few examples: International Publication No. 2014191033 (WO2014191033A1), PCT Application No. 2016053268 (PCT / EP2016053268), PCT Application No. 2016056249 (PCT / EP2016056249), and PCT Application No. 2016069307 (PCT / EP2016069307).

[0086] Unlike the W2W approach, however, the C2W approach has significantly higher throughput. The clamping mechanism moves from the chip receiving location to the bonding position and back at significantly higher speeds. Because high speeds must be reached quickly, the accelerations are also relatively high. This is especially true in the z-direction, i.e., the direction normal to the bonding surface. These favorable physical circumstances can be exploited to create an entirely new type of clamping mechanism, which, based solely on inertia, forces the chip into a convex shape, thereby ensuring that the center of the chip's bonding surface first contacts the second bonding surface.

[0087] The essence of this idea according to the invention is that the fixing mechanism has spring elements at the periphery, which have a spring constant smaller than that of the centrally arranged spring element. According to a very particular embodiment according to the invention, the fixing surface is not supported at the periphery at all, i.e. the spring elements are omitted at the periphery.

[0088] In this case, the ratio of the spring constant of the peripheral spring elements to the spring constant of the centrally located spring elements is less than 1, preferably less than 0.1, even more preferably less than 0.01, most preferably less than 0.0001, and very most preferably less than 0.00001.

[0089] Further advantages, features and details of the invention will become apparent from the following description of preferred embodiments and on the basis of the drawings. [Brief explanation of the drawings]

[0090] [Figure 1a] 1 shows a first process step according to the invention of a first process according to the invention; FIG. [Figure 1b] FIG. 2 shows a second process step according to the invention of the first process according to the invention. [Figure 1c] FIG. 2 shows a third process step according to the invention of the first process according to the invention. [Figure 1d]FIG. 2 shows a fourth process step according to the invention of the first process according to the invention. [Figure 1e] FIG. 10 shows a fifth process step according to the invention of the first process according to the invention. [Figure 1f] FIG. 10 shows the sixth process step according to the invention of the first process according to the invention. [Figure 1g] FIG. 10 shows the seventh process step according to the present invention of the first process according to the present invention. [Figure 2a] FIG. 2 shows a first process step according to the invention of a second process according to the invention. [Figure 2b] 4A-4C show a second process step according to the invention of a second process according to the invention; [Figure 2c] FIG. 2 shows a third process step according to the invention of the second process according to the invention. [Figure 2d] FIG. 4 shows a fourth process step according to the invention of the second process according to the invention. [Figure 2e] FIG. 5 shows a fifth process step according to the invention of the second process according to the invention. [Figure 2f] FIG. 6 shows the sixth process step according to the invention of the second process according to the invention. [Figure 2g] FIG. 10 shows the seventh process step according to the invention of the second process according to the invention. [Figure 2h] FIG. 10 shows the eighth process step according to the invention of the second process according to the invention. [Figure 2i] FIG. 10 shows the ninth process step according to the present invention of the second process according to the present invention. [Figure 3] 1A and 1B show a first ejector mechanism according to the present invention; [Figure 4] FIG. 10 shows a second ejector mechanism according to the present invention. [Figure 5] 1 shows a mask according to the invention with an opening in a first embodiment according to the invention; [Figure 6] FIG. 2 shows a mask according to the invention with an opening in a second embodiment according to the invention. [Figure 7a] 1A-1C illustrate a first process step according to the invention of self-alignment. [Figure 7b] 3A-3C illustrate a second process step according to the invention of self-alignment. [Figure 8a] 3A-3C show a first process step according to the invention of a bonding process using a bonding head according to the invention; [Figure 8b] 3A-3C show a second process step according to the invention of the bonding process using the bonding head according to the invention;

[0091] In the figures, the same elements or elements having the same function are provided with the same reference numerals.

[0092] 1a shows a first process step according to the invention of a first process according to the invention for forming a final product 19 according to the first process according to the invention. All preparations for the production of a plurality of chips are carried out on a substrate 11. These preparations include the production of all functional properties of the chips, in particular the production of contacts 13. Furthermore, cuts 12 can be pre-cut to facilitate the subsequent dicing process. Due to the performance of all preparation steps, the joining surface 7b may already be contaminated.

[0093] 1b shows the second process step of the first process according to the invention, which is the cleaning step of the bonding surface 7b. In particular, the bonding surface 7b is cleaned and / or activated by plasma and / or wet chemical methods.

[0094] 1c shows the third process step of the first process according to the invention, in which the substrate 11 is fixed onto a support, in particular a tape sheet 15. Preferably, the tape sheet surface 15o is shaped in such a way that the substrate 11 is fixed via the joining surface 7b, but that the tape sheet 15 can be subsequently removed without leaving any residue on the joining surface 7b.

[0095] 1d shows a fourth process step of the first process according to the invention, in which the substrate 11 is diced into individual chips 7. According to the invention, the joining surfaces 7b of the chips 7 must not be contaminated during this process. Preferably, therefore, cuts 12 are made in the substrate 11 so that the dicing process can be completed already above the joining surfaces 7b, in particular in the case of mechanical dicing by a dicing mechanism 16. It is also conceivable to carry out the dicing by means of a laser, in particular known stealth techniques, chemicals, in particular etching, preferably dry etching, plasma, etc.

[0096] 1e shows the fifth process step of the first process according to the invention, in which the chip 7 is removed from the tape sheet 15 by the bonding head 9 provided with the fixing means 6. In so doing, the chip 7 is fixed by the bonding head 9 at its rear side 7r in such a way that no contamination occurs on the bonding surface 7b.

[0097] 1f shows the sixth process step of the first process according to the invention, in which the bonding head 9 performs bonding on another substrate 11' after the chip 7 has been aligned relative to this substrate. In this case, the bonding surface 7b is preferably a hybrid surface, consisting of a dielectric surface area 20 and an electrical surface area represented by the contacts 13. In the case of such a hybrid bonding surface, a so-called pre-bond is performed between the dielectric surface area 20 of the bonding surface 7b of the chip 7 and the dielectric surface area 20' of the substrate 11'.

[0098] 1g shows the final product 19 according to the invention of the first process according to the invention, which consists of a substrate 11' and a number of chips 7. It is now conceivable to repeat the process steps described above in order to stack a further layer of chips 7 on the first layer of chips 7.

[0099] FIG. 2a shows a first process step of the second process according to the invention, in which a plurality of already singulated chips 7 are fixed at their joining surfaces 7b on a support, in particular a tape sheet 15. The joining surfaces 7b of the chips 7 must have already been cleaned and / or activated in a previous process. The chips 7 are preferably aligned and positioned by the joining head 9 of a chip joining machine. The enlarged view shows the interface between the joining surface 7b of one chip 7 and the tape sheet surface 15o of the tape sheet 15. A protective layer 17 can be provided on the tape sheet surface 15o, which preferably also has adhesive properties. However, it is particularly preferred that the adhesion between the protective layer 17 and the tape sheet surface 15o be greater than the adhesion between the protective layer 17 and the tape sheet surface 7b, so that the joining surface 7b remains as clean as possible when the tape sheet 15 is removed in a subsequent process step.

[0100] 2b shows a second process step according to the invention, in which a substrate 11'' is provided as a temporary support. An adhesive 18 is applied to the substrate 11'' by known methods, in particular by a spin-coating process.

[0101] FIG. 2c shows a third process step of the second process according to the invention, in which the back surfaces 7r of the chips 7 are brought into contact with each other using a bonding adhesive. Prior to this contact, all chips 7 to be fixed together are aligned with respect to the substrate 11″. It is also conceivable to apply mechanical pressure from the back side 15r of the tape sheet in this process step, so that the bonding surfaces 7b of all chips 7 coincide in a plane E. Plane E is the plane in which all bonding surfaces 7b of the chips 7 are preferably located. In particular, plane E should coincide with the surface of the protective layer 17 facing the chips 7. This is particularly important when the support 15 is a tape sheet. For example, it is conceivable to roll a roller over the back side 15r of the tape sheet. Naturally, pressure is preferably applied over the entire surface, resulting in a uniform pressure distribution.

[0102] FIG. 2d shows the fourth process step of the second process according to the invention, in which the tape sheet 15 is removed from the bonding surface 7b of the chip 7. Preferably, the tape sheet 15 is peeled off. As can be seen in the enlarged view Z1, residues of the protective layer 17 may remain on the bonding surface 7b after the tape sheet 15 is removed. In this less desirable case, a new cleaning of the chip must be performed in a further process step. Preferably, the bonding surface 7b is clean after the tape sheet 15 is removed. The enlarged view Z2 shows an exaggerated depiction of two chips juxtaposed to each other, with different thicknesses d1 and d2. However, due to the plasticity of the adhesive 18, the bonding surfaces 7b are positioned in the same plane E, which is an important aspect of this process according to the invention.

[0103] 2e shows a fifth, less preferred optional process step according to the invention of the second process according to the invention, in which the bonding surface 7b of the chip 7 is cleaned by some cleaning method. In the enlarged view Z1, the protective layer 17 is no longer discernible.

[0104] 2f shows the sixth process step according to the invention of the second process according to the invention, in which the temporary support 11" with the chips 7 mounted thereon is aligned and bonded to another substrate 11'. According to the invention, bonding of all chips 7 is carried out simultaneously.

[0105] 2g shows the seventh process step according to the invention of the second process according to the invention, in which the adhesive 18 is treated. This treatment can be carried out chemically and / or thermally and / or by means of electromagnetic waves, in particular UV light or infrared light. According to a very particularly preferred embodiment according to the invention, this treatment is carried out through the temporary support 11''. This treatment preferably has the effect that the adhesive properties of the adhesive 18 are reduced or even completely eliminated, so that the temporary support 11'' can be detached from the chip 7.

[0106] FIG. 2h shows the eighth process step according to the invention of the second process according to the invention, in which the carrier substrate 11'' is removed.

[0107] 2i shows the ninth process step according to the invention of the second process according to the invention, in which the rear surface 7r of the chip 7 is cleaned, resulting in a new final product 19.

[0108] FIG. 3 shows a first embodiment of the present invention for bulk cleaning, plasma activation, and / or bonding of chips 7. The chips 7 are located in an ejector mechanism 1 having a recess 2. A through-pass 3, particularly a simple hole, is attached to the bottom of the recess 2, through which a lift mechanism 4 can raise and lower the chips 7. The chips 7 can be loaded and / or removed via a gripping head 5, which can fix the chips 7 exclusively at their rear side 7r using a fastening means 6 for transporting them. Preferably, the bonding surfaces 7b of all chips 7 coincide within a plane E during bulk cleaning and / or plasma activation. The coincidence of all bonding surfaces 7b offers the advantage of uniform processing. In particular, in the case of plasma processing, this ensures that the plasma density is uniform across the entire surface. If chips 7 differ somewhat in thickness, the lift mechanism can make some corrections to re-ensure the coincidence of the bonding surfaces 7b.

[0109] 4 shows a second embodiment according to the invention for bulk cleaning and / or plasma activation and / or bonding of chips 7. The chips 7 are located in an ejector mechanism 1' with a sealing member 8. The chips 7 can be loaded and / or removed by a lift mechanism 4 that is translatable through a through-guide 3. Fixation is preferably achieved by a fixing means 6, in particular a vacuum duct, which can generate a vacuum in the gap when the chips 7 come into contact with the sealing member 8. For clarity, the gripping head 5 has not been shown in this figure.

[0110] The ejector mechanism 1, 1' is therefore used for general bulk cleaning and / or plasma activation and / or bonding of the individual chips 7. It is also conceivable to design the ejector mechanism 1, 1' compactly so that it can be used as a carrier wafer 11'' in the sense of the second process according to the invention. In this case, the bonding surface 7b of the chip 7 must protrude somewhat beyond the ejector surface 1o, 1o', at least prior to the bonding process to the substrate 11, which is naturally met in terms of construction technology for the ejector surface 1o' of the ejector 1'. The ejector mechanism 1' is therefore particularly suitable as a type of clamping support. In this case, the clamping means 6 can also be electrostatic, magnetic, or gel-pack clamping means.

[0111] 5 shows a first extension of the bonding embodiment according to the invention. In this case, an ejector mechanism 1 can be used, for example, to receive the chip 7 by the gripping head 5 through an opening 24 in the mask 23. The received chip 7 is then transported, in particular, through several stations. The optical system 25 can measure the bonding surface 7b and / or the backside 7r of the chip 7 and / or the substrate 11′. To accurately position the transferred chip 7, in particular, alignment marks (not shown) on the chip 7 and / or the substrate 11′ can be found. Therefore, in this extension, the substrate 11′ to be attached is not located directly above the chip.

[0112] FIG. 6 shows a second extension of the bonding embodiment according to the invention. Here, an ejector mechanism 1' can be used, for example, to bond a chip 7 to a chip 7 of a substrate 11' through an opening 24 in a mask 23. The essence of the idea according to the invention is that the chip 7 on the ejector mechanism 1' is protected from contamination by a mask 23 made of a particularly pure material, preferably with a contaminant-free surface. Thus, the invention once again shows how the bonding surface 7b of the chip 7 can be protected from contamination. Naturally, instead of the ejector mechanism 1' used as an example, any other type of mechanism can be used to guide the chip 7 through the opening 24 and bond it to another chip 7 or to the surface of the substrate 11' located on the other side of the mask 23.

[0113] 7a shows the first process step according to the invention of the self-alignment according to the invention of a chip 7 on a substrate 1'. The chip 7 is placed on a liquid film 21 by the bonding head 9. According to one particular embodiment, the liquid film 21 is not distributed continuously over the entire substrate 1', but is instead located as droplets or wet spots only at the locations where the chip 7 is to be self-aligned.

[0114] In this case, it can be seen that the alignment between the contacts 13 of the chip 7 and the contacts 13 of the substrate 1' is not optimal.

[0115] 7b shows the second process step according to the invention of the self-alignment of the chip 7 on the substrate 1'. The bonding head 9 releases its clamping force on the chip 7. The chip 7 then aligns itself by its own lateral movement due to the presence of the liquid film 21, so that the contacts 13 of the chip 7 are aligned as best as possible with the contacts 13 of the substrate 1'. This is because the dielectric and electrical regions have different bonding properties. Hydrophilic regions preferably attract hydrophilic regions. This interaction can preferably propagate through a medium that is at least partially polar in nature. Water is bipolar and therefore particularly well suited for this role according to the invention.

[0116] 8a shows a joining head 9 according to the invention, which comprises a fastening surface 22 equipped with fastening means 6. Behind the fastening surface 22, spring elements 10, 10' are provided, each with a different spring constant. Preferably, the spring constant of the centrally mounted spring element 10 is greater than the spring constant of the peripherally mounted spring elements 10'. Accelerations of the joining head 9 in the lateral direction do not affect the shape of the fastening surface 22.

[0117] FIG. 8b shows the joining head 9 according to the present invention when an acceleration occurs in the normal direction of the surfaces to be joined. Due to the larger spring constant of the central spring element 10, the central portion of the fixing surface 22 is less affected by inertia, or in other words, it responds more quickly than the peripheral portions. Advantageously, the rapid approach to the contact surface and the associated air cushion also results in bending. With identical spring elements, the dynamic pressure generated by the translational movement toward the fixing surface 22 would symmetrically press the fixing surface 22 backward. However, the peripheral spring elements 10' have a smaller spring constant than the central spring element 10, and because they are more elastic, they bend more easily. In other words, bending is caused not only by inertia but also by the dynamic pressure that occurs. This mechanical asymmetry causes the fixing surface 22 and thus the chip 7 fixed thereto to bend convexly, forming an optimal contact point 23 for direct joining. In this way, it is avoided that the tip 7 makes initial lateral or planar contact. [Explanation of symbols]

[0118] 1, 1' Ejector mechanism 1o, 1o' Ejector surface 2 recesses 3 Penetration guide part 4 Lift mechanism 5 Grip Head 6 Fixing means 7 chips 7b Bonding surface 7r back side 8 Sealing material 9. Joining head 10, 10' spring member 11, 11', 11'' board 12 Cuts 13 Contact 14 frames 15 Tape Sheet 15o Tape sheet surface 15r Tape sheet backside 16 Dicing mechanism 17 Protective layer 18 Adhesive 19 Final product 20 Dielectric Surface 21 liquid 22 Fixed surface 23 Mask 24 Opening 25 Optical system d1, d2 thickness E coincident plane t depth Enlarged view of Z1 and Z2

Claims

1. A method for bonding a chip (7) to a semiconductor substrate (11') or to another chip, comprising: Directly bonding the chip (7) onto the semiconductor substrate (11') or the other chip by a bonding head for fixing, transporting and / or bonding the chip (7); In the bonding process, when acceleration occurs in the normal direction of the surfaces to be bonded, the bonding surface (7b) of the chip (7) is curved and convex, and the center of the bonding surface is configured to first come into contact with the semiconductor substrate (11') or the bonding surface of the other chip; A method characterized in that the bonding is preceded by a plasma treatment for cleaning and plasma activation.

2. The direct bonding is performed on the bonding surface (7b) of the chip (7), which is a hybrid bonding surface. The method of claim 1.

3. Positioning the chip (7) and performing self-alignment of the chip (7); 3. The method according to claim 1 or 2.

4. To manufacture said chips (7), a substrate (11) is fixed on a support (15) and then said substrate (11) is singulated into a plurality of chips (7), 3. The method according to claim 1 or 2.

5. cleaning the joining surface (7b) of the substrate (11) before fixing the substrate (11) on the support (15); The method of claim 4.

6. cleaning the bonding surface (7b) of the chip (7) during removal from the support (15) and / or during transfer to another position; 6. The method according to claim 4 or 5.

7. The joining surface (7b) of the substrate (11) has pre-cutting lines (12) and the chips (7) are separated by mechanical dicing means. The method of claim 4.

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