Plasma processing apparatus and plasma processing method

Abstract

To provide a technique capable of making a removal amount of electric charge appropriate while minimizing a time in which a wafer surface is charged.SOLUTION: A plasma processing device in the present invention comprises: a first high frequency power source which supplies high frequency power for generating plasma; a specimen table on which a specimen is placed; a second high frequency power source which supplies a high frequency voltage to the specimen table; an electrostatic adsorption voltage generation section which generates a voltage by superposing a voltage for adsorbing the placed specimen in an electrostatic manner and a voltage for removing electric charge accumulated on a surface of the specimen (referred to simply as "superposed voltage" hereafter); and a control section which controls the electrostatic adsorption voltage generation section. A waveform of one cycle of the superposed voltage successively has a first period having a first gradient, a second period having a second gradient, a third period having a third gradient, and a fourth period having a fourth gradient.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a plasma processing apparatus and a plasma processing method.

Background Art

[0002] Dry etching is an essential process in the manufacture of semiconductor devices. As an example of utilizing dry etching, there is anisotropic etching using plasma, in which a high-frequency voltage is applied to a wafer to accelerate ions in the plasma vertically, and thereby the etching progresses vertically to form a trench structure in the material.

[0003] In anisotropic etching, while ions are accelerated vertically with respect to the wafer and reach the trench bottom intensively, electrons move isotropically and also enter the side walls of the trench. As a result, the side walls of the trench are negatively charged and the bottom is positively charged. Thereby, an electric field is generated such that ions are drawn into the trench side walls, and the trajectory of the ions is bent. When such an electron shading effect occurs, in the most advanced semiconductor devices that require atomic-level processing accuracy and the processing of shapes with a very high aspect ratio, the deterioration of the processed shape has been a problem.

[0004] As a technique for suppressing such deterioration of the processed shape, there is a technique of removing charged particles on the wafer surface by superimposing a low-frequency linear triangular wave voltage or a curved triangular wave voltage on the high-frequency voltage for self-bias during plasma processing, as disclosed in Patent Document 1.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] According to Patent Document 1, the charge on the wafer surface moves when the applied voltage changes, and its magnitude is proportional to the rate of change of the voltage with respect to time. In other words, to remove the charge accumulated on the wafer surface most efficiently, the rate of change of the applied voltage should be large and the time of change should be long. Patent Document 1 discloses a configuration in which a triangular wave voltage is applied to a mounting stage on which a wafer is placed while plasma is generated, in order to effectively remove the charge. In such a configuration, in order to remove a sufficient amount of charge to eliminate the charge on the wafer surface over time, it is necessary to appropriately set the rate of change of the triangular wave voltage applied to the mounting stage with respect to time.

[0007] On the other hand, while the applied voltage is rising, only negative charges are removed, and while it is falling, only positive charges are removed. Therefore, the time available for removing positive and negative charges is only half the time of one period of the triangular wave. In other words, the rate of change of the triangular wave with respect to the application time must be set so that the amount of charge removed per unit of application time is twice the amount of charge accumulated per unit of application time. At this time, the cumulative amount of charge removed equals the cumulative amount of charge accumulated, that is, the charge on the wafer surface becomes zero, only for an instant, and it is not possible to maintain a state where the wafer is uncharged. Therefore, although it is an improvement over the case when no triangular wave voltage is applied, the processed shape will deteriorate due to the electron shading effect.

[0008] The present invention has been made in view of the problems of the prior art, and aims to provide a technology that can appropriately remove charge while minimizing the time the wafer surface is charged. [Means for solving the problem]

[0009] To solve the above-mentioned problems, one representative plasma processing apparatus of the present invention comprises a first high-frequency power supply that supplies high-frequency power for generating plasma, a sample stage on which a sample is placed, a second high-frequency power supply that supplies a high-frequency voltage to the sample stage, an electrostatic adsorption voltage generation unit that generates a voltage (hereinafter simply referred to as "superimposed voltage") by superimposing a voltage for electrostatic adsorption of the placed sample and a voltage for removing the charge accumulated on the surface of the sample, and a control unit that controls the electrostatic adsorption voltage generation unit, wherein the waveform of one period of the superimposed voltage has, in order, a first period with a first slope, a second period with a second slope, a third period with a third slope, and a fourth period with a fourth slope.

[0010] Furthermore, in order to solve the above-mentioned problems, one representative plasma treatment method of the present invention is a plasma treatment method for treating a sample with plasma, which includes a step of treating the sample with plasma while applying a voltage and a high-frequency voltage to a sample stage on which the sample is placed, wherein the waveform of one period of the voltage has, in order, a first period with a first slope, a second period with a second slope, a third period with a third slope, and a fourth period with a fourth slope. [Effects of the Invention]

[0011] According to the present invention, the amount of charge removal can be appropriately controlled while minimizing the time the wafer surface remains charged. As a result, deterioration of the processed shape caused by the electron shading effect can be suppressed more effectively than in conventional methods, and a plasma processing apparatus capable of high-precision plasma processing can be provided. Issues, structures, and effects other than those mentioned above will be clarified by the following explanation of the implementation methods. [Brief explanation of the drawing]

[0012] [Figure 1] Figure 1 shows a schematic configuration of a plasma processing apparatus according to Embodiment 1. [Figure 2] Figure 2 is a block diagram showing the electrical equivalent circuit of the plasma processing apparatus according to Embodiment 1. [Figure 3]Figure 3 shows the waveform of the voltage applied to the wafer. [Figure 4] Figure 4 shows the waveform of the current flowing through the wafer. [Figure 5] Figure 5 shows the amount of negative charge accumulated on the surface of the wafer. [Figure 6] Figure 6 is a block diagram showing a schematic configuration of the plasma processing apparatus according to Embodiment 2. [Modes for carrying out the invention]

[0013] To further enhance the anisotropy of etching and suppress the deterioration of the processed shape using a plasma processing device, the influence of the electric field generated by local charging during etching on the orbital of incident ions must be minimized. To achieve this, the positive and negative charges accumulated on the wafer surface during one cycle of the applied voltage must be removed within half a cycle, thereby minimizing the time the wafer surface remains charged.

[0014] In this embodiment, in order to remove an appropriate amount of charged particles while shortening the period during which the wafer surface is charged, the DC power supply connected to the mounting stage of the plasma processing apparatus (hereinafter also referred to as the "sample stage") repeatedly outputs four periods based on a signal from the control mechanism: a first period with a first slope (hereinafter also referred to as the "slope") in which the voltage of the output voltage waveform rises sharply, a second period with a second slope in which the voltage rises gradually, a third period with a third slope in which the voltage falls sharply, and a fourth period with a fourth slope in which the voltage falls gradually.

[0015] Here, the output voltage increases monotonically in the first and second periods, decreases monotonically in the third and fourth periods, the absolute value of the first gradient is greater than the absolute value of the second gradient, the absolute value of the third gradient is greater than the absolute value of the fourth gradient, the voltage value at the start of the first period is equal to the voltage value at the end of the fourth period, the first and third periods are longer than the time obtained by dividing the distance L that the charge moves from the wafer to the electrode by the velocity v when the charged particles move, and in the second and fourth periods, the amount of charge removed per unit time is made equal to the amount of charge charged per unit time.

[0016] In order to realize the above-described plasma treatment, in the present embodiment, a first high-frequency power supply (hereinafter, also referred to as a "microwave power supply") that supplies high-frequency power for generating plasma, a sample stage on which a sample such as a wafer is placed, a second high-frequency power supply (hereinafter, also referred to as a "high-frequency bias power supply") that supplies high-frequency power to the sample stage, and a DC power supply that applies a voltage that changes according to a periodically repeated waveform to the sample stage. In the plasma processing apparatus, by including a period with a large slope of the voltage waveform and a period with a small slope in the periodically repeated voltage waveform applied to the sample stage, while removing the positive and negative charges accumulated on the wafer surface during each half cycle during one cycle of the applied voltage, the time period during which the wafer surface is charged is minimized.

[0017] That is, in the present embodiment, in a plasma processing apparatus that generates plasma and processes a sample placed on a sample stage, in a state where plasma is being generated, a voltage output by a voltage waveform having four periods with different gradients of the output voltage waveform is superimposed on a high-frequency voltage and applied to the sample stage on which the sample is placed to perform plasma processing. The plasma processing apparatus is configured and the plasma processing is performed.

[0018] Hereinafter, the present embodiment will be described in detail based on the drawings. In the drawings for explaining the present embodiment, those having the same function are denoted by the same reference numerals, and the repeated explanation thereof is omitted in principle.

[0019] However, the present invention should not be construed as being limited to the description of the present embodiment shown below. The specific configuration can be changed without departing from the spirit or gist of the present invention.

[0020] [Embodiment 1] Hereinafter, Embodiment 1 of a plasma processing apparatus according to the present invention will be described with reference to FIGS. 1 to 6. FIG. 1 is a diagram showing a schematic configuration of the plasma processing apparatus according to Embodiment 1.

[0021] The plasma processing apparatus 100 according to Embodiment 1 shown in FIG. 1 is a microwave ECR (Electron Cyclotron Resonance) plasma etching apparatus. In FIG. 1, for the vacuum processing chamber 101 provided in the plasma processing apparatus 100, electrodes arranged inside thereof, and generators of electric and magnetic fields arranged outside, etc. are schematically shown.

[0022] The vacuum processing chamber 101 is a space formed inside a vacuum container 102. The vacuum container 102 is hermetically sealed at the upper part by a dielectric window 103 and connected at the lower part to an exhaust system composed of a turbo molecular pump 111 and a dry pump 112 through a variable conductance valve 110.

[0023] Immediately below the dielectric window 103, a shower plate 121 having a plurality of pores 120 is installed. The space 122 between the dielectric window 103 and the shower plate 121 is connected to a gas supply mechanism 124 through a gas pipe 123. The space 122 and the vacuum processing chamber 101 communicate with each other through the pores 120.

[0024] The pressure inside the vacuum processing chamber 101 is maintained at a desired value by feedback control based on the value measured by a pressure gauge 104. In the feedback control, the opening degree of the variable conductance valve 110 is adjusted, and the exhaust amount from the vacuum processing chamber 101 by the turbo molecular pump 111 is adjusted.

[0025] A microwave supply mechanism consisting of a microwave power supply 130, a waveguide 131, an output monitor 132, an automatic matching unit 133, and a cavity resonator 134 is installed above the vacuum processing chamber 101. The microwave power supply 130 supplies microwaves (high-frequency power) for generating plasma. The microwaves output from the microwave power supply 130 propagate through the waveguide 131 to the cavity resonator 134, where they are processed into a microwave distribution suitable for plasma generation, and then introduced into the vacuum processing chamber 101 through the dielectric window 103 and shower plate 121. At this time, the typical frequency of the microwaves is 2.45 GHz. The output monitor 132 measures the output value of the reflected microwaves. The automatic matching unit 133 adjusts its impedance and suppresses the reflected waves through feedback control based on the output value of the reflected waves.

[0026] Solenoid coils 140, 141, and 142 are installed to surround the vacuum vessel 102 and the cavity resonator 134, and when current flows from the coil power supply 143, a magnetic field is formed inside the vacuum processing chamber 101. Electron cyclotron resonance (ECR) occurs in a region where the strength of this magnetic field and the frequency of microwaves introduced from the microwave supply mechanism satisfy a specific relationship. For example, for microwaves of 2.45 GHz, this is the region where the magnetic field strength is 0.0875 T. In this region, electrons efficiently receive energy from the microwaves and accelerate, colliding with the gas supplied from the gas supply mechanism 124 and promoting dissociation and ionization. This generates plasma 144, which diffuses inside the vacuum processing chamber 101.

[0027] The region where plasma is generated can be controlled by the magnetic field configuration inside the vacuum processing chamber 101, and the magnetic field configuration can be controlled by the values ​​of the currents flowing through the solenoid coils 140, 141, and 142. Furthermore, since the plasma moves along magnetic field lines, it can also be controlled by the magnetic field configuration.

[0028] A sample stage 125, fixed by beams (not shown), is installed inside the vacuum processing chamber 101. The sample stage 125, vacuum vessel 102, turbomolecular pump 105, and cavity resonator 134 are cylindrical, and their central axes are the same, so the generation of plasma 144 and the flow of gas are uniform with respect to the central axis. The wafer 150 to be etched is transported to the top of the sample stage 125 by a transport device such as a robotic arm provided on the plasma processing apparatus 100 and placed on the sample stage.

[0029] The top and sides of electrode 151 (hereinafter also referred to as the "second electrode") are covered with a dielectric film 152. Inside the dielectric film 152, electrostatic adsorption electrodes 153 (hereinafter also referred to as the "first electrode") are installed, separated on the central and outer sides of the sample stage 125. An electrostatic adsorption voltage generator 154 is connected to the electrostatic adsorption electrodes 153 from outside the vacuum chamber 102. The electrostatic adsorption voltage generator 154 generates a voltage for electrostatically adsorbing the wafer placed on the sample stage. By applying different voltages from the electrostatic adsorption voltage generator 154 to the central and outer electrostatic adsorption electrodes 153, an attractive force is generated between the wafer 150 and the electrostatic adsorption electrodes 153, fixing the wafer 150 to the top of the sample stage 125. In addition, a temperature control film 155 is installed inside the dielectric film 152 and connected to a temperature control mechanism 156 outside the vacuum chamber 102. This allows for control of the temperature of the sample stage 125 and the temperature of the wafer 150.

[0030] When plasma 144 is generated, sheaths 145 and 146 are generated between plasma 144 and wafer 150, and between plasma 144 and earth 157, respectively. Particles in plasma 144 pass through these sheaths 145 to reach wafer 150.

[0031] When a high-frequency voltage is output by the high-frequency bias power supply 158 connected to the electrode 151, an electrical circuit is formed that goes from the automatic matching unit 159, electrode 151, dielectric film 152, wafer 150, sheath 145, plasma 144, and sheath 146 to ground 157, as described later. Then, a high-frequency voltage is generated on the wafer 150, and the wafer 150 acquires a self-bias voltage. This accelerates the ions incident from the plasma 144 onto the wafer 150, enabling anisotropic etching. This high-frequency voltage is lower than the output frequency of the microwave power supply 130 and has a frequency high enough to apply voltage to the wafer 150 through the dielectric film 152, typically ranging from several hundred kHz to several MHz. The automatic matching unit 159 also performs impedance matching so that the power output from the high-frequency bias power supply 158 is efficiently transmitted to the sheath 145.

[0032] The above configuration is connected to the control unit 160 and is controlled according to a pre-set operating sequence called a recipe.

[0033] Figure 2 is a block diagram showing the electrical equivalent circuit of the plasma processing apparatus according to Embodiment 1. Figure 2 shows the equivalent circuit of the electrical circuit formed when a voltage is applied by the high-frequency bias power supply 158 and the electrostatic adsorption voltage generation unit 154 according to Embodiment 1 shown in Figure 1.

[0034] The output of the electrostatic adsorption voltage generation unit 154 travels through point 153a corresponding to the electrostatic adsorption electrode 153, capacitance 152a corresponding to the dielectric film 152, capacitance 150a corresponding to the dielectric film deposited on the wafer 150, point 150b corresponding to the surface of the wafer 150, parallel circuit 145a corresponding to the sheath, resistance 144a corresponding to the plasma, and parallel circuit 146a corresponding to the sheath 146, before reaching ground 157.

[0035] In this equivalent circuit, the electric field E generated inside the wafer 150 is given by the relationship E = AV / d, where d is the thickness of the wafer 150 and A is the proportionality constant. That is, the electric field E is proportional to the voltage V output by the electrostatic adsorption voltage generation unit 154.

[0036] Furthermore, the relationship I = B × dV / dt holds between the voltage V output by the electrostatic adsorption voltage generation unit 154 and the current I flowing from the electrostatic adsorption voltage generation unit 154 through the wafer 150 to the ground 157, using a proportionality constant B. That is, the current I flowing from the electrostatic adsorption voltage generation unit 154 through the wafer 150 to the ground 157 is proportional to the rate at which the voltage V output by the electrostatic adsorption voltage generation unit 154 changes with respect to time.

[0037] Figure 3 shows the waveform of the voltage applied to the wafer. Figure 3(a) shows the waveform of the voltage output from the electrostatic adsorption voltage generation unit 154 according to Embodiment 1 shown in Figure 1. The electrostatic adsorption voltage generation unit 154 outputs the voltage 301 shown in graph 300 based on the signal from the control unit 160. The waveform of voltage 301 is the voltage V for electrostatic adsorption. ESC This waveform is obtained by superimposing a voltage to remove the charge accumulated on the surface of the wafer 150.

[0038] The waveform of voltage 301 has a period T consisting of four periods. The slopes in each period are denoted as g1, g2, g3, and g4, respectively, and the lengths of each period are denoted as T1, T2, T3, and T4. The amplitude of voltage 301 is denoted as V0. The first period T1 has the first slope g1, the second period T2 has the second slope g2, the third period T3 has the third slope g3, and the fourth period T4 has the fourth slope g4. The period T is divided into periods T1 to T4 in order. In the first period T1 and the second period T2, voltage 301 has an upward slope, and in the third period T3 and the fourth period T4, voltage 301 has a downward slope.

[0039] Furthermore, in order to remove the charge accumulated on the surface of wafer 150 by moving it to the outside of wafer 150, the time for which the current I flows continuously in the same direction must be longer than the time t required for the charge accumulated on the surface of wafer 150 to move to the outside of wafer 150. Here, time t is obtained by dividing the distance L that the charge accumulated on the surface of wafer 150 moves when it is removed by the velocity v of the charge (electrons and positive ions) on wafer 150. The distance L is the distance from the surface of wafer 150 to the dielectric film 152, and it is assumed that there is almost no difference between the case of electrons and positive ions and that the distance is the same. In the apparatus configuration of this embodiment, the time required for the charge accumulated on the surface of wafer 150 to move to the outside of wafer 150 is several hundred μs, so it is desirable that the time for which the current I flows continuously be 1 ms or more. That is, it is desirable that the lengths T1, T2, T3, and T4 of each period of the voltage 301 waveform are all not less than 1 ms. Note that one period T is, for example, about 20 ms, and the waveform of voltage 301 is set within one period T. Furthermore, in the first period T1 and the third period T3, it is necessary to remove both the charge flowing in from the plasma and the charge already accumulated on the wafer surface. On the other hand, in the second period T2 and the fourth period T4, it is sufficient to remove only the charge flowing in from the plasma. For this reason, the relationship between the magnitudes of the voltage slopes is such that the slope in the first period is greater than the slope in the second period, g1 > g2, and -g3 > -g4.

[0040] Furthermore, the voltage value at the start of the first period T1 is equal to the voltage value at the end of the fourth period T4, and the voltage 301 is applied repeatedly from the first period T1 to the fourth period T4.

[0041] The triangular wave voltage 302 in Figure 3(b) is shown for comparison with the voltage 301 in Figure 3(a), and it shows a waveform that can remove charged particles on the wafer 150. In the triangular wave voltage 302, both the rising and falling edges of the voltage waveform are straight lines with a constant slope, so a constant current flows for a predetermined time.

[0042] Figure 4 shows the waveform of the current flowing through the wafer 150. Figure 4 shows the current I flowing from the electrostatic adsorption voltage generation unit 154 according to Embodiment 1 shown in Figure 1, through the wafer 150, to the ground 157, and graph 400 shows the waveform of that current I. The current waveform 401 in Figure 4(a) represents the case using the voltage 301 shown in Figure 3(a), and the current waveform 403 in Figure 4(b) represents the case using the triangular wave voltage 302 shown in Figure 3(b).

[0043] When voltage 301 is used, the current I that flows during the period when the output voltage of the electrostatic adsorption voltage generation unit 154 is changing is equal to the slope of the voltage waveform in each period multiplied by the proportionality constant B, as shown in Figure 4(a). When triangular wave voltage 302 is used, the slope of the waveform of triangular wave voltage 302 is ±4V0 / T, so a current of ±B × 4V0 / T flows, as shown in Figure 4(b).

[0044] In current waveform 401, when the current has a positive value, negative charges accumulated on wafer 150 are removed, and when the current has a negative value, positive charges accumulated on wafer 150 are removed. That is, in the first and second periods T1 and T2, negative charges accumulated on wafer 150 are removed, and in the third and fourth periods T3 and T4, positive charges accumulated on wafer 150 are removed. As will be explained later regarding Figure 5(a), the amount of negative charge removed from wafer 150 in the second period T2 is set to be equal to the amount of charge flowing from the plasma to the wafer surface. Similarly in current waveform 403, when the current has a positive value, negative charges accumulated on wafer 150 are removed, and when the current has a negative value, positive charges accumulated on wafer 150 are removed.

[0045] The total area of ​​the shaded portion 402 represents the amount of charge removed from the wafer 150 when voltage 301 is used. In this case, the value of current I is equal to the slope of voltage 301 multiplied by the proportionality constant B, so the area of ​​the shaded portion 402 in the first period T1 is Bg1 × T1, and the area of ​​the shaded portion 402 in the second period T2 is Bg2 × T2. The sum of these areas is B(g1 × T1 + g2 × T2), and from Figure 3(a), g1 × T1 + g2 × T2 = 2V0, so the total area of ​​the portion of the shaded portion 402 where current I has a positive value is B × 2V0. Similarly, the total area of ​​the portion of the shaded portion 402 where current I has a negative value is also B × 2V0. Furthermore, when triangular wave voltage 302 is used, the total area of ​​the shaded portion 404 corresponds to the amount of charge. In this case, the sum of the areas of the parts of the shaded area 404 where the current I has a positive value and the sum of the areas where the current I has a negative value are both B × 2V0. That is, whether voltage 301 or triangular wave voltage 302 is used, the amount of charge removed from the wafer 150 per unit time is the same.

[0046] Figure 5 shows the amount of negative charge accumulated on the surface of wafer 150. Graph 500 shows the time evolution of the amount of negative charge; the time evolution of charge 501 shown in Figure 5(a) represents the case using voltage 301, and the time evolution of charge 502 shown in Figure 5(b) represents the case using triangular wave voltage 302.

[0047] Here, Ip is defined as the amount of charge that flows in from the plasma 144 and accumulates on the surface of the wafer 150 per unit time. In Embodiment 1, Ip is the amount of charge that flows in from the plasma generated when the microwave power supply 130 and the high-frequency bias power supply 158 are applied during the period T1 to T4, and is a constant amount of charge per unit time. At this time, it is also possible to interpret the current I as representing the amount of charge that is removed from the surface of the wafer 150 per unit time. The amount of charge accumulated on the surface of the wafer 150 decreases when the value of current I is greater than the value of Ip, increases when the value of current I is less than the value of Ip, and does not change when the value of current I and the value of Ip are equal.

[0048] As shown in Figure 5(a), in the time variation 501 of the charge amount, during the third and fourth periods T3 and T4, no current with a positive value flows to remove negative charges from the surface of the wafer 150 (see Figure 4(a)), and negative charges flow in from the plasma, so the charge amount increases. In the first period T1, the value of the current I is adjusted so that the charge amount becomes 0 when the first period T1 ends by appropriately setting the slope g1 of the voltage 301 during the first period T1. Similarly, in the second period T2, the value of the current I and the value of Ip are adjusted so that they become equal by appropriately setting the slope g2 of the voltage 301 during the second period T2. This makes it possible to maintain a state in which no charge is accumulated on the surface of the wafer 150 during the second period T2.

[0049] On the other hand, as shown in Figure 5(b), in the time variation 502 of the charge quantity, the length of the period during which a current flows to remove negative charge from the surface of the wafer 150 and the length of the period during which no current flows are both T0 / 2. Furthermore, during one period T0 in which the triangular wave voltage is applied, the state in which no charge is accumulated on the surface of the wafer 150 is not maintained.

[0050] Furthermore, when calculating the time average of the amount of charge accumulated on the surface of wafer 150 using voltage 301 and triangular wave voltage 302, when the periods of these voltages are equal, the amount of charge when using voltage 301 in Figure 3(a) is smaller than when using triangular wave voltage 302. Specifically, assuming that the period T of voltage 301 and the period T0 of triangular wave voltage 302 are equal, and T0 = T = T1 + T2 + T3 + T4, and T1 + T2 = T3 + T4 = T0 / 2, the time average of the amount of charge in Figure 3(a) is [Area of ​​period T1 {Ip(T3 + T4) × T1 × 1 / 2} + Area of ​​period T2 (0) + Area of ​​periods T3 and T4 {Ip(T3 + T4) × (T3 + T4) × 1 / 2}] / (T1 + T2 + T3 + T4) = (Ip + T0) / 4 × (0.5 + T1 / T0). In Figure 3(b), the time average of the charge is given by two triangles with height Tp × T0 / 2 and base length T0 / 2: Tp × T0 / 2 × T0 / 2 × (1 / 2) / (T0) = Ip × T0 / 4. When (0.5 + T1 / T0) < 1, i.e., T1 < 0.5 × T0, the charge is smaller when voltage 301 is used than when triangular wave voltage 302 is used.

[0051] In Embodiment 1, the amount of charge flowing into the wafer and the amount of charge accumulated can be estimated from the density and temperature of the plasma that can be generated in the apparatus and the structure of the wafer surface. Based on the estimated amount of charge, T1 and T3 are set as the time required for charge removal, and T2 and T4 are the values ​​obtained by subtracting the times of T1 and T3 from the time of one cycle. Typically, T1 = T3 and g1 = -g3. In addition, the voltage duration and slope parameters are registered in advance in the recipe, and appropriate values ​​are set from the material of the sample and apparatus, and the plasma conditions.

[0052] The above mainly describes the removal of negative charge. However, by appropriately setting the third slope g3 and the fourth slope g4 in the third period T3 and the fourth period T4, it is possible to remove the positive charge accumulated on the surface of the wafer 150 during half a cycle of the applied voltage while minimizing the time period during which the surface of the wafer 150 is charged. For example, Figure 5 shows that negative charge is removed in the first period T1 and the second period T2, and that the amount of negative charge accumulated per unit time in the second period T2 is equal to the amount of negative charge removed per unit time. When considering positive charge, it is shown that positive charge is removed in the third period T3 and the fourth period T4, and that the amount of positive charge accumulated per unit time in the fourth period T4 is equal to the amount of positive charge removed per unit time.

[0053] [Embodiment 2] Embodiment 2 of the present invention will be described with reference to Figure 6. In Embodiment 1, the high-frequency bias power supply 158 applies a voltage to the electrode 151, whereas in Embodiment 2, the high-frequency bias power supply 158 is connected to the electrostatic adsorption electrodes 153a and 153b, which are connected to the electrostatic adsorption voltage generation unit 154, thus differing from Embodiment 1. Note that components with the same reference numerals in Figure 1, which was described in Embodiment 1, and Figure 6, which is described in Embodiment 2, have the same function, so their description will be omitted.

[0054] Figure 6 is a block diagram showing a schematic configuration of a plasma processing apparatus according to Embodiment 2. In Figure 6, the cross-section of the electrode 151 and the details of the high-frequency bias power supply 158 and the electrostatic adsorption voltage generation unit 154 are shown. In Embodiment 2, the high-frequency bias power supply 158 and the automatic matching unit 159 are connected to the electrostatic adsorption electrodes 153a and 153b via capacitors 601a and 601b. The electrostatic adsorption voltage generation unit 154 consists of power supply units 154a and 154b, which are connected to the electrostatic adsorption electrodes 153a and 153b, respectively.

[0055] Capacitors 601a and 601b serve to prevent the DC voltage output from the electrostatic adsorption voltage generation unit 154 from being transmitted to the high-frequency bias power supply 158. Furthermore, by simulating the capacitance between electrode 151 and electrostatic adsorption electrodes 153a and 153b in Embodiment 1 shown in Figure 1 using capacitors 601a and 601b, the same effect as in Embodiment 1 shown in Figure 1 can be obtained.

[0056] In Embodiment 2, the same effects as in Embodiment 1 can be obtained. That is, during one cycle of the applied voltage by the electrostatic adsorption voltage generation unit 154, the positive and negative charges accumulated on the surface of the wafer 150 can be removed within half a cycle, while minimizing the time period during which the wafer surface is charged. As a result, a plasma processing apparatus can be provided that can suppress the deterioration of the processed shape caused by the electron shading effect to a greater extent than before.

[0057] Based on the above explanation, by using voltage 301, it is possible to make the amount of charge removed from wafer 150 equivalent to that when triangular wave voltage 302 is used, while minimizing the time the wafer surface remains charged compared to when triangular wave voltage 302 is used.

[0058] The invention has been described in detail above based on embodiments, but the present invention is not limited to the embodiments described above and includes various modifications. For example, the embodiments described above are described in detail to make the present invention easy to understand, but the present invention is not necessarily limited to having all the configurations described. For example, in the embodiments described above, it was explained that one period of voltage is divided into four periods, but it is not limited to dividing it into four periods. It is also possible to have two or more periods for removing the charge accumulated on the wafer surface. Furthermore, minimizing the time the wafer surface is charged also includes reducing the time period during which the wafer surface is charged while the voltage shown in the embodiments is applied, compared to the case of conventional triangular wave voltage. Depending on the configuration of the device and the configuration of the wafer surface, the time period during which the wafer surface is charged can have a certain range.

[0059] Furthermore, it is possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add configurations from other embodiments to the configuration of one embodiment. In addition, it is possible to add other configurations to the configuration of each embodiment, or to delete or replace parts of the configuration. Note that the components and relative sizes shown in the drawings are simplified and idealized for the purpose of explaining the present invention in an easy-to-understand manner, and the present invention is not limited thereto.

[0060] It should be noted that the structures and methods described in the above-described embodiments are not limited to those described in the above embodiments, and include a variety of application examples. [Explanation of Symbols]

[0061] 100 Plasma processing equipment, 101 Vacuum processing chamber, 102 Vacuum vessel, 103 Dielectric window, 104 Pressure gauge, 105, 111 Turbomolecular pump, 110 Variable conductance valve, 112 Dry pump, 120 Small pore, 121 Shower plate, 122 Space, 123 Gas piping, 124 Gas supply mechanism, 125 Sample stage, 130 Microwave power supply, 131 Waveguide, 132 Output Monitor, 133, 159 Automatic Matching Unit, 134 Cavity resonator, 140 Solenoid coil, 143 Coil power supply, Resistance equivalent to 144 plasma, 144a plasma, 145, 146 sheath, 145a, 146a parallel circuit corresponding to sheath, 150 wafers, 150a capacitance corresponding to the dielectric film deposited on the wafer, 150b Point corresponding to the surface of the wafer, 151 Electrode, 152 Dielectric film, 153, 153a, 153b Electrostatic adsorption electrodes, 154 Voltage generation unit for electrostatic adsorption, 154a, 154b Power supply unit, 155 Temperature control membrane, 156 Temperature control mechanism, 157 Ground, 158 High-frequency bias power supply, 160 Control unit, 300, 400, 500 graphs, 301 voltage, 302 triangular wave voltage, 401, 403 Current waveform, 402, 404 Shaded area, 501, 502 Time-dependent, 601a, 601b Capacitor, T1-T4 period, g1-g4 slope, T, T0 period

Claims

1. A first high-frequency power supply that provides high-frequency power for generating plasma, A sample stand on which the sample is placed, A second high-frequency power supply for applying a high-frequency voltage to the sample stage, An electrostatic adsorption voltage generating unit applies a voltage to the sample stage that is a superposition of a voltage for electrostatically adsorbing the placed sample to the sample stage and a voltage for removing the charge accumulated on the surface of the sample, The system includes a control unit that controls the electrostatic adsorption voltage generation unit, The waveform of one period of the superimposed voltage has a first period of the first slope, a second period of the second slope, a third period of the third slope, and a fourth period of the fourth slope. The slopes of the first gradient and the second gradient are both positive slopes. The slopes of the third gradient and the fourth gradient are negative slopes. The first gradient is greater than the second gradient. A plasma processing apparatus characterized in that the third gradient is greater than the fourth gradient.

2. In the plasma processing apparatus according to claim 1, The sample stage comprises a first electrode for electrostatically adsorbing the placed sample, and a second electrode different from the first electrode. The high-frequency voltage is applied to the second electrode. A plasma processing apparatus characterized in that the superimposed voltage is applied to the first electrode.

3. In the plasma processing apparatus according to claim 1, The sample stage comprises a first electrode for electrostatically adsorbing the placed sample, and a second electrode different from the first electrode. A plasma processing apparatus characterized in that the high-frequency voltage and the superimposed voltage are applied to the first electrode.

4. In the plasma processing apparatus according to claim 1, The voltage at the start of the first period is equal to the voltage at the end of the fourth period. A plasma processing apparatus characterized in that the first period to the fourth period is repeated.

5. In the plasma processing apparatus according to claim 1, The length of each of the periods from the first to the fourth is longer than the predetermined time required for the charge accumulated on the surface of the sample to move to the outside of the sample. The plasma processing apparatus is characterized in that the predetermined time is the time obtained by dividing the distance traveled when the charge accumulated on the sample surface is removed by the velocity of the charge accumulated on the sample.

6. In the plasma processing apparatus according to claim 1, The plasma processing apparatus is characterized in that the superimposed voltage waveform has a second slope such that the amount of negative charge accumulated in the sample per unit time is equal to the amount of negative charge removed from the sample per unit time.

7. In the plasma processing apparatus according to claim 1, The plasma processing apparatus is characterized in that the superimposed voltage waveform has a fourth slope such that the amount of positive charge accumulated in the sample per unit time is equal to the amount of positive charge removed from the sample per unit time.

8. In the plasma processing apparatus according to claim 1, The plasma processing apparatus is characterized in that the superimposed voltage has a length of 1 ms or more in each of the periods from the first period to the fourth period.

9. In a plasma treatment method for treating a sample with plasma, The process includes applying a voltage and a high-frequency voltage to a sample stage on which the sample is placed while performing plasma treatment on the sample, The waveform of the voltage over one period has a first period of the first slope, a second period of the second slope, a third period of the third slope, and a fourth period of the fourth slope. The slopes of the first gradient and the second gradient are both positive slopes. The slopes of the third gradient and the fourth gradient are negative slopes. The first gradient is greater than the second gradient. A plasma processing method characterized in that the third gradient is greater than the fourth gradient.

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