Multilayer ceramic capacitors and their manufacturing methods

Abstract

To provide a multilayer ceramic capacitor with anti-reduction properties and excellent high-temperature accelerated life characteristics, which has a high specific dielectric constant of a dielectric layer even when a thickness of the dielectric layer is 0.6 μm or less, and at the same time, has stable temperature characteristics of capacitance that conform to X6S properties of EIA standards (a change rate (▵C) of capacitance in a temperature range of -55°C to +105°C falls within ±22%), and also to provide a method for manufacturing the same.SOLUTION: A multilayer ceramic capacitor 1 includes: a plurality of dielectric layers 12 comprising dielectric ceramic containing grains whose main component is barium titanate having a core-shell structure made up of a core part and a shell part, and grains whose main component is calcium titanate having a core-shell structure made up of a core part and a shell part; and a plurality of internal electrodes 13 stacked alternately with each of the plurality of dielectric layers.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] In recent years, with the miniaturization and thinning of digital electronic devices such as mobile phones, the miniaturization and increased capacitance of multilayer ceramic capacitors surface-mounted on electronic circuit boards and the like have been progressing. A multilayer ceramic capacitor has a structure in which layers of a ceramic dielectric layer, which is a dielectric, and conductor layers, which are internal electrodes, are alternately laminated.

[0003] Generally, if the size of a capacitor is reduced, the area of the internal electrodes facing each other across the dielectric becomes smaller, resulting in a decrease in capacitance. Therefore, in order to ensure the capacitance of a capacitor for chip size miniaturization, a high-density lamination technology that thins the dielectric and internal electrode layers and laminates them in multiple layers is essential. Also, as miniaturization and increased capacitance progress rapidly, further improvement in reliability is required.

[0004] Conventionally, as dielectric ceramics used in multilayer ceramic capacitors, various dielectric ceramics mainly composed of barium titanate (BaTiO3) (hereinafter sometimes referred to as "BT") having a high relative dielectric constant have been used. Among them, dielectric ceramics having a core-shell structure of sintered crystal grains are known as dielectric ceramics having good capacitance-temperature characteristics and excellent life characteristics. For example, by adding a sub-component containing a rare earth element or the like to BT as the main component and firing while suppressing grain growth, dielectric ceramics having a core-shell structure with little temperature change in dielectric constant have been obtained (see, for example, Patent Document 1). According to Patent Document 1, an ABO3 compound [where A is Ba (barium), Ba and Ca (calcium), or Ba, Ca and Sr (strontium), and B is Ti (titanium), or Ti and Zr (zirconium)] is used as a component of dielectric ceramics, and the average particle size of the raw material powder is 0.1 μm to 0.3 μm. Furthermore, the requirements for obtaining a predetermined temperature characteristic are that the crystals of the ceramics after firing satisfy the condition of core diameter < 0.4 × grain diameter, and the average grain diameter is in the range of 0.15 μm to 0.8 μm.

[0005] Incidentally, while BT-type dielectric ceramics can have a high relative permittivity, their capacitance changes significantly with temperature when used as a ceramic capacitor. Various proposals have been made to flatten this capacitance change with temperature. For example, Patent Document 2 proposes using a dielectric ceramic as a dielectric layer, which has perovskite-type barium titanate crystal particles (BCT-type crystal particles) in which a portion of the A site is substituted with Ca, and perovskite-type barium titanate crystal particles (BT-type crystal particles) that do not contain substituted Ca. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2004-345927 [Patent Document 2] Japanese Patent Publication No. 2003-40671 [Overview of the project] [Problems that the invention aims to solve]

[0007] In recent years, there has been a demand for even higher integration and thinner dielectric layers in chip-type multilayer ceramic capacitors, and it is not uncommon to form dielectric layers made of dielectric ceramics with a thickness of 0.6 μm or less. In this case, if the grain diameter of the dielectric ceramics is set within the range of the conventional technology described above (Patent Document 1) (0.15 μm to 0.8 μm), the thickness of the dielectric layer and the grain size become approximately the same, making it impossible to secure a sufficient number of grain boundaries between the internal electrode layers. As a result, short circuits (electrical short circuits) and cracks (structural defects) are more likely to occur, which may lead to a decrease in the reliability of the product.

[0008] Furthermore, according to Patent Document 2, by realizing a coexistence structure of BT-type crystal particles exhibiting a high dielectric constant and BCT-type crystal particles with excellent DC bias characteristics (characteristics in which the decrease in capacitance when a DC voltage is applied is small), a multilayer ceramic capacitor with excellent capacitance temperature characteristics and high-temperature added life can be obtained, and it is stated that a dielectric layer thickness of 4 μm or less is preferable. However, thinning the dielectric layer to 0.6 μm or less shortens the lifetime of the dielectric layer, reducing the reliability of the multilayer ceramic capacitor.

[0009] The present invention has been made in view of the above problems, and aims to provide a reduction-resistant multilayer ceramic capacitor and a method for manufacturing the same, which has a high relative permittivity of the dielectric layer even when the thickness of the dielectric layer is 0.6 μm or less, and at the same time has stable capacitance temperature characteristics that conform to the EIA standard X6S characteristics (capacitance change rate (ΔC) within ±22% in the temperature range of -55℃ to +105℃), and has excellent high-temperature accelerated lifetime characteristics. [Means for solving the problem]

[0010] As a result of investigations to solve the aforementioned problems, the inventors of the present invention have found that by using a ceramic raw material powder containing a mixture of barium titanate and calcium titanate having a larger average particle size than barium titanate, and firing it, a dielectric ceramic can be obtained that contains particles mainly composed of barium titanate having a core-shell structure (hereinafter sometimes referred to as "BT particles") and particles mainly composed of calcium titanate having a core-shell structure (hereinafter sometimes referred to as "CT particles"). Furthermore, by using this in the dielectric layer of a multilayer ceramic capacitor, a multilayer ceramic capacitor can be obtained that has a high relative permittivity of the dielectric layer, stable capacitance-temperature characteristics conforming to the EIA standard X6S, and excellent reduction resistance with high-temperature load life characteristics, thus completing the present invention.

[0011] In other words, one aspect of the present invention for solving the above problem is, Particles mainly composed of barium titanate having a core-shell structure consisting of a core and a shell, and Particles mainly composed of calcium titanate having a core-shell structure consisting of a core and a shell. Multiple dielectric layers composed of dielectric ceramics containing, Multiple internal electrodes stacked alternately with each of the multiple dielectric layers. This is a multilayer ceramic capacitor equipped with [specific features / features].

[0012] Another aspect of the present invention is, A process to prepare ceramic raw material powder by blending barium titanate and calcium titanate having a larger average particle size than the barium titanate, and then adding auxiliary raw materials to this mixture. A sheet formation step in which a ceramic green sheet is formed using the obtained ceramic raw material powder, A printing process to print an internal electrode pattern onto the obtained ceramic green sheet, A lamination process in which ceramic green sheets that have undergone the printing process are laminated and pressed together to form a laminate, The process involves firing the resulting laminate to obtain a sintered body, A step of forming external electrodes on one pair of opposite side surfaces of the obtained sintered body This is a method for manufacturing a multilayer ceramic capacitor comprising the above step. [Advantages of the Invention]

[0013] According to the present invention, even when the thickness of the dielectric layer is thinned to 0.6 μm or less, the dielectric constant of the dielectric layer is as high as 1500 or more, and at the same time, it has stable capacitance temperature characteristics conforming to the EIA standard X6S, and a reduction-resistant multilayer ceramic capacitor with excellent high-temperature load life characteristics can be provided. Therefore, it is possible to achieve both good temperature characteristics and improved life characteristics in a miniaturized multilayer ceramic capacitor. [Brief Description of the Drawings]

[0014] [Figure 1] Schematic cross-sectional view of a multilayer ceramic capacitor [Figure 2] Cross-sectional view schematically showing a core-shell structure [Figure 3] Scanning transmission electron microscope image of the core-shell part of CT particles obtained in Example 2 [Figure 4] Diagram showing EDS data of the core-shell part of CT particles obtained in Example 2 [Figure 5] Diagram showing EDS data of the core-shell part of BT particles obtained in Example 2 [Figure 6] Diagram explaining the measurement positions of Ca concentrations present in the core part and shell part of CT particles [Embodiments for Carrying Out the Invention]

[0015] Hereinafter, referring to the drawings, the configuration, operation, and effects of the present invention will be described in conjunction with the technical idea. However, the mechanism of operation includes an assumption, and its correctness does not limit the present invention. When a numerical range or the like is represented using "~", it means including the numerical values described as the lower limit and the upper limit thereof.

[0016] [Multilayer Ceramic Capacitor] Figure 1 is a schematic cross-sectional view showing one embodiment of a multilayer ceramic capacitor according to one aspect of the present invention (hereinafter referred to as "this embodiment"). As shown in Figure 1, the multilayer ceramic capacitor 1 according to this embodiment comprises a sintered body 10 having a rectangular parallelepiped shape and a pair of external electrodes 20, 20 with different polarities provided on either of the opposing end faces of the sintered body 10, with a portion of each of the external electrodes 20, 20 extending over the upper and lower surfaces of the sintered body 10. The sintered body 10 has a laminate formed by stacking a plurality of dielectric layers 12 via an internal electrode layer 13, and a protective region (cover layer) 15 that covers at least a part of the laminate. The edges of each internal electrode layer 13 are alternately drawn out to a pair of external electrodes 20, 20 located at both ends of the sintered body 10, and are electrically connected to the external electrodes 20, 20. The protective region 15 is provided to protect the dielectric layer 12 and the internal electrode layer 13 from external moisture, contamination, and other contaminants, and to prevent their deterioration over time. It is also provided on both sides (not shown) perpendicular to the lamination direction of the laminate where the external electrodes 20, 20 are not provided, and its material is the same as the main component of the dielectric ceramics that constitute the dielectric layer 12.

[0017] In this embodiment, the thickness of the dielectric layer 12 is preferably 0.6 μm or less, more preferably 0.5 μm or less, and even more preferably 0.4 μm or less after firing. By reducing the thickness of the dielectric layer 12, the number of layers of dielectric layer 12 can be increased, and as a result, the capacitance of the multilayer ceramic capacitor 1 can be increased without increasing the dimensions of the laminate. The following describes each layer and component constituting the multilayer ceramic capacitor according to this embodiment.

[0018] (Dielectric layer) The dielectric layer 12 in the multilayer ceramic capacitor 1 according to this embodiment is composed of dielectric ceramics obtained by firing ceramic raw material powder containing a mixture of barium titanate (BT) and calcium titanate (CT). The dielectric ceramics obtained by firing contain BT particles and CT particles having a core-shell structure consisting of a core portion and a shell portion, thereby improving high-temperature load life in addition to high dielectric constant and good temperature characteristics.

[0019] Here, "core-shell structure consisting of a core and a shell" refers to a crystalline particle structure in which, during the firing process of a sintered body, the main component remains in the central part (core) of the particle crystal, while the secondary components are solid-dissolved in its outer shell. Figure 2 is a schematic cross-sectional view of the core-shell structure, where 30 and 31 indicate the "core" and "shell" sections, respectively.

[0020] The existence of a core-shell structure in the dielectric ceramic constituting the dielectric layer 12 in this embodiment can be confirmed by thinning any surface of the dielectric layer 12 to a thickness that allows for scanning transmission electron microscopy (STEM) observation, and then observing the cross-section with STEM.

[0021] Figure 3 shows a STEM image obtained by thinning the dielectric layer of the multilayer ceramic capacitor obtained in Example 2 (described later) by polishing, and finally thinning the observation area using a gallium ion beam, and observing the core-shell structure of the CT particles in the observation area using a scanning transmission electron microscope (STEM).

[0022] Furthermore, elemental mapping images can be obtained from the obtained STEM images using energy-dispersive X-ray analysis (EDS), and by checking the contrast of the mapping images, the presence of BT particles and CT particles having a core-shell structure in the dielectric ceramics constituting the dielectric layer 12 can be confirmed. Furthermore, by performing EDS analysis on a micro-region, it is possible to confirm the elemental concentrations in the core and shell portions of BT and CT particles that have a core-shell structure. Furthermore, the concentration of each element in the dielectric layer can also be analyzed using ICP mass spectrometry.

[0023] Figures 4 and 5 show the EDS data for the core-shell portions of CT particles and BT particles obtained in Example 2, which will be described later. The leftmost columns of both figures represent the data for Ba and Ca, respectively, while the center and rightmost columns represent the data for Ho (holmium) and Zr (zirconium), which are minor components described later.

[0024] As shown in the leftmost figure of Figures 4 and 5, BT particles with a core-shell structure have Ba evenly distributed throughout both the shell and core. On the other hand, CT particles have more Ca in the core than in the shell, and there is a large change in Ca concentration at the boundary between the core and shell of the CT particle. In this embodiment, it is preferable that the Ca content in the core is four times or more than the Ca content in the shell. This results in better temperature characteristics and lifespan characteristics.

[0025] Furthermore, as shown in the center and rightmost figures of Figures 4 and 5, both BT and CT particles have more minor components such as Ho and Zr in the shell than in the core. In both BT and CT particles, the concentration change of minor components is larger at the boundary between the core and the shell. However, when the amount of added minor components is small, the magnitude of the concentration change may not be clearly evident at the boundary between the core and the shell.

[0026] In the multilayer ceramic capacitor 1 according to this embodiment, the dielectric ceramic constituting the dielectric layer 12 preferably contains calcium in a proportion such that the molar percentage of calcium (Ca / (Ba+Ca)×100) relative to the total of barium and calcium is 22 to 25 mol%. Within this range, the dielectric ceramic contains a large number of particles having a core-seal structure, resulting in excellent properties.

[0027] In this embodiment, the average crystal particle diameter of the BT particles in the dielectric ceramic constituting the dielectric layer 12 is preferably 200 nm to 500 nm, more preferably 200 nm to 400 nm, and the average crystal particle diameter of the CT particles is preferably 200 nm to 400 nm, more preferably 200 nm to 300 nm. In this specification, the average crystal particle diameter of BT particles and CT particles was determined by observing the polished surface with a scanning electron microscope (SEM), determining the maximum and minimum diameters of 100 crystal particles, and taking the average of these values ​​as the average crystal particle diameter.

[0028] As mentioned above, the dielectric ceramics constituting the dielectric layer 12 according to this embodiment have CT blended into their ceramic raw material powder. However, since the sinterability often deteriorates when CT is added, it is preferable to add glass such as Li-Ba-B-Si glass, or a sintering aid such as LiF. The added sintering aid forms an amorphous phase during the firing process of the ceramic raw material powder and is present at the grain boundaries between BT particles and CT particles in the dielectric ceramic according to this embodiment.

[0029] In this embodiment, the dielectric ceramic may contain predetermined sub-components depending on the purpose. In this embodiment, preferred minor components include rare earth elements selected from the group consisting of Ho, Dy (dysprosium), Y (yttrium), and Yb (ytterbium), and at least one element selected from the group consisting of Zr, Mg (magnesium), Mn (manganese), and Si (silicon).

[0030] In this embodiment, at least one rare earth element selected from the group consisting of Ho, Dy, Y, and Yb among the minor components has the function of improving the DC bias characteristics of the dielectric layer and the lifetime characteristics in load testing. As described in

[0025] above, the rare earth element Ho is present in greater quantities in the shell portion than in the core portion. In this embodiment, the content of rare earth elements in the dielectric ceramic is preferably 0.4 to 2.0 at%, more preferably 0.6 to 1.5 at%, and even more preferably 0.8 to 1.2 at%, when Ti is set to 100 at%.

[0031] In this embodiment, among the aforementioned subcomponents, Mg, Mn, and Zr have the function of imparting reduction resistance to the dielectric ceramics when firing the dielectric layer 12. As described in

[0025] above, minor components such as Zr are present in greater quantities in the shell portion than in the core portion. In particular, because Zr has high reduction resistance, covering the core with a shell containing a large amount of Zr makes it possible to obtain a dielectric ceramic with a stable structure while maintaining a high dielectric constant, and with high reliability.

[0032] In this embodiment, the total content of Mg, Mn, and Zr in the dielectric ceramic is preferably 0.5 to 7.0 at%, more preferably 1.0 to 6.0 at%, and even more preferably 2.0 to 5.0 at%, when Ti is set to 100 at%.

[0033] In this embodiment, among the aforementioned auxiliary components, Si acts as a sintering aid and has the function of lowering the sintering temperature. In this embodiment, Si is preferably contained in the dielectric ceramic at a concentration of 0.3 to 3.0 at%, more preferably at 0.5 to 2.5 at%, and even more preferably at 0.8 to 2.0 at%, when Ti is considered to be 100 at%.

[0034] (Internal electrode) The conductive material used to form the internal electrode layer 13 is not particularly limited, and at least one metallic material selected from the group consisting of Ni (nickel), Cu (copper), Pd (palladium), Pt (platinum), Ag (silver), and Au (gold) can be used. However, base metals such as Ni and Cu are preferable in that manufacturing costs can be suppressed even with high-layer lamination, and Ni is more preferable in that it can be fired together with the dielectric layer 12 in the present invention. Furthermore, the internal electrode layer 13 may contain ceramic particles as a co-material. The main component ceramic of the ceramic particles is not particularly limited, but it is preferable that it be the same as the main component ceramic of the dielectric layer 12. The thickness of the internal electrode layer 13 is not particularly limited, but is usually 0.26 to 1.00 μm.

[0035] (external electrode) The external electrodes 15 are formed by applying and baking an external electrode paste containing a conductive material and glass powder to both end faces of the sintered body 10, or by applying a metal coating such as Ni, Cu, or Sn (tin) to the underlayer of the external electrodes 20, 20 that have been pre-applied to the laminate by a plating process, or by forming a film on both end faces of the laminate of the sintered body 10 by a sputtering method or the like.

[0036] [Manufacturing method for multilayer ceramic capacitors] A method for manufacturing a multilayer ceramic capacitor according to another aspect of the present invention will be described using one embodiment thereof.

[0037] (Preparation process for ceramic raw materials) As the main component raw material, a mixture of BT and CT with an average particle size larger than BT is used. To this, at least one rare earth element selected from the group consisting of Ho, Dy, Y, and Yb, as well as Zr, Mg, Mn, and Si, etc., are added in the form of oxides or other compounds as minor component raw materials. Furthermore, sintering aids such as glass and LiF are added as needed to prepare the ceramic raw material powder.

[0038] BT and CT are known to be able to be produced by various methods, such as the sol-gel method, solid-phase method, and hydrothermal method, but in this embodiment, any of these methods may be used. Among them, those produced by the sol-gel method are particularly suitable because they have a small particle size distribution, that is, they are composed of fine particles with uniform particle size.

[0039] In this embodiment, in order to obtain dielectric ceramics containing BT particles and CT particles having the above-described core-shell structure by firing ceramic raw material powder, it is preferable that the particle size of CT in the ceramic raw material powder is larger than the particle size of BT. Specifically, it is preferable to use BT and CT particles with an average particle size of 20 nm to 150 nm for BT particles and an average particle size of 200 nm to 300 nm for CT particles, respectively.

[0040] Furthermore, in this embodiment, in order to obtain dielectric ceramics containing BT particles and CT particles having the above-mentioned core-shell structure by firing ceramic raw material powder, it is preferable to blend the BT and CT in the ceramic raw material powder in a molar ratio of 78:22 to 75:25, or in other words, the molar percentage of CT is in the range of 22 to 25 mol%. Blending within this range results in dielectric ceramics containing a large number of particles having a core-shell structure, and excellent properties can be obtained.

[0041] (Ceramic Green Sheet Production Process) Ceramic green sheets are manufactured by wet-mixing a slurry prepared by adding a binder and a solvent to the aforementioned ceramic raw material powder in a ball mill, and then applying and drying the slurry onto the surface of a substrate such as a plastic film using a coating machine such as a doctor blade or die coater. The thickness of the slurry applied to the substrate is preferably such that the thickness after firing in the firing process described later is 0.6 μm or less. The binder in the slurry is not particularly limited as long as it can form the ceramic raw material powder into a sheet shape, maintain that shape, and remove carbon and other substances without leaving any residue by heating before sintering, as described later. Examples include polyvinyl acetal resins such as polyvinyl butyral. Furthermore, the solvent used to prepare the slurry is not particularly limited, and ethanol and toluene can be used. In addition, if necessary, a plasticizer such as dioctyl phthalate (DOP) may be added to the slurry. The content of each component in the slurry is adjusted as appropriate depending on the green sheet molding method and thickness of the green sheet used.

[0042] (Printing process for internal electrode patterns) A conductive paste for forming internal electrodes is prepared by mixing a conductive material, a co-material, and a binder. The conductive material is not particularly limited, and for example, at least one metallic material selected from the group consisting of Ni, Cu, Pd, Pt, Ag, Au, and alloys thereof can be used. In this embodiment, base metals such as Ni and Cu are preferably used. Ceramic particles may also be added as a co-material. The main component ceramic of the ceramic particles is not particularly limited, but it is preferably the same as the main component ceramic of the dielectric layer. The binder is preferably the same as the one used to prepare the ceramic green sheet described above. Next, using the conductive paste for forming the internal electrodes, the pattern of the internal electrode layer is printed onto the surface of the ceramic green sheet by screen printing, gravure printing, or the like.

[0043] (Lamination and cutting process) A ceramic green sheet printed with an internal electrode layer pattern is punched out to a predetermined size. After peeling the substrate from the punched ceramic green sheet, a predetermined number of layers are laminated so that the internal electrode layer and dielectric layer are staggered, and the edges of the internal electrode layer are alternately exposed on both ends of the dielectric layer in the longitudinal direction, alternately leading to a pair of external electrodes 20 with different polarities. After the resulting laminate is pressed together, it is cut to a predetermined chip size by methods such as press cutting or blade dicing to form a laminated chip.

[0044] (Firing process) The resulting laminated chips are subjected to a firing process, but prior to this firing process, a de-bindering treatment is performed to remove organic substances such as binders contained in the ceramic green sheet and internal electrode layer pattern. The conditions for the de-bindering treatment are not particularly limited as long as they can remove the binders while suppressing oxidation. One example is heating to 250-500°C in an N2 atmosphere. After debinding treatment, the ceramic green sheet is fired in a reducing atmosphere consisting of N2 and H2O, causing the various compounds constituting the sheet to react and grow into particles with a core-shell structure. The firing temperature and firing time are determined so that the CT and BT in the ceramic raw material powder are fired in a reducing atmosphere, resulting in an average crystal particle size of CT particles being 200 nm to 500 nm and an average crystal particle size of BT particles being 200 nm to 400 nm, respectively, and thus a multilayer ceramic capacitor with the desired characteristics is obtained. Preferred firing temperatures and times include 1100 to 1300°C for 10 minutes to 2 hours. Furthermore, during the cooling process from the firing temperature, an annealing treatment may be performed in an N2 atmosphere at 600 to 1000°C. In this way, a capacitor body (sintered body 10) is obtained, in which dielectric layers 11 and internal electrode layers 12 are alternately stacked inside.

[0045] (External electrode formation process) External electrodes 20 are formed on both ends of the obtained sintered body 10 by baking an external electrode paste containing a metallic material, for example, at least one selected from the group consisting of Ni, Cu, Pd, Pt, Ag, Au, Sn, and alloys thereof, and glass powder. Alternatively, the external electrodes may be formed on both end faces of the laminate by a sputtering method or the like. [Examples]

[0046] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to such specific examples, and various modifications and changes are possible within the scope of the present invention as described in the claims.

[0047] (Example 1) As the main component raw material, a mixture of BT with an average particle size of 125 nm and CT with an average particle size of 200 nm, prepared by the sol-gel method, was prepared in a molar ratio of 78:22. To this main component raw material, oxides of Ho (rare earth element), Mg, Mn, Si, and Zr were added such that, when the Ti content in the dielectric ceramic constituting the dielectric layer was set to 100 at%, Ho=1.0 at%, Mg=0.5 at%, Mn=0.5 at%, Si=1.5 at%, and Zr=4.0 at%, respectively. Furthermore, a sintering aid, Li-Ba-B-Si glass, was added at 0.5 mass%, to obtain the ceramic raw material.

[0048] A polyvinyl butyral-based binder, ethanol, and toluene were added to the obtained ceramic raw material and wet-mixed using a ball mill to prepare a ceramic slurry. This ceramic slurry was formed into a sheet to obtain a ceramic green sheet. Next, a conductive paste containing Ni was screen printed onto a green sheet to create a conductive paste film that would serve as the internal electrode. Furthermore, the ceramic green sheets on which the conductive paste film was formed were laminated and pressed together so that the sides with the drawn-out conductive paste film were alternating, thereby obtaining a raw laminate that would form the capacitor body.

[0049] The raw laminate was heated to 300°C in an N2 atmosphere to remove the binder, and then the laminate after the binder removal treatment was fired at 1200°C in a reducing atmosphere consisting of N2 and H2O. During the cooling process, an annealing treatment was performed at 700°C in an N2 atmosphere to sinter the raw laminate and obtain a capacitor body (sintered body).

[0050] Next, an external electrode paste containing Cu and glass powder was applied to both ends of the obtained capacitor body, and the external electrodes were formed by baking at 900°C. The external dimensions of the multilayer ceramic capacitor obtained in this way were 0.5 mm in width, 1.0 mm in length, and 0.5 mm in height. The number of dielectric layers sandwiched between the internal electrodes was 10, and the average thickness of each layer was 0.4 μm.

[0051] (Example 2) A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that the mixing ratio of BT and CT in the main component raw materials was changed to 77:23. The resulting multilayer ceramic capacitor had external dimensions of 0.5 mm in width, 1.0 mm in length, and 0.5 mm in height. The dielectric material sandwiched between the internal electrodes consisted of 10 layers, with an average layer thickness of 0.4 μm.

[0052] (Example 3) A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that the mixing ratio of BT and CT in the main component raw materials was changed to 76:24. The resulting multilayer ceramic capacitor had external dimensions of 0.5 mm in width, 1.0 mm in length, and 0.5 mm in height. The dielectric material sandwiched between the internal electrodes consisted of 10 layers, with an average layer thickness of 0.4 μm.

[0053] (Example 4) A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that the mixing ratio of BT and CT in the main component raw materials was changed to 75:25. The resulting multilayer ceramic capacitor had external dimensions of 0.5 mm in width, 1.0 mm in length, and 0.5 mm in height. The dielectric material sandwiched between the internal electrodes consisted of 10 layers, with an average layer thickness of 0.4 μm.

[0054] (Comparative Example 1) A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that only BT with a particle size of 125 nm produced by the sol-gel method was used as the main component raw material, no Zr was added to the main component raw material, and the firing temperature was set to 1250°C. The external dimensions of the multilayer ceramic capacitor obtained in this way were 0.5 mm in width, 1.0 mm in length, and 0.5 mm in height. The number of dielectric layers sandwiched between the internal electrodes was 10, and the average thickness of each layer was 0.4 μm.

[0055] [Confirmation of BT and CT particles with core-shell structure] The dielectric layers of each multilayer ceramic capacitor obtained in each example and comparative example were thinned by polishing, and finally, the observation area was thinned using a gallium ion beam, and the observation area was observed using a scanning transmission electron microscope (STEM). Furthermore, the maximum and minimum diameters of 100 crystal grains observed with a scanning electron microscope (SEM) were determined, and the average of these values ​​was defined as the average crystal grain diameter. The results are shown in Table 1. Furthermore, by performing ICP analysis on a portion of the dielectric layer, the composition ratio (Ca / (Ba+Ca)mol%) of the dielectric layer was measured, and the results are shown in Table 1.

[0056] [Evaluation of electrical characteristics and lifespan characteristics] For each example and comparative example, the multilayer ceramic capacitors obtained were evaluated for the following relative permittivity, capacitance temperature characteristics, and high-temperature load lifetime (HALT).

[0057] (Relative permittivity) The relative permittivity (ε) was calculated from the capacitance measured under conditions of 25°C, 1kHz, and 0.5Vrms.

[0058] (Capacitance temperature characteristics) Using the capacitance at +25°C as a baseline, the rate of change (ΔC) of capacitance at -55°C, +25°C, +85°C, and +105°C was measured. For evaluation, a capacitance rate of change (ΔC) within ±22% in the temperature range of -55°C to +105°C was considered to satisfy the X6S characteristics of the EIA standard.

[0059] (High temperature load life (HALT)) The high-temperature load lifetime (HALT) of the obtained products was measured by maintaining a DC voltage of 100 V / μm at 125°C. High-temperature load lifetime is particularly important when thinning the dielectric layer, and the lifetime was defined as the time from the start of application until the resistance dropped by an order of magnitude. A lifetime of 10,000 minutes or more was considered good. These results are shown in Table 1.

[0060] [Table 1]

[0061] As shown in Table 1, the composition ratio Ca / (Ba+Ca)mol% obtained from ICP analysis was consistent with the molar ratio of CT and BT used as the main component raw materials in each example. Furthermore, comparing the results in Table 1, the multilayer ceramic capacitors of Examples 1 to 4 achieved a higher lifespan than those of the comparative examples. This revealed that even when the dielectric layer thickness was reduced to 0.6 μm or less, composing the dielectric layer with dielectric ceramics containing barium titanate particles and calcium titanate particles with a core-shell structure enabled improved lifespan characteristics in addition to high dielectric constant and good temperature characteristics.

[0062] [Ca concentration present in the core and shell of CT particles] Next, by performing EDS analysis on the micro-regions observed by the STEM, the amount of Ca present in the core and shell portions of the CT particles in the dielectric layer of each sample obtained in Examples 1 to 4 was measured. Figure 6 illustrates the measurement locations a to e for the amount of Ca. (1) Select a particle whose major axis line crosses the core. (2) The regions a and b are defined as the shell measurement locations, which include the midpoints between the two points where the major axis line crosses the core and the grain boundaries outside of each point. (3) The region containing the midpoint between two points where the major axis line crosses the core is defined as e, and this is the core measurement position. (4) A perpendicular line is drawn from the midpoint of the core to the major axis line. The regions including the midpoints of the two points where this perpendicular line crosses the core and the outer grain boundaries are designated as c and d, and these are the shell measurement positions. (5) The mol% of Ca relative to (Ti+Zr)mol% (Ca / (Ti+Zr)) is defined as the Ca concentration, the average of a to d is defined as the Ca concentration of the shell, and e is defined as the Ca concentration of the core. The Ca concentrations of the CT particles obtained in this way are shown in Table 2.

[0063] [Table 2] [Explanation of Symbols]

[0064] 1: Multilayer ceramic capacitor 10: Sintered body 12: Dielectric layer (dielectric ceramics) 13: Internal electrode layer 15: Protective area (cover layer) 20: External electrode 30: Core section 31: Shell section

Claims

1. As a main component Particles mainly composed of barium titanate having a core-shell structure consisting of a core and a shell, and Particles mainly composed of calcium titanate having a core-shell structure consisting of a core and a shell. The system comprises a plurality of dielectric layers made of dielectric ceramics containing a certain substance, and a plurality of internal electrodes alternately stacked with each of the plurality of dielectric layers. The dielectric ceramic is a multilayer ceramic capacitor containing calcium in a ratio such that the molar percentage of calcium (Ca / (Ba+Ca)×100) relative to the total of barium and calcium is 22 to 25 mol%.

2. The multilayer ceramic capacitor according to claim 1, wherein the particles mainly composed of calcium titanate have a Ca content in the core portion that is greater than the Ca content in the shell portion.

3. The multilayer ceramic capacitor according to claim 2, wherein the Ca content in the core portion is four times or more the Ca content in the shell portion.

4. A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the average crystal particle diameter of the particles mainly composed of barium titanate is 200 nm or more and 500 nm or less.

5. A multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the average crystal particle diameter of the particles mainly composed of calcium titanate is 200 nm or more and 400 nm or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the shell portion of the barium titanate-based particles and / or the shell portion of the calcium titanate-based particles contain at least one rare earth element selected from the group consisting of Ho, Dy, Y, and Yb in greater quantities than the core portion of each particle.

7. A multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the shell portion of the particles mainly composed of barium titanate and / or the shell portion of the particles mainly composed of calcium titanate contains more Zr than the core portion of each particle.

8. A multilayer ceramic capacitor according to any one of claims 1 to 7, wherein an amorphous phase exists at the grain boundaries between the barium titanate-based particles and the calcium titanate-based particles.

9. The multilayer ceramic capacitor according to any one of claims 1 to 8, wherein the dielectric ceramic includes one or more of the group consisting of Mn, Mg, and Si.

10. A multilayer ceramic capacitor according to any one of claims 1 to 9, wherein the thickness of the dielectric layer is less than 0.6 μm.

11. A step of preparing ceramic raw material powder by mixing barium titanate and calcium titanate having a larger average particle size than the barium titanate in a ratio of 78:22 to 75:25, and adding auxiliary raw materials to this mixture, A sheet formation step in which a ceramic green sheet is formed using the obtained ceramic raw material powder, A printing process to print an internal electrode pattern onto the obtained ceramic green sheet, A lamination process in which ceramic green sheets that have gone through the printing process are laminated and pressed together to form a laminate, The process involves firing the resulting laminate to obtain a sintered body, The process of forming external electrodes on two opposing sides of one of the obtained sintered bodies. A method for manufacturing a multilayer ceramic capacitor, comprising the features described above.

12. The method for manufacturing a multilayer ceramic capacitor according to claim 11, wherein the average particle size of the barium titanate is 20 nm or more and 150 nm or less.

13. A method for manufacturing a multilayer ceramic capacitor according to claim 11 or 12, wherein the average particle size of the calcium titanate is 200 nm or more and 300 nm or less.

14. A method for manufacturing a multilayer ceramic capacitor according to any one of claims 11 to 13, wherein the aforementioned auxiliary raw materials include adding at least one rare earth element selected from the group consisting of Ho, Dy, Y, and Yb, and at least one element selected from the group consisting of Zr, Mg, Mn, and Si, in the form of an oxide or other compound.

15. A method for manufacturing a multilayer ceramic capacitor according to any one of claims 11 to 14, wherein a sintering aid is added to the ceramic raw material powder.

Images