Indication device

Abstract

Provided is a display device having a high display quality. Provided is a highly reliable display device. Provided is a display device having a low power consumption. In the display device, a light-emitting element is electrically connected to one of the source and drain of a first transistor, the other of the source and drain of the first transistor is electrically connected to one of the source and drain of a second transistor, the gate electrode of the second transistor is electrically connected to one of the source and drain of a third transistor, each of a semiconductor layer of the second transistor and a semiconductor layer of the third transistor contains indium, zinc and a third metal, the semiconductor layer of the second transistor has the ratio of the number of indium atoms to the total sum of the numbers of atoms of indium, zinc, and the third metal being 30 atom%-100 atom% inclusive, and the second transistor has a function of controlling the light emission amount of the light-emitting element.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device. Another aspect of the present invention relates to a method for driving a display device. Another aspect of the present invention relates to a semiconductor device. Another aspect of the present invention relates to a method for driving a semiconductor device. Another aspect of the present invention relates to a method for driving a circuit.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, pixels, pixel circuits, circuits, methods for driving them, or methods for manufacturing them. A semiconductor device refers to any device that can function by utilizing semiconductor properties. [Background technology]

[0003] In recent years, there has been a growing demand for higher resolution display panels. Examples of devices requiring high-resolution display panels include smartphones, tablet devices, and notebook computers. Furthermore, stationary display devices such as television sets and monitors also require higher resolution and greater detail. Among the devices demanding the highest resolution are those used for virtual reality (VR) and augmented reality (AR).

[0004] Furthermore, typical examples of display devices applicable to display panels include liquid crystal displays, organic EL (Electro-Luminescence) elements, light-emitting devices equipped with light-emitting elements such as light-emitting diodes (LEDs), and electronic paper that displays information using electrophoretic methods.

[0005] For example, the basic structure of an organic EL element is one in which a layer containing a light-emitting organic compound is sandwiched between a pair of electrodes. By applying a voltage to this element, light emission can be obtained from the light-emitting organic compound. Since a display device to which such an organic EL element is applied does not require a backlight, which was necessary for liquid crystal display devices and the like, a display device that is thin, lightweight, has high contrast, and consumes low power can be realized. For example, an example of a display device using an organic EL element is described in Patent Document 1.

[0006] Patent Document 2 discloses a display device for VR using an organic EL device.

[0007] Non-Patent Document 1 describes a pixel circuit having a thin-film transistor using polycrystalline silicon and a thin-film transistor using an oxide. Non-Patent Document 2 also describes the driving of pixel circuits at various refresh rates of a display.

Prior Art Documents

Patent Documents

[0008]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0009]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0010] One aspect of the present invention aims to provide a display device with high display quality. One aspect of the present invention aims to provide a highly reliable display device. One aspect of the present invention aims to provide a display device with low power consumption. One aspect of the present invention aims to provide a novel display device.

[0011] One aspect of the present invention aims to provide a semiconductor device with good electrical characteristics. One aspect of the present invention aims to provide a highly reliable semiconductor device. One aspect of the present invention aims to provide a semiconductor device with stable electrical characteristics. One aspect of the present invention aims to provide a semiconductor device with low power consumption. One aspect of the present invention aims to provide a semiconductor device having different transistors on the same substrate. One aspect of the present invention aims to provide a novel semiconductor device.

[0012] Note that the description of these problems does not preclude the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Note that other problems can be extracted from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0013] One aspect of the present invention is a display device having a first transistor, a second transistor, a third transistor, and a light-emitting element. The light-emitting element is electrically connected to one of the source and drain of the first transistor, the other of the source and drain of the first transistor is electrically connected to one of the source and drain of the second transistor, the gate electrode of the second transistor is electrically connected to one of the source and drain of the third transistor, the semiconductor layer of the second transistor has indium, zinc and element M, element M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt, the semiconductor layer of the third transistor has indium, zinc and element M, the ratio of the number of indium atoms to the total number of atoms of indium, zinc and element M in the semiconductor layer of the second transistor is 30 atomic% or more and 100 atomic% or less, and the second transistor is a display device that has the function of controlling the amount of light emitted by the light-emitting element.

[0014] Furthermore, in the above configuration, the source and drain of the third transistor are electrically connected to the other source and drain of the second transistor, and it is preferable that the ratio of the number of indium atoms to the total number of atoms of indium, zinc, and element M in the semiconductor layer of the second transistor is higher than that of the semiconductor layer of the third transistor.

[0015] Furthermore, in the above configuration, it is preferable that the ratio of the number of atoms of element M to the total number of atoms of indium, zinc, and element M in the semiconductor layer of the third transistor is higher than that of the semiconductor layer of the second transistor.

[0016] Furthermore, in the above configuration, it is preferable that the semiconductor layer of the third transistor has a ratio of the number of atoms of element M to the number of atoms of the metal elements contained therein of 20 atomic% or more and 60 atomic% or less.

[0017] Furthermore, in the above configuration, it is preferable that the system includes a fourth transistor, a fifth transistor, a first wiring, a capacitor, and a drive circuit, wherein one of the source and drain of the fourth transistor is electrically connected to the other of the source and drain of the second transistor, one of the source and drain of the fifth transistor is electrically connected to the other of the source and drain of the second transistor, the other of the source and drain of the fourth transistor is electrically connected to the first wiring, the first electrode of the capacitor is electrically connected to one of the source and drain of the first transistor, the second electrode of the capacitor is electrically connected to the gate of the second transistor, and the first wiring has the function of supplying the video signal output from the drive circuit to the other of the source and drain of the fourth transistor.

[0018] Furthermore, in the above configuration, it is preferable that the second transistor, third transistor, and fourth transistor are turned ON, and the first transistor and fifth transistor are turned OFF, thereby providing a function to write a potential to the gate of the second transistor, and after the potential is written, the third transistor and fourth transistor are turned OFF, thereby providing a function to retain the written potential.

[0019] Furthermore, in the above configuration, it is preferable that the second transistor, third transistor, and fourth transistor are turned ON, and the first transistor and fifth transistor are turned OFF, thereby providing a function to write a potential to the gate of the second transistor; after the potential is written, the third transistor and fourth transistor are turned OFF, thereby providing a function to retain the written potential; and after the potential is retained, the first transistor, second transistor, and fifth transistor are turned ON, thereby providing a function to supply current to the light-emitting element and control the amount of light emitted by the light-emitting element. [Effects of the Invention]

[0020] According to one aspect of the present invention, a display device with high display quality can be provided. Furthermore, according to one aspect of the present invention, a highly reliable display device can be provided. Furthermore, according to one aspect of the present invention, a display device with low power consumption can be provided. Furthermore, according to one aspect of the present invention, a novel display device can be provided.

[0021] Furthermore, according to one aspect of the present invention, a semiconductor device with good electrical characteristics can be provided. Furthermore, according to one aspect of the present invention, a highly reliable semiconductor device can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device with stable electrical characteristics can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device with low power consumption can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device having different transistors on the same substrate can be provided. Furthermore, according to one aspect of the present invention, a novel semiconductor device can be provided.

[0022] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0023] Figures 1A and 1B show examples of pixel configurations. Figure 2 shows an example of a pixel configuration. Figure 3A is a timing chart illustrating an example of pixel operation. Figure 3B is a diagram showing an example of pixel configuration. Figure 4A shows an example of pixel configuration. Figure 4B shows an example of pixel configuration. Figures 5A and 5B show examples of pixel configurations. Figure 6 shows an example of the configuration of an display device. Figures 7A and 7B show examples of display device configurations. Figures 8A to 8E show examples of pixel arrangements. Figure 9A is a top view showing an example of a display device. Figure 9B is a cross-sectional view showing an example of a display device. Figures 10A to 10C are cross-sectional views showing an example of a display device. Figures 11A and 11B are cross-sectional views showing an example of a display device. Figures 12A to 12C are cross-sectional views showing an example of a display device. Figures 13A to 13F are cross-sectional views showing an example of a display device. Figure 14 is a perspective view showing an example of a display device. Figure 15A is a cross-sectional view showing an example of a display device. Figure 15B is a cross-sectional view showing an example of a transistor. Figure 16 is a cross-sectional view showing an example of a display device. Figure 17 is a cross-sectional view showing an example of a display device. Figures 18A to 18F show examples of the configuration of a light-emitting device. Figures 19A and 19B show examples of electronic devices. Figures 20A to 20D show examples of electronic devices. Figures 21A to 21F show examples of electronic devices. Figures 22A and 22B show the Id-Vg characteristics of the transistor. Figures 23A and 23B show the Id-Vg characteristics of the transistor. [Modes for carrying out the invention]

[0024] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention shall not be construed as being limited to the contents of the following embodiments.

[0025] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for identical parts or parts having similar functions, and repeated explanations are omitted. Furthermore, when referring to similar functions, the hatch patterns are the same, and reference numerals may not be assigned.

[0026] In the figures described herein, the size of each component, the thickness of the layers, or the area may be exaggerated for clarity. Therefore, the scale is not necessarily limited.

[0027] In this specification, ordinal numbers such as "the first," "the second," etc., are used to avoid confusion of constituent elements and do not imply any numerical limitation.

[0028] A transistor is a type of semiconductor device that can perform functions such as amplifying current or voltage, and switching operations that control conduction or non-conductivity. Transistors as used herein include IGFETs (Insulated Gate Field Effect Transistors) and Thin Film Transistors (TFTs).

[0029] The functions of "source" and "drain" may be reversed when transistors with different polarities are used, or when the direction of current changes during circuit operation. Therefore, in this specification, the terms "source" and "drain" may be used interchangeably.

[0030] In this specification, either the source or the drain of a transistor may be referred to as the "first electrode," and the other of the source or drain may be referred to as the "second electrode." The gate may also be referred to as the "gate" or "gate electrode." Furthermore, in this specification, the first terminal and the second terminal of a transistor refer to, for example, one of the source and the other of the drain of the transistor.

[0031] In this specification, "electrically connected" includes cases where a connection is made via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it enables the exchange of electrical signals between the connected objects. For example, "something that has some kind of electrical function" includes electrodes or wiring, switching elements such as transistors, resistive elements, coils, capacitive elements, and other elements with various functions.

[0032] In this specification, the terms "film" and "layer" are interchangeable. For example, the terms "conductive layer" or "insulating layer" may be interchangeable with the terms "conductive film" or "insulating film."

[0033] In this specification, the term "EL layer" refers to a layer (also called a light-emitting layer) provided between a pair of electrodes of a light-emitting device (also called a light-emitting element) and containing at least a light-emitting substance, or a laminate containing a light-emitting layer.

[0034] In this specification, a display panel, which is one form of a display device, has the function of displaying (outputting) images or the like on its display surface. Therefore, a display panel is one form of an output device.

[0035] In this specification, a display panel on which a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package) is attached, or on which an IC is mounted on the board using a COG (Chip On Glass) method, may be referred to as a display panel module, a display module, or simply a display panel.

[0036] (Embodiment 1) A display device according to one aspect of the present invention can suppress current variations in the pixel circuits of each pixel and achieve excellent display quality. Furthermore, a display device according to one aspect of the present invention can reduce power consumption and achieve excellent display quality, especially when displaying images on the display unit at a low frame frequency.

[0037] A low frame frequency is, for example, 3 Hz or less, preferably 1 Hz or less, more preferably 0.1 Hz or less, and even more preferably 0.01 Hz or less. A high frame frequency is, for example, 30 Hz or more.

[0038] When an OS transistor (hereinafter referred to as an OS transistor) is used as the transistor constituting the pixel circuit, the charge written to each node can be retained for a long period of time. When displaying still images that do not require rewriting for each frame at high frequencies, the frame frequency can be lowered, and after writing the signal corresponding to the image data to the pixel circuit, the operation of the surrounding drive circuit can be stopped. This method of stopping the operation of the surrounding drive circuit while a still image is being displayed is also called "idling stop drive". By performing idling stop drive, the power consumption of the display device can be reduced.

[0039] Furthermore, a display device according to one aspect of the present invention can have a variable refresh rate. For example, power consumption can be reduced by adjusting the refresh rate according to the content displayed on the display device (for example, within a range of 0.01 Hz to 240 Hz). In addition, a drive that reduces the power consumption of the display device by driving with a reduced refresh rate may be called an idling stop (IDS) drive.

[0040] Furthermore, the drive frequency of the touch sensor or near-touch sensor may be changed according to the refresh rate mentioned above. For example, if the refresh rate of the display device is 120Hz, the drive frequency of the touch sensor or near-touch sensor can be set to a frequency higher than 120Hz (typically 240Hz). This configuration enables low power consumption and increases the response speed of the touch sensor or near-touch sensor.

[0041] Furthermore, to increase the luminescence brightness of the light-emitting device included in the pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Compared to Si transistors, OS transistors have a higher breakdown voltage between the source and drain, so a higher voltage can be applied between the source and drain of an OS transistor. As a result, by using an OS transistor as the drive transistor in the pixel circuit, the amount of current flowing through the light-emitting device can be increased, thereby increasing the luminescence brightness of the light-emitting device.

[0042] Furthermore, when the transistor operates in the saturation region, OS transistors exhibit smaller changes in source-drain current in response to changes in gate-source voltage compared to Si transistors. Therefore, by using OS transistors as driving transistors in the pixel circuit, the current flowing between the source and drain can be precisely controlled by changes in gate-source voltage, thereby allowing control of the current flowing to the light-emitting device. This allows for an increase in the number of grayscale levels in the pixel circuit.

[0043] Furthermore, in terms of the saturation characteristics of the current flowing when a transistor operates in the saturation region, OS transistors can supply a more stable current (saturation current) than Si transistors, even when the source-drain voltage gradually increases. Therefore, by using OS transistors as driving transistors, for example, a stable current can be supplied to a light-emitting device even if there are variations in the current-voltage characteristics of the light-emitting device containing EL material. In other words, when operating in the saturation region, the source-drain current remains almost unchanged even when the source-drain voltage is increased, thus stabilizing the luminescence brightness of the light-emitting device.

[0044] As described above, by using OS transistors in the drive transistors included in the pixel circuit, it is possible to achieve "suppression of black level floating," "increase in luminescence brightness," "multi-gradation," and "suppression of variations in light-emitting devices."

[0045] [Example of pixel configuration] Figure 1A shows an example of a pixel Px according to one embodiment of the present invention.

[0046] Each pixel Px includes a pixel circuit 51 and a light-emitting element EL1. The pixel circuit 51 includes transistors Tr1 to Tr6 and a capacitor C1. The pixel Px is also electrically connected to wiring Vdata, wiring Vdd, wiring Vss, wiring Vini, wiring Vscan1, wiring Vscan2, wiring Vem1, and wiring Vem2.

[0047] Transistors Tr1 to Tr6 are n-channel field-effect transistors. Preferably, transistors Tr1 to Tr6 are enhancement-type (normally-off type) n-channel field-effect transistors. Therefore, their threshold voltage (also called "Vth") is preferably greater than 0V.

[0048] The light-emitting element EL1 comprises a first electrode electrically connected to the wiring Vss and a second electrode electrically connected to the transistor Tr5.

[0049] Transistor Tr5 comprises a first terminal electrically connected to the light-emitting element EL1, a second terminal electrically connected to transistors Tr2 and Tr1, and a gate electrode electrically connected to the wiring Vem1. Here, the first terminal and the second terminal of the transistor refer, for example, to one of the source and drain of the transistor and the other.

[0050] Transistor Tr5 functions as a switch that controls whether or not current flows to the light-emitting element EL1.

[0051] Transistor Tr6 comprises a first terminal electrically connected to the light-emitting element EL1, a second terminal electrically connected to the wiring Vini, and a gate electrode electrically connected to the wiring Vscan1.

[0052] Capacitor C1 comprises a first electrode electrically connected to the light-emitting element EL1 and a second electrode electrically connected to the gate of transistor Tr2.

[0053] Node ND1 is a node that is electrically connected to the second electrode of the light-emitting element EL1, the first terminal of transistor Tr5, the first terminal of transistor Tr6, and the first electrode of capacitor C1.

[0054] Transistor Tr2 includes a first terminal electrically connected to transistor Tr5, a second terminal electrically connected to transistors Tr3 and Tr4, and a gate electrode electrically connected to capacitor C1.

[0055] Transistor Tr1 includes a first terminal electrically connected to transistors Tr2 and Tr5, a second terminal electrically connected to wiring Vdata, and a gate electrode electrically connected to wiring Vscan2.

[0056] Node ND3 is a node that is electrically connected to the second terminal of transistor Tr5, the first terminal of transistor Tr2, and the second terminal of transistor Tr1.

[0057] Transistor Tr3 has a first terminal, a second terminal, and a gate electrode. The gate electrode of transistor Tr3 is electrically connected to the wiring Vscan1. In addition, the first terminal of transistor Tr3 is electrically connected to the gate electrode of transistor Tr2, and the second terminal of transistor Tr3 is electrically connected to the second terminal of transistor Tr2. Therefore, by turning on transistor Tr3, the gate electrode and second terminal of transistor Tr2 can be made conductive.

[0058] Node ND2 is a node that is electrically connected to the gate electrode of transistor Tr2, the second electrode of capacitor C1, and the first terminal of transistor Tr3.

[0059] Transistor Tr4 has a first terminal electrically connected to transistors Tr2 and Tr3, a second terminal electrically connected to wiring Vdd, and a gate electrode electrically connected to wiring Vem2.

[0060] The second terminal of transistor Tr2, the second terminal of transistor Tr3, and the first terminal of transistor Tr4 are electrically connected.

[0061] Transistor Tr2 functions as a current control transistor for the light-emitting element EL1. In other words, transistor Tr2 has the function of controlling the amount of light emitted by the light-emitting element EL1. Therefore, transistor Tr2 is sometimes called a driving transistor.

[0062] In one embodiment of the present invention, a pixel circuit 51 is used as the transistor Tr2, which has extremely low hysteresis, thereby improving the display quality of the display device even at low frame frequencies.

[0063] In transistors with significantly large hysteresis, the transistor's threshold voltage changes due to factors such as the voltage stress between the gate and source of the transistor.

[0064] If transistor Tr2 has hysteresis characteristics, there is a concern that the threshold value of transistor Tr2 will fluctuate during the period when current flows through the light-emitting element EL1. In particular, in the display unit, when the frame frequency of image display is low, the period from when image data is written to a pixel to the next frame is long, so changes in the brightness of the light-emitting element EL1 due to fluctuations in the threshold value of transistor Tr2 are easily visible to the user of the display device.

[0065] OS transistors have extremely low hysteresis. Therefore, in a pixel circuit according to one aspect of the present invention, by applying an OS transistor as the driving transistor, changes in the brightness of the light-emitting element EL1 can be suppressed. In a pixel circuit according to one aspect of the present invention, by applying an OS transistor as the driving transistor, variations in the current value flowing to the light-emitting element EL1 can be suppressed, and the display quality of the display device can be improved even at low frame frequencies.

[0066] One of the transistors in a pixel circuit according to one embodiment of the present invention has a hysteresis of preferably 0.1V or less, more preferably 0.05V or less, when a round-trip scan is performed in an Id-Vg measurement where Vg is in the range of -15V to +20V. Also, Vd in the Id-Vg measurement is, for example, between 0.01V and 10V. The measurement interval for Vg in the measurement may be, for example, in increments of 0.1V. A hold period of, for example, 1 second or less may be provided at each measurement point of Vg. Here, Id is the source-drain current, Vd is the source-drain voltage, and Vg is the source-gate voltage. The transistor used for measurement has, for example, a channel length of 100 μm or less, or 10 μm or less. Also, the transistor used for measurement has, for example, a channel width of 100 μm or less, or 10 μm or less.

[0067] Furthermore, OS transistors have high dielectric strength between their source and drain. By using OS transistors as the transistors constituting the pixel circuit 51, operation remains stable even when there is a large potential difference between the wiring Vdd and wiring Vss applied to the light-emitting element EL1, thus realizing a highly reliable display device. Using an OS transistor with high dielectric strength between its source and drain as transistor Tr2 is preferable because it allows for precise control of the current of the light-emitting element EL1 even during long-term use of the display device.

[0068] The wiring Vdata has the function of supplying the signal Vdata_1, which corresponds to the video signal, to transistor Tr1. The wiring Vdata is sometimes called the source line. The pixel circuit 51 has the function of supplying a signal to node ND2 that has been corrected by turning on transistors Tr1, Tr2, and Tr3, respectively. This correction process can suppress the effect of threshold variation in transistor Tr2 on the current flowing to the light-emitting element EL1. It can sometimes be said that the pixel circuit 51 has the function of supplying node ND2 with a potential that cancels out the effect of threshold variation in transistor Tr2.

[0069] Here, the threshold value variation of transistor Tr2 refers, for example, to the variation in the threshold value of transistor Tr2 in each pixel circuit 51 across multiple pixel circuits.

[0070] The pixel circuit 51 has the function of maintaining the potential applied to node ND2 by keeping transistor Tr3 in the off state. Since the oxide semiconductor used in the channel formation region of the OS transistor has a band gap of 2eV or more, the off current is extremely low. By using an OS transistor as transistor Tr3, the leakage current in the off state can be kept extremely low, so the fluctuation in the potential of the signal applied to node ND2 can be made extremely small.

[0071] When the frame frequency of the display unit's image display is low, the period between writing image data to the pixel circuit and the next frame is long, resulting in a large fluctuation in the potential of node ND2 due to the off-leak current of transistor Tr3. Therefore, when the frame frequency is low, it is particularly preferable to use a transistor with a small off-leak current as transistor Tr3.

[0072] In the pixel circuit 51, for example, after writing a signal from the wiring Vdata, transistor Tr1 can be turned off for the period until the next frame. By turning off transistor Tr1, the current flowing to the wiring Vdata can be interrupted in the pixel circuit 51, thereby reducing the power consumption of the pixel circuit 51 and the power consumption of the circuit that supplies the signal to the wiring Vdata.

[0073] Furthermore, in the pixel circuit 51, for example, after writing the potential corresponding to the signal from wiring Vini to node ND1 via transistor Tr6, transistor Tr6 can be turned off for the period until the next frame. By turning off transistor Tr6, the current flowing to wiring Vini can be interrupted, thereby reducing the power consumption of the pixel circuit 51 and the power consumption of the circuit that provides the signal to wiring Vini.

[0074] Each transistor in the pixel circuit 51 may have a back gate. In particular, it is preferable for the OS transistor to have a back gate. Figure 1B shows an example in which a transistor has a back gate. The back gate can be supplied with the same signal as the gate. Alternatively, the back gate can be supplied with the same signal as the source or drain. By supplying a signal to the back gate, for example, the threshold value of the transistor can be controlled.

[0075] Furthermore, the back gate of a transistor may be electrically connected to either the source or the drain of the transistor. In the pixel circuit 51 shown in Figure 2, an example is shown where the back gates of transistors Tr4 and Tr5 are electrically connected to either the source or the drain, respectively. By electrically connecting the back gate of a transistor to either the source or the drain of the transistor, for example, the resistance to the application of a gate electric field to the transistor can be improved, thereby improving reliability.

[0076] Furthermore, OS transistors have extremely high field-effect mobility compared to amorphous silicon. Also, OS transistors exhibit remarkably low source-drain leakage current (hereinafter also referred to as off-current) in the off state, allowing them to retain charge stored in a capacitor connected in series with the transistor for extended periods. Additionally, the application of OS transistors can reduce the power consumption of display devices.

[0077] At room temperature, the off-current value of an OS transistor per 1 μm channel width is 1 aA (1 × 10⁻¹⁶). -18 A) Below, 1zA(1×10 -21 A) Less than or equal to 1yA(1×10 -24 A) It can be less than or equal to the following. Note that in a transistor containing silicon in the channel formation region (hereinafter referred to as a Si transistor), the off-current value per 1 μm of channel width at room temperature is 1 fA (1 × 10⁻¹⁶). -15 A) More than 1pA (1×10 -12 A) The answer is as follows. Therefore, it can be said that the off-current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0078] Furthermore, OS transistors exhibit almost no increase in off-current even in high-temperature environments. Specifically, the off-current hardly increases even at ambient temperatures between room temperature and 200°C. In addition, the on-current does not decrease significantly even in high-temperature environments. Display devices incorporating OS transistors operate stably and with high reliability even in high-temperature environments.

[0079] The silicon used in Si transistors can be amorphous silicon or crystalline silicon (for example, polycrystalline silicon and monocrystalline silicon).

[0080] The light-emitting element EL1 preferably uses an EL device such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of light-emitting materials for the EL device include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and thermally activated delayed fluorescence (TADF) materials. The TADF material may be one in which the singlet excited state and the triplet excited state are in thermal equilibrium. Such TADF materials have a shorter emission lifetime (excitation lifetime), which can suppress the decrease in efficiency in the high-brightness region of the light-emitting device. The light-emitting element EL1 is not limited to these, and inorganic EL elements containing inorganic materials, light-emitting diodes, etc., may also be used. LEDs such as microLEDs (Light Emitting Diodes) can also be used as the light-emitting device.

[0081] [Example of pixel operation] Next, using Figures 3A, 3B, 4A, and 4B, an example of the operation of pixel Px shown in Figure 1A is illustrated. Furthermore, in the following example of operation, the potentials of nodes ND1, ND2, and ND3 are shown in Figures 3B, 4A, and 4B, respectively, as potential V. ND1 , potential V ND2 , and potential V ND3 This may be indicated as such.

[0082] Figure 3A is a timing chart showing an example of the operation of pixel Px. Note that the following explanation assumes that all transistors constituting the pixel are n-channel transistors; however, by swapping high and low potentials as needed, the following explanation can also be applied if some or all transistors are p-channel transistors.

[0083] <Initialization operation> First, at time t1, a high-potential signal H is applied to wires Vscan1 and Vem2, and a low-potential signal L is applied to wires Vscan2 and Vem1.

[0084] Transistors Tr1 and Tr5 are in the off state.

[0085] Transistor Tr6 is turned ON, and potential Vi_1 is supplied to node ND1 from wiring Vini (Figure 3B).

[0086] Transistors Tr3 and Tr4 are turned on, and a potential Vd_1 is supplied to node ND2 from the wiring Vdd (Figure 3B).

[0087] <Threshold compensation operation> Next, at time t2, a high-potential signal is applied to wires Vscan1 and Vscan2, and a low-potential signal L is applied to wires Vem1 and Vem2.

[0088] Transistor Tr4 is in the off state. Transistor Tr5 also remains in the off state.

[0089] Transistor Tr6 remains ON, and the potential Vi_1 is maintained at node ND1 (Figure 4A).

[0090] Transistor Tr1 is turned ON, and potential Va_1 is supplied from wiring Vdata to node ND3 via transistor Tr1 (Figure 4A).

[0091] Transistor Tr3 remains in the ON state. Also, since node ND2 is supplied with potential Vd_1, transistor Tr2 also remains in the ON state.

[0092] As the potential of node ND3 changes, the potential of node ND2 also changes, and node ND2 is given the sum of the potential of node ND3 (potential Va_1) and the threshold voltage of transistor Tr2 (let's call it potential Vt) (potential (Va_1+Vt)) (Figure 4A).

[0093] For each of the multiple pixels in the display unit, the threshold value of transistor Tr2 is acquired, and a potential corresponding to the threshold value of transistor Tr2 is applied between the gate and source of transistor Tr2, thereby correcting the threshold value variation of the transistors for each pixel. The operation of acquiring the threshold value of transistor Tr2 is sometimes called "threshold compensation operation."

[0094] <Light emission operation> Next, at time t3, a high-potential signal is applied to wires Vem1 and Vem2, and a low-potential signal L is applied to wires Vscan1 and Vscan2.

[0095] Transistor Tr1 is turned off, and node ND3 is electrically disconnected from wiring Vdata. Transistor Tr6 is turned off, and node ND1 is electrically disconnected from wiring Vini.

[0096] Transistor Tr3 is turned off, and the potential of node ND2 is maintained.

[0097] Transistors Tr4, Tr2, and Tr5 are turned on, and current flows to the light-emitting element EL1 (Figure 4B). The channel length, channel width, gate insulating film material and thickness, and the material used for the channel formation region of transistors Tr2, Tr4, and Tr5 should be determined so that the current flowing to the light-emitting element EL1 is mainly controlled according to the current-driving capability of transistor Tr2.

[0098] In one embodiment of the present invention, the display device corrects the threshold value variation of transistor Tr2 in each of the multiple pixels of the display unit, thereby suppressing brightness variations caused by variations in transistor characteristics and achieving excellent display quality.

[0099] <Extinguishing operation> The light-emitting element EL1 can remain lit for the duration of one frame. This driving method is also called "hold type" or "hold type drive." By using hold type drive for the display device, issues such as flicker on the display screen can be reduced. On the other hand, hold type drive is prone to afterimages and blurring of images when displaying videos. The resolution that a person perceives when displaying a video is also called "video resolution." In other words, hold type drive tends to reduce video resolution.

[0100] Furthermore, "black insertion drive" is known to improve afterimages and image blurring in video display. "Black insertion drive" is also called "pseudo-impulse drive" or "pseudo-impulse drive." Black insertion drive is a driving method that inserts a black screen every other frame, or displays a black screen for a certain period within a frame.

[0101] By applying a low-potential signal to the wiring Vem1, which is electrically connected to the gate electrode of transistor Tr5, transistor Tr5 can be turned off. Turning off transistor Tr5 stops the current to the light-emitting element EL1, allowing black insertion to be performed.

[0102] Furthermore, even when displaying still images with a low frame frequency, the transistor Tr5 may be controlled at high speed to periodically interrupt the current flowing to the light-emitting element EL1 at a high frequency, thereby performing black frame insertion.

[0103] Here, we will explain the case where the frame frequency is 1 Hz. By applying a high-potential signal and a low-potential signal at a frequency higher than 1 Hz, for example, 60 Hz, to the wiring Vem1 electrically connected to the gate electrode of transistor Tr5, a black display can be inserted at a period of 60 Hz within the duration of one frame. By performing black insertion driving at a high frequency, even when the frame frequency is low and the duration of one frame is long, it is possible to make changes in brightness within the duration of one frame difficult to perceive.

[0104] Furthermore, when an OS transistor is used as transistor Tr2, the hysteresis of transistor Tr2 is extremely small, and when the frame frequency is low, such as when displaying still images, the change in brightness can be kept to a minimum. Therefore, it may be possible to achieve excellent display quality without performing high-speed black insertion driving using transistor Tr5. Thus, during the period when a still image is displayed, the circuit that supplies a signal to the wiring Vem1 electrically connected to the gate electrode of transistor Tr5 can be stopped, further reducing the power consumption of the drive circuit.

[0105] [transistor] The following describes oxide semiconductors that can be used in OS transistors. For OS transistors, the following metal oxides and other materials can be used as oxide semiconductors.

[0106] The metal oxide used in the OS transistor preferably contains at least indium or zinc. It is even more preferable that the metal oxide contains indium and zinc. For example, the metal oxide preferably contains indium, element M (where M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc. In particular, element M is preferably one or more selected from gallium, aluminum, yttrium, and tin, with gallium being more preferable.

[0107] The composition of the metal oxide significantly affects the electrical characteristics and reliability of the transistor. For example, increasing the indium content of the metal oxide can sometimes lead to the creation of transistors with high on-current, which is preferable.

[0108] Furthermore, for example, increasing the content of element M in the metal oxide can sometimes lead to a larger band gap in the metal oxide, resulting in a transistor with an even lower off-leak current, which is preferable.

[0109] An OS transistor can be suitably used as transistor Tr2. In particular, an OS transistor with a high indium content in the metal oxide can be suitably used as transistor Tr2.

[0110] Transistor Tr2 has the function of controlling the drive current of the light-emitting element EL1. By using an OS transistor with a high indium metal oxide content as transistor Tr2, the current driving capability of transistor Tr2 can be improved, and it can adequately handle the increased brightness of the light-emitting element EL1.

[0111] OS transistors can be suitably used as transistors Tr3, Tr6, and Tr1. In particular, OS transistors with a high content of element M in the metal oxide can be suitably used as transistors Tr3, Tr6, and Tr1.

[0112] When transistor Tr3 is in the off state, it has the function of maintaining the potential supplied to the gate electrode of transistor Tr2. If the off-leak current of transistor Tr3 is high, for example, the leakage current may lower the potential of the gate electrode of transistor Tr2, which may cause a decrease in the brightness of the light-emitting element EL1. Therefore, it is preferable to use a transistor with a low off-leak current as transistor Tr3.

[0113] Transistors Tr6 and Tr1 are electrically connected to wiring Vini and wiring Vdata, respectively. Therefore, if the off-leak current of transistors Tr6 and Tr1 is high, for example, a portion of the current flowing to the light-emitting element EL1 may leak to wiring Vini and wiring Vdata, raising concerns about fluctuations in brightness. For this reason, it is preferable to use transistors with low off-leak current as transistors Tr6 and Tr1.

[0114] Furthermore, Si transistors may be used as transistors Tr3, Tr6, and Tr1.

[0115] Si transistors can be suitably used as transistors Tr4 and Tr5, and in particular, transistors having crystalline silicon in the channel formation region can be suitably used. Furthermore, OS transistors can be suitably used as transistors Tr4 and Tr5, and in particular, OS transistors with a high indium content in the metal oxide can be suitably used.

[0116] It is preferable that transistors Tr4 and Tr5 have sufficient current-driving capability so as not to limit the current of transistor Tr2. Therefore, transistors having crystalline silicon (e.g., polycrystalline silicon and monocrystalline silicon) in the channel-forming region can be suitably used as transistors Tr4 and Tr5. As transistors having polycrystalline silicon, for example, transistors having low-temperature polysilicon (LTPS (Low Temperature Poly Silicon)) can be used.

[0117] Furthermore, when using OS transistors as transistors Tr4 and Tr5, it is preferable to increase the indium content of the metal oxide to enhance the current driving capability of the OS transistors.

[0118] Details of metal oxides that can be used in OS transistors will be described later.

[0119] [Pixel configuration example 2] Figure 5A shows an example of a pixel configuration. The pixel Px shown in Figure 5A has a pixel circuit 51 and a light-emitting element EL1. The pixel circuit 51 has transistors Tr1, Tr2, Tr6 and a capacitor C1.

[0120] In Figure 5A, the first terminal of transistor Tr2 is electrically connected to the light-emitting element EL1, and its second terminal is electrically connected to the wiring Vdd. The first terminal of transistor Tr1 is electrically connected to the wiring Vdata, and its second terminal is electrically connected to the gate of transistor Tr2.

[0121] An OS transistor can be suitably used as transistor Tr2. In particular, an OS transistor with a high indium content in the metal oxide can be suitably used as transistor Tr2.

[0122] OS transistors can be suitably used as transistors Tr6 and Tr1. In particular, OS transistors with a high content of element M in the metal oxide can be suitably used as transistors Tr6 and Tr1.

[0123] Alternatively, an OS transistor with a high indium metal oxide content can be suitably used as transistor Tr6. By using an OS transistor with a high indium metal oxide content as transistor Tr6, a display device with high display quality can be realized even at high frequencies.

[0124] The pixel configuration example shown in Figure 5B differs from that in Figure 5A in that it includes transistor Tr7.

[0125] Transistor Tr7 has a gate electrode electrically connected to wiring Vscan3, a first terminal electrically connected to wiring Vini, and a second terminal electrically connected to the gate of transistor Tr2 and the second electrode of capacitive element C1. An OS transistor can be suitably used as transistor Tr7. Alternatively, an OS transistor with a high content of element M in the metal oxide can be suitably used as transistor Tr7.

[0126] [Display device] An example of the configuration of a display device using pixels according to one aspect of the present invention will be described.

[0127] Figure 6 shows a block diagram of the display device 10. The display device 10 includes a display unit 11, a first drive circuit 12, and a second drive circuit 13.

[0128] Multiple pixels Px are arranged in a matrix in the display unit 11. Each pixel includes at least one display element and one transistor. Typical display elements include organic EL elements or liquid crystal elements.

[0129] The first drive circuit 12 includes a circuit that functions as a source driver. The first drive circuit 12 has the function of generating a grayscale signal based on a video signal input from an external source and supplying it to the pixels of the display unit 11.

[0130] The second drive circuit 13 includes a circuit that functions as a gate driver. The second drive circuit 13 has the function of generating a selection signal based on an externally input signal and supplying it to the pixels of the display unit 11.

[0131] It is preferable to use the previously described pixel Px as the pixel Px of the display unit 11.

[0132] An OS transistor or the like can be used in the first drive circuit 12. Since high-speed switching operation is required in the source driver or demultiplexer circuit, it is preferable to use an OS transistor in which a metal oxide with a high indium content is applied to the semiconductor layer as the OS transistor used in the second drive circuit 13.

[0133] Furthermore, the first drive circuit 12 can use a transistor having silicon in its channel formation region. The first drive circuit 12 may also include both an OS transistor and a Si transistor.

[0134] The second drive circuit 13 can be an OS transistor or the like. In a gate driver, a fast response switching operation is not required compared to a source driver or demultiplexer circuit. Therefore, a stable transistor with a lower off-current can be used as the OS transistor, and for example, the second drive circuit 13 can use an OS transistor in which a metal oxide with a high content of element M is applied to the semiconductor layer.

[0135] Furthermore, the second drive circuit 13 can use a transistor having silicon in its channel formation region. The second drive circuit 13 may also include both an OS transistor and a Si transistor.

[0136] Furthermore, if necessary, the second drive circuit 13 may use an OS transistor in which a metal oxide with a high indium content is applied to the semiconductor layer, or the first drive circuit 12 may use an OS transistor in which a metal oxide with a high element M content is applied to the semiconductor layer.

[0137] The display unit 11 is provided with a plurality of wirings Vdata connected to the first drive circuit 12 and a plurality of wirings GL connected to the second drive circuit 13. The wirings Vdata function, for example, as source lines. The wirings GL function, for example, as gate lines.

[0138] <Example of the configuration of the first drive circuit> The following describes a more specific configuration example of the first drive circuit 12 of the display device 10.

[0139] The first drive circuit 12 includes a shift register circuit 31, a latch circuit section 41, a level shifter circuit section 42, a DA conversion section 43, and an analog buffer circuit section 44, etc.

[0140] The latch circuit section 41 has a plurality of latch circuits 32 and a plurality of latch circuits 33. The level shifter circuit section 42 has a plurality of level shifter circuits 34. The DA conversion section 43 has a plurality of DAC circuits 35. The analog buffer circuit section 44 has a plurality of analog buffer circuits 36.

[0141] The shift register circuit 31 receives the clock signal CLK and the start pulse signal SP as inputs. The shift register circuit 31 generates timing signals in which pulses are sequentially shifted according to the clock signal CLK and the start pulse signal SP, and outputs these signals to each latch circuit 32 of the latch circuit section 41.

[0142] The latch circuit section 41 receives the video signal S0 and the latch signal LAT.

[0143] When a timing signal is input to the latch circuit 32, the video signal S0 is sampled according to the pulses of the timing signal and written sequentially to each latch circuit 32. The period during which the writing of the video signal S0 to each latch circuit 32 is completed can be called the line period.

[0144] When one line period ends, the video signals held in each latch circuit 32 are simultaneously written to and held in each latch circuit 33 according to the pulse of the latch signal LAT input to each latch circuit 33. After sending the video signals to the latch circuits 33, the latch circuits 32 sequentially write the next video signals according to the timing signals from the shift register circuit 31. During this second line period, the video signals written to and held in the latch circuits 33 are output to each level shifter circuit 34 of the level shifter circuit section 42.

[0145] The video signals input to each level shifter circuit 34 in the level shifter circuit section 42 are sent to each DAC circuit 35 in the DA conversion section 43 after the voltage amplitude of the signals is increased by the level shifter circuit 34. The video signals input to a group of DAC circuits 35 are converted to analog and output as a single analog signal to the analog buffer circuit section 44. The video signals input to the analog buffer circuit section 44 are output to each wiring Vdata via each analog buffer circuit 36.

[0146] Meanwhile, the second drive circuit 13 sequentially selects each wiring GL. The video signal input to the display unit 11 from the first drive circuit 12 via wiring Vdata is input to each pixel Px connected to the wiring GL selected by the second drive circuit 13.

[0147] Alternatively, another circuit capable of outputting a signal in which pulses are sequentially shifted may be used instead of the shift register circuit 31.

[0148] <Modified version of the first drive circuit> The first drive circuit 12 illustrated in Figure 6 was configured to convert a digital signal into an analog signal and output it to the display unit 11. However, by using an analog signal as the input signal, the configuration of the first drive circuit 12 can be made simpler.

[0149] The first drive circuit 12a shown in Figure 7A includes a shift register circuit 31, a latch circuit section 41, and a source follower circuit section 45. The source follower circuit section 45 includes a plurality of source follower circuits 37.

[0150] The latch circuit 32 samples the analog video signal S0 as analog data according to the timing signal from the shift register circuit 31. Each latch circuit 32 also simultaneously outputs the video signal held by each latch circuit 33 according to the latch signal LAT.

[0151] The video signal held by the latch circuit 33 is output to a single wire Vdata via the source follower circuit 37. Alternatively, the analog buffer circuit described above may be used instead of the source follower circuit 37.

[0152] The first drive circuit 12b shown in Figure 7B includes a shift register circuit 31 and a demultiplexer circuit 46.

[0153] The demultiplexer circuit 46 has multiple sampling circuits 38. Each sampling circuit 38 receives multiple analog video signals S0 from multiple wires and outputs video signals simultaneously to multiple wires Vdata according to timing signals input from the shift register circuit 31. The shift register circuit 31 outputs timing signals to sequentially select the multiple sampling circuits 38.

[0154] For example, if the number of wires Vdata connected to the display unit 11 is 2160, and the number of wires to which the video signal S0 is supplied is 54, then by providing 40 sampling circuits 38 in the demultiplexer circuit 46, the line period can be divided into 40 parts, and the video signal can be output simultaneously to all 54 wires Vdata within each part of the period.

[0155] Here, an OS transistor may be used for the demultiplexer circuit 46, and a Si transistor may be used for the shift register circuit 31. For example, consider the case where a transistor having single-crystal silicon is used for the shift register circuit 31, and OS transistors are used for the demultiplexer circuit 46 and the display unit 11. The OS transistor can be provided, for example, by stacking it on top of a transistor having single-crystal silicon.

[0156] In such cases, it is preferable because the number of connections from the layer on which the Si transistors constituting the shift register circuit 31 are provided to the layer on which the OS transistors constituting the demultiplexer circuit 46 and the display unit 11 are provided can be reduced.

[0157] The above is a description of the first drive circuit section.

[0158] [Metal oxides] The composition of a metal oxide applicable to the semiconductor layer of a transistor according to one embodiment of the present invention will be described. Note that the composition of the metal oxide may sometimes be replaced with the composition of the semiconductor layer.

[0159] The metal oxide preferably contains at least indium or zinc. It is even more preferable that the metal oxide contains indium and zinc. For example, the metal oxide preferably contains indium, element M (where M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc.

[0160] Examples of metal oxides that can be used include indium oxide, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO or IAGZO). Alternatively, indium tin oxide containing silicon can be used.

[0161] Element M is preferably one or more selected from gallium, aluminum, yttrium, and tin, with gallium being more preferred. In this specification, a metal oxide having indium, element M, and zinc may be referred to as In-M-Zn oxide.

[0162] The composition of the semiconductor layer significantly affects the electrical characteristics and reliability of the transistor.

[0163] <Indium content> By increasing the indium content in the semiconductor layer, it is possible to realize transistors with high on-current.

[0164] In this specification, the ratio of the number of indium atoms to the total number of atoms of the contained metal elements may be referred to as the indium content. The same applies to other metal elements.

[0165] By increasing the indium content in the semiconductor layer, a transistor with a high on-current can be created. Applying this transistor to a transistor requiring a high on-current allows for the creation of a display device with excellent electrical characteristics.

[0166] When using In-Zn oxide in a semiconductor layer, the indium content can be increased by applying a metal oxide in which the atomic ratio of indium is greater than or equal to that of zinc. For example, metal oxides with atomic ratios of metal elements of In:Zn=1:1, In:Zn=2:1, In:Zn=3:1, In:Zn=4:1, In:Zn=5:1, In:Zn=7:1, or In:Zn=10:1, or close to these ratios, can be used.

[0167] When using In-Sn oxide in a semiconductor layer, the indium content can be increased by applying a metal oxide in which the atomic ratio of indium is greater than or equal to that of tin. For example, metal oxides with atomic ratios of metal elements of In:Sn=1:1, In:Sn=2:1, In:Sn=3:1, In:Sn=4:1, In:Sn=5:1, In:Sn=7:1, or In:Sn=10:1, or close to these ratios, can be used.

[0168] When using In-Sn-Zn oxide in a semiconductor layer, the indium content can be increased by using a metal oxide in which the atomic ratio of indium is higher than that of tin. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of tin. For example, the atomic ratios of the metal elements are In:Sn:Zn=2:1:3, In:Sn:Zn=3:1:2, In:Sn:Zn=4:2:3, In:Sn:Zn=4:2:4.1, In:Sn:Zn=5:1:3, In:Sn:Zn=5:1:6, In:Sn:Zn=5:1:7, In:Sn:Zn=5:1:8, In:Sn:Zn=6:1:6, In Metal oxides with the following ratios can be used: Sn:Zn=10:1:3, In:Sn:Zn=10:1:6, In:Sn:Zn=10:1:7, In:Sn:Zn=10:1:8, In:Sn:Zn=5:2:5, In:Sn:Zn=10:1:10, In:Sn:Zn=20:1:10, In:Sn:Zn=40:1:10, or near these ratios.

[0169] When using In-Al-Zn oxide in a semiconductor layer, the indium content can be increased by using a metal oxide in which the atomic ratio of indium is higher than that of aluminum. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of aluminum. For example, metal oxides with atomic ratios of metal elements such as In:Al:Zn=2:1:3, In:Al:Zn=3:1:2, In:Al:Zn=4:2:3, In:Al:Zn=4:2:4.1, In:Al:Zn=5:1:3, In:Al:Zn=5:1:6, In:Al:Zn=5:1:7, In:Al:Zn=5:1:8, In:Al:Zn=6:1:6, In:Al:Zn=10:1:3, In:Al:Zn=10:1:6, In:Al:Zn=10:1:7, In:Al:Zn=10:1:8, In:Al:Zn=5:2:5, In:Al:Zn=10:1:10, In:Al:Zn=20:1:10, In:Al:Zn=40:1:10, or near these values ​​can be used.

[0170] When using an In-Ga-Zn oxide in a semiconductor layer, the indium content can be increased by using a metal oxide in which the atomic ratio of indium to the total number of metal elements is higher than that of gallium. Furthermore, it is even more preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of gallium. For example, the semiconductor layer can use metal oxides with atomic ratios of metal elements such as In:Ga:Zn=2:1:3, In:Ga:Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1, In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:Ga:Zn=5:1:8, In:Ga:Zn=6:1:6, In:Ga:Zn=10:1:3, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7, In:Ga:Zn=10:1:8, In:Ga:Zn=5:2:5, In:Ga:Zn=10:1:10, In:Ga:Zn=20:1:10, In:Ga:Zn=40:1:10, or near these values.

[0171] When using an In-M-Zn oxide in a semiconductor layer, the indium content can be increased by using a metal oxide in which the atomic ratio of indium to the total number of atoms of the metal element is higher than the atomic ratio of element M. Furthermore, it is even more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of element M. For example, the semiconductor layer can use metal oxides with atomic ratios of metal elements such as In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=10:1:3, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, or near these values.

[0172] Furthermore, if element M contains multiple metallic elements, the sum of the atomic ratios of those metallic elements can be used as the atomic ratio of element M. For example, in the case of an In-Ga-Al-Zn oxide having gallium and aluminum as elements M, the sum of the atomic ratios of gallium and aluminum can be used as the atomic ratio of element M. It is also preferable that the atomic ratios of indium, element M, and zinc are within the aforementioned range.

[0173] The indium content of the semiconductor layer can be increased by using a metal oxide in which the ratio of the number of indium atoms to the total number of atoms of the contained metal elements is 30 atomic% to 100 atomic%, preferably 30 atomic% to 95 atomic%, more preferably 35 atomic% to 95 atomic%, more preferably 35 atomic% to 90 atomic%, more preferably 40 atomic% to 90 atomic%, more preferably 45 atomic% to 90 atomic%, more preferably 50 atomic% to 80 atomic%, more preferably 60 atomic% to 80 atomic%, and more preferably 70 atomic% to 80 atomic%. For example, when using In-Ga-Zn oxide for the semiconductor layer, it is preferable that the ratio of the number of indium atoms to the total number of atoms of indium, element M, and zinc is within the aforementioned range.

[0174] Transistor reliability One of the indicators used to evaluate the reliability of a transistor is the GBT (Gate Bias Temperature) stress test, which involves applying an electric field to the gate and holding it under that condition. Among these tests, the test in which a positive potential (positive bias) is applied to the gate relative to the source potential and drain potential and the transistor is held at a high temperature is called the PBTS (Positive Bias Temperature Stress) test, and the test in which a negative potential (negative bias) is applied to the gate and the transistor is held at a high temperature is called the NBTS (Negative Bias Temperature Stress) test. Furthermore, PBTS and NBTS tests performed under light irradiation are called PBTIS (Positive Bias Temperature Illumination Stress) and NBTIS (Negative Bias Temperature Illumination Stress) tests, respectively.

[0175] In n-type transistors, a positive potential is applied to the gate when the transistor is turned on (current is flowing). Therefore, the amount of variation in the threshold voltage during PBTS testing is one of the important items to focus on as an indicator of transistor reliability.

[0176] When light is incident on a transistor, its electrical characteristics may change. In particular, for transistors applied to regions where light may be incident, it is desirable that the change in electrical characteristics under light irradiation is small and that they have high reliability under light. Reliability under light can be evaluated, for example, by the amount of change in the threshold voltage in NBTIS testing.

[0177] <Regarding the content of element M (1)> By using a metal oxide that does not contain gallium or has a low gallium content in the semiconductor layer, a transistor with high reliability against positive bias application can be obtained. That is, a transistor with a small variation in threshold voltage in the PBTS test can be obtained. When using a metal oxide containing gallium, it is preferable to make the gallium content lower than the indium content. Thereby, a highly reliable transistor can be realized.

[0178] As one of the factors for the variation of the threshold voltage in the PBTS test, there are defect levels at the interface between the semiconductor layer and the gate insulating layer or in the vicinity of the interface. The greater the defect level density, the more significant the deterioration in the PBTS test. By reducing the gallium content in the region of the semiconductor layer that contacts the gate insulating layer, the generation of the defect levels can be suppressed.

[0179] As reasons for being able to suppress the variation of the threshold voltage in the PBTS test by using a metal oxide that does not contain gallium or has a low gallium content in the semiconductor layer, for example, the following can be considered. Gallium contained in the semiconductor layer has a property of being more likely to attract oxygen compared to other metal elements (for example, indium or zinc). Therefore, it is presumed that at the interface between the metal oxide containing a large amount of gallium and the gate insulating layer, gallium binds to the excess oxygen in the gate insulating layer, making it easier to generate carrier (here, electrons) trap sites. Therefore, when a positive potential is applied to the gate, it is considered that the threshold voltage varies due to carriers being trapped at the interface between the semiconductor layer and the gate insulating layer. Incidentally, by incorporating gallium in the semiconductor layer, an effect such as making it difficult for oxygen vacancies (V O ) to occur is achieved.

[0180] More specifically, when using an In-Ga-Zn oxide for the semiconductor layer, the gallium content can be reduced by applying a metal oxide to the semiconductor layer in which the atomic ratio of indium is higher than that of gallium. Furthermore, it is even more preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of gallium. In other words, it is preferable to apply a metal oxide to the semiconductor layer in which the atomic ratio of the metal elements satisfies In > Ga and Zn > Ga.

[0181] For example, in semiconductor layers, the atomic ratio of metal elements is In:Ga:Zn=2:1:3, In:Ga:Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1, In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:Ga:Zn=5:1:8, In:Ga:Zn=6:1:6, In:Ga:Zn By using metal oxides with ratios such as =10:1:3, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7, In:Ga:Zn=10:1:8, In:Ga:Zn=5:2:5, In:Ga:Zn=10:1:10, In:Ga:Zn=20:1:10, In:Ga:Zn=40:1:10, or near these ratios, the gallium content can be reduced.

[0182] The gallium content can be reduced in the semiconductor layer by using a metal oxide in which the ratio of the number of gallium atoms to the total number of atoms of the contained metal elements is higher than 0 atomic%, 50 atomic%, preferably 0.1 atomic% to 40 atomic%, more preferably 0.1 atomic% to 35 atomic%, more preferably 0.1 atomic% to 30 atomic%, more preferably 0.1 atomic% to 25 atomic%, more preferably 0.1 atomic% to 20 atomic%, more preferably 0.1 atomic% to 15 atomic%, and more preferably 0.1 atomic% to 10 atomic%.

[0183] A gallium-free metal oxide may be applied to the semiconductor layer. For example, an in-Zn oxide can be applied to the semiconductor layer. In this case, increasing the ratio of indium atoms to the total number of metal elements in the metal oxide can increase the field-effect mobility of the transistor. On the other hand, increasing the ratio of zinc atoms to the total number of metal elements in the metal oxide results in a highly crystalline metal oxide, which suppresses fluctuations in the electrical characteristics of the transistor and improves reliability. Furthermore, a gallium- and zinc-free metal oxide, such as indium oxide, may be applied to the semiconductor layer. By using a gallium-free metal oxide, fluctuations in the threshold voltage in PBTS testing can be made extremely small.

[0184] For example, an oxide containing indium and zinc can be used for the semiconductor layer. In this case, a metal oxide can be used in which the atomic ratio of the metal elements is, for example, In:Zn=2:3, In:Zn=4:1, or close to these values.

[0185] Although gallium was used as a representative example in this explanation, the method can also be applied when element M is used instead of gallium. For the semiconductor layer, it is preferable to use a metal oxide in which the atomic ratio of indium is higher than that of element M. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of element M.

[0186] By reducing the content of element M in the semiconductor layer, a transistor with high reliability against positive bias application can be created. By applying this transistor to a transistor where high reliability against positive bias application is required, a highly reliable display device can be created.

[0187] <Regarding the content of element M (2)> By increasing the content of element M in the semiconductor layer, a transistor with high reliability against light can be made. In other words, a transistor with a small fluctuation in the threshold voltage in NBTIS testing can be made. Specifically, metal oxides in which the atomic ratio of element M is greater than or equal to the atomic ratio of indium have a larger band gap, which can reduce the fluctuation in the threshold voltage of the transistor in NBTIS testing. Furthermore, a larger band gap may allow for an even lower off-current of the transistor. The band gap of the metal oxide in the semiconductor layer is preferably 2.0 eV or more, more preferably 2.5 eV or more, more preferably 3.0 eV or more, more preferably 3.2 eV or more, more preferably 3.3 eV or more, more preferably 3.4 eV or more, and more preferably 3.5 eV or more.

[0188] For example, the semiconductor layer can have a high content of element M by using metal oxides with atomic ratios of metal elements such as In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, or close to these.

[0189] The semiconductor layer can be made to have a higher content of element M by suitably using a metal oxide in which the ratio of the number of atoms of element M to the number of atoms of the contained metal elements is 20 atomic% to 70 atomic%, preferably 30 atomic% to 70 atomic%, more preferably 30 atomic% to 60 atomic%, more preferably 40 atomic% to 60 atomic%, and more preferably 50 atomic% to 60 atomic%.

[0190] When an In-Ga-Zn oxide is used in the semiconductor layer, a metal oxide can be applied in which the atomic ratio of indium to the atomic number of metal elements is less than or equal to the atomic ratio of gallium. For example, by using a metal oxide with atomic ratios of metal elements of In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:1.2, In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:3, In:Ga:Zn=1:3:4, or close to these, the content of element M can be increased.

[0191] The semiconductor layer can have a high content of element M, particularly by using a metal oxide in which the ratio of gallium atoms to the total number of atoms of the contained metal elements is 20 atomic% to 60 atomic%, preferably 20% to 50 atomic%, more preferably 30% to 50 atomic%, more preferably 40% to 60 atomic%, and more preferably 50% to 60 atomic%.

[0192] For the analysis of the composition of metal oxides, for example, energy dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES) can be used. Alternatively, a combination of these methods may be used for the analysis. Note that for elements with low content, the actual content may differ from the content obtained by the analysis due to the effect of analytical accuracy. For example, if the content of element M is low, the content of element M obtained by the analysis may be lower than the actual content.

[0193] In this specification, a "nearby composition" includes a range of ±30% of the desired atomic ratio. For example, when describing an atomic ratio of In:M:Zn=4:2:3 or a composition near that ratio, it includes cases where the atomic ratio of indium is 4, the atomic ratio of M is 1 or more and 3 or less, and the atomic ratio of zinc is 2 or more and 4 or less. Also, when describing an atomic ratio of In:M:Zn=5:1:6 or a composition near that ratio, it includes cases where the atomic ratio of indium is 5, the atomic ratio of M is greater than 0.1 and 2 or less, and the atomic ratio of zinc is 5 or more and 7 or less. Furthermore, when describing an atomic ratio of In:M:Zn=1:1:1 or a composition near that ratio, it includes cases where the atomic ratio of indium is 1, the atomic ratio of M is greater than 0.1 and 2 or less, and the atomic ratio of zinc is greater than 0.1 and 2 or less.

[0194] Furthermore, when forming metal oxides by sputtering, the atomic ratio of the target material may differ from that of the metal oxide. In particular, with zinc, the atomic ratio of the metal oxide may be lower than that of the target material. Specifically, it may be between 40% and 90% of the atomic ratio of zinc contained in the target material.

[0195] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0196] (Embodiment 2) The following describes specific configuration examples of display devices.

[0197] When a pixel of a display device has three subpixels that exhibit different colors from each other, examples of the three subpixels include three subpixels of red (R), green (G), and blue (B), and three subpixels of yellow (Y), cyan (C), and magenta (M). When there are four subpixels, examples of the four subpixels include four subpixels of red (R), green (G), blue (B), and white (W), and four subpixels of red (R), green (G), blue (B), and yellow (Y). Each subpixel has a light-emitting device.

[0198] This section describes the pixel layout of a display device. There are no particular limitations on the arrangement of subpixels that a pixel may have, and various methods can be applied. Examples of subpixel arrangements include stripe arrangements, S-stripe arrangements, matrix arrangements, delta arrangements, Bayer arrangements, and pentile arrangements.

[0199] Examples of the top surface shape of a sub-pixel include polygons such as triangles, quadrilaterals (including rectangles and squares), pentagons, and hexagons, as well as polygons with rounded corners, ellipses, or circles. Here, the top surface shape of a sub-pixel corresponds to the top surface shape of the light-emitting region of the light-emitting device.

[0200] The pixel 310 shown in Figure 8A has sub-pixels that emit red light (R), sub-pixels that emit green light (G), and sub-pixels that emit blue light (B). The pixel 310 shown in Figure 8A is arranged in a stripe pattern. Note that the order of each sub-pixel is not limited to the configuration shown in Figure 8A. Also, although Figure 8A shows a configuration in which the sub-pixels have the same area, the areas of the sub-pixels may differ. Here, the area of ​​the sub-pixel corresponds to the area of ​​the light-emitting region of the light-emitting device. In Figure 8A, the labels R, G, and B are added within the region of each sub-pixel light-emitting element to simplify the distinction between them.

[0201] The pixel 310 shown in Figure 8B represents a configuration to which an S-stripe array is applied. The pixel 310 shown in Figure 8B is composed of two rows and two columns, with two subpixels (subpixel(R) and subpixel(G)) in the left column (column 1) and one subpixel (subpixel(B)) in the right column (column 2). In other words, the pixel 310 has two subpixels (subpixel(R) and subpixel(B)) in the top row (column 1) and two subpixels (subpixel(G) and subpixel(B)) in the bottom row (column 2), with subpixel(B) spanning both rows.

[0202] Figure 8B shows an example where the area of ​​sub-pixel (B) is larger than the areas of sub-pixels (R) and (G). This configuration is suitably used when the lifespan of the light-emitting device that emits blue light is shorter than that of the light-emitting devices that emit red light and green light. In the sub-pixel (B), which has a larger light-emitting area, the current density applied to the light-emitting device that emits blue light is lower, thus extending the lifespan of the light-emitting device. In other words, a highly reliable display device can be created.

[0203] Figure 8B shows a configuration in which the area of ​​sub-pixel (B) is larger than the areas of sub-pixels (R) and (G), but the present invention is not limited to this. The area of ​​a sub-pixel can be determined according to the lifespan of the light-emitting device that the sub-pixel possesses. It is preferable to make the area of ​​the sub-pixel of a light-emitting device with a short lifespan larger than the area of ​​the other sub-pixels.

[0204] Figure 8C shows two pixels. The pixels shown in Figure 8C represent pixels where subpixels of each color are arranged in a zigzag pattern. Specifically, in each column, subpixels of different colors are arranged in odd-numbered rows and even-numbered rows.

[0205] Figure 8D shows a pixel to which a PenTile array has been applied. The pixel shown in Figure 8D consists of two pixels, pixel 310A and pixel 310B, and has a configuration with three types of subpixels: a subpixel (R) that emits red light, a subpixel (G) that emits green light, and a subpixel (B) that emits blue light. Pixels 310A and 310B have one subpixel (R), two subpixels (G), and one subpixel (B). By using this configuration, it is possible to increase the area of ​​the subpixels while maintaining a pseudo-high resolution, thereby lowering the required processing accuracy. In other words, when comparing with the same processing accuracy, it becomes possible to manufacture a display device with higher resolution. Furthermore, since the number of transistors per unit area can be reduced, productivity can be increased. Therefore, a display device that is pseudo-high resolution can be manufactured with high productivity.

[0206] Furthermore, pixel 310 has sub-pixels that emit red light (R), green light (G), and blue light (B), as well as a sub-pixel that emits infrared light (IR) and a light-detecting pixel (PS) (see Figure 8E). Pixel PS has a photodetector.

[0207] Sub-pixels that emit infrared light (IR) can be used as light sources, and the infrared light emitted by these sub-pixels can be detected by light-detecting pixels (PS).

[0208] Figure 8E shows an example where the aperture ratio of the light-detecting pixel (PS) is the lowest among the sub-pixels that emit red light (R), green light (G), blue light (B), infrared light (IR), and light-detecting pixel (PS). When the light-receiving area of ​​the light-detecting pixel (PS) is small, the imaging range is narrowed, which suppresses blurring in the imaging result and improves the resolution. Therefore, it is preferable to be able to perform high-definition or high-resolution imaging. The aperture ratios of the sub-pixels that emit red light (R), green light (G), blue light (B), infrared light (IR), and light-detecting pixel (PS) can each be determined as appropriate.

[0209] The configuration shown in Figure 8E includes a light-emitting element (also called a light-emitting device) and a light-receiving element (also called a light-receiving device) in the pixel 310. In one embodiment of the present invention, since the pixels have a light-receiving function, it is possible to detect contact or proximity of an object while displaying an image. Furthermore, since one embodiment of the present invention has sub-pixels that emit infrared light, it is also possible to display an image while emitting infrared light as a light source using the sub-pixels of the display device. In other words, one embodiment of the present invention has a configuration that is highly compatible with functions other than display functions (in this case, light-receiving functions).

[0210] Furthermore, the light-receiving element of the pixel 310 shown in Figure 8E may be used as a touch sensor or a non-contact sensor, etc.

[0211] Here, a touch sensor or a non-contact sensor can detect the proximity or contact of an object (such as a finger, hand, or pen). A touch sensor can detect an object when the electronic device and the object are in direct contact. A non-contact sensor can detect an object even if the object does not come into contact with the electronic device. For example, it is preferable that the display device (or electronic device) can detect an object when the distance between the display device (or electronic device) and the object is in the range of 0.1 mm to 300 mm, preferably 3 mm to 50 mm. With this configuration, it becomes possible to operate the electronic device without the object directly touching it; in other words, it becomes possible to operate the display device without contact (touchless). With the above configuration, the risk of the electronic device becoming dirty or scratched can be reduced, or it becomes possible to operate the electronic device without the object directly touching any dirt (e.g., dust or viruses) attached to the electronic device.

[0212] Furthermore, non-contact sensor functions can also be referred to as hover sensor functions, hover-touch sensor functions, near-touch sensor functions, touchless sensor functions, etc. Similarly, touch sensor functions can also be referred to as direct-touch sensor functions, etc.

[0213] Figures 9A and 9B show a display device according to one embodiment of the present invention.

[0214] Figure 9A shows a top view of the display device 300. The display device 300 has a display unit in which a plurality of pixels 310 are arranged in a matrix, and a connection unit 340 outside the display unit. One pixel 310 is composed of three subpixels: subpixel 310a, subpixel 310b, and subpixel 310c. Note that the pixels are not limited to the configuration shown in Figure 9A.

[0215] Figure 9A shows an example where the connection portion 340 is located below the display unit in a top view, but it is not particularly limited. The connection portion 340 only needs to be provided at least one location on the top, right, left, or bottom of the display unit in a top view, and may be provided so as to surround all four sides of the display unit. Furthermore, the connection portion 340 may be singular or multiple.

[0216] Figure 9B shows a cross-sectional view between the dashed lines X1-X2 and Y1-Y2 in Figure 9A. Furthermore, as a modified example, Figures 10A to 10C, 11A and 11B, and 12A to 12C show cross-sectional views between the dashed lines X1-X2 and Y1-Y2 in Figure 9A.

[0217] As shown in Figure 9B, the display device 300 has light-emitting devices 330a, 330b, and 330c arranged on a layer 301 containing transistors, and a protective layer 331 is provided to cover these light-emitting devices. A substrate 320 is bonded to the protective layer 331 by a resin layer 322. In addition, an insulating layer 325 and an insulating layer 327 on the insulating layer 325 are provided in the region between two adjacent light-emitting devices.

[0218] A display device according to one aspect of the present invention may be a top-emission type that emits light in the direction opposite to the substrate on which the light-emitting device is formed, a bottom-emission type that emits light toward the substrate on which the light-emitting device is formed, or a dual-emission type that emits light on both sides.

[0219] The layer 301 containing the transistors can be, for example, a laminated structure in which multiple transistors are provided on a substrate and an insulating layer is provided to cover these transistors. The layer 301 containing the transistors may have recesses between two adjacent devices. For example, recesses may be provided in the insulating layer located on the outermost surface of the layer 301 containing the transistors. The transistors can be those shown in Embodiment 1.

[0220] The light-emitting device has an EL layer between a pair of electrodes. In this specification, one of the pair of electrodes may be referred to as the pixel electrode and the other as the common electrode.

[0221] In a light-emitting device, one electrode functions as the anode and the other as the cathode. The following explanation uses the example where the pixel electrode functions as the anode and the common electrode functions as the cathode.

[0222] The light-emitting device 330a includes a conductive layer 311a on a layer 301 containing a transistor, an island-shaped first layer 313a on the conductive layer 311a, a fourth layer 314 on the island-shaped first layer 313a, and a common electrode 315 on the fourth layer 314. The conductive layer 311a functions as a pixel electrode. In the light-emitting device 330a, the first layer 313a and the fourth layer 314 can be collectively called the EL layer.

[0223] The first layer 313a includes, for example, a hole injection layer, a hole transport layer, an emissive layer, and an electron transport layer. Alternatively, the first layer 313a includes, for example, a first emissive unit, a charge generation layer, and a second emissive unit.

[0224] The fourth layer 314 may, for example, have an electron injection layer. Alternatively, the fourth layer 314 may have an electron transport layer and an electron injection layer laminated together.

[0225] The light-emitting device 330b includes a conductive layer 311b on a layer 301 containing a transistor, an island-shaped second layer 313b on the conductive layer 311b, a fourth layer 314 on the island-shaped second layer 313b, and a common electrode 315 on the fourth layer 314. The conductive layer 311b functions as a pixel electrode. In the light-emitting device 330b, the second layer 313b and the fourth layer 314 can be collectively called the EL layer.

[0226] The light-emitting device 330c includes a conductive layer 311c on a layer 301 containing a transistor, an island-shaped third layer 313c on the conductive layer 311c, a fourth layer 314 on the island-shaped third layer 313c, and a common electrode 315 on the fourth layer 314. The conductive layer 311c functions as a pixel electrode. In the light-emitting device 330c, the third layer 313c and the fourth layer 314 can be collectively called the EL layer.

[0227] The fourth layer 314 is a layer common to all light-emitting devices. As described above, the fourth layer 314 has, for example, an electron injection layer. Alternatively, the fourth layer 314 may have an electron transport layer and an electron injection layer stacked together.

[0228] The common electrode 315 is electrically connected to the conductive layer 323 provided in the connection part 340. As a result, the same potential is supplied to the common electrode 315 of each light-emitting device. In Figure 9B, an example is shown in which a fourth layer 314 is provided on the conductive layer 323, and the conductive layer 323 and the common electrode 315 are electrically connected via the fourth layer 314. The fourth layer 314 does not have to be provided in the connection part 340. For example, in Figure 10C, an example is shown in which the fourth layer 314 is not provided on the conductive layer 323, and the conductive layer 323 and the common electrode 315 are directly connected.

[0229] For example, by using a mask (also called an area mask or rough metal mask) to define the film deposition area, the region where the film is deposited on the fourth layer 314 and the common electrode 315 can be changed.

[0230] Each side of the conductive layers 311a to 311c, the first layer 313a, the second layer 313b, and the third layer 313c is covered by insulating layers 325 and 327. This prevents the fourth layer 314 (or common electrode 315) from coming into contact with any side of the conductive layers 311a to 311c, the first layer 313a, the second layer 313b, and the third layer 313c, thereby suppressing short circuits in the light-emitting device. This improves the reliability of the light-emitting device.

[0231] The insulating layer 325 preferably covers at least the sides of the conductive layers 311a to 311c. Furthermore, it is preferable that the insulating layer 325 covers the sides of the first layer 313a, the second layer 313b, and the third layer 313c. The insulating layer 325 can be configured to be in contact with the respective sides of the conductive layers 311a to 311c, the first layer 313a, the second layer 313b, and the third layer 313c.

[0232] The insulating layer 327 is provided on the insulating layer 325 so as to fill the recesses formed in the insulating layer 325. The insulating layer 327 can be configured to overlap with the sides of the conductive layers 311a to 311c, the first layer 313a, the second layer 313b, and the third layer 313c via the insulating layer 325.

[0233] By providing insulating layers 325 and 327, the gaps between adjacent island-shaped layers can be filled, thereby reducing the unevenness of the surface of layers (such as common electrodes) formed on the island-shaped layers, making them flatter. Consequently, the coverage of the common electrode can be improved, and step breaks in the common electrode can be prevented.

[0234] The insulating layer 325 or insulating layer 327 can be provided in contact with the island-shaped layers. This prevents the peeling of the island-shaped layers. The close contact between the insulating layer and the island-shaped layers provides the effect of fixing or bonding adjacent island-shaped layers to each other.

[0235] An organic resin film is preferred for the insulating layer 327. When the side surface of the EL layer and the photosensitive organic resin film are in direct contact, organic solvents that may be contained in the photosensitive organic resin film may damage the EL layer. By using an aluminum oxide film formed by atomic layer deposition (ALD) for the insulating layer 325, it is possible to create a configuration in which the photosensitive organic resin film used for the insulating layer 327 and the side surface of the EL layer do not come into direct contact. This makes it possible to suppress the dissolution of the EL layer by organic solvents.

[0236] Furthermore, it is not necessary to provide either the insulating layer 325 or the insulating layer 327. For example, by forming a single-layer insulating layer 325 using an inorganic material, the insulating layer 325 can be used as a protective insulating layer for the EL layer. This can improve the reliability of the display device. Alternatively, by forming a single-layer insulating layer 327 using an organic material, for example, the space between adjacent EL layers can be filled with the insulating layer 327 and flattened. This can improve the coverage of the common electrode (upper electrode) formed on the EL layer and the insulating layer 327.

[0237] The fourth layer 314 and the common electrode 315 are provided on the first layer 313a, the second layer 313b, the third layer 313c, the insulating layer 325, and the insulating layer 327. Before the insulating layer 325 and the insulating layer 327 are provided, a step difference exists due to the region where the pixel electrode and EL layer are provided and the region where the pixel electrode and EL layer are not provided (the region between the light-emitting devices). In one embodiment of the present invention, the presence of the insulating layer 325 and the insulating layer 327 can flatten this step difference and improve the coverage of the fourth layer 314 and the common electrode 315. Therefore, connection failures due to step breaks can be suppressed. Alternatively, the increase in electrical resistance due to local thinning of the common electrode 315 caused by the step difference can be suppressed.

[0238] To improve the flatness of the forming surfaces of the fourth layer 314 and the common electrode 315, it is preferable that the heights of the upper surfaces of the insulating layer 325 and the insulating layer 327 match or approximately match the height of at least one of the upper surfaces of the first layer 313a, the second layer 313b, and the third layer 313c, respectively. Furthermore, it is preferable that the upper surface of the insulating layer 327 has a flat shape, and may have convex portions, convex curved surfaces, concave curved surfaces, or recesses.

[0239] The insulating layer 325 has regions that are in contact with the sides of the first layer 313a, the second layer 313b, and the third layer 313c, and functions as a protective insulating layer for the first layer 313a, the second layer 313b, and the third layer 313c. By providing the insulating layer 325, it is possible to suppress the intrusion of impurities (oxygen, moisture, etc.) into the interior from the sides of the first layer 313a, the second layer 313b, and the third layer 313c, thereby enabling a highly reliable display device.

[0240] If the width (thickness) of the insulating layer 325 is large in the region in contact with the sides of the first layer 313a, the second layer 313b, and the third layer 313c in a cross-sectional view, the spacing between the first layer 313a, the second layer 313b, and the third layer 313c may increase, resulting in a lower aperture ratio. Conversely, if the width (thickness) of the insulating layer 325 is small, the effect of suppressing the intrusion of impurities into the interior from the sides of the first layer 313a, the second layer 313b, and the third layer 313c may be reduced. The width (thickness) of the insulating layer 325 in the region in contact with the sides of the first layer 313a, the second layer 313b, and the third layer 313c is preferably 3 nm to 200 nm, more preferably 3 nm to 150 nm, more preferably 5 nm to 150 nm, more preferably 5 nm to 100 nm, more preferably 10 nm to 100 nm, and more preferably 10 nm to 50 nm. By setting the width (thickness) of the insulating layer 325 within the above range, a display device with a high aperture ratio and high reliability can be made.

[0241] The insulating layer 325 can be an insulating layer having an inorganic material. For example, inorganic insulating films such as oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films can be used for the insulating layer 325. The insulating layer 325 may be a single layer or a laminated structure. Examples of oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, indium gallium zinc oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, and tantalum oxide film. Examples of nitride insulating films include silicon nitride film and aluminum nitride film. Examples of oxidative nitride insulating films include silicon oxidative nitride film and aluminum oxidative nitride film. Examples of nitride oxide insulating films include silicon nitride oxide film and aluminum nitride oxide film. In particular, aluminum oxide is preferred because it has a high selectivity ratio with the EL layer during etching and has the function of protecting the EL layer during the formation of the insulating layer 327, which will be described later. In particular, by applying inorganic insulating films such as aluminum oxide films, hafnium oxide films, and silicon oxide films formed by the ALD method to the insulating layer 325, it is possible to form an insulating layer 325 with fewer pinholes and excellent protection for the EL layer. Alternatively, the insulating layer 325 may have a laminated structure of a film formed by the ALD method and a film formed by the sputtering method. For example, the insulating layer 325 may have a laminated structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.

[0242] The insulating layer 325 can be formed using sputtering, chemical vapor deposition (CVD), pulsed laser deposition (PLD), ALD, or other methods. It is preferable to form the insulating layer 325 using the ALD method, which provides good coverage.

[0243] The insulating layer 327 provided on the insulating layer 325 has the function of flattening the recess in the insulating layer 325 formed between adjacent light-emitting devices. In other words, the presence of the insulating layer 327 improves the flatness of the surface on which the common electrode 315 is formed. The insulating layer 327 can preferably be an insulating layer having an organic material. For example, as the insulating layer 327, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimidoamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins can be applied. Alternatively, as the insulating layer 327, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin may be used. Furthermore, a photosensitive resin can be used as the insulating layer 327. A photoresist may be used as the photosensitive resin. The photosensitive resin can be a positive-type material or a negative-type material.

[0244] The difference between the height of the upper surface of the insulating layer 327 and the height of the upper surface of any of the first layer 313a, the second layer 313b, and the third layer 313c is preferably 0.5 times or less the thickness of the insulating layer 327, and more preferably 0.3 times or less. Alternatively, the insulating layer 327 may be provided such that the upper surface of any of the first layer 313a, the second layer 313b, and the third layer 313c is higher than the upper surface of the insulating layer 327. Alternatively, the insulating layer 327 may be provided such that the upper surface of the insulating layer 327 is higher than the upper surface of the light-emitting layer of the first layer 313a, the second layer 313b, or the third layer 313c.

[0245] Figure 10A shows an example where the insulating layer 325 is not provided. When the insulating layer 325 is not provided, the insulating layer 327 can be configured to be in contact with the respective sides of the conductive layers 311a to 311c, the first layer 313a, the second layer 313b, and the third layer 313c. The insulating layer 327 can be provided to fill the spaces between the EL layers of each light-emitting device.

[0246] In this case, it is preferable to use an organic material for the insulating layer 327 that causes less damage to the first layer 313a, the second layer 313b, and the third layer 313c. For example, it is preferable to use an organic material for the insulating layer 327 such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin.

[0247] Figure 10B shows an example where the insulating layer 327 is not provided.

[0248] It is preferable to have a protective layer 331 on the light-emitting devices 330a, 330b, and 330c. By providing the protective layer 331, the reliability of the light-emitting devices can be improved.

[0249] The conductivity of the protective layer 331 is not required. The protective layer 331 can be at least one of an insulating film, a semiconductor film, and a conductive film.

[0250] The presence of an inorganic film in the protective layer 331 prevents oxidation of the common electrode 315 and suppresses the intrusion of impurities (such as moisture and oxygen) into the light-emitting devices 330a, 330b, and 330c, thereby suppressing degradation of the light-emitting devices and improving the reliability of the display device.

[0251] For the protective layer 331, inorganic insulating films such as oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films can be used. Examples of oxide insulating films include silicon oxide films, aluminum oxide films, gallium oxide films, germanium oxide films, yttrium oxide films, zirconium oxide films, lanthanum oxide films, neodymium oxide films, hafnium oxide films, and tantalum oxide films. Examples of nitride insulating films include silicon nitride films and aluminum nitride films. Examples of oxidative nitride insulating films include silicon oxide nitride films and aluminum oxide nitride films. Examples of nitride oxide insulating films include silicon oxide nitride films and aluminum oxide nitride films.

[0252] The protective layer 331 preferably has a nitride insulating film or a nitride oxide insulating film, and more preferably has a nitride insulating film.

[0253] The protective layer 331 may also be an inorganic film containing In-Sn oxide (also known as ITO), In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or indium gallium zinc oxide (In-Ga-Zn oxide, also known as IGZO). The inorganic film is preferably highly resistive, and more specifically, it is preferably more resistive than the common electrode 315. The inorganic film may further contain nitrogen.

[0254] When the light emitted from a light-emitting device is extracted via a protective layer 331, it is preferable that the protective layer 331 has high transmittance to visible light. For example, ITO, IGZO, and aluminum oxide are preferred because they are inorganic materials with high transmittance to visible light.

[0255] As the protective layer 331, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using such a laminated structure, it is possible to suppress impurities (water, oxygen, etc.) from entering the EL layer.

[0256] Furthermore, the protective layer 331 may have an organic film. For example, the protective layer 331 may have both an organic film and an inorganic film.

[0257] The upper edges of each conductive layer 311a to conductive layer 311c are not covered by an insulating layer. Therefore, the spacing between adjacent light-emitting devices can be made extremely narrow. Consequently, a high-definition or high-resolution display device can be made.

[0258] As shown in Figures 11A and 11B, the ends of each of the conductive layers 311a to 311c may be covered by the insulating layer 321.

[0259] The insulating layer 321 can have a single-layer structure or a laminated structure using one or both of an inorganic insulating film and an organic insulating film.

[0260] Examples of the organic insulating material that can be used for the insulating layer 321 include acrylic resin, epoxy resin, polyimide resin, polyamide resin, polyimide amide resin, polysiloxane resin, benzocyclobutene-based resin, and phenol resin. Further, as the inorganic insulating film that can be used for the insulating layer 321, the inorganic insulating film that can be used for the protective layer 331 can be used.

[0261] When an inorganic insulating film is used as the insulating layer 321 that covers the end portion of the pixel electrode, impurities are less likely to enter the light-emitting device compared to the case where an organic insulating film is used, and the reliability of the light-emitting device can be improved. When an organic insulating film is used as the insulating layer 321 that covers the end portion of the pixel electrode, the step coverage is higher and it is less affected by the shape of the pixel electrode compared to the case where an inorganic insulating film is used. Therefore, a short circuit of the light-emitting device can be prevented. Specifically, when an organic insulating film is used as the insulating layer 321, the shape of the insulating layer 321 can be processed into a tapered shape or the like. In the present specification and the like, the tapered shape refers to a shape in which at least a part of the side surface of the structure is provided inclined with respect to the substrate surface. For example, it is preferable to have a region where the angle (also referred to as a taper angle) formed by the inclined side surface and the substrate surface is less than 90°.

[0262] Note that the insulating layer 321 may not be provided. By not providing the insulating layer 321, the aperture ratio of the sub-pixel may be increased. Or, the distance between sub-pixels can be narrowed, and the fineness or resolution of the display device may be increased.

[0263] In FIG. 11A, an example is shown in which the fourth layer 314 enters the regions of the first layer 313a and the second layer 313b. However, as shown in FIG. 11B, voids 334 may be formed in the regions.

[0264] The void 334 may contain, for example, one or more of the following: air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically helium, neon, argon, xenon, krypton, etc.). Alternatively, resin or the like may be embedded in the void 334.

[0265] Figure 9A and others show an example where the edges of the conductive layer 311a and the edges of the first layer 313a are aligned or approximately aligned. In other words, the upper surface shapes of the conductive layer 311a and the first layer 313a are identical or approximately identical.

[0266] The relative sizes of the conductive layers, such as conductive layer 311a and the first layer 313a, conductive layer 311b and the second layer 313b, conductive layer 311c and the third layer 313c, are not particularly limited. Figure 12A shows an example where the edge of the first layer 313a is located inward from the edge of the conductive layer 311a. In Figure 12A, the edge of the first layer 313a is located on the conductive layer 311a. Figure 12B shows an example where the edge of the first layer 313a is located outward from the edge of the conductive layer 311a. In Figure 12B, the first layer 313a is provided so as to cover the edge of the conductive layer 311a.

[0267] Furthermore, if the edges are aligned or roughly aligned, and the top surface shapes match or roughly match, then in a top view, at least a portion of the contours overlaps between the stacked layers. This includes, for example, cases where the upper and lower layers are processed with the same mask pattern, or partially with the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer; in this case as well, the edges are said to be roughly aligned, or the top surface shapes roughly match.

[0268] Figure 12C shows a modified example of the insulating layer 327. In Figure 12C, the upper surface of the insulating layer 327 has a shape that bulges gently towards the center, i.e., a convex curved surface, and a shape that is concave in the center and its vicinity, i.e., a concave curved surface, when viewed in cross-section.

[0269] Figures 13A to 13F show the cross-sectional structure of the region 139, which includes the insulating layer 327 and its surrounding area.

[0270] Figure 13A shows an example where the thicknesses of the first layer 313a and the second layer 313b are different. The height of the upper surface of the insulating layer 325 is the same as or approximately the same as the height of the upper surface of the first layer 313a on the first layer 313a side, and the height of the upper surface of the second layer 313b on the second layer 313b side. The upper surface of the insulating layer 327 has a gentle slope, with the first layer 313a side being higher and the second layer 313b side being lower. Thus, it is preferable that the heights of the insulating layer 325 and insulating layer 327 are the same as the height of the upper surface of the adjacent EL layer. Alternatively, they may be the same as the height of the upper surface of either of the adjacent EL layers, and the upper surface may have a flat portion.

[0271] In Figure 13B, the upper surface of the insulating layer 327 has a region that is higher than the upper surface of the first layer 313a and the upper surface of the second layer 313b. As shown in Figure 13B, the upper surface of the insulating layer 327 can have a shape that is convex in the center and its vicinity when viewed in cross-section, that is, a shape that has a convex curved surface.

[0272] In Figure 13C, the upper surface of the insulating layer 327 has a shape that bulges gently toward the center, i.e., a convex curved surface, and a shape that is recessed in the center and its vicinity, i.e., a concave curved surface, in cross-sectional view. The insulating layer 327 has a region that is higher than the upper surface of the first layer 313a and the upper surface of the second layer 313b. In region 139, the display device has at least one of the sacrificial layer 318a and the sacrificial layer 319a, and has a first region in which the insulating layer 327 is higher than the upper surface of the first layer 313a and the upper surface of the second layer 313b and is located outside the insulating layer 325, and the first region is located above at least one of the sacrificial layer 318a and the sacrificial layer 319a. Furthermore, in region 139, the display device has at least one of the sacrificial layer 318b and the sacrificial layer 319b, and has a second region in which the insulating layer 327 is higher than the upper surface of the first layer 313a and the upper surface of the second layer 313b and is located outside the insulating layer 325, and the second region is located on at least one of the sacrificial layer 318b and the sacrificial layer 319b.

[0273] In Figure 13D, the upper surface of the insulating layer 327 has a region that is lower than the upper surfaces of the first layer 313a and the second layer 313b. Furthermore, in cross-sectional view, the upper surface of the insulating layer 327 has a concave shape, meaning that the center and its vicinity are recessed.

[0274] In Figure 13E, the upper surface of the insulating layer 325 has a region that is higher than the upper surfaces of the first layer 313a and the second layer 313b. That is, on the surface where the fourth layer 314 is formed, the insulating layer 325 protrudes, forming a convex portion.

[0275] In forming the insulating layer 325, for example, if the insulating layer 325 is formed to match or approximately match the height of the sacrificial layer, a protruding shape of the insulating layer 325 may be formed, as shown in Figure 13E.

[0276] In Figure 13F, the upper surface of the insulating layer 325 has a region that is lower than the upper surface of the first layer 313a and the upper surface of the second layer 313b. That is, the insulating layer 325 forms a recess on the surface on which the fourth layer 314 is formed.

[0277] Thus, the insulating layer 325 and the insulating layer 327 can be made into various shapes.

[0278] The sacrificial layer can be, for example, a metal film, an alloy film, a metal oxide film, a semiconductor film, or an inorganic film such as an inorganic insulating film.

[0279] The sacrificial layer can be made of metallic materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or alloy materials containing such metallic materials.

[0280] Metal oxides such as In-Ga-Zn oxide can be used as the sacrificial layer. For example, an In-Ga-Zn oxide film can be formed as the sacrificial layer using a sputtering method. Furthermore, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), etc. can be used. Alternatively, indium tin oxide containing silicon can also be used.

[0281] In addition, element M (where M is one or more selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium) may be used instead of gallium. In particular, it is preferable that M be one or more selected from gallium, aluminum, or yttrium.

[0282] The sacrificial layer can be any inorganic insulating film that can be used for the protective layer 331. In particular, oxide insulating films are preferred because they have higher adhesion to the EL layer than nitride insulating films. For example, inorganic insulating materials such as aluminum oxide, hafnium oxide, and silicon oxide can be used for the sacrificial layer. As the sacrificial layer, for example, an aluminum oxide film can be formed using the ALD method. Using the ALD method is preferable because it reduces damage to the substrate (especially the EL layer). As the sacrificial layer, for example, a silicon nitride film can be formed using the sputtering method.

[0283] For example, as the sacrificial layer, a laminated structure of an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method and an In-Ga-Zn oxide film formed using the sputtering method can be applied. Alternatively, as the sacrificial layer, a laminated structure of an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method and an aluminum film, a tungsten film, or an inorganic insulating film (e.g., a silicon nitride film) formed using the sputtering method can be applied.

[0284] In this specification and the like, a device fabricated using a metal mask or an FMM (fine metal mask, high-definition metal mask) may be referred to as a device having an MM (metal mask) structure. Also, in this specification and the like, a device fabricated without using a metal mask or an FMM may be referred to as a device having an MML (metal maskless) structure.

[0285] In this specification and the like, a structure in which light-emitting layers are separately formed or painted for each color of light-emitting device (here, blue (B), green (G), and red (R)) may be referred to as an SBS (Side By Side) structure. Since the SBS structure allows the materials and configuration to be optimized for each light-emitting device, the degree of freedom in the selection of materials and configuration is increased, making it easier to improve the luminance and reliability.

[0286] In this specification and the like, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. Note that a white light-emitting device can be combined with a coloring layer (e.g., a color filter) to realize a display device for full-color display.

[0287] Light-emitting devices can be broadly classified into single-structure and tandem-structure devices. A single-structure device has one light-emitting unit between a pair of electrodes, and it is preferable that this light-emitting unit includes one or more light-emitting layers. When obtaining white light emission using two light-emitting layers, the light-emitting layers should be selected such that the light emitted from each of the two layers is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a configuration that emits white light as a whole can be obtained. Also, when obtaining white light using three or more light-emitting layers, the light-emitting device should be configured so that the light-emitting colors of the three or more layers combine to emit white light as a whole.

[0288] A tandem device preferably has two or more light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, the device should be configured such that the light from the light-emitting layers of the multiple light-emitting units is combined to produce white light emission. The configuration for obtaining white light emission is the same as that for a single-structure device. In a tandem device, it is preferable to provide an intermediate layer, such as a charge-generating layer, between the multiple light-emitting units.

[0289] Furthermore, by combining a white light-emitting device (either a single structure or a tandem structure, or both), a color filter, and an MML structure according to one aspect of the present invention, a display device with a high contrast ratio can be obtained.

[0290] When comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use an SBS structure light-emitting device. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0291] In particular, among light-emitting devices with an MML structure, applying an SBS structure results in a configuration where the layer between light-emitting elements (for example, an organic layer used in common between light-emitting elements, also called a common layer) is separated, making it possible to achieve a display with no side leakage or extremely low side leakage.

[0292] The display device of this embodiment can reduce the distance between light-emitting devices. Specifically, the distance between light-emitting devices, the distance between EL layers, or the distance between pixel electrodes can be less than 10 μm, 5 μm or less, 3 μm or less, 2 μm or less, 1 μm or less, 500 nm or less, 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the distance between the side surface of the first layer 313a and the side surface of the second layer 313b, or the distance between the side surface of the second layer 313b and the side surface of the third layer 313c, has a region of 1 μm or less, preferably a region of 0.5 μm (500 nm) or less, and more preferably a region of 100 nm or less.

[0293] A light-shielding layer may be provided on the side of the substrate 320 facing the resin layer 322. Various optical components can also be placed on the outside of the substrate 320. Examples of optical components include polarizing plates, phase difference plates, light diffusion layers (such as diffusion films), anti-reflective layers, and light-collecting films. Furthermore, an antistatic film to suppress the adhesion of dust, a water-repellent film to make it difficult for dirt to adhere, a hard coat film to suppress the occurrence of scratches during use, and an impact-absorbing layer may also be placed on the outside of the substrate 320.

[0294] The substrate 320 can be made of glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. The substrate on the side that extracts light from the light-emitting device should be made of a material that transmits the light. Using a flexible material for the substrate 320 can increase the flexibility of the display device. Alternatively, a polarizing plate may be used as the substrate 320.

[0295] The substrate 320 can be made of polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. Glass with a thickness sufficient to provide flexibility may also be used for the substrate 320.

[0296] Furthermore, when a circular polarizing plate is superimposed on a display device, it is preferable to use a substrate with high optical isotropy for the substrate of the display device. A substrate with high optical isotropy has low birefringence (or a small amount of birefringence).

[0297] For substrates with high optical isotropy, the absolute value of the retardation (phase difference) is preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.

[0298] Examples of films with high optical isotropy include triacetylcellulose (TAC, also known as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.

[0299] When using a film as a substrate, the film may absorb water, potentially causing wrinkles or other shape changes in the display panel. Therefore, it is preferable to use a film with low water absorption for the substrate. For example, it is preferable to use a film with a water absorption rate of 1% or less, more preferable to use a film with a water absorption rate of 0.1% or less, and even more preferable to use a film with a water absorption rate of 0.01% or less.

[0300] The resin layer 322 can be made of various types of curing adhesives, such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, or anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0301] Materials that can be used for conductive layers such as the gate, source, and drain of transistors, as well as various wirings and electrodes that constitute display devices, include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, as well as alloys mainly composed of these metals. Films containing these materials can be used as single layers or in a multilayer structure.

[0302] As a translucent conductive material, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide containing gallium, or graphene can be used. Alternatively, metallic materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, and titanium, or alloy materials containing such metallic materials, can be used. Alternatively, nitrides of such metallic materials (e.g., titanium nitride) may be used. When using metallic materials or alloy materials (or their nitrides), it is preferable to make them thin enough to be translucent. Furthermore, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of a silver-magnesium alloy and indium tin oxide is preferable because it can enhance conductivity. These can also be used as conductive layers for various wirings and electrodes constituting display devices, and as conductive layers in light-emitting devices (conductive layers that function as pixel electrodes or common electrodes).

[0303] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic resin and epoxy resin, and inorganic insulating materials such as silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide, and aluminum oxide.

[0304] Next, we will describe materials that can be used in light-emitting devices.

[0305] Of the pixel electrodes and common electrodes, the electrode that extracts light should preferably use a conductive film that transmits visible light and infrared light. Furthermore, it is preferable to use a conductive film that reflects visible light and infrared light on the electrode that does not extract light.

[0306] The light-emitting device preferably employs a microcavity structure. Therefore, it is preferable that one of the pair of electrodes in the light-emitting device has an electrode that is both transparent and reflective to visible light (a semi-transmissive / semi-reflective electrode), and the other electrode has an electrode that is reflective to visible light (a reflective electrode). By having a microcavity structure in the light-emitting device, the light emitted from the light-emitting layer can be resonated between the two electrodes, thereby intensifying the light emitted from the light-emitting device.

[0307] Furthermore, the semi-transparent / semi-reflective electrode can have a laminated structure consisting of an electrode that reflects visible light and an electrode that transmits visible light (also called a transparent electrode).

[0308] The light transmittance of the transparent electrode shall be 40% or more. For example, it is preferable to use an electrode in the light-emitting device that has a transmittance of 40% or more for visible light (light with a wavelength of 400 nm or more and less than 750 nm). The visible light reflectance of the semi-transparent / semi-reflective electrode shall be 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode shall be 40% or more and 100% or less, preferably 70% or more and 100% or less. The resistivity of these electrodes shall be 1 × 10⁻⁶ -2It is preferable that the transmittance or reflectance of these electrodes to near-infrared light (light with a wavelength of 750 nm to 1300 nm) satisfies the above numerical range, similar to the transmittance or reflectance of visible light.

[0309] The first layer 313a, the second layer 313b, and the third layer 313c each have an emissive layer. Preferably, the first layer 313a, the second layer 313b, and the third layer 313c each have an emissive layer that emits light of a different color.

[0310] The luminescent layer is a layer containing a luminescent material. The luminescent layer may contain one or more types of luminescent materials. The luminescent material can be any material that exhibits a luminescent color such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red. Furthermore, a material that emits near-infrared light can also be used as the luminescent material.

[0311] The first layer 313a, the second layer 313b, and the third layer 313c may further include layers other than the light-emitting layer, such as a material with high hole injection properties, a material with high hole transport properties, a hole-blocking material, a material with high electron transport properties, a material with high electron injection properties, an electron-blocking material, or a bipolar material (a material with high electron transport and hole transport properties).

[0312] The light-emitting device may use either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the light-emitting device can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0313] For example, the first layer 313a, the second layer 313b, and the third layer 313c may each have one or more of the following: a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer. Furthermore, the first layer 313a, the second layer 313b, and the third layer 313c may each have a charge generation layer (also called an intermediate layer).

[0314] The fourth layer 314 may have one or more of the following: a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer. For example, when conductive layers 311a to 311c function as anodes and the common electrode 315 functions as a cathode, it is preferable that the fourth layer 314 has an electron injection layer.

[0315] The hole injection layer is a layer that injects holes from the anode into the hole transport layer, and is a layer containing a material with high hole injection capabilities. Examples of materials with high hole injection capabilities include aromatic amine compounds and composite materials containing hole transport materials and acceptor materials (electron-accepting materials).

[0316] Thin films (insulating films, semiconductor films, and conductive films, etc.) that constitute display devices can be formed using sputtering, CVD, vacuum deposition, PLD, ALD, and other methods. CVD methods include plasma-enhanced CVD (PECVD) and thermal CVD. One type of thermal CVD is metal-organic CVD (MOCVD).

[0317] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute a display device can be formed by methods such as spin coating, dipping, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, and knife coating.

[0318] In particular, vacuum processes such as vapor deposition and solution processes such as spin coating and inkjet can be used to fabricate light-emitting devices. Examples of vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, as well as chemical vapor deposition (CVD). Functional layers (hole injection layers, hole transport layers, light-emitting layers, electron transport layers, electron injection layers, etc.) included in the EL layer can be formed by vapor deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), and printing methods (inkjet, screen printing, offset printing, flexographic printing, gravure, or microcontact printing, etc.).

[0319] When processing the thin film that constitutes the display device, it can be processed using methods such as photolithography. Alternatively, the thin film may be processed by nanoimprint lithography, sandblasting, or lift-off methods. Furthermore, island-shaped thin films may be directly formed by a film deposition method using a shielding mask such as a metal mask.

[0320] As described above, in the display device of this embodiment, the island-shaped EL layer is formed not by the pattern of the metal mask, but by processing after the EL layer is deposited on one surface, so that the island-shaped EL layer can be formed with a uniform thickness. Furthermore, it is possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. In addition, since the EL layer can be made separately for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and has high display quality. Moreover, by providing a sacrificial layer on the EL layer, the damage that the EL layer receives during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting device can be improved.

[0321] Furthermore, one embodiment of the present invention is a display device having an OS transistor and a light-emitting device with an MML (metal maskless) structure. This configuration makes it possible to extremely reduce the leakage current that can flow through the transistor and the leakage current that can flow between adjacent light-emitting elements (also called lateral leakage current or side leakage current). With this configuration, when an image is displayed on the display device, the observer can observe one or more of the following: image sharpness, image clarity, high saturation, and high contrast ratio. Moreover, by having an extremely low leakage current that can flow through the transistor and lateral leakage current between light-emitting elements, it is possible to achieve a display (also called true black display) with as little light leakage (so-called white floating) that may occur when displaying black as possible.

[0322] Furthermore, a display device according to one aspect of the present invention may have a structure in which no insulator is provided to cover the ends of the pixel electrodes. In other words, there is no insulator provided between the pixel electrodes and the EL layer. This configuration allows for efficient extraction of light emitted from the EL layer, thereby significantly reducing the viewing angle dependence. For example, in a display device according to one aspect of the present invention, the viewing angle (the maximum angle at which a constant contrast ratio is maintained when viewing the screen from an oblique direction) can be set to a range of 100° or more and less than 180°, preferably 150° or more and 170° or less. The above viewing angle can be applied to both the vertical and horizontal directions. By using a display device according to one aspect of the present invention, the viewing angle dependence is improved, and the visibility of the image can be enhanced.

[0323] Furthermore, when a display device is formed using a fine metal mask (FMM) structure, there may be limitations on the pixel arrangement configuration. The FMM structure will be explained below.

[0324] In an FMM structure, a metal mask (also called an FMM) with openings is set opposite the substrate during EL deposition, allowing EL to be deposited in the desired area. Then, EL deposition is performed through the FMM to deposit EL in the desired area. As the substrate size increases during EL deposition, the size and weight of the FMM also increase. In addition, heat and other forces are applied to the FMM during EL deposition, which may cause deformation of the FMM. Alternatively, there are methods that apply a certain tension to the FMM during EL deposition, so the weight and strength of the FMM are important parameters.

[0325] Therefore, when designing the pixel arrangement using FMM, it is necessary to consider the above parameters and other factors, and the design must be considered under certain limitations. On the other hand, in one embodiment of the present invention, since the display device is manufactured using an MML structure, it offers superior advantages such as greater flexibility in the pixel arrangement compared to the FMM structure. Furthermore, this configuration has high compatibility with flexible devices, for example, and allows for various circuit arrangements for either the pixels or the driving circuit, or both.

[0326] The first, second, and third layers constituting each color of light-emitting device are formed in separate processes. Therefore, each EL layer can be fabricated with a configuration (material, film thickness, etc.) suitable for each color of light-emitting device. This makes it possible to produce light-emitting devices with excellent characteristics.

[0327] This embodiment can be combined with other embodiments as appropriate.

[0328] (Embodiment 3) In this embodiment, a display device according to one aspect of the present invention will be described with reference to Figures 14, 15A, and 15B.

[0329] The display device of this embodiment can be a high-resolution display device or a large-screen display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television sets, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal information terminals, and audio playback devices.

[0330] [Display device] Figure 14 shows a perspective view of the display device 300A, and Figure 15A shows a cross-sectional view of the display device 300A.

[0331] The display device 300A has a configuration in which substrate 352 and substrate 351 are bonded together. In Figure 14, substrate 352 is clearly indicated by a dashed line.

[0332] The display device 300A includes a display unit 362, a connection unit 340, a circuit 364, wiring 365, etc. Figure 14 shows an example in which IC 373 and FPC 372 are mounted on the display device 300A. Therefore, the configuration shown in Figure 14 can also be described as a display module having the display device 300A, an IC (integrated circuit), and an FPC.

[0333] The connection portion 340 is provided on the outside of the display portion 362. The connection portion 340 can be provided along one or more sides of the display portion 362. There may be one or more connection portions 340. Figure 14 shows an example in which the connection portion 340 is provided so as to surround all four sides of the display portion. At the connection portion 340, the common electrode of the light-emitting device and the conductive layer are electrically connected, and a potential can be supplied to the common electrode.

[0334] Circuit 364 can, for example, be a scan line drive circuit.

[0335] Wiring 365 has the function of supplying signals and power to the display unit 362 and the circuit 364. These signals and power are input to wiring 365 from an external source via FPC 372 or from IC 373.

[0336] Figure 14 shows an example in which IC 373 is mounted on substrate 351 using COG (Chip On Glass) or COF (Chip On Film) methods. IC 373 can be an IC having, for example, a scan line drive circuit or a signal line drive circuit. Note that the display device 300A and the display module may be configured without an IC. Alternatively, the IC may be mounted on an FPC using the COF method or the like.

[0337] Figure 15A shows an example of a cross-section of the display device 300A when a portion of the area including the FPC 372, a portion of the circuit 364, a portion of the display unit 362, a portion of the connection unit 340, and a portion of the area including the end are cut.

[0338] The display device 300A shown in Figure 15A has a transistor 201, a transistor 205, a light-emitting device 330a that emits red light, a light-emitting device 330b that emits green light, and a light-emitting device 330c that emits blue light, etc., between substrates 351 and 352.

[0339] The light-emitting device 330a has a conductive layer 311a, a conductive layer 312a on the conductive layer 311a, and a conductive layer 326a on the conductive layer 312a. All of the conductive layers 311a, 312a, and 326a can be called pixel electrodes, or only a part of them can be called pixel electrodes.

[0340] The conductive layer 311a is connected to the conductive layer 222b of the transistor 205 through an opening provided in the insulating layer 324. The edge of the conductive layer 312a is located outside the edge of the conductive layer 311a. The edges of the conductive layer 312a and the conductive layer 326a are aligned or approximately aligned. For example, conductive layers that function as reflective electrodes can be used for conductive layers 311a and 312a, and a conductive layer that functions as a transparent electrode can be used for conductive layer 326a.

[0341] The light-emitting device 330b includes a conductive layer 311b, a conductive layer 312b on the conductive layer 311b, and a conductive layer 326b on the conductive layer 312b.

[0342] The light-emitting device 330c has a conductive layer 311c, a conductive layer 312c on the conductive layer 311c, and a conductive layer 326c on the conductive layer 312c.

[0343] The conductive layers 311b, 312b, and 326b in the light-emitting device 330b, and the conductive layers 311c, 312c, and 326c in the light-emitting device 330c, are the same as the conductive layers 311a, 312a, and 326a in the light-emitting device 330a, so a detailed explanation is omitted.

[0344] The conductive layers 311a, 311b, and 311c have recesses formed so as to cover the openings provided in the insulating layer 324. Layer 328 is embedded in these recesses.

[0345] Layer 328 has the function of flattening the recesses of conductive layers 311a, 311b, and 311c. Conductive layers 312a, 312b, and 312c, which are electrically connected to conductive layers 311a, 311b, or 311c, are provided on conductive layers 311a, 311b, 311c, and 328. Therefore, regions overlapping with the recesses of conductive layers 311a, 311b, and 311c can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixels.

[0346] Layer 328 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used for layer 328 as appropriate. In particular, it is preferable that layer 328 be formed using an insulating material.

[0347] Layer 328 can suitably be an insulating layer having an organic material. For example, acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimidoamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins can be used as layer 328. Alternatively, a photosensitive resin can be used as layer 328. The photosensitive resin can be a positive-type material or a negative-type material.

[0348] By using a photosensitive resin, layer 328 can be fabricated using only exposure and development processes, thereby reducing the impact of dry etching or wet etching on the surfaces of conductive layers 311a, 311b, and 311c. Furthermore, by forming layer 328 using a negative-type photosensitive resin, it may be possible to form layer 328 using the same photomask (exposure mask) used to form the openings of the insulating layer 324.

[0349] The top and side surfaces of conductive layer 312a and conductive layer 326a are covered by the first layer 313a. The top and side surfaces of conductive layer 312b and conductive layer 326b are covered by the second layer 313b. Furthermore, the top and side surfaces of conductive layer 312c and conductive layer 326c are covered by the third layer 313c. Therefore, the entire region where conductive layer 312a, conductive layer 312b, or conductive layer 312c is provided can be used as the light-emitting region of light-emitting device 330a, light-emitting device 330b, or light-emitting device 330c, thereby increasing the aperture ratio of the pixels.

[0350] The sides of the first layer 313a, the second layer 313b, and the third layer 313c are covered by insulating layers 325 and 327, respectively. A sacrificial layer 318a is located between the first layer 313a and the insulating layer 325, a sacrificial layer 318b is located between the second layer 313b and the insulating layer 325, and a sacrificial layer 318c is located between the third layer 313c and the insulating layer 325. A fourth layer 314 is provided on the first layer 313a, the second layer 313b, the third layer 313c, the insulating layer 325, and the insulating layer 327, and a common electrode 315 is provided on the fourth layer 314. The fourth layer 314 and the common electrode 315 are continuous films provided in common to the light-receiving device and the light-emitting device, respectively. Furthermore, a protective layer 331 is provided on the light-emitting devices 330a, 330b, and 330c.

[0351] The protective layer 331 and the substrate 352 are bonded together via an adhesive layer 342. For sealing the light-emitting device, a solid sealing structure or a hollow sealing structure can be applied. In Figure 15A, the space between the substrate 352 and the substrate 351 is filled with the adhesive layer 342, demonstrating a solid sealing structure. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), demonstrating a hollow sealing structure. In this case, the adhesive layer 342 may be provided so as not to overlap with the light-emitting device. Furthermore, the space may be filled with a resin different from the adhesive layer 342, which is provided in a frame shape.

[0352] In the connection portion 340, a conductive layer 323 is provided on the insulating layer 324. The conductive layer 323 is shown as an example of a laminated structure consisting of a conductive film obtained by processing the same conductive film as conductive layers 311a, 311b, and 311c, a conductive film obtained by processing the same conductive film as conductive layers 312a, 312b, and 312c, and a conductive film obtained by processing the same conductive film as conductive layers 326a, 326b, and 326c. The ends of the conductive layer 323 are covered by a sacrificial layer, an insulating layer 325, and an insulating layer 327. Furthermore, a fourth layer 314 is provided on the conductive layer 323, and a common electrode 315 is provided on the fourth layer 314. The conductive layer 323 and the common electrode 315 are electrically connected via the fourth layer 314. Note that the fourth layer 314 does not necessarily have to be formed in the connection portion 340. In this case, the conductive layer 323 and the common electrode 315 are in direct contact and electrically connected.

[0353] The display device 300A is a top-emission type. The light emitted by the light-emitting device is emitted towards the substrate 352. It is preferable to use a material with high transmittance to visible light for the substrate 352. The pixel electrodes contain a material that reflects visible light, and the counter electrodes (common electrodes 315) contain a material that transmits visible light.

[0354] The insulating layer 215 is provided to cover the transistor. The insulating layer 324 is provided to cover the transistor and functions as a planarization layer. The number of insulating layers covering the transistor is not limited and may be a single layer or two or more layers.

[0355] It is preferable to use a material that does not easily allow impurities such as water and hydrogen to diffuse into at least one layer of the insulating layer covering the transistor. This allows the insulating layer to function as a barrier layer. By adopting such a configuration, the diffusion of impurities from the outside into the transistor can be effectively suppressed, thereby improving the reliability of the display device.

[0356] The insulating layer 215 preferably uses an inorganic insulating film. Examples of inorganic insulating films that can be used include silicon nitride film, silicon oxide nitride film, silicon oxide film, silicon nitride oxide film, aluminum oxide film, and aluminum nitride film. Alternatively, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film may also be used. Furthermore, two or more of the above insulating films may be laminated together.

[0357] The insulating layer 324, which functions as a planarization layer, can preferably use an organic insulating film. Examples of materials that can be used for the organic insulating film include acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimidoamide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins. Alternatively, the insulating layer 324 may have a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 324 preferably functions as an etching protective film. This suppresses the formation of depressions in the insulating layer 324 during processing of conductive layers such as 311b, 312b, or 326b. Alternatively, depressions may be provided in the insulating layer 324 during processing of conductive layers such as 311b, 312b, or 326b.

[0358] A connection portion 204 is provided in the region of substrate 351 where substrate 352 does not overlap. At the connection portion 204, wiring 365 is electrically connected to FPC 372 via conductive layer 366 and connection layer 203. The conductive layer 366 is shown as an example of a laminated structure consisting of a conductive film obtained by processing the same conductive film as conductive layers 311a, 311b, and 311c, a conductive film obtained by processing the same conductive film as conductive layers 312a, 312b, and 312c, and a conductive film obtained by processing the same conductive film as conductive layers 326a, 326b, and 326c. On the upper surface of the connection portion 204, the conductive layer 366 is exposed. This allows the connection portion 204 and FPC 372 to be electrically connected via the connection layer 203.

[0359] It is preferable to provide a light-shielding layer 317 on the surface of the substrate 352 that faces the substrate 351. The light-shielding layer 317 can be provided between adjacent light-emitting devices, at connection points 340, and in circuits 364, etc. Various optical components can be placed on the outside of the substrate 352. Examples of optical components include polarizing plates, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflective layers, and light-collecting films. Furthermore, an antistatic film to suppress the adhesion of dust, a water-repellent film to make it difficult for dirt to adhere, a hard coat film to suppress the occurrence of scratches during use, and an impact-absorbing layer may be placed on the outside of the substrate 352.

[0360] By providing a protective layer 331 that covers the light-emitting device and the light-receiving device, it is possible to suppress the ingress of impurities such as water into the light-emitting device and the light-receiving device, thereby improving the reliability of the light-emitting device and the light-receiving device.

[0361] Substrates 351 and 352 can be made of glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc., respectively. The substrate on the side that extracts light from the light-emitting device should be made of a material that transmits the light. Using flexible materials for substrates 351 and 352 can increase the flexibility of the display device. Alternatively, a polarizing plate may be used as substrate 351 or substrate 352.

[0362] Substrates 351 and 352 can be made from polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. One or both of substrates 351 and 352 may be made of glass of a thickness sufficient to provide flexibility.

[0363] Furthermore, when a circular polarizing plate is superimposed on a display device, it is preferable to use a substrate with high optical isotropy for the substrate of the display device. A substrate with high optical isotropy has low birefringence (or a small amount of birefringence).

[0364] For substrates with high optical isotropy, the absolute value of the retardation (phase difference) is preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.

[0365] Examples of films with high optical isotropy include triacetylcellulose (TAC, also known as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.

[0366] When using a film as a substrate, the film may absorb water, potentially causing wrinkles or other shape changes in the display panel. Therefore, it is preferable to use a film with low water absorption for the substrate. For example, it is preferable to use a film with a water absorption rate of 1% or less, more preferable to use a film with a water absorption rate of 0.1% or less, and even more preferable to use a film with a water absorption rate of 0.01% or less.

[0367] The adhesive layer 342 can be made of various types of curing adhesives, such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, or anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0368] The connecting layer 203 can be made of an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0369] Materials that can be used for conductive layers such as the gate, source, and drain of transistors, as well as various wirings and electrodes that constitute display devices, include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, as well as alloys mainly composed of these metals. Films containing these materials can be used as single layers or in a multilayer structure.

[0370] As a translucent conductive material, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide containing gallium, or graphene can be used. Alternatively, metallic materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, and titanium, or alloy materials containing such metallic materials, can be used. Alternatively, nitrides of such metallic materials (e.g., titanium nitride) may be used. When using metallic materials or alloy materials (or their nitrides), it is preferable to make them thin enough to be translucent. Furthermore, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of a silver-magnesium alloy and indium tin oxide is preferable because it can enhance conductivity. These can also be used as conductive layers for various wirings and electrodes constituting display devices, and as conductive layers in light-emitting devices (conductive layers that function as pixel electrodes or common electrodes).

[0371] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic resin and epoxy resin, and inorganic insulating materials such as silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide, and aluminum oxide.

[0372] <Transistor> Figure 15B is an enlarged cross-sectional view including transistors 201 and 205.

[0373] Transistor 205 has a semiconductor layer 108, an insulating layer 117, an insulating layer 110, and a conductive layer 112 stacked in this order. The insulating layer 117 and a portion of the insulating layer 110 function as the gate insulating layer of transistor 201. The conductive layer 112 functions as the gate electrode of transistor 201. Transistor 201 is a so-called top-gate type transistor in which the gate electrode is provided on the semiconductor layer 108.

[0374] Transistor 201 has a semiconductor layer 208, an insulating layer 110, and a conductive layer 212 stacked in that order. A portion of the insulating layer 110 functions as the gate insulating layer of transistor 205. The conductive layer 212 functions as the gate electrode of transistor 205. Transistor 205 is a so-called top-gate type transistor in which the gate electrode is provided on the semiconductor layer 208. Transistor 205 differs from transistor 201 in the surface on which the semiconductor layer is formed. Furthermore, transistor 205 has a different gate insulating layer configuration from transistor 201.

[0375] Transistors 201 and 205 can be formed using the same process, except for the semiconductor layer. This allows for a reduction in the number of processes even when two different types of transistors are mixed together.

[0376] The transistor 205 shown in Figure 15B has a conductive layer 106 that functions as a back gate. Similarly, the transistor 201 shown in Figure 15B also has a conductive layer 206 that functions as a back gate.

[0377] In Figure 15B, a conductive layer 106 is provided in contact with the substrate 351. An insulating layer 103 is provided in contact with the conductive layer 106 and the substrate 351. A semiconductor layer 108 is provided in contact with the insulating layer 103. An insulating layer 117 is provided in contact with the upper surface of the insulating layer 103 of the substrate 351, and with the upper and side surfaces of the semiconductor layer 108. A semiconductor layer 208 is provided in contact with the insulating layer 117. In other words, the semiconductor layer 208 is provided on a different surface from the semiconductor layer 108. The insulating layer 117 functions as a base film in the transistor 201. An insulating layer 110 is provided in contact with the upper surface of the insulating layer 117, and with the upper and side surfaces of the semiconductor layer 208. A conductive layer 112 and a conductive layer 212 are provided in contact with the insulating layer 110. The conductive layer 112 has a region that overlaps with the semiconductor layer 108 via the insulating layer 117 and the insulating layer 110. The conductive layer 212 has a region that overlaps with the semiconductor layer 208 via the insulating layer 110.

[0378] As shown in Figure 15B, it is preferable that transistors 201 and 205 further have an insulating layer 118. The insulating layer 118 is provided covering the insulating layer 110, the conductive layer 112, and the conductive layer 212, and functions as a protective layer to protect transistors 201 and 205.

[0379] The transistor 205 may have conductive layers 222a and 222b on the insulating layer 118. Conductive layer 222a functions as either the source electrode or the drain electrode of the transistor 205, and conductive layer 222b functions as the other either the source electrode or the drain electrode of the transistor 205. Conductive layers 222a and 222b are electrically connected to the low-resistance region 108N of the semiconductor layer 108 through openings provided in the insulating layer 118, insulating layer 110, and insulating layer 117, respectively.

[0380] The transistor 201 may have conductive layers 365a and 365b on the insulating layer 118. Conductive layer 365a functions as either the source electrode or the drain electrode of the transistor 201, and conductive layer 365b functions as the other source electrode or drain electrode of the transistor 201. Conductive layers 365a and 365b are electrically connected to the low-resistance region 208N of the semiconductor layer 208 via openings provided in the insulating layer 118 and the insulating layer 110, respectively.

[0381] Here, it is preferable that semiconductor layer 108 and semiconductor layer 208 contain metal oxides of different compositions. Semiconductor layer 108 and semiconductor layer 208 can be formed by processing metal oxide films of different compositions. A display device according to one aspect of the present invention has a plurality of transistors with different semiconductor layer compositions on the same substrate, and components other than the semiconductor layers can be formed by the same process.

[0382] As mentioned above, the electrical characteristics and reliability of a transistor differ depending on the composition of the metal oxide applied to the semiconductor layer. Therefore, by varying the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, it is possible to create a display device that achieves both excellent electrical characteristics and high reliability.

[0383] Let's explain using the example of applying transistor 201 to a transistor that requires a large on-current. For example, when both semiconductor layer 108 and semiconductor layer 208 use In-Ga-Zn oxide, semiconductor layer 208 can use a metal oxide with a higher ratio of indium atoms to the total number of metal elements compared to semiconductor layer 108. Also, for example, semiconductor layer 108 can use a metal oxide with a higher ratio of gallium atoms to the total number of metal elements compared to semiconductor layer 208.

[0384] Similarly, when an in-Ga-Zn oxide is used for semiconductor layer 108 and an indium-containing metal oxide other than in-Ga-Zn oxide is used for semiconductor layer 208, semiconductor layer 208 can use a metal oxide with a higher ratio of indium atoms to the total number of metal element atoms compared to semiconductor layer 108.

[0385] In the semiconductor layer 108, a metal oxide containing indium other than In-Ga-Zn oxide can also be used. Similarly, in this case, the semiconductor layer 208 can use a metal oxide in which the ratio of indium atoms to the total number of metal element atoms is higher compared to the semiconductor layer 108.

[0386] Alternatively, the semiconductor layer 108 may use a metal oxide in which the ratio of indium atoms to the total number of metal elements is higher compared to the semiconductor layer 208.

[0387] The semiconductor layer 108 has a region that overlaps with the conductive layer 112 and a pair of low-resistance regions 108N flanking that region. The region of the semiconductor layer 108 that overlaps with the conductive layer 112 functions as the channel formation region of the transistor 205. The pair of low-resistance regions 108N function as the source region and drain region of the transistor 205. Similarly, the semiconductor layer 208 has a channel formation region that overlaps with the conductive layer 212 and a pair of low-resistance regions 208N flanking that region.

[0388] In transistor 205, the low-resistance region 108N can also be described as a region with lower resistance, higher carrier concentration, higher oxygen vacancy density, higher impurity concentration, or an n-type region, compared to the channel formation region of transistor 205. Similarly, in transistor 201, the low-resistance region 208N can also be described as a region with lower resistance, higher carrier concentration, higher oxygen vacancy density, higher impurity concentration, or an n-type region, compared to the channel formation region of transistor 201.

[0389] The low-resistance regions 108N and 208N are regions containing impurity elements. Examples of such impurity elements include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, and noble gases. Representative examples of noble gases include helium, neon, argon, krypton, and xenon. The low-resistance regions 108N and 208N are particularly preferably regions containing boron or phosphorus. Furthermore, the low-resistance regions 108N and 208N may contain two or more of the aforementioned elements. The low-resistance regions 108N and 208N may contain different impurity elements.

[0390] The low-resistance regions 108N and 208N can be formed, for example, by adding impurities via the insulating layer 110 using the conductive layer 112 or conductive layer 212 as a mask.

[0391] The structures of the multiple transistors in circuit 364 may all be the same, or there may be two or more different structures. Similarly, the structures of the multiple transistors in display unit 362 may all be the same, or there may be two or more different structures.

[0392] Alternatively, transistors with the same structure may be used in circuit 364 and display unit 362.

[0393] For example, transistor 205 may be used in circuit 364.

[0394] The display device 300B shown in Figure 16 illustrates an example in which transistors 201 and 205 are used as transistors constituting the display unit 362. By having transistors 201 and 205 in the pixel circuit of the display unit 362, a display device with high display quality and excellent reliability can be realized. Furthermore, the manufacturing process of the display device can be simplified compared to Figure 17, which will be described later.

[0395] In the display device 300B shown in Figure 16, an example is shown in which transistor 201 is used as the transistor constituting circuit 364, but transistor 205 may also be used.

[0396] The display device 300C shown in Figure 17 is an example in which transistors 201, 205, and 202 are used as transistors constituting the display unit 362, and transistor 202 is used as a transistor constituting the circuit 364. By having transistors 201, 202, and 205 in the pixel circuit of the display unit 362, a display device with high display quality and excellent reliability can be realized.

[0397] The transistor 202 has a semiconductor layer 411, an insulating layer 412, a conductive layer 413, etc. The semiconductor layer 411 has a channel-forming region 411i and a low-resistance region 411n. The semiconductor layer 411 is made of silicon. Preferably, the semiconductor layer 411 is made of polycrystalline silicon. For example, LTPS can be used as polycrystalline silicon. A part of the insulating layer 412 functions as a gate insulating layer. A part of the conductive layer 413 functions as a gate electrode.

[0398] The low-resistance region 411n is a region containing impurity elements. For example, if transistor 202 is an n-channel type transistor, phosphorus or arsenic can be added to the low-resistance region 411n. On the other hand, if it is a p-channel type transistor, boron or aluminum can be added to the low-resistance region 411n. Furthermore, in order to control the threshold voltage of transistor 202, the aforementioned impurities may be added to the channel formation region 411i.

[0399] Circuit 364 may be constructed using, for example, both an n-channel transistor and a p-channel transistor. Alternatively, circuit 364 may be constructed using only one of either an n-channel transistor or a p-channel transistor.

[0400] The transistor 202 may have conductive layers 421a and 421b on the insulating layer 118. Conductive layer 421a functions as either the source electrode or the drain electrode of the transistor 202, and conductive layer 421b functions as the other source electrode or drain electrode of the transistor 202. Conductive layers 421a and 421b are electrically connected to the low-resistance region 411n through openings provided in the insulating layer 118, insulating layer 110, insulating layer 117, and insulating layer 412, respectively.

[0401] Here, it is preferable that the conductive layers 421a and 421b, which are electrically connected to the transistor 202, are formed by processing the same conductive film as conductive layers 222a, 222b, 365a, and 365b. This is preferable because it simplifies the manufacturing process.

[0402] Furthermore, it is preferable that the conductive layer 413, which functions as the gate electrode of transistor 202, the conductive layer 206, which functions as the second gate electrode of transistor 201, and the conductive layer 106, which functions as the second gate of transistor 205, are formed by processing the same conductive film. This is preferable because it simplifies the manufacturing process.

[0403] The transistor 202 may also have a second gate electrode. If the transistor 202 has a second gate electrode, for example, a conductive layer that functions as the second gate electrode may be provided on the substrate 351, an insulating layer may be provided so as to be in contact with the conductive layer and the upper surface of the substrate 351, and a semiconductor layer 411 may be provided on the insulating layer. Furthermore, it is preferable that the conductive layer 413 and the conductive layer that functions as the second gate electrode have overlapping regions.

[0404] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0405] (Embodiment 4) This embodiment describes a light-emitting device that can be used in a display device according to one aspect of the present invention.

[0406] As shown in Figure 18A, the light-emitting device has an EL layer 786 between a pair of electrodes (lower electrode 772, upper electrode 788). The EL layer 786 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). Light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0407] A configuration having a layer 4420, an emissive layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single emissive unit, and in this specification, the configuration shown in Figure 18A is referred to as a single structure.

[0408] Figure 18B shows a modified example of the EL layer 786 of the light-emitting device shown in Figure 18A. Specifically, the light-emitting device shown in Figure 18B has a layer 4431 on the lower electrode 772, a layer 4432 on layer 4431, a light-emitting layer 4411 on layer 4432, a layer 4421 on the light-emitting layer 4411, a layer 4422 on layer 4421, and an upper electrode 788 on layer 4422. For example, when the lower electrode 772 is the anode and the upper electrode 788 is the cathode, layer 4431 functions as a hole injection layer, layer 4432 functions as a hole transport layer, layer 4421 functions as an electron transport layer, and layer 4422 functions as an electron injection layer. Alternatively, when the lower electrode 772 is used as the cathode and the upper electrode 788 is used as the anode, layer 4431 functions as an electron injection layer, layer 4432 functions as an electron transport layer, layer 4421 functions as a hole transport layer, and layer 4422 functions as a hole injection layer. By using such a layer structure, it is possible to efficiently inject carriers into the light-emitting layer 4411 and increase the efficiency of carrier recombination within the light-emitting layer 4411.

[0409] Furthermore, as shown in Figures 18C and 18D, a configuration in which multiple light-emitting layers (light-emitting layers 4411, 4412, and 4413) are provided between layer 4420 and layer 4430 is also a variation of the single structure.

[0410] As shown in Figures 18E and 18F, a configuration in which multiple light-emitting units (EL layer 786a, EL layer 786b) are connected in series via a charge generation layer 4440 is referred to as a tandem structure in this specification. The tandem structure may also be called a stacked structure. Furthermore, a tandem structure enables a light-emitting device capable of high-brightness emission.

[0411] In Figures 18C and 18D, the light-emitting layers 4411, 4412, and 4413 may be made of light-emitting materials that emit light of the same color, or even the same light-emitting material may be used. For example, light-emitting materials that emit blue light may be used for the light-emitting layers 4411, 4412, and 4413. A color conversion layer may be provided as layer 785 as shown in Figure 18D.

[0412] Light-emitting materials that emit light of different colors may be used for each of the light-emitting layers 4411, 4412, and 4413. When the light emitted by each of the light-emitting layers 4411, 4412, and 4413 is complementary in color, white light emission is obtained. A color filter (also called a colored layer) may be provided as layer 785 as shown in Figure 18D. By passing white light through the color filter, light of a desired color can be obtained.

[0413] In Figures 18E and 18F, the light-emitting layer 4411 and the light-emitting layer 4412 may be made of light-emitting materials that emit light of the same color, or they may be made of the same light-emitting material. Alternatively, the light-emitting layer 4411 and the light-emitting layer 4412 may be made of light-emitting materials that emit light of different colors. When the light emitted by the light-emitting layer 4411 and the light emitted by the light-emitting layer 4412 are complementary colors, white light emission is obtained. Figure 18F shows an example in which a further layer 785 is provided. Layer 785 can be a color conversion layer and / or a color filter (coloring layer).

[0414] Furthermore, in Figures 18C, 18D, 18E, and 18F, as shown in Figure 18B, layer 4420 and layer 4430 may be a laminated structure consisting of two or more layers.

[0415] A structure in which each light-emitting device produces a different light-emitting color (for example, blue (B), green (G), and red (R)) is sometimes called an SBS (Side By Side) structure.

[0416] The light-emitting color of the light-emitting device can be red, green, blue, cyan, magenta, yellow, or white, depending on the material that makes up the EL layer 786. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting device.

[0417] A light-emitting device that emits white light preferably has a configuration that includes two or more types of light-emitting materials in its light-emitting layer. To obtain white light emission, it is sufficient to select light-emitting materials such that the light emitted by each of the two or more materials is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a light-emitting device that emits white light as a whole can be obtained. The same applies to light-emitting devices that have three or more light-emitting layers.

[0418] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). Alternatively, it is preferable to have two or more light-emitting materials, and for each light-emitting material to emit light that contains spectral components of two or more colors from R, G, and B.

[0419] This embodiment can be combined with other embodiments as appropriate.

[0420] (Embodiment 5) This embodiment describes metal oxides (also called oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0421] The metal oxide preferably contains at least indium or zinc. It is particularly preferable that it contains indium and zinc. In addition, it is preferable that it contains aluminum, gallium, yttrium, tin, etc. It may also contain one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0422] Metal oxides can be formed by chemical vapor deposition (CVD) methods such as sputtering, metal-organic chemical vapor deposition (MOCVD), or atomic layer deposition (ALD).

[0423] <Classification of crystal structures> Examples of crystalline structures for oxide semiconductors include amorphous (including completely amorphous), CAAC (c-axis-aligned crystalline), nc (nanocrystalline), CAC (cloud-aligned composite), single crystal, and polycrystal.

[0424] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. For example, it can be evaluated using the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement. The GIXD method is also known as the thin-film method or the Seemann-Bohlin method.

[0425] For example, in a quartz glass substrate, the peak shape of the XRD spectrum is nearly symmetrical. On the other hand, in an IGZO film with a crystalline structure, the peak shape of the XRD spectrum is asymmetrical. The asymmetrical shape of the XRD spectrum peak clearly indicates the presence of crystals in the film or substrate. In other words, if the peak shape of the XRD spectrum is not symmetrical, the film or substrate cannot be said to be in an amorphous state.

[0426] The crystalline structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed using nano-beam electron diffraction (NBED). For example, a halo is observed in the diffraction pattern of a quartz glass substrate, confirming that the quartz glass is in an amorphous state. However, in the diffraction pattern of an IGZO film deposited at room temperature, a spot-like pattern is observed instead of a halo. Therefore, it is presumed that an IGZO film deposited at room temperature is in an intermediate state, neither crystalline nor amorphous, and cannot be concluded to be in an amorphous state.

[0427] <<Oxide semiconductor structure>> It should be noted that oxide semiconductors may be classified differently from those described above when considering their structure. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Furthermore, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0428] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0429] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0430] Each of the multiple crystalline regions described above is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0431] In In-M-Zn oxide (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, silicon, boron, copper, vanadium, beryllium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. The In layer may also contain element M. The In layer may also contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM (Transmission Electron Microscope) images.

[0432] When structural analysis of a CAAC-OS film is performed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the c-axis orientation peak (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0433] For example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0434] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the ab-plane direction, and the bond distance between atoms changes due to the substitution of metal atoms.

[0435] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and a reduction in field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more effectively than In oxide.

[0436] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities and the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0437] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0438] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0439] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0440] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0441] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0442] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0443] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0444] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0445] In in-Ga-Zn oxides, CAC-OS refers to a material composition containing In, Ga, Zn, and O, in which regions with Ga as the main component and regions with In as the main component are arranged in a mosaic-like fashion, with these regions existing randomly. Therefore, it is presumed that CAC-OS has a structure in which the metal elements are unevenly distributed.

[0446] CAC-OS can be formed, for example, by sputtering under conditions where the substrate is not heated. When forming CAC-OS by sputtering, one or more gases selected from inert gases (typically argon), oxygen gas, and nitrogen gas may be used as the film-forming gas. Furthermore, it is preferable that the ratio of the oxygen gas flow rate to the total flow rate of the film-forming gas during film formation be as low as possible. For example, it is preferable that the ratio of the oxygen gas flow rate to the total flow rate of the film-forming gas during film formation be 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0447] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy-dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0448] Here, the first region is a region with higher conductivity compared to the second region. In other words, the conductivity of the metal oxide is exhibited when carriers flow through the first region. Therefore, a high field-effect mobility (μ) can be achieved when the first region is distributed in a cloud-like manner within the metal oxide.

[0449] On the other hand, the second region has higher insulating properties compared to the first region. In other words, the distribution of the second region within the metal oxide can suppress leakage current.

[0450] Therefore, when CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in some parts of the material, insulating function in other parts of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Thus, by using CAC-OS in a transistor, a large on-current, high field-effect mobility, and good switching operation can be achieved.

[0451] Transistors using CAC-OS are highly reliable. Therefore, CAC-OS is ideal for various display devices, including display devices.

[0452] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0453] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0454] By using the above-mentioned oxide semiconductor in a transistor, it is possible to realize a transistor with high field-effect mobility. Furthermore, it is possible to realize a highly reliable transistor.

[0455] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 1013 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0456] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have a low defect level density, which may result in a low trap level density.

[0457] Charges trapped in the trap levels of oxide semiconductors can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high density of trap levels may exhibit unstable electrical properties.

[0458] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0459] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0460] In oxide semiconductors, the presence of silicon or carbon, which are Group 14 elements, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are compared by 2 × 10⁻¹⁰ 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0461] When alkali metals or alkaline earth metals are present in oxide semiconductors, they can form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0462] In oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. This can result in unstable electrical properties of the transistor. Therefore, the nitrogen concentration in oxide semiconductors obtained by SIMS should be set to 5 × 10⁻¹⁰. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0463] Hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. When hydrogen fills these vacancies, electrons, which act as carriers, may be generated. Furthermore, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, in oxide semiconductors, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0464] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0465] This embodiment can be combined with other embodiments as appropriate.

[0466] (Embodiment 6) In this embodiment, an electronic device according to one aspect of the present invention will be described with reference to Figures 19 to 21.

[0467] The electronic device of this embodiment has a display device according to one aspect of the present invention in its display unit. The display device according to one aspect of the present invention is easily made high-definition and high-resolution. Therefore, it can be used in the display units of various electronic devices.

[0468] Examples of electronic devices include television sets, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as other electronic devices with relatively large screens, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0469] A display device according to one aspect of the present invention can be used in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as wearable devices that can be worn on the head, such as head-mounted displays for VR, glasses-type devices for AR, and devices for MR.

[0470] A display device according to one aspect of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels). In particular, a resolution of 4K, 8K, or higher is preferred. Furthermore, the pixel density (resolution) of the display device according to one aspect of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more. By using a display device having either high resolution or high detail, or both, it becomes possible to enhance the sense of presence and depth in personal electronic devices such as portable or home-use devices. Furthermore, there are no particular limitations on the aspect ratio of the display device according to one embodiment of the present invention. For example, the display device can support various aspect ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0471] The electronic device of this embodiment may have sensors (including those with the function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0472] The electronic device of this embodiment can have a variety of functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), a wireless communication function, a function to read programs or data recorded on a recording medium, and so on.

[0473] The electronic device 6500 shown in Figure 19A is a portable information terminal that can be used as a smartphone.

[0474] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508, etc. The display unit 6502 has a touch panel function.

[0475] A display device according to one aspect of the present invention can be applied to the display unit 6502.

[0476] Figure 19B is a schematic cross-sectional view of the housing 6501, including the end on the microphone 6506 side.

[0477] A light-transmitting protective member 6510 is provided on the display side of the housing 6501, and the display panel 6511, optical member 6512, touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged in the space enclosed by the housing 6501 and the protective member 6510.

[0478] The protective member 6510 is fixed to the display panel 6511, the optical member 6512, and the touch sensor panel 6513 by an adhesive layer (not shown).

[0479] In the area outside the display unit 6502, a portion of the display panel 6511 is folded back, and the FPC 6515 is connected to this folded portion. IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to terminals provided on the printed circuit board 6517.

[0480] A flexible display according to one embodiment of the present invention can be applied to the display panel 6511. This makes it possible to realize an extremely lightweight electronic device. Furthermore, because the display panel 6511 is extremely thin, it is possible to incorporate a large-capacity battery 6518 while keeping the thickness of the electronic device low. In addition, by folding back a part of the display panel 6511 and placing the connection part with the FPC 6515 on the back of the display section, an electronic device with a narrow bezel can be realized.

[0481] Figure 20A shows an example of a television system. The television system 7100 has a display unit 7000 incorporated into a housing 7101. Here, the housing 7101 is shown supported by a stand 7103.

[0482] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0483] The television device 7100 shown in Figure 20A can be operated using the operation switches on the housing 7101 and a separate remote control unit 7111. Alternatively, the display unit 7000 may be equipped with a touch sensor, and the television device 7100 can be operated by touching the display unit 7000 with a finger or the like. The remote control unit 7111 may have a display unit that displays information output from the remote control unit 7111. Channels and volume can be controlled and the image displayed on the display unit 7000 can be controlled using the operation keys or touch panel on the remote control unit 7111.

[0484] The television system 7100 is configured to include a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0485] Figure 20B shows an example of a notebook personal computer. The notebook personal computer 7200 has a casing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc. A display unit 7000 is incorporated into the casing 7211.

[0486] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0487] Figures 20C and 20D show examples of digital signage.

[0488] The digital signage 7300 shown in Figure 20C includes a housing 7301, a display unit 7000, and a speaker 7303, etc. Furthermore, it may include LED lamps, operation keys (including a power switch or operation switches), connection terminals, various sensors, a microphone, etc.

[0489] Figure 20D shows a digital signage 7400 mounted on a cylindrical column 7401. The digital signage 7400 has a display unit 7000 that is provided along the curved surface of the column 7401.

[0490] In Figures 20C and 20D, a display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0491] The larger the display area 7000, the more information can be provided at once. Furthermore, a larger display area 7000 is more eye-catching, which can, for example, enhance the effectiveness of advertising.

[0492] Applying a touch panel to the display unit 7000 is preferable because it not only allows images or videos to be displayed on the display unit 7000, but also enables intuitive operation by the user. Furthermore, when used for purposes such as providing route information or traffic information, intuitive operation can enhance usability.

[0493] As shown in Figures 20C and 20D, it is preferable that the digital signage 7300 or digital signage 7400 can be linked wirelessly with an information terminal 7311 or information terminal 7411, such as a smartphone, owned by the user. For example, the advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or information terminal 7411. In addition, the display on the display unit 7000 can be switched by operating the information terminal 7311 or information terminal 7411.

[0494] The digital signage 7300 or digital signage 7400 can also be used to run games using the screen of the information terminal 7311 or information terminal 7411 as the control device (controller). This allows an unspecified number of users to participate in and enjoy the game simultaneously.

[0495] Furthermore, it is preferable that the display unit of an electronic device according to one aspect of the present invention includes a light-receiving device as a sensor device. By configuring the display unit to include both a light-emitting device and a light-receiving device, the number of components can be reduced. In other words, since the electronic device according to one aspect of the present invention has both a light-emitting device and a sensor device, there is no need to separately provide a fingerprint authentication device or a capacitive touch panel device for scrolling or the like. Therefore, according to one aspect of the present invention, it is possible to provide an electronic device with reduced manufacturing costs.

[0496] The electronic equipment shown in Figures 21A to 21F includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or operation switch), connection terminals 9006, sensors 9007 (including functions for measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation), a microphone 9008, etc.

[0497] The electronic devices shown in Figures 21A to 21F have various functions. For example, they may have functions to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date or time, a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. However, the functions of electronic devices are not limited to these and can have various functions. Electronic devices may have multiple display units. Furthermore, electronic devices may be equipped with a camera, etc., and have functions to capture still images or videos and save them to a recording medium (external or built into the camera), a function to display the captured images on a display unit, etc.

[0498] Details of the electronic equipment shown in Figures 21A to 21F will be explained below.

[0499] Figure 21A is a perspective view showing a personal digital assistant (PDA) 9101. The PDA 9101 can be used, for example, as a smartphone. The PDA 9101 may also be equipped with a speaker 9003, connection terminals 9006, sensors 9007, etc. The PDA 9101 can also display text and image information on multiple surfaces. Figure 21A shows an example where three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on other surfaces of the display unit 9001. Examples of information 9051 include notifications of incoming emails, SNS messages, and phone calls, the subject of an email or SNS message, the sender's name, date and time, battery level, and signal strength. Alternatively, icons 9050 or the like may be displayed in the location where the information 9051 is displayed.

[0500] Figure 21B is a perspective view showing the personal digital assistant (PDA) 9102. The PDA 9102 has the function of displaying information on three or more sides of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different sides. For example, a user can check information 9053, which is displayed in a position that can be observed from above the PDA 9102, while the PDA 9102 is stored in the breast pocket of their clothing. The user can check the display without taking the PDA 9102 out of their pocket and decide, for example, whether or not to answer a call.

[0501] Figure 21C is a perspective view showing a wristwatch-type personal information terminal 9200. The personal information terminal 9200 can be used, for example, as a smartwatch (registered trademark). The display unit 9001 has a curved display surface, allowing it to display information along the curved surface. The personal information terminal 9200 can also make hands-free calls by communicating with, for example, a wireless communication headset. Furthermore, the personal information terminal 9200 can transmit data to other information terminals and be charged via a connection terminal 9006. Charging may be performed by wireless power supply.

[0502] Figures 21D to 21F are perspective views showing a foldable portable information terminal 9201. Figure 21D shows the portable information terminal 9201 in an unfolded state, Figure 21F shows it in a folded state, and Figure 21E shows a perspective view of the state in between Figures 21D and 21F. The portable information terminal 9201 offers excellent portability in its folded state and excellent readability of the display due to its seamless, wide display area in its unfolded state. The display unit 9001 of the portable information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display unit 9001 can be bent with a radius of curvature of 0.1 mm to 150 mm.

[0503] This embodiment can be combined with other embodiments as appropriate. [Examples]

[0504] This example demonstrates the characteristics of an OS transistor according to one aspect of the present invention and a transistor using LTPS.

[0505] <Fabrication of Transistor 1> As transistor 1, an OS transistor was fabricated.

[0506] First, a 100 nm thick tungsten film was formed on the substrate by sputtering, and this was processed to form a first conductive layer. Next, a first insulating layer was formed on the substrate and on the first conductive layer by plasma CVD. The first insulating layer had a laminated structure consisting of a 120 nm thick silicon nitride film and a 150 nm thick silicon oxynitride film.

[0507] Next, a heat treatment was performed at 350°C for 10 minutes.

[0508] Next, a 25 nm thick metal oxide film was deposited on the first insulating layer, and this was processed to obtain a semiconductor layer. Sputtering was used to deposit the metal oxide film, and a metal oxide with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1 was used as the target.

[0509] Next, a heat treatment was performed at 340 °C for 2 hours.

[0510] Next, a silicon oxynitride film with a thickness of 140 nm was formed as the second insulating layer on the semiconductor layer by plasma CVD method.

[0511] Next, a heat treatment was performed at 340 °C for 1 hour.

[0512] Next, a second conductive layer was formed on the second insulating layer. The second conductive layer had a laminated structure of a titanium layer with a thickness of 50 nm, an aluminum layer with a thickness of 200 nm, and a titanium layer with a thickness of 50 nm.

[0513] Next, a third insulating layer was formed on the second conductive layer, and an opening reaching the semiconductor layer was provided in the third insulating layer. A conductive layer functioning as a source electrode and a drain electrode was formed so as to fill the opening.

[0514] Through the above steps, an OS transistor formed on a glass substrate was obtained.

[0515] <Fabrication of Transistor 2 and Transistor 3> As Transistor 2 and Transistor 3, transistors using LTPS were fabricated. The thickness of LTPS was set to 50 nm. Also, silicon oxynitride was used as the gate insulating layer, and the thickness was set to 110 nm. Further, the transistor had a top-gate structure and a configuration with a back gate. Silicon oxynitride with a thickness of 140 nm was provided on the back gate, silicon oxynitride with a thickness of 100 nm was provided on the silicon oxynitride, and LTPS was provided on the silicon oxynitride. Transistor 2 was an n-channel transistor, and Transistor 3 was a p-channel transistor.

[0516] <Id-Vg Characteristics> Subsequently, the Id-Vg characteristics of the transistors were measured for the samples fabricated above.

[0517] The Id-Vg characteristics of the transistor were measured by applying a voltage to the gate electrode (hereinafter also called gate voltage (Vg)) from -15V to +20V in 0.1V increments (indicated as Pscan in the figure), and then measuring from +20V to -15V in 0.1V increments (indicated as Mscan in the figure). The voltage applied to the source electrode (hereinafter also called source voltage (Vs)) was set to 0V (comm), and the voltage applied to the drain electrode (hereinafter also called drain voltage (Vd)) was set to 0.1V and 10V. The drain current (Id) was measured using 1 × 10⁻¹⁶ units. -3 A was set as the upper limit.

[0518] Here, we measured the Id-Vg characteristics when the same gate voltage was applied to the second gate electrode and the first gate electrode.

[0519] The measurements were performed using transistors with a design channel length of 10 μm and a channel width of 6 μm. For OS transistors, transistors with a design channel length of 6 μm and a channel width of 6 μm were also used.

[0520] The Id-Vg characteristics of each transistor are shown in Figures 22A, 22B, 23A, and 23B, respectively. In each graph, the gate voltage (Vg) is shown on the horizontal axis and the drain current (Id) is shown on the vertical axis. Two Id-Vg characteristics are also shown, one for a drain voltage of 0.1V and another for 10V.

[0521] Figure 22A shows the Id-Vg characteristics of an n-channel OS transistor with a channel length of 10 μm and a channel width of 6 μm, Figure 22B shows the Id-Vg characteristics of an n-channel OS transistor with a channel length of 6 μm and a channel width of 6 μm, Figure 23A shows the Id-Vg characteristics of an n-channel LTPS transistor with a channel length of 10 μm and a channel width of 6 μm, and Figure 22B shows the Id-Vg characteristics of a p-channel LTPS transistor with a channel length of 10 μm and a channel width of 6 μm.

[0522] As shown in Figures 22A and 22B, when using an OS transistor, the difference between the Id-Vg curve when the gate voltage is swept in the positive direction (Pscan) and the Id-Vg curve when the gate voltage is swept in the negative direction (Mscan) is extremely small, indicating that hysteresis can be kept to a minimum. [Explanation of symbols]

[0523] C1: Capacitance, GL: Wiring, EL1: Light-emitting element, ND1: Node, ND2: Node, ND3: Node, PS: Pixel, Px: Pixel, t1: Time, t2: Time, t3: Time, Tr1: Transistor, Tr2: Transistor, Tr3: Transistor, Tr4: Transistor, Tr5: Transistor, Tr6: Transistor, Tr7: Transistor, Va_1: Potential, Vd_1: Potential, Vdata: Wiring, Vdata_1: Signal, Vdd: Wiring, Vem1: Wiring, Vem2: Wiring, Vi_1: Potential, Vini: Wiring, Vscan1: Wiring, Vscan2: Wiring, Vss: Wiring, 10: Display device, 11: Display unit, 12: Drive circuit, 12a: Drive circuit, 12b: Drive circuit, 13: Drive circuit, 31: Shift register circuit, 32: Latch circuit, 33: Latch circuit, 34: Level shifter circuit, 35: DAC circuit, 36: Analog buffer circuit, 37: Source follower circuit, 38: Sampling circuit, 41: Latch circuit section, 42: Level shifter circuit section, 43: DA conversion section, 44: Analog buffer circuit section, 45: Source follower circuit section, 46: Demultiplexer circuit, 51: Pixel circuit, 103: Insulating layer, 106: Conductive layer, 1 08: Semiconductor layer, 108N: Low resistance region, 110: Insulating layer, 112: Conductive layer, 117: Insulating layer, 118: Insulating layer, 139: Region, 201: Transistor, 202: Transistor, 203: Connection layer, 204: Connection part, 205: Transistor, 206: Conductive layer, 208: Semiconductor layer, 208N: Low resistance region, 212: Conductive layer, 215: Insulating layer, 222a: Conductive layer, 222b: Conductive layer, 300: Display device, 300A: Display device, 300B: Display device, 300C: Display device, 301: Layer, 310: Pixel, 310a: Sub-pixel, 310A: Pixel, 310b: Sub-pixel 310B: Pixel, 310c: Sub-pixel, 311a: Conductive layer, 311b: Conductive layer, 311c: Conductive layer, 312a: Conductive layer, 312b: Conductive layer, 312c: Conductive layer, 313a: Layer, 313b: Layer, 313c: Layer, 314: Layer, 315: Common electrode, 317: Light-shielding layer, 318a: Sacrificial layer, 318b: Sacrificial layer, 318c: Sacrificial layer, 319a: Sacrificial layer, 319b: Sacrificial layer, 320: Substrate, 321: Insulating layer, 322: Resin layer, 323: Conductive layer, 324: Insulating layer, 325: Insulating layer, 326a: Conductive layer, 326b: Conductive layer, 326c: Conductive layer, 327: Insulating layer, 328: Layer,330a: Light-emitting device, 330b: Light-emitting device, 330c: Light-emitting device, 331: Protective layer, 334: Gap, 340: Connection part, 342: Adhesive layer, 351: Substrate, 352: Substrate, 362: Display part, 364: Circuit, 365: Wiring, 365a: Conductive layer, 365b: Conductive layer, 366: Conductive layer, 372: FPC, 373: IC, 411: Semiconductor layer, 411i: Channel formation region, 411n: Low resistance region, 412: Insulating layer, 413: Conductive layer, 421a: Conductive layer, 421b: Conductive layer, 772: Lower electric Electrode, 785: Layer, 786: EL layer, 786a: EL layer, 786b: EL layer, 788: Upper electrode, 4411: Light-emitting layer, 4412: Light-emitting layer, 4413: Light-emitting layer, 4420: Layer, 4421: Layer, 4422: Layer, 4430: Layer, 4431: Layer, 4432: Layer, 4440: Charge generation layer, 6500: Electronic device, 6501: Housing, 6502: Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506: Microphone, 6507: Camera, 6508: Light source, 6510: Protective member, 6511 : Display panel, 6512: Optical component, 6513: Touch sensor panel, 6515: FPC, 6516: IC, 6517: Printed circuit board, 6518: Battery, 7000: Display unit, 7100: Television equipment, 7101: Enclosure, 7103: Stand, 7111: Remote control unit, 7200: Notebook personal computer, 7211: Enclosure, 7212: Keyboard, 7213: Pointing device, 7214: External connection port, 7300: Digital signage, 7301: Enclosure, 73 03: Speaker, 7311: Information terminal, 7400: Digital signage, 7401: Pillar, 7411: Information terminal, 9000: Enclosure, 9001: Display unit, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9008: Microphone, 9050: Icon, 9051: Information, 9052: Information, 9053: Information, 9054: Information, 9055: Hinge, 9101: Portable information terminal, 9102: Portable information terminal, 9200: Portable information terminal, 9201: Portable information terminal,

Claims

1. It comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a light-emitting element, a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, a sixth wiring, a seventh wiring, an eighth wiring, a capacitor, and a drive circuit. The gate of the first transistor is electrically connected to the seventh wiring, The gate of the third transistor is electrically connected to the fifth wiring, The gate of the fourth transistor is electrically connected to the sixth wiring, The gate of the fifth transistor is electrically connected to the eighth wiring, The gate of the sixth transistor is electrically connected to the fifth wiring, One electrode of the light-emitting element is electrically connected to one of the source and drain of the first transistor. One electrode of the light-emitting element is electrically connected to either the source or the drain of the sixth transistor. The other electrode of the light-emitting element is electrically connected to the third wiring. The source and drain of the first transistor are electrically connected to one of the source and drain of the second transistor. The gate electrode of the second transistor is electrically connected to either the source or the drain of the third transistor. One of the source and drain of the fourth transistor is electrically connected to one of the source and drain of the second transistor. The source and drain of the fourth transistor are electrically connected to the first wiring. One of the source and drain of the fifth transistor is electrically connected to the other of the source and drain of the second transistor. One of the source and drain of the fifth transistor is electrically connected to the other of the source and drain of the third transistor. The source and the other drain of the fifth transistor are electrically connected to the second wiring. The first electrode of the capacitance is electrically connected to either the source or the drain of the first transistor. The second electrode of the capacitance is electrically connected to the gate of the second transistor. The source and drain of the sixth transistor are electrically connected to the fourth wiring. The first wiring has the function of supplying the video signal output from the drive circuit to the other of the source and drain of the fourth transistor. The semiconductor layer of the second transistor comprises indium, zinc, and element M. The element M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt. The semiconductor layer of the third transistor comprises indium, zinc, and the element M. The semiconductor layer of the second transistor has a ratio of the number of indium atoms to the total number of atoms of indium, zinc, and the element M of 30 atomic percent or more and 100 atomic percent or less. The semiconductor layer of the third transistor has a higher ratio of the number of atoms of element M to the total number of atoms of indium, zinc, and element M than the semiconductor layer of the second transistor. The second transistor has the function of controlling the amount of light emitted by the light-emitting element, Initialization is performed. After the initialization operation, a threshold compensation operation is performed. After the threshold compensation operation, the light emission operation is performed. In the initialization operation, a high-potential signal is applied to the fifth and eighth wirings, and a low-potential signal is applied to the sixth and seventh wirings, The fourth transistor and the first transistor are turned off. The sixth transistor turns on, and a potential Vi_1 is applied from the fourth wiring to one electrode of the light-emitting element. The third transistor and the fifth transistor are turned on, and a potential Vd_1 is applied from the second wiring to the gate electrode of the second transistor, which is turned on. In the threshold compensation operation, a high-potential signal is applied to the fifth and sixth wirings, and a low-potential signal is applied to the seventh and eighth wirings, The fifth transistor is turned off. The first transistor remains in the off state. The sixth transistor remains in the ON state, and the potential Vi_1 is maintained at one electrode of the light-emitting element. The fourth transistor is turned on, and a potential Va_1 is applied from the first wiring to the source and the other drain of the fourth transistor. The third transistor remains in the ON state. The second transistor remains in the ON state, and the gate electrode of the second transistor is supplied with a potential equal to the sum of the potential Va_1 and the threshold potential of the second transistor. In the aforementioned light emission operation, a high-potential signal is applied to the seventh and eighth wirings, and a low-potential signal is applied to the fifth and sixth wirings, The fourth transistor is turned off, and the source and the other drain of the fourth transistor are electrically isolated from the first wiring. The sixth transistor is turned off, and one electrode of the light-emitting element is electrically isolated from the fourth wiring. The third transistor is in the off state, and the gate electrode of the second transistor maintains a potential equal to the sum of the potential Va_1 and the threshold potential of the second transistor. A display device in which the fifth transistor, the second transistor, and the first transistor are turned on, and current flows to the light-emitting element.

2. In claim 1, The second transistor is a display device in which, in Id-Vg measurement, the hysteresis when a round-trip scan is performed in the range of -15V to +20V is 0.1V or less. However, Id is the source-drain current of the second transistor, Vg is the source-gate voltage of the second transistor, and when Vd is the source-drain voltage of the second transistor, Vd is 0.01V to 10V, the measurement interval of Vg is in 0.1V increments, and a hold period of 1 second or less is provided for each measurement of Vg.

3. In claim 1 or 2, A display device in which the semiconductor layer of the second transistor has a higher ratio of the number of indium atoms to the total number of atoms of indium, zinc, and the element M than the semiconductor layer of the third transistor.

4. In claim 1 or 2, The semiconductor layer of the third transistor is a display device in which the ratio of the number of atoms of element M to the number of atoms of the contained metal element is 20 atomic% or more and 60 atomic% or less.

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