Semiconductor devices, display devices, and electronic devices

Abstract

Provided is a semiconductor device having redundancy. The semiconductor device includes a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit. An output terminal of the first drive circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switching circuit. An output terminal of the second drive circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switching circuit.

Description

[Technical Field]

[0001] One aspect of the present invention relates to semiconductor devices, display devices, and electronic devices.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. The technical field of the invention disclosed herein relates to a product, a driving method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. More specifically, examples of the technical field of one aspect of the present invention disclosed herein include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, energy storage devices, imaging devices, memory devices, signal processing devices, processors, electronic devices, systems, methods for driving them, methods for manufacturing them, or methods for testing them. [Background technology]

[0003] For example, there is a demand for display devices applicable to XR applications such as VR (Virtual Reality) or AR (Augmented Reality). Specifically, to enhance realism and immersion, such display devices are desired to have features such as high resolution and high color reproduction.

[0004] Furthermore, examples of devices applicable to this display include liquid crystal displays, organic EL (Electro Luminescence), and light-emitting devices equipped with light-emitting devices such as LEDs. Patent Document 1 also discloses a high-resolution display device that includes an organic EL as a light-emitting device. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] International Publication No. 2019 / 220278 [Overview of the project] [Problems that the invention aims to solve]

[0006] As mentioned above, XR devices require display devices with high display quality. To enhance realism and immersion, the display devices used in XR devices need to have high resolution. In this case, the number of pixels within a given size can be increased by designing the display device to reduce the pitch width between pixels or wiring, or by reducing the size of the pixels. However, when the number of pixels in a display device increases, the amount of data per frame increases, so the speed of the drive circuit that drives the display device (e.g., source driver circuit or gate driver circuit) is required to be increased.

[0007] Furthermore, when the resolution of a display device is increased, the number of pixels contained in the display device increases, which in turn increases the size of the drive circuit that drives the display device. For this reason, it is preferable to reduce the circuit area of ​​the drive circuit in the display device equipped with XR equipment. One way to reduce the circuit area of ​​the drive circuit is to reduce the size of circuit elements such as transistors. However, when the size of circuit elements is reduced, variations in the characteristics of those circuit elements may occur. This can lead to the drive circuit not functioning properly (malfunctions occurring in the drive circuit).

[0008] One aspect of the present invention aims to provide a semiconductor device with reduced power consumption. Or, one aspect of the present invention aims to provide a semiconductor device in which a drive circuit has redundancy. Or, one aspect of the present invention aims to provide a semiconductor device with high yield. Or, one aspect of the present invention aims to provide a novel semiconductor device. Or, one aspect of the present invention aims to provide a display device having any one or more of the above-described semiconductor devices. Or, one aspect of the present invention aims to provide a display device with high display quality. Or, one aspect of the present invention aims to provide an electronic device having any of the above-described display devices.

[0009] Note that the problems of one aspect of the present invention are not limited to the above-listed problems. The above-listed problems do not prevent the existence of other problems. Other problems are those not mentioned in this section described below. Problems not mentioned in this section can be derived by those skilled in the art from the descriptions in the specification, drawings, etc., and can be appropriately extracted from these descriptions. Note that one aspect of the present invention solves at least one of the above-listed problems and other problems. Note that one aspect of the present invention does not necessarily need to solve all of the above-listed problems and other problems.

Means for Solving the Problems

[0010] (1) One aspect of the present invention has a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit. The first drive circuit has a first output terminal, the second drive circuit has a second output terminal, the first selection circuit has an input terminal and an output terminal, the second selection circuit has an input terminal and an output terminal, and the switching circuit has a first terminal and a second terminal. The first output terminal is electrically connected to the input terminal of the first selection circuit and the first terminal, the second output terminal is electrically connected to the input terminal of the second selection circuit and the second terminal. The first drive circuit has a function of generating a first data signal and a function of outputting the first data signal to the first output terminal. The second drive circuit has a function of generating a second data signal and a function of outputting the second data signal to the second output terminal. The first selection circuit has a function of making the connection between the input terminal of the first selection circuit and the output terminal of the first selection circuit either in a conductive state or a non-conductive state. The second selection circuit has a function of making the connection between the input terminal of the second selection circuit and the output terminal of the second selection circuit either in a conductive state or a non-conductive state. The switching circuit has a function of making the connection between the first terminal and the second terminal either in a conductive state or a non-conductive state. It is a semiconductor device.

[0011] (2) Furthermore, in (1) above, the device has the function of operating in a first mode, a second mode, and a third mode, in the first mode, the input terminal of the first selection circuit and the output terminal of the first selection circuit are either conductive or non-conductive, the input terminal of the second selection circuit and the output terminal of the second selection circuit are either conductive or non-conductive, the first terminal and the second terminal are conductive, the first data signal is output via the output terminal of the first drive circuit and to either the output terminal of the first selection circuit or the output terminal of the second selection circuit, and the second data signal is not output to the output terminal of the second drive circuit, in the second mode, the input terminal of the first selection circuit and the output terminal of the first selection circuit are either conductive or non-conductive, and the input terminal of the second selection circuit and the output terminal of the second selection circuit A semiconductor device is preferred in which, in the third mode, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the second selection circuit is made conductive, the connection between the input terminal and the output terminal of the second selection circuit is made conductive, the connection between the input terminal and the output terminal of the second selection circuit is made conductive, the connection between the first terminal and the second terminal is made non-conductive, the connection between the first terminal and the second terminal is made non-conductive, the connection between the first data signal is made conductive, the connection between the first data signal is made conductive, the connection between the first data signal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the second selection circuit is made conductive, the connection between the first data signal and the output terminal of the first first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit is made conductive, the connection between the input terminal and the output terminal of the first selection circuit

[0012] (3) Furthermore, in (1) or (2) above, a semiconductor device is preferred in which the first drive circuit comprises a first signal generation circuit and a first switch, the second drive circuit comprises a second signal generation circuit and a second switch, the switching circuit comprises a third switch, the output terminal of the first signal generation circuit is electrically connected to the first terminal of the first switch, the second terminal of the first switch is electrically connected to the output terminal of the first drive circuit, the output terminal of the second signal generation circuit is electrically connected to the first terminal of the second switch, the second terminal of the second switch is electrically connected to the output terminal of the second drive circuit, the first terminal of the third switch is electrically connected to the first terminal, the second terminal of the third switch is electrically connected to the second terminal, the first signal generation circuit has the function of generating a first data signal, and the second signal generation circuit has the function of generating a second data signal.

[0013] (4) Furthermore, in (3) above, a semiconductor device is preferred in which the first switch, the second switch, and the third switch are all analog switches.

[0014] (5) Furthermore, the present invention relates to a display device comprising any one of the semiconductor devices described in (1) to (4) above, a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to the output terminal of the first selection circuit, and the second pixel circuit is electrically connected to the output terminal of the second selection circuit.

[0015] (6) Another aspect of the present invention comprises a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit, wherein the first drive circuit has a first output terminal, the second drive circuit has a second output terminal, the first selection circuit has an input terminal and a plurality of output terminals, the second selection circuit has an input terminal and a plurality of output terminals, the switching circuit has a first terminal and a second terminal, the first output terminal is electrically connected to the input terminal and first terminal of the first selection circuit, the second output terminal is electrically connected to the input terminal and second terminal of the second selection circuit, the first drive circuit has the function of generating a first data signal and the function of outputting the first data signal to the first output terminal, and the second drive circuit has the function of generating a second data A semiconductor device having a function to generate a signal and a function to output a second data signal to a second output terminal, wherein the first selection circuit has the function of making the connection between the input terminal of the first selection circuit and at least one of the multiple output terminals of the first selection circuit conductive, and the connection between the input terminal of the first selection circuit and each of the remaining multiple output terminals of the first selection circuit non-conductive, the second selection circuit has the function of making the connection between the input terminal of the second selection circuit and at least one of the multiple output terminals of the second selection circuit conductive, and the connection between the input terminal of the second selection circuit and each of the remaining multiple output terminals of the second selection circuit non-conductive, and the switching circuit has the function of making the connection between the first terminal and the second terminal either conductive or non-conductive.

[0016] (7) Furthermore, in (6) above, the device has a function that operates in a first mode, a second mode, and a third mode, and in the first mode, the input terminal of the first selection circuit and one of the multiple output terminals of the first selection circuit are made conductive, the input terminal of the first selection circuit and each of the remaining multiple output terminals of the first selection circuit, and the input terminal of the second selection circuit and each of the remaining multiple output terminals of the second selection circuit are made non-conductive, and the first terminal and the second terminal are made conductive, and the first day The second mode causes the data signal to be output via the output terminal of the first drive circuit and to one of the multiple output terminals of the first selection circuit or one of the multiple output terminals of the second selection circuit, while the second data signal is not output to the output terminal of the second drive circuit. The second mode causes conductivity between the input terminal of the first selection circuit and one of the multiple output terminals of the first selection circuit, or between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit, and between the input terminal of the first selection circuit and each of the remaining multiple output terminals of the first selection circuit, and between the input terminal of the second selection circuit and the second selection circuit. In the third mode, the remaining connections between each of the multiple output terminals are made non-conductive, and the connection between the first terminal and the second terminal is made conductive, so that the first data signal is not output to the output terminal of the first drive circuit, and the second data signal is output via the output terminal of the second drive circuit to one of the multiple output terminals of the first selection circuit or one of the multiple output terminals of the second selection circuit, and the input terminal of the first selection circuit and each of the remaining multiple output terminals of the first selection circuit are made conductive, and A semiconductor device is preferred in which the connection between the terminals is made non-conductive, the connection between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit is made conductive, the connection between the input terminal of the second selection circuit and each of the remaining multiple output terminals of the second selection circuit is made non-conductive, the connection between the first terminal and the second terminal is made non-conductive, the first data signal is output via the output terminal of the first drive circuit and to one of the multiple output terminals of the first selection circuit, and the second data signal is output via the output terminal of the second drive circuit and to one of the multiple output terminals of the second selection circuit.

[0017] (8) Furthermore, in (6) or (7) above, a semiconductor device is preferred in which the first drive circuit comprises a first signal generation circuit and a first switch, the second drive circuit comprises a second signal generation circuit and a second switch, the switching circuit comprises a third switch, the output terminal of the first signal generation circuit is electrically connected to the first terminal of the first switch, the second terminal of the first switch is electrically connected to the output terminal of the first drive circuit, the output terminal of the second signal generation circuit is electrically connected to the first terminal of the second switch, the second terminal of the second switch is electrically connected to the output terminal of the second drive circuit, the first terminal of the third switch is electrically connected to the first terminal, the second terminal of the third switch is electrically connected to the second terminal, the first signal generation circuit has the function of generating a first data signal, and the second signal generation circuit has the function of generating a second data signal.

[0018] (9) Furthermore, in (8) above, a semiconductor device is preferred in which the first switch, the second switch, and the third switch are all analog switches.

[0019] (10) Furthermore, the present invention relates to a display device comprising any one of the semiconductor devices described in (6) to (9) above, a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to at least one of the multiple output terminals of the first selection circuit, and the second pixel circuit is electrically connected to at least one of the multiple output terminals of the second selection circuit.

[0020] (11) Furthermore, the present invention relates to a display device comprising any one of the semiconductor devices described in (6) to (9) above, a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to all of the multiple output terminals of the first selection circuit, and the second pixel circuit is electrically connected to all of the multiple output terminals of the second selection circuit.

[0021] (12) Furthermore, it is an electronic device having the display device described in (5), (10), or (11) above, and a housing.

[0022] In this specification, a semiconductor device refers to a device that utilizes semiconductor properties, such as a circuit containing semiconductor elements (e.g., transistors, diodes, or photodiodes), or a device having such a circuit. It also refers to any device that can function by utilizing semiconductor properties. For example, integrated circuits, chips equipped with integrated circuits, or electronic components in which chips are housed in packages are examples of semiconductor devices. Furthermore, for example, memory devices, display devices, light-emitting devices, lighting devices, or electronic devices may themselves be semiconductor devices or may contain semiconductor devices.

[0023] Furthermore, where it is stated in this specification that X and Y are connected, this specification discloses the cases in which X and Y are electrically connected, functionally connected, and directly connected. Therefore, it is not limited to predetermined connection relationships, such as those shown in the figures or text, but also includes connection relationships other than those shown in the figures or text. X and Y are, respectively, objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, or layers).

[0024] One example of a case where X and Y are electrically connected is that one or more elements that enable the electrical connection between X and Y (e.g., switches, transistors, capacitive elements, inductors, resistors, diodes, display devices, light-emitting devices, or loads) can be connected between X and Y. A switch has the function of controlling whether it is in an on state or an off state. In other words, a switch has the function of being in a conductive state (on state) or a non-conductive state (off state), and controlling whether or not current flows.

[0025] One example of a functionally connected X and Y is when one or more circuits that enable the functional connection between X and Y (e.g., logic circuits (e.g., inverters, NAND gates, or NOR gates), signal conversion circuits (e.g., digital-to-analog conversion circuits, analog-to-digital conversion circuits, or gamma correction circuits), potential level conversion circuits (e.g., power supply circuits (e.g., boost circuits, or buck circuits), or level shifter circuits that change the potential level of a signal), voltage sources, current sources, switching circuits, amplification circuits (e.g., circuits that can increase signal amplitude or current, such as operational amplifiers, differential amplifiers, source follower circuits, or buffer circuits), signal generation circuits, memory circuits, or control circuits) can be connected between X and Y. Note that, as an example, even if another circuit is placed between X and Y, if a signal output from X is transmitted to Y, X and Y are considered functionally connected.

[0026] Furthermore, when it is explicitly stated that X and Y are electrically connected, this includes both cases where X and Y are electrically connected (i.e., connected with another element or circuit in between) and cases where X and Y are directly connected (i.e., connected without another element or circuit in between).

[0027] Furthermore, it can be expressed as, for example, "X, Y, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and the connection is in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Alternatively, it can be expressed as, "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Alternatively, it can be expressed as, "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using similar notation to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and their technical scope determined. Note that these notational methods are examples only and are not limited to them. Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, or layers, etc.).

[0028] Even if independent components are shown as electrically connected in a circuit diagram, a single component may possess the functions of multiple components. For example, if part of a wiring also functions as an electrode, a single conductive film possesses the functions of both the wiring and the electrode. Therefore, in this specification, "electrically connected" includes cases where a single conductive film possesses the functions of multiple components.

[0029] Furthermore, in this specification, "resistive element" can refer to, for example, a circuit element or wiring having a resistance value higher than 0Ω. Therefore, in this specification, "resistive element" includes, for example, wiring having a resistance value, a transistor, diode, or coil through which current flows between the source and drain. Therefore, the term "resistive element" may be replaced with terms such as "resistance," "load," or "region having a resistance value." Conversely, the terms "resistance," "load," or "region having a resistance value" may be replaced with terms such as "resistive element." The resistance value can be, for example, preferably 1mΩ or more and 10Ω or less, more preferably 5mΩ or more and 5Ω or less, and even more preferably 10mΩ or more and 1Ω or less. Also, for example, 1Ω or more and 1 × 10 9 It may also be less than or equal to Ω.

[0030] Furthermore, in this specification, "capacitive element" may refer to, for example, a circuit element having a capacitance value higher than 0F, a region of wiring having a capacitance value higher than 0F, parasitic capacitance, or the gate capacitance of a transistor. Also, terms such as "capacitive element," "parasitic capacitance," or "gate capacitance" may be replaced with terms such as "capacitance." Conversely, the term "capacitance" may be replaced with terms such as "capacitive element," "parasitic capacitance," or "gate capacitance." In addition, the term "pair of electrodes" in relation to "capacitance" may be replaced with terms such as "pair of conductors," "pair of conductive regions," or "pair of regions." The capacitance value may be, for example, 0.05fF or more and 10pF or less. Alternatively, it may be, for example, 1pF or more and 10μF or less.

[0031] Furthermore, in this specification, a transistor has three terminals called the gate, source, and drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as either the source or the drain are the input and output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel or p-channel) and the potential applied to the three terminals of the transistor, one of the two input and output terminals becomes the source and the other becomes the drain. For this reason, in this specification, the terms "source" and "drain" may be interchangeable. Also, in this specification, when describing the connection relationships of a transistor, the notation "one of the source or drain" (or the first electrode or first terminal) or "the other of the source or drain" (or the second electrode or second terminal) is used. Depending on the structure of the transistor, in addition to the three terminals described above, there may be a back gate. In this case, in this specification, one of the gate or back gate of the transistor may be called the first gate, and the other of the gate or back gate of the transistor may be called the second gate. Furthermore, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, in this specification, each gate may be referred to as, for example, the first gate, the second gate, or the third gate.

[0032] For example, in this specification, a transistor can be a multi-gate transistor with two or more gate electrodes. In a multi-gate transistor, the channel formation regions are connected in series, resulting in a structure where multiple transistors are connected in series. Therefore, a multi-gate transistor can reduce the off-current and improve the transistor's breakdown voltage (improve reliability). Furthermore, when operating in the saturation region, a multi-gate transistor can obtain a voltage-current characteristic with a flat slope, where the current between the drain and source does not change much even when the voltage between the drain and source changes. A transistor with a flat voltage-current characteristic can realize an ideal current source circuit or an active load with a very high resistance value. As a result, a transistor with a flat voltage-current characteristic can realize, for example, a differential circuit or a current mirror circuit with good characteristics.

[0033] Furthermore, in this specification, when a single circuit element is shown in a circuit diagram, that circuit element may have multiple circuit elements. For example, when one resistor is shown in a circuit diagram, that resistor includes cases where two or more resistors are electrically connected in series. Also, for example, when one capacitor is shown in a circuit diagram, that capacitor includes cases where two or more capacitors are electrically connected in parallel. Also, for example, when one transistor is shown in a circuit diagram, that transistor includes cases where two or more transistors are electrically connected in series and the gates of each transistor are electrically connected to each other. Similarly, for example, when one switch is shown in a circuit diagram, that switch includes cases where two or more transistors are found, and these two or more transistors are electrically connected in series or in parallel and the gates of each transistor are electrically connected to each other.

[0034] Furthermore, in this specification, the term "node" can be replaced with, for example, a terminal, wiring, electrode, conductive layer, conductor, or impurity region, depending on the circuit configuration or device structure. Also, for example, a terminal or wiring can be replaced with a node.

[0035] Furthermore, in this specification, "voltage" and "potential" may be used interchangeably as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be replaced with "potential." Note that the ground potential does not necessarily mean 0V. Also, potential is relative. That is, when the reference potential changes, the potential applied to wiring, the potential applied to a circuit, or the potential output from a circuit also changes.

[0036] Furthermore, in this specification, the terms "high-level potential" and "low-level potential" do not refer to specific potentials. For example, if two wires are both described as "functioning as wires that supply a high-level potential," the high-level potentials provided by each wire do not have to be equal. Similarly, if two wires are both described as "functioning as wires that supply a low-level potential," the low-level potentials provided by each wire do not have to be equal.

[0037] Furthermore, in this specification, "electric current" refers to the phenomenon of electric charge movement (electrical conduction). For example, the statement "electrical conduction of positively charged materials is occurring" can be rephrased as "electrical conduction of negatively charged materials is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "electric current" refers to the phenomenon of electric charge movement (electrical conduction) associated with the movement of carriers. Carriers here include, for example, electrons, holes, anions, cations, or complex ions. Note that carriers differ depending on the system through which the current flows (for example, semiconductors, metals, electrolytes, or in a vacuum). Also, for example, the "direction of current" in wiring is the direction in which positively charged carriers move and is expressed as a positive current quantity. In other words, the direction in which negatively charged carriers move is the opposite direction to the direction of the current and is expressed as a negative current quantity. Therefore, in this specification, if there is no indication of the positive or negative (or direction) of the current, a statement such as "current flows from element A to element B" may be rephrased as "current flows from element B to element A," for example. Similarly, a statement such as "current is input to element A" may be rephrased as "current is output from element A," for example.

[0038] Furthermore, in this specification, the ordinal numbers "first," "second," or "third" are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "first" in one embodiment of this specification may be referred to as "second" in another embodiment or in the claims. Also, for example, a constituent element referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0039] Furthermore, in this specification, phrases indicating placement, such as "above" or "below," are sometimes used for convenience to explain the positional relationship between components with reference to the drawings. The positional relationship between components also changes depending on the direction in which each component is depicted. Therefore, the phrases indicating placement described in this specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0040] Furthermore, the terms "above" or "below" do not limit the positional relationship of the components to being directly above or below each other and in direct contact. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0041] Furthermore, in this specification, terms such as "row" or "column" may be used to describe the matrix-like arrangement of components and their positional relationships. The positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, terms such as "row" or "column" used in this specification are not limited to these and can be appropriately rephrased depending on the situation. For example, the expression "row direction" may be rephrased as "column direction" by rotating the orientation of the diagram shown by 90 degrees.

[0042] Furthermore, in this specification, terms such as "film" or "layer" may be interchangeable depending on the context. For example, the term "conductive layer" may be changed to the term "conductive film." For example, the term "insulating film" may be changed to the term "insulating layer." Also, terms such as "film" or "layer" may be replaced with other terms depending on the context, without using those terms. For example, the terms "conductive layer" or "conductive film" may be changed to the term "conductor." For example, the terms "insulating layer" or "insulating film" may be changed to the term "insulator."

[0043] Furthermore, in this specification, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" also include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, "electrode" can be part of "wiring" or "terminal." Also, for example, "terminal" can be part of "wiring" or "electrode." In addition, terms such as "electrode," "wiring," or "terminal" may be replaced with terms such as "region."

[0044] Furthermore, in this specification, terms such as "wiring," "signal line," or "power line" may be interchangeable depending on the context. For example, the term "wiring" may be changed to the term "signal line." Similarly, the term "wiring" may be changed to the term "power line." The same applies in reverse; for example, terms such as "signal line" and "power line" may be changed to the term "wiring." Similarly, terms such as "power line" may be changed to the term "signal line." Similarly, the same applies in reverse; for example, terms such as "signal line" may be changed to the term "power line." Furthermore, the term "potential" applied to wiring may be changed to the term "signal," depending on the context. Similarly, the same applies in reverse; for example, terms such as "signal" may be changed to the term "potential."

[0045] In this specification, semiconductor impurities refer to elements other than the main components that make up the semiconductor layer. For example, elements with a concentration of less than 0.1 atomic percent are impurities. When impurities are present in a semiconductor, for example, the defect level density may increase, the carrier mobility may decrease, or the crystallinity may decrease. When the semiconductor is an oxide semiconductor, impurities that alter the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, or transition metals other than the main components. In particular, examples include hydrogen (which is also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, or nitrogen. Furthermore, when the semiconductor is a silicon layer, impurities that alter the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, or Group 15 elements (however, oxygen and hydrogen are not included).

[0046] In this specification, a switch refers to a device that has the function of controlling whether or not to allow current to flow by being in a conductive (on) state or a non-conductive (off) state. Alternatively, a switch refers to a device that has the function of selecting and switching the path through which current flows. Therefore, a switch may have two or more terminals for conducting current in addition to the control terminal. For example, an electrical switch or a mechanical switch can be used. In other words, a switch is not limited to any particular type, as long as it can control current.

[0047] Examples of electrical switches include transistors (e.g., bipolar transistors or MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, or diode-connected transistors), or logic circuits combining these. When a transistor is used as a switch, the "conducting state" of the transistor refers to a state where the source and drain electrodes of the transistor can be considered electrically short-circuited, or a state where current can flow between the source and drain electrodes. Conversely, the "non-conducting state" of the transistor refers to a state where the source and drain electrodes of the transistor can be considered electrically disconnected. When a transistor is used simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0048] One example of a mechanical switch is a switch using MEMS (Micro-Electro-Mechanical Systems) technology. This switch has mechanically movable electrodes, and operates by controlling the state of conduction and non-conductivity through the movement of these electrodes.

[0049] In this specification, a structure in which different light-emitting layers are created for each color of light-emitting device (here, blue (B), green (G), and red (R)), or a structure in which different light-emitting layers are painted, may be referred to as an SBS (Side By Side) structure. Also, in this specification, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (for example, a color filter) to realize a full-color display device.

[0050] Furthermore, light-emitting devices can be broadly classified into single structures and tandem structures. A single-structure device has one light-emitting unit between a pair of electrodes. It is preferable that the light-emitting unit includes one or more light-emitting layers. When obtaining white light emission using two light-emitting layers, the light-emitting layers should be selected such that the colors of the light emitted by each of the two light-emitting layers are complementary colors. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary colors, the light-emitting device as a whole can be configured to emit white light. Also, when obtaining white light emission using three or more light-emitting layers, the light-emitting device as a whole can emit white light by combining the colors of the light emitted by each of the three or more light-emitting layers.

[0051] A tandem device has two or more light-emitting units between a pair of electrodes. Preferably, each light-emitting unit includes one or more light-emitting layers. To obtain white light emission, the tandem device can be configured such that the colors of the light emitted from each light-emitting layer of the multiple light-emitting units combine to produce white light emission. The configuration for obtaining white light emission is the same as that for a single structure. In addition, it is preferable to provide an intermediate layer, such as a charge generation layer, between the multiple light-emitting units in the tandem device.

[0052] Furthermore, when comparing the above-mentioned white light-emitting devices (single or tandem structure) with light-emitting devices with an SBS structure, the light-emitting devices with an SBS structure can consume less power than the white light-emitting devices. Therefore, in one aspect of the present invention, it is preferable to use a light-emitting device with an SBS structure when it is desirable to keep power consumption low. On the other hand, the manufacturing process for white light-emitting devices is simpler than that for light-emitting devices with an SBS structure. Therefore, in one aspect of the present invention, by suitably using a white light-emitting device, manufacturing costs can be reduced or manufacturing yields can be increased.

[0053] In this specification, "parallel" means a state in which two lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Furthermore, "approximately parallel" or "roughly parallel" means a state in which two lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" means a state in which two lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Furthermore, "approximately perpendicular" or "roughly perpendicular" means a state in which two lines are positioned at an angle of 60° or more and 120° or less. [Effects of the Invention]

[0054] According to one aspect of the present invention, a semiconductor device with reduced power consumption can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device having redundant drive circuits can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device with a high yield can be provided. Alternatively, according to one aspect of the present invention, a novel semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a display device having any one or more of the above-described semiconductor devices can be provided. Alternatively, according to one aspect of the present invention, a display device with high display quality can be provided. Alternatively, according to one aspect of the present invention, an electronic device having any of the above-described display devices can be provided.

[0055] The effects of one aspect of the present invention are not limited to those listed above. The effects listed above do not preclude the existence of other effects. These other effects are those described below and not mentioned in this section. Those not mentioned in this section can be derived from the description in the specification or drawings, etc., by those skilled in the art, and can be appropriately extracted from these descriptions. One aspect of the present invention has at least one of the effects listed above and other effects. Therefore, one aspect of the present invention may, in some cases, not have the effects listed above. [Brief explanation of the drawing]

[0056] Figures 1A to 1C show examples of semiconductor device configurations. Figures 2A and 2B show examples of the operation of a semiconductor device. Figure 3 shows an example of the operation of a semiconductor device. Figures 4A and 4B show examples of the operation of a semiconductor device. Figure 5 shows an example of the operation of a semiconductor device. Figures 6A and 6B show examples of the operation of a semiconductor device. Figures 7A and 7B show examples of the operation of a semiconductor device. Figure 8 shows an example of a semiconductor device configuration. Figure 9 shows an example of the configuration of a semiconductor device. Figure 10 shows an example of a semiconductor device configuration. Figure 11 shows an example of the operation of a semiconductor device. Figure 12 shows an example of the operation of a semiconductor device. Figure 13 shows an example of the operation of a semiconductor device. Figure 14 shows an example of the operation of a semiconductor device. Figure 15 shows an example of the configuration of a semiconductor device. Figures 16A to 16H illustrate examples of the configuration of a display device. Figures 17A to 17D illustrate an example of the circuit configuration of pixel 230. Figures 18A to 18D illustrate examples of the configuration of a light-emitting element. Figures 19A to 19D show examples of display device configurations. Figures 20A to 20D show examples of display device configurations. Figures 21A and 21B are perspective views of the display device. Figure 22 is a cross-sectional view showing an example of a display device. Figure 23 is a cross-sectional view showing an example of a display device. Figure 24 is a cross-sectional view showing an example of a display device. Figure 25 is a cross-sectional view showing an example of a display device. Figure 26A is a top view showing an example of a transistor configuration. Figures 26B and 26C are cross-sectional views showing an example of a transistor configuration. Figure 27A illustrates the classification of IGZO crystal structures. Figure 27B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 27C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. Figures 28A to 28F illustrate an example of an electronic device. Figures 29A to 29F illustrate an example of an electronic device. Figures 30A and 30B illustrate an example of an electronic device. Figure 31 is a diagram illustrating an example of an electronic device. [Modes for carrying out the invention]

[0057] In this specification, "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into, for example, oxide insulators, oxide conductors (including transparent oxide conductors), or oxide semiconductors (also called oxide semiconductors or simply OS). For example, if a metal oxide is included in the channel formation region of a transistor, that metal oxide may be referred to as an oxide semiconductor. In other words, when a metal oxide is used to constitute the channel formation region of a transistor having at least one of amplification, rectification, and switching functions, that metal oxide can be referred to as a metal oxide semiconductor. Furthermore, the term "OS transistor" can be replaced with "a transistor having a metal oxide or oxide semiconductor."

[0058] Furthermore, in this specification, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Additionally, metal oxides containing nitrogen may be called metal oxynitrides.

[0059] Furthermore, in this specification, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Also, if multiple configuration examples are shown within one embodiment, these configuration examples can be appropriately combined with each other.

[0060] Furthermore, the content described in one embodiment (even if only a part of it) can be applied, combined with, or substituted for at least one of the contents described in another embodiment (even if only a part of it) and the contents described in one or more other embodiments (even if only a part of it).

[0061] The content described in the embodiments refers to the content described using various figures or the content described using text in the specification in each embodiment.

[0062] Furthermore, a diagram (even a part of it) described in one embodiment can be combined with at least one other diagram (even a part of it) described in the same embodiment, and one or more other diagrams (even a part of them) described in different embodiments, to form many more diagrams.

[0063] The embodiments described herein are explained with reference to the drawings. However, the embodiments can be implemented in many different ways. Therefore, it will be easily understood by those skilled in the art that their form and details can be modified in various ways without departing from the spirit and scope. Accordingly, the present invention is not to be construed as being limited to the contents described in the embodiments. In addition, in the configuration of the invention in the embodiments, the same reference numerals are used in common across different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. Furthermore, in order to ensure clarity of the drawings, for example, in perspective views, the description of some components may be omitted.

[0064] In this specification, when the same reference numeral is used for multiple elements, and especially when it is necessary to distinguish them, an identifying numeral such as "_1", "[n]", or "[m,n]" may be added to the reference numeral. Also, in drawings, for example, when an identifying numeral such as "_1", "[n]", or "[m,n]" is added to a reference numeral, the identifying numeral may be omitted in this specification if it is not necessary to distinguish them.

[0065] Furthermore, in the drawings of this specification, sizes, layer thicknesses, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to their scale. Moreover, the drawings are schematic representations of ideal examples and are not limited to, for example, the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0066] Furthermore, in this specification, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" also include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, "electrode" can be part of "wiring" or "terminal." Also, for example, "terminal" can be part of "wiring" or "electrode." In addition, terms such as "electrode," "wiring," or "terminal" may be replaced with terms such as "region."

[0067] (Embodiment 1) This embodiment describes a semiconductor device according to one aspect of the present invention.

[0068] Figure 1A is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. The circuit 100A shown in Figure 1A includes a drive circuit 111, a drive circuit 112, a switching circuit 121, a selection circuit 131A, and a selection circuit 132A. The output terminal 111-O of the drive circuit 111 is electrically connected to the input terminal 131A-I of the selection circuit 131A. The output terminal 112-O of the drive circuit 112 is electrically connected to the input terminal 132A-I of the selection circuit 132A. The first terminal 121-1 of the switching circuit 121 is electrically connected to the input terminal 131A-I of the selection circuit 131A. The second terminal 121-2 of the switching circuit 121 is electrically connected to the input terminal 132A-I of the selection circuit 132A.

[0069] The drive circuit 111 includes a signal generation circuit SG1 and a switch SW1. The output terminal of the signal generation circuit SG1 is electrically connected to the first terminal of the switch SW1. The second terminal of the switch SW1 is electrically connected to the output terminal 111-O of the drive circuit 111. The control terminal of the switch SW1 is electrically connected to the output terminal of INV0, which will be described later. The signal generation circuit SG1 has the function of generating a first data signal.

[0070] The drive circuit 112 includes a signal generation circuit SG2 and a switch SW2. The output terminal of the signal generation circuit SG2 is electrically connected to the first terminal of the switch SW2. The second terminal of the switch SW2 is electrically connected to the output terminal 112-O of the drive circuit 112. The control terminal of the switch SW2 is electrically connected to the output terminal of INV1, which will be described later. The signal generation circuit SG2 has the function of generating a second data signal.

[0071] The switching circuit 121 has a switch SC1. The first terminal of switch SC1 is electrically connected to the first terminal 121-1 of the switching circuit 121. The second terminal of switch SC1 is electrically connected to the second terminal 121-2 of the switching circuit 121. Also, in Figure 1A, the control terminal of switch SC1 is electrically connected to terminal CHG1.

[0072] Switches SW1, SW2, and SC1 can each be, for example, analog switches. Alternatively, each of switches SW1, SW2, and SC1 may be a transistor consisting of one or more transistors. Furthermore, each of switches SW1, SW2, and SC1 may be a mechanical switch such as a MEMS. In this example, it is assumed that each of switches SW1, SW2, and SC1 is an analog switch. Moreover, each of switches SW1, SW2, and SC1 is assumed to be ON when a high-level potential is applied to the control terminal and OFF when a low-level potential is applied to the control terminal.

[0073] Furthermore, a semiconductor device according to one aspect of the present invention can use transistors containing various semiconductors. For example, a semiconductor device according to one aspect of the present invention can use transistors containing a single-crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel-forming region. The semiconductor is not limited to a single-element semiconductor whose main component is a single element (e.g., silicon (Si) or germanium (Ge)). The semiconductor can be, for example, a compound semiconductor (e.g., silicon-germanium (SiGe) or gallium arsenide (GaAs)) or an oxide semiconductor.

[0074] Figure 1B is a circuit diagram of analog switches applicable to switches SW1, SW2, and SC1. Each of the analog switches shown in Figure 1B has an n-channel transistor Trnsw, a p-channel transistor Trpsw, and an inverter INVsw. The analog switch can be made conductive between terminals 141 and 142 by supplying a high-level potential to terminal 143, for example. Conversely, it can be made non-conductive between terminals 141 and 142 by supplying a low-level potential to terminal 143, for example. For example, the first terminals of switches SW1, SW2, and SC1 correspond to terminal 141 in Figure 1B. Also, for example, the second terminals of switches SW1, SW2, and SC1 correspond to terminal 142 in Figure 1B. Also, for example, the control terminals of switches SW1, SW2, and SC1 correspond to terminal 143 in Figure 1B.

[0075] Furthermore, it is preferable that the values ​​of the high-level potential and the low-level potential be such that the potential difference between the high-level potential and the low-level potential is greater than the threshold voltages of the n-channel transistor Trnsw and the p-channel transistor Trpsw, respectively.

[0076] The potential of terminal STB0 is input to the drive circuit 111 via inverter INV0. For example, supplying a high-level potential to terminal STB0 puts the signal generation circuit SG1 into standby mode and turns switch SW1 off. Alternatively, supplying a low-level potential to terminal STB0 activates the signal generation circuit SG1 and turns switch SW1 on.

[0077] The potential of terminal STB1 is input to the drive circuit 112 via inverter INV1. For example, supplying a high-level potential to terminal STB1 puts the signal generation circuit SG2 into standby mode and turns switch SW2 off. Alternatively, supplying a low-level potential to terminal STB1 activates the signal generation circuit SG2 and turns switch SW2 on.

[0078] The potential of terminal CHG1 is input to the switching circuit 121. For example, supplying a high-level potential to terminal CHG1 turns switch SC1 ON. Conversely, supplying a low-level potential to terminal CHG1 turns switch SC1 OFF.

[0079] The potential of terminal CHG1 can be determined based on the potentials of terminals STB0 and STB1, respectively. For example, the signal supplied to terminal CHG1 can be a signal generated by the exclusive OR of the signal supplied to terminal STB0 and the signal supplied to terminal STB1. Therefore, a circuit that performs the exclusive OR operation may be provided inside or outside circuit 100A. Figure 1A shows an example in which the XOR circuit that performs the exclusive OR operation is provided outside circuit 100A.

[0080] Figure 1C is a block diagram showing example configurations of signal generation circuits SG1 and SG2. The signal generation circuits shown in Figure 1C include a pass transistor logic circuit PTL and an amplifier AMP. The amplifier AMP also has terminal 152 as an output terminal and terminal 154 as a terminal for inputting signals to control the operating state.

[0081] The output terminal of the pass transistor logic circuit (PTL) is electrically connected to the input terminal of the amplifier (AMP).

[0082] The pass transistor logic circuit (PTL) has the function of converting a digital video data signal into an analog video data signal and outputting it to the output terminal of the pass transistor logic circuit (PTL).

[0083] The amplifier (AMP) has the function of amplifying the analog video data signal input to the input terminal of the amplifier (AMP) and outputting it to terminal 152.

[0084] The amplifier (AMP) has a function to control its operating state according to the signal input to terminal 154. For example, supplying a high-level potential to terminal 154 activates the amplifier (AMP), enabling its function to output the amplified analog video data signal to terminal 152. Conversely, supplying a low-level potential to terminal 154 stops the amplifier (AMP) from operating, disabling its function to output a signal to terminal 152. Thus, the steady-state current flowing through the amplifier (AMP) can be stopped.

[0085] During the operation of drive circuits 111 and 112, signal generation circuits SG1 and SG2 each take on either an active or standby state, depending on the potential input to terminal 154, for example. The active state is, for example, a state in which an analog video data signal is supplied to terminal 152 by amplifier AMP when a high-level potential is input to terminal 154. The standby state is, for example, a state in which the operation of amplifier AMP is stopped and the supply of analog video data signals to terminal 152 is cut off when a low-level potential is input to terminal 154.

[0086] <Example of Selection Circuit Configuration 1> In addition, a selection circuit in a semiconductor device according to one embodiment of the present invention may have one or more switches. Figure 1A shows an example in which each of selection circuits 131A and 132A has one switch.

[0087] The selection circuit 131A has a switch SE1. The first terminal of switch SE1 is electrically connected to the input terminal 131A-I of the selection circuit 131A. The second terminal of switch SE1 is electrically connected to terminal SL1. In Figure 1A, the control terminal of switch SE1 is electrically connected to terminal SEL1.

[0088] The selection circuit 132A has a switch SE2. The first terminal of switch SE2 is electrically connected to the input terminal 132A-I of the selection circuit 132A. The second terminal of switch SE2 is electrically connected to terminal SL2. Also, in Figure 1A, the control terminal of switch SE2 is electrically connected to terminal SEL2.

[0089] The potential of terminal SEL1 is input to the selection circuit 131A. For example, by supplying a high-level potential to terminal SEL1, a conductive state is created between the input terminal 131A-I of the selection circuit 131A and terminal SL1. Conversely, by supplying a low-level potential to terminal SEL1, a non-conductive state is created between the input terminal 131A-I of the selection circuit 131A and terminal SL1.

[0090] The potential of terminal SEL2 is input to the selection circuit 132A. For example, by supplying a high-level potential to terminal SEL2, a conductive state is created between the input terminal 132A-I of the selection circuit 132A and terminal SL2. Conversely, by supplying a low-level potential to terminal SEL2, a non-conductive state is created between the input terminal 132A-I of the selection circuit 132A and terminal SL2.

[0091] Switches SE1 and SE2 can use the same switches as those used for switches SW1, SW2, and SC1, as described above.

[0092] Circuit 100A may be electrically connected to the pixel circuits. Figure 1A shows an example in which circuit 100A is electrically connected to pixel circuits PX1 and PX2. Pixel circuit PX1 is electrically connected to circuit 100A via terminal SL1. Pixel circuit PX2 is also electrically connected to circuit 100A via terminal SL2.

[0093] <Example of operating mode configuration 1> Circuit 100A can operate by switching between multiple modes depending on the situation. Examples of these modes include normal operation mode, redundant operation mode, and high-speed operation mode.

[0094] The normal operation mode is a mode in which the first data signal generated by the signal generation circuit SG1 is supplied to either terminal SL1 or terminal SL2. The redundant operation mode is a mode in which the second data signal generated by the signal generation circuit SG2 is supplied to either terminal SL1 or terminal SL2. The high-speed operation mode is a mode in which the first data signal generated by the signal generation circuit SG1 is supplied to terminal SL1, and the second data signal generated by the signal generation circuit SG2 is supplied to terminal SL2.

[0095] Although not shown in Figure 1A, the circuit shown in Figure 1A may be configured to include a logic circuit outside of circuit 100A, supplying signals generated by the logic circuit to terminals STB0 and STB1, respectively. Furthermore, it is preferable that the logic circuit has the function of supplying potentials corresponding to the normal operation mode, redundant operation mode, and high-speed operation mode to terminals STB0, STB1, and CHG1, respectively. The logic circuit may be switched to any one of the normal operation mode, redundant operation mode, and high-speed operation mode depending on the situation by changing the setting parameters within the logic circuit.

[0096] Next, we will describe the normal operation mode, redundant operation mode, and high-speed operation mode in detail.

[0097] [Example of operation in normal mode 1] Figures 2A and 2B are block diagrams illustrating the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in the normal operating mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 2A shows the driving state of circuit 100A during the first period. Figure 2B shows the driving state of circuit 100A during the second period.

[0098] In normal operation mode, a low-level potential is supplied to terminal STB0 and a high-level potential is supplied to terminal STB1. This turns switch SW1 ON, switch SW2 OFF, and switch SC1 ON. Additionally, when signal generation circuit SG1 becomes active, the first data signal is supplied to the output terminal of signal generation circuit SG1. Furthermore, when signal generation circuit SG2 enters standby mode, the supply of data signals to the output terminal of signal generation circuit SG2 is cut off.

[0099] Figure 3 is an example of a timing chart illustrating the potential state supplied to terminals SL1 and SL2 in the normal operating mode. In the timing chart of Figure 3, the potential state during the first period shown in Figure 2A is shown in period T1, and the potential state during the second period shown in Figure 2B is shown in period T2. In addition, the potential state of the output terminals of signal generation circuits SG1 and SG2 is shown in SG1_O and SG2_O, respectively.

[0100] In Figures 2A, 2B, and 3, the first data signal generated by the signal generation circuit SG1 during the first period is shown as data signal D1_1, and the first data signal generated by the signal generation circuit SG1 during the second period is shown as data signal D1_2. Also, in Figure 3, in the normal operating mode, the supply of data signals to the output terminal of the signal generation circuit SG2 is cut off, so the potential state SG2_O at the output terminal of the signal generation circuit SG2 is shown as a dashed line.

[0101] In normal operation mode, the first data signal generated by the signal generation circuit SG1 is supplied to either terminal SL1 or terminal SL2. For example, in the first period shown in period T1 in Figures 2A and 3, a high-level potential is supplied to terminal SEL1 and a low-level potential is supplied to terminal SEL2. As a result, the potential of terminal SL2 is maintained at the potential of the previous period, and data signal D1_1 is supplied to terminal SL1. Also, for example, in the second period shown in period T2 in Figures 2B and 3, a low-level potential is supplied to terminal SEL1 and a high-level potential is supplied to terminal SEL2. As a result, the potential of terminal SL1 is maintained at the potential of the previous period, and data signal D1_2 is supplied to terminal SL2.

[0102] In normal operation mode, circuit 100A can stop the operation of the amplifier AMP of the signal generation circuit SG2 by putting the signal generation circuit SG2 into standby mode. By doing so, circuit 100A can stop the steady current of the amplifier AMP. Therefore, a semiconductor device according to one aspect of the present invention can reduce power consumption.

[0103] [Example of operation in redundant mode 1] Figures 4A and 4B are block diagrams illustrating the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in redundant operation mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 4A shows the operating state of circuit 100A during the first period. Figure 4B shows the operating state of circuit 100A during the second period.

[0104] In redundant operation mode, a high-level potential is supplied to terminal STB0 and a low-level potential is supplied to terminal STB1. This causes switch SW1 to turn off, switch SW2 to turn on, and switch SC1 to turn on. Additionally, when signal generation circuit SG1 enters a standby state, the supply of data signals to the output terminal of signal generation circuit SG1 is cut off. Furthermore, when signal generation circuit SG2 enters an active state, a second data signal is supplied to the output terminal of signal generation circuit SG2.

[0105] Figure 5 is an example of a timing chart illustrating the potential state supplied to terminals SL1 and SL2 in redundant operation mode. In the timing chart of Figure 5, the potential state during the first period shown in Figure 4A is shown in period T1, and the potential state during the second period shown in Figure 4B is shown in period T2. In addition, the potential state of the output terminals of signal generation circuits SG1 and SG2 is shown in SG1_O and SG2_O, respectively.

[0106] In Figures 4A, 4B, and 5, the second data signal generated by the signal generation circuit SG2 during the first period is shown as data signal D2_1, and the second data signal generated by the signal generation circuit SG2 during the second period is shown as data signal D2_2. Also, in Figure 5, in redundant operation mode, the supply of data signals to the output terminal of the signal generation circuit SG1 is cut off, so the potential state SG1_O at the output terminal of the signal generation circuit SG1 is shown as a dashed line.

[0107] In redundant operation mode, the second data signal generated by the signal generation circuit SG2 is supplied to either terminal SL1 or terminal SL2. For example, in the first period shown in period T1 in Figures 4A and 5, a high-level potential is supplied to terminal SEL1 and a low-level potential is supplied to terminal SEL2. As a result, the potential of terminal SL2 is maintained at the potential of the previous period, and data signal D2_1 is supplied to terminal SL1. Also, for example, in the second period shown in period T2 in Figures 4B and 5, a low-level potential is supplied to terminal SEL1 and a high-level potential is supplied to terminal SEL2. As a result, the potential of terminal SL1 is maintained at the potential of the previous period, and data signal D2_2 is supplied to terminal SL2.

[0108] The redundant operation mode of circuit 100A allows for redundancy in the circuit 100A. In other words, in the normal operation mode, if, for example, a characteristic defect or process defect occurs in some of the circuit elements of circuit 100A, and the signal generation circuit SG1 is unable to output the first data signal normally, circuit 100A can switch to the redundant operation mode. By doing so, circuit 100A can use the second data signal generated by the signal generation circuit SG2. Therefore, the reliability of circuit 100A is improved. Thus, a semiconductor device according to one aspect of the present invention can improve the yield in the manufacture of circuit 100A.

[0109] In this embodiment, Figures 2A, 2B, and 3 are described as the normal mode, and Figures 4A, 4B, and 5 as the redundant mode, but the invention is not limited to this. In one aspect of the present invention, Figures 2A, 2B, and 3 may be described as the redundant mode, and Figures 4A, 4B, and 5 as the normal mode.

[0110] [Example of operation in high-speed mode 1] Figures 6A and 6B are block diagrams illustrating the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in high-speed operation mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 6A shows the driving state of circuit 100A during the first period. Figure 6B shows the driving state of circuit 100A during the second period.

[0111] In high-speed operation mode, a low-level potential is supplied to terminals STB0 and STB1, respectively. This turns on switch SW1, turns on switch SW2, and turns off switch SC1. Additionally, the signal generation circuit SG1 becomes active, supplying the first data signal to its output terminal. Furthermore, the signal generation circuit SG2 becomes active, supplying the second data signal to its output terminal.

[0112] Figure 7A is an example of a timing chart illustrating the potential state supplied to terminals SL1 and SL2 in high-speed operation mode. In the timing chart of Figure 7A, the potential state during the first period shown in Figure 6A is shown in period T1, and the potential state during the second period shown in Figure 6B is shown in period T2. Furthermore, the potential state of the output terminals of signal generation circuits SG1 and SG2 is shown in SG1_O and SG2_O, respectively.

[0113] In Figures 6A, 6B, and 7A, the first data signal generated by the signal generation circuit SG1 during the first period is shown as data signal D1_1, and the second data signal generated by the signal generation circuit SG2 is shown as data signal D2_1. Similarly, the first data signal generated by the signal generation circuit SG1 during the second period is shown as data signal D1_2, and the second data signal generated by the signal generation circuit SG2 is shown as data signal D2_2.

[0114] In high-speed operation mode, the first data signal generated by the signal generation circuit SG1 is supplied to terminal SL1, and the second data signal generated by the signal generation circuit SG2 is supplied to terminal SL2. For example, in the first period shown in period T1 in Figures 6A and 7A, a high-level potential is supplied to terminals SEL1 and SEL2. As a result, data signal D1_1 is supplied to terminal SL1 and data signal D2_1 is supplied to terminal SL2. Also, for example, in the second period shown in period T2 in Figures 6B and 7A, a high-level potential is supplied to terminals SEL1 and SEL2. As a result, data signal D1_2 is supplied to terminal SL1 and data signal D2_2 is supplied to terminal SL2.

[0115] The high-speed operation mode circuit 100A can supply different data signals to terminals SL1 and SL2 simultaneously. Therefore, the high-speed operation mode circuit 100A can supply data signals at a higher speed than the normal operation mode. As a result, a display device to which the high-speed operation mode circuit 100A is applied can improve the frame rate. In other words, a display device using a semiconductor device according to one aspect of the present invention can improve circuit performance. Consequently, a display device using a semiconductor device according to one aspect of the present invention can improve display quality.

[0116] [Example of operation in write rate improvement mode] Furthermore, circuit 100A can operate in a write-rate-enhanced mode as a variation of the high-speed operation mode. Note that the timing charts for circuit 100A differ between the write-rate-enhanced mode and the high-speed operation mode. Also, since the state of each switch and the flow of data signals in circuit 100A are the same as in the high-speed operation mode, the above explanation of the high-speed operation mode can be appropriately considered.

[0117] Figure 7B is an example of a timing chart illustrating the potential state supplied to terminals SL1 and SL2 in the write rate improvement mode. In the timing chart of Figure 7B, the potential state in the first period is shown in period T1, and the potential state in the second period is shown in period T2. In addition, the potential state of the output terminals of signal generation circuits SG1 and SG2 is shown in SG1_O and SG2_O, respectively.

[0118] In the write rate improvement mode, for example, during the first period (period T1) and the second period (period T2) in Figure 7B, a high-level potential is supplied to terminal SEL1 and a high-level potential is supplied to terminal SEL2. As a result, data signal D1_1 is supplied to terminal SL1 and data signal D2_1 is supplied to terminal SL2. In the write rate improvement mode described above, the state of each switch in circuit 100A and the flow of data signals during periods T1 and T2 correspond to Figure 6A.

[0119] The circuit 100A in the write-rate improvement mode can supply data signals over both periods T1 and T2. Therefore, the circuit 100A in the write-rate improvement mode can extend the data signal writing period compared to the normal operation mode. As a result, a display device to which the circuit 100A in the write-rate improvement mode is applied can improve the data signal writing rate. In other words, a display device using a semiconductor device according to one aspect of the present invention can improve circuit performance. Consequently, a display device using a semiconductor device according to one aspect of the present invention can improve display quality.

[0120] <Example 1> It should be noted that the semiconductor device according to one aspect of the present invention is not limited to the configuration example shown in the block diagram of Figure 1A. The semiconductor device according to one aspect of the present invention may be modified as appropriate, as long as it is within the scope of solving the problem.

[0121] Figure 1A shows a configuration in which circuit 100A includes a drive circuit 111, a drive circuit 112, a switching circuit 121, a selection circuit 131A, and a selection circuit 132A, but the invention is not limited to this configuration. One embodiment of the present invention may have a configuration comprising three or more drive circuits, two or more switching circuits, and three or more selection circuits.

[0122] Figure 8 is a block diagram showing an example of a semiconductor device according to one embodiment of the present invention. The circuit 100B shown in Figure 8 includes drive circuits 111 to 113, switching circuits 121 and 122, and selection circuits 131A to 133A. The output terminal 111-O of drive circuit 111 is electrically connected to the input terminal 131A-I of selection circuit 131A. The output terminal 112-O of drive circuit 112 is electrically connected to the input terminal 132A-I of selection circuit 132A. The output terminal 113-O of drive circuit 113 is electrically connected to the input terminal 133A-I of selection circuit 133A. The first terminal 121-1 of switching circuit 121 is electrically connected to the input terminal 131A-I of selection circuit 131A. The second terminal 121-2 of switching circuit 121 is electrically connected to the input terminal 132A-I of selection circuit 132A. The first terminal 122-1 of the switching circuit 122 is electrically connected to the input terminal 132A-I of the selection circuit 132A. The second terminal 122-2 of the switching circuit 122 is electrically connected to the input terminal 133A-I of the selection circuit 133A.

[0123] The configuration of the drive circuit 113 can be the same as that of the drive circuits 111 and 112 described in Figure 1A. The configuration of the switching circuit 122 can be the same as that of the switching circuit 121 described in Figure 1A. The configuration of the selection circuit 133A can be the same as that of the selection circuits 131A and 132A described in Figure 1A.

[0124] The configuration of circuit 100B shown in Figure 8 can further reduce power consumption compared to circuit 100A shown in Figure 1A. Furthermore, the configuration of circuit 100B can provide greater redundancy compared to circuit 100A. Therefore, in one aspect of the present invention, the semiconductor device can improve the yield in the manufacture of circuit 100B through the configuration of circuit 100B. In addition, in a display device using the semiconductor device of one aspect of the present invention, the circuit performance can be improved, such as by improving the frame rate or the write rate, through the configuration of circuit 100B. As a result, the display device using the semiconductor device of one aspect of the present invention can improve the display quality.

[0125] <Example of Selection Circuit Configuration 2> In circuit 100A shown in Figure 1A, each of the selection circuits 131A and 132A had one switch, but this is not limited to this configuration. Here, we will describe an example of the configuration of circuit 100C, where the selection circuits have multiple switches.

[0126] Figure 9 is a block diagram showing an example configuration of circuit 100C. The circuit 100C shown in Figure 9 includes a drive circuit 111, a drive circuit 112, a switching circuit 121, a selection circuit 131C, and a selection circuit 132C. The output terminal 111-O of the drive circuit 111 is electrically connected to the input terminal 131C-I of the selection circuit 131C. The output terminal 112-O of the drive circuit 112 is electrically connected to the input terminal 132C-I of the selection circuit 132C. The first terminal 121-1 of the switching circuit 121 is electrically connected to the input terminal 131C-I of the selection circuit 131C. The second terminal 121-2 of the switching circuit 121 is electrically connected to the input terminal 132C-I of the selection circuit 132C.

[0127] Here, as an example, we will describe the case where each of the selection circuits 131C and 132C has 6 switches. However, the number of switches is not limited to 6, but can be an integer of 2 or more. For example, the number of switches may be determined according to the resolution of the display device using the semiconductor device according to one embodiment of the present invention. Specifically, it is preferable that the number of switches be a number that is divisible when the resolution of the display device is divided by the number of switches. Also, the number of switches included in each of the selection circuits 131C and 132C may be the same or different.

[0128] The selection circuit 131C has switches SE1_1 to SE1_6. The first terminal of each of switches SE1_1 to SE1_6 is electrically connected to the input terminal 131C-I of the selection circuit 131C. The second terminal of each of switches SE1_1 to SE1_6 is electrically connected to terminals SL_1 to SL_6, respectively.

[0129] The selection circuit 132C has switches SE2_1 to SE2_6. The first terminal of each of switches SE2_1 to SE2_6 is electrically connected to the input terminal 132C-I of the selection circuit 132C. The second terminal of each of switches SE2_1 to SE2_6 is electrically connected to terminals SL_7 to SL_12, respectively.

[0130] The selection circuit 131C has the function of turning on at least one of switches SE1_1 to SE1_6 and turning off the remaining switches, as an example. Specifically, the selection circuit 131C can be, for example, a demultiplexer circuit.

[0131] The selection circuit 132C has the function of turning on at least one of switches SE2_1 to SE2_6 and turning off the remaining switches, as an example. Specifically, the selection circuit 132C can be, for example, a demultiplexer circuit.

[0132] Switches SE1_1 through SE1_6 and SE2_1 through SE2_6 can each use a switch applicable to the aforementioned switches SW1, SW2, and SC1.

[0133] Circuit 100C may be electrically connected to the pixel circuits. Figure 9 shows an example in which circuit 100C is electrically connected to pixel circuits PX_1 to PX_6. Each of pixel circuits PX_1 to PX_6 is electrically connected to circuit 100C via terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12, respectively.

[0134] Note that Figure 9 shows an example in which terminals SL_2, SL_4, SL_6, SL_7, SL_9, and SL_11 are not connected to the pixel circuit, but the invention is not limited to this example. In one aspect of the present invention, terminals SL_2, SL_4, SL_6, SL_7, SL_9, and SL_11 may be connected to the pixel circuit.

[0135] Figure 10 is a block diagram showing a semiconductor device according to one embodiment of the present invention. Figure 10 shows an example in which circuit 100C is electrically connected to pixel circuits PX_1 to PX_12. Each of the pixel circuits PX_1 to PX_12 is electrically connected to circuit 100C via terminals SL_1 to SL_12.

[0136] As shown in Figures 9 and 10, in one embodiment of the present invention, the number of pixel circuits connected to circuit 100C is not limited. Therefore, in one aspect of the present invention, the number of pixel circuits connected to circuit 100C can be increased or decreased according to the resolution of the display device without changing the configuration of circuit 100C. In this case, circuit 100C can be operated in a high-resolution mode, which will be described later.

[0137] Although not shown in Figures 9 and 10, to control the operating mode of circuit 100C, inverters such as INV0, INV1, and XOR may be provided outside of circuit 100C, similar to circuit 100A in Figure 1A. For example, the connection configuration of inverters such as INV0, INV1, and XOR can be referenced from the description of circuit 100A in Figure 1A.

[0138] <Example of operating mode configuration 2> Circuit 100C can operate by switching between multiple modes depending on the situation. Examples of these modes include normal operation mode, redundant operation mode, high-speed operation mode, and high-resolution mode.

[0139] In Figure 9, the normal operation mode is the mode in which the first data signal generated by the signal generation circuit SG1 is supplied to one of terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. In Figure 9, the redundant operation mode is the mode in which the second data signal generated by the signal generation circuit SG2 is supplied to one of terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. In Figure 9, the high-speed operation mode is the mode in which the first data signal generated by the signal generation circuit SG1 is supplied to one of terminals SL_1, SL_3, and SL_5, and the second data signal generated by the signal generation circuit SG2 is supplied to one of terminals SL_8, SL_10, and SL_12. The high-resolution mode is a mode in which, as shown in Figure 10, the first data signal generated by the signal generation circuit SG1 is supplied to one of terminals SL_1 to SL_6, and the second data signal generated by the signal generation circuit SG2 is supplied to one of terminals SL_7 to SL_12.

[0140] Next, we will describe in detail the normal operation mode, redundant operation mode, high-speed operation mode, and high-resolution mode.

[0141] [Example of operation in normal mode 2] In normal operation mode, a low-level potential is supplied to terminal STB0 and a high-level potential is supplied to terminal STB1. This turns switch SW1 ON, switch SW2 OFF, and switch SC1 ON. Additionally, when signal generation circuit SG1 becomes active, the first data signal is supplied to the output terminal of signal generation circuit SG1. Furthermore, when signal generation circuit SG2 enters standby mode, the supply of data signals to the output terminal of signal generation circuit SG2 is cut off.

[0142] Figure 11 is an example of a timing chart illustrating the potential states supplied to terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in the normal operating mode. The timing chart in Figure 11 shows the potential states in each of the first to sixth periods, corresponding to periods T1 to T6. In addition, the potential states of the output terminals of signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0143] In Figure 11, the first data signals generated by the signal generation circuit SG1 during each of the first to sixth periods are shown as data signals D1_1 to D1_6, respectively. In the normal operating mode, the supply of data signals to the output terminal of the signal generation circuit SG2 is cut off, so the potential state SG2_O at the output terminal of the signal generation circuit SG2 is shown by a dashed line.

[0144] In normal operation mode, the first data signal generated by the signal generation circuit SG1 is sequentially supplied to one of the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. For example, in Figure 11, during period T1, the selection circuit 131C selects terminal SL_1, and data signal D1_1 is supplied to terminal SL_1. During period T2, the selection circuit 132C selects terminal SL_8, and data signal D1_2 is supplied to terminal SL_8. During period T3, the selection circuit 131C selects terminal SL_3, and data signal D1_3 is supplied to terminal SL_3. During period T4, the selection circuit 132C selects terminal SL_10, and data signal D1_4 is supplied to terminal SL_10. During period T5, the selection circuit 131C selects terminal SL_5, and data signal D1_5 is supplied to terminal SL_5. During period T6, the selection circuit 132C selects terminal SL_12, supplying the data signal D1_6 to terminal SL_12. In the normal operating mode described above, during each of periods T1 through T6, the potentials of terminals other than the terminal selected by the selection circuit 131C are maintained at the potential of the previous period.

[0145] In normal operation mode, circuit 100C can stop the operation of the amplifier AMP of the signal generation circuit SG2 by putting the signal generation circuit SG2 into a standby state. Therefore, a semiconductor device according to one aspect of the present invention can reduce power consumption.

[0146] [Example of operation in redundant mode 2] In redundant operation mode, a high-level potential is supplied to terminal STB0 and a low-level potential is supplied to terminal STB1. This causes switch SW1 to turn off, switch SW2 to turn on, and switch SC1 to turn on. Additionally, when signal generation circuit SG1 enters a standby state, the supply of data signals to the output terminal of signal generation circuit SG1 is cut off. Furthermore, when signal generation circuit SG2 enters an active state, a second data signal is supplied to the output terminal of signal generation circuit SG2.

[0147] Figure 12 is an example of a timing chart illustrating the potential states supplied to terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in redundant operation mode. The timing chart in Figure 12 shows the potential states in each of the first to sixth periods, corresponding to periods T1 to T6. Additionally, the potential states of the output terminals of signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0148] In Figure 12, the second data signals generated by the signal generation circuit SG2 during each of the first to sixth periods are shown as data signals D2_1 to D2_6, respectively. In addition, in redundant operation mode, the supply of data signals to the output terminal of the signal generation circuit SG1 is cut off, so the potential state SG1_O at the output terminal of the signal generation circuit SG1 is shown by a dashed line.

[0149] In redundant operation mode, the second data signal generated by the signal generation circuit SG2 is sequentially supplied to one of the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. For example, in Figure 12, during period T1, the selection circuit 131C selects terminal SL_1, and data signal D2_1 is supplied to terminal SL_1. During period T2, the selection circuit 132C selects terminal SL_8, and data signal D2_2 is supplied to terminal SL_8. During period T3, the selection circuit 131C selects terminal SL_3, and data signal D2_3 is supplied to terminal SL_3. During period T4, the selection circuit 132C selects terminal SL_10, and data signal D2_4 is supplied to terminal SL_10. During period T5, the selection circuit 131C selects terminal SL_5, and data signal D2_5 is supplied to terminal SL_5. During period T6, the selection circuit 132C selects terminal SL_12, and the data signal D2_6 is supplied to terminal SL_12. In the redundant operation mode described above, during each of periods T1 to T6, the potential of terminals other than the terminal selected by the selection circuit 131C is maintained at the potential of the previous period.

[0150] The redundant operation mode of circuit 100C allows for redundancy. In other words, in the normal operation mode, if, for example, a characteristic defect or process defect occurs in some circuit elements of circuit 100A, and the signal generation circuit SG1 is unable to output the first data signal properly, circuit 100C can switch to the redundant operation mode. By doing so, circuit 100C can use the second data signal generated by the signal generation circuit SG2. Therefore, a semiconductor device according to one aspect of the present invention can improve the yield in the manufacturing of circuit 100C.

[0151] In this embodiment, Figure 11 is described as the normal mode and Figure 12 as the redundant mode, but the invention is not limited to this. In one aspect of the present invention, Figure 11 may be described as the redundant mode and Figure 12 as the normal mode.

[0152] [Example of operation in high-speed mode 2] In high-speed operation mode, a low-level potential is supplied to terminals STB0 and STB1, respectively. This turns on switch SW1, turns on switch SW2, and turns off switch SC1. Additionally, the signal generation circuit SG1 becomes active, supplying the first data signal to its output terminal. Furthermore, the signal generation circuit SG2 becomes active, supplying the second data signal to its output terminal.

[0153] Figure 13 is an example of a timing chart illustrating the potential states supplied to terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in high-speed operation mode. The timing chart in Figure 13 shows the potential states for each of the first to sixth periods, corresponding to periods T1 to T6. Additionally, the potential states of the output terminals of signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0154] In Figure 13, the first data signals generated by the signal generation circuit SG1 in each of the first to sixth periods are shown as data signals D1_1 to D1_6, and the second data signals generated by the signal generation circuit SG2 are shown as data signals D2_1 to D2_6.

[0155] In high-speed operation mode, the first data signal generated by the signal generation circuit SG1 is supplied to one of terminals SL_1, SL_3, and SL_5, and the second data signal generated by the signal generation circuit SG2 is supplied to one of terminals SL_8, SL_10, and SL_12. For example, in Figure 13, during period T1, the selection circuit 131C selects terminal SL_1, supplying data signal D1_1 to terminal SL_1, and the selection circuit 132C selects terminal SL_8, supplying data signal D2_1 to terminal SL_8. During period T2, the selection circuit 131C selects terminal SL_3, supplying data signal D1_2 to terminal SL_3, and the selection circuit 132C selects terminal SL_10, supplying data signal D2_2 to terminal SL_10. During period T3, selection circuit 131C selects terminal SL_5, supplying data signal D1_3 to terminal SL_5, and selection circuit 132C selects terminal SL_12, supplying data signal D2_3 to terminal SL_12. During period T4, selection circuit 131C selects terminal SL_1, supplying data signal D1_4 to terminal SL_1, and selection circuit 132C selects terminal SL_8, supplying data signal D2_4 to terminal SL_8. During period T5, selection circuit 131C selects terminal SL_3, supplying data signal D1_5 to terminal SL_3, and selection circuit 132C selects terminal SL_10, supplying data signal D2_5 to terminal SL_10. During period T6, the selection circuit 131C selects terminal SL_5, supplying data signal D1_6 to terminal SL_5, and the selection circuit 132C selects terminal SL_12, supplying data signal D2_6 to terminal SL_12. In the high-speed operation mode described above, during each of periods T1 to T6, the potential of terminals other than the terminal selected by the selection circuit 131C is maintained at the potential of the previous period.

[0156] The high-speed operation mode circuit 100C can supply different data signals to terminals SL_1 and SL_8 simultaneously, and to terminals SL_3 and SL_10 simultaneously, and to terminals SL_5 and SL_12 simultaneously. In other words, the high-speed operation mode circuit 100C can supply data signals to the same number of terminals as the normal operation mode in half the time of the normal operation mode. Therefore, a display device using a semiconductor device according to one aspect of the present invention can improve circuit performance, such as improving the frame rate or the write rate. As a result, a display device using a semiconductor device according to one aspect of the present invention can improve the display quality.

[0157] [Example of operation in high-resolution mode] In high-resolution mode, a low-level potential is supplied to terminals STB0 and STB1, respectively. This turns on switch SW1, switch SW2, and switch SC1. Additionally, the signal generation circuit SG1 becomes active, supplying the first data signal to its output terminal. Furthermore, the signal generation circuit SG2 becomes active, supplying the second data signal to its output terminal.

[0158] Figure 14 is an example of a timing chart illustrating the potential state supplied to terminals SL_1 to SL_12 in high-resolution mode. The timing chart in Figure 14 shows the potential state during each of the first to sixth periods, corresponding to periods T1 to T6. Furthermore, the potential states of the output terminals of signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0159] In Figure 14, the first data signals generated by the signal generation circuit SG1 in each of the first to sixth periods are shown as data signals D1_1 to D1_6, respectively, and the second data signals generated by the signal generation circuit SG2 are shown as data signals D2_1 to D2_6, respectively.

[0160] In high-resolution mode, the first data signal generated by the signal generation circuit SG1 is supplied to one of terminals SL_1 to SL_6, and the second data signal generated by the signal generation circuit SG2 is supplied to one of terminals SL_7 to SL_12. For example, in Figure 14, during period T1, the selection circuit 131C selects terminal SL_1, supplying data signal D1_1 to terminal SL_1, and the selection circuit 132C selects terminal SL_7, supplying data signal D2_1 to terminal SL_7. During period T2, the selection circuit 131C selects terminal SL_2, supplying data signal D1_2 to terminal SL_2, and the selection circuit 132C selects terminal SL_8, supplying data signal D2_2 to terminal SL_8. During period T3, selection circuit 131C selects terminal SL_3, supplying data signal D1_3 to terminal SL_3, and selection circuit 132C selects terminal SL_9, supplying data signal D2_3 to terminal SL_9. During period T4, selection circuit 131C selects terminal SL_4, supplying data signal D1_4 to terminal SL_4, and selection circuit 132C selects terminal SL_10, supplying data signal D2_4 to terminal SL_10. During period T5, selection circuit 131C selects terminal SL_5, supplying data signal D1_5 to terminal SL_5, and selection circuit 132C selects terminal SL_11, supplying data signal D2_5 to terminal SL_11. During period T6, the selection circuit 131C selects terminal SL_6, supplying data signal D1_6 to terminal SL_6, and the selection circuit 132C selects terminal SL_12, supplying data signal D2_6 to terminal SL_12. In the high-resolution mode described above, during each of periods T1 to T6, the potential of terminals other than the terminal selected by the selection circuit 131C is maintained at the potential of the previous period.

[0161] In the high-resolution mode circuit 100C, different data signals can be supplied simultaneously to terminals SL_1 and SL_7, terminals SL_2 and SL_8, terminals SL_3 and SL_9, terminals SL_4 and SL_10, terminals SL_5 and SL_11, and terminals SL_6 and SL_12. In other words, the high-resolution mode circuit 100C can supply data signals to twice the number of terminals in the same period as the normal operation mode. Therefore, a display device using a semiconductor device according to one aspect of the present invention can, for example, drive a 4K resolution display device in normal operation mode and an 8K resolution display device in high-resolution mode. Thus, a display device using a semiconductor device according to one aspect of the present invention can improve display quality.

[0162] <Modification 2> It should be noted that the semiconductor device according to one aspect of the present invention is not limited to the configuration example shown in the block diagrams of Figures 9 and 10. The semiconductor device according to one aspect of the present invention may be modified as appropriate, as long as it is within the scope of solving the problem.

[0163] Figure 15 is a block diagram showing an example of a semiconductor device according to one aspect of the present invention. The circuit 100D shown in Figure 15 is, as an example, a circuit that supplies video data signals to red, green, and blue pixel circuits, and is configured such that a circuit 100C is provided for each color. For example, circuit 100D, as a circuit related to supplying a red video data signal, includes a drive circuit 111R, a drive circuit 112R, a switching circuit 121R, a selection circuit 131R, and a selection circuit 132R. The output terminal of the drive circuit 111R is electrically connected to the input terminal of the selection circuit 131R. The output terminal of the drive circuit 112R is electrically connected to the input terminal of the selection circuit 132R. The first terminal of the switching circuit 121R is electrically connected to the input terminal of the selection circuit 131R. The second terminal of the switching circuit 121R is electrically connected to the input terminal of the selection circuit 132R. For example, circuit 100D includes a drive circuit 111G, a drive circuit 112G, a switching circuit 121G, a selection circuit 131G, and a selection circuit 132G as circuits related to supplying a green video data signal. The output terminal of drive circuit 111G is electrically connected to the input terminal of selection circuit 131G. The output terminal of drive circuit 112G is electrically connected to the input terminal of selection circuit 132G. The first terminal of switching circuit 121G is electrically connected to the input terminal of selection circuit 131G. The second terminal of switching circuit 121G is electrically connected to the input terminal of selection circuit 132G. For example, circuit 100D also includes a drive circuit 111B, a drive circuit 112B, a switching circuit 121B, a selection circuit 131B, and a selection circuit 132B as circuits related to supplying a blue video data signal. The output terminal of drive circuit 111B is electrically connected to the input terminal of selection circuit 131B. The output terminal of the drive circuit 112B is electrically connected to the input terminal of the selection circuit 132B. The first terminal of the switching circuit 121B is electrically connected to the input terminal of the selection circuit 131B. The second terminal of the switching circuit 121B is electrically connected to the input terminal of the selection circuit 132B.

[0164] Note that the pixel circuits may be provided outside of circuit 100D. Figure 15 shows an example in which pixel circuits PX_1R to PX_6R, pixel circuits PX_1G to PX_6G, and pixel circuits PX_1B to PX_6B are provided outside of circuit 100D. Pixel circuits PX_1R to PX_6R are, for example, pixel circuits that emit red light. Pixel circuits PX_1G to PX_6G are, for example, pixel circuits that emit green light. Pixel circuits PX_1B to PX_6B are, for example, pixel circuits that emit blue light. Each of pixel circuits PX_1R to PX_3R is electrically connected to one of the multiple output terminals of selection circuit 131R. Each of pixel circuits PX_4R to PX_6R is electrically connected to one of the multiple output terminals of selection circuit 132R. Each of the pixel circuits PX_1G through PX_3G is electrically connected to one of the multiple output terminals of the selection circuit 131G. Each of the pixel circuits PX_4G through PX_6G is electrically connected to one of the multiple output terminals of the selection circuit 132G. Each of the pixel circuits PX_1B through PX_3B is electrically connected to one of the multiple output terminals of the selection circuit 131B. Each of the pixel circuits PX_4B through PX_6B is electrically connected to one of the multiple output terminals of the selection circuit 132B.

[0165] The configuration of circuit 100D shown in Figure 15 can be considered as having the configuration of circuit 100C shown in Figure 9 provided for each of the red, green, and blue pixel circuits. In other words, gamma correction can be performed for each of the red, green, and blue data signals. Therefore, a display device using a semiconductor device according to one embodiment of the present invention can improve display quality.

[0166] Although the circuit 100D in Figure 15 shows a circuit configuration for supplying video data signals to pixel circuits of three colors: red, green, and blue, one aspect of the present invention is not limited to this. The number of colors in the pixel circuits may be, for example, two, or four or more. In one aspect of the present invention, even when the number of colors in the pixel circuits is two or four or more, a circuit 100C may be provided in circuit 100D for each pixel circuit of each color. Furthermore, although the circuit 100D in Figure 15 is a circuit configuration for supplying video data signals to pixel circuits of three colors: red, green, and blue, one aspect of the present invention is not limited to this. In one aspect of the present invention, for example, the three colors may be magenta, cyan, and yellow. Also, in one aspect of the present invention, circuit 100D may be configured to correspond to one or more pixel circuits selected from red, green, blue, magenta, cyan, or yellow.

[0167] (Embodiment 2) This embodiment describes an example configuration of a display device 10 using a semiconductor device according to one aspect of the present invention. Figure 16A is a block diagram illustrating the display device 10. The display device 10 has a display area 235, a first drive circuit section 231, and a second drive circuit section 232. The display area 235 has a plurality of pixels 230 arranged in a matrix. The semiconductor device according to one aspect of the present invention described in Embodiment 1 above can be used in the second drive circuit section 232. Alternatively, the semiconductor device according to one aspect of the present invention described in Embodiment 1 above can be used in each of the first drive circuit section 231 and the second drive circuit section 232, or in either one of them. For example, multiple circuits 100D shown in Figure 15 can be used in the second drive circuit section 232 shown in Figure 16A.

[0168] The circuits included in the first drive circuit section 231 function, for example, as scan line drive circuits. The circuits included in the second drive circuit section 232 function, for example, as signal line drive circuits. The display device 10 may also have some circuits located opposite the first drive circuit section 231 across the display area 235. The display device 10 may also have some circuits located opposite the second drive circuit section 232 across the display area 235. In this specification, the circuits included in the first drive circuit section 231 and the second drive circuit section 232 are sometimes collectively referred to as "peripheral drive circuits."

[0169] Various types of peripheral drive circuits can be used, such as shift registers, level shifters, inverters, latches, analog switches, or logic circuits. Transistors or capacitive elements can also be used in the peripheral drive circuits.

[0170] For example, the display device 10 may use OS transistors for the transistors constituting the pixels 230 and Si transistors (transistors containing silicon in the semiconductor layer where the channel is formed) for the transistors constituting the peripheral drive circuit. OS transistors have a low off-current, thus reducing power consumption. Si transistors have a faster operating speed than OS transistors, making them suitable for use in peripheral drive circuits. The display device 10 may also use OS transistors for both the transistors constituting the pixels 230 and the transistors constituting the peripheral drive circuit. The display device 10 may also use Si transistors for both the transistors constituting the pixels 230 and the transistors constituting the peripheral drive circuit. The display device 10 may also use Si transistors for the transistors constituting the pixels 230 and OS transistors for the transistors constituting the peripheral drive circuit.

[0171] Furthermore, the transistors constituting the pixel 230 may be either Si transistors or OS transistors. Similarly, the transistors constituting the peripheral drive circuit may be either Si transistors or OS transistors.

[0172] In one aspect of the present invention, the display device may use materials such as single-crystal silicon, polycrystalline silicon, or amorphous silicon for the Si transistor. Furthermore, in one aspect of the present invention, a transistor having a low-temperature polysilicon (LTPS) semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used. LTPS transistors have high field-effect mobility and good frequency characteristics.

[0173] In one aspect of the present invention, a display device can incorporate circuits that need to be driven at high frequencies (e.g., a source driver circuit) on the same substrate as the display unit by using Si transistors such as LTPS transistors. This simplifies the external circuits mounted on the display device, thereby reducing component costs and mounting costs.

[0174] OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon. Furthermore, OS transistors exhibit remarkably low source-drain leakage current (hereinafter also referred to as off-current) in the off state. Therefore, a capacitor connected in series with such a transistor can retain the charge stored in that capacitor for a long period of time. Additionally, a display device according to one embodiment of the present invention can reduce power consumption by applying an OS transistor.

[0175] Furthermore, the off-current value of an OS transistor per 1 μm channel width at room temperature is 1 aA (1 × 10⁻¹⁰). -18 A) Below, 1zA(1×10 -21 A) Less than or equal to 1yA(1×10 -24 A) It can be less than or equal to the following. Note that the off-current value of a Si transistor per 1 μm of channel width at room temperature is 1 fA (1 × 10⁻¹⁰). -15 A) and 1pA(1×10 -12 A) The answer is as follows. Therefore, it can be said that the off-current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0176] Furthermore, the display device 10 has m (m is an integer of 1 or more) wires 236, each arranged substantially parallel to the others, and whose potential is controlled by a circuit included in the first drive circuit unit 231. Furthermore, the display device 10 has n (n is an integer of 1 or more) wires 237, each arranged substantially parallel to the others, and whose potential is controlled by a circuit included in the second drive circuit unit 232.

[0177] Figure 16A shows an example where wiring 236 and 237 are connected to pixel 230. However, this is just one example, and the wiring connected to pixel 230 is not limited to wiring 236 and 237.

[0178] The display device 10 can achieve full-color display by combining three pixels 230 that control red light, three pixels 230 that control green light, and three pixels 230 that control blue light into a single pixel 240, and by controlling the amount of light emitted (luminescence) of each pixel 230. Therefore, each of the three pixels 230 functions as a sub-pixel. That is, each of the three sub-pixels controls, for example, the amount of light emitted by red light, green light, or blue light (see Figure 16B). Note that the color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be a combination of cyan (C), magenta (M), and yellow (Y) (see Figure 16C).

[0179] Furthermore, the arrangement of the three pixels 230 that make up one pixel 240 may be a delta arrangement (see Figure 16D). Specifically, the three pixels 230 that make up one pixel 240 may be arranged so that the lines connecting their respective center points form a triangle.

[0180] Furthermore, the areas of the three subpixels (pixel 230) do not have to be the same. For example, if the luminous efficiency and reliability differ depending on the emission color, the areas of the three subpixels may be changed for each emission color (see Figure 16E). The subpixel arrangement shown in Figure 16E may also be called the "S-Stripe RGB arrangement" or "S-stripe arrangement".

[0181] Furthermore, pixel 240 may combine four subpixels to function as a single pixel. For example, a subpixel controlling white light may be added to three subpixels that control red, green, and blue light, respectively (see Figure 16F). The display device 10 can increase the brightness of the display area by adding a subpixel that controls white light. Also, pixel 240 may add a subpixel that controls yellow light to three subpixels that control red, green, and blue light, respectively (see Figure 16G). Also, pixel 240 may add a subpixel that controls white light to three subpixels that control cyan, magenta, and yellow light, respectively (see Figure 16H).

[0182] Furthermore, the pixel 240 can improve the reproduction of intermediate tones by increasing the number of subpixels that function as a single pixel, and by appropriately combining subpixels that control light such as red, green, blue, cyan, magenta, and yellow. Thus, a display device according to one aspect of the present invention can improve display quality.

[0183] A display device according to one aspect of the present invention can reproduce a variety of color gamuts. For example, it can reproduce color gamuts such as the PAL (Phase Alternating Line) standard or NTSC (National Television System Committee) standard used in television broadcasting, the sRGB (standard RGB) standard or Adobe RGB standard widely used in display devices for electronic devices such as personal computers, digital cameras, or printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, or the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television).

[0184] Furthermore, in one aspect of the present invention, for example, by arranging 240 pixels in a 1920 x 1080 matrix, a display device 10 capable of full-color display at a resolution known as full HD (for example, also called "2K resolution," "2K1K," or "2K"). Furthermore, in one aspect of the present invention, for example, by arranging 240 pixels in a 3840 x 2160 matrix, a display device 10 capable of full-color display at a resolution known as ultra HD (for example, also called "4K resolution," "4K2K," or "4K"). Furthermore, in one aspect of the present invention, for example, by arranging 240 pixels in a 7680 x 4320 matrix, a display device 10 capable of full-color display at a resolution known as super HD (for example, also called "8K resolution," "8K4K," or "8K"). Furthermore, in one aspect of the present invention, by increasing the number of pixels 240, a display device 10 capable of full-color display at a resolution of 16K or 32K can also be realized.

[0185] Furthermore, the pixel density of the display area 235 is preferably 100 ppi or more and 10,000 ppi or less, and more preferably 1,000 ppi or more and 10,000 ppi or less. For example, the pixel density of the display area 235 may be 2,000 ppi or more and 6,000 ppi or less, or 3,000 ppi or more and 5,000 ppi or less.

[0186] Furthermore, the aspect ratio of the display area 235 is not particularly limited. The display area 235 of the display device 10 can support various aspect ratios, such as 1:1 (square), 4:3, 16:9, or 16:10.

[0187] Furthermore, the diagonal size of the display area 235 may be 0.1 inches or more and 100 inches or less, or it may be 100 inches or more.

[0188] When the display device 10 is used as a display device for virtual reality (VR) or augmented reality (AR), the diagonal size of the display area 235 can be 0.1 inches or more and 5.0 inches or less, preferably 0.5 inches or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display area 235 may be 1.5 inches or close to 1.5 inches. By setting the diagonal size of the display area 235 of the display device 10 to 2.0 inches or less, preferably close to 1.5 inches, it becomes possible to process the display in a single exposure process of the exposure apparatus (typically a scanner apparatus), thereby improving the productivity of the manufacturing process.

[0189] <Example of circuit configuration for 230 pixels> Figure 17A shows an example of the circuit configuration of a pixel 230. The pixel 230 has a pixel circuit 431 and a display element 432.

[0190] Therefore, each wire 236 is electrically connected to q pixel circuits 431 located in any row of the pixel circuits 431 arranged in p rows and q columns in the display area 235. In addition, each wire 237 is electrically connected to p pixel circuits 431 located in any column of the pixel circuits 431 arranged in p rows and q columns.

[0191] The pixel circuit 431 includes a transistor 436, a capacitive element 433, a transistor 451, and a transistor 434. The pixel circuit 431 is also electrically connected to the display element 432.

[0192] One of the source and drain electrodes of transistor 436 is electrically connected to a wiring (hereinafter referred to as signal line DL) to which a data signal (also called a "video signal") is supplied. Furthermore, the gate electrode of transistor 436 is electrically connected to a wiring (hereinafter referred to as scan line GL) to which a gate signal is supplied. Signal line DL and scan line GL correspond to wiring 237 and wiring 236, respectively. Transistor 436 has the function of controlling the writing of the data signal to node 435.

[0193] One of the pair of electrodes of the capacitive element 433 is electrically connected to node 435, and the other is electrically connected to node 437. Additionally, the source electrode and the other drain electrode of the transistor 436 are electrically connected to node 435.

[0194] The capacitive element 433 functions as a holding capacitor that holds the data written to node 435.

[0195] One of the source and drain electrodes of transistor 451 is electrically connected to the potential supply line VL_a, and the other is electrically connected to node 437. Furthermore, the gate electrode of transistor 451 is electrically connected to node 435.

[0196] One of the source and drain electrodes of transistor 434 is electrically connected to the potential supply line V0, and the other is electrically connected to node 437. Furthermore, the gate electrode of transistor 434 is electrically connected to the scan line GL.

[0197] One of the anodes or cathodes of the display element 432 is electrically connected to the potential supply line VL_b, and the other is electrically connected to node 437.

[0198] The display element 432 can be a light-emitting element (also called a "light-emitting device") such as an organic electroluminescent element (also called an "organic EL element"). However, the display element 432 is not limited to this. The display element 432 may also be an inorganic EL element made of inorganic material. Note that "organic EL elements" and "inorganic EL elements" are sometimes collectively referred to as "EL elements".

[0199] The light-emitting color of an EL element can be, for example, white, red, green, blue, cyan, magenta, or yellow, depending on the materials that make up the EL element.

[0200] There are two methods for achieving color display: one involves combining a display element 432 with a white light-emitting color and a colored layer, and the other involves providing a display element 432 with a different light-emitting color for each pixel. The former method is more productive than the latter. On the other hand, the latter method is less productive than the former method because it requires manufacturing a different display element 432 for each pixel. However, the latter method can obtain a light-emitting color with higher color purity than the former method. The latter method can further improve color purity by adding a microcavity structure to the display element 432.

[0201] The display element 432 may use either a low-molecular-weight compound or a high-molecular-weight compound. Furthermore, the display element 432 may also contain an inorganic compound. Each layer constituting the display element 432 can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, or coating.

[0202] The display element 432 may have an inorganic compound, such as a quantum dot. For example, a quantum dot can be used in the light-emitting layer to function as a light-emitting material.

[0203] The power supply potential can be, for example, the relatively higher or lower potential. The higher potential is called the high power supply potential (also known as "VDD"). The lower potential is called the low power supply potential (also known as "VSS"). The ground potential can also be used as the high or low power supply potential. For example, if the high power supply potential is the ground potential, the low power supply potential is lower than the ground potential. Also, for example, if the low power supply potential is the ground potential, the high power supply potential is higher than the ground potential.

[0204] For example, a high power supply potential VDD is supplied to either the potential supply line VL_a or the potential supply line VL_b, and a low power supply potential VSS is supplied to the other of the potential supply line VL_a or the potential supply line VL_b.

[0205] The display device having pixel circuits 431 sequentially selects each row of pixel circuits 431 using circuits included in the peripheral drive circuit, turns on transistors 436 and 434, and writes a data signal to node 435.

[0206] When data is written to node 435, the pixel circuit 431 enters a holding state when transistors 436 and 434 are turned off. Furthermore, the amount of current flowing between the source and drain electrodes of transistor 451 is controlled according to the potential of the data written to node 435. As a result, the display element 432 emits light with a brightness corresponding to the amount of current. By performing this sequentially for each row, the display device having the pixel circuit 431 can display an image. Transistor 451 is also called a "driving transistor".

[0207] To increase the luminescence brightness of the light-emitting device included in the pixel 230, it is necessary to increase the amount of current flowing through the device. Therefore, the drive transistor included in the pixel circuit 431 needs to have a high source-drain voltage. Compared to Si transistors, OS transistors have a higher breakdown voltage between source and drain. Therefore, OS transistors can have a high voltage applied between their source and drain. As a result, by using an OS transistor as the drive transistor in the pixel circuit 431, the amount of current flowing through the light-emitting device included in the pixel 230 can be increased, thereby increasing its luminescence brightness.

[0208] When operating in the saturation region, OS transistors exhibit a smaller change in source-drain current in response to changes in gate-source voltage compared to Si transistors. Therefore, a pixel 230 that uses an OS transistor as the drive transistor in the pixel circuit 431 can precisely control the current flowing between the source and drain based on changes in the gate-source voltage of the drive transistor, thereby allowing for precise control of the current flowing to the light-emitting device included in the pixel 230. Consequently, a display device using the pixel 230 can achieve a higher number of grayscale levels in the pixel 230.

[0209] Furthermore, OS transistors, in their saturation characteristics when operating in the saturation region, can supply a more stable current (saturation current) than Si transistors, even as the source-drain voltage gradually increases. Therefore, by using OS transistors as driving transistors, a stable current can be supplied to a light-emitting device, even if there are variations in the current-voltage characteristics of the light-emitting device, for example, that contains EL material. In other words, when operating in the saturation region, the source-drain current of an OS transistor remains almost unchanged even when the source-drain voltage is increased. Therefore, display devices using OS transistors can stabilize the luminescence brightness of the light-emitting device.

[0210] As described above, one aspect of the present invention, a display device, uses an OS transistor in the drive transistor included in the pixel circuit, which enables, for example, "suppression of black level distortion," "increase in luminescence brightness," "multi-gradation," and "suppression of variations in light-emitting devices."

[0211] Figure 17B shows a modified example of the circuit configuration of pixel 230 shown in Figure 17A. As shown in the circuit configuration in Figure 17B, the gate electrode of transistor 436 is electrically connected to the line to which the first scan signal is supplied (hereinafter referred to as scan line GL1). In addition, the gate electrode of transistor 434 is electrically connected to the line to which the second scan signal is supplied (hereinafter referred to as scan line GL2).

[0212] Furthermore, the circuit configuration shown in Figure 17B includes a transistor 438 in addition to the circuit configuration shown in Figure 17A. One of the source and drain electrodes of transistor 438 is electrically connected to the potential supply line V0, and the other is electrically connected to node 435. In addition, the gate electrode of transistor 438 is electrically connected to the line to which the third scanning signal is supplied (hereinafter referred to as scan line GL3).

[0213] Scan line GL1 corresponds to wiring 236 shown in Figure 16A. Although Figure 16A does not show the wiring corresponding to scan lines GL2 and GL3, scan lines GL2 and GL3 are electrically connected to the first drive circuit unit 231.

[0214] In Figure 17B, for example, if you want to display pixel 230 in black, you turn on both transistors 434 and 438. Then, the potential between the source electrode and gate electrode of transistor 451 becomes equal. Therefore, the gate voltage of transistor 451 becomes 0V for pixel 230, and the current flowing to the display element 432 can be cut off.

[0215] Furthermore, some or all of the transistors constituting the pixel circuit 431 may be transistors having back gates. The circuit configuration shown in Figure 17B uses transistors having back gates. For example, the gates and back gates of transistors 434, 436, and 438 are electrically connected. Also, the back gate of transistor 451 is electrically connected to node 437.

[0216] Figure 17C shows a modified version of the circuit configuration of pixel 230 shown in Figure 17A. The circuit configuration shown in Figure 17C has the same configuration as the circuit configuration shown in Figure 17A, but without transistor 434 and the potential supply line V0. The other components can be understood by referring to the explanation of the circuit configuration shown in Figure 17A. Therefore, in order to reduce repetition of explanation, a detailed explanation of the circuit configuration shown in Figure 17C will be omitted.

[0217] Furthermore, as mentioned above, some or all of the transistors constituting the pixel circuit 431 may be transistors having back gates. For example, in the pixel 230 shown in Figure 17D, a transistor having a back gate may be used for transistor 436, with the back gate and gate of the transistor electrically connected. Alternatively, a transistor having a back gate may be used for transistor 451, with the back gate and either the source or drain of the transistor electrically connected.

[0218] <Example of light-emitting element configuration> A light-emitting element (also called a light-emitting device) that can be used in a semiconductor device according to one aspect of the present invention will be described.

[0219] As shown in Figure 18A, the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductive layer 171 and conductive layer 173). The EL layer 172 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). Light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0220] A configuration comprising a layer 4420, a light-emitting layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single light-emitting unit. In this specification, the configuration shown in Figure 18A is referred to as a single structure.

[0221] Furthermore, Figure 18B shows a modified example of the EL layer 172 of the light-emitting element 61 shown in Figure 18A. Specifically, the light-emitting element 61 shown in Figure 18B comprises a layer 4430-1 on the conductive layer 171, a layer 4430-2 on layer 4430-1, a light-emitting layer 4411 on layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on layer 4420-1, and a conductive layer 173 on layer 4420-2. For example, when the conductive layer 171 is the anode and the conductive layer 173 is the cathode, layer 4430-1 functions as a hole injection layer, layer 4430-2 functions as a hole transport layer, layer 4420-1 functions as an electron transport layer, and layer 4420-2 functions as an electron injection layer. Alternatively, if conductive layer 171 is used as the cathode and conductive layer 173 as the anode, layer 4430-1 functions as an electron injection layer, layer 4430-2 functions as an electron transport layer, layer 4420-1 functions as a hole transport layer, and layer 4420-2 functions as a hole injection layer. By having such a layer structure, the light-emitting element 61 can efficiently inject carriers into the light-emitting layer 4411 and improve the efficiency of carrier recombination within the light-emitting layer 4411.

[0222] As shown in Figure 18C, a configuration in which multiple light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, and light-emitting layer 4413) are provided between layer 4420 and layer 4430 is also an example of a single structure.

[0223] Furthermore, as shown in Figure 18D, a configuration in which multiple light-emitting units (EL layers 172a and EL layers 172b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure or stack structure in this specification. Note that by using a tandem structure for the light-emitting element 61, a light-emitting element capable of high-brightness emission can be realized.

[0224] Furthermore, if the light-emitting element 61 is in the tandem structure shown in Figure 18D, the light-emitting colors of the EL layer 172a and EL layer 172b may be the same. For example, the light-emitting colors of both the EL layer 172a and EL layer 172b may be green. Note that if the display area 235 includes three sub-pixels R, G, and B, and each sub-pixel is equipped with a light-emitting element, the light-emitting elements of each sub-pixel may be in a tandem structure. Specifically, the EL layer 172a and EL layer 172b of the R sub-pixel each have a material capable of emitting red light. The EL layer 172a and EL layer 172b of the G sub-pixel each have a material capable of emitting green light. The EL layer 172a and EL layer 172b of the B sub-pixel each have a material capable of emitting blue light. In other words, the materials of the light-emitting layer 4411 and the light-emitting layer 4412 may be the same. The tandem-structured light-emitting element 61 shown in Figure 18D can reduce the current density per unit luminous intensity by making the light-emitting colors of the EL layer 172a and EL layer 172b the same. Therefore, the reliability of the light-emitting element 61 can be improved.

[0225] The light-emitting color of the light-emitting element can be, for example, red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 172. Furthermore, the color purity of the light-emitting element can be further enhanced by adding a microcavity structure.

[0226] The light-emitting layer may contain two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), or O (orange). For a light-emitting element that emits white light, it is preferable to have a configuration in which the light-emitting layer contains two or more types of light-emitting materials. In one aspect of the present invention, when obtaining white light emission using two types of light-emitting materials, the light-emitting materials should be selected such that the colors of the light emitted by each of the two materials are complementary colors. For example, in one aspect of the present invention, the light-emitting element can emit white light as a whole by ensuring that the light-emitting color of the first light-emitting material and the light-emitting color of the second light-emitting material are complementary colors. Furthermore, in one aspect of the present invention, when obtaining white light emission using three or more types of light-emitting materials, the light-emitting element can emit white light as a whole by combining the colors of the light emitted by each of the three or more light-emitting materials.

[0227] The light-emitting layer preferably contains two or more light-emitting materials that emit light, such as R (red), G (green), B (blue), Y (yellow), or O (orange). Furthermore, it is preferable that the light-emitting layer has two or more light-emitting materials, and that the light emitted by each light-emitting material contains spectral components of two or more colors from R, G, and B.

[0228] Examples of luminescent materials include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), or thermally activated delayed fluorescence (TADF) materials. For TADF materials, materials in thermal equilibrium between the singlet and triplet excited states may also be used. Such TADF materials have a shorter emission lifetime (excitation lifetime), which helps suppress efficiency degradation in the high-brightness region of the light-emitting element.

[0229] <Method for forming light-emitting elements> The following describes an example of a method for forming the light-emitting element 61.

[0230] Figure 19A is a schematic top view of the light-emitting element 61. In this specification, the red light-emitting element 61R, the green light-emitting element 61G, and the blue light-emitting element 61B are sometimes collectively referred to as the light-emitting element 61. In Figure 19A, the symbols R, G, and B are added within the light-emitting area of ​​each light-emitting element for ease of distinction. The configuration of the light-emitting element 61 shown in Figure 19A may also be called an SBS (Side By Side) structure. Furthermore, Figure 19A illustrates a configuration having three colored light-emitting elements 61: red (R), green (G), and blue (B), but is not limited thereto. One aspect of the present invention may be a configuration having four or more colored light-emitting elements 61.

[0231] The light-emitting elements 61R, 61G, and 61B are each arranged in a matrix. Figure 19A shows a so-called stripe arrangement, where light-emitting elements of the same color are arranged in one direction. However, the arrangement method of the light-emitting elements is not limited to this. For example, a delta arrangement or a zigzag arrangement may be applied to the arrangement of the light-emitting elements. In addition, for example, a pentile arrangement can be used for the arrangement of the light-emitting elements.

[0232] The light-emitting elements 61R, 61G, and 61B preferably use organic EL devices such as OLED (Organic Light Emitting Diode) or QLED (Quantum-dot Organic Light Emitting Diode). Examples of light-emitting materials for the light-emitting elements include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), or thermally activated delayed fluorescence (TADF) materials.

[0233] Figure 19B is a schematic cross-sectional view corresponding to the dashed line A1-A2 in Figure 19A. Figure 19B shows cross-sections of light-emitting elements 61R, 61G, and 61B. Light-emitting elements 61R, 61G, and 61B are each provided on an insulating layer 363. Light-emitting elements 61R, 61G, and 61B have a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode. The insulating layer 363 can be an inorganic insulating film or an organic insulating film, or both. It is preferable to use an inorganic insulating film for the insulating layer 363. Examples of inorganic insulating films include oxide insulating films or nitride insulating films such as silicon oxide film, silicon oxide nitride film, silicon nitride film, silicon nitride film, aluminum oxide film, aluminum oxide nitride film, or hafnium oxide film.

[0234] In this specification, compounds with a higher oxygen content than nitrogen are referred to as oxiditrides. Compounds with a higher nitrogen content than oxygen are referred to as nitride oxides. For example, silicon oxiditride is a compound with a higher oxygen content than nitrogen. For example, silicon nitride oxide is a compound with a higher nitrogen content than oxygen. The content of each element can be measured using methods such as Rutherford backscattering spectrometry (RBS).

[0235] The light-emitting element 61R has an EL layer 172R between a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode. The EL layer 172R has a luminescent organic compound that emits light with intensity in at least the red wavelength range. The EL layer 172G of the light-emitting element 61G has a luminescent organic compound that emits light with intensity in at least the green wavelength range. The EL layer 172B of the light-emitting element 61B has a luminescent organic compound that emits light with intensity in at least the blue wavelength range.

[0236] Each of the EL layers 172R, 172G, and 172B may have, in addition to a layer containing a luminescent organic compound (luminescent layer), one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0237] A conductive layer 171, which functions as a pixel electrode, is provided for each light-emitting element. A conductive layer 173, which functions as a common electrode, is provided as a continuous layer common to each light-emitting element. Either the conductive layer 171 that functions as a pixel electrode or the conductive layer 173 that functions as a common electrode uses a conductive film that is transparent to visible light, and the other uses a conductive film that is reflective. In one aspect of the present invention, the display device can be a bottom-emission type display device by making the conductive layer 171 that functions as a pixel electrode transparent and the conductive layer 173 that functions as a common electrode reflective. Alternatively, in one aspect of the present invention, the display device can be a top-emission type display device by making the conductive layer 171 that functions as a pixel electrode reflective and the conductive layer 173 that functions as a common electrode transparent. Furthermore, in one aspect of the present invention, the display device can also be a dual-emission type display device by making both the conductive layer 171 that functions as a pixel electrode and the conductive layer 173 that functions as a common electrode transparent.

[0238] For example, if the light-emitting element 61R is of the top-emission type, the light 175R emitted from the light-emitting element 61R is emitted towards the conductive layer 173. If the light-emitting element 61G is of the top-emission type, the light 175G emitted from the light-emitting element 61G is emitted towards the conductive layer 173. If the light-emitting element 61B is of the top-emission type, the light 175B emitted from the light-emitting element 61B is emitted towards the conductive layer 173.

[0239] An insulating layer 272 is provided covering the edges of the conductive layer 171, which functions as a pixel electrode. The edges of the insulating layer 272 are preferably tapered. The insulating layer 272 can be made of the same material as that used for the insulating layer 363.

[0240] The insulating layer 272 is provided to prevent the light-emitting elements 61R, 61G, and 61B of adjacent pixels from unintentionally short-circuiting and emitting false light. The insulating layer 272 also has the function of preventing the metal mask from coming into contact with the conductive layer 171 when a metal mask is used to form the EL layers 172R, 172G, and 172B.

[0241] Each of the EL layers 172R, 172G, and 172B has a region in contact with the upper surface of the conductive layer 171, which functions as a pixel electrode, and a region in contact with the surface of the insulating layer 272. The edges of the EL layers 172R, 172G, and 172B are located on the insulating layer 272.

[0242] The configuration shown in Figure 19B has a gap between the EL layers of two different colored light-emitting elements. Preferably, the EL layers 172R, 172G, and 172B are arranged so that they do not touch each other. This configuration effectively prevents current from flowing through two adjacent EL layers, resulting in unintended light emission (also known as crosstalk). Therefore, one aspect of the present invention can enhance contrast and realize a display device with high display quality.

[0243] The EL layer 172R, EL layer 172G, and EL layer 172B can be differentiated by, for example, a vacuum deposition method using a shadow mask such as a metal mask. Alternatively, they may be differentiated by photolithography. In one aspect of the present invention, by using photolithography, a display device with high resolution, which is difficult to achieve when using a metal mask, can be realized.

[0244] In this specification, devices fabricated using a metal mask or FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or FMM may be referred to as MML (Metal Maskless) structured devices. Because MML structured display devices are fabricated without a metal mask, they offer greater design flexibility in terms of pixel arrangement and pixel shape compared to MM structured display devices.

[0245] A protective layer 271 is provided on the conductive layer 173, which functions as a common electrode, covering the light-emitting elements 61R, 61G, and 61B. The protective layer 271 has the function of preventing impurities, such as water, from diffusing to each light-emitting element from above.

[0246] The protective layer 271 can be a single-layer or multilayer structure, for example, including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide film, silicon oxide nitride film, silicon nitride film, silicon nitride film, aluminum oxide film, aluminum oxide nitride film, or hafnium oxide film. Alternatively, the protective layer 271 may use semiconductor materials such as indium gallium oxide or indium gallium zinc oxide (IGZO). The protective layer 271 may be formed using, for example, ALD method, CVD method, or sputtering method. Although the example given illustrates a configuration in which the protective layer 271 includes an inorganic insulating film, it is not limited to this. For example, the protective layer 271 may be a multilayer structure of an inorganic insulating film and an organic insulating film.

[0247] The protective layer 271 can be processed using either a wet etching method or a dry etching method when using indium gallium zinc oxide. For example, when using IGZO, the protective layer 271 can be processed using chemicals such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed aluminum etchant)). The mixed aluminum etchant can be formulated in a volume ratio of approximately phosphoric acid:acetic acid:nitric acid:water = 53.3:6.7:3.3:36.7.

[0248] Figure 19C shows a different example from the one described above. Specifically, Figure 19C has a light-emitting element 61W that emits white light. The light-emitting element 61W has an EL layer 172W that emits white light between a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode.

[0249] The EL layer 172W can be configured, for example, by stacking two light-emitting layers selected so that their respective light-emitting colors are complementary. Alternatively, a stacked EL layer with a charge-generating layer sandwiched between the light-emitting layers may be used.

[0250] Figure 19C shows three light-emitting elements 61W arranged side by side. A colored layer 264R is provided on top of the left light-emitting element 61W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on top of the center light-emitting element 61W. Similarly, a colored layer 264B that transmits blue light is provided on top of the right light-emitting element 61W. This allows the display device to display a color image.

[0251] Here, in the light-emitting element 61W, the EL layer 172W and the conductive layer 173, which functions as a common electrode, are separated between two adjacent light-emitting elements 61W. This prevents current from flowing through the EL layer 172W between two adjacent light-emitting elements 61W, thus preventing unintended light emission. In particular, when a stacked EL layer with a charge generation layer between two light-emitting layers is used as the EL layer 172W, the display device using the EL element suffers from a problem in which the effect of crosstalk becomes more pronounced and the contrast decreases as the resolution increases, i.e., as the distance between adjacent pixels decreases. Therefore, one aspect of the present invention makes it possible to realize a display device that combines high resolution and high contrast by using such a configuration.

[0252] The separation of the EL layer 172W and the conductive layer 173, which functions as a common electrode, is preferably performed by photolithography. In one aspect of the present invention, this makes it possible to narrow the spacing between light-emitting elements, and thus realize a display device with a high aperture ratio compared to the case in which a shadow mask such as a metal mask is used.

[0253] In one aspect of the present invention, in the case of a bottom-emission type light-emitting element, a colored layer may be provided between the conductive layer 171, which functions as a pixel electrode, and the insulating layer 363.

[0254] Figure 19D shows a different example from the above. Specifically, Figure 19D shows a configuration in which the insulating layer 272 is not provided between the light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B. By adopting this configuration, the display device according to one aspect of the present invention can be made into a display device with a high aperture ratio. Furthermore, by not providing the insulating layer 272 in the display device according to one aspect of the present invention, the unevenness of the light-emitting element 61 is reduced, thus improving the viewing angle of the display device. Specifically, the viewing angle of the display device can be 150° or more and less than 180°, preferably 160° or more and less than 180°, and more preferably 160° or more and less than 180°.

[0255] In addition, the protective layer 271 covers the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. By adopting such a configuration, the protective layer 271 can suppress impurities (typically water, etc.) that can enter from the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. Further, by applying such a configuration to the display device according to an aspect of the present invention, the leakage current between adjacent light-emitting elements 61 is reduced, so that the chroma and contrast ratio are improved, and the power consumption is reduced.

[0256] In addition, in the configuration shown in FIG. 19D, the upper surface shapes of the conductive layer 171, the EL layer 172R, and the conductive layer 173 are substantially identical. Such a structure can be formed collectively, for example, using a resist mask or the like after forming the conductive layer 171, the EL layer 172R, and the conductive layer 173. Such a process can also be referred to as self-aligned patterning because the EL layer 172R and the conductive layer 173 are processed using the conductive layer 173 as a mask. Although the EL layer 172R has been described here, the EL layer 172G and the EL layer 172B can also have the same configuration.

[0257] In addition, in FIG. 19D, further, a protective layer 273 is provided on the protective layer 271. For example, the protective layer 271 can be formed using a device (typically an ALD device or the like) capable of forming a film with high covering properties, and the protective layer 273 can be formed using a device (typically a sputtering device or the like) on which a film with lower covering properties than the protective layer 271 is formed. Thereby, a region 275 can be provided between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 172R and the EL layer 172G, and between the EL layer 172G and the EL layer 172B.

[0258] Note that the region 275 has any one or more selected from, for example, air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically, helium, neon, argon, xenon, krypton, etc.). Further, the region 275 may contain, for example, a gas used when forming the protective layer 273. For example, when forming the protective layer 273 by sputtering, the region 275 may contain any one or more of the above Group 18 elements. When the region 275 contains a gas, the gas can be identified by, for example, gas chromatography. Further, when forming the protective layer 273 by sputtering, the gas used during sputtering may also be included in the film of the protective layer 273. In this case, when analyzed by, for example, energy-dispersive X-ray analysis (EDX analysis), an element such as argon may be detected in the protective layer 273.

[0259] Further, when the refractive index of the region 275 is lower than the refractive index of the protective layer 271, light emitted from the EL layer 172R, the EL layer 172G, or the EL layer 172B is reflected at the interface between the protective layer 271 and the region 275. Thereby, the region 275 may be able to suppress light emitted from the EL layer 172R, the EL layer 172G, or the EL layer 172B from entering an adjacent pixel. Thereby, since the region 275 can suppress the mixing of different emission colors from adjacent pixels, the display quality of the display device can be improved.

[0260] In the configuration shown in Figure 19D, the region between the light-emitting element 61R and the light-emitting element 61G, or the region between the light-emitting element 61G and the light-emitting element 61B (hereinafter simply referred to as the distance between light-emitting elements) can be narrowed. Specifically, the distance between light-emitting elements can be 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the configuration has a region where the gap between the side surface of the EL layer 172R and the side surface of the EL layer 172G, or the gap between the side surface of the EL layer 172G and the side surface of the EL layer 172B is 1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0261] Furthermore, this configuration, for example, when region 275 contains a gas, can isolate the light-emitting elements while suppressing, for example, color mixing or crosstalk of light from each light-emitting element.

[0262] Region 275 may be filled with a filler. Examples of fillers include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, or EVA (ethylene vinyl acetate) resin. Alternatively, a photoresist may be used as the filler. The photoresist used as the filler may be a positive-type photoresist or a negative-type photoresist.

[0263] Furthermore, when comparing the above-mentioned white light-emitting devices (single or tandem structure) with light-emitting devices with an SBS structure, the light-emitting devices with an SBS structure can consume less power than the white light-emitting devices. Therefore, in one aspect of the present invention, it is preferable to use a light-emitting device with an SBS structure when it is desirable to keep power consumption low. On the other hand, the manufacturing process for white light-emitting devices is simpler than that for light-emitting devices with an SBS structure. Therefore, in one aspect of the present invention, by suitably using a white light-emitting device, manufacturing costs can be reduced or manufacturing yields can be increased.

[0264] Figure 20A shows a different example from the one described above. Specifically, the configuration shown in Figure 20A differs from the configuration shown in Figure 19D in the configuration of the insulating layer 363. When the light-emitting elements 61R, 61G, and 61B are processed, a portion of the upper surface of the insulating layer 363 is scraped away, creating a recess. The protective layer 271 is formed in this recess. In other words, in a cross-sectional view, the insulating layer 363 has a region where the lower surface of the protective layer 271 is lower than the lower surface of the conductive layer 171. By having this region, the insulating layer 363 can effectively suppress impurities (typically water, etc.) that could enter the light-emitting elements 61R, 61G, and 61B from below. The above-mentioned recess can be formed when impurities (also called residues) that may adhere to the sides of each light-emitting element are removed during processing of the light-emitting elements 61R, 61G, and 61B, for example, by wet etching. In one aspect of the present invention, a highly reliable display device can be obtained by removing the above-mentioned residue and then covering the sides of each light-emitting element with a protective layer 271.

[0265] Figure 20B shows a different example from the above. Specifically, the configuration shown in Figure 20B includes an insulating layer 276 and a microlens array 277 in addition to the configuration shown in Figure 20A. The insulating layer 276 functions as an adhesive layer. When the refractive index of the insulating layer 276 is lower than that of the microlens array 277, the microlens array 277 can concentrate the light emitted from the light-emitting elements 61R, 61G, and 61B. As a result, this configuration can improve the light extraction efficiency of the display device. In particular, it is preferable because a bright image can be viewed when the user views the display surface of the display device from the front. Various types of curing adhesives can be used as the insulating layer 276, such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, or anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, or EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets, for example, may also be used.

[0266] Figure 20C shows a different example from the one described above. Specifically, the configuration shown in Figure 20C has three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration shown in Figure 20A. This configuration also has an insulating layer 276 above the three light-emitting elements 61W. Furthermore, this configuration has colored layers 264R, 264G, and 264B above the insulating layer 276. Specifically, the colored layer 264R, which transmits red light, is positioned to overlap with the left light-emitting element 61W. The colored layer 264G, which transmits green light, is positioned to overlap with the central light-emitting element 61W. The colored layer 264B, which transmits blue light, is positioned to overlap with the right light-emitting element 61W. As a result, the display device can display a color image. Note that the configuration shown in Figure 20C is also a modified version of the configuration shown in Figure 19C.

[0267] Figure 20D shows a different example from the one described above. Specifically, in the configuration shown in Figure 20D, the protective layer 271 is provided adjacent to the sides of the conductive layer 171 and the EL layer 172. Also, the conductive layer 173 is provided as a continuous layer common to each light-emitting element. Furthermore, in the configuration shown in Figure 20D, it is preferable that region 275 is filled with a filler material.

[0268] A light-emitting element 61 according to one aspect of the present invention can enhance the color purity of the emitted light by providing a microcavity structure. When providing a microcavity structure to the light-emitting element 61, the light-emitting element should be configured such that the product of the distance d between the conductive layer 171 and the conductive layer 173 and the refractive index n of the EL layer 172 (optical distance) is m times half the wavelength λ (where m is an integer of 1 or more). The distance d can be calculated using formula 1.

[0269] d = m × λ / (2 × n) (Equation 1).

[0270] According to Equation 1, the distance d of the light-emitting element 61 in the microcavity structure is determined according to the wavelength (emission color) of the emitted light. The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G may be thicker than the EL layer 172B, and the EL layer 172R may be thicker than the EL layer 172G.

[0271] More precisely, distance d is the distance from the reflective region of the conductive layer 171, which functions as a reflective electrode, to the reflective region of the conductive layer 173, which functions as semi-transparent and semi-reflective. For example, if the conductive layer 171 is a laminate of silver and a transparent conductive film called ITO, and the ITO is on the EL layer 172 side, distance d can be set according to the emission color by adjusting the thickness of the ITO. That is, a distance d suitable for the emission color can be obtained by changing the thickness of the ITO, even if the thicknesses of the EL layers 172R, 172G, and 172B are the same.

[0272] However, it can be difficult to precisely determine the location of the reflective regions in the conductive layer 171 and the conductive layer 173. In this case, the light-emitting element can sufficiently obtain the effect of the microcavity by assuming that any location in the conductive layer 171 and the conductive layer 173 is a reflective region.

[0273] The light-emitting element 61 is composed of, for example, a hole injection layer, a hole transport layer, an emitting layer, an electron transport layer, or an electron injection layer. Detailed configuration examples of the light-emitting element 61 will be described in other embodiments. In order to improve the light extraction efficiency in the microcavity structure, it is preferable that the optical distance from the conductive layer 171, which functions as a reflective electrode, to the emitting layer be an odd multiple of λ / 4. In order to achieve this optical distance, it is preferable to appropriately adjust the thickness of each layer constituting the light-emitting element 61.

[0274] Furthermore, when light is emitted from the conductive layer 173 side, it is preferable that the reflectance of light of the conductive layer 173 is greater than the transmittance of light. The transmittance of light of the conductive layer 173 is preferably 2% or more and 50% or less, more preferably 2% or more and 30% or less, and even more preferably 2% or more and 10% or less. The light-emitting element 61 can enhance the effect of the microcavity by reducing the transmittance of light of the conductive layer 173 (increasing the reflectance of light).

[0275] Figure 21A is a perspective view of the display device 10. The display device 10 shown in Figure 21A includes a layer 60 superimposed on a layer 50. Layer 50 includes a plurality of pixel circuits 51 arranged in a matrix, a first drive circuit section 231, a second drive circuit section 232, and an input / output terminal section 29. Layer 60 includes a plurality of light-emitting elements 61 arranged in a matrix.

[0276] Each pixel circuit 51 and each light-emitting element 61 functions as a single pixel 230 when electrically connected to each other. Therefore, the area where the multiple pixel circuits 51 of layer 50 and the multiple light-emitting elements 61 of layer 60 overlap functions as a display area 235.

[0277] For example, power, signals, etc. necessary for the operation of the display device 10 are supplied to the display device 10 via the input / output terminal portion 29. The display device 10 shown in FIG. 21A can form the transistors included in the peripheral drive circuit and the transistors included in the pixel 230 in the same process.

[0278] Also, as shown in FIG. 21B, the display device 10 may be configured such that the layer 40, the layer 50, and the layer 60 are provided in a stacked manner. The display device 10 shown in FIG. 21B is provided with a plurality of pixel circuits 51 arranged in a matrix in the layer 50, and the first drive circuit portion 231 and the second drive circuit portion 232 are provided in the layer 40. By providing the first drive circuit portion 231 and the second drive circuit portion 232 in a layer different from the pixel circuit 51, the width of the frame around the display area 235 can be narrowed, so that the occupied area of the display area 235 can be expanded.

[0279] The display area 235 with an expanded occupied area can increase the resolution. Or, when the resolution is constant for the display area 235 with an expanded occupied area, the occupied area per pixel can be increased, so that the emission luminance can be increased. Also, by expanding the occupied area per pixel, the ratio of the light-emitting area to the occupied area per pixel (also referred to as the "opening ratio") can be increased. For example, the opening ratio of the pixel can be 40% or more and less than 100%, preferably 50% or more and 95% or less, more preferably 60% or more and 95% or less. Also, by expanding the occupied area per pixel, the current density supplied to the light-emitting element 61 can be reduced. Therefore, the load applied to the light-emitting element 61 is reduced. Therefore, the semiconductor device according to one aspect of the present invention can enhance the reliability. Therefore, the display device 10 including the semiconductor device according to one aspect of the present invention can enhance the reliability.

[0280] By stacking the display area 235 and peripheral drive circuits, the wiring connecting them electrically can be shortened. Therefore, wiring resistance and parasitic capacitance are reduced. As a result, the semiconductor device according to one aspect of the present invention can increase its operating speed. Furthermore, the semiconductor device according to one aspect of the present invention consumes less power.

[0281] Furthermore, layer 40 may include not only peripheral drive circuits, but also a CPU 23 (Central Processing Unit), a GPU 24 (Graphics Processing Unit), and a memory circuit section 25. In this embodiment, the peripheral drive circuits, CPU 23, GPU 24, and memory circuit section 25 are collectively referred to as "functional circuits."

[0282] For example, the CPU 23 has the function of controlling the operation of the GPU 24 and the circuits provided in layer 40 according to a program stored in the memory circuit unit 25. The GPU 24 has the function of performing calculations to form image data. In addition, the GPU 24 can perform many matrix operations (multiply-accumulate operations) in parallel, so it can perform calculations using neural networks at high speed, for example. The GPU 24 has the function of correcting image data using correction data stored in the memory circuit unit 25, for example. For example, the GPU 24 has the function of generating image data in which one or more of the following have been corrected: brightness, hue, and contrast.

[0283] The display device 10 may use the GPU 24 to upconvert or downconvert image data. The display device 10 may also be provided with a super-resolution circuit in layer 40. The super-resolution circuit has the function of determining the potential of any pixel in the display area 235 by performing a sum-of-products operation on the potentials and weights of pixels arranged around that pixel. The super-resolution circuit has the function of upconverting image data with a resolution lower than that of the display area 235. The super-resolution circuit also has the function of downconverting image data with a resolution higher than that of the display area 235.

[0284] The display device 10 can reduce the load on the GPU 24 by incorporating a super-resolution circuit. For example, the load on the GPU 24 can be reduced by processing up to 2K resolution (or 4K resolution) with the GPU 24 and then upconverting to 4K resolution (or 8K resolution) using the super-resolution circuit. Downconversion can be performed in the same manner.

[0285] The functional circuits of layer 40 do not necessarily have to include all of these configurations, and may include other configurations. For example, it may include one or more of the following: a potential generation circuit that generates multiple different potentials, and a power management circuit that controls the supply or stop of power for each circuit of the display device 10.

[0286] Power supply or deactivation may be performed for each circuit that makes up the CPU 23. For example, the CPU 23 can reduce power consumption by deactivating power to circuits that are deemed not to be used for a while and reactivating power when needed. Data required when reactivating power can be stored in a memory circuit or memory circuit unit 25 within the CPU 23 before the circuit is deactivated. By storing the data required when the circuit is restored, the CPU 23 can achieve a high-speed recovery of the deactivated circuit. The CPU 23 may also stop circuit operation by deactivating the supply of a clock signal.

[0287] Furthermore, the functional circuit may include one or more of the following: a DSP circuit, a sensor circuit, a communication circuit, and an FPGA (Field Programmable Gate Array).

[0288] Some of the transistors constituting the functional circuit of layer 40 may be provided in layer 50. Also, some of the transistors constituting the pixel circuit 51 of layer 50 may be provided in layer 40. Therefore, the functional circuit may be composed of Si transistors and OS transistors. Also, the pixel circuit 51 may be composed of Si transistors and OS transistors.

[0289] Figure 22 shows a partial cross-sectional configuration example of the display device 10 shown in Figure 21A. The display device 10 shown in Figure 22 comprises a layer 50 including a substrate 301, a capacitor 246, and a transistor 310, and a layer 60 including light-emitting elements 61R, 61G, and 61B. The layer 60 is provided on the insulating layer 363 of the layer 50.

[0290] The transistor 310 is a transistor having a channel-forming region in the substrate 301. The substrate 301 can be a semiconductor substrate such as a single-crystal silicon substrate. The transistor 310 comprises a portion of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region of the substrate 301 doped with impurities and functions as either a source or a drain. The insulating layer 314 is provided covering the side surface of the conductive layer 311 and functions as an insulating layer.

[0291] The element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301.

[0292] An insulating layer 261 is provided covering the transistor 310. A capacitor 246 is provided on the insulating layer 261.

[0293] Capacitor 246 comprises a conductive layer 241, a conductive layer 245, and an insulating layer 243 located between them. The conductive layer 241 functions as one electrode of the capacitor 246. The conductive layer 245 functions as the other electrode of the capacitor 246. The insulating layer 243 functions as the dielectric of the capacitor 246.

[0294] The conductive layer 241 is provided on the insulating layer 261 and embedded in the insulating layer 254. The conductive layer 241 is electrically connected to either the source or drain of the transistor 310 by a plug 266 embedded in the insulating layer 261. The insulating layer 243 is provided covering the conductive layer 241. The conductive layer 245 is provided in the region overlapping with the conductive layer 241 via the insulating layer 243.

[0295] An insulating layer 255 is provided covering the capacitance 246. An insulating layer 363 is provided on the insulating layer 255. Light-emitting elements 61R, 61G, and 61B are provided on the insulating layer 363. A protective layer 415 is provided on the light-emitting elements 61R, 61G, and 61B. A substrate 420 is provided on the upper surface of the protective layer 415 via a resin layer 419.

[0296] The pixel electrodes of the light-emitting element are electrically connected to either the source or drain of the transistor 310 by plugs 256 embedded in the insulating layer 255 and the insulating layer 363, a conductive layer 241 embedded in the insulating layer 254, and a plug 266 embedded in the insulating layer 261.

[0297] Figure 23 shows a modified example of the cross-sectional configuration shown in Figure 22. The cross-sectional configuration example of the display device 10 shown in Figure 23 differs from the cross-sectional configuration example shown in Figure 22 mainly in that it includes transistor 320 instead of transistor 310. Note that explanations of parts that are the same as in Figure 22 may be omitted.

[0298] Transistor 320 is a transistor in which a metal oxide (also called an oxide semiconductor) is applied to the semiconductor layer where the channel is formed.

[0299] The transistor 320 comprises a semiconductor layer 321, an insulating layer 323, a conductive layer 324, a pair of conductive layers 325, an insulating layer 326, and a conductive layer 327.

[0300] The substrate 331 can be an insulating substrate or a semiconductor substrate.

[0301] An insulating layer 332 is provided on the substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320, and prevents oxygen from detaching from the semiconductor layer 321 to the insulating layer 332. The insulating layer 332 can be made of a film that is less resistant to hydrogen or oxygen diffusion compared to a silicon oxide film. For example, the insulating layer 332 can be made of an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0302] A conductive layer 327 is provided on an insulating layer 332. An insulating layer 326 is provided covering the conductive layer 327. The conductive layer 327 functions as the first gate electrode of the transistor 320. A portion of the insulating layer 326 functions as the first gate insulating layer. It is preferable that at least the portion of the insulating layer 326 in contact with the semiconductor layer 321 be made of an oxide insulating film, such as a silicon oxide film. It is preferable that the upper surface of the insulating layer 326 is flattened.

[0303] The semiconductor layer 321 is provided on the insulating layer 326. Preferably, the semiconductor layer 321 comprises a metal oxide (also called an oxide semiconductor) film having semiconductor properties. Details of materials suitably used for the semiconductor layer 321 will be described later.

[0304] A pair of conductive layers 325 are provided in contact with the semiconductor layer 321 and function as source and drain electrodes.

[0305] The insulating layer 328 is provided covering, for example, the top and side surfaces of a pair of conductive layers 325, and the side surfaces of the semiconductor layer 321. The insulating layer 264 is provided on the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from, for example, the insulating layer 264 to the semiconductor layer 321, and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be made of the same insulating film as the insulating layer 332.

[0306] The insulating layer 328 and the insulating layer 264 are provided with openings that reach the semiconductor layer 321. The insulating layer 323 and the conductive layer 324, which are in contact with the insulating layer 264, the insulating layer 328, the sides of the conductive layer 325, and the top surface of the semiconductor layer 321, are embedded inside these openings. The conductive layer 324 functions as a second gate electrode. The insulating layer 323 functions as a second gate insulating layer.

[0307] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are flattened so that their heights are approximately the same. Furthermore, insulating layers 329 and 265 are provided covering these surfaces.

[0308] Insulating layers 264 and 265 function as interlayer insulating layers. Insulating layer 329 functions as a barrier layer that prevents impurities, such as water or hydrogen, from diffusing from, for example, insulating layer 265 to transistor 320. Insulating layer 329 can be an insulating film similar to that used for insulating layers 328 and 332.

[0309] A plug 274, which is electrically connected to one of the pair of conductive layers 325, is provided so as to be embedded in the insulating layers 265, 329, and 264. Here, it is preferable that the plug 274 comprises a conductive layer 274a that covers the sides of the openings of the insulating layers 265, 329, 264, and 328, as well as a portion of the upper surface of the conductive layer 325, and a conductive layer 274b that is in contact with the upper surface of the conductive layer 274a. In this case, it is preferable that the conductive layer 274a is made of a conductive material that does not easily allow hydrogen and oxygen to diffuse.

[0310] Figure 24 shows an example of a partial cross-sectional configuration of the display device 10 shown in Figure 21B. The display device 10 shown in Figure 24 has a stacked configuration in which a transistor 310A with a channel formed on a substrate 301A provided on layer 40 and a transistor 310B with a channel formed on a substrate 301B provided on layer 50 are stacked. Substrate 301A can be made of the same material as substrate 301.

[0311] The display device 10 shown in Figure 24 has a structure in which a layer 60 on which a light-emitting element 61 is provided, a layer 50 on which a substrate 301B, a transistor 310B, and a capacitor 246 are provided, and a layer 40 on which a substrate 301A and a transistor 310A are provided are bonded together.

[0312] A plug 343 that penetrates the substrate 301B is provided on the substrate 301B. The plug 343 functions as a through-silicon via (TSV). The plug 343 is electrically connected to a conductive layer 342 provided on the back surface of the substrate 301B (the surface opposite to the substrate 420 side). A conductive layer 341 is provided on the insulating layer 261 of the substrate 301A.

[0313] The conductive layer 341 and the conductive layer 342 are joined together, thereby electrically connecting layer 40 and layer 50.

[0314] It is preferable that conductive layers 341 and 342 use the same conductive material. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Sn, Zn, Au, Ag, Pt, Ti, Mo, and W, or a metal nitride film (titanium nitride film, molybdenum nitride film, or tungsten nitride film) composed of the above elements can be used. In particular, it is preferable that conductive layers 341 and 342 use copper. This allows the bonding of conductive layers 341 and 342 to be done using Cu-Cu (copper-copper) direct bonding technology (a technology that achieves electrical conductivity by connecting Cu (copper) pads to each other). The conductive layers 341 and 342 may also be bonded via bumps.

[0315] Figure 25 shows a modified example of the cross-sectional configuration shown in Figure 24. The cross-sectional configuration example of the display device 10 shown in Figure 25 has a configuration in which a transistor 310A with a channel formed on a substrate 301A and a transistor 320 containing a metal oxide in the semiconductor layer where the channel is formed are stacked. Note that explanations of parts similar to those in Figures 22 to 24 may be omitted.

[0316] The layer 50 shown in Figure 25 has the same configuration as the layer 50 shown in Figure 23, but without the substrate 331. In the layer 40 shown in Figure 25, an insulating layer 261 is provided covering the transistor 310A. A conductive layer 251 is provided on the insulating layer 261. An insulating layer 262 is provided covering the conductive layer 251. A conductive layer 252 is provided on the insulating layer 262. The conductive layers 251 and 252 each function as wiring. Insulating layers 263 and 332 are provided covering the conductive layer 252. The transistor 320 is provided on the insulating layer 332. An insulating layer 265 is provided covering the transistor 320. A capacitor 246 is provided on the insulating layer 265. The capacitor 246 and the transistor 320 are electrically connected by a plug 274. Layer 50 is provided on top of the insulating layer 263 of layer 40.

[0317] Transistor 320 can be used as a transistor constituting the pixel circuit 51. Transistor 310 can be used as a transistor constituting the pixel circuit 51 or as a transistor constituting a peripheral drive circuit. Transistors 310 and 320 can be used as transistors constituting a functional circuit, such as an arithmetic circuit or a memory circuit.

[0318] The display device 10 shown in Figure 25, with this configuration, allows for the formation of not only the pixel circuit 51 but also peripheral drive circuits, etc., directly beneath the layer 60 containing the light-emitting element 61. Therefore, the display device 10 shown in Figure 25 can be made smaller compared to the case where the drive circuits are located around the display area.

[0319] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0320] (Embodiment 3) This embodiment describes a transistor that can be used in a semiconductor device according to one aspect of the present invention.

[0321] <Example of transistor configuration> Figures 26A, 26B, and 26C are a top view and a cross-sectional view of a transistor 500 that can be used in a semiconductor device according to one aspect of the present invention. The transistor 500 can be applied to a semiconductor device according to one aspect of the present invention.

[0322] Figure 26A is a top view of transistor 500. Figures 26B and 26C are cross-sectional views of transistor 500. Here, Figure 26B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 26A. This is also a cross-sectional view of transistor 500 in the channel length direction. Figure 26C is a cross-sectional view of the area indicated by the dashed line A3-A4 in Figure 26A. This is also a cross-sectional view of transistor 500 in the channel width direction. Note that some elements have been omitted from the top view of Figure 26A for clarity.

[0323] As shown in Figure 26, the transistor 500 has a metal oxide 531a disposed on a substrate (not shown). It also has a metal oxide 531b disposed on top of the metal oxide 531a. It also has conductors 542a and 542b disposed spaced apart from each other on top of the metal oxide 531b. It also has an insulator 580 disposed on top of the conductors 542a and 542b, with an opening formed between the conductors 542a and 542b. It also has a conductor 560 disposed within the opening. It also has an insulator 550 disposed between the metal oxide 531b, conductor 542a, conductor 542b, insulator 580, and conductor 560. It also has a metal oxide 531c disposed between the metal oxide 531b, conductor 542a, conductor 542b, insulator 580, and insulator 550. Here, as shown in Figures 26B and 26C, it is preferable that the upper surface of the conductor 560 substantially coincides with the upper surfaces of the insulator 550, insulator 554, metal oxide 531c, and insulator 580. In the following, metal oxide 531a, metal oxide 531b, and metal oxide 531c may be collectively referred to as metal oxide 531. Also, conductors 542a and conductors 542b may be collectively referred to as conductor 542.

[0324] In the transistor 500 shown in Figure 26, the sides of the conductors 542a and 542b facing the conductor 560 have a generally vertical shape. However, the transistor 500 is not limited to this. In the transistor 500, the angle between the side and bottom surfaces of the conductors 542a and 542b may be 10° to 80°, preferably 30° to 60°. Also, the opposing sides of the conductors 542a and 542b may have multiple surfaces.

[0325] As shown in Figure 26, it is preferable that the transistor 500 has an insulator 554 positioned between the insulator 524, metal oxide 531a, metal oxide 531b, conductor 542a, conductor 542b, and metal oxide 531c and the insulator 580. Here, it is preferable that the insulator 554 is in contact with the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and metal oxide 531b, and the top surface of the insulator 524, as shown in Figures 26B and 26C.

[0326] In the transistor 500 shown in Figure 26, the metal oxide 531 is configured by stacking three layers of metal oxide 531a, metal oxide 531b, and metal oxide 531c in the region where the channel is formed (hereinafter also referred to as the channel formation region) and its vicinity. However, the present invention is not limited to this configuration. For example, the metal oxide 531 may have a two-layer structure of metal oxide 531b and metal oxide 531c, or a stacked structure of four or more layers. Also, in the transistor 500 shown in Figure 26, the conductor 560 has a two-layer stacked structure. However, the present invention is not limited to this configuration. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers. Furthermore, for example, the metal oxide 531 may have a stacked structure of two or more layers each of metal oxide 531a, metal oxide 531b, and metal oxide 531c.

[0327] For example, if the metal oxide 531c has a layered structure consisting of a first metal oxide and a second metal oxide provided on the first metal oxide, it is preferable that the first metal oxide has the same composition as metal oxide 531b and the second metal oxide has the same composition as metal oxide 531a.

[0328] Here, the conductor 560 functions as the gate electrode of the transistor. Conductors 542a and 542b function as the source electrode or drain electrode of the transistor, respectively. As described above, the conductor 560 is formed to be embedded in the opening of the insulator 580 and in the region sandwiched between conductors 542a and 542b. Here, the arrangement of conductors 560, 542a, and 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. In other words, one aspect of the present invention allows the gate electrode of the transistor 500 to be positioned in a self-aligned manner between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing a margin for alignment. As a result, the occupied area of ​​the transistor 500 can be reduced. This allows for a higher resolution display device. It also allows for a narrower bezel display device.

[0329] As shown in Figure 26, it is preferable that the conductor 560 has a conductor 560a provided inside the insulator 550 and a conductor 560b provided so as to be embedded inside the conductor 560a.

[0330] The transistor 500 preferably includes an insulator 514 disposed on a substrate (not shown), an insulator 516 disposed on top of the insulator 514, a conductor 505 disposed so as to be embedded in the insulator 516, an insulator 522 disposed on top of the insulator 516 and the conductor 505, and an insulator 524 disposed on top of the insulator 522. Furthermore, it is preferable that a metal oxide 531a is disposed on top of the insulator 524.

[0331] It is preferable that insulators 574 and 581, which function as interlayer films, are placed on top of the transistor 500. Here, it is preferable that insulator 574 is placed in contact with the upper surfaces of conductor 560, insulator 550, insulator 554, metal oxide 531c, and insulator 580.

[0332] It is preferable that insulators 522, 554, and 574 have a function to suppress the diffusion of hydrogen (for example, at least one such as hydrogen atoms and hydrogen molecules). For example, it is preferable that insulators 522, 554, and 574 have lower hydrogen permeability than insulators 524, 550, and 580. It is also preferable that insulators 522 and 554 have a function to suppress the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules). For example, it is preferable that insulators 522 and 554 have lower oxygen permeability than insulators 524, 550, and 580.

[0333] Here, insulators 524, metal oxide 531, and insulator 550 are separated from insulators 580 and 581 by insulators 554 and 574. Therefore, insulators 554 and 574 can prevent impurities such as hydrogen and excess oxygen contained in insulators 580 and 581 from contaminating insulators 524, metal oxide 531, and insulator 550.

[0334] It is preferable that a conductor 545 (conductor 545a and conductor 545b) is provided that is electrically connected to the transistor 500 and functions as a plug. In addition, an insulator 541 (insulator 541a and insulator 541b) is provided in contact with the side surface of the conductor 545 that functions as a plug. That is, the insulator 541 is provided in contact with the inner wall of the opening of the insulator 554, insulator 580, insulator 574, and insulator 581. Alternatively, the first conductor of the conductor 545 may be provided in contact with the side surface of the insulator 541, and the second conductor of the conductor 545 may be provided inside the first conductor of the conductor 545. Here, the height of the upper surface of the conductor 545 and the height of the upper surface of the insulator 581 can be made to be approximately the same. In the transistor 500 shown in Figure 26, the first conductor and the second conductor of the conductor 545 are stacked, but the present invention is not limited to this. For example, the conductor 545 may be provided as a single layer or as a stacked structure of three or more layers. When a structure has a stacked structure, an ordinal number may be assigned to distinguish it according to the order of formation.

[0335] In transistor 500, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 531 (metal oxide 531a, metal oxide 531b, and metal oxide 531c) that includes the channel formation region. For example, it is preferable to use a metal oxide with a band gap of 2 eV or more, preferably 2.5 eV or more, as the metal oxide that forms the channel formation region of metal oxide 531.

[0336] The above metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). In addition, it is preferable that it contains element M. As element M, one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co) can be used. In particular, it is preferable that element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Furthermore, it is even more preferable that element M contains either Ga or Sn, or both.

[0337] Furthermore, as shown in Figure 26B, the thickness of the metal oxide 531b in the region that does not overlap with the conductor 542 may be thinner than the thickness of the region that overlaps with the conductor 542. This is because, when forming the conductors 542a and 542b, a portion of the region on the upper surface of the metal oxide 531b that does not overlap with the conductors 542a and 542b is removed. Here, when a conductive film that will become the conductor 542 is deposited on the upper surface of the metal oxide 531b, a region with low resistance may be formed near the interface with the conductive film. Therefore, the transistor 500 can prevent the formation of a channel in the region by removing the region with low resistance located between the conductors 542a and 542b on the upper surface of the metal oxide 531b.

[0338] One aspect of the present invention provides a display device with high resolution by having a small-sized transistor. Alternatively, it provides a display device with high brightness by having a transistor with a large on-current. Alternatively, it provides a display device with fast operation by having a transistor with fast operation. Alternatively, it provides a display device with high reliability by having a transistor with stable electrical characteristics. Alternatively, it provides a display device with low power consumption by having a transistor with a small off-current.

[0339] A detailed configuration of the transistor 500, which can be used in a display device according to one aspect of the present invention, will be described.

[0340] The conductor 505 is arranged to have an overlapping region with the metal oxide 531 and the conductor 560. Furthermore, it is preferable that the conductor 505 is embedded in the insulator 516.

[0341] The conductor 505 comprises conductor 505a, conductor 505b, and conductor 505c. Conductor 505a is provided in contact with the bottom surface and side wall of an opening provided in the insulator 516. Conductor 505b is provided so as to be embedded in a recess formed in conductor 505a. Here, the upper surface of conductor 505b is lower than the upper surface of conductor 505a and the upper surface of the insulator 516. Conductor 505c is provided in contact with the upper surface of conductor 505b and the side surface of conductor 505a. Here, the height of the upper surface of conductor 505c is approximately equal to the height of the upper surface of conductor 505a and the upper surface of the insulator 516. In other words, conductor 505b is enclosed by conductors 505a and conductor 505c.

[0342] It is preferable that the conductors 505a and 505c use conductive materials that have the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., N2O, NO, or NO2), or copper atoms. Alternatively, it is preferable to use conductive materials that have the function of suppressing the diffusion of oxygen (e.g., at least one such as oxygen atoms and oxygen molecules).

[0343] By using conductive materials that have the function of reducing hydrogen diffusion, conductors 505a and 505c can suppress the diffusion of impurities such as hydrogen contained in conductor 505b into the metal oxide 531 via, for example, an insulator 524. Furthermore, by using conductive materials that have the function of suppressing oxygen diffusion, conductors 505a and 505c can suppress the oxidation of conductor 505b and the resulting decrease in conductivity. As conductive materials that have the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Therefore, conductor 505a can be made of the above conductive material in a single layer or in a laminate. For example, titanium nitride can be used for conductor 505a.

[0344] Furthermore, it is preferable to use a conductive material whose main component is tungsten, copper, or aluminum for the conductor 505b. For example, tungsten may be used for the conductor 505b.

[0345] Here, conductor 560 may function as the first gate (also called the top gate) electrode. Conductor 505 may function as the second gate (also called the bottom gate) electrode. In this case, transistor 500 can control its Vth by independently changing the potential applied to conductor 505 from the potential applied to conductor 560. In particular, by applying a negative potential to conductor 505, it is possible to make the Vth of transistor 500 greater than 0V and reduce the off-current. Therefore, applying a negative potential to conductor 505 reduces the drain current when the potential applied to conductor 560 is 0V compared to not applying a negative potential.

[0346] The conductor 505 should be larger than the channel-forming region in the metal oxide 531. In particular, as shown in Figure 26C, it is preferable that the conductor 505 extends to the region outside the end that intersects the channel width direction of the metal oxide 531. That is, it is preferable that the conductor 505 and the conductor 560 are superimposed on the outside of the side surface in the channel width direction of the metal oxide 531, with an insulator in between.

[0347] With the above configuration, transistor 500 can electrically surround the channel-forming region of the metal oxide 531 with the electric field of conductor 560, which functions as a first gate electrode, and the electric field of conductor 505, which functions as a second gate electrode.

[0348] As shown in Figure 26C, the conductor 505 extends and functions as wiring. However, the present invention is not limited to this, and in one embodiment, a conductor that functions as wiring may be provided below the conductor 505.

[0349] The insulator 514 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen from the substrate side into the transistor 500. Therefore, it is preferable to use an insulating material for the insulator 514 that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., N2O, NO, or NO2), or copper atoms (the above impurities are less permeable). Alternatively, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (the above oxygen is less permeable).

[0350] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 514. This allows the insulator 514 to suppress the diffusion of impurities such as water or hydrogen from the substrate side to the transistor 500 side. Alternatively, the insulator 514 can suppress the diffusion of oxygen contained in, for example, the insulator 524, to the substrate side beyond the insulator 514.

[0351] The insulators 516, 580, and 581, which function as interlayer films, preferably have a lower dielectric constant than insulator 514. In one aspect of the present invention, by using a material with a low dielectric constant as the interlayer film, parasitic capacitance occurring between wiring can be reduced. For example, as insulators 516, 580, and 581, appropriate materials such as silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or silicon oxide with vacancies may be used.

[0352] Insulators 522 and 524 function as gate insulators.

[0353] Here, the insulator 524 in contact with the metal oxide 531 preferably desorbs oxygen upon heating. In this specification, the oxygen desorbed upon heating may be referred to as excess oxygen. For example, the insulator 524 may be appropriately silicon oxide, silicon oxynitride, or the like. By providing the oxygen-containing insulator 524 in contact with the metal oxide 531, the oxygen deficiency in the metal oxide 531 can be reduced, and the reliability of the transistor 500 can be improved.

[0354] Specifically, it is preferable to use an oxide material for the insulator 524 that desorbs some oxygen upon heating. An oxide that desorbs oxygen upon heating is one in which the desorption amount of oxygen converted to oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more, which is an oxide film. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0355] As shown in FIG. 26C, the film thickness of the region where the insulator 524 does not overlap with the insulator 554 and does not overlap with the metal oxide 531b may be thinner than the film thickness of the other regions. In the insulator 524, the film thickness of the region where it does not overlap with the insulator 554 and does not overlap with the metal oxide 531b is preferably a film thickness that allows sufficient diffusion of the above oxygen.

[0356] The insulator 522 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 500 from the substrate side, similar to, for example, the insulator 514. For example, the insulator 522 preferably has lower hydrogen permeability than the insulator 524. In one aspect of the present invention, by surrounding, for example, the insulator 524, the metal oxide 531, and the insulator 550 with the insulator 522, the insulator 554, and the insulator 574, it is possible to suppress the ingress of impurities such as water or hydrogen into the transistor 500 from the outside.

[0357] Furthermore, it is preferable that the insulator 522 has a function to suppress the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules) (i.e., it is difficult for the above-mentioned oxygen to permeate through it). For example, it is preferable that the insulator 522 has lower oxygen permeability than the insulator 524. By having a function to suppress the diffusion of oxygen and impurities, the insulator 522 can reduce the diffusion of oxygen contained in the metal oxide 531 to the substrate side. In addition, it can suppress the reaction of the conductor 505 with the oxygen contained in the insulator 524 and the metal oxide 531.

[0358] The insulator 522 may be an insulator containing an oxide of either or both aluminum and hafnium, which are insulating materials. For example, it is preferable to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) as the insulator containing either or both aluminum and hafnium oxides. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the metal oxide 531 and the incorporation of impurities such as hydrogen from the periphery of the transistor 500 into the metal oxide 531.

[0359] Alternatively, the insulator 522 may have, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide added to these insulators. Alternatively, these insulators may be nitrided. Alternatively, silicon oxide, silicon oxide nitride, or silicon nitride may be laminated onto the above insulators.

[0360] The insulator 522 may be a single-layer or multi-layer insulator containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulator in transistor 500, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0361] Furthermore, the insulators 522 and 524 may have a laminated structure of two or more layers. In that case, the laminated structure is not limited to being made of the same material, but may be made of different materials. For example, an insulator similar to the insulator 524 may be provided below the insulator 522.

[0362] The metal oxide 531 comprises a metal oxide 531a, a metal oxide 531b on the metal oxide 531a, and a metal oxide 531c on the metal oxide 531b. By having the metal oxide 531a below the metal oxide 531b, the diffusion of impurities from structures formed below the metal oxide 531a to the metal oxide 531b can be suppressed. Furthermore, by having the metal oxide 531c on the metal oxide 531b, the diffusion of impurities from structures formed above the metal oxide 531c to the metal oxide 531b can be suppressed.

[0363] Furthermore, it is preferable that the metal oxide 531 has a layered structure of multiple oxide layers with different atomic ratios of each metal atom. For example, if the metal oxide 531 contains at least indium (In) and element M, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 531a to the total number of atoms of all elements constituting metal oxide 531a is higher than the ratio of the number of atoms of element M contained in metal oxide 531b to the total number of atoms of all elements constituting metal oxide 531b. It is also preferable that the atomic ratio of element M contained in metal oxide 531a to In is higher than the atomic ratio of element M contained in metal oxide 531b to In. Here, metal oxide 531c can be any metal oxide that can be used for metal oxide 531a or metal oxide 531b.

[0364] It is preferable that the energy at the lower end of the conduction band of metal oxide 531a and metal oxide 531c is higher than the energy at the lower end of the conduction band of metal oxide 531b. In other words, it is preferable that the electron affinity of metal oxide 531a and metal oxide 531c is smaller than the electron affinity of metal oxide 531b. In this case, it is preferable that metal oxide 531c is a metal oxide that can be used for metal oxide 531a. Specifically, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 531c to the total number of atoms of all elements constituting metal oxide 531c is higher than the ratio of the number of atoms of element M contained in metal oxide 531b to the total number of atoms of all elements constituting metal oxide 531b. It is also preferable that the atomic ratio of element M contained in metal oxide 531c to In is higher than the atomic ratio of element M contained in metal oxide 531b to In.

[0365] Here, the energy levels at the lower end of the conduction band at the junctions of metal oxide 531a, metal oxide 531b, and metal oxide 531c change smoothly. In other words, the energy levels at the lower end of the conduction band at the junctions of metal oxide 531a, metal oxide 531b, and metal oxide 531c can be said to change continuously or be continuously joined. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between metal oxide 531a and metal oxide 531b, and at the interface between metal oxide 531b and metal oxide 531c.

[0366] Specifically, metal oxides 531a and 531b, and metal oxides 531b and 531c, share a common element other than oxygen (which serves as the main component), thereby enabling the formation of a mixed layer with a low defect level density. For example, if metal oxide 531b is In-Ga-Zn oxide, metal oxides 531a and 531c may be, for example, In-Ga-Zn oxide, Ga-Zn oxide, or gallium oxide. Furthermore, metal oxide 531c may be in a layered structure. For example, a layered structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, metal oxide 531c may be in a layered structure of In-Ga-Zn oxide and an oxide that does not contain In.

[0367] Specifically, for metal oxide 531a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. For metal oxide 531b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2 may be used. For metal oxide 531c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, In:Ga:Zn = 4:2:3, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Furthermore, specific examples of layered structures for metal oxide 531c include, for example, a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], or a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0368] In this case, the main carrier pathway in metal oxide 531 is metal oxide 531b. By configuring metal oxide 531a and metal oxide 531c as described above, the defect level density at the interface between metal oxide 531a and metal oxide 531b, and at the interface between metal oxide 531b and metal oxide 531c, can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced in metal oxide 531b. Thus, transistor 500 can obtain high on-current and high frequency characteristics. Furthermore, when metal oxide 531c is in a stacked structure, in addition to the effect of reducing the defect level density at the interface between metal oxide 531b and metal oxide 531c as described above, the metal oxide 531c can suppress the diffusion of its constituent elements to the insulator 550 side. More specifically, when an in-free oxide is laminated on top of the metal oxide 531c, the metal oxide 531c can suppress the diffusion of in to the insulator 550. The insulator 550 functions as a gate insulator. Therefore, if in diffuses into the insulator 550, the transistor 500 will exhibit poor characteristics. Thus, one aspect of the present invention makes it possible to provide a highly reliable display device by using a laminated structure for the metal oxide 531c.

[0369] Conductors 542 (conductors 542a and 542b) that function as source electrodes and drain electrodes are provided on a metal oxide 531b. The conductors 542 are preferably made of metal elements selected from, for example, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, alloys composed of the above metal elements, or alloys combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0370] By providing the conductor 542 in contact with the metal oxide 531, the oxygen concentration in the vicinity of the conductor 542 may be reduced. Furthermore, a metal compound layer containing the metal in the conductor 542 and the components of the metal oxide 531 may be formed in the vicinity of the conductor 542. In such cases, the carrier density of the region of the metal oxide 531 near the conductor 542 increases, resulting in a low-resistance region.

[0371] Here, the region between the conductor 542a and the conductor 542b is formed superimposed on the opening of the insulator 580. This allows the transistor 500 to self-align the conductor 560 between the conductor 542a and the conductor 542b.

[0372] The insulator 550 functions as a gate insulator. It is preferable that the insulator 550 be placed in contact with the upper surface of the metal oxide 531c. The insulator 550 can be silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable.

[0373] Similar to the insulator 524, it is preferable that the insulator 550 has a reduced concentration of impurities such as water or hydrogen. The film thickness of the insulator 550 is preferably 1 nm or more and 20 nm or less.

[0374] In the transistor 500, a metal oxide may be provided between the insulator 550 and the conductor 560. It is preferable that the metal oxide suppresses oxygen diffusion from the insulator 550 to the conductor 560. This allows the metal oxide to suppress oxidation of the conductor 560 by oxygen in the insulator 550.

[0375] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 550, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By forming a laminated structure of the insulator 550 and the metal oxide, the gate insulator can be made thermally stable and have a high dielectric constant. Therefore, the transistor 500 can reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it becomes possible to thin the equivalent oxide thickness (EOT) of the insulator that functions as a gate insulator.

[0376] Specifically, the metal oxide can be one or more metal oxides selected from, for example, hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, and magnesium. In particular, it is preferable to use an insulator containing one or both of aluminum and hafnium oxides, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0377] Although the conductor 560 is shown as a two-layer structure in Figure 26, it may also be a single-layer structure or a laminated structure of three or more layers.

[0378] It is preferable to use a conductor 560a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), or copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules).

[0379] The conductor 560a has the function of suppressing oxygen diffusion, thereby preventing the oxidation of the conductor 560b by the oxygen contained in the insulator 550 and the resulting decrease in conductivity. It is preferable to use a conductive material with the function of suppressing oxygen diffusion, such as tantalum, tantalum nitride, ruthenium, or ruthenium oxide.

[0380] The conductor 560b is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, since the conductor 560 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. The conductor 560b may also have a laminated structure. For example, it may have a laminated structure of titanium or titanium nitride and the above-mentioned conductive material.

[0381] As shown in Figures 26A and 26C, in the region of the metal oxide 531b that does not overlap with the conductor 542, in other words, in the channel-forming region of the metal oxide 531, the side surface of the metal oxide 531 is covered by the conductor 560. This makes it easier to apply the electric field of the conductor 560, which functions as the first gate electrode, to the side surface of the metal oxide 531. Therefore, the on-current of the transistor 500 can be increased and the frequency characteristics can be improved.

[0382] The insulator 554 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 500 from the insulator 580 side, similar to the insulator 514, for example. For example, the insulator 554 preferably has lower hydrogen permeability than the insulator 524. Furthermore, as shown in Figures 26B and 26C, the insulator 554 preferably contacts the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and metal oxide 531b, and the top surface of the insulator 524. With this configuration, the insulator 554 can suppress the ingress of hydrogen contained in the insulator 580 into the metal oxide 531 from the top or side surfaces of the conductor 542a, conductor 542b, metal oxide 531a, metal oxide 531b, and insulator 524.

[0383] Furthermore, it is preferable that the insulator 554 has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules) (i.e., it is difficult for the above-mentioned oxygen to permeate through it). For example, it is preferable that the insulator 554 has lower oxygen permeability than the insulator 580 or the insulator 524.

[0384] The insulator 554 is preferably deposited using a sputtering method. By depositing the insulator 554 using a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the vicinity of the region of the insulator 524 that is in contact with the insulator 554. As a result, the insulator 554 can supply oxygen to the metal oxide 531 from that region through the insulator 524. Here, the insulator 554 has a function to suppress upward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 to the insulator 580. In addition, the insulator 522 has a function to suppress downward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 to the substrate side. In this way, the transistor 500 is supplied with oxygen to the channel formation region of the metal oxide 531. This reduces oxygen deficiency in the metal oxide 531 and suppresses the normally-on state of the transistor.

[0385] The insulator 554 may be formed by depositing an insulator containing an oxide of one or both aluminum and hafnium. It is preferable to use an insulator containing an oxide of one or both aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing both aluminum and hafnium (hafnium aluminate).

[0386] The insulator 554, which has barrier properties against hydrogen, covers the insulators 524, 550, and 531, thereby separating the insulator 580 from the insulators 524, 531, and 550. As a result, the insulator 554 can prevent impurities such as hydrogen from entering the transistor 500 from the outside. Therefore, the transistor 500 can be given good electrical characteristics and reliability.

[0387] The insulator 580 is provided on the insulator 524, the metal oxide 531, and the conductor 542 via the insulator 554. For example, the insulator 580 is preferably made of silicon oxide, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, or porous silicon oxide are particularly preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0388] Preferably, the insulator 580 has a reduced concentration of impurities such as water or hydrogen. Furthermore, the upper surface of the insulator 580 may be flattened.

[0389] The insulator 574 preferably functions as a barrier insulating film that suppresses the mixing of impurities, such as water or hydrogen, into the insulator 580 from above, similar to the insulator 514, for example. The insulator 574 may be any insulator that can be used for the insulator 514 or the insulator 554, for example.

[0390] It is preferable that the insulator 581, which functions as an interlayer film, is provided on top of the insulator 574. It is preferable that the insulator 581, like the insulator 524, has a reduced concentration of impurities such as water or hydrogen in the film.

[0391] Conductors 545a and 545b are arranged in openings formed in insulators 581, 574, 580, and 554. Conductors 545a and 545b are also provided facing each other with conductor 560 in between. The height of the upper surfaces of conductors 545a and 545b may be on the same plane as the upper surface of insulator 581.

[0392] Furthermore, the insulator 541a is provided in contact with the inner walls of the openings of insulators 581, 574, 580, and 554. Also, the first conductor of the conductor 545a is formed in contact with the side surface of insulator 541a. Conductor 542a is located in at least a portion of the bottom of the opening and is in contact with conductor 545a. Similarly, the insulator 541b is provided in contact with the inner walls of the openings of insulators 581, 574, 580, and 554. Also, the first conductor of conductor 545b is formed in contact with the side surface of insulator 541b. Conductor 542b is located in at least a portion of the bottom of the opening and is in contact with conductor 545b.

[0393] It is preferable that the conductors 545a and 545b are made of conductive materials mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors 545a and 545b may be arranged in a laminated structure.

[0394] When the conductor 545 is in a laminated structure, it is preferable to use a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen, as described above, for the conductors in contact with the metal oxide 531a, metal oxide 531b, conductor 542, insulator 554, insulator 580, insulator 574, and insulator 581. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or laminate. By using the conductive material, it is possible to suppress the absorption of oxygen added to the insulator 580 into the conductors 545a and 545b. In addition, it is possible to suppress the mixing of impurities such as water or hydrogen from the layer above the insulator 581 into the metal oxide 531 through the conductors 545a and 545b.

[0395] For insulators 541a and 541b, any insulator that can be used for insulator 554, for example, may be used. Since insulators 541a and 541b are provided in contact with insulator 554, it is possible to suppress the mixing of impurities such as water or hydrogen from, for example, insulator 580, etc., into the metal oxide 531 through conductors 545a and 545b. In addition, insulators 541a and 541b can suppress the absorption of oxygen contained in insulator 580 into conductors 545a and 545b.

[0396] Although not shown in the figures, conductors functioning as wiring may be placed in contact with the upper surfaces of conductor 545a and conductor 545b. It is preferable that the conductors functioning as wiring are made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors may have a laminated structure. For example, they may be laminated with titanium or titanium nitride and the conductive material. The conductors may also be formed to be embedded in openings provided in the insulator.

[0397] <Materials used in transistors> This section describes the constituent materials that can be used in transistors.

[0398] [substrate] The substrate for forming the transistor 500 may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (e.g., yttria-stabilized zirconia substrates), or resin substrates. Examples of semiconductor substrates include silicon or germanium semiconductor substrates, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, some semiconductor substrates have insulating regions within them (e.g., SOI (Silicon On Insulator) substrates). Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, or conductive resin substrates. Other examples of conductive substrates include substrates containing metal nitrides or metal oxides. Furthermore, the substrate may include, for example, a substrate on which a conductor or semiconductor is provided on an insulating substrate, a substrate on which a conductor or insulator is provided on a semiconductor substrate, or a substrate on which a semiconductor or insulator is provided on a conductive substrate. In addition, the substrate may be one on which elements are provided. Examples of elements provided on the substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, or memory elements.

[0399] [Insulator] Examples of insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, metal oxides, metal oxidized nitrides, or metal nitride oxides.

[0400] For example, as transistors become smaller and more integrated, the thinning of the gate insulator can lead to problems such as leakage current. Using a high-k material for the gate insulator allows for lower voltage operation while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the interlayer film reduces parasitic capacitance between wiring. Therefore, the material of the insulator should be selected according to its function.

[0401] Examples of insulators with a high dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxides containing aluminum and hafnium, oxides containing silicon and hafnium, oxides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0402] Examples of insulators with low dielectric constants include silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with vacancies, or resins.

[0403] Transistors using oxide semiconductors can have their electrical properties stabilized by surrounding them with an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen (for example, insulators 514, 522, 554, and 574). For example, the insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen can be an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum, used in a single layer or multilayer configuration. Specifically, for example, the insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen can be a metal oxide such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, or a metal nitride such as aluminum nitride, titanium aluminum nitride, titanium nitride, silicon oxide nitride, or silicon nitride.

[0404] The insulator that functions as a gate insulator is preferably an insulator that has a region containing oxygen that is released by heating. For example, silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating can be structured to be in contact with the metal oxide 531, thereby compensating for the oxygen deficiency of the metal oxide 531.

[0405] [conductor] The conductor is preferably a metallic element selected from, for example, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy composed of the above metallic elements, or an alloy combining the above metallic elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Furthermore, the conductor may be a semiconductor with high electrical conductivity, such as polycrystalline silicon containing impurity elements like phosphorus, or a silicide such as nickel silicide.

[0406] The conductor may be formed by stacking multiple conductors made of the above materials. For example, a layered structure may be formed by combining the aforementioned metal element material with an oxygen-containing conductive material. Alternatively, a layered structure may be formed by combining the aforementioned metal element material with a nitrogen-containing conductive material. Furthermore, a layered structure may be formed by combining the aforementioned metal element material with an oxygen-containing conductive material and a nitrogen-containing conductive material.

[0407] Furthermore, when a metal oxide is used in the channel formation region of a transistor, it is preferable to use a laminated structure for the conductor that functions as the gate electrode, which combines a material containing the aforementioned metal element with a conductive material containing oxygen. In this case, it is preferable to place the conductive material containing oxygen on the channel formation region side. By placing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is more easily supplied to the channel formation region.

[0408] In particular, the conductor functioning as the gate electrode is preferably made of a conductive material containing the metal element and oxygen contained in the metal oxide in which the channel is formed. Alternatively, the conductor may be made of a conductive material containing the aforementioned metal element and nitrogen. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or silicon-doped indium tin oxide may be used. Alternatively, indium gallium zinc oxide containing nitrogen may be used. By using such materials, the conductor may be able to capture hydrogen contained in the metal oxide in which the channel is formed. It may also be able to capture hydrogen that is mixed in from, for example, an external insulator.

[0409] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0410] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0411] (Embodiment 4) This embodiment describes metal oxides (hereinafter also referred to as oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0412] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 27A. Figure 27A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0413] As shown in Figure 27A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous materials. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) (excluding single crystal and polycrystal). Note that single crystal, polycrystal, and completely amorphous materials are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal materials.

[0414] The structure within the thick frame shown in Figure 27A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as being different from "Crystal" or the energetically unstable "Amorphous."

[0415] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 27B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline" (the horizontal axis is 2θ [deg.], and the vertical axis represents intensity in arbitrary units (au)). The GIXD method is also called the thin-film method or the Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 27B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 27B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 27B is 500 nm.

[0416] As shown in Figure 27B, the CAAC-IGZO film exhibits a clear crystallinity peak in its XRD spectrum. Specifically, the CAAC-IGZO film shows a peak indicating c-axis orientation near 2θ=31° in its XRD spectrum. As shown in Figure 27B, the peak near 2θ=31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0417] The crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed by nano-beam electron diffraction (NBED). Figure 27C shows the diffraction pattern of a CAAC-IGZO film. Figure 27C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 27C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. In nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0418] As shown in Figure 27C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0419] [Structure of oxide semiconductors] Note that when focusing on structure, oxide semiconductors may be classified differently from those shown in Figure 27A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Furthermore, non-single-crystal oxide semiconductors include, for example, polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0420] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0421] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, in which the c-axis of these crystalline regions is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If the atomic arrangement is considered a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction. These regions may exhibit distortion. Distortion refers to a point in the region where multiple crystalline regions are connected where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0422] Each of the above-mentioned crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of multiple minute crystals, the maximum diameter of that crystalline region may be around several tens of nm.

[0423] In In-M-Zn oxide (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, and titanium), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. The In layer may also contain element M. The In layer may also contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM (Transmission Electron Microscope) images.

[0424] When CAAC-OS films are structurally analyzed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning reveal a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the c-axis orientation peak (value of 2θ) may vary depending on the type of metal element or composition constituting the CAAC-OS.

[0425] Furthermore, for example, CAAC-OS films exhibit multiple bright spots in their electron diffraction patterns. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0426] When the crystalline region of CAAC-OS is observed from the specific direction described above, the lattice arrangement within that region is based on a hexagonal lattice. However, the unit cell of this lattice arrangement is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, CAAC-OS may have pentagonal or heptagonal lattice arrangements under the aforementioned strain. Moreover, it is difficult to confirm clear grain boundaries in CAAC-OS even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed in CAAC-OS due to the strain in the lattice arrangement. This may be because CAAC-OS can tolerate strain due to factors such as the non-dense arrangement of oxygen atoms in the ab-plane direction, or the change in interatomic bond distances due to the substitution of metal atoms.

[0427] A crystal structure in which clear grain boundaries are observed is called a polycrystalline material. Grain boundaries act as recombination centers, trapping carriers. This is likely to cause a decrease in the on-current of the transistor or a decrease in field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides that has a crystal structure suitable for the semiconductor layer of a transistor. In addition, a CAAC-OS configuration containing Zn is preferred. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they can suppress the generation of grain boundaries more effectively than In oxide.

[0428] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities and the generation of defects. For this reason, CAAC-OS can be considered an oxide semiconductor with few impurities and defects (e.g., oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors can increase the flexibility of the manufacturing process for those OS transistors.

[0429] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. The size of these minute crystals is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. For this reason, these minute crystals are also called nanocrystals. Furthermore, nc-OS does not show any regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the entire film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS and amorphous oxide semiconductors. For example, when an nc-OS film is structurally analyzed using an XRD instrument, no peak indicating crystallinity is detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when an nc-OS film is subjected to electron diffraction (also called limited-field electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystals (e.g., 50 nm or more), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0430] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. In other words, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0431] [Oxide semiconductor configuration] Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0432] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0433] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, and the first region being distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0434] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0435] Specifically, the first region described above is a region whose main component is indium oxide or indium zinc oxide, etc. The second region described above is a region whose main component is gallium oxide or gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0436] Furthermore, it may be difficult to observe a clear boundary between the first region and the second region described above.

[0437] For example, in CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy-dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0438] Therefore, when CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to provide a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material and insulating function in part of the material, and the material as a whole has semiconductor function. That is, by separating the conductive function and the insulating function, both functions can be maximized. Thus, by using CAC-OS in a transistor, the transistor can achieve high on-current (Ion), high field-effect mobility (μ), and good switching operation.

[0439] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0440] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0441] By using the above-mentioned oxide semiconductor in a transistor, the transistor can achieve high field-effect mobility and high reliability.

[0442] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO") as the semiconductor layer in which the channel is formed in the transistor. Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0443] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 That concludes the explanation. Furthermore, in oxide semiconductors, to lower the carrier concentration, the defect level density can be reduced by lowering the impurity concentration in the oxide semiconductor film. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0444] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have a low defect level density, which may result in a low trap level density.

[0445] Charges trapped in the trap levels of oxide semiconductors can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high density of trap levels may exhibit unstable electrical properties.

[0446] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, or silicon.

[0447] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0448] In oxide semiconductors, defect levels are formed when silicon or carbon, which are elements of Group 14, are present. Therefore, the concentration of silicon or carbon in the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) is 2 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0449] Oxide semiconductors, when containing alkali metals or alkaline earth metals, can form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in oxide semiconductors obtained by SIMS is 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0450] When nitrogen is present in an oxide semiconductor, the presence of electrons (carriers) increases the carrier concentration, making it more prone to becoming n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, when nitrogen is present in an oxide semiconductor, trap levels may be formed. This can result in unstable electrical properties of the transistor. Therefore, the nitrogen concentration in oxide semiconductors obtained by SIMS should be 5 × 10⁻⁶. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0451] When oxide semiconductors contain hydrogen, it can react with oxygen bonded to metal atoms to form water, thus creating oxygen vacancies. Furthermore, hydrogen can fill these oxygen vacancies, generating electrons, which act as carriers. In addition, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, the hydrogen concentration in oxide semiconductors obtained by SIMS is 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0452] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, the transistor can be given stable electrical characteristics.

[0453] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0454] (Embodiment 5) This embodiment describes electronic equipment to which a semiconductor device according to one aspect of the present invention can be applied.

[0455] A semiconductor device according to one aspect of the present invention can be applied to the display unit of an electronic device. Therefore, one aspect of the present invention can realize an electronic device with high display quality. Alternatively, one aspect of the present invention can realize an electronic device with extremely high resolution. Alternatively, one aspect of the present invention can realize an electronic device with high reliability.

[0456] Electronic devices using semiconductor devices according to one aspect of the present invention include, for example, televisions, display devices such as monitors, lighting devices, desktop or notebook personal computers, word processors, and DVDs (Digital Versatile). Examples include image playback devices that play still images or videos stored on recording media such as discs, portable CD players, radios, tape recorders, headphone stereos, stereos, desk clocks, wall clocks, cordless telephone handsets, transceivers, car phones, mobile phones, personal digital assistants, tablet devices, portable game consoles, fixed game machines such as pachinko machines, calculators, electronic organizers, e-book readers, electronic translators, voice input devices, video cameras, digital still cameras, electric shavers, high-frequency heating devices such as microwave ovens, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioning equipment such as air conditioners, humidifiers, and dehumidifiers, dishwashers, dish dryers, clothes dryers, futon dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, DNA storage freezers, flashlights, tools such as chainsaws, smoke detectors, or medical equipment such as dialysis machines. Furthermore, examples include industrial equipment such as guide lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, power storage systems, or energy storage devices for power leveling and smart grids. Also, mobile devices propelled by engines using fuel or electric motors using electricity from energy storage devices may also fall under the category of electronic equipment. Examples of such mobile devices include electric vehicles (EVs), hybrid vehicles (HVs) that combine internal combustion engines and electric motors, plug-in hybrid vehicles (PHVs), tracked vehicles in which the tires and wheels of these vehicles are replaced with tracks, motorized bicycles including electric assist bicycles, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters, aircraft, rockets, satellites, space probes, planetary probes, or spacecraft.

[0457] An electronic device according to one aspect of the present invention may have a secondary battery. Furthermore, it is preferable that the secondary battery can be charged using contactless power transmission.

[0458] Examples of secondary batteries include lithium-ion secondary batteries, nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, and silver-zinc batteries.

[0459] An electronic device according to one aspect of the present invention may have an antenna. By receiving signals with the antenna, the display unit can display images and information. Furthermore, if the electronic device has an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0460] An electronic device according to one aspect of the present invention may have sensors (including, for example, those with functions to measure force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0461] An electronic device according to one aspect of the present invention can have various functions. For example, it can have a function to display various information (e.g., still images, videos, or text images) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to execute various software (programs), a wireless communication function, or a function to read programs or data recorded on a recording medium.

[0462] Furthermore, electronic devices having multiple display units may have functions such as displaying image information primarily on one part of the display unit and text information primarily on another part, or displaying a three-dimensional image by displaying images that take parallax into account on multiple display units. Furthermore, electronic devices having an image receiving unit may have functions such as capturing still images or moving images, automatically or manually correcting captured images, saving captured images to a recording medium (external or built into the electronic device), or displaying captured images on a display unit. However, the functions of an electronic device according to one aspect of the present invention are not limited to these. An electronic device according to one aspect of the present invention may have a variety of functions.

[0463] A semiconductor device according to one aspect of the present invention can display high-definition images. Therefore, it can be suitably used in portable electronic devices, wearable electronic devices, or e-book readers. For example, it can be suitably used in XR devices such as VR devices or AR devices.

[0464] Figure 28A shows the external appearance of the camera 8000 with the viewfinder 8100 attached.

[0465] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, and a shutter button 8004, etc. A detachable lens 8006 is also attached to the camera 8000. The lens 8006 and the housing of the camera 8000 may be integrated into a single unit.

[0466] Camera 8000 can take an image by pressing the shutter button 8004 or by touching the display unit 8002, which functions as a touch panel.

[0467] The housing 8001 has a mount with electrodes, and in addition to the viewfinder 8100, it can be connected to, for example, a strobe device or the like.

[0468] The viewfinder 8100 includes a housing 8101, a display unit 8102, and buttons 8103, etc.

[0469] The housing 8101 is attached to the camera 8000 by a mount that engages with the camera 8000's mount. The viewfinder 8100 can, for example, display images or other data received from the camera 8000 on the display unit 8102.

[0470] Button 8103 has a function such as a power button.

[0471] A semiconductor device according to one aspect of the present invention can be applied to the display unit 8002 of a camera 8000 and the display unit 8102 of a viewfinder 8100. The viewfinder 8100 may be built into the camera 8000.

[0472] Figure 28B shows the external appearance of the head-mounted display 8200.

[0473] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, and a cable 8205, among other components. The mounting section 8201 also has a built-in battery 8206.

[0474] Cable 8205 has the function of supplying power from battery 8206 to main unit 8203. Main unit 8203 is equipped with, for example, a wireless receiver and can display received video information on display unit 8204. In addition, main unit 8203 is equipped with, for example, a camera and can use information of the user's eyeball or eyelid movements as an input means.

[0475] Furthermore, the attachment unit 8201 may have a function to recognize gaze, for example, by providing a plurality of electrodes at a position that touches the user and is capable of detecting the current flowing in accordance with the user's eye movements. It may also have a function to monitor the user's pulse rate based on the current flowing through the electrodes. The attachment unit 8201 may also have various sensors, for example, a temperature sensor, a pressure sensor, or an acceleration sensor. The head-mounted display 8200 may have a function to display the user's biometric information on the display unit 8204, or a function to change the image displayed on the display unit 8204 in accordance with the user's head movements.

[0476] A semiconductor device according to one aspect of the present invention can be applied to a display unit 8204.

[0477] Figures 28C to 28E show the external appearance of the head-mounted display 8300. The head-mounted display 8300 includes a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305.

[0478] The user can view the display on the display unit 8302 through the lens 8305. It is preferable that the head-mounted display 8300 has the display unit 8302 positioned in a curved shape, for example, as this allows the user to experience a greater sense of presence. Furthermore, by viewing different images displayed in different areas of the display unit 8302 through the lens 8305, it is possible to perform, for example, a three-dimensional display using parallax. The configuration is not limited to having only one display unit 8302; for example, two display units 8302 may be provided, with one display unit for each of the user's eyes.

[0479] A semiconductor device according to one aspect of the present invention can be applied to a display unit 8302. A semiconductor device according to one aspect of the present invention can also achieve extremely high resolution. For example, even when the display is magnified using the lens 8305 as shown in Figure 28E, the pixels are difficult for the user to see. In other words, the display unit 8302 can be used to allow the user to view a highly realistic image.

[0480] Figure 28F shows the external appearance of a goggle-type head-mounted display 8400. The head-mounted display 8400 has a pair of housings 8401, a mounting part 8402, and a cushioning member 8403. A display unit 8404 and a lens 8405 are provided inside each of the pair of housings 8401. The pair of display units 8404 can display different images from each other to perform a three-dimensional display using parallax.

[0481] The user can view the display on the display unit 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism and its position can be adjusted according to the user's eyesight. The display unit 8404 is preferably square or a horizontally elongated rectangle. This can enhance the sense of realism.

[0482] The mounting portion 8402 is preferably adjustable to the size of the user's face and has plasticity and elasticity to prevent it from slipping off. Furthermore, it is preferable that a part of the mounting portion 8402 has a vibration mechanism that functions as, for example, a bone conduction earphone. This eliminates the need for separate earphones or speakers, allowing users to enjoy video and audio simply by wearing the device. The housing 8401 may also have a function to output audio data via, for example, wireless communication.

[0483] The mounting portion 8402 and the cushioning member 8403 are parts that come into contact with the user's face (forehead, cheeks, etc.). By ensuring that the cushioning member 8403 is in close contact with the user's face, light leakage can be prevented, thereby enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 8403 so that it adheres closely to the user's face when the user wears the head-mounted display 8400. For example, materials such as rubber, silicone rubber, urethane, or sponge can be used. Furthermore, if a material such as sponge is covered with cloth or leather (genuine leather or synthetic leather), gaps are less likely to form between the user's face and the cushioning member 8403, effectively preventing light leakage. In addition, using such materials is preferable because it feels good against the skin and, for example, prevents the user from feeling cold when wearing it in cold weather. It is preferable that the components that come into contact with the user's skin, such as the cushioning member 8403 or the mounting portion 8402, are removable, as this facilitates cleaning or replacement.

[0484] Figure 29A shows an example of a television system. The television system 7100 has a display unit 7000 incorporated into a housing 7101. Here, the housing 7101 is shown supported by a stand 7103.

[0485] In Figure 29A, a semiconductor device according to one aspect of the present invention can be applied to a display unit 7000.

[0486] The television device 7100 shown in Figure 29A can be operated by operating switches on the housing 7101 or by a separate remote control unit 7111. Alternatively, the display unit 7000 may be equipped with a touch sensor, allowing the television device 7100 to be operated by, for example, touching the display unit 7000 with a finger. The remote control unit 7111 may have a display unit that displays information output from the remote control unit 7111. The television device 7100 can operate channels or volume using the operation keys or touch panel on the remote control unit 7111. It can also operate the image displayed on the display unit 7000.

[0487] The television system 7100 can be configured to include, for example, a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver) or two-way (for example, between sender and receiver, or between receivers) information communication.

[0488] Figure 29B shows an example of a notebook personal computer. The notebook personal computer 7200 has a casing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214, etc. A display unit 7000 is incorporated into the casing 7211.

[0489] In Figure 29B, a semiconductor device according to one aspect of the present invention can be applied to a display unit 7000.

[0490] Figures 29C and 29D show examples of digital signage.

[0491] The digital signage 7300 shown in Figure 29C comprises a housing 7301, a display unit 7000, and a speaker 7303, etc. Furthermore, it may have LED lamps, operation keys (including a power switch or operation switches), connection terminals, various sensors, or a microphone, etc.

[0492] Figure 29D shows a digital signage system mounted on a cylindrical column. The digital signage system 7400 has a display unit 7000 that is provided along the curved surface of the column 7401.

[0493] In Figures 29C and 29D, a semiconductor device according to one aspect of the present invention can be applied to a display unit 7000.

[0494] The larger the display area of ​​the Digital Signage 7300 or Digital Signage 7400, the more information can be displayed at once. Furthermore, a larger display area makes it more eye-catching, which can, for example, enhance the effectiveness of advertisements.

[0495] Furthermore, it is preferable to apply a touch panel to the display unit 7000 of the digital signage 7300 or digital signage 7400. This allows not only images or videos to be displayed on the display unit 7000, but also to be operated intuitively by the user. In addition, when used for purposes such as providing route information or traffic information, intuitive operation can enhance usability.

[0496] Furthermore, as shown in Figures 29C and 29D, it is preferable that the digital signage 7300 or digital signage 7400 can be linked wirelessly with an information terminal 7311 or information terminal 7411, such as a smartphone owned by the user. For example, the advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or information terminal 7411. Also, the display on the display unit 7000 can be switched by operating the information terminal 7311 or information terminal 7411.

[0497] Furthermore, the digital signage 7300 or digital signage 7400 can also run games using the screen of the information terminal 7311 or information terminal 7411 as the control device (controller). This allows a large number of users to participate in and enjoy the game simultaneously.

[0498] Figure 29E shows an example of an information terminal. The information terminal 7550 includes a housing 7551, a display unit 7552, a microphone 7557, a speaker unit 7554, a camera 7553, and an operation switch 7555. A semiconductor device according to one aspect of the present invention can be applied to the display unit 7552. The display unit 7552 can also function as a touch panel. Furthermore, the information terminal 7550 can be equipped with an antenna and a battery inside the housing 7551. The information terminal 7550 can be used, for example, as a smartphone, a mobile phone, a tablet information terminal, a tablet personal computer, or an e-book reader.

[0499] Figure 29F shows an example of a wristwatch-type information terminal. The information terminal 7660 includes a housing 7661, a display unit 7662, a band 7663, a buckle 7664, an operation switch 7665, and input / output terminals 7666. The information terminal 7660 may also include, for example, an antenna and a battery inside the housing 7661. The information terminal 7660 can run various applications, such as mobile phone calls, email, document viewing and creation, music playback, internet communication, or computer games.

[0500] Furthermore, the information terminal 7660 is equipped with a touch sensor on the display unit 7662, allowing it to be operated by touching the screen with a finger or stylus, for example. For example, touching the icon 7667 displayed on the display unit 7662 can launch an application. The operation switch 7665 can have various functions, such as setting the time, turning the power on or off, turning wireless communication on or off, activating or deactivating silent mode, or activating or deactivating power saving mode. For example, the functions of the operation switch 7665 can also be configured by the operating system built into the information terminal 7660.

[0501] Furthermore, the information terminal 7660 is capable of performing standardized short-range wireless communication. For example, it can communicate with a wireless communication-enabled headset to make hands-free calls. The information terminal 7660 can also send and receive data with other information terminals via the input / output terminal 7666. It can also be charged via the input / output terminal 7666. Note that charging may be performed by wireless power supply without using the input / output terminal 7666.

[0502] Figure 30A shows the exterior of the automobile 9700. Figure 30B shows the driver's seat of the automobile 9700. The automobile 9700 includes a body 9701, wheels 9702, a dashboard 9703, and lights 9704, etc. A display device according to one aspect of the present invention can be used, for example, in the display unit of the automobile 9700. For example, a display device according to one aspect of the present invention can be applied to each of the display units 9710 to 9715 shown in Figure 30B.

[0503] Display units 9710 and 9711 are display devices installed on the windshield of an automobile. In one aspect of the present invention, the electrodes of the display device are made of a light-transmitting conductive material, thereby creating a so-called see-through display device that allows the other side to be seen through. A see-through display device does not obstruct the driver's view when the automobile 9700 is in operation. Therefore, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 9700. If the display device is equipped with, for example, a transistor for driving the display device, it is preferable to use a light-transmitting transistor, such as an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor.

[0504] The display unit 9712 is a display device installed on the pillar. For example, by displaying images from an imaging device installed on the vehicle body 9701 on the display unit 9712, the field of view obstructed by the pillar can be compensated for. The display unit 9713 is a display device installed on the dashboard 9703. For example, by displaying images from an imaging device installed on the vehicle body 9701 on the display unit 9713, the field of view obstructed by the dashboard 9703 can be compensated for. In other words, the automobile 9700 can compensate for blind spots and enhance safety by displaying images from an imaging device installed on the vehicle body 9701 on the display units 9712 and 9713. Furthermore, by displaying images that compensate for the parts that are not visible, safety checks can be performed more naturally and without discomfort.

[0505] Figure 31 shows the interior of automobile 9700, which employs bench seats for the driver and passenger. Display unit 9721 is a display device installed in the door. For example, by displaying images from an imaging means installed in the vehicle body 9701 on display unit 9721, the view obstructed by the door can be compensated for. Display unit 9722 is a display device installed in the steering wheel. Display unit 9723 is a display device installed in the center of the seat surface of the bench seat.

[0506] Display units 9714, 9715, or 9722 can provide the user with various information by displaying, for example, navigation information, driving speed, engine RPM, mileage, fuel level, gear status, or air conditioning settings. The display items and layout displayed on the display units can be changed as appropriate to suit the user's preferences. The above information can also be displayed on one or more of the display units 9710 to 9713, 9721, and 9723. In addition, one or more of the display units 9710 to 9715 and 9721 to 9723 can also be used as lighting devices.

[0507] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples. [Explanation of Symbols]

[0508] 100A: Circuit, 111: Drive circuit, 112: Drive circuit, 121: Switching circuit, 131A: Selection circuit, 132A: Selection circuit, 111-O: Terminal, 112-O: Terminal, 121-1: Terminal, 121-2: Terminal, 131A-I: Terminal, 132A-I: Terminal, SG1: Signal generation circuit, SG2: Signal generation circuit, SW1: Switch, SW2: Switch, SC1: Switch, 141: Terminal, 142: Terminal, 143: Terminal, Trnsw: n-channel type transistor Inverter, Trpsw: p-type channel transistor, INVsw: inverter, STB0: terminal, STB1: terminal, CHG1: terminal, INV0: inverter, INV1: inverter, XOR: circuit, 152: terminal, 154: terminal, PTL: pass transistor logic circuit, AMP: amplifier, SE1: switch, SE2: switch, SL1: terminal, SL2: terminal, SEL1: terminal, SEL2: terminal, PX1: pixel circuit, PX2: pixel circuit

Claims

1. It has a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit. The first drive circuit has the function of generating an analog first data signal and the function of outputting the first data signal from the output terminal of the first drive circuit. The second drive circuit has the function of generating an analog second data signal and the function of outputting the second data signal from the output terminal of the second drive circuit. The output terminal of the first drive circuit is electrically connected to the input terminal of the first selection circuit and the first terminal of the switching circuit. The output terminal of the second drive circuit is electrically connected to the input terminal of the second selection circuit and the second terminal of the switching circuit. The first selection circuit has the function of either conducting or not conducting between the input terminal of the first selection circuit and the output terminal of the first selection circuit. The second selection circuit has the function of either conducting or not conducting between the input terminal of the second selection circuit and the output terminal of the second selection circuit. The switching circuit has the function of either conducting or not conducting between the first terminal of the switching circuit and the second terminal of the switching circuit. It has the ability to operate in three modes: Mode 1, Mode 2, and Mode 3. In the first mode, the connection between the input terminal of the first selection circuit and the output terminal of the first selection circuit, or the connection between the input terminal of the second selection circuit and the output terminal of the second selection circuit, is made conductive and the other is made non-conductive. In the first mode, the connection between the first terminal of the switching circuit and the second terminal of the switching circuit is made conductive. In the first mode, the first data signal is output from the output terminal of the first drive circuit. In the first mode, the second data signal is not output from the output terminal of the second drive circuit. In the second mode, the connection between the input terminal and output terminal of the first selection circuit, or between the input terminal and output terminal of the second selection circuit, is made conductive and the other is made non-conductive. In the second mode, the first terminal of the switching circuit and the second terminal of the switching circuit are connected. In the second mode, the first data signal is not output from the output terminal of the first drive circuit. In the second mode, the second data signal is output from the output terminal of the second drive circuit. In the third mode, the input terminal of the first selection circuit and the output terminal of the first selection circuit are connected. In the third mode, the input terminal of the second selection circuit and the output terminal of the second selection circuit are connected, In the third mode, the connection between the first terminal of the switching circuit and the second terminal of the switching circuit is made non-conductive. In the third mode, the first data signal is output from the output terminal of the first drive circuit. In the third mode, the second data signal is output from the output terminal of the second drive circuit. Semiconductor equipment.

2. A semiconductor device according to claim 1, comprising a first pixel circuit and a second pixel circuit, The first pixel circuit is electrically connected to the output terminal of the first selection circuit. The second pixel circuit is electrically connected to the output terminal of the second selection circuit. Display device.

3. It has a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit. The first drive circuit has the function of generating an analog first data signal and the function of outputting the first data signal from the output terminal of the first drive circuit. The second drive circuit has the function of generating an analog second data signal and the function of outputting the second data signal from the output terminal of the second drive circuit. The output terminal of the first drive circuit is electrically connected to the input terminal of the first selection circuit and the first terminal of the switching circuit. The output terminal of the second drive circuit is electrically connected to the input terminal of the second selection circuit and the second terminal of the switching circuit. The first selection circuit has the function of making the connection between the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit conductive, and making the connection between the input terminal of the first selection circuit and each of the remaining plurality of output terminals of the first selection circuit non-conductive. The second selection circuit has the function of making the connection between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit conductive, and making the connection between the input terminal of the second selection circuit and each of the remaining multiple output terminals of the second selection circuit non-conductive. The switching circuit has the function of either conducting or not conducting between the first terminal of the switching circuit and the second terminal of the switching circuit. It has the ability to operate in three modes: Mode 1, Mode 2, and Mode 3. In the first mode, the connection between the input terminal of the first selection circuit and one of the multiple output terminals of the first selection circuit, or between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit, is made conductive and the other is made non-conductive. In the first mode, the connections between the input terminals of the first selection circuit and the remaining output terminals of the first selection circuit, and between the input terminals of the second selection circuit and the remaining output terminals of the second selection circuit, are kept in a non-conductive state. In the first mode, the connection between the first terminal of the switching circuit and the second terminal of the switching circuit is made conductive. In the first mode, the first data signal is output from the output terminal of the first drive circuit. In the first mode, the second data signal is not output from the output terminal of the second drive circuit. In the second mode, the connection between the input terminal of the first selection circuit and one of the multiple output terminals of the first selection circuit, or between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit, is made conductive and the other is made non-conductive. In the second mode, the connections between the input terminals of the first selection circuit and the remaining output terminals of the first selection circuit, and between the input terminals of the second selection circuit and the remaining output terminals of the second selection circuit, are kept in a non-conductive state. In the second mode, the first terminal of the switching circuit and the second terminal of the switching circuit are connected. In the second mode, the first data signal is not output from the output terminal of the first drive circuit. In the second mode, the second data signal is output from the output terminal of the second drive circuit. In the third mode, the input terminal of the first selection circuit is connected to one of the multiple output terminals of the first selection circuit, and the input terminal of the first selection circuit is disconnected from each of the remaining multiple output terminals of the first selection circuit. In the third mode, the connection between the input terminal of the second selection circuit and one of the multiple output terminals of the second selection circuit is made conductive, and the connection between the input terminal of the second selection circuit and each of the remaining multiple output terminals of the second selection circuit is made non-conductive. In the third mode, the connection between the first terminal of the switching circuit and the second terminal of the switching circuit is made non-conductive. In the third mode, the first data signal is output from the output terminal of the first drive circuit. In the third mode, the second data signal is output from the output terminal of the second drive circuit. Semiconductor equipment.

4. A semiconductor device according to claim 3, comprising a first pixel circuit and a second pixel circuit, The first pixel circuit is electrically connected to at least one of the multiple output terminals of the first selection circuit. The second pixel circuit is electrically connected to at least one of the multiple output terminals of the second selection circuit. Display device.

5. A semiconductor device according to claim 3, comprising a first pixel circuit and a second pixel circuit, The first pixel circuit is electrically connected to all of the multiple output terminals of the first selection circuit. The second pixel circuit is electrically connected to all of the multiple output terminals of the second selection circuit. Display device.

6. A device comprising the display device described in claim 2 and a housing, electronic equipment.

7. A device comprising the display device described in claim 4 and a housing, electronic equipment.

8. A device comprising the display device described in claim 5 and a housing, electronic equipment.

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