Indication device

Abstract

To provide a thin film transistor which has excellent electrical characteristics and high reliability, and a display device using the thin film transistor as a switching element.SOLUTION: In a channel protected thin film transistor in which an oxide semiconductor is used for a channel formation region, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region composed of nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphous and microcrystals in which an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an N-type caused by re-entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented, and a contact resistance with source and drain electrodes can be reduced.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to semiconductor devices, and display devices and electronic devices using the same. [Background technology]

[0002] In recent years, semiconductor thin films (with a thickness of several nanometers to several hundred nanometers) formed on substrates having an insulating surface have been developed. The technology of constructing thin-film transistors (TFTs) using (degrees) is attracting attention. ZISTA is widely used in electronic devices such as ICs and electro-optical devices, and is particularly used in image display devices. Development of switching elements is being expedited. Metal oxides exist in a wide variety of forms and have various applications. It is used in liquid crystal displays, etc. Indium oxide is a well-known material and is used in liquid crystal displays, etc. It is used as a required transparent electrode material.

[0003] Some metal oxides exhibit semiconductor properties. For example, there are tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin-film transistors that use metal oxides exhibiting semiconductor properties as channel formation regions are already known. (Patent Documents 1 and 2)

[0004] Furthermore, TFTs using oxide semiconductors have high field-effect mobility. Therefore, the TFT It is also possible to use this to configure drive circuits for display devices and the like. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0006] When forming multiple different circuits on an insulating surface, for example, the pixel section and the driving circuit on the same substrate. When formed in this manner, the thin-film transistors used in the pixel portion have excellent switching characteristics, for example For example, a large on / off ratio is required, and the thin-film transistors used in the drive circuit have a high operating speed. Speed ​​is required. In particular, the higher the resolution of the display device, the faster the display image. Because the image writing time is shortened, thin-film transistors used in the driving circuit have a fast operating speed. It is preferable to do so.

[0007] One aspect of the present invention relates to a thin-film transistor with good electrical characteristics and high reliability, and said thin-film transistor The objective is to provide a display device that uses a zista as a switching element. [Means for solving the problem]

[0008] A semiconductor device according to one aspect of the present invention comprises a gate electrode layer on a substrate and a gate insulating layer on the gate electrode layer. A layer, an oxide semiconductor layer on the gate insulating layer, and an oxide insulating layer in contact with a portion of the oxide semiconductor layer. It has a source electrode layer and a drain electrode layer that are in contact with a part of the oxide semiconductor layer, and In a semiconductor layer, the region between the source electrode layer and the oxide insulating layer, and the region between the drain electrode layer and the oxide The region between the insulating layers includes the region overlapping with the source electrode layer, the region overlapping with the oxide insulating layer, and It is characterized by having a film thickness that is thinner than the region that overlaps with the drain electrode layer.

[0009] Furthermore, the surface portion of the oxide semiconductor layer in contact with the oxide insulating layer is characterized by having a crystalline region. do.

[0010] In the above structure, the gate electrode layer, source electrode layer, and drain electrode layer included in the semiconductor device are a film mainly composed of a metal element selected from aluminum, copper, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, or an alloy film thereof, or a laminated film formed by combining them is used. Also, the source electrode layer and the drain electrode layer are not limited to a single layer containing the above-described elements, and a laminate of two or more layers can be used.

[0011] Further, by using a transparent oxide conductive layer such as indium oxide, indium oxide-tin oxide alloy, indium oxide-zinc oxide alloy, zinc oxide, zinc oxide-aluminum, aluminum zinc oxynitride, or zinc gallium oxide for the source electrode layer, drain electrode layer, and gate electrode layer, the light transmittance of the pixel portion can be improved, and the aperture ratio can be increased.

[0012] Also, by forming the above-described oxide conductive layer between each of the film mainly composed of the above metal element constituting the source electrode layer and the drain electrode layer and the oxide semiconductor layer, a semiconductor device capable of high-speed operation with reduced contact resistance can be configured.

[0013] In the above structure, the semiconductor device has an oxide semiconductor layer, has an oxide insulating layer on the oxide semiconductor layer, and the oxide insulating layer in contact with the channel formation region of the oxide semiconductor layer functions as a channel protection layer.

[0014] Further, in the above structure, the oxide insulating layer functioning as the channel protection layer of the semiconductor device uses an inorganic insulating film formed by a sputtering method, and typically, a silicon oxide film, silicon oxynitride film, aluminum oxide film, or aluminum oxynitride is used. ​​​​​​​​​

[0015] The oxide semiconductor layer is InMO3(ZnO) m (m>0, and m is not an integer) A thin film is formed as indicated by (i), and this thin film is used as an oxide semiconductor layer in a thin film transient. Prepare the material. Note that M is one metallic element selected from Ga, Fe, Ni, Mn, and Co. Alternatively, it can refer to multiple metallic elements. For example, M can be Ga, or Ga and Ni. Alternatively, other metal elements besides Ga, such as Ga and Fe, may be included. Also, the above oxidation In semiconductors, in addition to the metallic elements M, impurity elements such as Fe and Ni are also present. Some contain other transition metal elements or oxides of such transition metals. In the case of InMO3(ZnO) m A structure that can be expressed as (m>0, and m is not an integer) Among oxide semiconductor layers, the oxide semiconductor with a structure containing Ga as M is called In-Ga-Zn-O These are called oxide semiconductors, and their thin films are also called In-Ga-Zn-O films.

[0016] In addition to the above, other metal oxides that can be applied to oxide semiconductor layers include In-Sn-O systems and I n-Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga -Zn-O series, Sn-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al- Applying Zn-O, In-O, Sn-O, or Zn-O metal oxides is possible. Yes, it is possible. Furthermore, silicon oxide may be included in the oxide semiconductor layer made of the above-mentioned metal oxide.

[0017] Furthermore, the oxide semiconductor layer undergoes high-temperature, short-time dehydration or dehydrogenation treatment using methods such as RTA. This is used. Through a heating process such as the RTA method, the particle size of the surface layer of the oxide semiconductor layer is It now has a crystalline region composed of so-called nanocrystals between 1 nm and 20 nm in size. The rest of the material is amorphous, or a mixture of amorphous and microcrystalline materials with microcrystals scattered within the amorphous region. It becomes a hybrid.

[0018] By using an oxide semiconductor layer with this configuration, moisture re-penetration from the surface layer and acid This prevents the deterioration of electrical properties caused by N-type conversion due to the desorption of elemental atoms. The surface layer of the body layer is on the back channel side and has a crystalline region composed of nanocrystals. This can suppress the development of parasitic channels.

[0019] Furthermore, when an oxide semiconductor layer is formed in an island-like manner after dehydration or dehydrogenation, crystals may form on the side surfaces. No regions are formed, and crystalline regions are formed only on the surface layer excluding the side portions, but the area ratio of the side portions The rate is small and does not hinder the above effects.

[0020] Furthermore, using a thin-film transistor according to one aspect of the present invention, the drive circuit and the pixel are made on the same base A display device is fabricated by forming it on a plate and using an EL element, liquid crystal element, or electrophoretic element. It is possible.

[0021] In one aspect of the present invention, a display device has a plurality of thin-film transistors in the pixel section, Even in the basic structure, the gate electrode of one thin-film transistor and the source wiring of another thin-film transistor... , or has a place for connecting drain wiring. Also, one aspect of the present invention is a display In the device's drive circuit, the gate electrode of the thin-film transistor and the socket of the thin-film transistor It has a point for connecting either the drain wiring or the drain wiring.

[0022] Furthermore, thin-film transistors are susceptible to damage from static electricity, so the gate wire or source wire may be damaged. For each line, a protection circuit for protecting the thin-film transistors in the pixel area is provided on the same substrate. Preferably, the protection circuit is constructed using a nonlinear element with an oxide semiconductor layer. It's nice.

[0023] The ordinal numbers "1st" and "2nd" are used for convenience only and do not represent the order of processes or stacking. This does not indicate that the invention is uniquely named. This does not indicate anything.

[0024] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This term encompasses a wide range of electronic devices, including electro-optical devices, semiconductor circuits, and electronic equipment. [Effects of the Invention]

[0025] In a thin-film transistor using an oxide semiconductor layer, the channel formation region of the oxide semiconductor layer By having a crystalline region in the surface layer of the region, the electrical properties are good and reliable. Thin-film transistors and display devices can be fabricated. [Brief explanation of the drawing]

[0026] [Figure 1] A cross-sectional view illustrating one aspect of the present invention. [Figure 2] A cross-sectional process diagram illustrating one aspect of the present invention. [Figure 3] A top view illustrating one aspect of the present invention. [Figure 4] A cross-sectional view and a top view illustrating one aspect of the present invention. [Figure 5] A cross-sectional view and a top view illustrating one aspect of the present invention. [Figure 6] A cross-sectional process diagram illustrating one aspect of the present invention. [Figure 7] A diagram illustrating the block diagram of a semiconductor device. [Figure 8] Circuit diagram and timing chart for the signal line drive circuit. [Figure 9] A circuit diagram showing the configuration of a shift register. [Figure 10] Circuit diagram and timing chart explaining the operation of the shift register. [Figure 11] A plan view and a cross-sectional view illustrating one aspect of the present invention. [Figure 12] A cross-sectional view illustrating one aspect of the present invention. [Figure 13] A cross-sectional view illustrating one aspect of the present invention. [Figure 14] A diagram illustrating the pixel equivalent circuit of a semiconductor device. [Figure 15] A cross-sectional view illustrating one aspect of the present invention. [Figure 16] A plan view and a cross-sectional view illustrating one aspect of the present invention. [Figure 17] A diagram illustrating examples of how electronic paper can be used. [Figure 18] An external view showing an example of an e-book. [Figure 19] External view showing examples of television equipment and digital photo frames. [Figure 20] An external view showing an example of a gaming machine. [Figure 21] An external view showing an example of a mobile phone. [Figure 22] A cross-sectional view illustrating one aspect of the present invention. [Figure 23] A diagram illustrating an example of the crystal structure of an oxide semiconductor. [Figure 24] A diagram illustrating the basics of scientific computing. [Figure 25] A diagram illustrating the basics of scientific computing. [Figure 26] A diagram illustrating the results of scientific calculations. [Modes for carrying out the invention]

[0027] Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. Without departing from the spirit and scope of the present invention, its form and details may be modified in various ways. It will be easily understood by those skilled in the art to obtain this. Therefore, the present invention is as shown in the embodiments below. The description is not to be interpreted as being limited to the stated content. The same reference numeral is used in common across different drawings for parts that are identical or have similar functions. I will omit the explanation of that repetition.

[0028] (Embodiment 1) In this embodiment, the structure of the thin-film transistor will be explained using Figure 1.

[0029] Figure 1 shows the channel-protected thin-film transistor of this embodiment.

[0030] The thin-film transistor 470 shown in Figure 1 has a gate electrode layer 4 on a substrate 400 having an insulating surface. 21a, gate insulating layer 402, oxide semiconductor layer 423 including channel formation region, source power The oxide insulating layer functions as the electrode layer 425a, the drain electrode layer 425b, and the channel protection layer. A layer 426a is provided.

[0031] The gate electrode layer 421a is made of aluminum, copper, molybdenum, titanium, chromium, tantalum, Metallic materials such as tungsten, neodymium, and scandium, or materials mainly composed of these metallic materials Using alloy materials or nitrides containing these metallic materials, single layers or laminates It can be formed using a low-resistance metal material such as aluminum or copper. While effective, it is best used in combination with high-melting-point metal materials due to issues with heat resistance and corrosion. High melting point metal materials include molybdenum, titanium, chromium, tantalum, tungsten, and neodymium. Gymn, scandium, etc., can be used.

[0032] Furthermore, with the aim of improving the aperture ratio of the pixel portion, an oxide in the gate electrode layer 421a is applied. Dium, indium oxide tin oxide alloy, indium oxide zinc oxide alloy, zinc oxide, zinc oxide Translucent materials such as lead-aluminum, zinc-aluminum oxynitride, or zinc-gallium oxide An oxide conductive layer can also be used.

[0033] The gate insulating layer 402 is formed by silicon oxide, silicon oxidnitride, etc., using methods such as CVD or sputtering. Monolayer films such as silicon nitride, silicon nitride, aluminum oxide, and tantalum oxide. Alternatively, a multilayer film can be used.

[0034] The oxide semiconductor layer 423 uses an In-Ga-Zn-O system film containing In, Ga, and Zn. InMO3(ZnO) m The structure is denoted as (m>0). Note that M is gallium ( Select from Ga (Ga), iron (Fe), nickel (Ni), manganese (Mn), and cobalt (Co). This indicates one or more metallic elements. For example, M could be Ga. In addition, other metal elements besides Ga may be included, such as Ga and Ni or Ga and Fe. Furthermore, in the above oxide semiconductor, in addition to the metal element included as M, there are also impurity elements. Some products contain Fe, Ni, or other transition metal elements, or oxides of such transition metals.

[0035] The oxide semiconductor layer 423 is formed using the sputtering method. The film thickness is 10 nm to 300 nm. The following is the case, preferably 20 nm to 100 nm. However, as shown in Figure 1, acid The oxide semiconductor layer 423 is located in the third region between the source electrode layer 425a and the oxide insulating layer 426a. 24c and the fourth region 424d between the drain electrode layer 425b and the oxide insulating layer 426a , the first region 424a overlapping with the source electrode layer 425a, and the fifth region overlapping with the oxide insulating layer 426a A film thickness thinner than region 424e and the second region 424b that overlaps with the drain electrode layer 425b. I have it.

[0036] The oxide semiconductor layer 423 is formed by the RTA (Rapid Thermal Annealing) method, etc. Use products that have undergone high-temperature, short-time dehydration or dehydrogenation treatment. This involves using high-temperature nitrogen, or an inert gas such as a noble gas, or light to heat the temperature between 500°C and 750°C. Alternatively, at a temperature below the strain point of the glass substrate, for approximately 1 minute to 10 minutes, preferably 65 This can be done with RTA processing at 0°C for 3 to 6 minutes. Because dehydration or dehydrogenation can be performed in a short time, processing can be carried out even at temperatures exceeding the strain point of the glass substrate. It is possible.

[0037] The oxide semiconductor layer 423 is amorphous at the time of deposition, having many unbonded bonds. By performing the heating step of the above dehydration or dehydrogenation treatment, unbonded hands in close proximity bond together. It can combine and be made into an ordered amorphous structure. Furthermore, as the ordering develops, A mixture of amorphous and microcrystalline materials with microcrystals scattered within crystalline regions, or formed entirely of amorphous material. This is how it becomes. Here, the particle size of the microcrystals is between 1 nm and 20 nm, so-called nanocrystals. It is a barrel, and is smaller in size than microcrystalline particles, which are generally called microcrystals. ru.

[0038] Furthermore, in the fifth region 424e of the oxide semiconductor layer 423, which overlaps with the oxide insulating layer 426a, The surface portion of the oxide semiconductor layer 423 becomes a crystalline region, and the c-axis orientation is perpendicular to the layer surface. It is preferable that the following nanocrystals are formed, in which case the long axis is in the c-axis direction and the short axis is The axial direction will be between 1 nm and 20 nm.

[0039] By using an oxide semiconductor layer with this configuration, the surface layer of the channel formation region becomes Because there is a dense crystalline region composed of nocrystals, moisture does not re-penetrate from the surface. This prevents the deterioration of electrical properties due to N-type conversion caused by oxygen desorption. In the formation region, the surface layer of the oxide semiconductor layer is on the back channel side, and the prevention of N-type formation is It is also effective in suppressing parasitic channels.

[0040] Here, the growth of the In-Ga-Zn-O system film depends on the metal oxide target used. The pyramidal crystal structures are different. For example, the molar ratio is In2O3:Ga2O3:ZnO=1:1: Using a metal oxide target containing In, Ga, and Zn with a ratio of 0.5, In-Ga-Z When an nO-based film is formed and then crystallized through a heating process, Ga and Z are present between the In oxide layers. The resulting crystal structure is a hexagonal layered compound type with one or two oxide layers containing n. In this case, the crystal structure of the crystalline region is represented by the structure In2Ga2ZnO7 (Figure 23). (Reference) is easy to obtain. Also, amorphous or amorphous and microcrystalline materials are mixed in the oxide semiconductor layer. The molar ratio of the structure in the region is likely to be In:Ga:Zn = 1:1:0.5. A metal oxide target with a molar ratio of In2O3:Ga2O3:ZnO = 1:1:1 When a film is formed using this method and then crystallized through a heating process, the Ga and Zn between the In oxide layers are included. The oxide layer tends to be two layers. The stable crystal structure is the latter, with two oxide layers containing Ga and Zn. It is a layered material, crystal growth is likely to occur, and the molar ratio is In2O3:Ga2O3:ZnO When a film is formed using a target with a ratio of 1:1:1 and then crystallized through a heating process, the surface layer or Crystals may form that extend all the way to the gate insulating layer interface. Note that the molar ratio is atomic This can also be described as numerical ratio.

[0041] In this embodiment, the source electrode layer 425a and the drain electrode layer 425b are first The structure consists of a three-layer design comprising a conductive layer, a second conductive layer, and a third conductive layer. Therefore, the same material as the gate electrode layer 421a described above can be used as appropriate.

[0042] Furthermore, the source electrode layer is a translucent oxide conductive layer similar to the gate electrode layer 421a. By using 425a and the drain electrode layer 425b, the light transmittance of the pixel portion is improved, and the aperture ratio It can also be increased.

[0043] Furthermore, the aforementioned metal material that forms the source electrode layer 425a and the drain electrode layer 425b is mainly composed of The aforementioned oxide conductive layer is formed between the film and the oxide semiconductor layer 423, and contact resistance It can also reduce resistance.

[0044] On the oxide semiconductor layer 423, in contact with a portion of the oxide semiconductor layer 423, is a channel protection layer and It has an oxide insulating layer 426a that functions as an oxide insulating layer. The oxide insulating layer is made using an inorganic method by sputtering. An insulating film is used, typically a silicon oxide film, silicon nitride film, aluminum oxide film, or acid Aluminum nitride is used.

[0045] Furthermore, Figure 1 shows the oxide insulating layer 426a which functions as a channel protective layer, and the gate electrode layer. This forms a channel in the fifth region 424e of the oxide semiconductor layer that overlaps via the gate insulating layer 402. This will be referred to as the region. The channel length L of a thin-film transistor is determined by the distance between the source electrode layer and the drain. It is defined by the distance from the in electrode layer, but the channel of the channel-protected thin-film transistor 470 The length L is equal to the width of the oxide insulating layer 426a in the direction parallel to the direction of carrier flow. Oh, the channel length L of the thin-film transistor 470 is the length between the oxide semiconductor layer 423 and the oxide insulating layer 4 The length at the interface with 26a, that is, in the cross-sectional view shown in Figure 1, the oxide insulating layer 426a is It is shown as a trapezoid, and this is the length of the base of that trapezoid.

[0046] Furthermore, in a channel-protected thin-film transistor, the channel length L of the channel formation region is To shorten the distance, the width of the oxide insulating layer is narrowed, and the source electrode is placed on this narrow oxide insulating layer. When a layer and a drain electrode layer are provided, the source electrode layer and the drain electrode layer are on the oxide insulating layer. This could cause a short circuit. To resolve this problem, the thin-film transistor shown in Figure 1 has a width of The source electrode layer 425a and drain electrode layer 4 are separated from the narrow oxide insulating layer 426a at the edges. The configuration includes 25b. The channel-protected thin-film transistor 470 is used for channel formation. To shorten the channel length L of the region, for example, to 0.1 μm or more and 2 μm or less, the oxide insulating layer By narrowing the width, it is possible to realize thin-film transistors with high operating speeds.

[0047] The following diagrams, using Figures 2 and 3, will show the channel-protected thin-film transistor shown in Figure 1. An example of the manufacturing process for the device will be explained. Note that Figure 3 is a plan view of the display device, and Figure 2 is a plan view of Figure 3. The cross-sectional views at A1-A2 and B1-B2 are shown.

[0048] First, prepare substrate 400. Substrate 400 is made of barium borosilicate glass, aluminoboro Silicate glass or aluminosilicate glass, etc., can be fired using the fusion or float method. In addition to the alkali-free glass substrates and ceramic substrates that are fabricated, the materials must withstand the processing temperature of this fabrication process. A heat-resistant plastic substrate can be used. Also, stainless steel alloys can be used. A substrate in which an insulating film is provided on the surface of a metal substrate may also be used.

[0049] In addition, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used instead of the glass substrates mentioned above. A substrate made of edge material may be used. Alternatively, crystallized glass substrates can also be used.

[0050] Alternatively, an insulating film may be formed on the substrate 400 as an underlayer. The underlayer can be formed by CVD or Using sputtering or the like, silicon oxide film, silicon nitride film, silicon oxynitride film, or A silicon nitride film may be formed as a single layer or in a multilayer structure. A glass substrate may be used as the substrate 400. When using a substrate containing such mobile ions, a silicon nitride film and an oxidized silicon nitride film may be used as the underlayer. By using a nitrogen-containing film such as a silicon film, mobile ions can enter oxide semiconductor layers and semiconductors. This can prevent them from penetrating the body layer.

[0051] Next, gate wiring including gate electrode layer 421a, capacitive wiring 421b, and first terminal 42 A conductive film for forming 1c is deposited on the entire surface of the substrate 400 using sputtering or vacuum deposition. Then, after forming a conductive film over the entire surface of the substrate 400, a first photolithography process is performed. A stoma mask is formed, and unnecessary parts are removed by etching to create wiring and electrodes (gate electrodes). Forming gate wiring including pole layer 421a, capacitive wiring 421b, and first terminal 421c At this time, in order to prevent breakage, at least the end of the gate electrode layer 421a is tapered. It is preferable to etch the material so that a specific shape is formed.

[0052] Gate wiring including gate electrode layer 421a and capacitive wiring 421b, first terminal 421 of the terminal section c is aluminum, copper, molybdenum, titanium, chromium, tantalum, tungsten, neo Metallic materials such as zinc and scandium, or alloy materials mainly composed of these metallic materials, Alternatively, these metal materials can be used to form single or multilayer structures using nitrides. It is possible. Preferably, it is effective to form it with low-resistance metal materials such as aluminum or copper, but heat resistant Due to issues with properties and corrosion, it is best used in combination with high-melting-point metal materials. For example, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium The following can be used.

[0053] For example, the laminated structure of the gate electrode layer 421a is such that molybdenum is laminated on aluminum. A two-layer laminated structure, or a two-layer structure with molybdenum laminated on copper, or a nitrided structure on copper. A two-layer structure consisting of stacked titanium or tantalum nitride, or a structure consisting of stacked titanium nitride and molybdenum. A two-layer structure is preferable. A three-layer laminated structure can be made of aluminum, aluminum. and silicon alloys, aluminum and titanium alloys, or aluminum and neodymium alloys As an intermediate layer, tungsten, tungsten nitride, titanium nitride, or titanium are used as upper and lower layers. A layered structure is preferable.

[0054] At this time, a transparent oxide conductive layer is used in some of the electrode layers and wiring layers to improve the aperture ratio. It is also possible to use indium oxide, indium tin oxide in the oxide conductive layer. Alloys, indium oxide zinc alloy, zinc oxide, zinc aluminum oxide, zinc oxynitride Aluminum or gallium zinc oxide can be used.

[0055] Next, a gate insulating layer 402 is formed over the gate electrode layer 421a (Figure 2(A)). The gate insulating layer 402 is made using methods such as CVD or sputtering, with a film thickness of 10 nm to 400 nm. The following applies:

[0056] For example, a silicon oxide film can be used as the gate insulating layer 402 by CVD or sputtering. It is formed to a thickness of 100 nm. Of course, the gate insulating layer 402 is made of such a silicon oxide film. It is not limited to silicon oxide nitride film, silicon nitride oxide film, silicon nitride film, acid Using aluminum oxide, tantalum oxide film, and other insulating films, a single layer made of these materials Alternatively, it may be formed as a laminated structure.

[0057] Furthermore, the gate insulating layer 402 is formed using a high-density plasma device. Here, high-density The plasma device is 1 x 10 11 / cm 3 This refers to a device capable of achieving the above plasma density. For example, by applying microwave power of 3kW to 6kW to generate plasma, an insulating film is formed. The film is deposited.

[0058] Monosilane gas (SiH4), nitrous oxide (N2O), and dilute gas are placed in the chamber as material gases. By introducing a system that generates high-density plasma under a pressure of 10 Pa to 30 Pa, it can insulate glass and other materials. An insulating film is formed on a substrate with a surface. Then, the supply of monosilane gas is stopped, and the atmosphere is exposed. Plasma treatment is performed on the insulating film surface by introducing nitrous oxide (N2O) and a noble gas without exposure to the elements. It is permissible to do so. Plasma is applied to the insulating film surface by introducing nitrous oxide (N2O) and a noble gas. The purifying process is performed at least after the deposition of the insulating film. The insulating film that has undergone the above process sequence is a film This insulating film is thin, and can ensure reliability even at thicknesses of less than 100 nm. .

[0059] When forming the gate insulating layer 402, monosilane gas (SiH4) and sub-silane gas are introduced into the chamber. The flow rate ratio with nitrogen oxide (N2O) should be in the range of 1:10 to 1:200. The noble gases introduced into the bar include helium, argon, krypton, and xenon. While it is possible to use any of these methods, it is preferable to use argon, which is the least expensive.

[0060] Furthermore, insulating films obtained using a high-density plasma device can form films of a consistent thickness. It has excellent step coverage. In addition, insulating films obtained by high-density plasma devices are thin films. The thickness can be precisely controlled.

[0061] The insulating film obtained through the above process sequence is different from the insulating film obtained with a conventional parallel-plate type PCVD apparatus. The results differ significantly, and when comparing etching rates using the same etchant, Therefore, the insulating film obtained with a parallel-plate type PCVD apparatus is 10% or more slower or 20% or more slower, and high The insulating film obtained using a density plasma device can be described as a dense film.

[0062] Furthermore, silicon oxide is used as the gate insulating layer 402 by a CVD method using organic silane gas. It is also possible to form layers. As for organic silane gases, ethyl silicate (TEOS: chemical) is used. Formula Si(OC2H5)4), tetramethylsilane (TMS: chemical formula Si(CH3)4), Tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane Sun (OMCTS), Hexamethyldisilazane (HMDS), Triethoxysilane (Si H(OC2H5)3), trisdimethylaminosilane (SiH(N(CH3)2)3), etc. A silicon-containing compound can be used.

[0063] Furthermore, the gate insulating layer 402 is made of an oxide of aluminum, yttrium, or hafnium. A substance, nitride, oxidized nitride, or a type of nitride oxide or a compound thereof, containing at least two of these. Compounds containing the above components can also be used.

[0064] In this specification, an oxidized nitride is defined as a compound in which oxygen atoms are more abundant than nitrogen atoms. It refers to a substance with a large number of nitrogen atoms, and nitride oxides, in terms of their composition, have more nitrogen atoms than oxygen atoms. This refers to substances that are present in large quantities. For example, silicon oxidnitride film has a composition that includes nitrogen atoms. The number of oxygen atoms is greater than that of the child, and Rutherford backscattering (RBS) Backscattering Spectrometry and hydrogen forward scattering (H) The measurement was performed using FS (Hydrogen Forward Scattering). In total, the concentration range should be 50 atomic% to 70 atomic% for oxygen and 0.5 atomic% to 1 Less than 5 atomic percent, silicon 25 atomic percent to 35 atomic percent, hydrogen 0.1 atomic percent to 10 This refers to substances included in amounts less than an atomic percent. Furthermore, silicon nitride oxide film refers to its composition as follows: Therefore, when the number of nitrogen atoms is greater than the number of oxygen atoms, and when measured using RBS and HFS, the concentration The range is 5 atomic percent to 30 atomic percent for oxygen, and 20 atomic percent to 55 atomic percent for nitrogen. The range is 25 to 35 atomic percent silicon and 10 to 30 atomic percent hydrogen. This refers to the elements included in silicon oxide nitride or silicon nitride oxide. However, this does not include the atoms that make up silicon oxide nitride or silicon nitride oxide. When the total is set to 100 atomic%, the content ratios of nitrogen, oxygen, silicon, and hydrogen are within the above range. It shall be included within the enclosed area.

[0065] Furthermore, before forming the oxide semiconductor film for the oxide semiconductor layer 423, argon In reverse sputtering is performed by introducing gas to generate plasma, and the resulting material adheres to the surface of the gate insulating layer. It is preferable to remove any debris. Reverse sputtering is a process where voltage is not applied to the target side. Under an argon atmosphere, a voltage is applied to the substrate side using an RF power supply to form a plasma near the substrate. This is a method of modifying the surface. Note that nitrogen, helium, etc., can be used instead of an argon atmosphere. It may be used. Alternatively, the procedure may be carried out in an atmosphere where oxygen, N2O, etc., is added to an argon atmosphere. Alternatively, the procedure may be carried out in an argon atmosphere with Cl2, CF4, etc. added. After the treatment, an oxide semiconductor film is formed without exposure to the atmosphere, thereby creating a gate insulating layer 4 This prevents particles (dust) and moisture from adhering to the interface between 02 and the oxide semiconductor layer 423. It is possible.

[0066] Next, a film thickness of 5 nm to 200 nm, preferably 10 nm, is applied to the gate insulating layer 402. An oxide semiconductor film of 40 nm or less is formed.

[0067] Oxide semiconductor films include In-Ga-Zn-O systems, In-Sn-Zn-O systems, and In-Al- Zn-O series, Sn-Ga-Zn-O series, Al-Ga-Zn-O series, Sn-Al-Zn-O system, In-Zn-O system, Sn-Zn-O system, Al-Zn-O system, In-O system, Sn-O system Alternatively, a Zn-O based oxide semiconductor film can be used. Furthermore, the oxide semiconductor film is Under a noble gas (typically argon) atmosphere, under an oxygen atmosphere, or under a noble gas (typically argon) It can be formed by sputtering in a mixed atmosphere of (n) and oxygen. When using the tactic, a target containing 2% to 10% by weight of SiO2 is used. The film may be processed to include SiOx (X>0), which inhibits crystallization, in the oxide semiconductor film.

[0068] Here, a metal oxide target containing In, Ga, and Zn (with a molar ratio of In2O3: Ga2O3:ZnO=1:1:0.5, In:Ga:ZnO=1:1:1, or In Using Ga:ZnO=1:1:2, the distance between the substrate and the target is 100mm. Pressure 0.6 Pa, DC power supply 0.5 kW, under an oxygen atmosphere (oxygen flow rate ratio 100%). The film is formed using this method. Note that when a pulsed DC power supply is used, powdery material (P) is generated during film formation. This method is preferable because it reduces surface coatings (also called debris) and results in a more uniform film thickness distribution. In this configuration, an In-Ga-Zn-O-based metal oxide target is used as the oxide semiconductor film. Then, an In-Ga-Zn-O film with a thickness of 30 nm is deposited by sputtering.

[0069] Sputtering methods include RF sputtering, which uses a high-frequency power supply for sputtering, and DC sputtering, which uses a DC power supply. There is DC sputtering, and also pulsed DC sputtering, which applies a pulsed bias. Sputtering is mainly used for depositing insulating films, while DC sputtering is mainly used for depositing metal films. It is used in the following cases:

[0070] There are also multi-point sputtering systems that can set up multiple targets made of different materials. The apparatus can deposit multiple layers of different material films in the same chamber, or multiple types of materials in the same chamber. It is also possible to deposit films by simultaneously discharging electrical currents from similar materials.

[0071] Furthermore, a sputtering apparatus that uses the magnetron sputtering method, which has a magnetic mechanism inside the chamber. Alternatively, ECR sputtering uses plasma generated with microwaves instead of glow discharge. There are sputtering machines that use this method.

[0072] Furthermore, as a film deposition method using the sputtering method, the target material and sputtering gas components are deposited during film deposition. Reactive sputtering is a method that uses chemical reactions to form thin films of these compounds, and during film formation... There is also a bias sputtering method that applies voltage to the circuit board.

[0073] Next, a second photolithography process is performed to form a resist mask, and In-Ga-Z Etching of nO-based films. For etching, organic acids such as citric acid and oxalic acid are used. It can be used as a ching solution. Here, ITO07N (manufactured by Kanto Chemical Co., Ltd.) was used. By wet etching, unwanted parts are removed, and the In-Ga-Zn-O film is formed into island-like structures. Then, an oxide semiconductor layer 423 is formed. The edges of the oxide semiconductor layer 423 are etched in a tapered shape. By doing this, it is possible to prevent the wiring from being cut off at the step shape. The etching process is not limited to wet etching; dry etching may also be used.

[0074] Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The first heat treatment involves using high-temperature nitrogen, or an inert gas such as a noble gas, or light to a temperature of 500°C or higher. At temperatures below 750°C (or below the strain point of the glass substrate) for approximately 1 minute to 10 minutes. Preferably, this can be done by RTA treatment at 650°C for 3 to 6 minutes. Using the TA method, dehydration or dehydrogenation can be performed in a short time, exceeding the strain point of the glass substrate. It can be processed even at temperatures that can be treated. Note that heat treatment is not limited to this timing; This process can be performed multiple times, such as before or after the trisography or film deposition process.

[0075] Here, the surface layer of the oxide semiconductor layer 423 crystallizes by the first heat treatment, and nanocris It will have a crystalline region 106 composed of barrels. Also, the oxide semiconductor layer 423 Other regions are amorphous, or a mixture of amorphous and microcrystalline materials with microcrystals scattered within the amorphous regions. This is the result. Note that the crystalline region 106 is part of the oxide semiconductor layer 423, and thereafter, the oxide semiconductor The notation for layer 423 shall include crystalline region 106.

[0076] In this specification, heating treatment under an inert gas atmosphere such as nitrogen or a noble gas is referred to as dehydration. Alternatively, this is called a heat treatment for dehydrogenation. In this specification, this heat treatment is used to remove H2O Dehydration or dehydrogenation is not simply defined as the removal of H2. For convenience, the process including the removal of H, OH, etc., will be referred to as dehydration or dehydrogenation. .

[0077] When lowering the temperature from the heating temperature T used for dehydration or dehydrogenation of an oxide semiconductor layer, By using the same furnace that performed the hydration or dehydrogenation, and without exposing it to the atmosphere, water or hydrogen can be produced. It is important to prevent further contamination. Dehydration or dehydrogenation is performed to reduce the oxide semiconductor layer. Resistance modification, i.e., N-type modification (N - , N + After performing processes such as (etc.), the oxide semiconductor is made into a type I semiconductor by increasing its resistance. When a thin-film transistor is fabricated using a body layer, the threshold voltage value of the thin-film transistor is plugged in. This allows for the realization of a switching element with so-called normally-off characteristics. The channel is formed with a positive threshold voltage as close as possible to 0V as the gate voltage of the transistor. It is desirable for the display device to have a negative threshold voltage value. If present, current flows between the source and drain electrodes even when the gate voltage is 0V, a so-called no-no. It tends to exhibit marion characteristics. In active matrix type display devices, the circuit is constructed The electrical characteristics of the thin-film transistors are crucial, and these characteristics determine the performance of the display device. In particular, the threshold voltage (Vth) is an important electrical characteristic of thin-film transistors. Even if the field effect mobility is high, the threshold voltage value is high, or the threshold voltage value is negative. If present, it becomes difficult to control as a circuit. The threshold voltage value is high, and the threshold voltage In the case of thin-film transistors with large absolute values, when the driving voltage is low, the TFT function is... It may fail to perform its wetting function and could become a load. In the case of an inverter, a channel is formed only when a positive voltage is applied as the gate voltage. A transistor that allows drain current to flow is desirable. If the drive voltage is not high enough, the channel will take shape. Even in transistors where this is not done, or in negative voltage conditions, a channel is formed and drain current flows. Such transistors are unsuitable as thin-film transistors for use in circuits.

[0078] Also, the gas atmosphere for reducing the heating temperature T may be different from the gas atmosphere when the temperature is raised to the heating temperature T. It may be switched to a gas atmosphere. For example, in the same furnace where dehydration or dehydrogenation has been performed, without exposing it to the atmosphere, the inside of the furnace is filled with high-purity oxygen gas or N2O gas, ultra-dry air (dew point is -40°C or lower, preferably -60°C or lower) and cooled.

[0079] In the first heat treatment, it is preferable that the atmosphere does not contain water, hydrogen, etc. Alternatively, the purity of the inert gas introduced into the heat treatment apparatus is 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher, (that is, the impurity concentration is 1 ppm or lower, preferably 0.1 ppm or lower).

[0080] When the heat treatment is performed in the above-described inert gas atmosphere, the oxide semiconductor layer becomes oxygen-deficient by the heat treatment, resulting in a lower resistance, that is, N-type (N - -type, etc.). Then, by forming an oxide insulating layer in contact with the oxide semiconductor layer, the oxide semiconductor layer can be made into an oxygen-excess state, which can be said to increase the resistance, that is, make it I-type. Thereby, a thin film transistor with good electrical characteristics and high reliability can be manufactured.

[0081] Also, depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, a part of the oxide semiconductor layer may crystallize. After the first heat treatment, it becomes an oxide semiconductor layer 423 that is oxygen-deficient and has a lower resistance. After the first heat treatment, the carrier concentration is higher than that of the oxide semiconductor film immediately after film formation, and preferably has a carrier concentration of 1×10 / cm 18 or more 3 and becomes like that.

[0082] ​ Furthermore, the first heat treatment of the oxide semiconductor layer is performed on the oxide before it is processed into an island-shaped oxide semiconductor layer. This can also be done on semiconductor films. In that case, after the first heat treatment, the substrate is removed from the heating device. Remove and perform a second photolithography process. In this case, the oxide semiconductor layer 423 Crystal regions are not formed on the sides, and crystal regions 106 are formed only in the upper layer excluding the sides.

[0083] Next, a third photolithography process is performed to form a resist mask, followed by etching. By removing more unnecessary parts, the wiring and electrode layers made of the same material as the gate electrode layer 421a are reached. A tact hole is formed (Figure 2(B)). This contact hole connects to the conductive film that will be formed later. It is provided for direct connection. For example, in the drive circuit section, the gate electrode layer and the source electrode layer Alternatively, thin-film transistors that are in direct contact with the drain electrode layer, or gate wiring at the terminal section, are electrically connected. When forming connecting terminals, contact holes are created.

[0084] Next, an oxide insulating film is applied to the oxide semiconductor layer 423 and the gate insulating layer 402 by sputtering. After forming, a resist mask is formed by a fourth photolithography step, and selectively Etching is performed to form oxide insulating layers 426a, 426b, 426c, and 426d, After removing the resist mask (Figure 2(C)), the oxide semiconductor layer is removed. A region is formed in contact with the insulating layer 426a, and within this region, the gate electrode layer and the gate insulating layer The region that overlaps via and also overlaps with the oxide insulating layer 426a becomes the channel formation region. Furthermore, the contact hole reaching the first terminal 421c is formed by the fourth photolithography process. Formation is also performed.

[0085] The oxide insulating film shall have a thickness of at least 1 nm, and oxide insulating film shall be manufactured by sputtering or other methods. The membrane can be formed using appropriate methods to prevent the introduction of impurities such as water and hydrogen. In this configuration, a silicon oxide film is deposited as an oxide insulating film using the sputtering method. The substrate temperature should be between room temperature and 300°C; in this embodiment, it is set to 100°C. The deposition of silicon oxide films by sputtering is performed under a rare gas (typically argon) atmosphere. The procedure is carried out under an oxygen atmosphere, or under a mixed atmosphere of a noble gas (typically argon) and oxygen. It is possible to use a silicon oxide target or a silicon target as the target. It is possible to do so using a silicon target under oxygen and noble gas atmospheres. A silicon oxide film can be formed by the tarring method. The oxide insulating film formed by contact contains water, hydrogen ions, and OH - It does not contain impurities such as These are typically insulated films that block external intrusion, such as silicon oxide films. A silicon nitride film, an aluminum oxide film, or an aluminum oxide nitride film is used.

[0086] In this embodiment, the purity is 6N, and the silicon target is a columnar polycrystalline B-doped material (resistivity value 0 Using a pressure of 0.01 Ωcm, the distance between the substrate and the target (TS distance) was set to 89 mm, and pressure Pulse test conducted under a pressure of 0.4 Pa, a DC power supply of 6 kW, and an oxygen atmosphere (oxygen flow rate ratio of 100%). The film will be deposited by DC sputtering. The film thickness will be 300 nm.

[0087] Next, a conductive film made of a metallic material is formed on the oxide semiconductor layer 423 by sputtering or vacuum deposition. A film is formed. The material used for the conductive film is the same as that used for the gate electrode layer 421a described above. It is possible.

[0088] In this embodiment, a conductive film is formed by laminating the first to third conductive films. For example, titanium, a heat-resistant conductive material, is used as the first and third conductive films, and the second An aluminum alloy containing neodymium is used as the conductive film. This allows for the reduction of hillock formation while taking advantage of aluminum's low resistance. In this embodiment, a three-layer structure consisting of first to third conductive films is used, but it is not limited to this. However, it can be a single-layer structure, a two-layer structure, or a structure with four or more layers. That's fine. For example, it could be a single layer structure of titanium film, or a single layer of aluminum film containing silicon. A layered structure is also acceptable.

[0089] Furthermore, the oxide semiconductor has a dense crystalline region 106 composed of nanocrystals in its surface layer. When depositing conductive films in contact with layers, the heat generated during the deposition process and damage to the crystalline regions due to the deposition process can occur. This can cause the crystalline region 106 of the oxide semiconductor layer to become amorphous. However, In the thin-film transistor fabrication method shown in this embodiment, the channel of the oxide semiconductor layer In contact with the region that will form the channel, an oxide insulating layer 426a that functions as a channel protective layer Because it is provided, even when a conductive film is formed, at least the oxide semiconductor layer is maintained. In the channel-forming region (region 5), the structure is to have a crystalline region 106 in the surface layer. It is possible.

[0090] Next, a fifth photolithography step is performed to form a resist mask, and etching is performed. After removing the unnecessary parts, the source electrode layer 425a, drain electrode layer 425b, and connecting electrode are obtained. Form 429. The etching method used is either wet etching or dry etching. A chipping process is used. For example, titanium is used for the first and third conductive films, and ne is used for the second conductive film. When using aluminum alloys containing odymium, hydrogen peroxide or heated hydrochloric acid is used as an etchant. It can be used for wet etching.

[0091] In this etching process, a portion of the oxide semiconductor layer 423 is etched, and the source power The third region 424c between the electrode layer 425a and the oxide insulating layer 426a, and the drain electrode layer 425 The fourth region 424d between b and the oxide insulating layer 426a overlaps with the source electrode layer 425a. The first region 424a, the fifth region 424e overlapping with the oxide insulating layer 426a, and the drain electrode. This region has a thinner film thickness than the second region 424b, which overlaps with layer 425b (Figure 2(D)). The fifth region 424e of the oxide semiconductor layer 423 is etched by the oxide insulating layer 426a. To protect without being damaged, at least the surface layer of the channel-forming region has nanocrisps. A dense crystalline region composed of barrels exists. In the channel formation region, an oxide semiconductor layer The surface layer is the back channel side, and this crystalline region suppresses parasitic channels. It is possible.

[0092] Furthermore, in this fifth photolithography step, the connecting electrode 429 is connected to the gate insulating layer. It is directly connected to the first terminal 421c of the terminal section via the formed contact hole. Oh, although not illustrated here, the thin-film transistor of the drive circuit is formed through the same process as described above. The source or drain wire and the gate electrode are directly connected.

[0093] Next, an oxide insulating layer 428 is formed to cover the thin-film transistor 470 (Figure 2(E)). The oxide insulating layer 428 is a silicon oxide film obtained using sputtering or the like, and silicon oxide nitride film. Oxide insulating layers such as aluminum oxide films, aluminum oxide films, and tantalum oxide films can be used.

[0094] The oxide insulating layer is created by methods such as sputtering, which introduces impurities such as water and hydrogen into the oxide insulating layer. It can be formed using any method as appropriate. In this embodiment, an acid oxide insulating layer is used. A silicon dioxide film is deposited using the sputtering method. The substrate temperature during deposition is between room temperature and 300°C. The following is sufficient, and in this embodiment, it is set to 100°C. Here, during film formation, if water, hydrogen, etc. As a method to prevent contamination with pure substances, before film formation, the temperature is 150°C to 350°C under reduced pressure for 2 Perform a pre-bake for more than 10 minutes to form an oxide insulating layer without exposure to the atmosphere. It is desirable to do so. For silicon oxide film deposition by sputtering, a rare gas (typically, a) is used. Under an argon atmosphere, under an oxygen atmosphere, or under a mixture of a noble gas (typically argon) and oxygen. It can be carried out under ambient air conditions. Furthermore, silicon dioxide targets or silica can be used as targets. A silicon target can be used. For example, a silicon target can be used to target oxygen and rare gases. A silicon oxide film can be formed by sputtering under a low-resistance atmosphere. The oxide insulating layer formed in contact with the oxide semiconductor layer contains water, hydrogen ions, and OH - such An inorganic insulating film that does not contain pure substances and blocks their intrusion from the outside is preferred.

[0095] In this embodiment, the purity is 6N, and the silicon target is a columnar polycrystalline B-doped material (resistivity value 0 Using a pressure of 0.01 Ωcm, the distance between the substrate and the target (TS distance) was set to 89 mm, and pressure Pulse test conducted under a pressure of 0.4 Pa, a DC power supply of 6 kW, and an oxygen atmosphere (oxygen flow rate ratio of 100%). The film will be deposited by DC sputtering. The film thickness will be 300 nm.

[0096] Next, a second heat treatment (preferably 2) is performed under an inert gas atmosphere or a nitrogen gas atmosphere. Perform the procedure at temperatures between 0°C and 400°C (for example, between 250°C and 350°C). For example, under a nitrogen atmosphere. A second heat treatment is performed at 250°C for 1 hour under atmospheric pressure. Alternatively, a high temperature treatment similar to the first heat treatment is performed. A short-time RTA treatment may be performed. When the second heat treatment is performed, the oxide insulating layer and the oxide The oxide semiconductor layer, which overlaps the material insulating layer, is heated in contact with the material insulating layer. Furthermore, the second heating treatment is performed as follows: When this is done, the oxide semiconductor layer 423, which has been made low-resistance by the first heat treatment, becomes oxygen-rich. This allows for increased resistance (Type I configuration).

[0097] In this embodiment, a second heat treatment was performed after the silicon oxide film was formed, but the timing of the heat treatment The process is not limited to immediately after the silicon oxide film is formed, and is not problematic after the silicon oxide film is formed. stomach.

[0098] Furthermore, if heat-resistant materials are used for the source electrode layer 425a and the drain electrode layer 425b... In this case, the process using the first heat treatment conditions can be performed at the timing of the second heat treatment. Yes, it is possible. In this case, the heat treatment can be performed only once after the silicon oxide film is formed.

[0099] Next, a sixth photolithography step is performed to form a resist mask and an oxide insulating layer 4 Etching 28 forms a contact hole that reaches the drain electrode layer 425b. Furthermore, etching at this stage also forms contact holes that reach the connecting electrode 429.

[0100] Next, after removing the resist mask, a transparent conductive film is deposited. The material for the transparent conductive film is... These include indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO3). 2. Form materials such as ITO (abbreviated as ITO) using sputtering or vacuum deposition methods. Etching of materials is performed using hydrochloric acid-based solutions. However, etching of ITO in particular is Because residue is easily generated, indium oxide zinc oxide is used to improve etching processability. Gold (In2O3-ZnO) may also be used.

[0101] Next, a seventh photolithography step is performed to form a resist mask, and etching is performed. Unnecessary parts are removed to form the pixel electrode layer 110.

[0102] Furthermore, in this seventh photolithography process, the gate insulating layer 402 in the capacitance section The oxide insulating layer 426b and the oxide insulating layer 428 serve as dielectrics, and the capacitive wiring 421b and pixels A retention capacity is formed with the electrode layer 110.

[0103] Furthermore, in this seventh photolithography process, the first terminal 421c is used as the resist mass The transparent conductive film 128 formed on the terminal portion is left intact. This will be the electrode or wiring used in the connection. The connection electrode 4 is directly connected to the first terminal 421c. The transparent conductive film 128 formed on 29 is a connection that functions as an input terminal for gate wiring. These serve as terminal electrodes. Although not shown in the diagram, they also function as input terminals for source wiring. Sub-electrodes are also formed at the same time.

[0104] Furthermore, Figures 4(A1) and 4(A2) show a cross-sectional view and a plan view of the gate wiring terminal section at this stage. Each figure is illustrated. Figure 4(A1) is a cross-section along the line C1-C2 in Figure 4(A2). This corresponds to the figure. In Figure 4(A1), a transparent conductive film 4 is formed on the oxide insulating layer 428. 15 is a terminal electrode for connection that functions as an input terminal. Also, in Figure 4(A1) At the terminal section, there is a first terminal 411 formed of the same material as the gate wiring, and the same material as the source wiring. The connecting electrode 412, formed of the same material, overlaps with the gate insulating layer 402 and makes direct contact, conducting It is allowed to pass through. Also, the connecting electrode 412 and the transparent conductive film 415 are provided on the oxide insulating layer 428. Electrical conductivity is achieved through direct contact via a contact hole.

[0105] Furthermore, Figures 4(B1) and 4(B2) show a cross-sectional view and a plan view of the source wiring terminal section. These are illustrated. Furthermore, Figure 4(B1) is a cross-sectional view along the C3-C4 line in Figure 4(B2). This corresponds to the transparent conductive film 41 formed on the oxide insulating layer 428 in Figure 4(B1). 8 is a terminal electrode for connection that functions as an input terminal. Also, in Figure 4(B1), At the terminal, an electrode 416, formed from the same material as the gate wiring, is electrically connected to the source wiring. The second terminal 414 is superimposed below the gate insulating layer 402. Electrode 416 is Terminal 414 is not electrically connected to terminal 2, and electrode 416 is electrically connected to terminal 414. Setting the voltage to, for example, floating, GND, or 0V, will reduce the capacitance needed for noise suppression. Alternatively, it can form capacitance for static electricity countermeasures. Also, the second terminal 414 is oxidized. It is electrically connected to the transparent conductive film 418 via the physical insulating layer 428.

[0106] Multiple gate lines, source lines, and capacitive lines are provided depending on the pixel density. Furthermore, at the terminal section, there is a first terminal at the same potential as the gate wiring, and a second terminal at the same potential as the source wiring. Multiple terminals, such as terminal 2 and a third terminal at the same potential as the capacitance wiring, are arranged in a row. The number of terminals can be any number you like, and the implementer may decide this as appropriate.

[0107] Thus, through seven photolithography processes, seven photomasks are used to channel A protective thin-film transistor 470 and a retaining capacitance unit can be completed. By arranging these in a matrix corresponding to individual pixels to form a pixel section, This can be used as one of the substrates for fabricating a dual-matrix type display device. For convenience, this type of substrate is referred to as an active matrix substrate in this book.

[0108] When manufacturing an active-matrix liquid crystal display device, an active-matrix substrate is used. A liquid crystal layer is provided between the opposing substrate on which the opposing electrode is located, and the active matrix substrate and The opposing substrate is fixed in place. Furthermore, a common electrical connection is made between the opposing electrode provided on the opposing substrate and the opposing electrode. The electrodes are provided on the active matrix substrate, and a fourth terminal is electrically connected to the common electrode. It is provided in the section. This fourth terminal sets the common electrode to a fixed potential, for example, GND, 0V, etc. This is a terminal for that purpose.

[0109] Furthermore, this embodiment is not limited to the pixel configuration shown in Figure 3. For example, without capacitive wiring, The elementary electrodes are stacked and held together via the gate wiring of adjacent pixels, a protective insulating film, and a gate insulating layer. A quantity may be formed. In this case, the capacitance wiring and the third terminal connected to the capacitance wiring are omitted. It is possible.

[0110] Also, as shown in FIG. 5, a source electrode layer 425a and a drain electrode layer 425b may be configured to overlap on an oxide insulating layer 456a that functions as a channel protection layer. In this case, since the oxide semiconductor layer is not etched during the patterning of the source electrode layer 425a and the drain electrode layer 425b, a region with a thin film thickness is not formed in the oxide semiconductor layer. That is, a first region 424a that overlaps with the source electrode layer 425a, a second region 424b that overlaps with the drain electrode layer 425b, and a fifth region 424e that becomes a channel formation region, each having the same film thickness, result in an oxide semiconductor layer.

[0111] Also, as shown in FIG. 22(A), a thin film transistor 490 having a structure in which the film thickness of a region that is amorphous or a mixture of amorphous and microcrystalline in the fifth region 424e of the oxide semiconductor layer is thicker than the film thicknesses of the third region 424c and the fourth region 424d (that is, the interface between the crystalline region and the region that is amorphous or a mixture of amorphous and microcrystalline in the fifth region 424e is present above the outermost surface of the third region 424c and the fourth region 424d) may be used. A thin film transistor 490 having such a structure can be obtained, for example, by adjusting the heating temperature or heating time in the first heat treatment to form an extremely shallow crystalline region in the oxide semiconductor layer. By adopting the structure of the thin film transistor 490 shown in FIG. 22(A), the off-current can be reduced.

[0112] Note that the channel length L of the channel protection type thin film transistor 490 shown in FIG. 22(A) is equal to the width of the oxide insulating layer 426a in the direction parallel to the direction in which carriers flow. Also, in FIG. 22, In the thin film transistor 490 shown in (A), the channel length direction width L3 of the third region of the oxide semiconductor layer and the channel length direction width L4 of the fourth region are not necessarily the same, but the sum of the channel length direction width L3 of the third region and the channel length direction width L4 of the fourth region is a fixed value. Also, as shown in FIG. 22(B), in the first to fifth regions 424a to 424e of the oxide semiconductor layer, a thin film transistor 430 having a crystal region in the surface layer portion may be used. By adopting the configuration of the thin film transistor 430 shown in FIG. 22(B), the on-current can be increased. Also, different thin film transistors having different configurations such as the thin film transistors 430, 450, 470, or 490 may be formed on the same substrate. When the pixel portion and the drive circuit are formed on the same substrate, the thin film transistor used for the pixel portion is required to have excellent switching characteristics, and the thin film transistor used for the drive circuit preferably has a high operating speed. For example, as shown in FIG. 22(C), the thin film transistor 430 may be arranged in the drive circuit portion, and the thin film transistor 490 may be arranged in the pixel portion. Since the thin film transistor 430 arranged in the drive circuit portion can increase the on-current, it is suitable for applications that require a large current driving ability. The thin film transistor 490 arranged in the pixel portion can reduce the off-current. Therefore, when used as a switching element in the pixel portion, the contrast can be improved. Or, as shown in FIG. 22(D), the thin film transistor 450 may be arranged in the drive circuit portion, and the thin film transistor 470 with a low off-current may be arranged in the pixel portion.

[0113]

[0114] However, thin-film transistors 430 are placed in the drive circuit section, and thin-film transistors are placed in the pixel section. Alternatively, you could place 470 in the drive circuit section, or place thin-film transistor 450 in the pixel section. Thin-film transistor 490 may also be used.

[0115] In the thin-film transistors 430, 450, 470, and 490 shown in this embodiment, The interface of the oxide semiconductor layer 423 in contact with the gate insulating layer 402 is amorphous or amorphous and micro-amorphous. It is a mixture of crystals, and at least the surface layer in contact with the oxide insulating layer 426a is a crystalline region. It has.

[0116] In an active-matrix liquid crystal display device, pixel electrodes are arranged in a matrix. By driving the pixels, a display pattern is formed on the screen. For details, see the selected pixels. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode, Optical modulation is performed on the liquid crystal layer placed between the electrode and the counter electrode, and this optical modulation is used to create a display pattern. It is perceived by the observer as such.

[0117] In the display of motion on liquid crystal displays, afterimages occur because the response of the liquid crystal molecules themselves is slow. This has the problem of causing blurring in videos. In order to improve the video characteristics of liquid crystal display devices, the entire surface There is a driving technique called black insertion, which involves displaying a black screen every other frame.

[0118] Furthermore, the response speed is improved by increasing the vertical synchronization frequency to 1.5 times, preferably 2 times or more, the normal frequency. At the same time, select the grayscale to write to each of the multiple divided fields within each frame. There is also a drive technology known as double-speed drive.

[0119] In addition, in order to improve the video characteristics of the liquid crystal display device, a surface light source is configured using a plurality of LED (light emitting diode) light sources or a plurality of EL light sources, etc., and each light source that constitutes the surface light source is independently driven to blink within one frame period. As the surface light source three or more types of LEDs may be used, or white light emitting LEDs may be used. Since a plurality of LEDs can be independently controlled, the light emission timing of the LEDs can be synchronized with the switching timing of the optical modulation of the liquid crystal layer. This driving technology can partially turn off the LEDs, so particularly in the case of video display where the proportion of the black display area occupying one screen is large, power consumption can be reduced. By combining these driving technologies, display characteristics such as the video characteristics of the liquid crystal display device can be improved more than before. The n-channel type transistor obtained in this embodiment uses an In-Ga-Zn-O-based film in the channel formation region and has good dynamic characteristics, so these driving technologies can be combined.

[0120]

[0121] When manufacturing a light emitting display device, one electrode (also called a cathode) of the organic light emitting element is set to a low power supply potential, for example, GND, 0V, etc., so a fourth terminal for setting the cathode to a low power supply potential, for example, GND, 0V, etc., is provided at the terminal portion. Also, when manufacturing a light emitting display device, a power supply line is provided in addition to the source wiring and the gate wiring. Accordingly, a fifth terminal electrically connected to the power supply line is provided at the terminal portion.

[0122]

[0123] Through the above process, a thin-film transistor with good electrical characteristics and high reliability and the thin-film transistor A display device using a stylus can be provided.

[0124] The thin-film transistor shown in this embodiment is a thin-film transistor using an oxide semiconductor layer. That is, at least the surface portion of the channel-forming region of the oxide semiconductor layer has a crystalline region, The other parts can be composed of amorphous material or a mixture of amorphous and microcrystalline material, parasitic char This allows for the creation of thin-film transistors that can suppress the generation of Nell.

[0125] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0126] (Embodiment 2) In this embodiment, an example of a manufacturing process for a display device different from that of Embodiment 1 will be explained using Figure 6. In this embodiment, parts that are the same as or have similar functions as those in Embodiment 1 are used. The minutes and steps can be carried out in the same manner as in Embodiment 1, and repeated explanations will be omitted.

[0127] First, gate wiring including a gate electrode layer 421a and capacitance are placed on a substrate 400 having an insulating surface. A conductive film for forming the wiring 421b and the first terminal 421c is deposited by sputtering or vacuum deposition. The film is then deposited over the entire surface using the method. Next, after the conductive film is formed over the entire surface of the substrate 400, the first photolithography is performed. The graphics process is performed to form a resist mask, and unwanted parts are removed by etching. Wiring and electrodes (gate wiring including gate electrode layer 421a, capacitive wiring 421b, and first Forms terminal 421c).

[0128] Next, the gate electrode layer 421a, the capacitive wiring 421b, and the first terminal 421c are connected. An insulating layer 402 is formed, and on the gate insulating layer 402, a film thickness of 5 nm to 200 nm is preferably applied. Alternatively, an oxide semiconductor film 103 with a wavelength of 10 nm to 40 nm is formed. The process can be carried out in the same manner as in Embodiment 1.

[0129] Next, an oxide insulating film 105 is formed on the oxide semiconductor film 103 by sputtering, and then A resist mask is formed by the photolithography process in step 2, and selective etching is performed. Then, a contact hole is formed that reaches the first terminal 421c (Figure 6(A)). Oxide insulation The edge film 105 is similar to the oxide insulating film that becomes the oxide insulating layer 426a shown in Embodiment 1. It is possible to form a thin film.

[0130] Next, the oxide semiconductor film 103 is dehydrated or dehydrogenated. The first heat treatment for the transformation is performed using high-temperature nitrogen, or an inert gas such as a noble gas or light for 50°C. 0°C to 750°C (or a temperature below the strain point of the glass substrate) for 1 minute to 10 minutes This can be done by RTA treatment at a temperature of approximately 650°C for 3 to 6 minutes. By using RTA treatment, dehydration or dehydrogenation can be performed in a short time, so the glass substrate Processing can be performed even at temperatures exceeding the strain point. Note that heat treatment is not limited to this timing. Furthermore, this process can be performed multiple times, such as before or after the photolithography or film deposition processes.

[0131] Here, the surface layer of the oxide semiconductor film 103 crystallizes by the first heat treatment, and nanocrisps form. It will have a dense crystalline region 106 composed of barrels. Also, the oxide semiconductor film 10 The other regions of 3 are amorphous, or amorphous and microcrystalline regions with microcrystals scattered within the amorphous region. It becomes a mixture. Note that the crystalline region 106 is part of the oxide semiconductor film 103, and thereafter it oxidizes The notation for the material semiconductor film 103 shall include the crystalline region 106.

[0132] When lowering the temperature from the heating temperature T used for dehydration or dehydrogenation of an oxide semiconductor film, By using the same furnace that performed the hydration or dehydrogenation, and without exposing it to the atmosphere, water or hydrogen can be produced. It is important to prevent further contamination. Also, the gas atmosphere used to lower the temperature from heating temperature T should be the same as the heating temperature. The gas atmosphere may be switched to a different gas atmosphere from the one heated to degree T. For example, dehydration Alternatively, in the same furnace where dehydrogenation was performed, without exposing the material to the atmosphere, the inside of the furnace is filled with high-purity oxygen gas. Alternatively, fill with N2O gas or ultra-dry air (dew point of -40°C or lower, preferably -60°C or lower). Then, perform cooling.

[0133] Furthermore, in the first heat treatment, it is preferable that the atmosphere does not contain water, hydrogen, etc. i. Alternatively, the purity of the inert gas introduced into the heat treatment device shall be 6N (99.9999%) or less. Preferably 7N (99.99999%) or higher (i.e., impurity concentration of 1 ppm or less, preferred It is preferable to keep the concentration below 0.1 ppm.

[0134] After the first heat treatment, the oxide semiconductor film 103 becomes oxygen-deficient and has low resistance. After the heat treatment in step 1, the carrier concentration is higher than that of the oxide semiconductor film immediately after deposition, and preferably 1 x 10 18 / cm 3 The carrier concentration will be as described above.

[0135] Next, a resist mask is formed by a third photolithography process, and then selectively etched. After performing a process to form oxide insulating layers 426a, 426b, 426c, and 426d, Remove the dyst mask (Figure 6(B)). Here, the oxide insulating layer 426a is a thin film transistor. It functions as a channel protection layer for the DISTA. In addition, in the oxide semiconductor film 103, The region that overlaps with the insulating layer 426a is the region that will later become the channel formation region.

[0136] Next, oxide semiconductor film 103 and oxide insulating layers 426a, 426b, 426c, 426 A conductive film made of a metallic material is deposited on d by sputtering or vacuum deposition. Therefore, the same material as that used for the gate electrode layer 421a can be used.

[0137] In this embodiment, a conductive film is formed by laminating the first to third conductive films. For example, titanium, a heat-resistant conductive material, is used as the first and third conductive films, and the second An aluminum alloy containing neodymium is used as the conductive film. This allows for the reduction of hillock formation while taking advantage of aluminum's low resistance. In this embodiment, a three-layer structure consisting of first to third conductive films is used, but it is not limited to this. However, it can be a single-layer structure, a two-layer structure, or a structure with four or more layers. That's fine. For example, it could be a single layer structure of titanium film, or a single layer of aluminum film containing silicon. A layered structure is also acceptable.

[0138] Furthermore, the oxide semiconductor has a dense crystalline region 106 composed of nanocrystals in its surface layer. When depositing conductive films in contact with layers, the heat generated during deposition and the damage to the crystalline regions caused by the deposition process can be a contributing factor. Therefore, the crystalline region 106 of the oxide semiconductor layer may become amorphous. However, In the thin-film transistor fabrication method shown in this embodiment, the channel of the oxide semiconductor layer An oxide insulating layer 426a, which functions as a channel protective layer, is provided in contact with the region to be formed. Because it is treated, even when a conductive film is formed, at least the oxide semiconductor layer is treated In the flannel-forming region, a structure can be formed that has a crystalline region 106 in the surface layer.

[0139] Next, a fourth photolithography process is performed to shape the resist masks 480a and 480b. The conductive layer 425 and connecting electrode 429 are formed by removing unnecessary parts through etching. (Figure 6(C)). The etching method used in this case is either wet etching or dry etching. A chipping process is used. For example, titanium is used for the first and third conductive films, and ne is used for the second conductive film. When using aluminum alloys containing odymium, hydrogen peroxide or heated hydrochloric acid is used as an etchant. It can be used for wet etching.

[0140] Furthermore, in this fourth photolithography process, the connecting electrode 429 is connected to the gate insulating layer. It is directly connected to the first terminal 421c of the terminal section via the formed contact hole. Oh, although not illustrated here, the thin-film transistor of the drive circuit is formed through the same process as described above. The source or drain wire and the gate electrode are directly connected.

[0141] In this embodiment, the resist mask 480a is a resist mask having recesses or protrusions. Yes, it exists. In other words, it is a resist consisting of multiple regions of different thicknesses (in this case, two regions). It can also be called a mask. In resist mask 480a, the thicker area is resist mask We will refer to the convex portion of the mask as the convex portion, and the thin area as the concave portion of the resist mask.

[0142] In the resist mask 480a, the portion where the source electrode layer and drain electrode layer will be formed later. A convex portion is formed in the middle, and a concave portion is formed at the periphery of the subsequent island-shaped oxide semiconductor layer.

[0143] The resist mask shown in this embodiment can be formed using a multi-gradation mask. A multi-tone mask is a mask that allows exposure at multiple levels of light intensity, and is typically... This refers to a system that performs exposure using three levels of light intensity: an exposed area, a partially exposed area, and an unexposed area. By using a tonal mask, multiple (typically two) types can be created in a single exposure and development process. A resist mask having a certain thickness can be formed. Therefore, by using a multi-gradation mask This reduces the number of photomasks required.

[0144] By exposing and developing using a multi-gradation mask, a resist mask with regions of different thicknesses can be created. Screens 480a and 480b can be formed. However, this is not limited to multi-gradation. A resist mask may be formed without using a mask.

[0145] Using resist masks 480a and 480b, the conductive layer 425 and the connecting electrode 429 are formed. After that, the resist masks 480a and 480b are moved back (reduced), Forms screens 482a, 482b, and 482c. Retracts (shrinks) the resist mask. For this, ashing with oxygen plasma can be performed. Therefore, the recess in the resist mask 480a disappears and the resist mask 482a and the resin mask disappear. It is divided into resist mask 482b. Also, resist mask 482a and resist mask 4 The electrode layer 425 in the region sandwiched between 82b is exposed (not shown).

[0146] Next, using resist masks 482a, 482b, and 482c, the exposed conductive layer 42 By etching 5 and a part of the connecting electrode 429, the source electrode 425a, A rain electrode 425b and an island-shaped oxide semiconductor layer 423 are formed (Figure 6(D)).

[0147] In this etching process, a portion of the oxide semiconductor film 103 is etched, and the source electricity The third region 424c between the electrode layer 425a and the oxide insulating layer 426a, and the drain electrode layer 425 The fourth region 424d between b and the oxide insulating layer 426a overlaps with the source electrode layer 425a. The first region 424a, the second region 424b overlapping with the drain electrode layer 425b, and the oxide insulating layer This region has a thinner film thickness than the fifth region 424e, which overlaps with 426a. Note that this is an oxide semiconductor layer. The fifth region 424e of 423 is not etched by the oxide insulating layer 426a. To provide protection, at least the surface layer of the channel-forming region is composed of nanocrystals. A dense crystalline region exists. In the channel formation region, the surface layer of the oxide semiconductor layer is This is the buck channel side, and this crystalline region can suppress parasitic channels.

[0148] Furthermore, the first region 424a and the second region 424b are the channel-forming region, the fifth region 42 It has the same film thickness as 4e.

[0149] Next, an oxide insulating layer 428 is formed to cover the thin-film transistor 410 (Figure 6(E)). The oxide insulating layer 428 is a silicon oxide film obtained using sputtering or the like, and silicon oxide nitride film. Oxide insulating layers such as aluminum oxide films, aluminum oxide films, and tantalum oxide films can be used.

[0150] Next, a second heat treatment (preferably 2) is performed under an inert gas atmosphere or a nitrogen gas atmosphere. Perform the procedure at temperatures between 0°C and 400°C (for example, between 250°C and 350°C). For example, under a nitrogen atmosphere. A second heat treatment is performed at 250°C for 1 hour under atmospheric pressure. Alternatively, a high temperature treatment similar to the first heat treatment is performed. A short-time RTA treatment may be performed. When the second heat treatment is performed, the oxide insulating layer and the oxide The oxide semiconductor layer, which overlaps the material insulating layer, is heated in contact with the material insulating layer. Furthermore, the second heating treatment is performed as follows: When this is done, the oxide semiconductor layer 423, which has been made low-resistance by the first heat treatment, becomes oxygen-rich. This allows for increased resistance (Type I configuration).

[0151] In this embodiment, a second heat treatment was performed after the silicon oxide film was formed, but the timing of the heat treatment The process is not limited to immediately after the silicon oxide film is formed, and is not problematic after the silicon oxide film is formed. stomach.

[0152] Furthermore, if heat-resistant materials are used for the source electrode layer 425a and the drain electrode layer 425b... In this case, the process using the first heat treatment conditions can be performed at the timing of the second heat treatment. Yes, it is possible. In this case, the heat treatment can be performed only once after the silicon oxide film is formed.

[0153] Furthermore, a protective insulating layer may be formed on the oxide insulating layer 428. Examples of protective insulating layers include: For example, a silicon nitride film can be formed using the RF sputtering method. The protective insulating layer is resistant to water, Hydrogen ions, OH - It does not contain impurities such as these, and blocks them from entering from the outside. Using an inorganic insulating film, silicon nitride film, aluminum nitride film, silicon oxide nitride film, and aluminum oxide nitride film are used. A luminium film or the like is used. Furthermore, the protective insulating layer is formed continuously with the oxide insulating layer 428. It is also possible to do so.

[0154] Next, a fifth photolithography step is performed to form a resist mask and an oxide insulating layer 4 Etching 28 forms a contact hole that reaches the drain electrode layer 425b. Furthermore, etching at this stage also forms contact holes that reach the connecting electrode 429.

[0155] Next, after removing the resist mask, a transparent conductive film is deposited. The material for the transparent conductive film is... These include indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO3). 2. Form materials such as ITO (abbreviated as ITO) using sputtering or vacuum deposition methods. Etching of materials is performed using hydrochloric acid-based solutions. However, etching of ITO in particular is Because residue is easily generated, indium oxide zinc oxide is used to improve etching processability. Gold (In2O3-ZnO) may also be used.

[0156] Next, a sixth photolithography step is performed to form a resist mask, and etching is performed. Unnecessary parts are removed to form the pixel electrode layer 110.

[0157] Furthermore, in this sixth photolithography process, the gate insulating layer 402 in the capacitance section The oxide semiconductor layer, oxide insulating layer 426b, and oxide insulating layer 428 are used as dielectrics, and capacitance A retention capacitance is formed between the wiring 421b and the pixel electrode layer 110.

[0158] Furthermore, in this sixth photolithography process, the first terminal 421c is used as the resist mass The transparent conductive film 128 formed on the terminal portion is left intact. This will be the electrode or wiring used in the connection. The connection electrode 4 is directly connected to the first terminal 421c. The transparent conductive film 128 formed on 29 is a connection that functions as an input terminal for gate wiring. These serve as terminal electrodes. Although not shown in the diagram, they also function as input terminals for source wiring. Sub-electrodes are also formed at the same time.

[0159] Thus, through six photolithography processes, six photomasks are used to channel A protective thin-film transistor 410 and a retaining capacitance unit can be completed.

[0160] The thin-film transistor shown in this embodiment is a thin-film transistor using an oxide semiconductor layer. The surface portion of the channel-forming region of the oxide semiconductor layer has a crystalline region, and the other portion The composition may be amorphous or a mixture of amorphous and microcrystalline materials. This suppresses the development of parasitic channels, resulting in good electrical properties and reliable performance. High-performance thin-film transistors and display devices can be fabricated.

[0161] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0162] (Embodiment 3) In this embodiment, at least a part of the drive circuit and a thin film to be placed in the pixel area are placed on the same substrate. An example of how to fabricate a lunger is described below.

[0163] The thin-film transistors placed in the pixel area are formed according to Embodiment 1 or Embodiment 2. Furthermore, the thin-film transistor shown in Embodiment 1 or Embodiment 2 is an n-channel type TF. Since T, among the drive circuits, the drive circuits that can be constructed with n-channel TFTs A portion of it is formed on the same substrate as the thin-film transistors in the pixel section.

[0164] An example of a block diagram of an active matrix display device is shown in Figure 7(A). On the plate 5300 are a pixel section 5301, a first scan line drive circuit 5302, and a second scan line drive It has a circuit 5303 and a signal line driving circuit 5304. The pixel section 5301 has multiple signal lines. Multiple scan lines are arranged extending from the signal line drive circuit 5304, and multiple scan lines are driven by the first scan line drive circuit 5 302, and the second scan line drive circuit 5303 are arranged as extensions. In the regions where the signal lines intersect, pixels, each containing a display element, are arranged in a matrix. Furthermore, the substrate 5300 of the display device is FPC (Flexible Printed Circuit). The timing control circuit 5305 (controller, control IC) is connected via a connection part such as cuit. It is connected to (also known as)

[0165] Figure 7(A) shows the first scan line drive circuit 5302, the second scan line drive circuit 5303, and the signal The line drive circuit 5304 is formed on the same substrate 5300 as the pixel section 5301. Therefore, Since the number of external components such as drive circuits is reduced, costs can be lowered. , when a drive circuit is provided outside the substrate 5300, the wiring is extended, causing the connection at the connection point The number of successors can be reduced, leading to improved reliability or yield.

[0166] The timing control circuit 5305 is, for example, related to the first scan line drive circuit 5302. The first scan line drive circuit start signal (GSP1), the scan line drive circuit clock signal (GCK1) is supplied. The timing control circuit 5305 also supplies the second scan line drive circuit For example, for 5303, the start signal (GSP2) for the second scan line drive circuit (start) It supplies the clock signal (GCK2) for the scan line drive circuit (also called a pulse). The drive circuit 5304 receives a start signal (SSP) for the signal line drive circuit and a crossover signal for the signal line drive circuit. SCK signal, video signal data (DATA) (also simply called video signal), A clock signal (LAT) shall be supplied. Each clock signal shall consist of multiple signals with different periods. It can be a clock signal, or it can be supplied along with an inverted clock signal (CKB). It may also be a first scan line drive circuit 5302 and a second scan line drive circuit 53 It is possible to omit either 03 or 03.

[0167] In Figure 7(B), a circuit with a low drive frequency (for example, the first scan line drive circuit 5302, the second...) The scan line driving circuit 5303 is formed on the same substrate 5300 as the pixel section 5301, and the signal line driving This shows a configuration in which the circuit 5304 is formed on a separate substrate from the pixel section 5301. As a result, thin films have a lower field-effect mobility compared to transistors using single-crystal semiconductors. The transistors can be used to configure the drive circuit formed on the substrate 5300. Therefore, the aim is to increase the size of the display device, reduce the number of processes, lower costs, or improve yield. It is possible.

[0168] Furthermore, the thin-film transistor shown in Embodiment 1 or Embodiment 2 is an n-channel type TFT. Figures 8(A) and 8(B) show the configuration of a signal line driving circuit composed of n-channel TFTs. Let's explain the process by giving an example.

[0169] The signal line driving circuit includes a shift register 5601 and a switching circuit 5602. Switching circuit 5602 is a switching circuit 5602_1~5602_N (where N is natural). It has multiple circuits, each of which is called a number. Switching circuits 5602_1 to 5602_N are, , multiple transistors called thin-film transistors 5603_1~5603_k (where k is a natural number) It has a thin-film transistor 5603_1~5603_k which is an N-channel type TFT. Let me explain an example.

[0170] The connection relationships of the signal line drive circuit will be explained using the switching circuit 5602_1 as an example. The first terminals of thin-film transistors 5603_1 to 5603_k are connected to wiring 5604_1, respectively. Connected to ~5604_k. Second terminal of thin-film transistor 5603_1~5603_k These are connected to signal lines S1~Sk, respectively. Thin-film transistors 5603_1~5603_ The gate of k is connected to wiring 5605_1.

[0171] The shift register 5601 sequentially supplies high levels (high signals) to the wiring 5605_1 to 5605_N. It outputs a signal at a high power supply potential level, also known as the switching circuit 5602_1~56 It has the function of selecting 02_N in order.

[0172] Switching circuit 5602_1 consists of wiring 5604_1~5604_k and signal lines S1~Sk A function to control the conductivity state (conduction between the first terminal and the second terminal), i.e., wiring 5604_ It has a function to control whether or not to supply potentials between 1 and 5604k to signal lines S1 and Sk. Thus, the switching circuit 5602_1 functions as a selector. The film transistors 5603_1 to 5603_k are connected to wiring 5604_1 to 5604_k, respectively. A function to control the continuity state between this and the signal lines S1~Sk, i.e., wiring 5604_1~5604_k It has the function of supplying the potential to the signal lines S1~Sk. Thus, thin-film transistor 56 Each of the 03_1 to 5603_k functions as a switch.

[0173] Note that wiring 5604_1 to 5604_k each contain video signal data (DATA). The input is video signal data (DATA), which is image information or analog corresponding to the image signal. It is often a G signal.

[0174] Next, regarding the operation of the signal line drive circuit in Figure 8(A), refer to the timing chart in Figure 8(B). Refer to the explanation. Figure 8(B) shows signals Sout_1 to Sout_N and signal Vda An example of ta_1~Vdata_k is shown. Signals Sout_1~Sout_N are, respectively, This is an example of the output signals of the 5601 register, where signals Vdata_1 to Vdata_k are These are examples of signals input to wiring 5604_1~5604_k, respectively. One operating period of the drive circuit corresponds to one gate selection period in the display device. The period is divided into, for example, period T1 to period TN. Each of periods T1 to TN is selected. This is the period for writing video signal data (DATA) to the pixels belonging to the row.

[0175] During periods T1 to TN, the shift register 5601 receives a high-level signal via wiring 560 Outputs are sent sequentially from 5_1 to 5605_N. For example, during period T1, shift register 5 601 outputs a high-level signal to wiring 5605_1. Then the thin-film transistor... Since 5603_1~5603_k will be turned on, the wiring 5604_1~5604_k and signal Lines S1 to Sk become conductive. At this time, wiring 5604_1 to 5604_k are Data(S1) to Data(Sk) are entered. Each of these belongs to the selected row via thin-film transistors 5603_1 to 5603_k. Of the pixels, the data is written to the pixels in columns 1 through k. In this way, during the period T1 to TN... Then, the video signal data (DATA) is sequentially placed in k columns for each pixel belonging to the selected row. It will be written.

[0176] As described above, video signal data (DATA) is written to pixels in multiple columns. This allows for a reduction in the number of video signal data (DATA) or the number of wires. Therefore, the number of connections to external circuits can be reduced. Also, the video signal is displayed in multiple columns. By writing directly, the writing time can be extended, and the video signal can be written. This can prevent overcrowding and under-storage.

[0177] Note that the shift register 5601 and the switching circuit 5602 are as described in Embodiment 1. Alternatively, a circuit composed of thin-film transistors as shown in Embodiment 2 can be used. In this case, the polarity of all transistors in the shift register 5601 is set to N-channel type. Alternatively, it can be composed of only one polarity of the P-channel type.

[0178] Next, the configuration of the scan line drive circuit will be explained. The scan line drive circuit has a shift register. It also may have level shifters or buffers in some cases. In the operating circuit, the shift register receives the clock signal (CLK) and the start pulse signal (S When P) is input, a selection signal is generated. The generated selection signal is buffered It is buffered and amplified in the scan line and supplied to the corresponding scan line. The scan line contains pixels for one line. The gate electrodes of the transistors are connected. And the transistors for one line of pixels Since they all need to be turned ON at once, the buffer must be capable of handling a large current. This is used.

[0179] A form of shift register used in part of a scan line drive circuit and / or signal line drive circuit. This will be explained using Figures 9 and 10.

[0180] The shift register consists of the first pulse output circuit 10_1 to the Nth pulse output circuit 10_N( N is a natural number greater than or equal to 3 (see Figure 9(A)). The shift resistance shown in Figure 9(A) The first pulse output circuit 10_1 to the Nth pulse output circuit 10_N of the first circuit have the first wiring First clock signal CK1 from 11, second clock signal CK2 from second wiring 12, The third clock signal CK3 is transmitted from wire 13 of 3, and the fourth clock signal C is transmitted from wire 14 of 4. K4 is supplied. Also, in the first pulse output circuit 10_1, the 5th wiring 15 is supplied. The start pulse SP1 (the first start pulse) is input. Also, the nth pulse from the second stage onward is input. In the pulse output circuit 10_n (where n is a natural number between 2 and N), the pulse output circuit one stage prior to it... The signal (called the preceding signal OUT(n-1)) (where n is a natural number greater than or equal to 2) is input. In the first pulse output circuit 10_1, the pulse output from the second-stage third pulse output circuit 10_3 is transmitted. A signal is input. Similarly, in the nth pulse output circuit 10_n from the second stage onward, the second stage The signal from the (n+2)th pulse output circuit 10_(n+2) (subsequent signal OUT(n+2) A signal is input to the following stage. Therefore, from the pulse output circuit of each stage, the subsequent stage and / or two The first output signal (OUT(1)(SR)~OUT) for input to the preceding pulse output circuit. (N)(SR)), a second output signal (OUT(1)~O) electrically connected to another wire, etc. UT(N)) is output. Note that, as shown in Figure 9(A), the final stage of the shift register The second stage does not receive the subsequent signal OUT(n+2), but as an example, the sixth stage is The second start pulse SP2 is from wire 16, and the third start pulse S is from the seventh wire 17. The configuration should be such that each P3 is input. Alternatively, it can be generated separately within the shift register. It may also be a signal that does not contribute to the pulse output to the pixel. For example, the (n+1)th pulse that does not contribute to the pulse output to the pixel. Lus output circuit 10 (n+1) , the (n+2)th pulse output circuit 10 (n+2) (D (Also called the M-stage), the second start pulse (SP2) and the third star from the said dummy stage The configuration may also generate a signal equivalent to a pulse (SP3).

[0181] The clock signal (CK) alternates between high and low levels (L signal, low power supply potential) at regular intervals. This is a signal that repeats the same values ​​(also called the level). Here, the first clock signal (CK1) to the second... The 4th clock signal (CK4) is delayed by 1 / 4 period in sequence. In this embodiment, Using the first clock signal (CK1) to the fourth clock signal (CK4), pulse output cycles It controls the drive of the road, etc. The clock signal is GCK depending on the input drive circuit. Although it is sometimes referred to as SCK, we will use CK in this explanation.

[0182] The first input terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 ~Electrically connected to one of the fourth wirings 14. For example, in Figure 9(A), The first pulse output circuit 10_1 has a first input terminal 21 that is electrically connected to the first wiring 11. The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is It is electrically connected to the third wiring 13. Also, the second pulse output circuit 10_2 is Input terminal 21 is electrically connected to the second wiring 12, and input terminal 22 is connected to the third wiring The third input terminal 23 is electrically connected to the fourth wiring 14, and the third input terminal 23 is electrically connected to the fourth wiring 14. Yes, they are.

[0183] Each of the first pulse output circuits 10_1 to the Nth pulse output circuits 10_N has a first input terminal Child 21, second input terminal 22, third input terminal 23, fourth input terminal 24, fifth input terminal Assume that it has a child 25, a first output terminal 26, and a second output terminal 27 (see Figure 9(B)). ). In the first pulse output circuit 10_1, the first clock signal is connected to the first input terminal 21. CK1 is input, the second clock signal CK2 is input to the second input terminal 22, and the third The third clock signal CK3 is input to input terminal 23, and the start signal is input to the fourth input terminal 24. A signal is input, the subsequent signal OUT(3) is input to the 5th input terminal 25, and the 1st output terminal The first output signal OUT(1)(SR) is output from child 26, and the second output terminal 27 This means that the output signal OUT(1) of 2 is being output.

[0184] Next, regarding an example of a specific circuit configuration of the pulse output circuit shown in Figure 9(B), see Figure 9(C) ) will be explained.

[0185] The pulse output circuit shown in Figure 9(C) consists of the first transistor 31 to the eleventh transistor It has 41. Also, the first input terminals 21 to the fifth input terminals 25 described above, and the first In addition to the output terminal 26 and the second output terminal 27, the first high power supply potential VDD is supplied to the power supply. Line 51 is supplied with a second high power supply potential VCC, and power line 52 is supplied with a low power supply potential VSS. A signal is sent from the power line 53 to the first transistor 31 to the eleventh transistor 41, or The power supply potential is supplied. Here, the relative magnitudes of the power supply potentials of each power line in Figure 9(C) are as follows: Assuming that the first power supply potential VDD is at or above the second power supply potential VCC, the second power supply potential VCC is The potential of the third power supply is set to be greater than the third power supply potential VSS. Note that the first clock signal (CK1) to the third The clock signal (CK4) is a signal that alternates between high and low levels at regular intervals. However, assume that VDD is at the H level and VSS is at the L level. Note that the potential of power line 51 is... By setting VDD higher than the potential VCC of the power line 52, the operation will not be affected. Furthermore, the potential applied to the gate electrode of the transistor can be kept low, This can reduce the threshold shift and suppress degradation.

[0186] In Figure 9(C), the first transistor 31 has its first terminal electrically connected to the power line 51. The second terminal is electrically connected to the first terminal of the ninth transistor 39, and the gate electrode The second transistor 32 is electrically connected to the first terminal 24. The second terminal is electrically connected to the power line 53, and the first terminal of the ninth transistor 39 is electrically connected to the first terminal. They are connected, and the gate electrode is electrically connected to the gate electrode of the fourth transistor 34. The third transistor 33 has its first terminal electrically connected to the first input terminal 21. The second terminal is electrically connected to the first output terminal 26. The fourth transistor 34 is The first terminal is electrically connected to the power line 53, and the second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 has its first terminal electrically connected to the power line 53. The second terminal is connected to the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34. The pole is electrically connected, and the gate electrode is electrically connected to the fourth input terminal 24. Transistor 36 of 6 has its first terminal electrically connected to the power line 52, and its second terminal is connected to the second The gate electrode of transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected. The gate electrode is electrically connected to the fifth input terminal 25. The seventh transistor 37 has its first terminal electrically connected to the power line 52, and its second terminal connected to the eighth transistor 38. The second terminal is electrically connected, and the gate electrode is electrically connected to the third input terminal 23. The eighth transistor 38 has its first terminal connected to the gate electrode of the second transistor 32 and It is electrically connected to the gate electrode of the fourth transistor 34, and the gate electrode is connected to the second input terminal It is electrically connected to 22. The ninth transistor 39 has its first terminal connected to the first transistor It is electrically connected to the second terminal of the sta 31 and the second terminal of the second transistor 32, and the second terminal The child is connected to the gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40. Electrically connected, the gate electrode is electrically connected to power line 52. 10th transistor The ZISTA 40 has a first terminal electrically connected to the first input terminal 21, and a second terminal connected to the second output terminal It is electrically connected to the power terminal 27, and the gate electrode is electrically connected to the second terminal of the ninth transistor 39. They are connected. The 11th transistor 41 has its first terminal electrically connected to the power line 53. The second terminal is electrically connected to the second output terminal 27, and the gate electrode is connected to the second transistor The gate electrode of transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected. Yes, they are.

[0187] In Figure 9(C), the gate electrode of the third transistor 33 and the tenth transistor 4 The connection point between the gate electrode of transistor 0 and the second terminal of transistor 9 39 is defined as node A. Also, the gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, and The second terminal of transistor 35 (number 5), the second terminal of transistor 36 (number 6), and the eighth transistor The connection point between the first terminal of transistor 38 and the gate electrode of transistor 41 (number 11) is at node B. (See Figure 10(A)).

[0188] A thin-film transistor is defined as a transistor with at least three components, including a gate, a drain, and a source. It is an element having terminals, and has a channel region between the drain region and the source region. Current can be passed through the drain region, channel region, and source region. Here, The source and drain vary depending on the structure and operating conditions of the thin-film transistor, so It is difficult to determine whether something is a source or a drain. The region that functions as rain is sometimes not referred to as source or drain. For example, they may be referred to as terminal 1 and terminal 2, respectively.

[0189] Here, the timing of a shift register equipped with multiple pulse output circuits as shown in Figure 10(A) The chart is shown in Figure 10(B). Note that if the shift register is a scan line drive circuit... In total, period 61 in Figure 10(B) is the vertical retrace period, and period 62 corresponds to the gate selection period. do.

[0190] Furthermore, as shown in Figure 10(A), the ninth gate to which the second power supply potential VCC is applied By installing the Rangista 39, the following occurs before and after the bootstrap operation: It has advantages like these.

[0191] If there is no 9th transistor 39 to which a second potential VCC is applied to the gate electrode, boot When the potential of node A rises due to the strapping action, the second terminal of the first transistor 31 The potential of the source increases and becomes greater than the first power supply potential VDD. The source of transistor 31 switches to the first terminal side, i.e., the power line 51 side. In the first transistor 31, both the gate and source, and the gate and drain are Furthermore, a large bias voltage is applied, causing significant stress and potentially damaging the transistor. This can be a factor in the transformation. Therefore, the ninth gate electrode is subjected to a second power supply potential VCC. By providing the transistor 39, the potential of node A will change due to the bootstrap operation. Although it rises, it prevents an increase in the potential of the second terminal of the first transistor 31. This is possible. In other words, by providing the ninth transistor 39, the first transistor The value of the negative bias voltage applied between the gate and source of T31 can be reduced. Therefore, by using the circuit configuration of this embodiment, the first transistor 31's gate The negative bias voltage applied between the source and the t-source can also be reduced, thus reducing stress on the first source. This can suppress the degradation of transistor 31.

[0192] Furthermore, the location where the ninth transistor 39 is installed is the second transistor 31 The terminal is connected to the gate of the third transistor 33 via the first and second terminals. Any configuration that is set up in this manner is acceptable. Note that the pulse output circuit in this embodiment may be equipped with multiple pulse output circuits. In the case of a soft register, in a signal line drive circuit with more stages than a scan line drive circuit, the 9th transistor The ZISTA39 can be omitted, which has the advantage of reducing the number of transistors.

[0193] Furthermore, the semiconductor layer of the first transistor 31 to the eleventh transistor 41 is an oxide semiconductor. By using a conductor, the off-current of the thin-film transistor is reduced, as well as the on-current and Because it is possible to increase the field effect mobility and reduce the degree of degradation. This can reduce malfunctions within the circuit. Also, transistors using oxide semiconductors, Compared to transistors using morphous silicon, a high potential is applied to the gate electrode. The degree of transistor degradation caused by this is small. Therefore, the second power supply potential VCC is supplied. The same operation can be obtained by supplying the first power potential VDD to the power line, and the connections between circuits are also This allows for a reduction in the number of power lines, thus enabling the miniaturization of the circuit.

[0194] Furthermore, the gate electrode of the seventh transistor 37 is supplied with power from the third input terminal 23. A lock signal is supplied to the gate electrode of the eighth transistor 38 by the second input terminal 22. The clock signal is supplied to the gate electrode of the seventh transistor by the second input terminal 22. The supplied clock signal, the clock supplied to the 8th gate electrode by the 3rd input terminal 23 The same effect can be achieved by reversing the wiring to produce a black signal. (See Figure 10) In the shift register shown in (A), the seventh transistor 37 and the eighth transistor From a state where both 38 are ON, the 7th transistor 37 turns OFF, and the 8th transistor 38 turns OFF. ON state, then transistor 7 37 is OFF, and transistor 8 38 is OFF state. By doing so, the potential of the second input terminal 22 and the third input terminal 23 decreases. The resulting decrease in the potential of node B is a decrease in the potential of the gate electrode of the seventh transistor 37. , and this occurs twice due to a decrease in the potential of the gate electrode of transistor 8 38. Meanwhile, in the shift register shown in Figure 10(A), the seventh transistor 37 and From a state where both transistors 38 are ON, the 7th transistor 37 turns ON, and the 8th transistor turns ON. Transistor 38 is in the off state, then the 7th transistor 37 is off, and the 8th transistor By turning off the st38, the second input terminal 22 and the third input terminal 23 The decrease in the potential of node B, which occurs as a result of the decrease in the potential of the eighth transistor 38, is controlled by the gauge of the eighth transistor 38. The voltage can be reduced by a decrease in the potential of the electrode. Therefore, the seventh transistor A clock signal is supplied to the gate electrode of 37 from the third input terminal 23, and the eighth transistor The connection is such that the clock signal is supplied to the gate electrode of terminal 38 from the second input terminal 22. This is preferable because the number of fluctuations in the potential of node B is reduced, and the noise is reduced. This is because it can be reduced.

[0195] In this way, the potentials of the first output terminal 26 and the second output terminal 27 are maintained at an L level. During the period, a high-level signal is periodically supplied to node B, thus creating a pulse This can suppress malfunctions in the output circuit.

[0196] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0197] (Embodiment 4) Thin-film transistors as shown in Embodiments 1 and 2 are fabricated, and the thin-film transistors are used as pixel parts, etc. Furthermore, it is necessary to manufacture a semiconductor device (also called a display device) that has a display function and is used in the drive circuit. This can be done. Also, a part of the drive circuit having a thin-film transistor as shown in Embodiments 1 and 2 Alternatively, the entire system can be integrally formed on the same substrate as the pixel section to form a system-on-panel. can.

[0198] A display device includes display elements. Display elements include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements. A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element is activated by current or voltage. This category includes elements whose brightness is controlled, specifically inorganic EL (Electrical LEDs). This includes Luminescence elements, organic EL elements, etc. Also, electronic inks. Furthermore, display media in which the contrast changes due to electrical effects can also be applied.

[0199] Furthermore, the display device includes a panel in which the display elements are sealed, and a controller on the panel. It includes a module on which ICs and the like are mounted. Furthermore, it is a device for manufacturing the display device. With respect to an element substrate that corresponds to one form before the display element is completed in the process, the element substrate is The element substrate is specifically provided with means for supplying current to the display element in each of the multiple pixels. This may be a state where only the pixel electrodes of the display element are formed, or a conductive film that will serve as the pixel electrode may be formed. This may be the state after the film has been formed but before etching to form the pixel electrodes. All forms apply.

[0200] In this specification, the term "display device" refers to an image display device, a display device, or an optical display device. This refers to the power source (including lighting equipment). It also refers to connectors, such as FPC (Flexible Printed Circuit). (inted circuit) or TAB (Tape Automated Bon) (ding) tape or TCP (Tape Carrier Package) Modules that have a printed circuit board attached to the end of the TAB tape or TCP. The display element or IC (integrated circuit board) is integrated using the COG (Chip On Glass) method. All modules in which the road is directly implemented are also included in the display device.

[0201] In this embodiment, the external appearance and cross-section of a liquid crystal display panel, which corresponds to one form of semiconductor device, are described below. This will be explained using Figure 11. Figure 11 shows an embodiment formed on the first substrate 4001. A highly reliable thin film containing the In-Ga-Zn-O system film shown in 1 and 2 as an oxide semiconductor layer. The film transistors 4010, 4011, and the liquid crystal element 4013 are connected to the second substrate 4006. This is a top view of the panel, which is sealed with sealant 4005 in between, and Figure 11(B) is a top view of Figure 1 This corresponds to the cross-sectional view at MN of 1(A1)(A2).

[0202] The pixel section 4002 and the scanning line driving circuit 4004 are surrounded on the first substrate 4001. A sealing material 4005 is provided in this manner. Also, the pixel section 4002 and the scan line drive rotation A second substrate 4006 is provided on the path 4004. Therefore, the pixel section 4002 and the scanning The line drive circuit 4004 consists of the first substrate 4001, the sealing material 4005, and the second substrate 4006. It is sealed together with the liquid crystal layer 4008. Also, the seal on the first substrate 4001 A single crystal is placed on a separately prepared substrate in a region different from the area enclosed by material 4005. A signal line driving circuit 4003, formed from a semiconductor film or a polycrystalline semiconductor film, is mounted.

[0203] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG method, Wire bonding methods or TAB methods can be used. Figure 11(A1) This is an example of implementing the signal line drive circuit 4003 using the COG method, and Figure 11(A2) shows that This is an example of implementing the signal line drive circuit 4003 using the TAB method.

[0204] Furthermore, the pixel section 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 are, It has multiple thin-film transistors, and in Figure 11(B), the thin film included in the pixel section 4002 Transistor 4010 and thin-film transistor 4011 included in scan line drive circuit 4004 The following is an example. On thin-film transistors 4010 and 4011 are insulating layers 4020 and 402 1 is provided.

[0205] Thin-film transistors 4010 and 4011 use an In-Ga-Zn-O system film as an oxide semiconductor layer. The highly reliable thin-film transistors shown in embodiments 1 and 2 can be applied. In this embodiment, thin-film transistors 4010 and 4011 are n-channel thin-film transistors. He is a Rangista.

[0206] Furthermore, the pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin-film transistor 4010. They are electrically connected. And the counter electrode layer 4031 of the liquid crystal element 4013 is on the second substrate 40 Formed on 06. Pixel electrode layer 4030, counter electrode layer 4031, and liquid crystal layer 4008 The overlapping portion corresponds to the liquid crystal element 4013. Note that the pixel electrode layer 4030 and the opposite The electrode layer 4031 is provided with insulating layers 4032 and 4033, which function as alignment films. The liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033. However, the color filter is installed on either the first substrate 4001 or the second substrate 4006. You can do that.

[0207] The first substrate 4001 and the second substrate 4006 are made of glass, metal (typically, glass). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, or acrylic resin film Film can be used. Also, aluminum foil can be used with PVF film or polyester. It is also possible to use a sheet with a structure sandwiched between layers of film.

[0208] Furthermore, 4035 is a columnar spacer obtained by selectively etching an insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 It is provided in [location]. A spherical spacer may also be used. Also, the counter electrode layer 4031 It is electrically connected to a common potential line provided on the same substrate as the thin-film transistor 4010. Using a common connection part, the opposing electrode layer 40 is connected via conductive particles placed between the pair of substrates. 31 and the common potential line can be electrically connected. Note that the conductive particles are the sealing material 40 It will be included in 05.

[0209] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Yes, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears earlier. The blue phase only appears within a narrow temperature range, so improving the temperature range is necessary. To achieve this, a liquid crystal composition containing 5% or more by weight of a chiral agent is used in the liquid crystal layer 4008. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 10 μs. c. The duration is short, less than 100 μsec, and is optically isotropic, so orientation treatment is unnecessary. It has little dependence on the field of view.

[0210] Although this embodiment is an example of a transmissive liquid crystal display device, the present invention can also be applied to a reflective liquid crystal display device. It can also be applied to semi-transmissive liquid crystal display devices.

[0211] Furthermore, in the liquid crystal display device of this embodiment, a polarizing plate is provided on the outside (viewing side) of the substrate, and on the inside An example is shown where the colored layer and the electrode layer used for the display element are arranged in that order, but the polarizing plate is placed on the inside of the substrate. It may also be done. Furthermore, the laminated structure of the polarizing plate and the colored layer is not limited to this embodiment, and the polarizing plate and The coloring layer and the manufacturing process conditions should be set appropriately. A light-shielding film that functions in this way may be provided.

[0212] Furthermore, in this embodiment, in order to reduce surface irregularities caused by thin-film transistors, and thin film To improve the reliability of the transistor, the thin film transistor obtained in Embodiment 1 or 2 The ta is then covered with insulating layers (insulating layer 4020, insulating layer 4021) that function as a protective film or planarizing insulating film. It has a covering structure. The protective film protects against organic matter, metallic substances, water vapor, etc. suspended in the atmosphere. This is to prevent the intrusion of contaminating impurities, and a dense film is preferred. The protective film is sputtered. Using this method, silicon oxide film, silicon nitride film, silicon oxide nitride film, silicon oxide nitride Film, aluminum oxide film, aluminum nitride film, aluminum oxide nitride film, or aluminum nitride oxide The protective film may be formed as a single layer or a laminate of aluminum film. In this embodiment, the protective film is sputtered. Examples of legal formation are shown, but there are no particular limitations, and various methods of formation are acceptable.

[0213] Here, a laminated insulating layer 4020 is formed as a protective film. As the first layer of 0, a silicon oxide film is formed using the sputtering method. When using a recon film, the aluminum film used as the source electrode layer and drain electrode layer is It is effective in preventing lockout.

[0214] Furthermore, an insulating layer is formed as the second layer of the protective film. Here, the second layer of the insulating layer 4020 is Then, a silicon nitride film is formed using the sputtering method. The silicon nitride film is used as a protective film. This allows mobile ions such as sodium to penetrate the semiconductor region, altering the electrical properties of the TFT. It can suppress the process of causing the problem.

[0215] Furthermore, after forming the protective film, the oxide semiconductor layer is annealed (300°C to 400°C). You may do so.

[0216] Furthermore, an insulating layer 4021 is formed as a planar insulating film. As the insulating layer 4021, acrylic Heat-resistant organic materials such as polyimide, benzocyclobutene, polyamide, and epoxy. Materials can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials) can also be used. Using siloxane-based resins, PSG (phosphorus glass), BPSG (phosphorus boron glass), etc. This can be achieved by stacking multiple insulating films made of these materials. 4021 may be formed.

[0217] Siloxane-based resins are formed using siloxane-based materials as the starting material for Si-OS. This corresponds to a resin containing i-bonds. Siloxane resins use organic groups (e.g., alkyl groups) as substituents. You may also use aryl groups or fluoro groups. Furthermore, organic groups may have fluoro groups. You can.

[0218] The method for forming the insulating layer 4021 is not particularly limited and can be sputtered or SOG depending on the material. Spin coating, dip coating, spray coating, droplet ejection (inkjet method, screen coating) Printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife A coater or the like can be used. When forming the insulating layer 4021 using a material liquid, During the manufacturing process, the oxide semiconductor layer is simultaneously annealed (300°C to 400°C). This is also acceptable. By combining the firing process of the insulating layer 4021 and the annealing of the oxide semiconductor layer, efficiency can be improved. This makes it possible to manufacture semiconductor devices.

[0219] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium oxide-containing indium tin oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide with added silicon dioxide. Conductive materials can be used.

[0220] Furthermore, conductive polymers are used as the pixel electrode layer 4030 and the counter electrode layer 4031. It can be formed using a conductive composition containing (also known as). The resulting pixel electrodes have a sheet resistance of 10,000 Ω / □ or less and a light transmittance at a wavelength of 550 nm. It is preferable that the ratio is 70% or more. Also, the resistance of the conductive polymer contained in the conductive composition The ratio is preferably 0.1 Ω·cm or less.

[0221] As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene Examples include derivatives thereof, or copolymers of two or more of these.

[0222] In addition, a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 or pixel unit 4 The various signals and potentials supplied to 002 are provided by the FPC4018.

[0223] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. Formed from the same conductive film as 30, the terminal electrode 4016 is made of thin-film transistor 4010, 40 The source electrode layer and drain electrode layer are formed of the same conductive film.

[0224] The connecting terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. They are electrically connected.

[0225] Furthermore, in Figure 11, a signal line drive circuit 4003 is formed separately and implemented on the first substrate 4001. Although an example of the configuration is shown, this embodiment is not limited to this configuration. Scan line drive circuit Alternatively, it may be formed and implemented separately, or it may be part of the signal line drive circuit or part of the scan line drive circuit. It is also acceptable to form and implement the component separately.

[0226] Figure 12 shows a TFT substrate 2600 manufactured by applying the TFTs shown in Embodiments 1 and 2. This shows an example of how to use it to configure a liquid crystal display module as a semiconductor device.

[0227] Figure 12 shows an example of a liquid crystal display module, in which the TFT substrate 2600 and the opposing substrate 2601 are The pixel portion 2603, which includes a TFT and the like, is fixed in place by a material 2602, and the liquid crystal layer is also included between them. A display element 2604 and a colored layer 2605 are provided to form a display area. Colored layer 2605 This is necessary for color display, and in the case of the RGB method, it corresponds to red, green, and blue. A colored layer is provided corresponding to each pixel. The TFT substrate 2600 and the opposing substrate 2601 Polarizing plates 2606, 2607, and 2613 are arranged on the outside. The light source is cold It consists of a cathode tube 2610 and a reflector 2611, and the circuit board 2612 is flexible The wiring circuit section 2608 of the TFT board 2600 is connected by the wire board 2609, and the control External circuits such as polarizing circuits and power supply circuits are incorporated. Also, between the polarizing plate and the liquid crystal layer The layers may be stacked with a phase difference plate in place.

[0228] The LCD display module has TN (Twisted Nematic) mode and IPS (I n-Plane-Switching) mode, FFS (Fringe Field Switching) (witching) mode, MVA (Multi-domain Vertical A) alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. You can use modes such as UID Crystal.

[0229] Through the above process, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. ru.

[0230] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0231] (Embodiment 5) In this embodiment, a semiconductor device to which the thin-film transistor shown in Embodiment 1 or 2 is applied is used. An example of electronic paper is shown.

[0232] Figure 13 shows an active-matrix electronic paper as an example of a semiconductor device. The thin-film transistor 581 used in the device is the thin-film transistor shown in Embodiments 1 and 2. An inverter can be applied.

[0233] The electronic paper in Figure 13 is an example of a display device using a twist ball display method. The Toball display method uses spherical particles painted in white and black on an electrode layer used as a display element. It is placed between a first electrode layer and a second electrode layer, and the potential between the first electrode layer and the second electrode layer is This method of display involves controlling the orientation of spherical particles by creating a difference in their orientation.

[0234] The thin-film transistor 581 sealed between substrate 580 and substrate 596 has a bottom gate structure. This is a thin-film transistor in which the first electrode layer 58 is formed by the source electrode layer or the drain electrode layer. 7 is in contact with and electrically connected to the insulating layers 584 and 585 through openings formed therein. Between the electrode layer 587 and the second electrode layer 588, there are black region 590a and white region 590b. A spherical particle 589 is provided, which has a cavity 594 surrounding it that is filled with liquid. Furthermore, the area surrounding the spherical particles 589 is filled with a filler material 595 such as resin (see Figure 13). In this embodiment, the first electrode layer 587 corresponds to the pixel electrode, and the second electrode layer 588 This corresponds to the common electrode. The second electrode layer 588 is on the same substrate as the thin-film transistor 581. It is electrically connected to a common potential line provided. Using the connecting portion, the second electrode layer 588 and conductive particles placed between the pair of substrates are connected. It can be electrically connected to a common potential line.

[0235] Alternatively, an electrophoretic element can be used instead of a twist ball. (Transparent liquid) And, positively charged white particles and negatively charged black particles are enclosed in a 2-inch container with a diameter of 10 μm or more. Microcapsules of approximately 00 μm or less are used. They are placed between the first electrode layer and the second electrode layer. The microcapsules being injected are subjected to an electric field by a first electrode layer and a second electrode layer. Then, the white particles and black particles move in opposite directions, allowing for the display of either white or black. A display element that applies this principle is called an electrophoretic display element, commonly known as electronic paper. Because electrophoretic display elements have a higher reflectivity than liquid crystal display elements, auxiliary lights are used. It is unnecessary, consumes little power, and allows the display to be seen even in dimly lit places. Furthermore, even if power is not supplied to the display unit, it is possible to retain the image that has been displayed. Therefore, it is possible to transmit from a radio wave source to a semiconductor device with a display function (simply a display device, or a display device). Even when the semiconductor device (also known as a device equipped with) is moved away, the displayed image is saved. This will become possible.

[0236] Based on the above, it is possible to create a highly reliable electronic paper as a semiconductor device.

[0237] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0238] (Embodiment 6) In this embodiment, a semiconductor device to which the thin-film transistor shown in Embodiment 1 or 2 is applied is used. An example of a light-emitting display device is shown. The display element of the display device is, in this case, an electroluminescent device. This is demonstrated using a light-emitting element that utilizes lorluminescence. Light-emitting devices are distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former are called organic EL elements, and the latter are called inorganic EL elements.

[0239] Organic EL elements emit electrons and holes from a pair of electrodes when a voltage is applied to the light-emitting element. Each of these is injected into a layer containing a luminescent organic compound, and an electric current flows through it. Then, these... The recombination of electrons and holes causes the luminescent organic compound to form an excited state. And when that excited state returns to the ground state, it emits light. From this mechanism, Such light-emitting devices are called current-excited light-emitting devices.

[0240] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. ru.

[0241] Figure 14 shows an example of a semiconductor device to which the present invention is applied, which can be used to apply digital time-gradation driving. This figure shows an example of a basic configuration.

[0242] This section describes the pixel configuration and operation to which digital time-based gradation driving can be applied. This refers to the oxide semiconductor layer (In-Ga-Zn-O system film) shown in Embodiments 1 and 2, which is channeled through This example shows the use of two n-channel transistors in a single pixel for the Nell-forming region. .

[0243] Pixel 6400 consists of a switching transistor 6401, a driving transistor 6402, It has a light-emitting element 6404 and a capacitive element 6403. Switching transistor 64 01 has a gate connected to scan line 6406, and the first electrode (source electrode and drain electrode) The (side) is connected to signal line 6405, and the second electrode (the other of the source electrode and drain electrode) is driven It is connected to the gate of the drive transistor 6402. The drive transistor 6402 is The gate is connected to the power line 6407 via the capacitive element 6403, and the first electrode is connected to the power line 640 It is connected to 7, and the second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 6404. The second electrode of the light-emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is identical It is electrically connected to a common potential line formed on the substrate. If that connection point is called a common connection point... Yes.

[0244] Furthermore, a low power supply potential is set for the second electrode (common electrode 6408) of the light-emitting element 6404. The low power supply potential is defined as the low power supply potential set on power line 6407 relative to the high power supply potential. The potential is the potential that satisfies the high power supply potential, and low power supply potentials include, for example, GND and 0V. It may be fixed. The potential difference between this high power supply potential and the low power supply potential is applied to the light-emitting element 6404. Then, in order to pass current through the light-emitting element 6404 and make the light-emitting element 6404 emit light, a high power supply potential is used. The potential difference between the low power supply potential and the light-emitting element 6404 is set to be greater than or equal to the forward threshold voltage of the light-emitting element 6404. Set the potential for each.

[0245] Note that the capacitive element 6403 is omitted by substituting the gate capacitance of the drive transistor 6402. This is also possible. Regarding the gate capacitance of the drive transistor 6402, the channel region A capacitance may be formed between the gate electrode and the gate electrode.

[0246] In the case of a voltage input / voltage drive method, the gate of the drive transistor 6402 is: The drive transistor 6402 is either fully on or completely off. The video signal is input. In other words, the driver transistor 6402 is operated in the linear region. The driver transistor 6402 operates in the linear region, therefore the voltage of the power line 6407 is higher than A high voltage is applied to the gate of the drive transistor 6402. The signal line 6405 is connected to... Apply a voltage equal to or greater than (power line voltage + Vth of the drive transistor 6402).

[0247] Furthermore, when using analog gradation drive instead of digital time gradation drive, the signal input is different. By doing so, the same pixel configuration as in Figure 14 can be used.

[0248] When performing analog grayscale driving, the gate of the driving transistor 6402 is connected to the light-emitting element 6404 Apply a voltage equal to or greater than the forward voltage of the drive transistor 6402 + Vth. (Light-emitting element 64) The forward voltage of 04 refers to the voltage required to achieve the desired brightness, and at least the forward voltage is Includes key voltage. Note that the drive transistor 6402 operates in the saturation region. By inputting an O signal, current can be supplied to the light-emitting element 6404. The drive transistor... To operate the 6402 in the saturation region, the potential of the power line 6407 is set to the drive transistor The gate potential of the TA6402 is made higher. By making the video signal analog, the light-emitting element... By supplying current to the 6404 according to the video signal, analog grayscale driving can be performed.

[0249] Note that the pixel configuration shown in Figure 14 is not limited to this. For example, if new pixels are added to the pixels shown in Figure 14... Switches, resistors, capacitives, transistors, or logic circuits may be added to it.

[0250] Next, the configuration of the light-emitting element will be explained using Figure 15. Here, the driving TFT is n Let's take the case of a type as an example to explain the cross-sectional structure of a pixel. Figure 15(A)(B)(C) The TFT7001, 7011, and 7021, which are driver TFTs used in semiconductor devices, are actually It can be fabricated in the same way as the thin-film transistors shown in Forms 1 and 2, and is an In-Ga-Zn-O system film. This is a highly reliable thin-film transistor that includes an oxide semiconductor layer.

[0251] A light-emitting element only needs to have at least one of its electrodes, either the anode or the cathode, transparent in order to extract light. Then, a thin-film transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. This includes top-side emission, bottom-side emission which extracts light from the substrate side, and on the substrate side and the opposite side of the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from the side surface, and the pixel configuration of the present invention is which emission It can also be applied to light-emitting elements in structures.

[0252] The light-emitting element with a bottom-extrusion structure will be explained using Figure 15(A).

[0253] The driving TFT 7011 is n-type, and the light emitted from the light-emitting element 7012 is directed to the first electrode 701 Figure 15(A) shows a cross-sectional view of the pixel when it is ejected to side 3. A light-emitting element 7 is placed on a light-transmitting conductive film 7017 that is electrically connected to the drain electrode layer of the light-emitting element 7 A first electrode 7013 is formed on 012, and an EL layer 7014 is placed on the first electrode 7013. Then, the second electrode 7015 is stacked in order.

[0254] The light-transmitting conductive film 7017 includes indium oxide containing tungsten oxide, acid Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, oxide Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide A transparent conductive film such as indium tin oxide with added inium can be used.

[0255] Furthermore, the first electrode 7013 of the light-emitting element can be made of various materials. For example, the first When using electrode 7013 as the cathode, a material with a small work function is used, specifically, for example For example, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, Sr, and In addition to alloys containing these (such as Mg:Ag and Al:Li), rare earth metals such as Yb and Er are also included. This is preferable. In Figure 15(A), the film thickness of the first electrode 7013 is such that it transmits light (preferably Or, it should be about 5 nm to 30 nm. For example, an aluminum film with a thickness of 20 nm. This is used as the first electrode 7013.

[0256] Furthermore, after laminating a transparent conductive film and an aluminum film, selective etching is performed. A transparent conductive film 7017 and a first electrode 7013 may be formed, in which case the same This is preferable because etching can be performed using a mask.

[0257] Furthermore, the periphery of the first electrode 7013 is covered with a partition wall 7019. The partition wall 7019 is made of polyimi Organic resin films such as acrylic, polyamide, epoxy, inorganic insulating films, or organic polysilicone It is formed using Sun. The partition wall 7019 is made of a photosensitive resin material in particular, and the first electrode 70 An opening is formed on 13, and the side walls of the opening are inclined surfaces formed with a continuous curvature. It is preferable to form it in such a way. When a photosensitive resin material is used as the partition wall 7019. This eliminates the need to form a resist mask.

[0258] Furthermore, the EL layer 7014 formed on the first electrode 7013 and the partition wall 7019 is at least It is sufficient to include a light-emitting layer, and even if it consists of a single layer, it can be configured so that multiple layers are stacked on top of each other. Either way is fine. If the EL layer 7014 is composed of multiple layers, the cathode is... An electron injection layer, electron transport layer, light emission layer, hole transport layer, and hole are placed on the first electrode 7013 which functions. The layers are stacked in the order of the injection-treated layers. Note that it is not necessary to provide all of these layers.

[0259] Furthermore, the stacking order is not limited to the above, and the first electrode 7013 can function as an anode, and the first electrode A hole injection layer, hole transport layer, light emission layer, electron transport layer, and electron injection layer are stacked on top of 7013 in that order. This is also acceptable. However, when comparing power consumption, the first electrode 7013 is used as the cathode. On the first electrode 7013, there is an electron injection layer, an electron transport layer, an emissive layer, a hole transport layer, and a hole injection layer. Stacking the layers in the order they are placed inside out can suppress the voltage rise in the drive circuit and reduce power consumption. Therefore, it is preferable.

[0260] Furthermore, various materials can be used for the second electrode 7015 formed on the EL layer 7014. This is possible. For example, when the second electrode 7015 is used as the anode, a material with a large work function can be used. Materials such as ZrN, Ti, W, Ni, Pt, Cr, etc., and ITO, IZO, ZnO, etc. A transparent conductive material is preferred. Also, a shielding film 7016, for example, a light shielding film, is placed on the second electrode 7015. A light-shielding metal, a light-reflecting metal, etc., is used. In this embodiment, the second electrode 7015 and An ITO film is used, and a Ti film is used as the shielding film 7016.

[0261] The first electrode 7013 and the second electrode 7015 sandwich the EL layer 7014 which includes the light-emitting layer. The region corresponds to the light-emitting element 7012. In the element structure shown in Figure 15(A), The light emitted from 7012 is directed toward the first electrode 7013, as indicated by the arrow.

[0262] In Figure 15(A), the light emitted from the light-emitting element 7012 is directed to the color filter layer. It passes through 7033, insulating layer 7032, oxide insulating layer 7031, gate insulating layer 7060, and It is then ejected through substrate 7010.

[0263] The color filter layer 7033 is used in droplet ejection methods such as inkjet printing, as well as in photolithography. These are formed using etching methods employing graphic technology.

[0264] Furthermore, the color filter layer 7033 is covered with an overcoat layer 7034, providing additional protective insulation. It is covered by layer 7035. Note that in Figure 15(A), the overcoat layer 7034 is a thin film. As shown in the diagram, the overcoat layer 7034 uses a resin material such as acrylic resin, and - It has the function of flattening the irregularities caused by the filter layer 7033.

[0265] Furthermore, it is formed in the protective insulating layer 7035 and the insulating layer 7032, and in the connecting electrode layer 7030. The contact hole is positioned to overlap with partition wall 7019.

[0266] Next, a light-emitting element with a double-sided injection structure will be explained using Figure 15(B).

[0267] Figure 15(B) shows the transparent material electrically connected to the drain electrode layer of the driving TFT7021. The first electrode 7023 of the light-emitting element 7022 is formed on the conductive film 7027 having the above. An EL layer 7024 and a second electrode 7025 are stacked in order on the first electrode 7023.

[0268] The transparent conductive film 7027 includes indium oxide containing tungsten oxide, acid Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, oxide Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide A transparent conductive film such as indium tin oxide with added inium can be used.

[0269] Furthermore, the first electrode 7023 can be made of various materials. For example, the first electrode 70 When using 23 as the cathode, a material with a small work function is preferred, specifically, for example, Li or Cs. Alkali metals such as Mg, Ca, Sr and other alkaline earth metals, and those containing these. In addition to alloys (such as Mg:Ag and Al:Li), rare earth metals such as Yb and Er are preferred. In this embodiment, the first electrode 7023 is used as the cathode, and its film thickness is such that it transmits light. (Preferably, about 5 nm to 30 nm). For example, aluminum with a film thickness of 20 nm A um film is used as the cathode.

[0270] Furthermore, after laminating a transparent conductive film and an aluminum film, selective etching is performed. A transparent conductive film 7027 and a first electrode 7023 may be formed, in which case the same Etching can be performed using a mask, which is preferable.

[0271] Furthermore, the periphery of the first electrode 7023 is covered with a partition wall 7029. The partition wall 7029 is made of polyimi Organic resin films such as acrylic, polyamide, epoxy, inorganic insulating films, or organic polysilicone It is formed using Sun. The partition wall 7029 is made of a photosensitive resin material in particular, and the first electrode 70 An opening is formed on 23, and the side walls of the opening are inclined surfaces formed with a continuous curvature. It is preferable to form it in such a way. When a photosensitive resin material is used as the partition wall 7029. This eliminates the need to form a resist mask.

[0272] Furthermore, the EL layer 7024 formed on the first electrode 7023 and the partition wall 7029 is at least It is sufficient to include a light-emitting layer, and even if it consists of a single layer, it can be configured so that multiple layers are stacked on top of each other. Either way is fine. If the EL layer 7024 is composed of multiple layers, the cathode is An electron injection layer, electron transport layer, light emission layer, hole transport layer, and hole are placed on the first electrode 7023 which functions. The layers are stacked in the order of the injection-treated layers. Note that it is not necessary to provide all of these layers.

[0273] Furthermore, the stacking order is not limited to the above, and the first electrode 7023 may be used as the anode, with holes placed on the anode. The layers may be stacked in the order of injection layer, hole transport layer, light emission layer, electron transport layer, and electron injection layer. When comparing power consumption, the first electrode 7023 is used as the cathode, and an electron injection layer is placed on the cathode. Stacking the electron transport layer, light-emitting layer, hole transport layer, and hole injection layer in that order consumes less power. It is preferable because it does not exist.

[0274] Furthermore, various materials can be used for the second electrode 7025 formed on the EL layer 7024. This is possible. For example, when the second electrode 7025 is used as the anode, a material with a large work function can be used. Materials such as transparent conductive materials like ITO, IZO, and ZnO can preferably be used. In this embodiment, the second electrode 7025 is used as the anode, and an ITO film containing silicon oxide is used. It forms.

[0275] The first electrode 7023 and the second electrode 7025 sandwich the EL layer 7024 which includes the light-emitting layer. The region corresponds to the light-emitting element 7022. In the device structure shown in Figure 15(B), The light emitted from 7022 is directed towards the second electrode 7025 and the first electrode 70, as indicated by the arrows. It is injected on both sides of the 23 side.

[0276] In Figure 15(B), the light emitted from the light-emitting element 7022 toward the first electrode 7023 is One light passes through the color filter layer 7043, then through the insulating layer 7042, and the oxide insulating layer 704 1. The material is ejected through the gate insulating layer 7070 and the substrate 7020.

[0277] The color filter layer 7043 is used in droplet ejection methods such as inkjet printing, as well as in photolithography. These are formed using etching methods employing graphic technology.

[0278] Furthermore, the color filter layer 7043 is covered with an overcoat layer 7044, providing additional protection and insulation. It is covered by layer 7045.

[0279] Furthermore, protective insulating layer 7045 and insulating layer 7042 are formed, and connecting electrode layer 7040 The contact hole is positioned to overlap with partition wall 7029.

[0280] However, when using a double-sided injection-type light-emitting element and both display surfaces are to display in full color, Since the light from the second electrode 7025 does not pass through the color filter layer 7043, a separate color filter is required. - It is preferable to provide a sealing substrate with a filter layer above the second electrode 7025.

[0281] Next, the light-emitting element with an upper surface injection structure will be explained using Figure 15(C).

[0282] Figure 15(C) shows that the driving TFT, TFT7001, is of n type, and the light-emitting element 7002 emits Figure 15(C) shows a cross-sectional view of the pixel when the light being emitted passes through to the second electrode 7005. Next, the light-emitting element 7002 is electrically connected to the drain electrode layer of the driving TFT 7001. A first electrode 7003 is formed thereon, and an EL layer 7004 and a second electrode 7003 are formed thereon. The electrodes 7005 are stacked in order.

[0283] Furthermore, the first electrode 7003 can be made of various materials. For example, the first electrode 70 When using O3 as the cathode, materials with a low work function are preferred, specifically, for example, Li or Cs. Alkali metals such as Mg, Ca, Sr and other alkaline earth metals, and those containing these. In addition to alloys (such as Mg:Ag and Al:Li), rare earth metals such as Yb and Er are also preferred.

[0284] Furthermore, the EL layer 7004 formed on the first electrode 7003 and the partition wall 7009 is at least It is sufficient to include a light-emitting layer, and even if it consists of a single layer, it can be configured so that multiple layers are stacked on top of each other. Either way is fine. If the EL layer 7004 is composed of multiple layers, the cathode is On the first electrode 7003 used, an electron injection layer, an electron transport layer, an emissive layer, a hole transport layer, and a hole layer are placed. The layers are stacked in the order of injection. Note that it is not necessary to provide all of these layers.

[0285] Furthermore, the stacking order is not limited to the above, and a hole injection layer is placed on the first electrode 7003 used as the anode. Alternatively, the layers may be stacked in the order of a hole transport layer, an emissive layer, an electron transport layer, and an electron injection layer.

[0286] Figure 15(C) shows a layered film consisting of a Ti film, an aluminum film, and another Ti film, onto which a hole injection is applied. The layers are stacked in the following order: indentation layer, hole transport layer, light emission layer, electron transport layer, and electron injection layer, with Mg:A on top of them. A layered structure is formed between a g alloy thin film and an ITO film.

[0287] However, if the TFT7001 is n-type, an electron injection layer and an electron transport layer are placed on the first electrode 7003. , stacking the light-emitting layer, hole transport layer, and hole injection layer in that order is better in terms of voltage in the drive circuit. This is preferable because it can suppress temperature increases and reduce power consumption.

[0288] The second electrode 7005 is formed using a light-transmitting conductive material, such as tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, Translucent materials such as indium zinc oxide and indium tin oxide with added silicon dioxide. A conductive film may also be used.

[0289] The EL layer 7004, which includes the light-emitting layer, is sandwiched between the first electrode 7003 and the second electrode 7005. The region corresponds to the light-emitting element 7002. In the case of the element structure shown in Figure 15(C), the light-emitting element 7 The light emitted from 002 is directed toward the second electrode 7005, as indicated by the arrow.

[0290] Furthermore, in Figure 15(C), the drain electrode layer of TFT7001 is the oxide insulating layer 705 1. Through the contact holes provided in the protective insulating layer 7052 and the insulating layer 7055, the first It electrically connects to electrode 7003. The planar insulating layer 7053 is made of polyimide, acrylic, Resin materials such as benzocyclobutene, polyamide, and epoxy can be used. In addition to the resin materials mentioned above, we also use low-dielectric materials (low-k materials), siloxane resins, and PSG (phosphorus). Glass, BPSG (limboron glass), etc. can be used. A planar insulating layer 7053 may be formed by stacking multiple insulating films formed in this manner. The method for forming the planar insulating layer 7053 is not particularly limited and may be done by sputtering, S OG method, spin coating, dip, spray coating, droplet ejection method (inkjet method, spray Lean printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or similar tool can be used.

[0291] Furthermore, in order to insulate the first electrode 7003 from the first electrode 7003 of the adjacent pixel, a separator is used. A wall 7009 will be installed. The partition wall 7009 will be made of polyimide, acrylic, polyamide, epoxy, etc. It is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. The partition wall 7009 is In particular, a photosensitive resin material is used to form an opening on the first electrode 7003, and the opening It is preferable to form the side walls into inclined surfaces with a continuous curvature. When using a photosensitive resin material as wall 7009, the step of forming a resist mask is omitted. It is possible.

[0292] Furthermore, in the structure shown in Figure 15(C), when full-color display is performed, for example, the light-emitting element 70 02 is a green light-emitting element, one of the adjacent light-emitting elements is a red light-emitting element, and the other is The light-emitting element will be a blue light-emitting element. In addition to the three types of light-emitting elements, a white element will be added, making it a four-element system. A light-emitting display device capable of full-color display may be manufactured using various types of light-emitting elements.

[0293] Furthermore, in the structure shown in Figure 15(C), all of the multiple light-emitting elements to be arranged are white light-emitting elements. The configuration involves placing a sealing substrate having a color filter or the like above the light-emitting element 7002. A light-emitting device capable of full-color display may be manufactured. By forming a material and combining it with color filters and color conversion layers, full-color display is achieved. It is possible.

[0294] Of course, single-color illumination may also be used. For example, a lighting device can be formed using white light. Alternatively, a monochromatic light emission may be used to form an area-color type light-emitting device.

[0295] Furthermore, if necessary, optical films such as polarizing films, including circular polarizers, may be provided.

[0296] Here, we have discussed organic EL elements as light-emitting elements, but inorganic EL elements can also be used as light-emitting elements. It is also possible to incorporate an L element.

[0297] Furthermore, the thin-film transistor (driving TFT) that controls the driving of the light-emitting element and the light-emitting element are electrically connected. An example of connection was shown, but a current control TFT is connected between the driving TFT and the light-emitting element. It may be a continuation of the same configuration.

[0298] The semiconductor device shown in this embodiment is not limited to the configuration shown in Figure 15. Various modifications are possible based on the technical concept of this invention.

[0299] Next, in one form of a semiconductor device to which the thin-film transistor shown in Embodiment 1 or 2 is applied, The appearance and cross-section of the light-emitting display panel (also called a light-emitting panel) are shown in Figure 16. Let me explain. Figure 16(A) shows a thin-film transistor and a light-emitting element formed on a first substrate. Figure 16(B) is a top view of the panel, which is sealed between the first and second substrates with a sealing material. This corresponds to the cross-sectional view at HI in Figure 16(A).

[0300] Pixel section 4502, signal line driving circuit 4503a, 450 provided on the first substrate 4501 3b, and the scan line drive circuits 4504a and 4504b are surrounded by a sealing material 4505 A pixel unit 4502, signal line driving circuits 4503a, 4503b, and A second substrate 4506 is provided on top of the scan line driving circuits 4504a and 4504b. The pixel section 4502, signal line driving circuits 4503a, 4503b, and scan line driving circuit 45 04a and 4504b consist of a first substrate 4501, a sealing material 4505, and a second substrate 4506. It is sealed together with the filler 4507. Highly dense protective film with minimal degassing (laminated film, UV-curing resin film) It is preferable to package (seal) the product with a cover material such as a linoleum.

[0301] Also provided on the first substrate 4501 are the pixel section 4502, the signal line driving circuit 4503a, 4 503b, and the scan line driving circuits 4504a and 4504b have multiple thin-film transistors. In Figure 16(B), the thin-film transistor 4510 included in the pixel section 4502 and the signal The thin-film transistor 4509 included in the wire drive circuit 4503a is shown as an example.

[0302] Thin-film transistors 4509 and 4510 use an In-Ga-Zn-O system film as an oxide semiconductor layer. The highly reliable thin-film transistors shown in embodiments 1 and 2 can be applied. In this embodiment, thin-film transistors 4509 and 4510 are n-channel thin-film transistors. He is a Rangista.

[0303] On the insulating layer 4544, the oxide semiconductor layer of the thin-film transistor 4509 for the drive circuit A conductive layer 4540 is provided in a position that overlaps with the channel formation region. The conductive layer 4540 is oxidized. By placing it in a position that overlaps with the channel formation region of the semiconductor layer, before and after BT testing This can reduce the change in the threshold voltage of the thin-film transistor 4509. The potential of the electrode layer 4540 may be the same as that of the gate electrode layer of the thin-film transistor 4509, or it may be different. It may also function as a second gate electrode layer. The potential of 540 may be GND, 0V, or floating.

[0304] Furthermore, 4511 corresponds to a light-emitting element, and the first electrode is a pixel electrode of the light-emitting element 4511. Layer 4517 is electrically connected to the source electrode layer or drain electrode layer of the thin-film transistor 4510. It is connected to the following. The configuration of the light-emitting element 4511 is a first electrode layer 4517 and an electroluminescent layer The stacked structure consists of 4512 and a second electrode layer 4513, but is not limited to the configuration shown in this embodiment. It is not done. The direction of the light emitted from the light-emitting element 4511 is adjusted according to the direction of the light emitted from the light-emitting element 4511. The configuration can be changed as needed.

[0305] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, using a photosensitive material, an opening is formed on the first electrode layer 4517, and the side wall of the opening It is preferable to form it so that it becomes an inclined surface with a continuous curvature.

[0306] Even if the electroluminescent layer 4512 consists of a single layer, it is configured to be stacked with multiple layers. It's fine either way.

[0307] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on 4513 and the partition wall 4520. The protective film may be silicon nitride. It can form films, silicon nitride films, DLC films, and the like.

[0308] Also, signal line drive circuits 4503a, 4503b and scan line drive circuits 4504a, 4504b The various signals and potentials applied to the pixel section 4502 are FPC4518a, 4518 It is supplied by b.

[0309] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 of the light-emitting element 4511. Formed from the same conductive film as 517, terminal electrode 4516 is thin-film transistor 4509, 4 It is formed from the same conductive film as the source electrode layer and drain electrode layer of 510.

[0310] The connecting terminal electrode 4515 is connected to the terminal of FPC4518a via the anisotropic conductive film 4519. They are electrically connected.

[0311] The second substrate located in the direction of light extraction from the light-emitting element 4511 must be translucent. No. In that case, glass plate, plastic plate, polyester film or acrylic A light-transmitting material, such as a film, is used.

[0312] Furthermore, in addition to inert gases such as nitrogen and argon, UV-curable resin can also be used as the filler 4507. Oils or thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. In this embodiment, nitrogen is used as a filler. I used a prime element.

[0313] Furthermore, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. You may also appropriately incorporate optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters. Furthermore, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, by the surface irregularities An anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0314] The signal line drive circuits 4503a and 4503b, and the scan line drive circuits 4504a and 4504b are Drive turns formed by a single-crystal semiconductor film or polycrystalline semiconductor film on a separately prepared substrate It may be implemented in the circuit. Also, only the signal line drive circuit, or part of it, or the scan line drive circuit The road may be formed separately or partially, and this embodiment is configured as shown in Figure 16. Not limited.

[0315] Through the above process, a highly reliable light-emitting display device (display panel) is manufactured as a semiconductor device. It is possible.

[0316] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0317] (Embodiment 7) A semiconductor device using the thin-film transistor shown in Embodiment 1 or 2 is an electronic paper and It can be applied in any field where information is displayed. Electronic paper can be used in any field. It can be used in electronic devices. For example, electronic paper can be used to create ebooks (electronic (Books), posters, in-vehicle advertisements such as trains, and various cards such as credit cards This can be applied to displays and other elements. Examples of electronic devices are shown in Figures 17 and 18.

[0318] Figure 17(A) shows poster 2631 made with electronic paper. In the case of printed materials, advertisements are changed manually, but with electronic paper... It allows you to change the ad display in a short amount of time. Furthermore, the display remains stable without any distortion. This can be obtained. Furthermore, the poster may be configured to transmit and receive information wirelessly.

[0319] Figure 17(B) also shows in-vehicle advertisements 2632 on trains and other vehicles. In the case of printed paper, advertisements are changed manually, but using electronic paper... This allows you to change the ad display quickly without requiring a lot of manpower. Also, the display will not break down. A stable image can be obtained without any issues. Furthermore, the in-car advertisements are configured to transmit and receive information wirelessly. That is also acceptable.

[0320] Figure 18 also shows an example of an e-book. For example, the e-book 2700 has a casing 27 It consists of two enclosures, 01 and enclosure 2703. Enclosure 2701 and enclosure 270 3 is integrated with the shaft portion 2711, and the shaft portion 2711 is used as the axis for opening and closing operations. This configuration makes it possible to operate like a paper book.

[0321] The display unit 2705 is incorporated into the housing 2701, and the display unit 2707 is incorporated into the housing 2703. It is included. Display units 2705 and 2707 are configured to display a continuation screen. Alternatively, a configuration that displays different screens is also acceptable. For example, text is displayed on the right-hand display unit (display unit 2705 in Figure 18), and the left-hand display unit An image can be displayed on the display unit 2707 in Figure 18.

[0322] Furthermore, Figure 18 shows an example in which the housing 2701 is equipped with an operating unit, etc. For example, housing 2 Unit 701 is equipped with a power supply 2721, operation keys 2723, speaker 2725, and the like. The page can be turned using operation key 2723. Note that the key is located on the same side as the display unit of the casing. It may also be configured to include a board or pointing device. Furthermore, the back of the enclosure or On the side, there are external connection terminals (earphone jack, USB terminal, or AC adapter and USB A configuration that includes terminals that can connect to various cables such as cables, a recording medium insertion section, and so on. It may also be done this way. Furthermore, the eBook 2700 is configured to have the functionality of an electronic dictionary. That's fine.

[0323] Furthermore, the e-book 2700 may be configured to transmit and receive information wirelessly. By wireless means, The system will be configured to allow users to purchase and download desired book data from an e-book server. It is also possible.

[0324] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0325] (Embodiment 8) The semiconductor device using the thin-film transistor shown in Embodiment 1 or 2 is suitable for various electronic devices. It can be applied to devices (including amusement machines). Examples of electronic devices include televisions. Devices (also called televisions or television receivers), monitors for computers, etc. Digital cameras, digital video cameras, digital photo frames, mobile phones (mobile phones) (Also called mobile phone devices), portable game consoles, personal information terminals, sound playback devices, pachinko machines Examples include large game consoles.

[0326] Figure 19(A) shows an example of a television system. The television system 9600 is, The display unit 9603 is integrated into the housing 9601. The display unit 9603 displays video. It is possible to do so. In addition, here the stand 9605 supports the housing 9601. This shows the configuration.

[0327] The television unit 9600 is operated using the control switches on the housing 9601 and a separate remote control. This can be done using the control unit 9610. The remote control unit 9610 has control keys The 9609 allows you to control the channel and volume, and the information is displayed on the display unit 9603. The video can be controlled. Furthermore, the remote control unit 9610 can be controlled by the remote control unit. A display unit 9607 may be provided to display the information output from 9610.

[0328] The television system 9600 will consist of a receiver, modem, and other components. It can receive more general television broadcasts, and furthermore, it can connect via a modem, either wired or wirelessly. By connecting to the communication network, one-way (sender to receiver) or two-way communication is possible. It is also possible to communicate information (between a sender and a receiver, or between receivers, etc.).

[0329] Figure 19(B) shows an example of a digital photo frame. For example, a digital photo Frame 9700 has a display unit 9703 integrated into the housing 9701. Display unit 970 3 is capable of displaying various images, such as images taken with a digital camera. By displaying data, it can function just like a regular picture frame.

[0330] The Digital Photo Frame 9700 includes an operating unit and external connection terminals (USB terminal, USB port). A structure that includes terminals that can connect to various cables such as B cables, a recording medium insertion section, etc. These components may be incorporated on the same surface as the display unit, but may also be on the sides or back. It is desirable to include it as it improves the design. For example, the recording medium of a digital photo frame. A memory device containing image data captured by a digital camera is inserted into the body insertion site. The system can capture data and display the captured image data on the display unit 9703.

[0331] Furthermore, the digital photo frame 9700 may be configured to send and receive information wirelessly. It is also possible to configure the system to acquire and display desired image data wirelessly.

[0332] Figure 20(A) shows a portable gaming machine, which consists of two cabinets, cabinet 9881 and cabinet 9891. It is connected by a connecting part 9893 so that it can be opened and closed. The housing 9881 has a display unit The 9882 is incorporated, and the display unit 9883 is incorporated into the housing 9891. The portable gaming machine shown in 20(A) also includes a speaker section 9884 and a recording medium insertion section 988 6. LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, electric current, voltage, power, radiation, flow rate, humidity, gradient, vibration Equipped with a function to measure motion, odor, or infrared radiation, a microphone (9889), etc. Of course, the configuration of portable gaming machines is not limited to those described above, and at least the present invention includes Any configuration that includes such semiconductor equipment is acceptable, and other auxiliary equipment may be provided as appropriate. This is possible. The portable gaming machine shown in Figure 20(A) has a program recorded on the recording medium. It has functions to read data and display it on the display unit, and to communicate wirelessly with other portable gaming machines. It has the function of sharing information. The functions of the portable gaming machine shown in Figure 20(A) are It is not limited to this and can have a variety of functions.

[0333] Figure 20(B) shows an example of a slot machine, which is a large-scale gaming machine. Slot machine 9 The 900 has a display unit 9903 integrated into the casing 9901. Also, slot machine 9 The 900 also includes other features such as a start lever, stop switch, coin slot, It is equipped with speakers, etc. Of course, the configuration of the slot machine 9900 is not limited to those mentioned above. It is not specified, and any configuration that includes at least the semiconductor device according to the present invention is sufficient, and other accessories The configuration can be configured with appropriate equipment provided.

[0334] Figure 21(A) shows an example of a mobile phone. The mobile phone 1000 has a housing 1001 In addition to the display unit 1002 incorporated into it, there are operation buttons 1003, an external connection port 1004, and It is equipped with a speaker (Peaker 1005), microphone (Microphone 1006), etc.

[0335] The mobile phone 1000 shown in Figure 21(A) allows you to touch the display unit 1002 with your finger or the like to receive information. You can enter information. Also, operations such as making phone calls or sending emails are performed on the display. This can be done by touching 1002 with a finger or other object.

[0336] The display unit 1002 has three main modes. The first is a display that primarily displays images. The first mode is display mode, the second is input mode which is mainly for inputting information such as characters. The third is display mode. This is a display + input mode, which is a combination of two modes: display mode and input mode.

[0337] For example, when making a phone call or composing an email, the display unit 1002 is used for text input. In this case, the primary text input mode should be used, and you should perform the input operation for the characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. It seems so.

[0338] Furthermore, the mobile phone 1000 contains sensors that detect tilt, such as a gyroscope and an accelerometer. By providing a detection device, the orientation (vertical or horizontal) of the mobile phone 1000 can be determined, and the display The display on the display unit 1002 can be automatically switched.

[0339] Furthermore, the screen mode can be switched by touching the display unit 1002 or by operating the housing 1001. This is done by operating button 1003. Also, the type of image displayed on display unit 1002 Therefore, it is also possible to switch between them. For example, the image signal displayed on the display unit is a video signal. Switch to display mode if it's data, or to input mode if it's text data.

[0340] Furthermore, in input mode, the signal detected by the optical sensor of the display unit 1002 is detected and displayed If there is no input via touch operation on unit 1002 for a certain period of time, the screen mode will be changed to input mode. You may also control the system to switch from that display mode to a different mode.

[0341] The display unit 1002 can also function as an image sensor. For example, the display unit 10 By touching the palm or fingers to device 02, the device can capture palm prints, fingerprints, etc., to perform identity verification. It can also be used. In addition, the display unit has a backlight that emits near-infrared light or a sensor that emits near-infrared light. Using a light source designed for imaging, it is also possible to image finger veins, palmar veins, and other veins.

[0342] Figure 21(B) is also an example of a mobile phone. The mobile phone in Figure 21(B) has a housing 9411. The display device 9410 includes a display unit 9412 and an operation button 9413, and the housing 9401 Operation buttons 9402, external input terminal 9403, microphone 9404, speaker 9405, and It has a communication device 9400 which includes a light-emitting unit 9406 that emits light when an incoming call is received, and has a display function. The display device 9410 is detachable from the communication device 9400, which has telephone functionality, in two directions indicated by the arrows. Yes. Therefore, it is also possible to attach the short axes of the display device 9410 and the communication device 9400 together. The long axes of the display device 9410 and the communication device 9400 can also be mounted together. If only the function is required, remove the display device 9410 from the communication device 9400, and the display device The 9410 can also be used independently. The communication device 9400 and the display device 9410 are connected wirelessly. Images or input information can be sent and received via wireless or wired communication, and each has a rechargeable battery. Close Terry.

[0343] Note that the configuration shown in this embodiment can be used in combination with the configurations shown in other embodiments as appropriate. It is possible to do so.

[0344] (Embodiment 9) In this embodiment, the oxide semiconductor layer and the metal layer (conductive layer) or oxide insulating layer are in contact. Regarding the phenomenon of oxygen migration, what are the differences between the amorphous and crystalline cases of the oxide semiconductor layer? I will explain the results of the scientific calculations.

[0345] Figure 24 shows the structure of a thin-film transistor according to one aspect of the present invention, in which an oxide semiconductor layer and a so A schematic diagram showing the state in which the metal layer and oxide insulating layer, which form the electrode layer and drain electrode layer, are in contact. Yes. The arrows in the diagram indicate the acidity when the substances are in contact or when they are heated. This indicates the basic direction of movement.

[0346] When an oxygen vacancy occurs in a type I oxide semiconductor layer, it exhibits N-type conductivity, and conversely, when oxygen vacancies occur, An oxide semiconductor layer that is N-type due to a defect will become I-type when an excess of oxygen is supplied. In actual device processes, this effect is utilized in the source electrode layer and drain electrode layer. In the oxide semiconductor layer in contact with the metal layer, oxygen is pulled towards the metal side, and in a part of the area in contact with it ( If the film thickness is thin, oxygen deficiency occurs throughout the entire film thickness direction, resulting in N-type formation and poor contact with the metal layer. It can be obtained. Also, the oxide semiconductor layer in contact with the oxide insulating layer can absorb acid from the oxide insulating layer. Oxygen is supplied to the ionized semiconductor layer, and a portion of the area in contact with it (if the film thickness is thin, the entire area in the film thickness direction) The body becomes oxygen-rich and transforms into type I, functioning as a channel formation region for thin-film transistors. It will become like that.

[0347] In one aspect of the present invention, an oxide semiconductor layer, a metal layer which serves as a source electrode layer and a drain electrode layer, and In the region where the oxide insulating layer is in contact, a crystalline region is formed, resulting in an amorphous state and a crystalline state. We used scientific calculations to verify whether there were any differences in the mode of oxygen transport between the regions.

[0348] The models used in scientific calculations were amorphous and crystalline structures of the In-Ga-Zn-O system, and were rectangular parallelepipeds. The calculation was performed using a sample in which 10% of the oxygen was deficient in one region along the longitudinal direction (see Figure 25). This compares the distribution of oxygen after 10 nsec. under accelerated conditions of 650°C. The conditions are shown in Tables 1 and 2.

[0349] [Table 1]

[0350] [Table 2]

[0351] Figure 26(A) shows the oxygen distribution when amorphous material is used, and Figure 26(B) shows the acid distribution when crystalline material is used. The raw distribution is shown. The dotted line is the initial state, and the solid line is the result (after 10 nsec). The change in distribution indicates that oxygen is moving regardless of whether the material is amorphous or crystalline.

[0352] In the region with oxygen vacancies, the increase in oxygen atoms before and after the calculation was 15.9% for amorphous materials and 15.9% for crystalline materials. The figure was 11.3%. In other words, oxygen moves more easily in amorphous materials than in crystalline materials, filling in oxygen vacancies. The result was that it is easier to move. In other words, oxygen is relatively less mobile within the crystal than in amorphous material. It will be a problem.

[0353] Therefore, even in a structure having a crystalline region in the oxide semiconductor layer according to one aspect of the present invention, acid It was confirmed that oxygen migration occurs in the ion semiconductor layer, similar to the case of amorphous materials. Because oxygen is relatively less mobile within the oxide semiconductor layer than in amorphous materials, oxygen is desorbed from the oxide semiconductor layer. It was confirmed that it has the effect of suppressing [the condition]. [Explanation of Symbols]

[0354] 400 circuit boards 402 Gate Insulation Layer 410 Thin-film transistors 411 terminals 412 Connecting electrodes 414 terminals 415 Transparent conductive film 416 Electrode 418 Transparent conductive film 421a Token layer 421b capacitive wiring 421c terminal 423 Oxide semiconductor layer 424a 1st area 424b Second area 424c Third area 424d 4th area 424e 5th area 425a Source electrode layer 425b Drain electrode layer 426a Oxide insulating layer 426b Oxide insulating layer 428 Oxide insulating layer 429 Connecting electrodes 430 Thin-Film Transistors 450 Thin-Film Transistors 456a Oxide insulating layer 470 Thin-film transistors 480a Resist Mask 480b Resist Mask 482a Resist Mask 482b Resist Mask 482c Resist Mask 490 Thin-film transistors

Claims

1. A display device having transistors, It comprises a first conductive layer, an insulating layer, an oxide semiconductor layer, a first oxide insulating layer, a second conductive layer, a third conductive layer, and a second oxide insulating layer. The first conductive layer functions as the gate electrode of the transistor. The insulating layer has a region located above the first conductive layer, The insulating layer has the function of being the gate insulating layer of the transistor. The oxide semiconductor layer has a region located above the insulating layer, The transistor has a channel formation region, The first oxide insulating layer has a region located above the oxide semiconductor layer, The second conductive layer has a region located above the oxide semiconductor layer, The second conductive layer functions as either the source electrode or the drain electrode of the transistor. The third conductive layer has a region located above the oxide semiconductor layer, The third conductive layer functions as either the source electrode or the drain electrode of the transistor. The oxide semiconductor layer has a first region in contact with the second conductive layer, a second region in contact with the third conductive layer, a fifth region overlapping with the first oxide insulating layer, a third region between the first region and the fifth region, and a fourth region between the second region and the fifth region. The thickness of the oxide semiconductor layer in the third region and the fourth region is thinner than the thickness of the oxide semiconductor layer in the fifth region. The second oxide insulating layer has a region in contact with the upper surface of the third region, a region in contact with the upper surface of the first oxide insulating layer, and a region in contact with the upper surface of the fourth region. A display device in which, in a plan view of the transistor, the first conductive layer overlaps with the entire fifth region.

2. A display device having transistors, It comprises a first conductive layer, an insulating layer, an oxide semiconductor layer, a first oxide insulating layer, a second conductive layer, a third conductive layer, and a second oxide insulating layer. The first conductive layer functions as the gate electrode of the transistor. The insulating layer has a region located above the first conductive layer, The insulating layer has the function of being the gate insulating layer of the transistor. The oxide semiconductor layer has a region located above the insulating layer, The transistor has a channel formation region, The first oxide insulating layer has a region located above the oxide semiconductor layer, The second conductive layer has a region located above the oxide semiconductor layer, The second conductive layer functions as either the source electrode or the drain electrode of the transistor. The third conductive layer has a region located above the oxide semiconductor layer, The third conductive layer functions as either the source electrode or the drain electrode of the transistor. The oxide semiconductor layer has a first region in contact with the second conductive layer, a second region in contact with the third conductive layer, a fifth region overlapping with the first oxide insulating layer, a third region between the first region and the fifth region, and a fourth region between the second region and the fifth region. The thickness of the oxide semiconductor layer in the third region and the fourth region is thinner than the thickness of the oxide semiconductor layer in the fifth region. The second oxide insulating layer has a region in contact with the upper surface of the third region, a region in contact with the upper surface of the first oxide insulating layer, and a region in contact with the upper surface of the fourth region. In a plan view of the transistor, the first conductive layer overlaps with the entire fifth region. A display device wherein the first oxide insulating layer does not come into contact with the second conductive layer and also does not come into contact with the third conductive layer.

3. In claim 1 or claim 2, The aforementioned oxide semiconductor layer is an In-Ga-Zn-O based oxide semiconductor, and the display device is provided.

4. In claim 1 or claim 2, The oxide semiconductor layer is an In-O based oxide semiconductor, and the device has this oxide semiconductor layer.

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