Semiconductor equipment

Abstract

To solve such a problem that, as a display device has a higher definition, the number of pixels is increased, and the number of gate lines and the number of signal lines are increased, and when the number of the gate lines and the number of the signal lines are increased, it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, and thereby manufacturing cost is increased.SOLUTION: A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least a part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Manufacturing cost is reduced by providing the pixel portion and the driver portion over the same substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to a semiconductor device using an oxide semiconductor and a method for manufacturing the same. [Background technology]

[0002] Thin-film transistors, such as those formed on a flat plate like a glass substrate, are exemplified by liquid crystal displays. They are made from amorphous silicon and polycrystalline silicon. Thin-film transistors using glass have low field-effect mobility, but are suitable for large-area applications of glass substrates. It can respond to this, while thin-film transistors using polycrystalline silicon have a field-effect mobility. Although expensive, it requires crystallization processes such as laser annealing, and is essential for large-area glass substrates. It has the characteristic of not being adaptable to sushi.

[0003] In contrast, thin-film transistors are fabricated using oxide semiconductors, and these transistors are used in electronic devices and optical devices. The technology is attracting attention for its application in various applications. For example, zinc oxide and In-G are used as oxide semiconductor films. Thin-film transistors were fabricated using a-Zn-O oxide semiconductors, and switches for image display devices were developed. Technologies used in elements such as chnob elements are disclosed in Patent Documents 1 and 2. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-096055 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] A thin-film transistor having a channel formation region provided in an oxide semiconductor has a higher field-effect mobility than a thin-film transistor using amorphous silicon. The oxide semiconductor film can be formed at a temperature of 300°C or lower by a sputtering method or the like, and the manufacturing process is simpler than that of a thin-film transistor using polycrystalline silicon.

[0006] Using such an oxide semiconductor, thin-film transistors are formed on a glass substrate, a plastic substrate, etc., and are expected to be applied to display devices such as liquid crystal displays, electroluminescence displays, or electronic paper.

[0007] In addition, when the display area of a display device is increased, the number of pixels increases, and the number of gate lines and signal lines increases. Furthermore, with the increase in the definition of the display device, the number of pixels increases, and the number of gate lines and signal lines increases. When the number of gate lines and signal lines increases, it becomes difficult to mount an IC chip having a driving circuit for driving them by bonding or the like, and the manufacturing cost increases.

[0008] Therefore, one of the problems is to use a thin-film transistor using an oxide semiconductor in at least a part of the circuit of the driving circuit for driving the pixel portion to reduce the manufacturing cost. [[ID=三十三]]

[0009] [[ID=三十六]]When using a thin-film transistor using an oxide semiconductor in at least a part of the circuit of the driving circuit for driving the pixel portion, the thin-film transistor is required to have high dynamic characteristics (on characteristics and frequency characteristics (referred to as f characteristics)). One of the problems is to provide a thin-film transistor having high dynamic characteristics (on characteristics) and a driving circuit that can drive at high speed.

[0010] ​​​​​​​​​In addition, one aspect of the present invention uses an oxide semiconductor layer for a channel and aims to provide a semiconductor device including a highly reliable thin film transistor. One of the problems is to provide a semiconductor device having a highly reliable thin film transistor using an oxide semiconductor layer for a channel.

Means for Solving the Problems

[0011] Gate electrodes are provided above and below the oxide semiconductor layer to improve the on characteristics and reliability of the thin film transistor. This is achieved.

[0012] Also, by controlling the gate voltages applied to the upper and lower gate electrodes, the threshold voltage can be controlled. The upper and lower gate electrodes may be made conductive to have the same potential, or the upper and lower gate electrodes may be connected to separate wirings to have different potentials. For example, the threshold voltage can be made zero or close to zero, and the power consumption can be reduced by reducing the drive voltage. Also, the threshold voltage can be made positive to function as an enhancement type transistor. Also, the threshold voltage can be made negative to function as a depletion type transistor. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used.

[0013] For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used. For example, an inverter circuit (hereinafter referred to as an EDMOS circuit) can be configured by combining an enhancement type transistor and a depletion type transistor and used for a drive circuit. The drive circuit includes at least a logic circuit section and a switch section or a buffer section. The logic circuit section has a circuit configuration including the above EDMOS circuit. Also, for the switch section or the buffer section, it is preferable to use a thin film transistor that can pass a large on-current, and a depletion type transistor or a thin film transistor having gate electrodes above and below an oxide semiconductor layer is used.

[0014] To fabricate thin-film transistors with different structures on the same substrate without significantly increasing the number of manufacturing steps. It is also possible to have gate electrodes above and below the oxide semiconductor layer in a high-speed drive circuit. An EDMOS circuit is constructed using thin-film transistors with electrodes, and oxide semiconductors are used in the pixel area. A thin-film transistor having a gate electrode only beneath the body layer may also be used.

[0015] Furthermore, if the threshold voltage of the n-channel TFT is positive, the enhancement type transistor Defined as a depletion transistor, if the threshold voltage of an n-channel TFT is negative, a depletion transistor is used. "Zista" is defined as such, and this definition shall be followed throughout this specification.

[0016] Furthermore, the material for the gate electrode placed above the oxide semiconductor layer is limited to conductive films. Undetermined, aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), t Sten (W), Molybdenum (Mo), Chromium (Cr), Nd (Neodymium), Sc (S) An element selected from candium, or an alloy containing the aforementioned elements, is used. The gate electrode is not limited to a single layer containing the aforementioned elements, but can also be made of two or more layers stacked together. Cut.

[0017] Furthermore, the material for the terminal electrode, which is placed above the oxide semiconductor layer, is the same material as the pixel electrode (transparent For hypertype display devices, a transparent conductive film (or the like) can be used. For example, in the pixel area Then, in the same process as the process of forming pixel electrodes that are electrically connected to thin-film transistors, oxide A gate electrode can be formed above the semiconductor layer. This significantly reduces the manufacturing process. Without increasing the number of transistors, a thin-film transistor is formed by providing gate electrodes above and below the oxide semiconductor layer. This can be achieved. Furthermore, by providing a gate electrode above the oxide semiconductor layer, Bias-thermal stress tests (hereinafter referred to as BT tests) are used to examine the reliability of thin-film transistors. In this context, the change in threshold voltage of the thin-film transistor before and after the BT test is reduced. This is possible. That is, by providing a gate electrode above the oxide semiconductor layer, It can improve reliability.

[0018] The configuration of the invention disclosed herein is a first gate electrode on an insulating surface and a first gate electrode A first insulating layer is placed on top of the first insulating layer, an oxide semiconductor layer is placed on top of the oxide semiconductor layer, and a source electric field is placed on top of the oxide semiconductor layer. A pole or drain electrode, a second insulating layer covering the source electrode or drain electrode, and a second The device has a second gate electrode on an insulating layer, and the oxide semiconductor layer is the source electrode or drain electrode. The second insulating layer has a thinner film thickness than the region overlapping with the electrode, and the film thickness of the oxide semiconductor layer This semiconductor device is characterized by its ability to make contact with a thin region.

[0019] The above configuration solves at least one of the above problems.

[0020] In the above configuration, the width of the second gate electrode is wider than the width of the first gate electrode. This allows a gate voltage to be applied from the second gate electrode to the entire oxide semiconductor layer.

[0021] Alternatively, in the above configuration, the width of the first gate electrode is narrower than the width of the second gate electrode. By doing so, the area overlapping with the source or drain electrode is reduced, thereby decreasing parasitic capacitance. Furthermore, the width of the first gate electrode is such that the thickness of the oxide semiconductor layer is thin in certain regions. The width of the second gate electrode is wider than the width of the oxide semiconductor layer, and narrower than the width of the thin region of the oxide semiconductor layer. By doing so, the parasitic capacitance is further reduced by ensuring that it does not overlap with the source or drain electrode. A configuration that reduces the number of elements is also acceptable.

[0022] Furthermore, the configuration of another invention comprises a pixel unit and a drive circuit, wherein the pixel unit comprises at least a first acid The device has a first thin-film transistor having an ion semiconductor layer, and the drive circuit has at least a second acid A second thin-film transistor having an oxide semiconductor layer, and a third thin-film transistor having a third oxide semiconductor layer The EDMOS circuit has thin-film transistors, and the third thin-film transistor is the third A first gate electrode is located below the oxide semiconductor layer, and a second gate electrode is located above the third oxide semiconductor layer. This is a semiconductor device having electrodes.

[0023] In the above configuration, the first thin-film transistor of the pixel section is electrically connected to the pixel electrode, and the pixel By using the same material as the second gate electrode of the drive circuit, the number of manufacturing steps can be increased without increasing the number of steps. It can be manufactured.

[0024] In the above configuration, the first thin-film transistor of the pixel section is electrically connected to the pixel electrode, and the pixel The electrodes are made of a different material from the second gate electrode of the drive circuit, for example, the pixel electrodes are made of a transparent conductive film. By making the second gate electrode an aluminum film, the second gate electrode of the drive circuit It is possible to reduce the resistance.

[0025] Furthermore, the third oxide semiconductor layer of the drive circuit is connected to the first gate electrode via the first insulating layer. This is a so-called dual-gate configuration in which the second gate electrode overlaps with the second insulating layer. It is made.

[0026] Furthermore, semiconductor devices having a drive circuit include not only liquid crystal displays but also light-emitting devices. Examples include photographic display devices and display devices that use electrophoretic display elements, also known as electronic paper. ru.

[0027] In this specification, a display device refers to an image display device, a light-emitting device, or a light display device. This refers to the power source (including lighting equipment). It also refers to connectors, such as FPC (Flexible Printed Circuit). (inted circuit) or TAB (Tape Automated Bon) (ding) tape or TCP (Tape Carrier Package) Modules that have a printed circuit board attached to the end of the TAB tape or TCP. The display element or IC (integrated circuit board) is integrated using the COG (Chip On Glass) method. All modules in which the road is directly implemented are also included in the display device.

[0028] In a light-emitting display device using a light-emitting element, the pixel section has multiple thin-film transistors, In the elementary part, the gate electrode of one thin-film transistor and the source wiring of another transistor, It has a point where the drain wiring is electrically connected.

[0029] Furthermore, thin-film transistors are susceptible to damage from static electricity, so the gate wire or source wire may be damaged. It is preferable to provide a protection circuit for the drive circuit on the same substrate as the wire. It is preferable to construct this using a nonlinear element made of an oxide semiconductor.

[0030] The oxide semiconductor used herein is InMO3(ZnO) m Thin (m>0) A thin film is formed, and a thin-film transistor is fabricated using this thin film as a semiconductor layer. , representing one or more metallic elements selected from Ga, Fe, Ni, Mn, and Co. For example, M can be Ga, or Ga and Ni or Ga and Fe, etc. Other metal elements may be present. Furthermore, in the above oxide semiconductor, M may be included. In addition to the metallic elements present, impurity elements may include Fe, Ni, and other transition metal elements, or the transition metal elements. Some contain metal oxides. In this specification, this thin film is referred to as In-Ga- It is also called a Zn-O non-single crystal film.

[0031] In-Ga-Zn-O non-single crystal films are deposited by sputtering and then heated at 200°C to 500°C. Typically, heating was performed at 300-400°C for 10-100 minutes. The In-G analysis was also performed. The crystalline structure of the α-Zn-O non-single crystal film was observed to be amorphous in XRD analysis. ru.

[0032] Oxide semiconductors, such as In-Ga-Zn-O non-single crystal films, have an energy gap ( Because Eg) is a broad material, even if two gate electrodes are placed above and below the oxide semiconductor layer, it will not turn off. This can suppress the increase in current.

[0033] The ordinal numbers "1st" and "2nd" are used for convenience only and do not represent the order of processes or stacking. This does not indicate that the invention is uniquely named. This does not indicate anything. [Effects of the Invention]

[0034] Peripheral circuits such as gate line drive circuits or source line drive circuits, or the pixel section, have two upper and lower sections. By forming a thin-film transistor using an oxide semiconductor sandwiched between the gate electrodes, Reduce manufacturing costs.

[0035] Furthermore, a thin-film transistor using an oxide semiconductor sandwiched between two gate electrodes is also used. In the BT test, the change in threshold voltage of the thin-film transistor before and after the BT test. This can reduce the noise. Specifically, by using an oxide semiconductor sandwiched between two gate electrodes on the top and bottom. Reliability can be improved by using thin-film transistors. [Brief explanation of the drawing]

[0036] [Figure 1] (A) A cross-sectional view showing an example of the display device of Embodiment 1, (B) A cross-sectional view showing another example of the display device of Embodiment 1, (C) A cross-sectional view showing another example of the display device of Embodiment 1. [Figure 2] (A) Cross-sectional view of the semiconductor device of Embodiment 2, (B) Equivalent circuit diagram, (C) Top view. [Figure 3] A block diagram illustrating the entire display device of Embodiment 3. [Figure 4] A diagram illustrating the arrangement of wiring, input terminals, etc., in the display device of Embodiment 3. [Figure 5] A block diagram illustrating the configuration of a shift register circuit. [Figure 6] A diagram showing an example of a flip-flop circuit. [Figure 7] This diagram shows the layout (top view) of a flip-flop circuit. [Figure 8] A diagram showing a timing chart to explain the operation of a shift register circuit. [Figure 9] A diagram illustrating the method for manufacturing the semiconductor device according to Embodiment 4. [Figure 10] A diagram illustrating the method for manufacturing the semiconductor device according to Embodiment 4. [Figure 11] A diagram illustrating the method for manufacturing the semiconductor device according to Embodiment 4. [Figure 12] A diagram illustrating the method for manufacturing the semiconductor device according to Embodiment 4. [Figure 13] A diagram illustrating the method for manufacturing the semiconductor device according to Embodiment 4. [Figure 14] A diagram illustrating the semiconductor device of Embodiment 4. [Figure 15] A diagram illustrating the semiconductor device of Embodiment 4. [Figure 16] A diagram illustrating the semiconductor device of Embodiment 4. [Figure 17] A cross-sectional view illustrating the semiconductor device of Embodiment 5. [Figure 18] A diagram illustrating the pixel equivalent circuit of the semiconductor device according to Embodiment 6. [Figure 19] A cross-sectional view illustrating the semiconductor device of Embodiment 6. [Figure 20] A top view and a cross-sectional view illustrating the semiconductor device of Embodiment 6. [Figure 21] A top view and a cross-sectional view illustrating the semiconductor device of Embodiment 7. [Figure 22] A cross-sectional view illustrating the semiconductor device of Embodiment 7. [Figure 23] An external view showing an example of an electronic device. [Figure 24] External view showing examples of television equipment and digital photo frames. [Figure 25] An external view showing an example of a mobile phone. [Figure 26] A cross-sectional view illustrating the semiconductor device of Embodiment 9. [Modes for carrying out the invention]

[0037] This embodiment will be described below. However, the present invention is not limited to the following description. The form and details of this law may be changed in various ways without deviating from its intent and scope. This will be easily understood by those skilled in the art. Therefore, the present invention is described in the embodiments below. It should not be interpreted solely in terms of volume.

[0038] (Embodiment 1) Figure 1(A) shows the first thin-film transistor 430 used in the drive circuit and the second thin-film transistor used in the pixel section. An example is shown in which the thin-film transistor 170 is mounted on the same substrate. Figure 1(A) is a display device. This is an example of a cross-sectional view.

[0039] The pixel section and the driving circuit are formed on the same substrate, and in the pixel section, they are arranged in a matrix. A second thin-film transistor 170, which is an enhancement-type transistor, is used for the pixel electrode. Switches the voltage application to 110 on and off. A second thin-film transient is placed in this pixel area. STA 170 uses an oxide semiconductor layer 103, and the electrical characteristics of the second thin-film transistor At a gate voltage of ±20V, the on / off ratio is 10 9 Therefore, the contrast of the display is This improves performance and enables low-power operation due to reduced leakage current. This is possible. The on / off ratio is the ratio of the off current to the on current (I ON / I OFF ) and The larger the size, the better the switching characteristics, which contributes to improved display contrast. On-current refers to the current between the source and drain electrodes when a transistor is in the ON state. This refers to the current that flows through the source. Off-current refers to the current that flows when the transistor is in the off state. This refers to the current flowing between the electrode and the drain electrode. For example, in the case of an n-type transistor, the current is... When the source voltage is lower than the transistor's threshold voltage, the distance between the source electrode and the drain electrode... This is the current that flows between them. In this way, high contrast and low power consumption drive are achieved. For this purpose, it is preferable to use enhancement transistors in the pixel section.

[0040] In the drive circuit, below the oxide semiconductor layer 405 is the first gate electrode 401 and the oxide A thin-film transistor 430 having a second gate electrode 470 above the semiconductor layer 405 is provided. At the very least, use one. This second gate electrode 470 can also be called a back gate electrode. By forming a gate electrode, a via is used to investigate the reliability of thin-film transistors. In the thermal stress test (hereinafter referred to as the BT test), the thin film traction before and after the BT test was observed. This can reduce the amount of change in the threshold voltage of the inverter.

[0041] The structure of this thin-film transistor 430 is explained using Figure 1(A). A base having an insulating surface The first gate electrode 401, provided on the plate 400, is covered by the first gate insulating layer 403. On the first gate insulating layer 403 which overlaps with the first gate electrode 401, there is an oxide semiconductor layer 40 It has 5. A first wiring 409 or a second wiring 410 is provided on the oxide semiconductor layer 405. The oxide semiconductor layer 405 functions as a first electrode, either as a source electrode or a drain electrode. It has regions where the film thickness is thinner than the film thickness in the region overlapping with line 409 or the second wiring 410. A second gate insulating layer 412 is in contact with a region of thin film thickness in this oxide semiconductor layer 405. It has a second gate electrode 470 on the second gate insulating layer 412.

[0042] For example, the oxide semiconductor layer 405 is made up of In2O3:Ga2O3:ZnO=1:1:1. Using a target (In:Ga:Zn=1:1:0.5), argon gas was used in the sputtering method. The film is deposited under conditions of a flow rate of 10 sccm and an oxygen flow rate of 5 sccm. Also, oxide semiconductor layer 4 Between 05 and the first wiring 409, n + A layer 406a is provided, and the oxide semiconductor layer 405 and the second layer Between line 410 and n + A layer 406b is provided.

[0043] In this embodiment, the n-type layers 406a and 406b that function as source regions or drain regions are In-Ga-Zn-O-based non-monocrystalline films, which are formed under deposition conditions different from those for forming the oxide semiconductor layer 405 and are oxide semiconductor layers with lower resistance. For example, the n-type layers 406a and 406b are formed of an oxide semiconductor layer obtained under the condition that the argon gas flow rate in the sputtering method is 40 sccm. + layers 406a, 406 b, are In-Ga-Zn-O-based non-monocrystalline films, which are formed under deposition conditions different from those for forming the oxide semiconductor layer 405 and are oxide semiconductor layers with lower resistance. For example, the n-type layers 406a and 406b are formed of an oxide semiconductor layer obtained under the condition that the argon gas flow rate in the sputtering method is 40 sccm. are formed under different deposition conditions and are oxide semiconductor layers with lower resistance. For example, they are formed of an oxide semiconductor layer obtained under the condition that the argon gas flow rate in the sputtering method is 40 sccm. layers 406a and 406b formed of an oxide semiconductor layer obtained under the condition that the argon gas flow rate in the sputtering method is 40 sccm have an n-type conductivity type and an activation energy (ΔE) of 0.01 + eV or more and 0.1 eV or less. In this embodiment, the n-type layers 406a and 406b are In-Ga-Zn-O-based non-monocrystalline films and contain at least an amorphous component. + The n-type layers 406a and 406b are In-Ga-Zn-O-based non-monocrystalline films and contain at least an amorphous component. The n-type layers 406a and 406b are assumed to be such that they contain crystal grains (nanocrystals) in an amorphous structure. + The n-type layers 406a and 406b may contain crystal grains (nanocrystals). These crystal grains (nanocrystals) in the n-type layers 406a and 406b + have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0044] Also, the first gate electrode 401 and the second gate electrode 470 may be electrically connected to have the same potential. When they have the same potential, a gate voltage can be applied from above and below the oxide semiconductor layer, so that the current flowing in the on state can be increased. When they have the same potential, a gate voltage can be applied from above and below the oxide semiconductor layer, so that the current flowing in the on state can be increased. Also, by electrically connecting a control signal line for shifting the threshold voltage to minus to either the first gate electrode 401 or the second gate electrode 470, a depletion-type TFT can be formed.

[0045] Also, by electrically connecting a control signal line for shifting the threshold voltage to plus to the first gate electrode 401, or either the second gate electrode 470, an enhancement-type TFT can be formed. Also, by electrically connecting a control signal line for shifting the threshold voltage to plus to either the first gate electrode 401 or the second gate electrode 470, an enhancement-type TFT can be formed.

[0046] Also, by electrically connecting a control signal line for shifting the threshold voltage to plus to the first gate electrode 401, Alternatively, by electrically connecting to either of the second gate electrodes 470, enhance It can be made into a sment-type TFT.

[0047] Furthermore, the combination of the two thin-film transistors used in the drive circuit is not particularly limited, and one A thin-film transistor with a gate electrode is used as a depletion-type TFT, and two gates A thin-film transistor having a t-electrode may be used as an enhancement-type TFT. In this case, the gate electrode is positioned above and below the oxide semiconductor layer as a thin-film transistor in the pixel area. Each has its own structure.

[0048] Furthermore, as thin-film transistors in the pixel section, the gate electrodes are positioned above and below the oxide semiconductor layer, respectively. The structure has the following characteristics, and as an enhancement-type TFT in the drive circuit, the gate electrode is an oxide semiconductor The structure has layers on the top and bottom, and the gate is a depletion-type TFT in the drive circuit. The structure may also have electrodes on the top and bottom of the oxide semiconductor layer. In that case, the threshold A control signal line for controlling the voltage value is electrically connected to either the upper or lower gate electrode. The connected gate electrode is configured to control the threshold.

[0049] In Figure 1(A), the second gate electrode 470 is the same as the pixel electrode 110 of the pixel portion. For example, in the case of a transmissive liquid crystal display device, a transparent conductive film is used to reduce the number of process steps. However, it is not particularly limited. Also, the width of the second gate electrode 470 is the width of the first gate electrode 40 Examples are shown that are wider than 1 and even wider than the width of the oxide semiconductor layer, but are not particularly limited. No. Furthermore, the first gate electrode 401 is wider than the width of the thin region of the oxide semiconductor layer. stomach.

[0050] Figure 1(B) shows an example where the material and width of the second gate electrode differ from those in Figure 1(A). Also, Figure 1 (B) shows a second thin-film transistor 170 connected to an organic or inorganic light-emitting element. This is an example of a display device included in the component.

[0051] In Figure 1(B), the electrode functions as the second gate electrode of the thin-film transistor 432. The materials for 471 are metallic materials (aluminum (Al), copper (Cu), titanium (Ti), tantalum Tungsten (W), Molybdenum (Mo), Chromium (Cr), Neodymium (N) d) Elements selected from scandium (Sc), or alloys containing the above elements. Using this method, the width of electrode 471 in cross-section is narrower than that of the second gate electrode 470 in Figure 1(A). Furthermore, the width of electrode 471 is narrower than the width of the oxide semiconductor layer. By narrowing the width, the The overlapping area between the first wiring 409 and the second wiring 410 via the second gate insulating layer 412 is reduced. It can be reduced, and the parasitic capacity can be made smaller. However, in Figure 1(B) The width of electrode 471 is wider than the width of the thin region of the oxide semiconductor layer.

[0052] The light-emitting element has at least a first electrode 472, a light-emitting layer 475, and a second electrode 474. In Figure 1(B), electrode 471 is made of the same material as the first electrode 472 of the pixel portion, for example While the number of processes is reduced by using aluminum and other materials, it is not particularly limited. Also, Figure 1( In B), the insulating layer 473 serves as a partition to provide insulation between adjacent pixels and their first electrodes. It functions.

[0053] Furthermore, Figure 1(C) shows an example in which the material and width of the second gate electrode differ from those in Figure 1(A). Figure 1 In (C), electrode 47 functions as the second gate electrode of thin-film transistor 433. The materials for 6 are metallic materials (aluminum (Al), copper (Cu), titanium (Ti), tantalum ( Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd) Using elements selected from scandium (Sc), or alloys containing the above elements. Furthermore, the width of the second gate electrode in the cross-section is narrower than in Figure 1(B). By narrowing the width, the first wiring 409 and the second wiring 410 and the second gate insulating layer By using 412, it is possible to avoid overlapping and further reduce the parasitic capacity. The width of electrode 476 shown in Figure 1(C) is greater than the width of the thin region of the oxide semiconductor layer. It is narrow. When forming an electrode 476 with such a narrow width, wet etching or the like is used. It is preferable that the process be such that both ends of the electrode 476 are located inside the edge of the resist mask. However, in Figure 1(C), a different metal material is used than that of the pixel electrode 110, so The photolithography process for forming pole 476 is increased by one step, and the number of masks is also increased by one. This will happen.

[0054] Gate line drive circuits or source line drive circuits used in liquid crystal displays, light-emitting displays, and electronic paper. Peripheral circuits such as dynamic circuits, or pixel parts, are sandwiched between two gate electrodes. By using thin-film transistors made of semiconductor material, it is possible to achieve high-speed operation and low power consumption. Furthermore, without significantly increasing the number of processes, both the pixel section and the driving circuit can be placed on the same substrate. This can be provided. By providing various circuits other than the pixel section on the same substrate, the surface This can reduce the manufacturing cost of the display device.

[0055] (Embodiment 2) In Embodiment 1, one thin-film transistor was described as the thin-film transistor of the drive circuit. However, here, two n-channel thin-film transistors are used to control the inverter of the drive circuit. The following explanation is based on an example of how the circuit is constructed. The thin-film transistor shown in Figure 2(A) is in its actual form. Since it is identical to the thin-film transistor 430 shown in Figure 1(A) of State 1, the same parts are the same We will explain using symbols.

[0056] The drive circuit for driving the pixel section is constructed using an inverter circuit, capacitors, resistors, etc. When combining two n-channel TFTs to form an inverter circuit, enhancement When forming by combining a depression-type transistor and a depletion-type transistor ( (Hereafter referred to as EDMOS circuit) and when formed with enhancement type TFTs (hereinafter There is also a circuit called an EEMOS circuit.

[0057] The cross-sectional structure of the inverter circuit of the drive circuit is shown in Figure 2(A). Note that the thin film transistor shown in Figure 2 The ZISTA 430 and the second thin-film transistor 431 are bottom-gate thin-film transistors. Furthermore, thin-film transistors have wiring provided on the semiconductor layer via a source region or drain region. This is an example of Zista.

[0058] In Figure 2(A), the first gate electrode 401 and gate electrode 402 are provided on the substrate 400. The materials for the first gate electrode 401 and gate electrode 402 are molybdenum, titanium, and Metal materials such as chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium It can be formed in a single layer or in layers using materials or alloy materials that mainly consist of these materials. ru.

[0059] For example, as a two-layer stacked structure of the first gate electrode 401 and gate electrode 402, A two-layered structure in which a molybdenum layer is stacked on top of a titanium layer, or a molybdenum layer on top of a copper layer. A two-layer structure in which a titanium nitride layer or tantalum nitride layer is laminated on a copper layer. A layered structure, preferably a two-layer structure consisting of a titanium nitride layer and a molybdenum layer, is preferred. 3 layers The laminated structure consists of a tungsten layer or tungsten nitride layer, and aluminum and silicon A laminate of a condensing alloy or an aluminum-titanium alloy with a titanium nitride layer or a titanium layer. It is preferable to use a laminated structure.

[0060] Furthermore, on the first gate insulating layer 403 covering the first gate electrode 401 and gate electrode 402 This includes an oxide semiconductor layer 405 and a second oxide semiconductor layer 407.

[0061] A first wiring 409 and a second wiring 410 are provided on the oxide semiconductor layer 405, and the second wiring 4 10 is gate through a contact hole 404 formed in the first gate insulating layer 403 It is directly connected to electrode 402. In addition, a third wiring 411 is provided on the second oxide semiconductor layer 407. establish.

[0062] The thin-film transistor 430 has a first gate electrode 401 and a first gate insulating layer 403. It has an oxide semiconductor layer 405 that overlaps with the first gate electrode 401, and the first wiring 409 is This is a power line to which a negative voltage VDL is applied (negative power line). This power line is at ground potential. It can also be used as a power source (grounding power line).

[0063] Furthermore, the second thin-film transistor 431 has a gate electrode 402 and a first gate insulating layer 40 It has a second oxide semiconductor layer 407 that overlaps with the gate electrode 402 via 3, and a third wiring 4 Line 11 is a power line to which a positive voltage VDH is applied (positive power line).

[0064] Furthermore, between the second oxide semiconductor layer 407 and the second wiring 410, n + A layer 408a is provided, Between the second oxide semiconductor layer 407 and the third wiring 411, n + A layer 408b is provided.

[0065] Furthermore, a top view of the inverter circuit of the drive circuit is shown in Figure 2(C). In Figure 2(C), the chain The cross-section obtained by cutting along line Z1-Z2 corresponds to Figure 2(A).

[0066] Furthermore, the equivalent circuit of the EDMOS circuit is shown in Figure 2(B). The circuit connections shown in Figure 2(A) are shown in Figure This corresponds to 2(B), and the thin-film transistor 430 is an enhancement-type n-channel transistor The second thin-film transistor 431 is a depletion-type n-channel transistor. This is an example of using "start".

[0067] To make the thin-film transistor 430 an enhancement-type n-channel transistor, In this embodiment, a second gate insulating layer 412 is placed on the oxide semiconductor layer 405, and the second gate A second gate electrode 470 is provided on the insulating layer 412, and applied to the second gate electrode 470. The threshold voltage of the thin-film transistor 430 is controlled by the applied voltage.

[0068] Furthermore, the second gate insulating layer 412 also serves as a protective layer covering the second oxide semiconductor layer 407. It works.

[0069] In Figures 2(A) and 2(C), the second wiring 410 is connected to the first gate insulating layer 403. This example shows a direct connection to the gate electrode 402 via a contact hole 404 formed therein. However, it is not particularly limited, and a connecting electrode is provided separately to connect the second wiring 410 and the gate electrode 402. They may be electrically connected.

[0070] Furthermore, this embodiment can be freely combined with Embodiment 1.

[0071] (Embodiment 3) In this embodiment, the display device will be described with reference to a block diagram and the like.

[0072] Figure 3(A) shows an example of a block diagram of an active-matrix liquid crystal display device. Figure 3 The liquid crystal display device shown in (A) has a pixel section having multiple pixels equipped with display elements on a substrate 300. 301 and a scan line driving circuit 302 that controls the scan line connected to the gate electrode of each pixel, It includes a signal line driving circuit 303 that controls the input of a video signal to a selected pixel.

[0073] Figure 3(B) shows an example of a block diagram of an active-matrix light-emitting display device. Figure 3 The light-emitting display device shown in (B) has a pixel section having multiple pixels equipped with display elements on a substrate 310. 311 and a first scan line drive circuit 31 that controls the scan lines connected to the gate electrodes of each pixel. The second scan line drive circuit 313 controls the input of the video signal to the selected pixel. It has a signal line driving circuit 314 and a switching TFT (Thin F) for one pixel. It uses two TFTs: an ILM Transistor (hereinafter referred to as TFT) and a TFT for current control. When placed, in the light-emitting display device shown in Figure 3(B), the gate electrode of the switching TFT is The first scan line drive circuit 312 generates a signal that is input to the connected first scan line, and current The signal input to the second scan line connected to the gate electrode of the control TFT is transmitted to the second scan line drive. It is generated by the dynamic circuit 313. However, the signal input to the first scan line and the signal input to the second scan line The signal to be driven may also be generated by a single scan line drive circuit. The number of TFTs in a switching element is used to control the operation of the switching element. Multiple first scan lines may be provided for each pixel. In this case, multiple first scan lines The signals input to the scan lines can all be generated by a single scan line drive circuit, or multiple scan lines can be used. Alternatively, a line drive circuit may be provided to generate the signal in each of these circuits.

[0074] Note that here, the scan line drive circuit 302, the first scan line drive circuit 312, and the second scan line This diagram shows how the drive circuit 313 and the signal line drive circuits 303 and 314 are fabricated in a display device. However, the scan line drive circuit 302, the first scan line drive circuit 312, or the second scan line drive circuit Part of 313 may be implemented using semiconductor devices such as ICs. Also, signal line drive circuits 303, 3 Some of component 14 may be implemented using semiconductor devices such as ICs.

[0075] Figure 4 shows the components of the display device: signal input terminal 321, scan line 323, signal line 324, and non This diagram illustrates the positional relationship between the protection circuit including linear elements and the pixel section. Scan lines 323 and signal lines 324 are arranged at an intersection on the plate 320, forming a pixel section 327. It is shown that the pixel section 327 corresponds to the pixel sections 301 and 311 shown in Figure 3.

[0076] The pixel section 301 consists of multiple signal lines that extend in the column direction from the signal line driving circuit 303. S1~Sm (not shown) are connected to the signal line drive circuit 303 and the scan line drive circuit 30 Multiple scan lines G1 to Gn (not shown) are arranged extending in the row direction from 2, resulting in a scan line Connected to the drive circuit 302, and corresponding to the signal lines S1~Sm and scan lines G1~Gn, the matrix It has multiple pixels (not shown) arranged in a cubic shape. Each pixel is connected to a signal line Sj (One of the signal lines S1 to Sm), scan line Gi (One of the scan lines G1 to Gn) It is connected to (1).

[0077] The pixel section 327 is composed of multiple pixels 328 arranged in a matrix. 8 is a pixel TFT 329 connected to scan line 323 and signal line 324, a holding capacitance unit 330, and a picture It is composed of an elementary electrode 331.

[0078] In the pixel configuration shown here, the holding capacitance unit 330 has one electrode and the pixel TFT 329 This shows the case where one electrode is connected and the other electrode and capacitance line 332 are connected. Also, the pixel electrode 331 drives the display elements (liquid crystal elements, light-emitting elements, contrast media (electronic ink), etc.) This constitutes one electrode. The other electrode of these display elements is connected to the common terminal 333. It is.

[0079] The protection circuit is located between the pixel unit 327 and the signal line input terminal 322. It is disposed between the scan line drive circuit and the pixel section 327. In this embodiment, multiple protections The circuit is arranged so that static electricity, etc., can be applied to the scan line 323, signal line 324 and capacity bus line 337. A voltage is applied, and the system is configured to prevent damage to the pixel TFT329, etc. Therefore, the protection circuit is configured to discharge the charge to the common wiring when a surge voltage is applied. It is being done.

[0080] In this embodiment, a protection circuit 334 is located on the scan line 323 side, and a protection circuit 33 is located on the signal line 324 side. 5. An example is shown in which a protection circuit 336 is provided on the capacity bus line 337. However, the protection circuit The installation location is not limited to this. Furthermore, the scan line drive circuit is implemented using semiconductor devices such as ICs. In that case, it is not necessary to provide a protection circuit 334 on the scan line 323 side.

[0081] By using the TFT shown in Embodiment 1 or Embodiment 2 in each of these circuits... The following advantages apply:

[0082] The drive circuit is broadly divided into a logic circuit section and a switch section or buffer section. The TFT installed there should be configured to allow control of the threshold voltage. On the other hand, the switch The TFTs provided in the section or buffer section preferably have a high on-current. Embodiment 1 Alternatively, by providing a drive circuit having a TFT as shown in Embodiment 2, the logic circuit section is provided This enables control of the threshold voltage of the TFT, and the TFT located in the switch or buffer section This makes it possible to increase the current. Furthermore, it reduces the area occupied by the drive circuit, making it possible to narrow It also contributes to framing.

[0083] Furthermore, the shift register circuit that constitutes the scan line drive circuit will be described below. It is shown in Figure 5. The shift register circuit has multiple flip-flop circuits 351, and control signal lines 352, Control signal line 353, control signal line 354, control signal line 355, control signal line 356, and reset It has a 357-line wire.

[0084] As shown in the shift register circuit in Figure 5, the flip-flop circuit 351 has an input to the first stage. The start pulse SSP is input to the power terminal IN via the control signal line 352, and the following stages... The input terminal IN is connected to the output signal terminal S of the preceding flip-flop circuit 351. OUT It is connected Furthermore, the reset terminal RES at the Nth stage (where N is a natural number) is at the (N+3)th stage. Output signal terminal S of the flip-flop circuit out And connected via reset line 357 Yes. The clock terminal CLK of the Nth stage flip-flop circuit 351 is connected to the control signal line 35 Assuming that the first clock signal CLK1 is input via 3, the (N+1)th stage The clock terminal CLK of the flip-flop circuit 351 is connected via the control signal line 354. The clock signal CLK2 is input. Also, the (N+2)th stage flip-flop circuit The clock terminal CLK of 351 receives a third clock signal CL via the control signal line 355. K3 is input. Also, the clock terminal of the (N+3) stage flip-flop circuit 351. The fourth clock signal CLK4 is input to CLK via the control signal line 356. Then, the clock terminal CLK of the (N+4) stage flip-flop circuit 351 receives a control signal. The first clock signal CLK1 is input via line 353. Also, the Nth stage flip The flop circuit 351 has a gate output terminal G out Therefore, the Nth stage flip-flop circuit Outputs the SRoutN output.

[0085] Note that the connection between the flip-flop circuit 351 and the power supply and power lines is not shown in the diagram. Each flip-flop circuit 351 is supplied with power supply potential Vdd and power supply potential GND via a power supply line. It is being supplied.

[0086] Note that the power supply potential described herein corresponds to the potential difference when the reference potential is set to 0V. Therefore, the power supply potential is sometimes called the power supply voltage, or the power supply voltage is sometimes called the power supply potential. There are also others.

[0087] In this specification, "A and B are connected" means that A and B are not directly connected. This includes things that are electrically connected as well as things that are already connected. Here, A and B are electrically connected A connection is considered to be a "gas connection" if there is an object between A and B that has some kind of electrical effect on it. This refers to the case where A and B are approximately the same node via the object. In this, A and B are connected via a switching element such as a TFT, and the switching element When the conduction of this element causes A and B to be at approximately the same potential, or when A and B are connected via a resistive element The potential difference generated across the resistive element does not affect the operation of the circuit including A and B. When considering the circuit operation, if A and B are treated as the same node, the difference This indicates a state where support is unavailable.

[0088] Next, Figure 6 shows the flip-flop circuit 351 of the shift register circuit shown in Figure 5. This shows one form. The flip-flop circuit 351 shown in Figure 6 consists of a logic circuit section 361 and a switch It has a switch section 362 and a logic circuit section 361 which has TFTs 363 to 368. Furthermore, the switch section 362 has TFTs 369 to 372. The circuit section outputs signals to the switch section, which is the subsequent circuit, in response to signals input from the outside. This is a circuit for switching between different numbers. The switch section receives input from both the external and control circuit sections. Depending on the signal, the on / off switching of the TFT, which acts as a switch, and the TFT's This is a circuit for outputting current according to the size and structure.

[0089] In the flip-flop circuit 351, the input terminal IN is the gate terminal of the TFT364, and It is connected to the gate terminal of the TFT367. The reset terminal RES is connected to the gate terminal of the TFT363. It is connected to the gate terminal. The clock terminal CLK is connected to the first terminal of the TFT369, and T It is connected to the first terminal of the FT371. The power line that supplies the power supply potential Vdd is connected to the TFT It is connected to the first terminal of 364, and to the gate terminal and second terminal of TFT366. The power lines to which the source potential GND is supplied are the second terminal of TFT363 and the second terminal of TFT365. , the second terminal of TFT367, the second terminal of TFT368, the second terminal of TFT370, and T It is connected to the second terminal of the FT372. Also connected to the first terminal of the TFT363 and the TFT364 The second terminal of TFT365, the first terminal of TFT365, the gate terminal of TFT368, and the gate terminal of TFT369 The gate terminals of TFT371 and TFT366 are connected to each other. The first terminal is the gate terminal of TFT365, the first terminal of TFT367, and the first terminal of TFT368. It is connected to the terminal, the gate terminal of TFT370, and the gate terminal of TFT372. Also, gate output terminal G out This refers to the second terminal of TFT369 and the first terminal of TFT370. It is connected. Output signal terminal S out This refers to the second terminal of TFT371 and TFT37 It is connected to the first terminal of 2.

[0090] Note that here, we assume that TFT363 through TFT372 are all N-type TFTs. I will explain the situation.

[0091] Furthermore, a TFT has at least three terminals, including a gate, a drain, and a source. It is an element that has a channel forming region between the drain region and the source region, and the drain region Current can be passed through the region, the channel formation region and the source region. Here, the source The drain and the TFT may be swapped depending on the TFT's structure and operating conditions, so either one It is the source, and it is difficult to determine which is the drain. Therefore, the source The regions that function as both source and drain are not called source or drain, for example, each These are sometimes referred to as the first terminal and the second terminal. Also, in this case, they function as gates. The terminals that are not gate terminals are referred to as gate terminals.

[0092] Next, Figure 7 shows an example of a layout diagram of the flip-flop circuit 351 shown in Figure 6.

[0093] The flip-flop circuit in Figure 7 has a power supply line 381 to which the power supply potential Vdd is supplied, and a reset line. Line 382, ​​control signal line 353, control signal line 354, control signal line 355, control signal line 356 , control signal line 383, power line 384 to which the power potential GND is supplied, logic circuit section 361, and It has a switch section 362. The logic circuit section 361 has TFTs 363 to 368. The switch section 362 also has TFTs 369 to 372. In Figure 7, the gate output terminal G out Wiring connected to output signal terminal S out Connected The wiring is also shown.

[0094] In Figure 7, the semiconductor layer 385, the first wiring layer 386, the second wiring layer 387, and the third wiring Layer 388 and contact hole 389 are shown. Note that the first wiring layer 386 is The second wiring layer 387 is formed by a layer that forms the gate electrode, and the source electrode of the TFT or The third wiring layer 388 is formed by a layer that forms the drain electrode, and the pixel electrode in the pixel portion It can be formed by a layer that forms the pole. However, it is not limited to this, for example, a third wiring layer Layer 388 may be formed as a wiring layer separate from the layer forming the pixel electrodes.

[0095] The connection relationships between each circuit element in Figure 7 are as explained in Figure 6. This shows a flip-flop circuit to which the first clock signal is input, therefore, The connections to signal line 354 to control signal line 356 are not shown in the diagram.

[0096] In the flip-flop circuit layout diagram of Figure 7, the logic circuit section 361 has TF By controlling the threshold voltage of T366 or TFT367, the EDMOS circuit 373 is controlled. It can be configured as follows: Typically, the TFT366 is used as a depletion type, and the TFT36 7 is configured with an enhancement-type EDMOS circuit 373, and the switch section 362 has TFT369 to TFT372 are used as dual-gate type TFTs or depletion type Let the TFT be as shown. Note that in Figure 6, the TFT366 and T in the EDMOS circuit 373 are shown. The FT367 is a depletion-type TFT gate electrode, unlike the EDMOS circuit shown in Figure 2. The connection points are different.

[0097] TFT366 or TFT367 is formed with a dual-gate type TFT, and back gate By controlling the potential of the electrodes, depletion-type TFTs or enhancement-type TFTs can be created. It can be represented as a TFT.

[0098] Figure 7 shows the buck gate electrode and the same potential control for controlling the threshold voltage of the TFT366. A separate signal line 390 is provided, making it a depletion type. The TFT366 is dual-gear This is a buck-type TFT, and the potential of the buck gate electrode is the power supply potential V applied to the gate electrode. dd is at a different potential than the power line 381 to which it is supplied.

[0099] In Figure 7, TFTs 369-372 are dual-gate type TFTs, and backgate This is an example where the back electrode and the gate electrode are at the same potential, and the potential of the back gate electrode is the same as the gate electrode. The power supply potential Vdd applied to it is the same potential as the power supply line that provides the power.

[0100] In this way, the TFTs arranged in the pixel section and driving circuit of the display device are made of an oxide semiconductor layer It can be formed using only n-channel TFTs with [specific technology / feature].

[0101] Furthermore, the TFT366 in the logic circuit section 361 supplies current according to the power supply potential Vdd. This is a TFT, and the TFT366 is a dual-gate TFT or a depletion type TFT. As an FT, by increasing the current flowing through it, the TFT's performance can be increased without degrading it. It can be made smaller.

[0102] Furthermore, in the TFT constituting the switch section 362, the amount of current flowing through the TFT is increased. Furthermore, it can switch between on and off very quickly, without degrading performance. The area occupied by the TFT can be reduced. Therefore, the circuit composed of the TFT is The area occupied can also be reduced. As shown in the figure, the TFT372 has a semiconductor layer 385, a first wiring layer 386 and a third wiring layer You can form a dual-gate TFT by arranging the 388s to sandwich the TFT.

[0103] Furthermore, in Figure 7, the dual-gate TFT has a semiconductor layer 385 connected to the first wiring layer 386. The third is connected to the first wiring layer 386 via the contact hole 389 and is at the same potential. An example has been shown in which the wiring layer 388 is sandwiched between the other layers, but the configuration is not limited to this. For example, a separate control signal line is provided for the third wiring layer 388, and the potential of the third wiring layer 388 is... This can also be configured to be controlled independently of the first wiring layer 386.

[0104] In the flip-flop circuit layout diagram shown in Figure 7, TFT363 to T The channel formation region of the FT372 may be shaped like a U (or horseshoe). Also, in Figure 7, the size of each TFT is equal, but depending on the load of the subsequent stage, Force signal terminal S out or gate output terminal G out The size of each TFT connected to it should be adjusted as appropriate. You can change it.

[0105] Next, using the timing chart shown in Figure 8, we will explain the operation of the shift register circuit shown in Figure 5. This will be explained. Figure 8 shows the control signals 352 to 356 shown in Figure 5. The supplied start pulse SSP, the first clock signal CLK1 to the fourth clock signal. Signal CLK4 and output signal terminal S of the 1st to 5th stage flip-flop circuits. out mosquito This shows Sout1 to Sout5, which are output from the diagram. Note that in the explanation of Figure 8, The reference numerals assigned to each element in Figures 6 and 7 are used.

[0106] Note that Figure 8 shows the case where each of the TFTs in the flip-flop circuit is an N-type TFT. This is the timing chart. Also, the first clock signal CLK1 and the fourth clock signal CLK4 is configured to shift by 1 / 4 wavelength (one section divided by the dotted line) as shown in the diagram. That's how it is.

[0107] First, during period T1, the first stage flip-flop circuit receives a start pulse SSP. When an H level input is received, the logic circuit section 361 switches between the TFT369 and TFT371 of the switch section. Turn on and turn off TFT370 and TFT372. At this time, the first clock signal Since CLK1 is at a low level, Sout1 is also at a low level.

[0108] During period T1, the second and subsequent flip-flop circuits receive a signal at the IN terminal. Since no input is received, it outputs an L level without operating. Note that in the initial state, Each flip-flop circuit in the flip-flop register circuit will be described assuming it outputs a low level. cormorant.

[0109] Next, in period T2, the first-stage flip-flop circuit operates similarly to period T1. The control circuit section 361 controls the switch section 362. During period T2, the first clock signal C Since LK1 is at H level, Sout1 will also be at H level. Also, in period T2, there are two stages. In the flip-flop circuit, Sout1 is input to the IN terminal at a high level, and the logic circuit Unit 361 turns on TFT369 and TFT371 of the switch unit, and TFT370 and TF Turn off T372. At this time, the second clock signal CLK2 is at the L level, so S out2 is at L level.

[0110] During period T2, the flip-flop circuits from the third stage onward receive a signal at the IN terminal. Since no input is being received, it outputs a low level without operating.

[0111] Next, during period T3, the first-stage flip-flop circuit maintains the state from period T2. The logic circuit section 361 controls the switch section 362 in this manner. Therefore, during period T3 The first clock signal CLK1 is at a high level, and Sout1 is at a high level. During period T3, the second-stage flip-flop circuit operates similarly to period T2, in the logic circuit section. 361 controls the switch unit 362. During period T3, the second clock signal CLK2 is Since it is at the H level, Sout2 is at the H level. Also, the third flip in period T3. In the flop circuit, Sout2 is input to the IN terminal at a high level, and the logic circuit section 361 is Turn on TFTs 369 and 371 in the switch section, and turn off TFTs 370 and 372. In this case, the third clock signal CLK3 is at a low level, so Sout3 is at a low level. ru.

[0112] During period T3, the flip-flop circuits from the 4th stage onward receive a signal at the IN terminal. Since no input is being received, it outputs a low level without operating.

[0113] Next, during period T4, the first-stage flip-flop circuit maintains the state from period T3. The logic circuit section 361 controls the switch section 362 in this manner. Therefore, during period T4 Therefore, the first clock signal CLK1 is at a low level, and Sout1 is also at a low level. Furthermore, during period T4, the second-stage flip-flop circuit maintains the state from period T3. Thus, the logic circuit section 361 controls the switch section 362. Therefore, during period T4 The second clock signal CLK2 is at a high level, and Sout2 is also at a high level. During period T4, in the third flip-flop circuit, similar to period T3, the logic circuit section 361 controls the switch section 362. In period T4, since the third clock signal CLK3 is at the H level, Sout3 is at the H level. Also, in the fourth flip flop circuit in period T4, Sout3 is input to the IN terminal at the H level, and the logic circuit section 361 turns on the TFT369 and TFT371 of the switch section 362 and turns off the TFT370 and TFT37 2. At this time, since the fourth clock signal CLK4 is at the L level, Sou t4 is at the L level.

[0114] Note that in period T4, in the flip-flop circuits after the fifth stage, since no signal is input to the IN terminal, they output the L level without operating.

[0115] Next, in period T5, in the second flip-flop circuit, the logic circuit section 361 controls the switch section 362 so as to maintain the state of period T3. Therefore, in period T5 , the second clock signal CLK2 is at the L level and Sout2 becomes the L level. Also, in period T5, in the third flip-flop circuit, the logic circuit section 361 controls the switch section 362 so as to maintain the state of period T4. Therefore, in period T5 , the third clock signal CLK3 is at the H level and Sout3 becomes the H level. Also, in period T5, in the fourth flip-flop circuit, similar to period T4, the logic circuit section 3 61 controls the switch section 362. In period T5, since the fourth clock signal CLK4 is at the H level, Sout4 is at the H level. Also, in the flip-flops after the fifth stage in period T5, similar to period T4, the logic circuit section 3 61 controls the switch section 362. In period T5, since the fourth clock signal CLK4 is at the H The circuit has the same wiring relationship as the flip-flop circuits in the first to fourth stages, and the timing of the input signal is also the same, so the description is omitted.

[0116] As shown in the shift register circuit of FIG. 5, Sout4 also serves as the reset signal of the flip-flop circuit in the first stage. During period T5, Sout4 becomes the H level, and this signal is input to the reset terminal RES of the flip-flop circuit in the first stage. When the reset signal is input, the TFTs 369 and 371 of the switch section 362 are turned off, and the TFTs 370 and 372 are turned on. Then, Sout1 of the flip-flop circuit in the first stage outputs the L level until the next start pulse SSP is input. By inputting the reset signal, the TFTs 369 and 371 of the switch section 362 are turned off, and the TFTs 370 and 372 are turned on. Then, Sout1 of the flip-flop circuit in the first stage outputs the L level until the next start pulse SSP is input. By inputting the reset signal, the TFTs 369 and 371 of the switch section 362 are turned off, and the TFTs 370 and 372 are turned on. Then, Sout1 of the flip-flop circuit in the first stage outputs the L level until the next start pulse SSP is input. By inputting the reset signal, the TFTs 369 and 371 of the switch section 362 are turned off, and the TFTs 370 and 372 are turned on. Then, Sout1 of the flip-flop circuit in the first stage outputs the L level until the next start pulse SSP is input. By inputting the reset signal, the TFTs 369 and 371 of the switch section 362 are turned off, and the TFTs 370 and 372 are turned on. Then, Sout1 of the flip-flop circuit in the first stage outputs the L level until the next start pulse SSP is input.

[0117] By the operation described above, in the flip-flop circuits from the second stage onwards, the reset of the logic circuit section is also performed based on the reset signal output from the subsequent flip-flop circuit, and a shift register circuit that outputs a signal having a waveform shifted by 1 / 4 wavelength of the clock signal as shown in Sout1 to Sout5 can be obtained. By the operation described above, in the flip-flop circuits from the second stage onwards, the reset of the logic circuit section is also performed based on the reset signal output from the subsequent flip-flop circuit, and a shift register circuit that outputs a signal having a waveform shifted by 1 / 4 wavelength of the clock signal as shown in Sout1 to Sout5 can be obtained. By the operation described above, in the flip-flop circuits from the second stage onwards, the reset of the logic circuit section is also performed based on the reset signal output from the subsequent flip-flop circuit, and a shift register circuit that outputs a signal having a waveform shifted by 1 / 4 wavelength of the clock signal as shown in Sout1 to Sout5 can be obtained. By the operation described above, in the flip-flop circuits from the second stage onwards, the reset of the logic circuit section is also performed based on the reset signal output from the subsequent flip-flop circuit, and a shift register circuit that outputs a signal having a waveform shifted by 1 / 4 wavelength of the clock signal as shown in Sout1 to Sout5 can be obtained.

[0118] Further, as the flip-flop circuit, by adopting a configuration in which an EDMOS TFT combining an enhancement type and a depletion type is provided in the logic circuit section and a dual-gate type TFT is provided in the switch section, the current flowing through the TFTs constituting the logic circuit section 361 can be increased, and the area occupied by the TFTs and further the area occupied by the circuit constituted by the TFTs can be reduced without degrading the performance. Also, in the TFTs constituting the switch section 362, the current flowing through the TFTs is increased, and the switching between on and off is made fast. the current flowing through the TFTs constituting the logic circuit section 361 can be increased, and the area occupied by the TFTs and further the area occupied by the circuit constituted by the TFTs can be reduced without degrading the performance. Also, in the TFTs constituting the switch section 362, the current flowing through the TFTs is increased, and the switching between on and off is made fast. the current flowing through the TFTs constituting the logic circuit section 361 can be increased, and the area occupied by the TFTs and further the area occupied by the circuit constituted by the TFTs can be reduced without degrading the performance. Also, in the TFTs constituting the switch section 362, the current flowing through the TFTs is increased, and the switching between on and off is made fast. the current flowing through the TFTs constituting the logic circuit section 361 can be increased, and the area occupied by the TFTs and further the area occupied by the circuit constituted by the TFTs can be reduced without degrading the performance. Also, in the TFTs constituting the switch section 362, the current flowing through the TFTs is increased, and the switching between on and off is made fast. the current flowing through the TFTs constituting the logic circuit section 361 can be increased, and the area occupied by the TFTs and further the area occupied by the circuit constituted by the TFTs can be reduced without degrading the performance. Also, in the TFTs constituting the switch section 362, the current flowing through the TFTs is increased, and the switching between on and off is made fast. This can be done without reducing performance, and furthermore, the area occupied by the TFT, and the TF The area occupied by the circuit composed of T can be reduced. Therefore, the display device can be narrowed. It is possible to achieve miniaturization, reduction in size, and improvement in performance.

[0119] Furthermore, the signal line drive circuit shown in Figure 3 may be equipped with a latch circuit, a level shifter circuit, etc. Yes, it is possible. A buffer section is provided in the final stage where the signal is sent from the signal line drive circuit to the pixel section, and the amplified signal The signal is sent from the signal line drive circuit to the pixel unit. For this reason, the buffer unit has a TF with a large on current. T, typically, involves installing a dual-gate type TFT or a depletion type TFT. Therefore, it is possible to reduce the area of ​​the TFT, and thus reduce the area occupied by the signal line driving circuit. This makes it possible to achieve narrower bezels, smaller size, and higher performance of display devices. Oh, the shift register, which is part of the signal line drive circuit, requires high-speed operation, so I It is preferable to implement it in a display device using C or similar.

[0120] Furthermore, this embodiment can be freely combined with Embodiment 1 or Embodiment 2. Cut.

[0121] (Embodiment 4) In this embodiment, a display device including the second thin-film transistor 170 shown in Embodiment 1 is provided. The manufacturing process will be explained using Figures 9 to 16.

[0122] In Figure 9(A), the translucent substrate 100 is made of barium borosilicate glass and aluminum Glass substrates such as minobrosilicate glass can be used.

[0123] Next, after forming a conductive layer over the entire surface of the substrate 100, the first photolithography process is performed. , a resist mask is formed, and unnecessary portions are removed by etching to form wirings and electrodes (a gate wiring including a gate electrode 101, a capacitor wiring 108, and a first terminal 121). At this time, etching is performed so that a tapered shape is formed at least at the end of the gate electrode 101. A cross-sectional view at this stage is shown in FIG. 9(A). Note that the top view at this stage corresponds to FIG. 11. At this time, etching is performed so that a tapered shape is formed at least at the end of the gate electrode 101. A cross-sectional view at this stage is shown in FIG. 9(A). Note that the top view at this stage corresponds to FIG. 11. At this time, etching is performed so that a tapered shape is formed at least at the end of the gate electrode 101. A cross-sectional view at this stage is shown in FIG. 9(A). Note that the top view at this stage corresponds to FIG. 11. At this time, etching is performed so that a tapered shape is formed at least at the end of the gate electrode 1Ten1. A cross-sectional view at this stage is shown in FIG. 9(A). Note that the top view at this stage corresponds to FIG. 11.

[0124] The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used. The gate wiring including the gate electrode 101, the capacitor wiring 108, and the first terminal 121 of the terminal portion are preferably formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). However, since Al alone has problems such as poor heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), or an alloy containing the above-described elements as components, or an alloy film combining the above-described elements, or a nitride containing the above-described elements as components is used.

[0125] Next, a gate insulating layer 102 is formed entirely on the gate electrode 101. The gate insulating layer 10 2 is formed by a sputtering method or the like to have a film thickness of 50 to 400 nm. When prioritizing the yield of the thin film transistor, it is preferable that the film thickness of the gate insulating layer 102 is thicker. Next, a gate insulating layer 102 is formed entirely on the gate electrode 101. The gate insulating layer 10

[0126] For example, a silicon oxide film is used as the gate insulating layer 102 and formed with a thickness of 100 nm by a sputtering method. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film, and may be a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, For example, a silicon oxide film is used as the gate insulating layer 102 and formed with a thickness of 100 nm by a sputtering method. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film, and may be a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, For example, a silicon oxide film is used as the gate insulating layer 102 and formed with a thickness of 100 nm by a sputtering method. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film, and may be a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, Other insulating films such as aluminum oxide film, aluminum oxide nitride film, and tantalum oxide film are used, and these materials It may be formed as a single-layer or laminated structure consisting of the material. Also, as the gate insulating layer 102 When using silicon oxide nitride film or silicon nitride film, impurities from the glass substrate For example, it blocks the diffusion of sodium and other substances, preventing them from entering the oxide semiconductor that is later formed. It is possible.

[0127] Furthermore, before depositing the oxide semiconductor film, argon gas is introduced to generate plasma. It is preferable to perform sputtering to remove any debris adhering to the surface of the gate insulating layer. Oh, instead of an argon atmosphere, nitrogen, helium, etc., can be used. The process can also be carried out in an atmosphere containing oxygen, hydrogen, N2O, etc. Alternatively, in an argon atmosphere with Cl 2. You can also proceed with the addition of CF4, etc.

[0128] Next, a first oxide semiconductor film (in this embodiment, the first In- A Ga-Zn-O non-single-crystal film is deposited. After plasma treatment, the first film is processed without exposure to air. Deposition of an In-Ga-Zn-O non-single crystal film is performed at the interface between the gate insulating layer and the semiconductor film. It is useful in that it does not allow dirt or moisture to adhere to it. Here, an 8-inch diameter Indium ), Ga (gallium), and Zn (zinc) oxide semiconductor target (In2O3: Using Ga2O3:ZnO=1:1:1, the distance between the substrate and the target was 170m. The film is deposited under conditions of m, pressure 0.4 Pa, DC power supply 0.5 kW, and in an argon or oxygen atmosphere. Furthermore, using a pulsed DC power supply can reduce dust and ensure a more uniform film thickness distribution. Therefore, it is preferable. The thickness of the first In-Ga-Zn-O non-single crystal film is 5 nm to 200 nm. Let m be the thickness of the first In-Ga-Zn-O non-single crystal film. In this embodiment, the thickness of the first In-Ga-Zn-O non-single crystal film is 100 Let's use nm.

[0129] Next, without exposure to the atmosphere, the second oxide semiconductor film (in this embodiment, the second In-G An a-Zn-O non-single crystal film is deposited by sputtering. Here, In2O3:Ga2O Using a target with a 3:ZnO = 1:1:1 ratio, the deposition conditions were set to a pressure of 0.4 Pa. The power supply was set to 500W, the film deposition temperature to room temperature, and an argon gas flow rate of 40 sccm was introduced. We will perform putter deposition. A target with In2O3:Ga2O3:ZnO = 1:1:1 will be used. Despite being used graphically, the film contains inclusions containing crystal grains of 1 nm to 10 nm in size immediately after deposition. -Ga-Zn-O non-single crystal films may be formed. Note that the target component ratio and composition Membrane pressure (0.1 Pa ~ 2.0 Pa), power (250 W ~ 3000 W: 8-inch diameter), temperature (Room temperature to 100°C), the presence or absence of crystal grains can be determined by appropriately adjusting the film deposition conditions for reactive sputtering, etc. Furthermore, the density and diameter size of the crystal grains can be adjusted within a range of 1 nm to 10 nm. The thickness of the second In-Ga-Zn-O non-single crystal film shall be 5 nm to 20 nm. If crystal grains are present, the size of the included crystal grains must not exceed the thickness of the film. In this embodiment, the thickness of the second In-Ga-Zn-O non-single crystal film is set to 5 nm.

[0130] The first In-Ga-Zn-O non-single crystal film is the second In-Ga-Zn-O non-single crystal film The film deposition conditions are made different from those of the first film. For example, the film deposition conditions for the second In-Ga-Zn-O non-single crystal film. The ratio of oxygen gas flow rate to argon gas flow rate in the first In-Ga-Zn-O system non-monochromatic system is greater than the ratio of oxygen gas flow rate to argon gas flow rate in the first In-Ga-Zn-O system non-monochromatic system The conditions for forming the crystalline film are those in which the oxygen gas flow rate accounts for a large proportion. Specifically, the first The deposition conditions for the In-Ga-Zn-O non-single crystal film (2) are: noble gas (argon or helium) Under an atmosphere such as (or oxygen gas 10% or less, argon gas 90% or more), the first I The conditions for depositing n-Ga-Zn-O non-single crystal films are under an oxygen atmosphere (or with an oxygen gas flow rate of 0). The flow rate should be equal to or greater than the argon gas flow rate (argon gas:oxygen gas = 1:1 or greater).

[0131] The second In-Ga-Zn-O non-single crystal film was deposited in the chamber where reverse sputtering had been performed earlier. You may use the same chamber, or a different chamber from the one used for the reverse sputtering. The film can also be deposited using a bar.

[0132] Sputtering methods include RF sputtering, which uses a high-frequency power supply for sputtering, and DC sputtering. In addition, there is also the pulsed DC sputtering method, which applies a pulsed bias.

[0133] There are also multi-point sputtering systems that can set up multiple targets made of different materials. The apparatus can deposit multiple layers of different material films in the same chamber, or multiple types of materials in the same chamber. It is also possible to deposit films by simultaneously discharging electrical currents from similar materials.

[0134] Furthermore, a sputtering apparatus that uses the magnetron sputtering method, which has a magnetic mechanism inside the chamber. Alternatively, ECR sputtering uses plasma generated with microwaves instead of glow discharge. There are sputtering machines that use this method.

[0135] Furthermore, as a film deposition method using the sputtering method, the target material and sputtering gas components are deposited during film deposition. Reactive sputtering is a method that uses chemical reactions to form thin films of these compounds, and during film formation... There is also a bias sputtering method that applies voltage to the circuit board.

[0136] Next, a second photolithography process is performed to form a resist mask, and the first In- Etching of the Ga-Zn-O non-single crystal film and the second In-Ga-Zn-O non-single crystal film Here, we use wet etching with ITO07N (manufactured by Kanto Chemical Co., Ltd.) to remove unwanted material. The excess portion is removed to form the first In-Ga-Zn-O non-single crystal film, which is an oxide semiconductor film 109. This forms an oxide semiconductor film 111, which is a second In-Ga-Zn-O non-single crystal film. Oh, etching here is not limited to wet etching, but also uses dry etching. This is also acceptable. The top view at this stage is shown in Figure 9(B). Note that the top view at this stage is shown in Figure 12. It corresponds to this.

[0137] Next, a third photolithography process is performed to form a resist mask, followed by etching. This removes unnecessary parts, allowing wiring and contacts made of the same material as the gate electrode layer to reach the electrode layer. A hole is formed. This contact hole is designed to connect directly to the conductive film that will be formed later. For example, in the drive circuit section, the gate electrode layer and the source electrode layer or drain electrode layer Thin-film transistors that come into direct contact with the terminals, and terminals that electrically connect to the gate wiring of the terminal section are formed. In this case, a contact hole is formed. Note that this is the third photolithography process. This example shows how to perform this process to create contact holes for direct connection with a conductive film to be formed later. However, it is not particularly limited, and later, in the same process as the contact holes for connection with the pixel electrodes A contact hole is formed that reaches the gate electrode layer, and an electrical connection is made using the same material as the pixel electrode. It is permissible to do so. If electrical connections are made using the same material as the pixel electrodes, the number of masks can be reduced by one. It is possible.

[0138] Next, a conductive film 13 made of a metallic material is placed on the oxide semiconductor film 109 and the oxide semiconductor film 111. Part 2 is formed by sputtering or vacuum deposition. A top view at this stage is shown in Figure 9(C).

[0139] The material for the conductive film 132 is an element selected from Al, Cr, Ta, Ti, Mo, and W. Examples include alloys composed of the aforementioned elements, or alloy films combining the aforementioned elements. Furthermore, when performing heat treatment at 200°C to 600°C, it is necessary to ensure that the material has sufficient heat resistance to withstand this heat treatment. It is preferable to incorporate it into the electrode film. Pure Al has problems such as poor heat resistance and susceptibility to corrosion. Because there are points, it is formed in combination with a heat-resistant conductive material. Heat-resistant conductive material combined with Al Examples of materials include titanium (Ti), tantalum (Ta), tungsten (W), and molybdenum. Elements selected from (Mo), chromium (Cr), neodymium (Nd), and scandium (Sc). , or an alloy comprising the above-mentioned elements, or an alloy film combining the above-mentioned elements, It is formed from a nitride containing the elements mentioned above.

[0140] Here, the conductive film 132 is a single-layer titanium film. Alternatively, the conductive film 132 can be a two-layer structure. The structure is also good, and a titanium film may be laminated on an aluminum film. Also, conductive film 132 A Ti film is used, and an aluminum (Al-Nd) film containing Nd is layered on top of the Ti film. Furthermore, a three-layer structure in which a Ti film is deposited on top of it may also be used. The conductive film 132 is silicon It may also be a single-layer structure of an aluminum film containing [the specified element].

[0141] Next, a fourth photolithography step is performed to form the resist mask 131, and etching is performed. Unnecessary parts are removed by polishing to form the source electrode layer or drain electrode layer 105a, 105b. n, which functions as a source region or drain region. + Layers 104a, 104b, and connecting electrode 1 Form 20. The etching method used is either wet etching or dry etching. A conductive film is used. For example, an aluminum film or an aluminum alloy film is used as the conductive film 132. If present, wet etching can be performed using a solution of phosphoric acid, acetic acid, and nitric acid. Here, we used ammonia hydrochloride (hydrogen peroxide:ammonia:water = 5:2:2). Wet etching etches the conductive film 132 of the Ti film to the source electrode layer or The rain electrode layers 105a and 105b are etched from the oxide semiconductor film 111 to n + layer 10 Forms 4a and 104b. In this etching process, exposure of the oxide semiconductor film 109. The region is also partially etched, becoming an oxide semiconductor layer 103. Therefore, n + Layer 104a, 10 The channel region of the oxide semiconductor layer 103 between 4b is a region with a thin film thickness. Figure 10(A) In this case, the source electrode layer or drain electrode layer 105a, 105b, n + Layer 104a, 1 Since etching of 04b is performed in one step using ammonia hydrogen water as an etching agent, the source electricity Polar layer or drain electrode layer 105a, 105b and n + The edges of layers 104a and 104b coincide. Furthermore, it has a continuous structure. Also, because wet etching is used, the etching is The process is carried out isotropically, and the edges of the source electrode layer or drain electrode layers 105a and 105b are resist. It is recessed from mask 131. Through the above process, the oxide semiconductor layer 103 forms a channel region. A second thin-film transistor 170 can be fabricated using this method. A cross-sectional view at this stage is shown in Figure 10(A). This is shown. Note that the top view at this stage corresponds to Figure 13.

[0142] Next, it is preferable to perform heat treatment at 200°C to 600°C, typically 300°C to 500°C. Here, it is placed in a furnace and subjected to a heat treatment at 350°C for 1 hour under a nitrogen atmosphere. This process rearranges the atomic level of the In-Ga-Zn-O non-single crystal film. This releases the strain that hinders carrier movement, thus preventing heat treatment (including photo-annealing) at this stage. (mu) is important. Furthermore, the timing of the heat treatment is the second In-Ga-Zn-O system non The procedure is not particularly limited as long as it is performed after the deposition of the single crystal film; for example, it may be performed after the formation of the pixel electrodes.

[0143] Furthermore, oxygen radical treatment is performed on the channel formation region of the exposed oxide semiconductor layer 103. It is permissible to perform this. By performing oxygen radical treatment, thin-film transistors can be turned off normally. It is possible to perform radical treatment on the oxide semiconductor layer 103. Damage caused by chipping can be repaired. Radical treatment is preferably performed with O2, N2O. It is preferable to carry out this in an atmosphere containing oxygen, N2, He, and Ar. Furthermore, Cl is added to the above atmosphere. 2. The process may also be carried out in an atmosphere with CF4 added. Note that the radical treatment should be performed without bias. It is preferable to do so.

[0144] Furthermore, in this fourth photolithography process, the source electrode layer or the drain electrode layer The second terminal 122, made of the same material as 105a and 105b, is left at the terminal portion. Child 122 is source wiring (source electrode layer or drain electrode layer 105a, 105b including source electrode layer It is electrically connected to the wiring.

[0145] Furthermore, in the terminal section, the connecting electrode 120 is a contact hole formed in the gate insulating film. It is directly connected to the first terminal 121 of the terminal section via this. Note that although not shown here, The source wiring or drain of the thin-film transistor of the drive circuit is connected through the same process as described above. The wiring and the gate electrode are directly connected.

[0146] Furthermore, a resin having multiple (typically two) thickness regions formed by a multi-gradation mask. Using resist masks reduces the number of resist masks, thus simplifying the process and reducing costs. Cost reduction is possible.

[0147] Next, the resist mask 131 is removed, and protective insulation covering the second thin-film transistor 170 is performed. A layer 107 is formed. The protective insulating layer 107 is silicon nitride obtained using a sputtering method or the like. Film, silicon oxide film, silicon oxide nitride film, aluminum oxide film, aluminum nitride film, Using a single layer or a stack of aluminum oxide nitride film or tantalum oxide film. This is possible. In some thin-film transistors of the drive circuit, this protective insulating layer 107 is It functions as a second gate insulating layer, and a second gate electrode is formed on top of it. Protective insulating layer 107 specifies a film thickness of 50-400 nm. This is when prioritizing the yield of thin-film transistors. In this case, it is preferable that the thickness of the protective insulating layer 107 be thick. Also, if the protective insulating layer 107 is acid When using a silicon nitride film or a silicon nitride film, after forming the protective insulating layer 107 Impurities that adhere due to some cause, such as sodium, diffuse and penetrate the oxide semiconductor. It can be blocked from doing so.

[0148] Next, a fifth photolithography step is performed to form a resist mask and a protective insulating layer 1 Etching of 07 forms a contact hole 125 that reaches the drain electrode layer 105b. Also, etching here creates a contact hole 12 that reaches the second terminal 122. 7. A contact hole 126 that reaches the connecting electrode 120 is also formed. A cross-sectional view at this stage is shown. This is shown in Figure 10(B).

[0149] Next, after removing the resist mask, a transparent conductive film is deposited. The material for the transparent conductive film is... These include indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO3). 2. Form materials such as ITO (abbreviated as ITO) using sputtering or vacuum deposition methods. Etching of materials is performed using hydrochloric acid-based solutions. However, etching of ITO in particular is Because residue is easily generated, indium oxide zinc oxide is used to improve etching processability. Gold (In2O3-ZnO) may also be used.

[0150] Next, a sixth photolithography step is performed to form a resist mask, followed by etching. Further unnecessary parts are removed to form the pixel electrode 110 in the pixel area. This sixth photolithography In the roughing process, the drive circuit uses the same material as the pixel electrode 110 for a part of the circuit. This is used to form an electrode layer (back gate electrode) on an oxide semiconductor layer to control the threshold. Furthermore, the thin-film transistor having a back gate electrode is shown in Figure 1(A) and Embodiment 1. Since it is illustrated, a detailed explanation will be omitted here.

[0151] Furthermore, in this sixth photolithography process, the gate insulating layer 10 in the capacitance section 2 and the protective insulating layer 107 are used as dielectrics, and the capacitance is maintained between the capacitive wiring 108 and the pixel electrode 110. A gate insulating layer 102 and protective insulating layer 107 are used as dielectrics. An example was shown in which a retaining capacitance is formed by the capacitive wiring 108 and the pixel electrode 110, but this is not particularly limited. Instead, an electrode made of the same material as the source or drain electrode is provided above the capacitive wiring. The electrode, the capacitive wiring, and the gate insulating layer 102 between them are configured as dielectrics. A capacitance may be formed, and its electrode and the pixel electrode may be electrically connected.

[0152] Furthermore, in this sixth photolithography process, the first terminal and the second terminal are registered The transparent conductive films 128 and 129 formed on the terminal portion are left exposed when covered with a stomat. Terminals 8 and 129 will be electrodes or wiring used for connection to the FPC. Terminal 121 is directly connected to terminal 121. The transparent conductive film 128 formed on the connected connection electrode 120 is the input terminal of the gate wiring. It serves as a connecting terminal electrode. A transparent conductive film 1 is formed on the second terminal 122. 29 is a terminal electrode for connection that functions as an input terminal for the source wiring.

[0153] Next, the resist mask is removed, and a cross-sectional view at this stage is shown in Figure 10(C). The top view at this stage corresponds to Figure 14.

[0154] Furthermore, Figures 15(A1) and 15(A2) show the top view of the gate wiring terminal section at this stage and Cross-sectional views are shown for each section. Figure 15(A1) follows the line C1-C2 in Figure 15(A2). This corresponds to a cross-sectional view. In Figure 15(A1), a transparent film is formed on the protective insulating film 154. The conductive film 155 is a terminal electrode for connection that functions as an input terminal. Also, see Figure 15(A1 In the terminal section, the first terminal 151 is formed of the same material as the gate wiring, and the saw The connecting electrode 153, which is formed from the same material as the wiring, overlaps with the gate insulating layer 152. They are in contact and electrically conductive. Also, the connecting electrode 153 and the transparent conductive film 155 are protected by the insulating film 154. Electrical conductivity is established through direct contact via a contact hole provided therein.

[0155] Furthermore, Figures 15(B1) and 15(B2) show the top view and cross-sectional view of the source wiring terminal section. Each is illustrated. Also, Figure 15(B1) follows the line D1-D2 in Figure 15(B2). This corresponds to a cross-sectional view. In Figure 15(B1), a transparent conductive film is formed on the protective insulating film 154. The film 155 is a terminal electrode for connection that functions as an input terminal. Also, see Figure 15(B1) In the terminal section, an electrode 156 formed from the same material as the gate wiring is connected to the source wiring. The second terminal 150, which is electrically connected, is superimposed below it via a gate insulating layer 152. 156 is not electrically connected to the second terminal 150, and electrode 156 is connected to the second terminal 150 Setting it to a different potential, such as floating, GND, or 0V, can help with noise suppression. It can form a capacitance for external use or capacitance for static electricity countermeasures. Also, the second terminal 15 0 is electrically connected to the transparent conductive film 155 via the protective insulating film 154.

[0156] Multiple gate lines, source lines, and capacitive lines are provided depending on the pixel density. Furthermore, at the terminal section, there is a first terminal at the same potential as the gate wiring, and a second terminal at the same potential as the source wiring. Multiple terminals, such as terminal 2 and a third terminal at the same potential as the capacitance wiring, are arranged in a row. The number of terminals can be any number desired, and the implementer may decide this as appropriate.

[0157] Thus, through six photolithography processes, six photomasks are used to create the bottle. The second thin-film transistor 170 is a gate-type n-channel thin-film transistor, holding The capacity can be completed. Then, these can be arranged in a matrix corresponding to individual pixels. To create an active-matrix display device by arranging elements to form the pixel section. It can be one of the substrates. For convenience in this specification, such a substrate is referred to as an active matrix. It's called a RIX substrate.

[0158] Furthermore, if the same material as the pixel electrodes is used to electrically connect to the gate wiring, Because the third photolithography step can be omitted, the number of photolithography steps is reduced to five. Using five photomasks, a bottom-gate n-channel thin-film transistor is created. This allows us to complete the second thin-film transistor and its retention capacitance.

[0159] Furthermore, as shown in Figure 1(C), the material of the second gate electrode is made different from the material of the pixel electrode. This adds an extra photolithography step and an additional photomask.

[0160] When manufacturing an active-matrix liquid crystal display device, an active-matrix substrate is used. A liquid crystal layer is provided between the opposing substrate on which the opposing electrode is located, and the active matrix substrate and The opposing substrate is fixed in place. Furthermore, a common electrical connection is made between the opposing electrode provided on the opposing substrate and the opposing electrode. The electrodes are provided on the active matrix substrate, and a fourth terminal is electrically connected to the common electrode. It is provided in the section. This fourth terminal sets the common electrode to a fixed potential, for example, GND, 0V, etc. This is a terminal for that purpose.

[0161] Furthermore, Figure 16 shows an example of a top view different from that of Figure 14, not limited to the pixel configuration shown in Figure 14. In 16, capacitive wiring is not provided, and the pixel electrodes are connected to the gate wiring of adjacent pixels and the protective insulating film and gate This is an example of forming a retaining capacitance by stacking with an insulating layer in between, in which case the capacitance wiring and capacitance wiring The third terminal connected to it can be omitted. Note that in Figure 16, the same part as in Figure 14 The same symbols are used to explain the minutes.

[0162] In an active-matrix liquid crystal display device, pixel electrodes are arranged in a matrix. By driving the pixels, a display pattern is formed on the screen. For details, see the selected pixels. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode, Optical modulation is performed on the liquid crystal layer placed between the electrode and the counter electrode, and this optical modulation is used to create a display pattern. It is perceived by the observer as such.

[0163] In the display of motion on liquid crystal displays, afterimages occur because the response of the liquid crystal molecules themselves is slow. This has the problem of causing blurring in videos. In order to improve the video characteristics of liquid crystal display devices, the entire surface There is a driving technique called black insertion, which involves displaying a black screen every other frame.

[0164] Furthermore, the so-called method of improving video characteristics by increasing the normal vertical period by 1.5 times or more. Alternatively, a drive technology called double-speed drive may be used.

[0165] Furthermore, in order to improve the video characteristics of the liquid crystal display device, multiple LEDs (light emission) are used as the backlight. A surface light source is constructed using a diode light source or multiple EL light sources, and the surface light source is constructed There is also a driving technology that drives each light source independently to intermittently light up within a single frame period. You may use three or more types of LEDs, or you may use white-emitting LEDs. Because it can control multiple LEDs, the LEDs can be synchronized with the switching timing of the optical modulation of the liquid crystal layer. It is also possible to synchronize the timing of the light emission of D. This driving technology partially turns off the LEDs. This is especially useful for video displays where a large proportion of the screen is black. This can lead to a reduction in power consumption.

[0166] By combining these driving technologies, the display characteristics of liquid crystal display devices, such as the motion characteristics, can be improved. This can be improved compared to the previous method.

[0167] The n-channel transistor obtained in this embodiment is an In-Ga-Zn-O non-single-ended transistor. Because a crystal film is used in the channel formation region and has good dynamic characteristics, these driving technologies They can be combined.

[0168] Furthermore, when fabricating a light-emitting device, one electrode (also called the cathode) of the organic light-emitting element is To set the power supply potential to a low voltage, such as GND or 0V, the cathode of the terminal is connected to the low power supply voltage. A fourth terminal is provided for setting the voltage, for example, to GND or 0V. Additionally, an illuminated indicator is provided. When manufacturing the device, in addition to source wiring and gate wiring, power supply lines shall be provided. Therefore, a fifth terminal is provided at the terminal section for electrical connection to the power supply line.

[0169] Thin-film transistors using oxide semiconductors in gate line drive circuits or source line drive circuits By doing so, manufacturing costs are reduced. And the thin-film transistors used in the drive circuit By directly connecting the gate electrode and source or drain wiring, the contact hole This allows for the reduction of the number of components and the resulting reduction in the area occupied by the drive circuit, thereby providing a display device.

[0170] Therefore, this embodiment makes it possible to provide a display device with high electrical characteristics at a low cost. ru.

[0171] Furthermore, this embodiment can be freely combined with Embodiment 1, Embodiment 2, or Embodiment 3. They can be combined.

[0172] (Embodiment 5) In this embodiment, an example of an electronic device is shown: electronic paper.

[0173] Figure 17 shows an example of a semiconductor device different from a liquid crystal display (LCD) display: an active-matrix type electronic device. The paper shows the thin-film transistor 581 used in the pixel portion of a semiconductor device. It can be fabricated in the same way as the thin-film transistor of the pixel portion shown in the embodiment 4, and is in the In-Ga-Zn-O system. This is a thin-film transistor that includes a non-single-crystal film as a semiconductor layer. Furthermore, as shown in Embodiment 1... Thus, the pixel section and the driving circuit can be manufactured on the same substrate, reducing manufacturing costs. This makes it possible to create a child paper.

[0174] The electronic paper in Figure 17 is an example of a display device using a twist ball display method. The Toball display method is an electrode layer that uses spherical particles painted in white and black as display elements. It is placed between the first electrode layer and the second electrode layer, and a potential difference is applied between the first electrode layer and the second electrode layer. This method of display is achieved by controlling the orientation of spherical particles by generating a phenomenon.

[0175] Thin-film transistor 581 is a thin-film transistor with a bottom gate structure, and the source electrode layer or The drain electrode layer is formed on the first electrode layer 587 and the insulating layers 583, 584, and 585. They are in contact at an opening and are electrically connected. Between the first electrode layer 587 and the second electrode layer 588 It has a black region 590a and a white region 590b in between, and is filled with liquid around it. Spherical particles 589 containing biti 594 are provided between a pair of substrates 580 and 596. The spherical particles 589 are surrounded by a filler material 595 such as resin (see Figure 17).

[0176] Alternatively, an electrophoretic element can be used instead of a twist ball. (Transparent liquid) And, positively charged white particles and negatively charged black particles are enclosed in a diameter of 10 μm to 20 Microcapsules of approximately 0 μm are used. They are placed between the first electrode layer and the second electrode layer. The microcapsules, when an electric field is applied, are formed by the first electrode layer and the second electrode layer, and white The white and black particles move in opposite directions, allowing for the display of either white or black. An electrophoretic display element, also known as electronic paper, is a display element that applies this principle. Because electrophoretic display elements have a higher reflectivity than liquid crystal display elements, auxiliary lights are not required. It consumes little power and the display can be seen even in dimly lit places. Because it is possible to retain the image once it has been displayed, even if power is not supplied to it. , from a radio wave source to a semiconductor device with a display function (simply a display device, or a semiconductor device equipped with a display device) Even when the body device (also called a display device) is moved away, it is possible to save the displayed image. Yes.

[0177] Through the above process, electronic paper with reduced manufacturing costs as a semiconductor device can be produced. It is possible.

[0178] This embodiment can be appropriately combined with the configuration described in Embodiment 1 or Embodiment 2. It is possible to implement this.

[0179] (Embodiment 6) In this embodiment, an example of a light-emitting display device is shown as a semiconductor device. The display elements of the display device As an example, we will demonstrate using a light-emitting element that utilizes electroluminescence. Light-emitting devices that utilize luminescence use either organic or inorganic compounds as the light-emitting material. They are distinguished by whether they are physical objects; generally, the former are called organic EL elements, and the latter are called inorganic EL elements. They've found out.

[0180] Organic EL elements emit electrons and holes from a pair of electrodes when a voltage is applied to the light-emitting element. Each of these is injected into a layer containing a luminescent organic compound, and an electric current flows through it. Then, these... The recombination of electrons and holes causes the luminescent organic compound to form an excited state. And when that excited state returns to the ground state, it emits light. From this mechanism, Such light-emitting devices are called current-excited light-emitting devices.

[0181] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. ru.

[0182] Figure 18 shows an example of a pixel configuration to which digital time-gradation driving can be applied as an example of a semiconductor device. This is a diagram.

[0183] This section describes the pixel configuration and operation to which digital time-based gradation driving can be applied. This method uses an oxide semiconductor layer (In-Ga-Zn-O non-single crystal film) as the channel formation region. This example shows the use of two channel-type transistors in a single pixel.

[0184] Pixel 6400 consists of a switching transistor 6401, a driving transistor 6402, It has a light-emitting element 6404 and a capacitive element 6403. Switching transistor 64 01 has a gate connected to scan line 6406, and the first electrode (source electrode and drain electrode) The (side) is connected to signal line 6405, and the second electrode (the other of the source electrode and drain electrode) is driven It is connected to the gate of the drive transistor 6402. The drive transistor 6402 is The gate is connected to the power line 6407 via the capacitive element 6403, and the first electrode is connected to the power line 640 It is connected to 7, and the second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 6404. The second electrode of the light-emitting element 6404 corresponds to the common electrode 6408.

[0185] Furthermore, a low power supply potential is set for the second electrode (common electrode 6408) of the light-emitting element 6404. The low power supply potential is defined as the low power supply potential set on power line 6407 relative to the high power supply potential. The potential is the potential that satisfies the high power supply potential, and low power supply potentials include, for example, GND and 0V. It may be fixed. The potential difference between this high power supply potential and the low power supply potential is applied to the light-emitting element 6404. Then, in order to pass current through the light-emitting element 6404 and make the light-emitting element 6404 emit light, a high power supply potential is used. The potential difference between the low power supply potential and the light-emitting element 6404 is set to be greater than or equal to the forward threshold voltage of the light-emitting element 6404. Set the potential for each.

[0186] Note that the capacitive element 6403 is omitted by substituting the gate capacitance of the drive transistor 6402. This is also possible. Regarding the gate capacitance of the drive transistor 6402, the channel region A capacitance may be formed between the gate electrode and the gate electrode.

[0187] In the case of a voltage input / voltage drive method, the gate of the drive transistor 6402 is: The drive transistor 6402 is either fully on or completely off. The video signal is input. In other words, the driver transistor 6402 is operated in the linear region. The driver transistor 6402 operates in the linear region, therefore the voltage of the power line 6407 is higher than A high voltage is applied to the gate of the drive transistor 6402. The signal line 6405 is connected to... Apply a voltage equal to or greater than (power line voltage + Vth of the drive transistor 6402).

[0188] Furthermore, when using analog gradation drive instead of digital time gradation drive, the signal input is different. By doing so, the same pixel configuration as in Figure 18 can be used.

[0189] When performing analog grayscale driving, the gate of the driving transistor 6402 is connected to the light-emitting element 6404 Apply a voltage equal to or greater than the forward voltage of the drive transistor 6402 + Vth. (Light-emitting element 64) The forward voltage of 04 refers to the voltage required to achieve the desired brightness, and at least the forward voltage is Includes key voltage. Note that the drive transistor 6402 operates in the saturation region. By inputting an O signal, current can be supplied to the light-emitting element 6404. The drive transistor... To operate the 6402 in the saturation region, the potential of the power line 6407 is set to the drive transistor The gate potential of the TA6402 is set higher. By making the video signal analog, the light-emitting element... By supplying current to the 6404 according to the video signal, analog grayscale driving can be performed.

[0190] Note that the pixel configuration shown in Figure 18 is not limited to this. For example, if new pixels are added to the pixels shown in Figure 18... Switches, resistors, capacitives, transistors, or logic circuits may be added to it.

[0191] Next, the configuration of the light-emitting element will be explained using Figures 19(A), 19(B), and 19(C). To clarify, here we will use the example where the driving TFT is the thin-film transistor 170 shown in Figure 1(B). The cross-sectional structure of the pixels is described below. Figures 19(A), 19(B), and 19(C) are shown below. TFT7001, 7011, and 7021 are driver TFTs used in semiconductor devices of ) It can be fabricated in the same way as the thin-film transistor 170 shown in Embodiment 1, and In-Ga-Zn-O This is a thin-film transistor with high electrical properties, containing a non-single-crystal film as a semiconductor layer.

[0192] A light-emitting element only needs to have at least one of its electrodes, either the anode or the cathode, transparent in order to extract light. Then, a thin-film transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. This includes top-side emission, bottom-side emission which extracts light from the substrate side, and on the substrate side and the opposite side of the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from the side surface, and the pixel configuration shown in Figure 18 is It can also be applied to light-emitting elements in injection-molded structures.

[0193] The light-emitting element with an upper surface injection structure will be explained using Figure 19(A).

[0194] Figure 19(A) shows the driving TFT, TFT7001, as shown in Figure 1(B) of the thin film transient In the case where the light emitted from the light-emitting element 7002 passes through to the anode 7005 side, A cross-sectional view of the pixel is shown. In Figure 19(A), the cathode 7003 of the light-emitting element 7002 and the driving TF are shown. TFT7001 is electrically connected, and a light-emitting layer 7004 is placed on the cathode 7003. The anodes 7005 are stacked in sequence. The cathode 7003 has a small work function and reflects light. Various materials can be used for the conductive film to be injected. For example, Ca, Al, MgAg AlLi and the like are preferable. And even if the light-emitting layer 7004 is composed of a single layer, multiple It is fine whether the layers are stacked on top of each other. In total, an electron injection layer, an electron transport layer, an emissive layer, a hole transport layer, and a hole injection layer are placed on the cathode 7003. The layers are stacked in order. Note that it is not necessary to provide all of these layers. The anode 7005 is a light-transmitting material. Formed using photosensitive conductive materials, such as indium oxide containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO). Translucent materials such as indium zinc oxide and indium tin oxide with added silicon oxide. A conductive film may also be used.

[0195] The region between the cathode 7003 and the anode 7005, which sandwiches the light-emitting layer 7004, is the light-emitting element 7002. It corresponds to the pixel shown in Figure 19(A), where the light emitted from the light-emitting element 7002 is the arrow. As indicated by the mark, inject towards the anode 7005 side.

[0196] Furthermore, the second gate electrode provided on the oxide semiconductor layer in the drive circuit is the cathode 7003 and Using the same material for formation simplifies the process, which is preferable.

[0197] Next, the light-emitting element with a bottom-extrusion structure will be explained using Figure 19(B). Driving TFT7 011 is the thin-film transistor 170 shown in Figure 1(A), and is emitted from the light-emitting element 7012. Figure 19(B) shows a cross-sectional view of the pixel when the light is emitted towards the cathode 7013. A light-emitting element is placed on a light-transmitting conductive film 7017 that is electrically connected to a dynamic TFT 7011. A cathode 7013 of 7012 is deposited, and an emissive layer 7014 and an anode 70 are placed on the cathode 7013. 15 is stacked in order. Note that if the anode 7015 is translucent, cover the anode. A shielding film 7016 for reflecting or blocking light may be formed on the cathode 70. 13 is the same as in Figure 19(A), and can be any conductive material with a small work function. It can be used. However, the film thickness should be such that it transmits light (preferably 5 nm to 3 nm). (Approximately 0 nm) For example, an aluminum film with a thickness of 20 nm is used with cathode 7013. It can be used in this way. And the light-emitting layer 7014 is a single layer, as in Figure 19(A). It can be configured as a single unit or as multiple layers stacked on top of each other; either is acceptable. Anode 7015 does not need to transmit light, but like Figure 19(A), it is a conductive material that is translucent. It can be formed using a material. The shielding film 7016 is, for example, a metal that reflects light. While other materials can be used, they are not limited to metal films. For example, a resin with black pigment added can be used. It is possible to stay there.

[0198] The region between the cathode 7013 and anode 7015, sandwiching the light-emitting layer 7014, is the light-emitting element 7012. This corresponds to the pixel shown in Figure 19(B), where the light emitted from the light-emitting element 7012 is As indicated by the arrow, the material is injected towards the cathode 7013.

[0199] Furthermore, the second gate electrode provided on the oxide semiconductor layer in the drive circuit is connected to the cathode 7013. Using the same material for formation simplifies the process, which is preferable.

[0200] Next, a light-emitting element with a double-sided injection structure will be explained using Figure 19(C). Figure 19(C) Then, on the light-transmitting conductive film 7027 electrically connected to the driving TFT 7021, The cathode 7023 of the light-emitting element 7022 is formed by depositing a film, and the light-emitting layer 7024 is on the cathode 7023. The anodes 7025 are stacked in order. The cathode 7023 is the same as in Figure 19(A). Various materials can be used if the conductivity function is small. However, the film thickness is ...to the extent that it transmits light. For example, Al with a film thickness of 20 nm is used as cathode 7023. It can be used. The light-emitting layer 7024 is composed of a single layer, as in Figure 19(A). It is acceptable whether it is configured as a single layer or as multiple layers stacked on top of each other. Anode 70 25 is formed using a light-transmitting conductive material, similar to Figure 19(A). It is possible.

[0201] The portion where the cathode 7023, the light-emitting layer 7024, and the anode 7025 overlap is the light-emitting element 70 This corresponds to 22. In the case of the pixel shown in Figure 19(C), the light emitted from the light-emitting element 7022 As indicated by the arrows, the material is injected into both the anode 7025 side and the cathode 7023 side.

[0202] Furthermore, the second gate electrode provided on the oxide semiconductor layer in the drive circuit is made of conductive film 7027 It is preferable to form it with the same material as before because it simplifies the process. Also, oxidation in the drive circuit The second gate electrode, provided on the semiconductor layer, is made of the same material as the conductive film 7027 and the cathode 7023. Using this method to create a laminated structure simplifies the process, and the laminated structure also reduces the wiring resistance. It can be reduced, which is preferable.

[0203] Here, we have discussed organic EL elements as light-emitting elements, but inorganic EL elements can also be used as light-emitting elements. It is also possible to incorporate an L element.

[0204] In this embodiment, a thin-film transistor (driving TFT) controls the driving of the light-emitting element, An example of electrically connected light-emitting elements was shown, but current is currently flowing between the driving TFT and the light-emitting element. A configuration in which a control TFT is connected is also acceptable.

[0205] The semiconductor device shown in this embodiment is shown in Figures 19(A), 19(B), and 19(C). This configuration is not limited to the one described, and various modifications are possible based on the disclosed technical concept. ru.

[0206] Next, the upper surface of a light-emitting display panel (also called a light-emitting panel), which corresponds to a form of semiconductor device, and The cross-section will be explained using Figures 20(A) and 20(B). Figure 20(A) shows the first Thin-film transistors and light-emitting elements formed on a substrate are separated from a second substrate by a sealing material. Figure 20(B) is a top view of the sealed panel, and Figure 20(A) shows the HI in Figure 20(A). This corresponds to a cross-sectional view.

[0207] Pixel section 4502, signal line driving circuit 4503a, 450 provided on the first substrate 4501 3b, and the scan line drive circuits 4504a and 4504b are surrounded by a sealing material 4505 A pixel unit 4502, signal line driving circuits 4503a, 4503b, and A second substrate 4506 is provided on top of the scan line driving circuits 4504a and 4504b. The pixel section 4502, signal line driving circuits 4503a, 4503b, and scan line driving circuit 45 04a and 4504b consist of a first substrate 4501, a sealing material 4505, and a second substrate 4506. This seals it together with the filler 4507. In this way, it is airtight so that it is not exposed to the outside air. High-performance protective films with minimal degassing (laminated films, UV-curing resin films, etc.) It is preferable to package (seal) the product with a cover material.

[0208] Also provided on the first substrate 4501 are the pixel section 4502, the signal line driving circuit 4503a, 4 503b, and the scan line driving circuits 4504a and 4504b have multiple thin-film transistors. In Figure 20(B), the thin-film transistor 4510 included in the pixel section 4502 and the signal The thin-film transistor 4509 included in the wire drive circuit 4503a is shown as an example.

[0209] Thin-film transistors 4509 and 4510 use an In-Ga-Zn-O non-single-crystal film as the semiconductor layer. A highly reliable thin-film transistor, as shown in Embodiment 1, can be applied. Furthermore, the thin-film transistor 4509 has a semiconductor layer as shown in Embodiment 1 and Figure 1(B). It has gate electrodes at the top and bottom.

[0210] Furthermore, 4511 corresponds to a light-emitting element, and the first electrode is a pixel electrode of the light-emitting element 4511. Layer 4517 is electrically connected to the source electrode layer or drain electrode layer of the thin-film transistor 4510. It is connected to the following. The configuration of the light-emitting element 4511 is a first electrode layer 4517 and an electroluminescent layer The stacked structure consists of 4512 and a second electrode layer 4513, but is not limited to the configuration shown in this embodiment. It is not done. The direction of the light emitted from the light-emitting element 4511 is adjusted according to the direction of the light emitted from the light-emitting element 4511. The configuration can be changed as needed.

[0211] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, using a photosensitive material, an opening is formed on the first electrode layer 4517, and the side wall of the opening It is preferable to form it so that it becomes an inclined surface with a continuous curvature.

[0212] Even if the electroluminescent layer 4512 consists of a single layer, it is configured to be stacked with multiple layers. It's fine either way.

[0213] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on 4513 and the partition wall 4520. The protective film may be a silicon nitride film. It can form silicon nitride oxide films, DLC films, and the like.

[0214] Also, signal line drive circuits 4503a, 4503b and scan line drive circuits 4504a, 4504b The various signals and potentials applied to the pixel section 4502 are FPC4518a, 4518 It is supplied by b.

[0215] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 of the light-emitting element 4511. Formed from the same conductive film as 517, terminal electrode 4516 is thin-film transistor 4509, 4 It is formed from the same conductive film as the source electrode layer and drain electrode layer of 510.

[0216] The connecting terminal electrode 4515 is connected to the terminal of FPC4518a via the anisotropic conductive film 4519. They are electrically connected.

[0217] The second substrate 4506, located in the direction of light extraction from the light-emitting element 4511, must be translucent. It must be a glass plate, plastic plate, polyester film or A light-transmitting material, such as acrylic film, is used.

[0218] Furthermore, in addition to inert gases such as nitrogen and argon, UV-curable resin can also be used as the filler 4507. Oils or thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV Material A (ethylene vinyl acetate) can be used.

[0219] Furthermore, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. You may also appropriately incorporate optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters. Furthermore, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, by the surface irregularities An anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0220] The signal line drive circuits 4503a and 4503b, and the scan line drive circuits 4504a and 4504b are A single-crystal semiconductor film or polycrystalline semiconductor film is placed on a separately prepared single-crystal semiconductor substrate or insulating substrate. It may also be implemented with a drive circuit formed by a body membrane. Furthermore, only the signal line drive circuit, Alternatively, a portion of the scanning line drive circuit, or only a portion of it, may be formed and implemented separately. This embodiment is not limited to the configurations shown in Figures 20(A) and 20(B).

[0221] Through the above process, it is possible to manufacture light-emitting display devices (display panels) with reduced manufacturing costs. can.

[0222] This embodiment can be appropriately combined with the configuration described in Embodiment 1 or Embodiment 2. It is possible to implement this.

[0223] (Embodiment 7) In this embodiment, the upper surface and cross-section of a liquid crystal display panel, which corresponds to one form of semiconductor device, This will be explained using Figures 21(A1), 21(A2), and 21(B). Figure 21(A1) Figure 21(A2) shows the In-G coating in Embodiment 1 formed on the first substrate 4001. Thin-film transistors 4010 and 4011, which include an a-Zn-O non-single-crystal film as a semiconductor layer. The liquid crystal element 4013 is sealed between it and the second substrate 4006 with a sealing material 4005. Furthermore, Figure 21(B) is a top view of the panel, and Figure 21(A1) and Figure 21(A2) are MN. This corresponds to a cross-sectional view.

[0224] The pixel section 4002 and the scanning line driving circuit 4004 are surrounded on the first substrate 4001. A sealing material 4005 is provided in this manner. Also, the pixel section 4002 and the scan line drive rotation A second substrate 4006 is provided on the path 4004. Therefore, the pixel section 4002 and the scanning The line drive circuit 4004 consists of the first substrate 4001, the sealing material 4005, and the second substrate 4006. It is sealed together with the liquid crystal layer 4008. Also, the seal on the first substrate 4001 A single crystal is placed on a separately prepared substrate in a region different from the area enclosed by material 4005. A signal line driving circuit 4003, formed from a semiconductor film or a polycrystalline semiconductor film, is mounted.

[0225] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG method, Wire bonding methods or TAB methods can be used. Figure 21(A1) This is an example of implementing the signal line drive circuit 4003 using the COG method, and Figure 21(A2) shows that This is an example of implementing the signal line drive circuit 4003 using the TAB method.

[0226] Furthermore, the pixel section 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 are, It has multiple thin-film transistors, and in Figure 21(B), the thin film included in the pixel section 4002 Transistor 4010 and thin-film transistor 4011 included in scan line drive circuit 4004 The following is an example. On thin-film transistors 4010 and 4011 are insulating layers 4020 and 402 1 is provided.

[0227] Thin-film transistors 4010 and 4011 use an In-Ga-Zn-O non-single-crystal film as the semiconductor layer. The thin-film transistor shown in Embodiment 1, which includes the thin-film transistor, can be applied. Sta 4011 is a thin-film transistor having a back gate electrode as shown in Figure 2(A) of Embodiment 2. It is equivalent to a radiator.

[0228] Furthermore, the pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin-film transistor 4010. They are electrically connected. And the counter electrode layer 4031 of the liquid crystal element 4013 is on the second substrate 40 Formed on 06. Pixel electrode layer 4030, counter electrode layer 4031, and liquid crystal layer 4008 The overlapping portion corresponds to the liquid crystal element 4013. Note that the pixel electrode layer 4030 and the opposite The electrode layer 4031 is provided with insulating layers 4032 and 4033, which function as alignment films. The liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033.

[0229] The first substrate 4001 and the second substrate 4006 are made of glass, metal (typically, glass). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Aluminum foil can be used with PVF film or polyester. It is also possible to use a sheet with a structure sandwiched between films.

[0230] Furthermore, 4035 is a columnar spacer obtained by selectively etching an insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 It is provided in. A spherical spacer may also be used. Also, the counter electrode layer 4031 It is electrically connected to a common potential line provided on the same substrate as the thin-film transistor 4010. Using a common connection part, the opposing electrode layer 40 is connected via conductive particles placed between the pair of substrates. 31 and the common potential line can be electrically connected. Note that the conductive particles are the sealing material 40 It will be included in 05.

[0231] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Yes, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears earlier. The blue phase only appears within a narrow temperature range, so improving the temperature range is necessary. To achieve this, a liquid crystal composition containing 5% or more by weight of a chiral agent is used in the liquid crystal layer 4008. It is used. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 10 μs~ With a short duration of 100 μs and optical isotropy, orientation processing is unnecessary, and it exhibits low field-of-view angle dependence. stomach.

[0232] Although this embodiment is an example of a transmissive liquid crystal display device, a semi-transmissive type can also be used for a reflective liquid crystal display device. It can also be applied to liquid crystal display devices.

[0233] Furthermore, in the liquid crystal display device of this embodiment, a polarizing plate is provided on the outside (viewing side) of the substrate, and on the inside An example is shown where the colored layer and the electrode layer used for the display element are arranged in that order, but the polarizing plate is placed on the inside of the substrate. It may also be done. Furthermore, the laminated structure of the polarizing plate and the colored layer is not limited to this embodiment, and the polarizing plate and The coloring layer and the manufacturing process conditions should be set appropriately. A light-shielding film that functions in this way may be provided.

[0234] Furthermore, in this embodiment, in order to reduce surface irregularities of the thin-film transistor, and thin-film transistor To improve the reliability of the transistor, the thin-film transistor obtained in Embodiment 1 is fitted with a protective film or The structure is covered with insulating layers (insulating layer 4020, insulating layer 4021) that function as a planar insulating film. The protective film is designed to block organic matter, metallic substances, water vapor, and other pollutants and impurities suspended in the atmosphere. This is to prevent the intrusion of [unclear], and a dense film is preferred. The protective film is made using the sputtering method. Silicon oxide film, silicon nitride film, silicon oxide nitride film, silicon oxide nitride film, aluminum oxide film, nitride A single layer or multiple layers of aluminum film, aluminum oxide / nitride film, or aluminum nitride / oxide film. It is sufficient to form it in layers. In this embodiment, we show an example of forming a protective film by sputtering, but in particular It is not limited to and can be formed by various methods such as the PCVD method. In a part of the drive circuit, This protective film acts as a second gate insulating layer, and the back gate is on the second gate insulating layer. Includes thin-film transistors.

[0235] Here, a laminated insulating layer 4020 is formed as a protective film. As the first layer of 0, a silicon oxide film is formed using the sputtering method. Silicon oxide film as a protective layer. Using this method, hillock prevention of aluminum films used as source electrode layer and drain electrode layer is achieved. It is effective in stopping it.

[0236] Furthermore, an insulating layer is formed as the second layer of the protective film. Here, the second layer of the insulating layer 4020 is Then, a silicon nitride film is formed using the sputtering method. When a silicon nitride film is used as a protective film, This prevents ions such as thorium from penetrating the semiconductor region and altering the electrical properties of the TFT. It can be controlled.

[0237] Alternatively, after forming the protective film, the semiconductor layer may be annealed (300°C to 400°C). Furthermore, a back gate is formed after the protective film is formed.

[0238] Furthermore, an insulating layer 4021 is formed as a planar insulating film. The insulating layer 4021 is made of poly Heat-resistant organic materials such as mids, acrylics, benzocyclobutenes, polyamides, and epoxys. Materials can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials) can also be used. Using siloxane-based resins, PSG (phosphorus glass), BPSG (phosphorus boron glass), etc. This can be achieved by stacking multiple insulating films made of these materials. 4021 may be formed.

[0239] Siloxane-based resins are formed using siloxane-based materials as the starting material for Si-OS. This corresponds to a resin containing i-bonds. Siloxane resins use organic groups (e.g., alkyl groups) as substituents. You may also use aryl groups or fluoro groups. Furthermore, organic groups may have fluoro groups. You can.

[0240] The method for forming the insulating layer 4021 is not particularly limited and can be sputtered or SOG depending on the material. Spin coating, dip coating, spray coating, droplet ejection (inkjet method, screen coating) Printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife A coater or the like can be used. When forming the insulating layer 4021 using a material liquid, The semiconductor layer may be annealed (300°C to 400°C) simultaneously with the machining process. By combining the firing process of the edge layer 4021 with the annealing of the semiconductor layer, semiconductor devices can be manufactured efficiently. It becomes possible to do so.

[0241] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium oxide-containing indium tin oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide with added silicon dioxide. Conductive materials can be used.

[0242] Furthermore, conductive polymers are used as the pixel electrode layer 4030 and the counter electrode layer 4031. It can be formed using a conductive composition containing (also known as). The resulting pixel electrodes have a sheet resistance of 10,000 Ω / □ or less and a light transmittance at a wavelength of 550 nm. It is preferable that the ratio is 70% or more. Also, the resistance of the conductive polymer contained in the conductive composition The ratio is preferably 0.1 Ω·cm or less.

[0243] As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene Examples include derivatives thereof, or copolymers of two or more of these.

[0244] In addition, a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 or pixel unit 4 The various signals and potentials supplied to 002 are provided by the FPC4018.

[0245] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. Formed from the same conductive film as 30, the terminal electrode 4016 is made of thin-film transistor 4010, 40 The source electrode layer and drain electrode layer are formed of the same conductive film.

[0246] The connecting terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. They are electrically connected.

[0247] Furthermore, in Figures 21(A1) and 21(A2), the signal line drive circuit 4003 is formed separately. Although an example of mounting on the first substrate 4001 is shown, this embodiment is not limited to this configuration. It is not done. A scan line drive circuit may be formed and implemented separately, or it may be part of the signal line drive circuit. The scan line drive circuit may be implemented by separately forming only a portion of it.

[0248] Figure 22 shows how a liquid crystal display module is configured as a semiconductor device using a TFT substrate 2600. This is an example.

[0249] Figure 22 shows an example of a liquid crystal display module, in which the TFT substrate 2600 and the opposing substrate 2601 are The pixel portion 2603, which includes a TFT and the like, is fixed in place by a material 2602, and the liquid crystal layer is also included between them. A display element 2604, a colored layer 2605, and a polarizing plate 2606 are provided to form a display area. The colored layer 2605 is necessary for color display, and in the case of the RGB system, red, green, A colored layer corresponding to each shade of blue is provided for each pixel. Polarizing plates 2606, 2607, and 2613 are arranged on the outside of the substrate 2601. The light source consists of a cold cathode tube 2610 and a reflector 2611, and the circuit board 2612 is The flexible wiring board 2609 is connected to the wiring circuit section 2608 of the TFT board 2600. Furthermore, external circuits such as control circuits and power supply circuits are incorporated. Also, a polarizing plate and The layers may be laminated with a phase difference plate between them and the liquid crystal layer.

[0250] The LCD display module has TN (Twisted Nematic) mode and IPS (I n-Plane-Switching) mode, FFS (Fringe Field Switching) (witching) mode, MVA (Multi-domain Vertical A) alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. You can use modes such as UID Crystal.

[0251] Through the above process, a liquid crystal display panel with reduced manufacturing costs as a semiconductor device is manufactured. It is possible.

[0252] This embodiment is compatible with the configuration described in Embodiment 1, Embodiment 2, or Embodiment 3. It is possible to implement them in appropriate combinations.

[0253] (Embodiment 8) The semiconductor device relating to the disclosed invention can be applied to various electronic devices (including amusement machines). This can be done. As for electronic devices, for example, television equipment (television, or television) (Also called a receiver), computer monitors, digital cameras, digital video cameras Camera, digital photo frame, mobile phone (also called mobile phone or mobile phone device), mobile Examples include small game consoles, portable information terminals, sound playback devices, and large game machines such as pachinko machines. It can be done.

[0254] Figure 23(A) shows an example of a mobile information terminal device 9200. The 200 has a built-in computer and is capable of performing various data processing tasks. As for portable information terminal devices like the 9200, PDA (Personal Digital Device) (Assistance) is one example.

[0255] The mobile information terminal device 9200 consists of two housings, housing 9201 and housing 9203. The housing 9201 and housing 9203 are foldably connected at the connecting part 9207. The casing 9201 incorporates the display unit 9202, and the casing 9203 is the keyboard. It is equipped with the D9205. Of course, the configuration of the mobile information terminal device 9200 is not limited to those described above. If not specified, and the configuration includes a thin-film transistor having at least a back gate electrode, Often, other auxiliary equipment can be provided as appropriate. The drive circuit can be mounted on the same circuit board. By forming the pixel portion, manufacturing costs are reduced, resulting in thin-film transistors with high electrical characteristics. This enables the realization of a portable information terminal device that possesses these features.

[0256] Figure 23(B) shows an example of the digital video camera 9500. The camera 9500 has a display unit 9503 integrated into the housing 9501, and various other control units. It is provided. Furthermore, the configuration of the digital video camera 9500 is not particularly limited, and there are few Any configuration with a thin-film transistor having a back gate electrode is acceptable, and other accessories are also available. The equipment can be configured as needed. The drive circuit and pixel section can be formed on the same substrate. This reduces manufacturing costs and enables the development of digital digital transistors with high electrical characteristics and thin-film transistors. This makes it possible to create a video camera.

[0257] Figure 23(C) shows an example of the mobile phone 9100. The mobile phone 9100 is housed in a casing. It consists of two housings, the body 9102 and the casing 9101, and can be folded by the connecting part. They are connected in a way that allows them to be connected. The housing 9102 incorporates the display unit 9104, and the housing 91 The 01 key is equipped with an operation key 9106. Note that the configuration of the mobile phone 9100 is not particularly limited. If not specified, and the configuration includes a thin-film transistor having at least a back gate electrode, Often, other auxiliary equipment can be provided as appropriate. The drive circuit can be mounted on the same circuit board. By forming the pixel portion, manufacturing costs are reduced, resulting in thin-film transistors with high electrical characteristics. This makes it possible to create a mobile phone with the following features.

[0258] Figure 23(D) shows an example of the portable computer 9400. The 9400 comprises two enclosures, 9401 and 9404, which are connected in a way that allows them to be opened and closed. Unit 01 incorporates the display unit 9402, and the casing 9404 is equipped with a keyboard 9403, etc. It is. Furthermore, the configuration of the computer 9400 is not particularly limited, and at least backgate power Any configuration with a thin-film transistor having electrodes is acceptable, and other auxiliary equipment may be provided as appropriate. This configuration can be achieved by forming the drive circuit and pixel section on the same substrate. This reduces stress and enables the realization of computers with thin-film transistors that have high electrical characteristics.

[0259] Figure 24(A) shows an example of the television equipment 9600. In the case of 00, the display unit 9603 is incorporated into the housing 9601. The display unit 9603 displays It is possible to display an image. Also, here, the stand 9605 is used to display the housing 9601 This shows a configuration that supports this.

[0260] The television unit 9600 is operated using the control switches on the housing 9601 and a separate remote control. This can be done using the control unit 9610. The remote control unit 9610 has control keys The 9609 allows you to control the channel and volume, and the information is displayed on the display unit 9603. The video can be controlled. Furthermore, the remote control unit 9610 can be controlled by the remote control unit. A display unit 9607 may be provided to display the information output from 9610.

[0261] The television system 9600 will consist of a receiver, modem, and other components. It can receive more general television broadcasts, and can also connect via a modem via wired or wireless connection. By connecting to the communication network, one-way (sender to receiver) or two-way communication is possible. It is also possible to communicate information (between a sender and a receiver, or between receivers, etc.).

[0262] Figure 24(B) shows an example of the digital photo frame 9700. For example, The photo frame 9700 has a display unit 9703 integrated into the housing 9701. Section 9703 is capable of displaying various images, such as those captured by a digital camera. By displaying the image data, it can function just like a regular photo frame.

[0263] The Digital Photo Frame 9700 includes an operating unit and external connection terminals (USB terminal, USB port). A structure that includes terminals that can connect to various cables such as B cables, a recording medium insertion section, etc. These components may be incorporated on the same surface as the display unit, but may also be on the sides or back. It is desirable to include it as it improves the design. For example, the recording medium of a digital photo frame. A memory device containing image data captured by a digital camera is inserted into the body insertion site. The system can capture data and display the captured image data on the display unit 9703.

[0264] Furthermore, the digital photo frame 9700 may be configured to send and receive information wirelessly. It is also possible to configure the system to acquire and display desired image data wirelessly.

[0265] Figure 25(A) shows an example of a different mobile phone 1000 from the mobile phone in Figure 23(C). It shows that the mobile phone 1000 has a display unit 1002 built into the housing 1001, Control buttons 1003, external connection port 1004, speaker 1005, microphone 1006, etc. It is equipped with.

[0266] The mobile phone 1000 shown in Figure 25(A) allows the user to touch the display unit 1002 with their finger or the like. Information can be entered. Furthermore, operations such as making phone calls or sending emails are performed on the display. This can be done by touching 1002 with a finger or other object.

[0267] The display unit 1002 has three main modes. The first is primarily for displaying images. The first is the display mode, the second is the input mode which is mainly for inputting information such as characters. The third is the display mode. This is a display + input mode, which is a combination of two modes: display mode and input mode.

[0268] For example, when making a phone call or composing an email, the display unit 1002 is used for text input. The primary text input mode is set to [this mode], and you should perform the input operation for the characters displayed on the screen. In addition, the keyboard or number buttons can be displayed on most of the screen of the display unit 1002. preferable.

[0269] Furthermore, the mobile phone 1000 contains sensors that detect tilt, such as a gyroscope and an accelerometer. By providing a detection device having the following, the orientation (vertical or horizontal) of the mobile phone 1000 can be determined, The display on the display unit 1002 can be configured to switch screen displays automatically.

[0270] Furthermore, the screen mode can be switched by touching the display unit 1002 or by operating the housing 1001. This is done by operating the action button 1003. Also, the type of image displayed on the display unit 1002 It can also be configured to switch between modes. For example, if the image signal displayed on the display unit is a video If the data is in a specific format, it switches to display mode; if it's text data, it switches to input mode.

[0271] Furthermore, in input mode, the signal detected by the optical sensor of the display unit 1002 is detected and displayed If there is no input via touch operation on the display unit 1002 for a certain period of time, the screen mode will be changed to input mode. You may also control the system to switch from the "Do" display mode to the "Display Mode".

[0272] The display unit 1002 can also function as an image sensor. For example, the display unit 10 By touching the palm or fingers to device 02, the device can capture palm prints, fingerprints, etc., to perform identity verification. It can also be used. In addition, the display unit has a backlight that emits near-infrared light or a sensor that emits near-infrared light. Using a light source designed for imaging, it is also possible to image finger veins, palmar veins, and other veins.

[0273] Figure 25(B) is also an example of a mobile phone. The mobile phone in Figure 25(B) has a housing 9411. The display device 9410 includes a display unit 9412 and an operation button 9413, and the housing 9401 Operation buttons 9402, external input terminal 9403, microphone 9404, speaker 9405, and It has a communication device 9400 which includes a light-emitting unit 9406 that emits light when an incoming call is received, and has a display function. The display device 9410 is detachable from the communication device 9400, which has telephone functionality, in two directions indicated by the arrows. Yes. Therefore, it is also possible to attach the short axes of the display device 9410 and the communication device 9400 together. The long axes of the display device 9410 and the communication device 9400 can also be mounted together. If only the function is required, remove the display device 9410 from the communication device 9400, and the display device The 9410 can also be used independently. The communication device 9400 and the display device 9410 are connected wirelessly. Images or input information can be sent and received via wireless or wired communication, and each has a rechargeable battery. Terry closes.

[0274] (Embodiment 9) Here, a display device having a thin-film transistor in which the wiring and the oxide semiconductor layer are in contact. An example is shown in Figure 26. Note that in Figure 26, the same reference numerals are used for the same locations as in Figure 1(A). I will explain.

[0275] The first thin-film transistor 480 shown in Figure 26 is a thin-film transistor used in the drive circuit. The first wiring 409 and the second wiring 410 are provided in contact with the oxide semiconductor layer 405. This is an example. The first thin-film transistor 480 has a first gate below the oxide semiconductor layer 405. It has a first electrode 401 and a second gate electrode 470 above the oxide semiconductor layer 405.

[0276] Furthermore, the second thin-film transistor 481 is a thin-film transistor used in the pixel section. A source electrode layer or drain electrode layer 105a, 105b is provided in contact with the oxide semiconductor layer 103. This is an example of something being rejected.

[0277] The semiconductor device of this embodiment has a configuration in which the wiring and the oxide semiconductor layer are in contact, therefore, Compared to Form 1, the number of steps can be reduced.

[0278] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case. [Explanation of Symbols]

[0279] 100 circuit boards 101 Guard Station 102 Gate Insulation Layer 103 Oxide semiconductor layer 104a, 104b n + layer 105a Source electrode layer 105b Drain electrode layer 107 Protective insulating layer 108 Capacitance wiring 10⁹ Oxide semiconductor film 110 Pixel Electrodes 111 Oxide semiconductor film 120 connecting electrodes 121 terminals 122 terminals 125 Contact Holes 126 Contact Holes 127 Contact Holes 128 Transparent conductive film 129 Transparent conductive film 131 Resist Mask 132 Conductive film 150 terminals 151 terminals 152 Gate Insulation Layer 153 Connecting electrodes 154 Protective insulating film 155 Transparent conductive film 156 Electrode 170 Second Thin-Film Transistor 400 circuit boards 401 First gate 402 Gate 403 First gate insulating layer 404 Contact Hole 405 oxide semiconductor layer 407 Oxide semiconductor layer 409 Wiring 410 Wiring 411 Wiring 412 Second gate insulating layer 430 Thin-Film Transistors 431 Thin-film transistors 432 Thin-Film Transistors 433 Thin-film transistors 470 Second Gate 471 Electrode 472 First electrode 473 Insulating layer 474 Second electrode 475 Emitting layer 476 Electrode 581 Thin-film transistor 585 Insulating layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 594 Cavity 595 Filling material

Claims

1. It has first to sixth transistors, The source electrode or drain electrode of the first transistor is always in contact with the gate wire. The source electrode or the other drain electrode of the first transistor is always in contact with the clock signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the gate wire. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the power line. The gate electrode of the third transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the sixth transistor is always in electrical contact with the first wiring. The gate electrode of the sixth transistor is always in electrical contact with the first wiring. When the source or drain of the second transistor is in a conductive state with the gate line through at least the channel forming region of the second transistor, a potential having a value that causes the gate line to be at an L level is input to the gate line through at least the channel forming region of the second transistor. When the source or drain of the fifth transistor is in a conductive state with the gate electrode of the first transistor via at least the channel forming region of the fifth transistor, the potential that turns on the first transistor is input to the gate electrode of the first transistor via at least the channel forming region of the fifth transistor. The first conductive layer, which functions as the gate electrode of the second transistor, is always in electrical contact with the third conductive layer, which functions as the gate electrode of the fourth transistor, via the second conductive layer, which functions as either the source electrode or the drain electrode of the third transistor. The second conductive layer is a semiconductor device having a region in which it overlaps with a fourth conductive layer that functions as the gate electrode of the third transistor, in a region in which the second conductive layer and the semiconductor layer of the third transistor do not overlap.

2. It has first to seventh transistors, The source electrode or drain electrode of the first transistor is always in contact with the gate wire. The source electrode or the other drain electrode of the first transistor is always in contact with the clock signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the gate wire. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the power line. The gate electrode of the third transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the sixth transistor is always in electrical contact with the first wiring. The gate electrode of the sixth transistor is always in electrical contact with the first wiring. The source electrode or drain electrode of the seventh transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the seventh transistor is always in electrical contact with the power line. The gate electrode of the seventh transistor is always in conductivity with the second signal line. When the source or drain of the second transistor is in a conductive state with the gate line through at least the channel forming region of the second transistor, a potential having a value that causes the gate line to be at an L level is input to the gate line through at least the channel forming region of the second transistor. When the source or drain of the fifth transistor is in a conductive state with the gate electrode of the first transistor via at least the channel forming region of the fifth transistor, the potential that turns on the first transistor is input to the gate electrode of the first transistor via at least the channel forming region of the fifth transistor. The first conductive layer, which functions as the gate electrode of the second transistor, is always in electrical contact with the third conductive layer, which functions as the gate electrode of the fourth transistor, via the second conductive layer, which functions as either the source electrode or the drain electrode of the third transistor. The second conductive layer is a semiconductor device having a region in which it overlaps with a fourth conductive layer that functions as the gate electrode of the third transistor, in a region in which the second conductive layer and the semiconductor layer of the third transistor do not overlap.

3. It has first to sixth transistors, The source electrode or drain electrode of the first transistor is always in contact with the gate wire. The source electrode or the other drain electrode of the first transistor is always in contact with the clock signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the gate wire. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the power line. The gate electrode of the third transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the sixth transistor is always in electrical contact with the first wiring. The gate electrode of the sixth transistor is always in electrical contact with the first wiring. When the source or drain of the second transistor is in a conductive state with the gate line through at least the channel forming region of the second transistor, a potential having a value that causes the gate line to be at an L level is input to the gate line through at least the channel forming region of the second transistor. When the source or drain of the fifth transistor is in a conductive state with the gate electrode of the first transistor via at least the channel forming region of the fifth transistor, the potential that turns on the first transistor is input to the gate electrode of the first transistor via at least the channel forming region of the fifth transistor. The first conductive layer, which functions as the gate electrode of the second transistor, is always in electrical contact with the third conductive layer, which functions as the gate electrode of the fourth transistor, via the second conductive layer, which functions as either the source electrode or the drain electrode of the third transistor. The second conductive layer has a region in which it overlaps with a fourth conductive layer that functions as the gate electrode of the third transistor, in a region where the second conductive layer and the semiconductor layer of the third transistor do not overlap. At least one of the first to sixth transistors is a semiconductor device having an oxide semiconductor in its channel formation region.

4. It has first to seventh transistors, The source electrode or drain electrode of the first transistor is always in contact with the gate wire. The source electrode or the other drain electrode of the first transistor is always in contact with the clock signal line. The source electrode or drain electrode of the second transistor is always in electrical contact with the gate wire. Either the source electrode or the drain electrode of the third transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is always in electrical contact with the power line. The gate electrode of the third transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the fourth transistor is always in electrical contact with the power line. The gate electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is always in electrical contact with the gate electrode of the first transistor. The gate electrode of the fifth transistor is always in conductivity with the first signal line. The source electrode or drain electrode of the sixth transistor is always in electrical contact with the gate electrode of the second transistor. The source electrode or the other drain electrode of the sixth transistor is always in electrical contact with the first wiring. The gate electrode of the sixth transistor is always in electrical contact with the first wiring. The source electrode or drain electrode of the seventh transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or the other drain electrode of the seventh transistor is always in electrical contact with the power line. The gate electrode of the seventh transistor is always in conductivity with the second signal line. When the source or drain of the second transistor is in a conductive state with the gate line through at least the channel forming region of the second transistor, a potential having a value that causes the gate line to be at an L level is input to the gate line through at least the channel forming region of the second transistor. When the source or drain of the fifth transistor is in a conductive state with the gate electrode of the first transistor via at least the channel forming region of the fifth transistor, the potential that turns on the first transistor is input to the gate electrode of the first transistor via at least the channel forming region of the fifth transistor. The first conductive layer, which functions as the gate electrode of the second transistor, is always in electrical contact with the third conductive layer, which functions as the gate electrode of the fourth transistor, via the second conductive layer, which functions as either the source electrode or the drain electrode of the third transistor. The second conductive layer has a region in which it overlaps with a fourth conductive layer that functions as the gate electrode of the third transistor, in a region where the second conductive layer and the semiconductor layer of the third transistor do not overlap. At least one of the first to sixth transistors is a semiconductor device having an oxide semiconductor in its channel formation region.

5. In any one of claims 1 to 4, The second conductive layer has a region located above the first conductive layer, The semiconductor device has a region where the second conductive layer is located above the third conductive layer.

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