Photodetectors, X-ray imaging sensors, and electronic equipment

Abstract

The light-receiving element according to one embodiment of the present disclosure comprises: a semiconductor substrate (11) including a photoelectric conversion region; a first first-electroconductivity-type region (13A) that is provided at the interface of a first surface of the semiconductor substrate (11) and that is connected to a first electrode (16); a second first-electroconductivity-type region (13B) that is provided at the periphery of the first first-electroconductivity-type region (13A) at the interface of the first surface and that is connected to a second electrode (17); a third first-electroconductivity-type region (13C) that is provided at the periphery of the second first-electroconductivity-type region (13B) at the interface of the first surface and that assumes an electrically floating state; and an electroconductive film (21) that is provided above the first surface between at least the first first-electroconductivity-type region (13A) and the second first-electroconductivity-type region (13B).

Description

Technical Field

[0001] The present disclosure relates to a light receiving element suitable for X-ray imaging for medical use or non-destructive inspection, an X-ray imaging device including the same, and an electronic device.

Background Art

[0002] Solid imaging devices are used in various applications, such as imaging devices such as digital still cameras and video cameras, electronic devices such as portable terminal devices having an imaging function, or electromagnetic wave sensors that detect various wavelengths other than visible light. Among solid imaging devices, there is an APS (Active Pixel Sensor) provided with an amplification element for each pixel, and signal charges accumulated in a photodiode, which is a photoelectric conversion element, are read out via a MOS (Metal Oxide Semiconductor) transistor. A CMOS (complementary MOS) image sensor (CIS) is widely used.

[0003] In sensors for scientific applications that require highly sensitive measurement, a light receiving element (PIN photodiode) having a structure in which a photoelectric conversion region and a floating diffusion region (Floating Diffusion; FD) are integrated is used (see, for example, Patent Document 1). Such a light receiving element is easy to manufacture from a simple structure. In addition, an arbitrary potential difference can be applied to the pn junction forming the photoelectric conversion region. Therefore, it is easy to increase the thickness of the photoelectric conversion region.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

[0005] ​Incidentally, photodetectors used in X-ray imaging sensors are required to have improved resistance to fluctuations in capacitance and electric field caused by X-ray irradiation.

[0006] A light-receiving element according to one embodiment of the present disclosure includes a semiconductor substrate including a photoelectric conversion region, a first first conductivity type region provided at the interface of a first surface of the semiconductor substrate and connected to a first electrode, a second first conductivity type region provided at the interface of the first surface around the first first conductivity type region and connected to a second electrode, a third first conductivity type region provided at the interface of the first surface around the second first conductivity type region and in an electrically floating state, and a conductive film provided above the first surface between at least the first first conductivity type region and the second first conductivity type region. , embedded and formed within the semiconductor substrate, a second first conductivity region and a second conductivity region facing the third first conductivity region and It is something that is provided.

[0007] A light-receiving element according to one embodiment of the present disclosure comprises a semiconductor substrate including a photoelectric conversion region; a first conductivity type region provided at the interface of a first surface of the semiconductor substrate and connected to a first electrode; a second conductivity type region provided at the interface of the first surface around the first conductivity type region and connected to a second electrode; a third conductivity type region provided at the interface of the first surface around the second conductivity type region and in an electrically floating state; and a conductive film provided above the first surface between at least the first conductivity type region and the second conductivity type region.

[0008] An X-ray imaging sensor according to one embodiment of the present disclosure comprises a plurality of photodetectors according to the above embodiment of the present disclosure, which generate signal charges based on X-rays.

[0009] An electronic device according to one embodiment of the present disclosure is equipped with an X-ray imaging sensor according to the above embodiment of the present disclosure.

[0010] In a photodetector, an X-ray image sensor, and an electronic device according to one embodiment of the present disclosure, a first first conductivity type region connected to a first electrode and a second first conductivity type region connected to a second electrode are provided at the interface of a first surface of a semiconductor substrate including a photoelectric conversion region, and a conductive film is provided above the first surface of the semiconductor substrate, at least between the first first conductivity type region and the second first conductivity type region. This suppresses the generation of fixed charges and interface states near the first surface between the first first conductivity type region and the second first conductivity type region during X-ray irradiation. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic cross-sectional view showing an example of the configuration of a photodetector according to the first embodiment of this disclosure. [Figure 2] Figure 1 is a schematic plan view showing an example of the p-type conductive region and gate electrode pattern of the photodetector. [Figure 3] Figure 1 is a schematic plan view illustrating another example of the pattern of the p-type conductive region of the photodetector shown in Figure 1. [Figure 4] Figure 1 is a schematic plan view illustrating another example of the pattern of the p-type conductive region of the photodetector shown in Figure 1. [Figure 5] Figure 1 is a schematic diagram illustrating an example of power supply connection to the n-type conductive region of the photodetector shown. [Figure 6] Figure 1 is a schematic diagram illustrating another example of power supply connection to the n-type conductive region of the photodetector shown in Figure 1. [Figure 7A] This is a schematic cross-sectional diagram showing another example of the gate electrode configuration of the photodetector shown in Figure 1. [Figure 7B] This is a schematic cross-sectional diagram showing another example of the gate electrode configuration of the photodetector shown in Figure 1. [Figure 7C] This is a schematic cross-sectional diagram showing another example of the gate electrode configuration of the photodetector shown in Figure 1. [Figure 7D] This is a schematic cross-sectional diagram showing another example of the gate electrode configuration of the photodetector shown in Figure 1. [Figure 7E]It is a cross-sectional schematic diagram showing another example of the configuration of the gate electrode of the light-receiving element shown in FIG. 1. [Figure 8] It is a cross-sectional schematic diagram showing another example of the configuration of the gate electrode of the light-receiving element shown in FIG. 1. [Figure 9] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 1 of the present disclosure. [Figure 10] It is a plan schematic diagram showing the pattern of the wiring layer of the light-receiving element shown in FIG. 9. [Figure 11] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 2 of the present disclosure. [Figure 12] It is a plan schematic diagram showing the pattern of the gate electrode and the wiring layer of the light-receiving element shown in FIG. 11. [Figure 13] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 3 of the present disclosure. [Figure 14] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 4 of the present disclosure. [Figure 15] It is a plan schematic diagram showing the pattern of the gate electrode and the wiring layer of the light-receiving element shown in FIG. 14. [Figure 16] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 5 of the present disclosure. [Figure 17] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 6 of the present disclosure. [Figure 18] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to the second embodiment of the present disclosure. [Figure 19] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 7 of the present disclosure. [Figure 20] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to Modification 8 of the present disclosure. [Figure 21] It is a cross-sectional schematic diagram showing an example of the configuration of the light-receiving element according to the third embodiment of the present disclosure. [Figure 22] It is a block diagram showing the configuration of the X-ray imaging device. [Figure 23] It is a block diagram showing a detailed configuration example of the column selection unit shown in FIG. 22. [Modes for carrying out the invention]

[0012] The embodiments described below will be explained in detail with reference to the drawings. The following description is one specific example of the disclosure, and the disclosure is not limited to the following embodiments. Furthermore, the disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc., of each component shown in each drawing. The order of explanation is as follows. 1. First Embodiment (An example of a photodetector in which a gate electrode is provided on a semiconductor substrate between the anode and the drain, and an electric field is applied to the interface of the semiconductor substrate) 1-1. Configuration of the light-receiving element 1-2. Method for manufacturing a light-receiving element 1-3. Action and Effects 2. Variations 2-1. Modification Example 1 (Example of applying an electric field to the interface of a semiconductor substrate using a wiring layer within an insulating layer) 2-2. Modification Example 2 (Example of applying an electric field to the interface of a semiconductor substrate using a gate electrode and wiring layer) 2-3. Variation 3 (Another example of a wiring layer pattern) 2-4. Modification 4 (Another example of a wiring layer pattern) 2-5. Modification 5 (Example where the gate electrode and the wiring layer are short-circuited) 2-6. Modification 6 (Example where the gate electrode, wiring layer, and drain are short-circuited) 3. Second Embodiment (Example of a photodetector having a barrier layer facing the embedded layer on the back side of the semiconductor substrate) 4. Variations 4-1. Modification 7 (Example of connecting the anode and barrier layer) 4-2. Modification 8 (Example of creating regions with different impurity concentrations within the barrier layer) 5. Third Embodiment (Example of a photodetector having a conductive film that applies an electric field to the interface of a semiconductor substrate and a barrier layer facing the embedded layer) 6. Application Examples

[0013] <1. First Embodiment> Figure 1 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 1) according to the first embodiment of this disclosure. The photodetector 1 is, for example, a PIN (Positive Intrinsic Negative) type photodiode that applies a reverse bias between the front and back surfaces of a semiconductor substrate 11. For example, it constitutes a single pixel (unit pixel P) in a radiation image sensor (e.g., X-ray image sensor 100; see Figure 22) or an electromagnetic wave detection device that reads information about a subject based on radiation (e.g., alpha rays, beta rays, gamma rays, and X-rays, etc.) to image the subject.

[0014] (1-1. Configuration of the photodetector) The photodetector 1 has, for example, a p-type conductivity region (first conductivity region) 13 partially formed at the interface of the surface S1 (first surface) of an n-type semiconductor substrate 11, and an n-type conductivity layer (second conductivity layer) 12 formed at the interface of the surface opposite to the surface S1 (back surface S2; second surface). The p-type conductivity region 13 consists of multiple regions, and the photodetector 1 has, for example, a region constituting the anode 13A (first first conductivity region), a region constituting the drain 13B (second first conductivity region), and a region constituting the guard ring 13C (third first conductivity region). The photodetector 1 also has an n-type conductivity region (second conductivity region) formed as an embedded layer 14 inside the semiconductor substrate 11. The light-receiving element 1 of this embodiment further has an insulating layer 15 on the surface S1 of the semiconductor substrate 11, and has a gate electrode 21 within the insulating layer 15 between the anode 13A and the drain 13B that applies an electric field to the interface S1 of the surface of the semiconductor substrate 11 between the anode 13A and the drain 13B, or reduces the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B.

[0015] In this embodiment, we will describe the case in which the holes among the excitons (electron-hole pairs) generated by photoelectric conversion are read out as the signal charge. Also, in the figure, the "-" (minus) attached to "p" and "n" indicates a low concentration of p-type or n-type impurities, and the "+" (plus) indicates a high concentration of p-type or n-type impurities. The relative magnitudes of the p-type and n-type impurities are as follows: - <p<p + ,n - <n<n + That is the case.

[0016] The semiconductor substrate 11 is composed of, for example, an n-type, p-type, or i-type (intrinsic semiconductor) semiconductor and has a pn junction or pin junction that serves as a photoelectric conversion region inside. Specifically, in this embodiment, an n-type semiconductor substrate is used as the semiconductor substrate 11, and a p-type conductivity region (first conductivity region) 13 is formed at the interface of the surface S1 as described above. The film thickness (hereinafter simply referred to as thickness) of the semiconductor substrate 11 in the stacking direction (Y-axis direction) is, for example, 10 μm or more and 700 μm or less.

[0017] The p-type conductive region 13 is a region containing p-type impurities (p-type impurity region), and multiple p-type conductive regions are formed at the interface of the surface S1 of the semiconductor substrate 11. Specifically, the p-type conductive region 13 has three regions: a region constituting the anode 13A, a region constituting the drain 13B, and a region constituting the guard ring 13C. Each region is spaced apart from the others, and the drain 13B is formed in a ring shape around the anode 13A. The guard ring 13C is formed in a ring shape around the drain 13B. The thickness of the p-type conductive region 13 depends on the configuration of the unit pixel P, but for example, when the pitch of the unit pixel P is 10 μm or more and 100 μm or less, it is formed with a thickness of, for example, 2 μm to 3 μm from the interface of the surface S1 of the semiconductor substrate 11.

[0018] Anode 13A is to which a voltage is applied for reading out, for example, holes (h+) as signal charges from the carriers generated by photoelectric conversion, and is connected to electrode 16 (first electrode), for example. Anode 13A is individually formed, for example, approximately in the center of unit pixel P. The planar shape of anode 13A is not particularly limited and may be circular (see, for example, Figure 2) or polygonal. Anode 13A, for example, protrudes partly from the bottom surface of the embedded layer 14, which will be described later, towards the back surface S2. The size of anode 13A depends on the size of unit pixel P, but for example, when the pitch of unit pixel P is 10 μm or more and 100 μm or less, it is 0.1 μm or more and 10 μm or less.

[0019] Drain 13B is to which a voltage is applied to discharge the dark current generated at the interface of surface S1 when light is irradiated onto the semiconductor substrate 11, and is connected, for example, to electrode 17 (second electrode). Drain 13B is formed in a ring shape around anode 13A, so that the dark current generated at the interface of surface S1 when light is irradiated onto the semiconductor substrate 11 is constantly discharged from drain 13B. This prevents the dark current from flowing into anode 13A. The planar shape of drain 13B is not particularly limited and may be annular or polygonal (see, for example, Figure 2).

[0020] The guard ring 13C is designed to mitigate electric field concentration at the drain 13B and simultaneously generate a horizontal electric field to assist in the transport of signal charges (holes) in the horizontal direction (e.g., the XY plane). The guard ring 13C is formed in a ring shape around the drain 13B, surrounding the anode 13A and the drain 13B. Unlike the anode 13A and the drain 13B, the guard ring 13C is electrically floating. Multiple guard rings 13C are formed, for example, at the interface of the surface S1 of the semiconductor substrate 11. Specifically, as shown in Figures 1 and 2, the guard ring 13C consists of, for example, three p-type conductivity regions and is formed in a triple layer (guard rings 13C1, 13C2, 13C3) around the drain 13B. By providing multiple guard rings 13C in this way, electric field concentration can be dispersed to multiple locations while simultaneously generating a horizontal electric field over a wide area.

[0021] When the drain 13B and guard ring 13C are polygonal (for example, rectangular), it is preferable to form the corners in a curved shape as shown in Figure 2. This reduces the concentration of the electric field at the corners. In addition, although Figure 2 shows an example in which the drain 13B and guard ring 13C are continuously provided around the anode 13A, the arrangement is not limited to this. For example, they may be partially cut as shown in Figure 3, or they may be formed intermittently.

[0022] The line width of the rings constituting the drain 13B and guard ring 13C is, for example, 0.100 μm or more and 10 μm or less. The distance between the drain 13B and the guard ring 13C is, for example, 0.100 μm or more and 10 μm or less. However, the distance between the drain 13B and the guard ring 13C, and the line widths of the drain 13B and the guard ring 13C do not necessarily have to be constant. For example, if the drain 13B and the multiple guard rings 13C are polygonal in shape (for example, rectangular), as shown in Figure 4, the distance between the drain 13B and the guard ring 13C and each of the guard rings 13C1, 13C2, and 13C3 may be formed so that the corners (Wb) are wider than the straight sections (Wa). This further reduces the concentration of the electric field at the corners.

[0023] The n-type conductive layer 12 is a region containing n-type impurities at a higher concentration than the n-type semiconductor substrate 11 (the n-type impurity region), and is formed at the interface of the back surface S2 of the semiconductor substrate 11. The n-type conductive layer 12 is connected to, for example, a power supply VDD (see Figure 5), and when, for example, holes among the carriers generated by photoelectric conversion are read out as signal charges through the anode 13A, electrons (e-) are discharged through this n-type conductive layer 12. The thickness of the n-type conductive layer 12 depends on the configuration of the unit pixel P, but for example, when the pitch of the unit pixel P is 10 μm or more and 100 μm or less, it is formed with a thickness of, for example, 1 μm from the interface of the back surface S2 of the semiconductor substrate 11.

[0024] Figures 5 and 6 each illustrate an example of how to connect a power supply to the n-type conductive layer 12. Figure 5 shows an example in which a transparent electrode 18 is formed on the n-type conductive layer 12, and a power supply VDD is connected to it to apply a voltage from the back surface S2 side of the semiconductor substrate 11. Figure 6 shows an example in which a neutral region 11N is formed outside the depletion region 11D formed on the semiconductor substrate 11 in the peripheral region 110B around a pixel region 110A in which a plurality of unit pixels P are arranged, for example in a matrix, and a voltage is applied through this neutral region 11N via an n-type conductive region 19 provided at the interface of the surface S1 of the semiconductor substrate 11. In this case, as shown in Figure 6, it is preferable to form a plurality of high-voltage guard rings 13D between the unit pixels P formed in the pixel region 110A and the n-type conductive region 19 at the interface of the surface S1 of the semiconductor substrate 11 in the peripheral region 110B. Of the multiple high-voltage guard rings 13D, it is preferable that the high-voltage guard ring positioned closest to the pixel area 110A is connected to ground GND.

[0025] The embedded layer 14 is designed to prevent carriers (in this case, signal charges (holes)) generated in the semiconductor substrate 11 by photoelectric conversion from being transferred to the drain 13B and guard ring 13C. The embedded layer 14 is an n-type conductivity region containing a higher concentration of n-type impurities than the n-type semiconductor substrate 11, and is embedded inside the semiconductor substrate 11, specifically near the p-type conductivity region 13. More specifically, the embedded layer 14 is provided in the region of the p-type conductivity region 13 corresponding to the drain 13B and guard ring 13C, and has an opening in the region facing the anode 13A. This allows signal charges (holes) generated in the semiconductor substrate 11 to be efficiently read out from the anode 13A. The embedded layer 14 is formed so as not to be in direct contact with the drain 13B and guard ring 13C. The thickness of the embedded layer 14 varies depending on the magnitude of the reverse bias voltage applied between the front surface S1 and back surface S2 of the semiconductor substrate 11, but is, for example, between 0.100 μm and 10 μm.

[0026] The insulating layer 15 is formed on the surface S1 of the semiconductor substrate 11. The insulating layer 15 is formed, for example, with a gate insulating film 15A and an interlayer insulating film 15B formed in this order from the semiconductor substrate 11 side, and the gate electrode 21 is provided on the gate insulating film 15A (see, for example, Figure 7A). The insulating layer 15, consisting of the gate insulating film 15A and the interlayer insulating film 15B, is formed using an inorganic insulating material. Examples of inorganic insulating materials include silicon oxide (SiO2), silicon nitride (SiN), aluminum oxide (Al2O3), and hafnium oxide (HfO2). The insulating layer 15 is formed containing at least one of these materials.

[0027] As described above, the gate electrode 21 is for applying an electric field to the interface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B. Specifically, it applies an electric field in a direction that moves holes generated near the interface S1 of the semiconductor substrate 11 away from the semiconductor substrate 11. More specifically, a negative voltage (-) is applied to the gate electrode 21 relative to the potential of the semiconductor substrate 11, thereby applying an electric field of, for example, 0.5 MV / cm or more to the interface S1 of the semiconductor substrate 11. The gate electrode 21 is also for reducing the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B. This reduces the increase in positive fixed charge generated near the interface of the insulating layer 15 with the surface S1 of the semiconductor substrate 11 due to X-ray irradiation, and the increase in the interface state of the surface S1 of the semiconductor substrate 11.

[0028] Furthermore, the gate electrode 21, as described above, applies an electric field to the interface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B and / or reduces the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B, and does not necessarily involve gate operation. For convenience, it is referred to as the "gate electrode" in this specification.

[0029] The gate electrode 21 is provided between the anode 13A and the drain 13B via a gate insulating film 15A, so as shown in Figure 2, for example, that it surrounds the anode 13A in a plan view. The gate electrode 21 can be formed using, for example, polysilicon (poly-Si). The polysilicon constituting this gate electrode 21 may be an intrinsic semiconductor free of impurities, or an impurity semiconductor containing n-type or p-type impurities. In addition, the polysilicon constituting the gate electrode 21 may have, for example, multiple semiconductor regions with different impurity concentrations. Specifically, the polysilicon may have a first region 21A that is free of impurities or contains almost no impurities, and a second region 21B with a higher impurity concentration than the first region 21A. The first region 21A and the second region 21B are formed, for example, as follows.

[0030] For example, as shown in Figure 7A, the first region 21A may be formed on the anode 13A side, and, for example, the n-type second region 21B may be formed on the drain 13B side. This reduces the electric field between the anode 13A, which may become a dark current source, and the gate electrode 21 end on the anode 13A side, and also reduces the degradation of the breakdown voltage of the insulating film (gate insulating film 15A) in that part.

[0031] Furthermore, as shown in Figure 7B, the first region 21A may extend from the side facing the anode 13A downwards from the n-type second region 21B (between the second region 21B and the gate insulating film 15A). Alternatively, for example, as shown in Figure 7C, the first region 21A and the n-type second region 21B may be stacked in this order from the gate insulating film 15A side. By providing the first region 21A between the gate insulating film 15A and the second region 21B in this way, the electric field across the entire area below the gate electrode 21 is mitigated, and the degradation of the breakdown voltage of the gate insulating film 15A is further reduced.

[0032] Furthermore, as shown in Figure 7D, for example, a first region 21A may also be provided on the drain 13B side. This reduces the electric field between the drain 13B and the end of the gate electrode 21 on the drain 13B side. Moreover, as shown in Figure 7E, for example, the entire polysilicon may be designated as the first region 21A, and an n-type second region 21B may be locally provided only at the contact portion with the wiring. This further reduces the electric field across the entire area below the gate electrode 21.

[0033] Furthermore, the impurities included in the second region 21B are not limited to n-type impurities; the second region 21B may be a p-type impurity region in which p-type impurities are introduced into polysilicon, as shown in Figure 8. By using p-type impurities in this way, the electric field below the gate electrode 21 is further relaxed compared to the case where n-type impurities are used, and the generation of dark current and the degradation of the breakdown voltage of the gate insulating film 15A can be further reduced.

[0034] Although not shown in the diagram, the substrate is placed on the insulating layer 15, with, for example, the electrodes 16 and 17 and logic circuits formed on it.

[0035] (1-2. Method for manufacturing photodetectors) The light-receiving element 1 can be manufactured, for example, as follows. First, an n-type conductive layer 12 is formed on the back surface S2 of the semiconductor substrate 11 using ion implantation technology. Next, a mask is formed in a predetermined area on the surface S1 of the semiconductor substrate 11, and then an n-type conductive region (embedded layer 14) is formed by doping with an n-type impurity (e.g., phosphorus (P)) using ion implantation technology. Next, a mask is formed in a predetermined area on the surface S1 of the semiconductor substrate 11, and then a p-type conductive region (anode 13A, drain 13B, and guard ring 13C) is formed by doping with a p-type impurity (e.g., boron (B)) using ion implantation technology. Subsequently, a chemical vapor deposition (CVD) is applied to the surface S1 of the semiconductor substrate 11. A gate insulating film 15A is formed using the CVD method. Next, a polysilicon film is deposited on the gate insulating film 15A, for example, using the CVD method, and then the polysilicon film is patterned using, for example, the photolithography method to form a gate electrode 21 between the anode 13A and the drain 13B. Subsequently, a first region 21A and a second region 21B are appropriately formed on the gate electrode 21 using ion implantation technology. Finally, an interlayer insulating film 15B is deposited using, for example, the CVD method to form an insulating layer 15. This completes the photodetector 1 shown in Figure 1.

[0036] (1-3. Action / Effect) In the photodetector 1 of this embodiment, an anode 13A connected to electrode 16 and a drain 13B connected to electrode 17 are provided at the interface of the surface S1 of the semiconductor substrate 11 including the photoelectric conversion region. Furthermore, a gate electrode 21 is provided on the surface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B via a gate insulating film 15A. This suppresses the generation of interface states and fixed charges on the surface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B during X-ray irradiation. This will be explained below.

[0037] As mentioned above, solid-state imaging devices are used in a variety of applications, such as imaging devices in digital still cameras and video cameras, electronic devices such as mobile terminals with imaging capabilities, and electromagnetic wave sensors that detect various wavelengths other than visible light. CMOS image sensors, which read out the signal charge accumulated in a photodiode (a photoelectric conversion element) via a MOS transistor, are widely used in these solid-state imaging devices.

[0038] A unit pixel of a CMOS image sensor comprises, for example, a photodiode (PD) with a HAD (Hole Accumulated Diode) structure within a semiconductor substrate, and a floating diffusion region (FD) positioned on either side of the transfer gate relative to the photodiode. In addition to these, the unit pixel also includes, for example, a reset transistor, a select transistor, and an amplifier transistor.

[0039] Another configuration of the unit pixel in a CMOS image sensor is one in which the photoelectric conversion region and FD are integrated within the semiconductor substrate, without a HAD. This structure is simple and easy to manufacture, and allows for the application of any potential difference to the pn junction forming the photoelectric conversion region. Therefore, it is easy to increase the thickness of the photoelectric conversion region, and this advantage has led to its widespread use in sensors for scientific applications requiring high-sensitivity measurement.

[0040] Incidentally, in CMOS image sensors that lack a HAD and have a structure in which the photoelectric conversion region and FD are integrated within the semiconductor substrate, the surface of the semiconductor substrate is in contact with the depletion layer. Therefore, when irradiated with strong radiation such as X-rays, for example, fixed charges are generated on the insulating film and its interface on the semiconductor substrate, causing large fluctuations in capacitance and electric field. For this reason, there has been a need to improve resistance to high-energy input.

[0041] In contrast, in this embodiment, the gate electrode 21 is provided on the surface S1 of the semiconductor substrate 11 via a gate insulating film 15A between the anode 13A and the drain 13B, which are located at the interface of the surface S1 of the semiconductor substrate 11. As a result, the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B is reduced, and the amount of electron-hole pairs generated near the interface of the insulating layer 15 with the surface S1 of the semiconductor substrate 11 by X-ray irradiation is reduced. Furthermore, when a voltage, for example, negative (-) is applied to the gate electrode 21 and an electric field is applied to the interface of the surface S1 of the semiconductor substrate 11, the charge (e.g., holes) generated in the insulating layer (insulating layer 15) near the interface of the insulating layer 15 with the surface S1 of the semiconductor substrate 11 by X-ray irradiation is discharged.

[0042] As described above, in the photodetector 1 of this embodiment, the gate electrode 21 is provided on the surface S1 of the semiconductor substrate 11 via a gate insulating film 15A between the anode 13A and the drain 13B, which are located at the interface of the surface S1 of the semiconductor substrate 11. This reduces the increase in positive fixed charge generated at the interface of the surface S1 of the semiconductor substrate 11 when irradiated with X-rays. Therefore, it is possible to reduce fluctuations in the capacitance of the anode and the electric field at the interface of the surface S1 of the semiconductor substrate 11. In addition, the generation of interface states at the surface S1 of the semiconductor substrate 11 is suppressed. Therefore, it is possible to reduce the generation of dark current. In other words, it is possible to realize a photodetector with high resistance to fluctuations in capacitance and electric field due to X-ray irradiation.

[0043] Furthermore, in the photodetector 1 of this embodiment, the gate electrode 21 is formed using polysilicon, and a first region 21A containing no or very few impurities and a semiconductor region 22B with a higher impurity concentration than the first region 21A are provided within the polysilicon. Specifically, the first region 21A is formed near the anode 13A and on the gate insulating film 15A side, and the semiconductor region 22B is partially provided. This reduces the increase in dark current due to the electric field below the gate electrode 21 becoming too strong, and the degradation of the breakdown voltage of the gate insulating film 15A. In other words, it is possible to improve resistance to X-rays while reducing the generation of dark current and improving the breakdown voltage of the insulating film.

[0044] Next, the second and third embodiments, variations 1 to 8, and application examples will be described. In the following, components similar to those in the first embodiment will be denoted by the same reference numerals, and their descriptions will be omitted as appropriate.

[0045] <2. Variant> (2-1. Variation 1) Figure 9 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 1A) according to Modification 1 of the present disclosure. Similar to the first embodiment described above, the photodetector 1A consists of a PIN-type photodiode that applies a reverse bias between the front and back surfaces of a semiconductor substrate 11, and constitutes one pixel (unit pixel P) in a radiation image sensor (e.g., X-ray image sensor 100) or electromagnetic wave detection device that reads information about an object based on radiation (e.g., alpha rays, beta rays, gamma rays, and X-rays, etc.) to capture an image of the object. The photodetector 1A of this modification differs from the first embodiment in that, instead of a gate electrode 21, a wiring layer 22 formed in the interlayer insulating film 15B is used to apply an electric field to the interface of the surface S1 of the semiconductor substrate 11, or the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B is reduced.

[0046] As described above, the wiring layer 22 is for applying an electric field to the interface of the surface S1 of the semiconductor substrate 11. For example, by applying a negative voltage (-) relative to the potential of the semiconductor substrate 11 to the wiring layer 22, an electric field of, for example, 0.5 MV / cm or more is applied to the interface of the surface S1 of the semiconductor substrate 11. The wiring layer 22 is also for reducing the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B. The wiring layer 22 is provided within the interlayer insulating film 15B and extends, for example, from between the anode 13A and the drain 13B to a part of the guard ring 13C, as shown in Figure 10. The wiring layer 22 is formed using a metallic material such as aluminum (Al), copper (Cu), or tungsten (W).

[0047] In this modified example, an electric field is applied to the interface S1 of the semiconductor substrate 11 using a wiring layer 22 provided within the interlayer insulating film 15B, for example, extending from between the anode 13A and the drain 13B to a part of the guard ring 13C, or the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B is reduced. As a result, similar to the first embodiment, the increase in positive fixed charge generated at the interface of the semiconductor substrate 11 surface S1 when irradiated with X-rays is reduced. Therefore, it is possible to reduce fluctuations in the capacitance of the anode and the electric field at the interface of the semiconductor substrate 11 surface S1. In other words, it is possible to realize a photodetector with high resistance to fluctuations in capacitance and electric field due to X-ray irradiation.

[0048] (2-2. Variation 2) Figure 11 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 1B) according to Modification 2 of this disclosure. Figure 12 schematically shows the planar pattern of the wiring layer 22 shown in Figure 11. In Modification 1 described above, instead of the gate electrode 21, an example is shown in which an electric field is applied to the surface S1 interface of the semiconductor substrate 11 using a wiring layer 22 that extends from between the anode 13A and the drain 13B to a part of the guard ring 13C, or in which the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B is reduced. However, a configuration combining the first embodiment and Modification 1 described above may also be used.

[0049] That is, an electric field may be applied to the interface of the surface S1 of the semiconductor substrate 11 using a gate electrode 21 provided on the surface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B via a gate insulating film 15A, and a wiring layer 22 provided in the interlayer insulating film 15B that extends from between the anode 13A and the drain 13B to a part of the guard ring 13C, or the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B may be reduced. In this case as well, similar to the first embodiment described above, the increase in positive fixed charge generated at the interface of the surface S1 of the semiconductor substrate 11 when irradiated with X-rays is reduced. Therefore, it is possible to reduce fluctuations in the electric field at the interface of the surface S1 of the semiconductor substrate 11. That is, it is possible to realize a photodetector with high resistance to fluctuations in capacitance and electric field due to X-ray irradiation.

[0050] (2-3. Variation 3) Figure 13 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 1C) according to Modification 3 of this disclosure. In Modification 1 and Modification 2 described above, an example was shown in which the wiring layer 22 was made by using wiring that covers a part of the guard ring 13C from between the anode 13A and the drain 13B, but the pattern of the wiring layer 22 is not limited to this.

[0051] For example, as shown in Figure 13, a wiring layer may be provided that covers all guard rings 13C from between the anode 13A and drain 13B, in other words, a wiring layer that extends continuously between adjacent unit pixels P except above the anode 13A, and this may be used as the wiring layer 22. In this case as well, similar to the first embodiment described above, the increase in positive fixed charge generated at the interface of the surface S1 of the semiconductor substrate 11 when irradiated with X-rays is reduced. Therefore, it is possible to reduce fluctuations in the electric field at the interface of the surface S1 of the semiconductor substrate 11. That is, it is possible to realize a photodetector with high resistance to fluctuations in capacitance and electric field due to X-ray irradiation.

[0052] (2-4. Modification 4) Figure 14 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 1D) according to Modification 4 of this disclosure. Figure 15 schematically shows the planar pattern of the wiring layer 22 shown in Figure 14. In Modification 2 described above, an example was shown in which a wiring layer extending continuously and uniformly between adjacent unit pixels P, except above the anode 13A, was used as the wiring layer 22. However, this wiring layer may be patterned in a grid shape, for example, as shown in Figure 15.

[0053] (2-5. Modification 5) Figure 16 shows an example of the cross-sectional configuration of a light-receiving element (light-receiving element 1E) according to Modification 5 of this disclosure. As shown in Figure 16, the gate electrode 21 and the wiring layer 22 may be short-circuited. This makes it possible to reduce the number of wires and terminals extending in the Z-axis direction within the insulating layer 15.

[0054] (2-6. Variation 6) Figure 17 shows an example of the cross-sectional configuration of a photodetector (photodetector 1F) according to Modification 6 of this disclosure. As shown in Figure 17, the drain 13B may be short-circuited together with the gate electrode 21 and the wiring layer 22. This makes it possible to further reduce the number of wirings and terminals extending in the Z-axis direction within the insulating layer 15.

[0055] <3. Second Embodiment> Figure 18 schematically shows an example of a cross-sectional configuration of a light-receiving element (light-receiving element 2) according to the second embodiment of this disclosure. Similar to the first embodiment described above, the light-receiving element 2 consists of, for example, a PIN-type photodiode that applies a reverse bias between the front and back surfaces of a semiconductor substrate 11, and constitutes one pixel (unit pixel P) in a radiation image sensor (e.g., X-ray image sensor 100) or electromagnetic wave detection device that reads information about a subject based on radiation (e.g., alpha rays, beta rays, gamma rays, and X-rays, etc.) to capture an image of the subject.

[0056] In the photodetector 2, for example, a p-type conductive region 13 is partially formed at the interface of the surface S1 of an n-type semiconductor substrate 11, and an n-type conductive layer 12 is formed at the interface of the surface opposite to the surface S1 (back surface S2). The p-type conductive region 13 is composed of multiple regions, and the photodetector 2 has, for example, a region constituting the anode 13A, a region constituting the drain 13B, and a region constituting the guard ring 13C. The photodetector 2 further has an n-type conductive region formed as an embedded layer 14 inside the semiconductor substrate 11. In this embodiment, the photodetector 2 further has a barrier layer 23 formed at a position opposite to the embedded layer 14 inside the semiconductor substrate 11 on the side opposite to the p-type conductive region 13.

[0057] The barrier layer 23 prevents carriers (in this case, signal charges (holes)) generated in the semiconductor substrate 11 by photoelectric conversion from being transferred to the drain 13B and guard ring 13C. The barrier layer 23 also prevents carriers generated in the semiconductor substrate 11 by photoelectric conversion from disappearing from the guard ring 13C to the drain 13B. As described above, the barrier layer 23 is a p-type conductivity region (a fourth first conductivity region) located in the semiconductor substrate 11 opposite the embedded layer 14 on the side opposite to the p-type conductivity region 13. The impurity concentration (e.g., B (boron)) in this p-type conductivity region is lower than the impurity concentration in the p-type conductivity region forming the anode 13A, drain 13B, and guard ring 13C, for example, 1e10cm², so that it becomes depleted. -2 ~1e12cm -2 The concentration is at a very low level.

[0058] In the photodetector 1, etc., a embedding layer 14 is formed near the p-type conductivity region 13 inside the semiconductor substrate 11. Similar to the barrier layer 23 in this embodiment, this embedding layer 14 prevents carriers (signal charges (holes)) generated in the semiconductor substrate 11 by photoelectric conversion from being transferred to the drain 13B or guard ring 13C. The embedding layer 14 is an n-type conductivity region containing a higher concentration of n-type impurities than the n-type semiconductor substrate 11, and is a potential barrier due to the concentration difference between the n-type impurity concentration of the semiconductor substrate 11 and the n-type impurity concentration of the embedding layer 14. For this reason, if there is variation in the impurity concentration of the semiconductor substrate 11, the desired effect may not be obtained. The potential barrier by the embedding layer 14 can be strengthened by increasing the impurity concentration of the n-type conductivity region constituting the embedding layer 14, but in that case, the potential of the embedding layer 14 and the surface S1 of the semiconductor substrate 11 will increase, and the breakdown voltage of the surface S1 of the semiconductor substrate 11 will decrease.

[0059] In contrast, in the photodetector 2 of this embodiment, a barrier layer 23 consisting of a p-type conductive region is provided at a position opposite to the embedded layer 14 inside the semiconductor substrate 11, on the side opposite to the p-type conductive region 13. This strengthens the potential barrier against carriers (in this case, signal charges (holes)) generated in the semiconductor substrate 11 by photoelectric conversion, making it possible to further prevent signal charges (holes) from being transferred to the drain 13B and guard ring 13C. Therefore, it is possible to further improve the transfer efficiency of signal charges (holes) generated in the semiconductor substrate 11.

[0060] Furthermore, in this embodiment, since the barrier layer 23 is a low-concentration p-type conductive region that can be depleted, the formation of an electric field in the horizontal direction (for example, in the XY plane) is not inhibited. Therefore, a decrease in the transfer efficiency of signal charges (holes) can be prevented, and the occurrence of color mixing between adjacent unit pixels P can be suppressed. In addition, it is possible to prevent deterioration of the signal-to-noise ratio due to a decrease in conversion efficiency caused by an increase in the capacitance of the anode 13A.

[0061] <4. Variation> (4-1. Variation 7) Figure 19 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 2A) according to Modification 7 of the present disclosure. Similar to the first embodiment, the photodetector 2A consists of a PIN-type photodiode that applies a reverse bias between the front and back surfaces of a semiconductor substrate 11, and constitutes one pixel (unit pixel P) in a radiation image sensor (e.g., X-ray image sensor 100) or electromagnetic wave detection device that reads information about a subject (images of a subject) based on radiation (e.g., alpha rays, beta rays, gamma rays, and X-rays, etc.). The photodetector 2A of this modification differs from the second embodiment in that the barrier layer 23 is formed to extend over the entire unit pixel P and is further connected to the anode 13A.

[0062] In this modified example, a barrier layer 23 is formed over the entire unit pixel P, and the barrier layer 23 is connected to the anode 13A. Compared to the effects of the second embodiment described above, it is possible to further prevent signal charges (holes) from being transferred to the drain 13B and guard ring 13C.

[0063] (4-2. Variation 8) Figure 20 schematically shows an example of the cross-sectional configuration of a photodetector (photodetector 2B) according to Modification 8 of the present disclosure. The barrier layer 23 extending over the entire unit pixel P may further have p-type impurity regions with different impurity concentrations within its plane. Specifically, a p-type semiconductor region having a higher impurity concentration than other regions may be formed at the connection point with the anode 13A and its surroundings. This promotes the formation of an electric field in the horizontal direction (e.g., the XY plane direction), thereby improving the efficiency of signal charge (hole) transfer to the anode 13A.

[0064] <5. Third Embodiment> Figure 21 schematically shows an example of a cross-sectional configuration of a light-receiving element (light-receiving element 3) according to the third embodiment of this disclosure. Similar to the first embodiment described above, the light-receiving element 3 consists of, for example, a PIN-type photodiode that applies a reverse bias between the front and back surfaces of a semiconductor substrate 11, and constitutes one pixel (unit pixel P) in a radiation image sensor (e.g., X-ray image sensor 100) or electromagnetic wave detection device that reads information about a subject (images of a subject) based on radiation (e.g., alpha rays, beta rays, gamma rays, and X-rays, etc.).

[0065] The light-receiving element 3 of this embodiment combines the technology of the first embodiment and the technology of the second embodiment. Specifically, the light-receiving element 3 has a gate electrode 21 and a wiring layer 22 provided in the insulating layer 15 between the anode 13A and the drain 13B, which apply an electric field to the interface S1 of the semiconductor substrate 11 between the anode 13A and the drain 13B, or which reduces the volume of the insulating layer 15 provided on the semiconductor substrate 11 between the anode 13A and the drain 13B, and a barrier layer 23 facing the embedded layer 14 provided inside the semiconductor substrate 11 on the side opposite to the p-type conductive region 13.

[0066] As a result, the photodetector 3 of this embodiment can improve resistance to fluctuations in capacitance and electric field caused by X-ray irradiation, while also improving the transfer efficiency of signal charges (holes) generated within the semiconductor substrate 11.

[0067] <6. Application Examples> Figure 22 shows the functional configuration of an X-ray image sensor 100 as an example of an electronic device using a photodetector (for example, photodetector 1) as described in the first to third embodiments and modifications 1 to 8 above. The X-ray image sensor 100 reads information about a subject (images the subject) based on incident radiation Rrad (for example, alpha rays, beta rays, gamma rays, X-rays, etc.). This X-ray image sensor 100 includes a pixel section (pixel area 110A), and the drive circuit (peripheral circuit section) for this pixel area 110A includes a row scanning section 121, an A / D conversion section 122, a column scanning section 123, and a system control section 124.

[0068] (Pixel area 110A) The pixel region 110A is equipped with multiple unit pixels (imaging pixels) P that generate signal charges based on radiation. The multiple unit pixels P are arranged in a matrix in two dimensions. As shown in Figure 1, the horizontal direction (row direction) within the pixel region 110A is defined as the "H" direction, and the vertical direction (column direction) is defined as the "V" direction.

[0069] (Row scanning unit 121) The row scanning unit 121 is configured to include a shift register circuit and predetermined logic circuits, as described later, and is a pixel driving unit (row scanning circuit) that drives multiple unit pixels P within the pixel area 110A in row units (horizontal line units) (line sequential scanning). Specifically, the row scanning unit 121 performs imaging operations such as readout and reset operations of each unit pixel P by line sequential scanning, for example. Line sequential scanning is performed by supplying the aforementioned row scanning signal to each unit pixel P via the readout control line Lread.

[0070] (A / D conversion unit 122) The A / D conversion unit 122 has multiple column selection units 125, one for each of the multiple (four in this case) signal lines Lsig, and performs A / D conversion (analog-to-digital conversion) based on the signal voltage (voltage corresponding to the signal charge) input via the signal line Lsig. As a result, output data Dout (imaging signal) consisting of digital signals is generated and output to the outside.

[0071] Each column selection unit 125 includes, for example, a charge amplifier 172, a capacitive element (such as a capacitor or feedback capacitance element) C1, a switch SW1, a sample-and-hold (S / H) circuit 173, a multiplexer circuit (selection circuit) 174 including four switches SW2, and an A / D converter 175, as shown in Figure 23. Of these, the charge amplifier 172, capacitive element C1, switch SW1, S / H circuit 173, and switch SW2 are provided for each signal line Lsig. The multiplexer circuit 174 and A / D converter 175 are provided for each column selection unit 125. Note that the charge amplifier 172, capacitive element C1, and switch SW1 constitute the charge amplifier circuit.

[0072] The charge amplifier 172 is an amplifier that converts the signal charge read from the signal line Lsig into a voltage (QV conversion). In this charge amplifier 172, one end of the signal line Lsig is connected to the negative (-) input terminal, and a predetermined reset voltage Vrst is input to the positive (+) input terminal. The output terminal and the negative input terminal of the charge amplifier 172 are connected via a parallel connection circuit of a capacitive element C1 and a switch SW1, which is a feedback connection. That is, one terminal of the capacitive element C1 is connected to the negative input terminal of the charge amplifier 172, and the other terminal is connected to the output terminal of the charge amplifier 172. Similarly, one terminal of the switch SW1 is connected to the negative input terminal of the charge amplifier 172, and the other terminal is connected to the output terminal of the charge amplifier 172. The on / off state of this switch SW1 is controlled by a control signal (ampretrieval control signal) supplied from the system control unit 124 via the ampretrieval control line Lcarst.

[0073] The S / H circuit 173 is located between the charge amplifier 172 and the multiplexer circuit 174 (switch SW2), and is a circuit for temporarily holding the output voltage Vca from the charge amplifier 172.

[0074] The multiplexer circuit 174 is a circuit that selectively connects or disconnects each S / H circuit 173 and the A / D converter 175 by sequentially turning on one of the four switches SW2 in accordance with the scanning drive by the column scanning unit 123.

[0075] The A / D converter 175 is a circuit that generates and outputs the output data Dout described above by performing A / D conversion on the output voltage from the S / H circuit 173, which is input via switch SW2.

[0076] (Column scanning unit 123) The column scanning unit 123 is configured to include, for example, a shift register and an address decoder (not shown), and sequentially drives each switch SW2 in the column selection unit 125 while scanning them. Through this selective scanning by the column scanning unit 123, the signals of each unit pixel P (the output data Dout) read out via each of the signal lines Lsig are sequentially output to the outside.

[0077] (System Control Unit 124) The system control unit 124 controls the operation of the row scanning unit 121, the A / D conversion unit 122, and the column scanning unit 123. Specifically, the system control unit 124 has a timing generator that generates the various timing signals (control signals) mentioned above, and controls the drive of the row scanning unit 121, the A / D conversion unit 122, and the column scanning unit 123 based on the various timing signals generated by this timing generator. Based on the control of the system control unit 124, the row scanning unit 121, the A / D conversion unit 122, and the column scanning unit 123 each perform imaging drive (linear sequential imaging drive) for multiple unit pixels P within the pixel area 110A, thereby obtaining output data Dout from the pixel area 110A.

[0078] The first to third embodiments, modifications 1 to 8, and application examples have been described above. However, the contents of this disclosure are not limited to the above embodiments, and various modifications are possible. For example, the above embodiments show examples in which holes are used as signal charges, but electrons may be used as signal charges. In that case, the conductivity types of each component will be the opposite conductivity types.

[0079] Furthermore, the layer configuration of the light-receiving element 1 described in the above embodiments is merely an example, and it may have other layers. Moreover, the material and thickness of each layer are also merely examples and are not limited to those described above. Furthermore, although the above application example uses an X-ray image sensor 100, the light-receiving element 1 described in the above embodiments can also be applied to radiation image sensors and electromagnetic wave detection devices that are not limited to X-rays.

[0080] Furthermore, this disclosure can also take the following configuration. According to the technology with the following configuration, a first first conductivity type region connected to a first electrode and a second first conductivity type region connected to a second electrode are provided at the interface of a first surface of a semiconductor substrate including a photoelectric conversion region, and a conductive film is provided above the first surface of the semiconductor substrate, at least between the first first conductivity type region and the second first conductivity type region, to apply an electric field to the interface of the first surface. This suppresses the generation of fixed charges and interface states near the interface of the first surface. Therefore, it is possible to improve resistance to capacitance and electric field fluctuations due to X-ray irradiation. In addition, it is possible to reduce the generation of dark current. (1) A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and 、 Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region A new light-receiving element. (2) The photodetector according to (1), wherein the conductive film applies an electric field to the interface of the first surface between the first conductivity type region and the second conductivity type region. (3) The semiconductor substrate further comprises an insulating layer provided on the first surface side, The photodetector according to (1) or (2), wherein the conductive film is formed by at least one of a gate electrode provided on the first surface of the semiconductor substrate and a wiring layer provided within the insulating layer. (4) The photodetector according to (3), wherein the gate electrode and the wiring layer are electrically connected to each other. (5) The photodetector according to (3), wherein the gate electrode, the wiring layer, and the second first conductivity type region are electrically connected to each other. (6) The light-receiving element according to any one of (3) to (5), wherein the wiring layer is formed continuously or intermittently from between the first first conductivity type region and the second first conductivity type region to above the third first conductivity type region. (7) The photodetector according to any one of (3) to (6), wherein the gate electrode is formed using a semiconductor material and has a first region and a second region with different impurity concentrations. (8) The photodetector according to (7), wherein the first region has a lower impurity concentration than the second region and is located near the first conductivity type region. (9) The light-receiving element according to (7), wherein the first region has a lower impurity concentration than the second region and is provided around the second region. (10) The photodetector according to (7), wherein the first region has a lower impurity concentration than the second region, and the first region and the second region are stacked in that order from the first surface side. (11 ) before The semiconductor substrate is embedded and formed within the semiconductor substrate, and further has a fourth first conductivity region facing the second conductivity region on the second surface side of the semiconductor substrate facing the first surface, Any one of the above (1) to (10) The light-receiving element described above. (12) The fourth first conductivity type region extends below the first first conductivity type region and is connected to the first first conductivity type region. (11) The light-receiving element described above. (13) The fourth first conductivity type region has regions with different impurity concentrations. (12) The light-receiving element described above. (14) The semiconductor substrate has a second conductivity type and further has a second conductivity type layer at the interface of the second surface facing the first surface. The second conductivity layer and the second conductivity region have a higher impurity concentration than the semiconductor substrate. The above (1) to (13) A light-receiving element described in any one of the following. (15) The aforementioned semiconductor substrate is composed of an intrinsic semiconductor. The above (1) to (14) A light-receiving element described in any one of the following. (16) It comprises multiple photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and 、 Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region X-ray imaging sensor. (17) A pixel region in which multiple pixels are arranged, It has a peripheral region provided around the aforementioned pixel region, The semiconductor substrate has a depletion region in the pixel region and a neutral region in the peripheral region. (16) The X-ray imaging sensor described in [reference]. (18) The photodetector is provided for each of the plurality of pixels and is a pn junction type photodetector that applies a reverse bias between the first surface of the semiconductor substrate and the second surface facing the first surface. (17) The X-ray imaging sensor described in [reference]. (19) Equipped with an X-ray imaging sensor, The aforementioned X-ray imaging sensor has a plurality of photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and 、 Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region Electronic devices equipped with these features. (20) A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, Embedded and formed within the semiconductor substrate, the second conductivity region is opposite to the second first conductivity region and the third first conductivity region, Embedded and formed within the semiconductor substrate, a fourth first conductivity region is formed on the second surface side of the semiconductor substrate facing the first surface, and facing the second conductivity region. A new light-receiving element. (21) The fourth first conductivity type region extends below the first first conductivity type region, The first first conductivity type region and the fourth first conductivity type region are electrically connected. (20) The light-receiving element described above. (22) The fourth first conductivity type region has regions with different impurity concentrations. (20) or (21) above The light-receiving element described above.

[0081] Furthermore, this disclosure can also take the following configuration. According to the technology with the following configuration, a first first conductivity type region connected to a first electrode and a second first conductivity type region connected to a second electrode are provided at the interface of a first surface of a semiconductor substrate including a photoelectric conversion region, and a conductive film is provided above the first surface of the semiconductor substrate, at least between the first first conductivity type region and the second first conductivity type region, to apply an electric field to the interface of the first surface. This suppresses the generation of fixed charges and interface states near the interface of the first surface. Therefore, it is possible to improve resistance to capacitance and electric field fluctuations due to X-ray irradiation. In addition, it is possible to reduce the generation of dark current. (1) A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and A new light-receiving element. (2) The photodetector according to (1), wherein the conductive film applies an electric field to the interface of the first surface between the first conductivity type region and the second conductivity type region. (3) The semiconductor substrate further comprises an insulating layer provided on the first surface side, The photodetector according to (1) or (2), wherein the conductive film is formed by at least one of a gate electrode provided on the first surface of the semiconductor substrate and a wiring layer provided within the insulating layer. (4) The photodetector according to (3), wherein the gate electrode and the wiring layer are electrically connected to each other. (5) The photodetector according to (3), wherein the gate electrode, the wiring layer, and the second first conductivity type region are electrically connected to each other. (6) The light-receiving element according to any one of (3) to (5), wherein the wiring layer is formed continuously or intermittently from between the first first conductivity type region and the second first conductivity type region to above the third first conductivity type region. (7) The photodetector according to any one of (3) to (6), wherein the gate electrode is formed using a semiconductor material and has a first region and a second region with different impurity concentrations. (8) The photodetector according to (7), wherein the first region has a lower impurity concentration than the second region and is located near the first conductivity type region. (9) The light-receiving element according to (7), wherein the first region has a lower impurity concentration than the second region and is provided around the second region. (10) The photodetector according to (7), wherein the first region has a lower impurity concentration than the second region, and the first region and the second region are stacked in that order from the first surface side. (11) A light-receiving element according to any one of (1) to (10), which is embedded and formed within the semiconductor substrate and further has a second conductivity type region facing the second first conductivity type region and the third first conductivity type region. (12) The photodetector according to (11), which is embedded and formed within the semiconductor substrate and further has a fourth first conductivity region facing the second conductivity region on the second surface side of the semiconductor substrate facing the first surface. (13) The photodetector according to (12), wherein the fourth first conductivity type region extends below the first first conductivity type region and is connected to the first first conductivity type region. (14) The photodetector according to (13), wherein the fourth first conductivity type region has regions with different impurity concentrations. (15) The semiconductor substrate has a second conductivity type and further has a second conductivity type layer at the interface of the second surface facing the first surface. The photodetector according to any one of (11) to (14), wherein the second conductivity layer and the second conductivity region have a higher impurity concentration than the semiconductor substrate. (16) The photodetector according to any one of (1) to (15) above, wherein the semiconductor substrate is made of an intrinsic semiconductor. (17) It comprises multiple photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and X-ray imaging sensor. (18) A pixel region in which multiple pixels are arranged, It has a peripheral region provided around the aforementioned pixel region, The semiconductor substrate is an X-ray imaging sensor according to (17), wherein the semiconductor substrate has a depletion region in the pixel region and a neutral region in the peripheral region. (19) The X-ray imaging sensor according to (18), wherein the photodetector is provided for each of the plurality of pixels and is a pn junction type photodetector that applies a reverse bias between the first surface of the semiconductor substrate and the second surface facing the first surface. (20) Equipped with an X-ray imaging sensor, The aforementioned X-ray imaging sensor has a plurality of photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, and Electronic devices equipped with these features. (twenty one) A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity region is provided around the first first conductivity region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, Embedded and formed within the semiconductor substrate, the second conductivity region is opposite to the second first conductivity region and the third first conductivity region, Embedded and formed within the semiconductor substrate, a fourth first conductivity region is formed on the second surface side of the semiconductor substrate facing the first surface, and facing the second conductivity region. A new light-receiving element. (twenty two) The fourth first conductivity type region extends below the first first conductivity type region, The photodetector according to (21), wherein the first first conductivity type region and the fourth first conductivity type region are electrically connected. (twenty three) The photodetector according to (21) or (22), wherein the fourth first conductivity type region has regions with different impurity concentrations.

[0082] This application claims priority based on Japanese Patent Application No. 2021-075731, filed with the Japan Patent Office on 28 April 2021, and all contents of that application are incorporated herein by reference.

[0083] Those skilled in the art will understand that various modifications, combinations, subcombinations, and changes can be conceived depending on design requirements and other factors, and that these fall within the scope of the attached claims and their equivalents.

Claims

1. A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity type region is provided around the first first conductivity type region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region A new light-receiving element.

2. The photodetector according to claim 1, wherein the conductive film applies an electric field to the interface of the first surface between the first first conductivity type region and the second first conductivity type region.

3. The semiconductor substrate further comprises an insulating layer provided on the first surface side, The photodetector according to claim 1, wherein the conductive film is formed by at least one of a gate electrode provided on the first surface of the semiconductor substrate and a wiring layer provided within the insulating layer.

4. The photodetector according to claim 3, wherein the gate electrode and the wiring layer are electrically connected to each other.

5. The photodetector according to claim 3, wherein the gate electrode, the wiring layer, and the second first conductivity region are electrically connected to each other.

6. The light-receiving element according to claim 3, wherein the wiring layer is formed continuously or intermittently from between the first first conductivity type region and the second first conductivity type region to above the third first conductivity type region.

7. The photodetector according to claim 3, wherein the gate electrode is formed using a semiconductor material and has a first region and a second region with different impurity concentrations.

8. The photodetector according to claim 7, wherein the first region has a lower impurity concentration than the second region and is located near the first conductivity type region.

9. The photodetector according to claim 7, wherein the first region has a lower impurity concentration than the second region and is provided around the second region.

10. The photodetector according to claim 7, wherein the first region has a lower impurity concentration than the second region, and the first region and the second region are stacked in that order from the first surface side.

11. The photodetector according to claim 1, further comprising a fourth first conductivity region that is embedded and formed within the semiconductor substrate and faces the second conductivity region on the second surface side of the semiconductor substrate facing the first surface.

12. The photodetector according to claim 11, wherein the fourth first conductivity type region extends below the first first conductivity type region and is connected to the first first conductivity type region.

13. The photodetector according to claim 12, wherein the fourth first conductivity type region has regions with different impurity concentrations.

14. The semiconductor substrate has a second conductivity type and further has a second conductivity type layer at the interface of the second surface facing the first surface. The photodetector according to claim 1, wherein the second conductivity layer and the second conductivity region have a higher impurity concentration than the semiconductor substrate.

15. The photodetector according to claim 1, wherein the semiconductor substrate is made of an intrinsic semiconductor.

16. It is equipped with multiple photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity type region is provided around the first first conductivity type region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region X-ray imaging sensor.

17. A pixel region in which multiple pixels are arranged, It has a peripheral region provided around the aforementioned pixel region, The X-ray imaging sensor according to claim 16, wherein the semiconductor substrate has a depletion region in the pixel region and a neutral region in the peripheral region.

18. The X-ray imaging sensor according to claim 17, wherein the photodetector is provided for each of the plurality of pixels and is a pn junction type photodetector that applies a reverse bias between the first surface of the semiconductor substrate and the second surface facing the first surface.

19. Equipped with an X-ray imaging sensor, The aforementioned X-ray imaging sensor has a plurality of photodetectors that generate signal charges based on X-rays, The aforementioned light-receiving element is A semiconductor substrate including a photoelectric conversion region, A first conductivity type region is provided at the interface of the first surface of the semiconductor substrate and connected to the first electrode, At the interface of the first surface, a second first conductivity type region is provided around the first first conductivity type region and connected to the second electrode, At the interface of the first surface, a third first conductivity region is provided around the second first conductivity region and is electrically floating, A conductive film provided above the first surface between at least the first conductive type region and the second first conductive type region, Embedded and formed within the semiconductor substrate, the second first conductivity region and the second conductivity region facing the third first conductivity region Electronic devices equipped with these features.

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