Battery monitoring device

Abstract

To improve voltage detection accuracy while suppressing increase in the entire detection time required for detecting voltages of a plurality of battery cells.SOLUTION: A battery monitor IC3 detects voltages of a plurality of battery cells Cb through a detection path connected to both terminals of the plurality of battery cells Cb. A filter 4 is interposed in series in the detection path. A control section 5 included in the battery monitor IC3 controls, when detecting a voltage of a target battery cell which is the battery cell Cb as a detection target, the operation of an MUX 6 so as to connect a detection path corresponding to the target battery cell to an ADC 7, and when a potential difference between a voltage of the current target battery cell and a voltage of the target battery cell connected to the ADC 7 with the previous detection path or a voltage of predetermined spots in the MUX 6 and the ADC 7 in an initial state is equal to or greater than a predetermined threshold, sets a non-detection period in which the operation of the MUX 6 is controlled so as to connect a non-detection path with smaller time constant than the detection path to the ADC 7 prior to detection of the voltage of the current target battery cell.SELECTED DRAWING: Figure 1

Description

Technical Field

[0004] , ,

[0001] The present invention relates to a battery monitoring device that monitors a battery pack in which a plurality of battery cells are connected in series.

Background Art

[0002] Patent Documents 1 and 2 disclose a battery monitoring device including a multiplexer and one A / D converter, which uses the A / D converter to perform A / D conversion on the voltages of a plurality of battery cells in a time-sharing manner for detection. In this specification, the A / D converter may be abbreviated as ADC. In the battery monitoring device having the above configuration, a filter is provided in series in a detection path connected to both terminals of each of the plurality of battery cells. In this case, the filter is configured as a low-pass filter including a resistor and a capacitor having a relatively high resistance value in order to realize a function of removing noise superimposed on the battery cell. Hereinafter, the battery monitoring devices disclosed in Patent Document 1 and Patent Document 2 may be referred to as the first prior art and the second prior art, respectively.

Prior Art Documents

Non-Patent Documents

[0003] <00�0017>

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the first and second prior art, when the common voltage of the battery cell to be detected fluctuates significantly, such as during the initial voltage detection or when the detection target switches from the highest-level battery cell to the lowest-level battery cell, a current that causes errors flows through the filter due to charge discharge caused by the initialization of the multiplexer, which may result in voltage detection errors. Therefore, if the battery cell to be detected from among multiple battery cells is to be arbitrarily selected, it becomes necessary to add an initial wait, which complicates the logic.

[0005] As a countermeasure to these problems, the second conventional technology proposes a pyramidal sampling method in which the detection target is sequentially switched from the lowest battery cell to the highest battery cell, and then sequentially switched from the highest battery cell to the lowest battery cell. However, even with a configuration employing such a method, if the initial detection target is a higher battery cell than the lowest battery cell, the problem of voltage detection errors occurring during the initial voltage detection cannot be resolved.

[0006] The present invention has been made in view of the above circumstances, and its objective is to provide a battery monitoring device that can improve the accuracy of voltage detection while suppressing an increase in the overall detection time required to detect the voltages of multiple battery cells. [Means for solving the problem]

[0007] The battery monitoring device according to claim 1 is a battery monitoring device for monitoring a battery pack (2) having a configuration in which a plurality of battery cells (Cb) are connected in series, comprising: a voltage detection device (3) that detects the voltage of the plurality of battery cells via a detection path connected to both terminals of each of the plurality of battery cells; and filters (4, 22) provided corresponding to each of the plurality of battery cells and interposed in series in the detection path. The voltage detection device comprises: an A / D converter (7) that performs A / D conversion of a target voltage to be detected according to the voltage of the plurality of battery cells; a path switching unit (6) that switches the path connected to the A / D converter; and a detection control unit (5) that controls the operation of the path switching unit and the A / D converter and time-division detects the voltage of each of the plurality of battery cells based on a digital signal output from the A / D converter.

[0008] When the detection control unit detects the voltage of a target battery cell among the plurality of battery cells, it controls the operation of the path switching unit so that the detection path corresponding to the target battery cell is connected to the A / D converter. Furthermore, if the potential difference between the voltage of the target battery cell in the current detection and the voltage of the target battery cell connected to the A / D converter by the previous detection path, or the voltage at a predetermined location in the path switching unit and the A / D converter in the initial state, exceeds a predetermined threshold, the detection control unit provides a non-detection period, which is a period during which it controls the operation of the path switching unit so that a non-detection path with a smaller time constant than the detection path is connected to the A / D converter before detecting the voltage of the target battery cell in the current detection. The route switching unit includes one multiplexer (6), which is configured to select either the detected route or the non-detected route as the route to connect to the A / D converter.

[0009] With this configuration, a non-detection period is provided when the common voltage of the battery cell being detected fluctuates significantly, such as during the initial voltage detection or when the detection target switches from the highest-level battery cell to the lowest-level battery cell. Therefore, with this configuration, during such times, the charge that causes errors in voltage detection is discharged through the non-detection path, suppressing the occurrence of voltage detection errors. Furthermore, in this case, since the non-detection path has a smaller time constant than the detection path, the time required for charge discharge, and thus the non-detection period, can be kept relatively short. Consequently, this configuration provides the excellent effect of improving voltage detection accuracy while suppressing an increase in the overall detection time required to detect the voltages of multiple battery cells. [Brief explanation of the drawing]

[0010] [Figure 1] This diagram schematically shows the configuration of the battery monitoring device according to the first embodiment. [Figure 2] A diagram illustrating a specific example of a series of operations performed by the battery monitoring IC when voltage is detected according to the first embodiment. [Figure 3] A diagram illustrating a specific example of the series of operations performed by the battery monitoring IC when voltage is detected in the comparative example. [Figure 4] This diagram shows the specific circuit configuration involved in the path from a predetermined battery cell to an ADC when detecting the voltage of a predetermined battery cell in a comparative example. [Figure 5] This figure schematically shows an example of charge and discharge characteristics in the path passing through the filter and the path not passing through the filter according to the first embodiment and comparative example. [Figure 6] This figure shows a specific circuit configuration interposed in the path from a predetermined battery cell to an ADC when detecting the voltage of a predetermined battery cell according to the first embodiment. [Figure 7] A schematic diagram showing the configuration of the battery monitoring device according to the second embodiment. [Modes for carrying out the invention]

[0011] Several embodiments will be described below with reference to the drawings. In each embodiment, substantially identical components are denoted by the same reference numerals and their descriptions are omitted. (First Embodiment) The first embodiment will be described below with reference to Figures 1 to 6.

[0012] <Overall Structure> As shown in Figure 1, the battery monitoring device 1 of this embodiment is mounted on a vehicle such as an automobile, and is a device that detects various states such as the voltage of the battery pack 2 and monitors the state of the battery pack 2. The battery monitoring device 1 comprises a battery monitoring IC 3, which is an integrated circuit that integrates circuits that perform various operations for battery monitoring, and a plurality of external elements provided outside the battery monitoring IC 3. IC is an abbreviation for Integrated Circuit.

[0013] Battery pack 2 is designed to be installed in vehicles such as automobiles, and has a configuration in which multiple battery cells Cb, for example 24, are connected in series in multiple stages between a pair of DC power lines L1 and L2. In this case, the battery cells Cb are, for example, secondary batteries such as lithium-ion batteries or fuel cells. In Figure 1, five of the 24 battery cells Cb are shown, and numbers are added to the end of their symbols to distinguish them.

[0014] These numbers correspond to the arrangement of battery cells Cb in battery pack 2. The battery cell Cb located on the lowest potential side is assigned the number 1, and the numbers increase as you move towards higher potentials: 2, 3, 4, ... until the battery cell Cb located on the highest potential side is assigned the number 24. Therefore, Figure 1 shows the battery cell Cb1 located on the lowest potential side, the battery cell Cb2 located on the second lowest potential side, the battery cell Cb11 located on the eleventh lowest potential side, the battery cell Cb12 located on the twelfth lowest potential side, and the battery cell Cb24 located on the highest potential side.

[0015] Regarding each of the above-described battery cells Cb, for each configuration provided in the battery monitoring device 1 corresponding to each of the battery cells Cb1, Cb2, Cb11, and Cb12, similar numbers may be added to the end of the reference signs for distinction. However, when distinction is not necessary for these configurations, the reference signs at the end may be omitted and they may be collectively referred to. In the above configuration, a common mode voltage is superimposed on the battery cell Cb.

[0016] This common mode voltage becomes higher for the battery cells Cb connected to the upper stage side, that is, the high potential side of the assembled battery 2, and its maximum value is a relatively high voltage of, for example, about several hundred volts. In the present embodiment, for example, the common mode voltage of the battery cell Cb1 is 5V, the common mode voltage of the battery cell Cb12 is 60V, the common mode voltage of the battery cell Cb13 is 65V, and the common mode voltage of the battery cell Cb24 is 120V.

[0017] In the above configuration, among the 24 battery cells Cb, the battery cells Cb1 to Cb12 arranged on the low potential side are collectively referred to as lower cells, and Cb13 to Cb24 arranged on the high potential side are collectively referred to as upper cells. In the present embodiment, among the configurations provided in the battery monitoring device 1, only the configurations corresponding to the lower cells will be described, and the description of the configurations corresponding to the upper cells is omitted, but the configurations corresponding to the upper cells are the same as those corresponding to the lower cells.

[0018] <Configuration of External Elements> First, the configuration of the external elements provided outside the battery monitoring IC3 will be described. The low potential side terminal of the battery cell Cb13 (not shown) and the high potential side terminal of the battery cell Cb12 are connected to the connection terminal PS13 via the resistor RB. A resistor RS and a capacitor CS are connected in series between the high potential side terminal and the low potential side terminal of the battery cell Cb12. A node Na, which is the interconnection node of the resistor RS and the capacitor CS, is connected to the connection terminal PV12. The low potential side terminal of the battery cell Cb12 and the high potential side terminal of the battery cell Cb11 are connected to the connection terminal PS12 via the resistor RB.

[0019] Although some illustrations are omitted, a resistor RS and a capacitor CS are connected in series between the high-potential side terminal and the low-potential side terminal of the battery cell Cb11. A node Na, which is the interconnection node of the resistor RS and the capacitor CS, is connected to the connection terminal PV11. Although illustrations are omitted, the low-potential side terminal of the battery cell Cb11 and the high-potential side terminal of a battery cell Cb10 not shown are connected to the connection terminal PS11 via a resistor RB.

[0020] The low-potential side terminal of a battery cell Cb3 not shown and the high-potential side terminal of the battery cell Cb2 are connected to the connection terminal PS3 via a resistor RB. A resistor RS and a capacitor CS are connected in series between the high-potential side terminal and the low-potential side terminal of the battery cell Cb2. A node Na, which is the interconnection node of the resistor RS and the capacitor CS, is connected to the connection terminal PV2.

[0021] The low-potential side terminal of the battery cell Cb2 and the high-potential side terminal of the battery cell Cb1 are connected to the connection terminal PS2 via a resistor RB. A resistor RS and a capacitor CS are connected in series between the high-potential side terminal and the low-potential side terminal of the battery cell Cb1. A node Na, which is the interconnection node of the resistor RS and the capacitor CS, is connected to the connection terminal PV1. The low-potential side terminal of the battery cell Cb1 is connected to the connection terminal PS1 via a resistor RB.

[0022] In the above configuration, a filter 4, which is a low-pass filter, is constituted by the resistor RS and the capacitor CS corresponding to each of the battery cells Cb. That is, in the above configuration, the filter 4 is provided so as to correspond to each of the battery cells Cb. In this specification, the low-pass filter may be abbreviated as LPF. The resistor RB is a discharge resistor for discharging the battery cell Cb during equalization. Since the resistor RB functions as a current limiting resistor during equalization, its resistance value is a very small value compared to the resistance value of the resistor RS constituting the filter 4, specifically, for example, about several tens of Ω.

[0023] <Internal Configuration of Battery Monitoring IC> Next, the internal configuration of the battery monitoring IC3 will be explained. The battery monitoring IC3 functions as a voltage detection device that detects the voltage of multiple battery cells Cb via detection paths connected to both terminals of each of the multiple battery cells Cb. In the above configuration, the detection path corresponding to battery cell Cb12 is: "high-potential terminal of battery cell Cb12 → resistor RS → connection terminal PV12 → each circuit inside the battery monitoring IC3 → connection terminal PS12 → resistor RB → low-potential terminal of battery cell Cb12".

[0024] In the above configuration, the detection path corresponding to battery cell Cb11 is: "high-potential terminal of battery cell Cb11 → resistor RS → connection terminal PV11 → various circuits inside the battery monitoring IC3 → connection terminal PS11 → resistor RB → low-potential terminal of battery cell Cb11". In the above configuration, the detection path corresponding to battery cell Cb2 is: "high-potential terminal of battery cell Cb2 → resistor RS → connection terminal PV2 → various circuits inside the battery monitoring IC3 → connection terminal PS2 → resistor RB → low-potential terminal of battery cell Cb2".

[0025] In the above configuration, the detection path corresponding to battery cell Cb1 is as follows: "high-potential terminal of battery cell Cb1 → resistor RS → connection terminal PV1 → various circuits inside the battery monitoring IC3 → connection terminal PS1 → resistor RB → low-potential terminal of battery cell Cb1". In this way, the battery monitoring IC3 detects the voltage of multiple battery cells Cb via a detection path that passes through filter 4. In other words, in the above configuration, filter 4 is provided so as to be interposed in series with the detection path.

[0026] The battery monitoring IC3 includes a control unit 5. The control unit 5 includes a communication interface (I / F) for external communication, registers for storing various data, and controls the overall operation of the battery monitoring IC3. I / F is an abbreviation for interface. The battery monitoring IC3 is also equipped with equalization switches SB, which are provided for each of the multiple battery cells Cb and are used to discharge the corresponding battery cells Cb. The equalization switches SB are made up of, for example, MOS transistors and, together with resistors RB, form a discharge circuit. The on / off state of the equalization switches SB is controlled by the control unit 5. In the equalization process, the operation of each discharge circuit is controlled so that the voltage of each battery cell Cb becomes approximately the same as the voltage of the lowest battery cell Cb. The specific connection configuration of the equalization switches SB is as follows.

[0027] Specifically, the equalization switch SB12 corresponding to battery cell Cb12 is connected between connection terminal PS13 and connection terminal PS12. Although some diagrams are omitted, the equalization switch SB11 corresponding to battery cell Cb11 is connected between connection terminal PS12 and connection terminal PS11. The equalization switch SB2 corresponding to battery cell Cb2 is connected between connection terminal PS3 and connection terminal PS2. The equalization switch SB1 corresponding to battery cell Cb1 is connected between connection terminal PS2 and connection terminal PS1.

[0028] In the above configuration, the equalization path, which is the path through which current flows when the battery cell Cb is discharged by the equalization switch SB connected in this manner, is specifically as follows: The equalization path corresponding to battery cell Cb12 is "high-potential terminal of battery cell Cb12 → resistor RB → connection terminal PS13 → equalization switch SB12 → connection terminal PS12 → resistor RB → low-potential terminal of battery cell Cb12". The equalization path corresponding to battery cell Cb11 is "high-potential terminal of battery cell Cb11 → resistor RB → connection terminal PS12 → equalization switch SB11 → connection terminal PS11 → resistor RB → low-potential terminal of battery cell Cb12".

[0029] The equalization path corresponding to battery cell Cb2 is as follows: "high-potential terminal of battery cell Cb2 → resistor RB → connection terminal PS3 → equalization switch SB2 → connection terminal PS2 → resistor RB → low-potential terminal of battery cell Cb2". The equalization path corresponding to battery cell Cb1 is as follows: "high-potential terminal of battery cell Cb1 → resistor RB → connection terminal PS2 → equalization switch SB1 → connection terminal PS1 → resistor RB → low-potential terminal of battery cell Cb1". The equalization path is a path for discharging each of the multiple battery cells Cb, and corresponds to a non-detection path with a smaller time constant compared to the detection path.

[0030] The battery monitoring IC3 includes a multiplexer 6, switches Sc1 to Sc4, capacitors Cs1 and Cs2, and a differential input ADC7. In the following description and Figure 1, the multiplexer may be referred to as MUX. MUX6 includes multiple switches SV corresponding to each of the connection terminals PV1 to PV12 and multiple switches SS corresponding to each of the connection terminals PS1 to PS13. Switches SV and SS are composed of, for example, MOS transistors.

[0031] Each terminal of multiple switches SV is connected to the corresponding connection terminal PV. Specifically, each terminal of switches SV12, SV11, SV2, and SV1 is connected to connection terminals PV12, PV11, PV2, and PV1, respectively. Each other terminal of multiple switches SV is connected to the first output line Lo1. Specifically, each other terminal of switches SV12, SV11, SV2, and SV1 is connected to the first output line Lo1.

[0032] Each terminal on one side of multiple switches SS is connected to the corresponding connection terminal PS. Specifically, each terminal on switches SS13, SS12, SS3, SS2, and SS1 is connected to connection terminals PS13, PS12, PS3, PS2, and PS1, respectively. Each other terminal on multiple switches SS is connected to the second output line Lo2. Specifically, each other terminal on switches SS13, SS12, SS3, SS2, and SS1 is connected to the second output line Lo2.

[0033] A parasitic capacitance Cp1 exists between the first output line Lo1 and the ground to which the circuit's reference potential is supplied, due to the wiring. A parasitic capacitance Cp2 exists between the second output line Lo2 and the ground, due to the wiring. The MUX6 receives the voltages from the connection terminals PV1 to PV12 and PS1 to PS13, and selectively outputs one of these input voltages by switching switches SV and SS on and off. This selection operation by the MUX6, i.e., switching switches SV and SS on and off, is controlled by the control unit 5.

[0034] Switches Sc1 to Sc4 and capacitors Cs1 and Cs2, along with switches, capacitors (not shown), and differential output type operational amplifiers located before the ADC7, constitute a differential sample-and-hold circuit. In this case, the sample-and-hold circuit also performs level shifting, which steps down a high common-mode voltage to a lower common-mode voltage.

[0035] In the differential configuration, the paired capacitors Cs1 and Cs2 correspond to the sampling capacitance and have the same capacitance value. In this specification, "same value" includes not only values ​​that are perfectly identical, but also those with slight differences in value that are not strictly identical, as long as they produce the desired effect. Switches Sc1 to Sc4 are composed of, for example, MOS transistors, and their on / off switching is controlled by the control unit 5. The control unit 5 basically controls switches Sc1 and Sc4 and switches Sc2 and Sc3 to switch on and off in a complementary manner.

[0036] One terminal of capacitor Cs1 is connected to the first output line Lo1 via switch Sc1 and to the second output line Lo2 via switch Sc2. One terminal of capacitor Cs2 is connected to the first output line Lo1 via switch Sc3 and to the second output line Lo2 via switch Sc4. The other terminals of capacitors Cs1 and Cs2 are connected to an operational amplifier or similar device located before the ADC7.

[0037] ADC7 is a differential input ADC, and its operation is controlled by the control unit 5. In this case, various types of ADCs can be used as ADC7, such as a ΔΣ type ADC. ADC7 performs A / D conversion on the voltages output from MUX6, that is, the voltage of the first output line Lo1 and the voltage of the second output line Lo2, and outputs the resulting digital signal to the control unit 5.

[0038] In the above configuration, MUX6 functions as a path switching unit that switches the path connected to ADC7. In other words, in this embodiment, the path switching unit has a configuration with one MUX6, and as will be described in detail later, this one MUX6 is configured to select either the detection path or the non-detection path as the path connected to ADC7. Note that "connected to ADC7" here means connected to ADC7 via MUX6, switches Sc1~Sc4 and capacitors Cs1, Cs2, etc.

[0039] When detecting the voltage of a target battery cell among multiple battery cells Cb, MUX6 can perform a path switching operation so that the detection path corresponding to that target battery cell is connected to ADC7. MUX6 can output the voltage of only one of the connection terminals PS1 to PS13. In other words, MUX6 can perform a first switching operation to switch the path so that only one of the two terminals of the battery cell Cb is connected to ADC7. The path connected to ADC7 by the first switching operation is part of the equalization path, and therefore, like the equalization path, it corresponds to a non-detection path with a smaller time constant than the detection path. MUX6 can perform a second switching operation to switch the path so that the equalization path, which is the path for discharging each of the multiple battery cells Cb, is connected to ADC7.

[0040] In the above configuration, when detecting the voltage of a target battery cell among multiple battery cells Cb, the following operation is performed: When detecting the voltage, MUX6 generalizes the number appended to the end of the target battery cell as n, and selects and outputs the voltage of connection terminal PVn and the voltage of connection terminal PSn. For example, if the target battery cell is battery cell Cb12, the voltages of connection terminals PV12 and PS12 are output; if the target battery cell is battery cell Cb11, the voltages of connection terminals PV12 and PS11 are output; if the target battery cell is battery cell Cb2, the voltages of connection terminals PV2 and PS2 are output; and if the target battery cell is battery cell Cb1, the voltages of connection terminals PV1 and PS1 are output.

[0041] When voltage is detected, the MUX6 performs the operation described above, so that the voltages of the first output line Lo1 and the second output line Lo2 become the target voltages corresponding to the voltage of the target battery cell. As a result, when voltage is detected, the ADC7 can perform A / D conversion on the target voltages corresponding to the voltages of multiple battery cells Cb. The control unit 5 controls the operation of the MUX6, switches Sc1 to Sc4 and the ADC7, and functions as a detection control unit that time-division detects the voltage of each of the multiple battery cells Cb based on the digital signal output from the ADC7.

[0042] In this way, when voltage is detected, the control unit 5 controls the operation of the MUX6 so that the detection path corresponding to the target battery cell is connected to the ADC7. In the following description, the period during which the control unit 5 controls the operation of the MUX6 in this manner will be referred to as the detection period. In this case, the control unit 5 can control the operation of the MUX6 so that the voltage of each of the multiple battery cells Cb can be detected in a time-division multiplexing manner in any order, i.e., sequence.

[0043] In the above configuration, during the equalization process in which a predetermined battery cell Cb is discharged, the following operations are performed. During equalization, MUX6 performs the second switching operation described above so that the equalization path corresponding to the battery cell to be discharged is connected to ADC7. That is, during equalization, when MUX6 generalizes the number appended to the end of the battery cell to be discharged as n, it selects and outputs the voltage of connection terminal PSn+1 and the voltage of connection terminal PSn. For example, if the battery cell to be discharged is battery cell Cb12, the voltages of connection terminals PS13 and PS12 are output; if the battery cell to be discharged is battery cell Cb11, the voltages of connection terminals PS12 and PS11 are output; if the battery cell to be discharged is battery cell Cb2, the voltages of connection terminals PS3 and PS2 are output; and if the battery cell to be discharged is battery cell Cb1, the voltages of connection terminals PS2 and PS1 are output.

[0044] During equalization, the MUX6 performs the operations described above, so that the voltages of the first output line Lo1 and the second output line Lo2 become voltages corresponding to the voltage of the battery cell being discharged. As a result, during equalization, the ADC7 can perform A / D conversion to a voltage corresponding to the voltage of the battery cell being discharged. The control unit 5 controls the operation of the MUX6, switches Sc1 to Sc4 and the ADC7, and detects the voltage of the battery cell being discharged based on the digital signal output from the ADC7.

[0045] When the control unit 5 performs a series of operations to time-divisionally detect the voltage of each of the multiple battery cells Cb, it performs the following operations. Specifically, if the potential difference between the voltage of the target battery cell in the current detection and the voltage of the target battery cell connected to the ADC7 by the previous detection path exceeds a predetermined threshold Vth, the control unit 5 sets a non-detection period, which is a period during which it controls the operation of the MUX6 so that the non-detection path is connected to the ADC7 before detecting the voltage of the target battery cell in the current detection. The threshold Vth can be set to any value that is higher than the difference in the common-mode voltages of two adjacently connected battery cells Cb, and lower than the difference in the common-mode voltages of the two furthest connected battery cells Cb.

[0046] Furthermore, the control unit 5 is configured to provide a non-detection period, which is a period during which it controls the operation of the MUX6 so that the non-detection path is connected to the ADC7 before detecting the voltage of the target battery cell, if the potential difference between the voltage of the target battery cell and the voltage at predetermined locations in the MUX6 and ADC7 in their initial state exceeds a threshold Vth. The predetermined locations in the MUX6 and ADC7 can be any locations that are connected to the detection path when voltage is detected.

[0047] The control unit 5 can set a non-detection period by one of the following two methods. In the first method, the control unit 5 can determine whether the above-mentioned potential difference is equal to or greater than the threshold Vth and set a non-detection period based on the result of that determination. In the second method, the control unit 5 can set a non-detection period in advance based on the result of a prior determination of whether the above-mentioned potential difference is equal to or greater than the threshold Vth.

[0048] In this case, the control unit 5 controls the operation of MUX6 so that it performs a first switching operation during the non-detection period. Specifically, the control unit 5 controls the operation of MUX6 so that it performs a first switching operation during the non-detection period so that it switches the path so that the low-potential terminal of the target battery cell is connected to ADC7. In other words, during the non-detection period, the control unit 5 turns on only switch SS, which corresponds to the target battery cell, among the switches SS1 to SS13 of MUX6. Also, during the non-detection period, the control unit 5 turns on all switches Sc1 to Sc4. Since this operation during the non-detection period is different from the operation that the battery monitoring IC3 should normally perform, such as the operation for detecting the voltage of the battery cell Cb, it will be referred to as "idle operation" in the following explanation.

[0049] <Specific examples of the series of actions performed when voltage is detected> Next, we will explain a specific example of the series of operations performed by the battery monitoring IC3 when detecting the voltage of each of the multiple battery cells Cb in a time-division manner, that is, when voltage detection occurs, with reference to Figure 2. In the following explanation and in Figure 2, when it is necessary to distinguish between the configurations corresponding to the upper cells and the configurations corresponding to the lower cells, we will add "upper side" and "lower side" to the beginning of each, respectively. Also, in Figure 2, battery cells Cb1 to Cb24 are abbreviated to only the codes added to the end of their names, and "empty" is abbreviated to "empty".

[0050] As shown in Figure 2, a series of operations related to voltage detection begins at time t1, when a series of operations related to communication has finished. This series of operations is performed until time t2. In this case, the control unit 5 controls various operations so that the upper-side ADC7 performs A / D conversion of the target voltage to be detected according to the voltage of the upper-side cells in the order of "battery cell Cb23 → battery cell Cb24 → battery cell Cb13 → battery cell Cb14 → ... → battery cell Cb23". Also in this case, the control unit 5 controls various operations so that the lower-side ADC7 performs A / D conversion of the target voltage to be detected according to the voltage of the upper-side cells in the order of "battery cell Cb12 → battery cell Cb1 → battery cell Cb2 → ... → battery cell Cb11".

[0051] In the initial state before the upper-level ADC7 performs A / D conversion for the first battery cell Cb24 in the sequence described above, the voltages at predetermined locations in MUX6 and ADC7 are approximately zero. When detecting the voltage of the first battery cell Cb24 from this initial state, the potential difference between the voltage of the target battery cell Cb24 and the voltages at predetermined locations in MUX6 and ADC7 in the initial state becomes greater than or equal to the threshold Vth. Therefore, the control unit 5 performs a test run before the upper-level ADC7 performs A / D conversion for the first battery cell Cb24 in the sequence described above.

[0052] Furthermore, in the initial state before the lower-side ADC7 performs A / D conversion for the first battery cell Cb12 in the sequence described above, the voltages at predetermined locations in MUX6 and ADC7 are approximately zero. When voltage detection of the first battery cell Cb12 is performed from this initial state, the potential difference between the voltage of the target battery cell Cb12 and the voltages at predetermined locations in MUX6 and ADC7 in the initial state becomes greater than or equal to the threshold Vth. Therefore, the control unit 5 performs a test run before the upper-side ADC7 performs A / D conversion for the first battery cell Cb12 in the sequence described above.

[0053] When the upper-level ADC7 performs A / D conversion for battery cell Cb13, the potential difference between the common voltage of battery cell Cb13 (the target battery cell in this case) and the common voltage of battery cell Cb24 (the target battery cell connected to the ADC7 via the previous detection path) becomes greater than or equal to the threshold Vth. Therefore, the control unit 5 performs a test run before the upper-level ADC7 performs A / D conversion for battery cell Cb13.

[0054] Furthermore, when the lower-side ADC7 performs A / D conversion for battery cell Cb1, the potential difference between the common voltage of battery cell Cb1 (the target battery cell in this case) and the common voltage of battery cell Cb12 (the target battery cell connected to the ADC7 via the previous detection path) becomes greater than or equal to the threshold Vth. Therefore, the control unit 5 performs a idle cycle before the upper-side ADC7 performs A / D conversion for battery cell Cb1. In this embodiment, the non-detection period during which the idle cycle is performed is, for example, about 7 μs, which is sufficiently short compared to the total operating time of about 8 ms. In this way, the control unit 5 controls the operation of MUX6 and ADC7 so that the non-detection period is shorter than the detection period.

[0055] According to the embodiment described above, the following effects can be obtained. The control unit 5 is configured to provide a non-detection period, which is a period during which it controls the operation of MUX6 so that a non-detection path with a smaller time constant than the detection path is connected to ADC7 before detecting the voltage of the target battery cell, if the potential difference between the voltage of the target battery cell in the current detection and the voltage of the target battery cell connected to ADC7 by the previous detection path or the voltage at a predetermined point in MUX6 and ADC7 in the initial state is greater than or equal to a threshold Vth.

[0056] With this configuration, a non-detection period is provided when the common voltage of the battery cells Cb being detected fluctuates significantly, such as during the initial voltage detection or when the detection target switches from the highest-level battery cells Cb24 and Cb12 to the lowest-level battery cells Cb13 and Cb1. Therefore, with this configuration, in such cases, the charge that causes errors in voltage detection is discharged through the non-detection path, suppressing the occurrence of voltage detection errors. Furthermore, in this case, since the non-detection path has a smaller time constant than the detection path, the time required for charge discharge, and thus the non-detection period, can be kept relatively short. Thus, this embodiment provides the excellent effect of improving voltage detection accuracy while suppressing an increase in the overall detection time required to detect the voltages of multiple battery cells Cb.

[0057] The effects obtained by this embodiment become even clearer when compared with the prior art. Therefore, after describing a comparative example that corresponds to the prior art, a comparison will be made between that comparative example and this embodiment. The comparative example has the same configuration as this embodiment, but the control content by the control unit 5 is different from that of this embodiment. In the comparative example, as shown in Figure 3, in the series of operations performed by the battery monitoring IC 3 when detecting the voltage of each of the multiple battery cells Cb in a time-division manner, there is no non-detection period and no idle operation is performed.

[0058] Therefore, in the comparative example, when voltage detection is performed on the leading battery cells Cb24 and Cb12 from the initial state, and when voltage detection is performed on battery cells Cb13 and Cb1, a current that causes errors flows through filter 4 due to the discharge of charge stored in internal parasitic capacities such as MUX6 and ADC7, resulting in voltage detection errors. The occurrence of such detection errors will be explained in detail based on a specific example. Here, we assume that voltage detection is performed on battery cell Cb1 after voltage detection on battery cell Cb12.

[0059] In this case, the fluctuation in the common voltage of the battery cell Cb being detected is very large, approximately 60V. As shown in Figure 4, the path from battery cell Cb1 to ADC7 when detecting the voltage of battery cell Cb1 involves MOS transistors Q1 and Q2 that constitute switch SV1 of MUX6, and MOS transistors Q3 and Q4 that constitute switch Sc1 or Sc3. MOS transistors Q1 to Q4 all have MOS capacitance between the gate and source, gate and drain, and drain and source.

[0060] Furthermore, there is a parasitic capacitance Cp3 due to the wiring between filter 4 and MUX6, a parasitic capacitance Cp1 due to the wiring between MUX6 and switch Sc1 or Sc3, and a parasitic capacitance Cp4 due to the wiring between switch Sc1 or Sc3 and capacitor Cs1 or Cs2 and ADC7. Hereafter, such parasitic capacitances will be referred to as internal node parasitic capacitances. In this case, very large fluctuations in the common voltage cause charge to discharge from the internal node parasitic capacitances and MOS capacitances. As a result, current flows through the path indicated by the dashed arrow in Figure 4, that is, the detection path that passes through resistor RS and capacitor CS of filter 4, and consequently, a voltage detection error occurs due to the voltage drop ΔV1 across resistor RS.

[0061] The charge-discharge characteristics in the path including the detection path that passes through filter 4 are determined by the filter constants of filter 4, which is an RC filter. Since filter 4 needs to remove even relatively low-frequency noise superimposed on the battery cell Cb, the resistance value of resistor RS and the capacitance value of capacitor CS are relatively large. Therefore, as shown by characteristic A, indicated by the dashed line in Figure 5, the charge-discharge response in the discharge described above becomes very slow. In Figure 5, the vertical axis represents the charge-discharge current I, and the horizontal axis represents time t. Consequently, in the comparative example, the discharge of the internal node parasitic capacitance and MOS capacitance is slowed due to the action of filter 4, and the voltage detection error becomes large.

[0062] In contrast, in this embodiment, as shown in Figure 2, a non-detection period is provided during the series of operations performed by the battery monitoring IC3 when detecting the voltage of each of the multiple battery cells Cb in a time-division manner, and idle operation is performed. Therefore, in this embodiment, when detecting the voltage of the first battery cells Cb24 and Cb12 from the initial state, and when detecting the voltage of battery cells Cb13 and Cb1, idle operation is performed before these voltage detections are performed, and the internal charge is discharged. As a result, in this embodiment, the flow of current that causes errors in the filter 4 is suppressed, and as a result, the occurrence of voltage detection errors is suppressed.

[0063] The reason why detection errors are suppressed in this way will be explained in detail with a specific example. Here, we assume that a free run is performed after voltage detection of battery cell Cb12 but before voltage detection of battery cell Cb1. Even in this case, the fluctuation of the common voltage of the battery cell Cb to be detected is very large, at approximately 60V. As shown in Figure 6, the path from battery cell Cb1 to ADC7 when free running involves MOS transistors Q5 and Q6 which constitute switch SS1 of MUX6, and MOS transistors Q7 and Q8 which constitute switch Sc2 or Sc4. MOS transistors Q5 to Q8 all have MOS capacitance between gate and source, gate and drain, and drain and source.

[0064] Furthermore, there is a parasitic capacitance Cp5 due to the wiring between filter 4 and MUX6, a parasitic capacitance Cp2 due to the wiring between MUX6 and switch Sc2 or Sc4, and a parasitic capacitance Cp6 due to the wiring between switch Sc2 or Sc4 and capacitor Cs1 or Cs2 and ADC7. In this case as well, very large fluctuations in the common voltage cause charge to discharge from the internal node parasitic capacitance and MOS capacitance. As a result, current flows through a path indicated by the dashed arrow in Figure 6, that is, a path that does not pass through resistor RS and capacitor CS of filter 4 but passes through the equalization resistor RB, including a non-detection path.

[0065] In this case as well, although a voltage detection error occurs due to the voltage drop ΔV2 across resistor RB, the resistance value of resistor RB is much smaller than that of resistor RS, so the voltage drop ΔV2 is much smaller than the voltage drop ΔV1, and as a result, the voltage detection error is also kept to a minimum. The charge-discharge characteristics in the path including the non-detection path that does not pass through filter 4 are such that, because there are no resistors with relatively large resistance values ​​and capacitors with relatively large capacitance values ​​along that path, the charge-discharge response in the discharge described above is very fast, as shown by characteristic B, which is indicated by the solid line in Figure 5. Therefore, in this embodiment, by passing current through the equalization resistor RB, the discharge of the internal node parasitic capacitance and MOS capacitance is accelerated, and the voltage detection error is kept to a minimum.

[0066] In this embodiment, a single MUX6 is configured to select either the detection path or the non-detection path as the path to connect to the ADC7. In this way, since the MUX6 originally provided in the battery monitoring IC3 can also be used to switch to the non-detection path, the increase in circuit size associated with adding a non-detection period is suppressed. In this embodiment, the control unit 5 controls the operation of the MUX6 and ADC7 so that the non-detection period is shorter than the detection period. In this way, the voltage detection accuracy can be improved while keeping the increase in the overall detection time caused by adding a non-detection period to suppress voltage detection errors to as small as possible.

[0067] The control unit 5 can determine whether the above-mentioned potential difference exceeds the threshold Vth and set a non-detection period based on the determination result. In this way, it is possible to add the minimum non-detection period necessary to obtain the desired voltage detection accuracy, and as a result, the increase in the overall detection time can be kept even smaller. Furthermore, in this way, even if the sequence for detecting the voltages of multiple battery cells Cb is not predetermined and changes, a non-detection period can be added at an appropriate timing. In addition, the control unit 5 can set a non-detection period in advance based on the result of the prior determination of whether the above-mentioned potential difference exceeds the threshold Vth. In this way, the complexity of the control content by the control unit 5 that is required to add a non-detection period can be kept to a minimum.

[0068] <Examples of control content by the control unit 5 during the non-detection period> The control unit 5 was configured to control the operation of MUX6 so that it would perform a first switching operation during the non-detection period, but it can also be configured to control the operation of MUX6 so that it would perform a second switching operation. Specifically, the control unit 5 can also control the operation of MUX6 so that it would perform a second switching operation during the non-detection period so that the equalization path corresponding to the target battery cell is connected to ADC7. With this modification, as in the embodiment, the charge that causes errors in voltage detection is discharged through the equalization path corresponding to the non-detection path, and the occurrence of voltage detection errors is suppressed. In this case as well, since the equalization path has a smaller time constant than the detection path, the time required for charge discharge can be kept relatively short.

[0069] <Modified example of the route switching unit> In this embodiment, the route switching unit is configured to have one MUX6, which selects either the detected route or the undetected route as the route to connect to the ADC7. However, it is also possible to have two MUXs, which select either the detected route or the undetected route as the route to connect to the ADC7.

[0070] Specifically, the route switching unit can be configured to include a first MUX equipped with multiple switches SV corresponding to each of the connection terminals PV1 to PV12, and a second MUX equipped with multiple switches SS corresponding to each of the connection terminals PS1 to PS13. The switches SV of the first MUX and the switches SS of the second MUX are connected in a manner that allows them to perform switching in the same way as the switches SV and SS of the MUX6. With this modification, the route connected to the ADC7 can be switched, just as in this embodiment, and thus the same effects as in this embodiment can be obtained.

[0071] (Second Embodiment) The second embodiment will be described below with reference to Figure 7. As shown in Figure 7, the battery monitoring device 21 of this embodiment differs from the battery monitoring device 1 of the first embodiment in the configuration of its external elements. The battery monitoring device 21 is equipped with a filter 22 instead of a filter 4.

[0072] Filter 22, like filter 4, is an LPF composed of a resistor RS and a capacitor CS. However, filter 22 differs from filter 4 in the connection configuration of the low-potential terminals of capacitor CS. Specifically, although some diagrams are omitted, the low-potential terminals of each capacitor CS corresponding to battery cells Cb1 to Cb24 are connected in common and also connected to the DC power line L2.

[0073] The battery monitoring device 21 is equipped with a capacitor CB corresponding to each of the multiple battery cells Cb. Since the capacitor CB, together with the resistor RB and the equalizing switch SB, constitutes a discharge circuit, its capacitance value is very small compared to the capacitance value of the capacitor CS that constitutes the filter 22. The specific connection configuration of the capacitor CB is as follows.

[0074] Specifically, capacitor CB12, corresponding to battery cell Cb12, is connected between connection terminals PS13 and PS12. Although some diagrams are omitted, capacitor CB11, corresponding to battery cell Cb11, is connected between connection terminals PS12 and PS11. Capacitor CB2, corresponding to battery cell Cb2, is connected between connection terminals PS3 and PS2. Capacitor CB1, corresponding to battery cell Cb1, is connected between connection terminals PS2 and PS1.

[0075] The detection path in the battery monitoring device 21 with the above configuration is the same as the detection path in the battery monitoring device 1 of the first embodiment. Also, the equalization path in the battery monitoring device 21 with the above configuration is the same as the equalization path in the battery monitoring device 1 of the first embodiment. Therefore, in the battery monitoring device 21 as well, the equalization path corresponds to a non-detection path with a smaller time constant compared to the detection path.

[0076] In this embodiment, the control unit 5 controls the operation of the MUX6 so that it performs a second switching operation during the non-detection period. Specifically, during the non-detection period, the control unit 5 controls the operation of the MUX6 so that it performs a second switching operation to switch the path so that the equalization path corresponding to the target battery cell is connected to the ADC7. In this embodiment as well, as in the first embodiment, the charge that causes errors in voltage detection is discharged through the equalization path corresponding to the non-detection path, and the occurrence of voltage detection errors is suppressed. Also in this case, since the equalization path is a path with a smaller time constant than the detection path, the time required for charge discharge can be kept relatively short.

[0077] (Other embodiments) It should be noted that the present invention is not limited to the embodiments described above and shown in the drawings, and can be arbitrarily modified, combined, or expanded without departing from its essence. The numerical values ​​and other figures shown in each of the above embodiments are illustrative examples and are not limiting.

[0078] The filters interposed in series with the detection path are not limited to filters 4 and 22 described in each embodiment above; various types of filters can be used, such as pi-type RC filters and LC filters. The non-detection path is not limited to the equalization path or a part of the equalization path described in each embodiment above; any path with a smaller time constant than the detection path is acceptable.

[0079] This disclosure is described in accordance with the embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the equivalence. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and concept of this disclosure.

[0080] This disclosure includes, in addition to the invention described in the claims, the following inventions: [1] A battery monitoring device for monitoring a battery pack (2) having a configuration in which multiple battery cells (Cb) are connected in series, A voltage detection device (3) that detects the voltage of the plurality of battery cells via a detection path connected to both terminals of each of the plurality of battery cells, A filter (4, 22) is provided corresponding to each of the aforementioned plurality of battery cells and is interposed in series in the detection path, Equipped with, The voltage detection device is An A / D converter (7) that performs A / D conversion on the target voltage corresponding to the voltage of the plurality of battery cells, A path switching unit (6) that switches the path connected to the A / D converter, A detection control unit (5) controls the operation of the path switching unit and the A / D converter, and detects the voltage of each of the multiple battery cells in a time-division manner based on the digital signal output from the A / D converter, Equipped with, The detection control unit, When detecting the voltage of a target battery cell among the plurality of battery cells, the operation of the path switching unit is controlled so that the detection path corresponding to the target battery cell is connected to the A / D converter. A battery monitoring device that, when the potential difference between the voltage of the target battery cell in the current instance and the voltage of the target battery cell connected to the A / D converter by the previous detection path, or the voltage at a predetermined location in the path switching unit and the A / D converter in the initial state, exceeds a predetermined threshold, provides a non-detection period, which is a period during which the operation of the path switching unit is controlled so that a non-detection path with a smaller time constant than the detection path is connected to the A / D converter before detecting the voltage of the target battery cell in the current instance. [2] The battery monitoring device according to [1], wherein the route switching unit comprises one multiplexer (6), and the one multiplexer is configured to select one of the detection route and the non-detection route as the route to connect to the A / D converter. [3] The path switching unit is capable of performing a first switching operation that switches the path so that only one of the terminals of the target battery cell is connected to the A / D converter. The battery monitoring device according to claim [1] or [2], wherein the detection control unit controls the operation of the path switching unit so that it performs the first switching operation during the non-detection period. [4] The battery monitoring device according to any one of claims [1] to [3], wherein the detection control unit controls the operation of the path switching unit and the A / D converter such that the non-detection period is shorter than the detection period during which the path switching unit is controlled to detect the voltage of the target battery cell. [5] The path switching unit is capable of performing a second switching operation, which switches the paths so that the equalization paths, which are paths for discharging each of the plurality of battery cells, are connected to the A / D converter. The battery monitoring device according to any one of claims [1] to [4], wherein the detection control unit controls the operation of the path switching unit so that it performs the second switching operation during the non-detection period. [6] The battery monitoring device according to any one of claims [1] to [5], wherein the detection control unit determines whether the potential difference is equal to or greater than the threshold, and provides the non-detection period based on the determination result. [7] The battery monitoring device according to any one of claims [1] to [5], wherein the detection control unit pre-determines whether or not the potential difference is equal to or greater than the threshold value and sets the non-detection period in advance. [Explanation of symbols]

[0081] 1, 21... Battery monitoring device, 2... Battery pack, 3... Battery monitoring IC, 4, 22... Filter, 5... Control unit, 6... Multiplexer, 7... A / D converter, Cb... Battery cell.

Claims

1. A battery monitoring device for monitoring a battery pack (2) having a configuration in which multiple battery cells (Cb) are connected in series, A voltage detection device (3) that detects the voltage of the plurality of battery cells via a detection path connected to both terminals of each of the plurality of battery cells, A filter (4, 22) is provided corresponding to each of the plurality of battery cells and is interposed in series in the detection path, Equipped with, The voltage detection device is An A / D converter (7) that performs A / D conversion on the target voltage corresponding to the voltage of the plurality of battery cells, A path switching unit (6) that switches the path connected to the A / D converter, A detection control unit (5) controls the operation of the path switching unit and the A / D converter, and detects the voltage of each of the plurality of battery cells in a time-division manner based on the digital signal output from the A / D converter, Equipped with, The detection control unit, When detecting the voltage of a target battery cell among the plurality of battery cells, the operation of the path switching unit is controlled so that the detection path corresponding to the target battery cell is connected to the A / D converter. If the potential difference between the voltage of the target battery cell in the current instance and the voltage of the target battery cell connected to the A / D converter by the previous detection path, or the voltage at a predetermined location in the path switching unit and the A / D converter in the initial state, exceeds a predetermined threshold, a non-detection period is provided, which is a period during which the operation of the path switching unit is controlled so that a non-detection path with a smaller time constant than the detection path is connected to the A / D converter before detecting the voltage of the target battery cell in the current instance. The battery monitoring device comprises a path switching unit which includes a multiplexer (6) and is configured to select one of the detection path and the non-detection path as the path to connect to the A / D converter.

2. The path switching unit is capable of performing a first switching operation that switches the path so that only one of the terminals of the target battery cell is connected to the A / D converter. The battery monitoring device according to claim 1, wherein the detection control unit controls the operation of the path switching unit so that it performs the first switching operation during the non-detection period.

3. The battery monitoring device according to claim 1, wherein the detection control unit controls the operation of the path switching unit and the A / D converter such that the non-detection period is shorter than the detection period during which the path switching unit controls the operation of the path switching unit to detect the voltage of the target battery cell.

4. The path switching unit is capable of performing a second switching operation, which switches the paths so that the equalization paths, which are paths for discharging each of the plurality of battery cells, are connected to the A / D converter. The battery monitoring device according to claim 1, wherein the detection control unit controls the operation of the path switching unit so that it performs the second switching operation during the non-detection period.

5. The battery monitoring device according to claim 1, wherein the detection control unit determines whether the potential difference is equal to or greater than the threshold, and sets the non-detection period based on the determination result.

6. The battery monitoring device according to claim 1, wherein the detection control unit pre-determines whether or not the potential difference exceeds the threshold value and sets the non-detection period in advance.

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