Light-receiving element and light detection device
The photodetector's innovative groove structure improves pixel separation and uniformity by minimizing electron and hole flow between pixels, ensuring consistent sensitivity across the array.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SUMITOMO ELECTRIC INDUSTRIES LTD
- Filing Date
- 2022-11-24
- Publication Date
- 2026-05-19
AI Technical Summary
Existing light-receiving elements face challenges in achieving uniform sensitivity between pixels.
The photodetector incorporates a substrate with a first contact layer, a photodetector layer, a pixel separation adjustment layer, and grooves that separate the layers into pixels, including a third groove connected to the outermost first grooves, which minimizes the flow of holes and electrons between pixels, thereby improving sensitivity uniformity.
This design enhances the uniformity of sensitivity between pixels by reducing variations in photocurrent, suppressing dark current, and maintaining consistent sensitivity across the array.
Smart Images
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Abstract
Description
[Technical Field]
[0001] This disclosure relates to a light-receiving element and a light detection device. [Background technology]
[0002] A photodetector is disclosed that detects infrared radiation and has a semiconductor layer provided on top of a light-receiving layer in which grooves for pixel separation are formed. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2021-034644 [Overview of the project] [Problems that the invention aims to solve]
[0004] For light-receiving elements, there is a need to improve the uniformity of sensitivity between pixels.
[0005] This disclosure aims to provide a photodetector and a photodetector that can improve the uniformity of sensitivity between pixels. [Means for solving the problem]
[0006] The photodetector of this disclosure comprises a substrate having a first main surface, a first contact layer of a first conductivity type provided on the first main surface, a photodetector layer provided on the first contact layer, a pixel separation adjustment layer provided on the photodetector layer, a second contact layer of a second conductivity type provided on the pixel separation adjustment layer, a plurality of first grooves separating the second contact layer and the pixel separation adjustment layer into a plurality of pixels in a first direction parallel to the first main surface, a second groove formed in the second contact layer, the pixel separation adjustment layer and the photodetector layer outside the plurality of first grooves in the first direction and reaching the first contact layer, a third groove formed in the second contact layer and the photodetector layer between the plurality of first grooves and the second groove in the first direction, a first electrode in contact with the first contact layer at the bottom of the second groove, and a second electrode provided on the second contact layer, wherein the third groove is connected to the first groove located furthest out of the plurality of first grooves in the first direction. The pixel separation adjustment layer comprises a first semiconductor layer of the first conductivity type provided on the light-receiving layer and a second semiconductor layer of the second conductivity type provided on the first semiconductor layer, wherein the first semiconductor layer is exposed on the bottom surface of the first groove. ru. [Effects of the Invention]
[0007] According to this disclosure, the uniformity of sensitivity between pixels can be improved. [Brief explanation of the drawing]
[0008] [Figure 1] Figure 1 is a schematic diagram showing a light-receiving element according to the first embodiment. [Figure 2] Figure 2 is a cross-sectional view showing a light-receiving element according to the first embodiment. [Figure 3] Figure 3 is a cross-sectional view (part 1) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 4] Figure 4 is a cross-sectional view (part 2) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 5] Figure 5 is a cross-sectional view (part 3) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 6] Figure 6 is a cross-sectional view (part 4) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 7]FIG. 7 is a cross-sectional view (Part 5) showing a method for manufacturing a light receiving element according to the first embodiment. [Figure 8] FIG. 8 is a cross-sectional view (Part 6) showing a method for manufacturing a light receiving element according to the first embodiment. [Figure 9] FIG. 9 is a cross-sectional view (Part 7) showing a method for manufacturing a light receiving element according to the first embodiment. [Figure 10] FIG. 10 is a cross-sectional view (Part 8) showing a method for manufacturing a light receiving element according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view (Part 9) showing a method for manufacturing a light receiving element according to the first embodiment. [Figure 12] FIG. 12 is a cross-sectional view showing a light receiving element according to a reference example. [Figure 13] FIG. 13 is a cross-sectional view showing a light receiving element according to the second embodiment. [Figure 14] FIG. 14 is a cross-sectional view (Part 1) showing a method for manufacturing a light receiving element according to the second embodiment. [Figure 15] FIG. 15 is a cross-sectional view (Part 2) showing a method for manufacturing a light receiving element according to the second embodiment. [Figure 16] FIG. 16 is a cross-sectional view (Part 3) showing a method for manufacturing a light receiving element according to the second embodiment. [Figure 17] FIG. 17 is a cross-sectional view (Part 4) showing a method for manufacturing a light receiving element according to the second embodiment. [Figure 18] FIG. 18 is a cross-sectional view showing a photodetection device according to the third embodiment. [Embodiments for Carrying Out the Invention]
[0009] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.
[0010] [1] A photodetector according to one aspect of the present disclosure includes a substrate having a first main surface, a first contact layer of a first conductivity type provided on the first main surface, a photodetector layer provided on the first contact layer, a pixel separation adjustment layer provided on the photodetector layer, a second contact layer of a second conductivity type provided on the pixel separation adjustment layer, a plurality of first grooves that separate the second contact layer and the pixel separation adjustment layer into a plurality of pixels in a first direction parallel to the first main surface, a second groove formed in the second contact layer, the pixel separation adjustment layer and the photodetector layer outside the plurality of first grooves in the first direction and reaching the first contact layer, a third groove formed in the second contact layer and the photodetector layer between the plurality of first grooves and the second groove in the first direction, a first electrode in contact with the first contact layer at the bottom of the second groove, and a second electrode provided on the second contact layer, wherein the third groove connects to the first groove located furthest out of the plurality of first grooves in the first direction.
[0011] When light enters the light-receiving layer, holes and electrons are generated in the light-receiving layer, and in each pixel, the holes and electrons flow separately toward either the first or second contact layer depending on the potential difference between the first and second contact layers. At this time, holes and electrons can also be generated outside the third groove, i.e., outside the pixel, but because the third groove is formed, the holes and electrons are less likely to flow toward the second contact layer. Each pixel is less affected by the holes and electrons generated in the light-receiving layer outside the third groove, which suppresses variations in sensitivity between pixels and improves the uniformity of sensitivity between pixels.
[0012] [2] In [1], the pixel separation adjustment layer of the pixel located furthest out of the plurality of pixels in the first direction has, in a plan view perpendicular to the first main surface, a first region between two of the plurality of first grooves and a second region between the first region and the third groove, and the dimension of the second region in the first direction may be 2.5 μm or more and 3.5 μm or less. In this case, it is easier to achieve both the suppression of dark current in the outermost pixel and the improvement of sensitivity uniformity between pixels.
[0013] [3] In [2], the dimension of the second region in the first direction may be 2.7 μm or more and 3.5 μm or less. In this case, it is particularly easy to achieve both the suppression of dark current in the outermost pixels and the improvement of sensitivity uniformity between pixels.
[0014] [4] In any of [1] to [3], the first contact layer may be exposed on the bottom surface of the third groove. In this case, it is particularly easy to improve the uniformity of sensitivity between pixels.
[0015] [5] In any of [1] to [4], the pixel separation adjustment layer has a first semiconductor layer of the first conductivity type provided on the light receiving layer and a second semiconductor layer of the second conductivity type provided on the first semiconductor layer, and the first semiconductor layer may be exposed on the bottom surface of the first groove. In this case, pixel separation is easily achieved reliably.
[0016] [6] A photodetector according to another aspect of the present disclosure comprises a substrate having a first main surface, a first contact layer of a first conductivity type provided on the first main surface, a photodetector layer provided on the first contact layer, a pixel separation adjustment layer provided on the photodetector layer, a second contact layer of a second conductivity type provided on the pixel separation adjustment layer, a plurality of first grooves separating the second contact layer and the pixel separation adjustment layer into a plurality of pixels in a first direction parallel to the first main surface, a second groove formed in the second contact layer, the pixel separation adjustment layer and the photodetector layer outside the plurality of first grooves in the first direction and reaching the first contact layer, a first electrode in contact with the first contact layer at the bottom of the second groove, and a second electrode provided on the second contact layer, wherein the second groove connects to the first groove located furthest out of the plurality of first grooves in the first direction.
[0017] Similar to [1], when light enters the light-receiving layer, holes and electrons are generated in the light-receiving layer, and in each pixel, the holes and electrons flow separately toward either the first or second contact layer depending on the potential difference between the first and second contact layers. At this time, holes and electrons can also be generated in the part outside the second groove, i.e., outside the pixel, but because the second groove is formed, the holes and electrons are less likely to flow toward the second contact layer. Each pixel is less affected by the holes and electrons generated in the light-receiving layer outside the second groove, so that variations in sensitivity between pixels are suppressed and the uniformity of sensitivity between pixels can be improved.
[0018] [7] In [6], the pixel separation adjustment layer of the pixel located furthest out of the plurality of pixels in the first direction has, in a plan view perpendicular to the first main surface, a first region between two of the plurality of first grooves and a second region between the first region and the second groove, and the dimension of the second region in the first direction may be 2.5 μm or more and 3.5 μm or less. In this case, it is easier to achieve both the suppression of dark current in the outermost pixel and the improvement of sensitivity uniformity between pixels.
[0019] [8] In [7], the dimension of the second region in the first direction may be 2.7 μm or more and 3.5 μm or less. In this case, it is particularly easy to achieve both the suppression of dark current in the outermost pixels and the improvement of sensitivity uniformity between pixels.
[0020] [9] In any of [6] to [8], the pixel separation adjustment layer has a first semiconductor layer of the first conductivity type provided on the light receiving layer and a second semiconductor layer of the second conductivity type provided on the first semiconductor layer, and the first semiconductor layer may be exposed on the bottom surface of the first groove. In this case, pixel separation is easily achieved reliably.
[0021]
[10] A light detection device according to yet another aspect of the present disclosure comprises a light-receiving element of any of [1] to [9] and a circuit board connected to the light-receiving element. The light detection device having the above-mentioned light-receiving element improves the uniformity of sensitivity between pixels.
[0022] [Details of the embodiments of this disclosure] The embodiments of this disclosure will be described in detail below, but this disclosure is not limited thereto. In this specification and drawings, components having substantially the same functional configuration may be denoted by the same reference numerals to avoid redundant descriptions. In the following description, the XYZ Cartesian coordinate system will be used, but this coordinate system is defined for illustrative purposes only and does not limit the orientation of the photodetector or photodetector. Also, from any point, the +Z side may be referred to as upward, upper, or up, and the -Z side may be referred to as downward, lower, or down.
[0023] (First Embodiment) A first embodiment will be described. The first embodiment relates to a light-receiving element. Figure 1 is a schematic diagram showing a light-receiving element according to the first embodiment. Figure 2 is a cross-sectional view showing a light-receiving element according to the first embodiment. Figure 1 shows the arrangement of mesa, bumps, and grooves in a plan view. Figure 2 corresponds to a cross-sectional view along the line II-II in Figure 1.
[0024] The light-receiving element 100 according to the first embodiment has a plurality of pixels 1 that constitute a two-dimensional array. For example, 256 × 320 pixels are formed with a 30 μm pitch. The pixel pitch may be, for example, 50 μm or 90 μm. The light-receiving element 100 may have, for example, 512 × 640 pixels or 32 × 128 pixels.
[0025] As shown in Figure 1, the photodetector 100 includes a substrate 10, an n-type contact layer 21, a photodetector layer 31, an intermediate layer 32, a pixel separation adjustment layer 33, and a p-type contact layer 22. The photodetector 100 further includes a passivation film 41, an anti-reflective film 36, a p-electrode 52, a first n-electrode 51, a second n-electrode 53, wiring 54, an indium (In) bump 61, and an In bump 62.
[0026] The substrate 10 is, for example, an n-type indium phosphide (InP) substrate. The substrate 10 contains, for example, sulfur (S) in 5 × 10 18 cm -3 It is contained at a concentration of a certain degree. The substrate 10 has a first main surface 10a and a second main surface 10b opposite to the first main surface 10a. The thickness of the substrate 10 is, for example, about 300 μm.
[0027] The n-type contact layer 21 is provided on the first main surface 10a. The n-type contact layer 21 is, for example, an n-type InP layer. The thickness of the n-type contact layer 21 is, for example, about 2.0 μm. The n-type contact layer 21 is, for example, made of silicon (Si) in a 1 × 10⁻¹⁶ layer. 18 cm -3 It is contained at the above concentrations. The n-type contact layer 21 is an example of a first contact layer.
[0028] The light-receiving layer 31 is provided on the n-type contact layer 21. The light-receiving layer 31 is, for example, an indium gallium arsenide (InGaAs) layer. The thickness of the light-receiving layer 31 is, for example, about 4.0 μm. The light-receiving layer 31 is not doped with impurity elements, and the concentration of impurity elements contained in the light-receiving layer 31 is 1 × 10⁻¹⁶. 15 cm -3 The following applies:
[0029] The intermediate layer 32 is provided on top of the light-receiving layer 31. The intermediate layer 32 includes, for example, an indium gallium phosphide arsenide (InGaAsP) layer. The thickness of the intermediate layer 32 is, for example, about 0.05 μm. The intermediate layer 32 is not doped with impurity elements, and the concentration of impurity elements contained in the intermediate layer 32 is 2 × 10⁻¹⁶. 15 cm -3 The following applies: The band gap of the intermediate layer 32 is wider than the band gap of the light-receiving layer 31 and narrower than the band gap of the pixel separation adjustment layer 33. The intermediate layer 32 may contain multiple InGaAsP layers with different compositions. In this case, among the multiple InGaAsP layers, the band gap of the InGaAsP layers closer to the intermediate layer 32 is narrower. That is, among the multiple InGaAsP layers, the band gap widens stepwise as you move away from the intermediate layer 32.
[0030] The pixel separation adjustment layer 33 is provided above the intermediate layer 32. The pixel separation adjustment layer 33 has an n-type wide-gap layer 34 and a p-type wide-gap layer 35. The n-type wide-gap layer 34 is provided above the intermediate layer 32, and the p-type wide-gap layer 35 is provided above the n-type wide-gap layer 34. The n-type wide-gap layer 34 is, for example, an n-type InP layer. The thickness of the n-type wide-gap layer 34 is, for example, about 0.5 μm. The n-type wide-gap layer 34 contains, for example, Si at a concentration of 2×10 15 cm -3 or less. The p-type wide-gap layer 35 is, for example, a p-type InP layer. The thickness of the p-type wide-gap layer 35 is, for example, about 0.3 μm. The p-type wide-gap layer 35 contains, for example, zinc (Zn) at a concentration of 1×10 18 cm -3 or more. There is a pn junction 39 at the interface between the n-type wide-gap layer 34 and the p-type wide-gap layer 35. The band gap of the n-type wide-gap layer 34 and the band gap of the p-type wide-gap layer 35 are wider than the band gap of the intermediate layer 32 and the band gap of the light-receiving layer 31. The n-type wide-gap layer 34 is an example of the first semiconductor layer, and the p-type wide-gap layer 35 is an example of the second semiconductor layer.
[0031] The p-type contact layer 22 is provided above the p-type wide-gap layer 35. The p-type contact layer 22 is, for example, a p-type InGaAs layer. The p-type contact layer 22 contains, for example, Zn at a concentration of 2×10 19 cm -3 or more and 6×10 19 cm -3 or less. The thickness of the p-type contact layer 22 is, for example, about 0.2 μm. The p-type contact layer 22 is an example of the second contact layer.
[0032] Multiple first grooves 71 are formed in the p-type contact layer 22, the p-type wide gap layer 35, and a portion of the n-type wide gap layer 34. The first grooves 71 reach the n-type wide gap layer 34. The n-type wide gap layer 34 is exposed at the bottom surface of the first grooves 71. The first grooves 71 penetrate the pn junction 39. The first grooves 71 form a mesa 81 for each pixel 1, thereby separating the pixels. A portion of the first grooves 71 is formed at a constant pitch in the X-axis direction and extends in the Y-axis direction. Another portion of the first grooves 71 is formed at a constant pitch in the Y-axis direction and extends in the X-axis direction. The first grooves 71 separate the p-type contact layer 22 and the pixel separation adjustment layer 33 into multiple pixels 1 in the X-axis direction or Y-axis direction parallel to the first main surface 10a. For example, the depth of the first grooves 71 is about 0.5 μm and the width is about 5 μm. The planar shape of Mesa 81 is, for example, a square with a side length of 85 μm.
[0033] Outside of the multiple first grooves 71 in the X-axis or Y-axis direction, a second groove 72 is formed in the p-type contact layer 22, the p-type wide-gap layer 35, the n-type wide-gap layer 34, the intermediate layer 32, the light-receiving layer 31, and a portion of the n-type contact layer 21. The second groove 72 reaches the n-type contact layer 21. The n-type contact layer 21 is exposed at the bottom surface of the second groove 72. In a plan view perpendicular to the first main surface 10a, the second groove 72 is formed in an annular shape and surrounds all the first grooves 71. The second groove 72 separates the pixel region 11 and the electrode connection region 12 from each other. A mesa 81 is formed in the pixel region 11. A mesa 82 is formed in the electrode connection region 12. The width of the second groove 72 is, for example, about 450 μm.
[0034] Between multiple first grooves 71 and second grooves 72 in the X-axis or Y-axis direction, a third groove 73 is formed in the p-type contact layer 22, the p-type wide gap layer 35, the n-type wide gap layer 34, the intermediate layer 32, and the light-receiving layer 31. The third groove 73 reaches the n-type contact layer 21. The n-type contact layer 21 is exposed at the bottom surface of the third groove 73. In a plan view perpendicular to the first main surface 10a, the third groove 73 is formed in an annular shape and surrounds all the first grooves 71. The third groove 73 connects to the first groove 71 located furthest out in the X-axis direction and the first groove 71 located furthest out in the Y-axis direction among the multiple first grooves 71. The light-receiving layer 31 of the pixel 1 located on the outermost periphery of the 2D array is exposed in the third groove 73. In other words, the light-receiving layer 31 of the pixel 1 located furthest out in the X-axis direction and the light-receiving layer 31 of the pixel 1 located furthest out in the Y-axis direction among the multiple pixels 1 are exposed in the third groove 73. The width of the third groove 73 is, for example, 1.5 μm or more and 3.0 μm or more. A mesa 83 is formed between the second groove 72 and the third groove 73. The width of the mesa 83 is, for example, 60 μm.
[0035] The passivation film 41 covers the p-type contact layer 22, the p-type wide-gap layer 35, the n-type wide-gap layer 34, the intermediate layer 32, the light-receiving layer 31, the n-type contact layer 21, and the substrate 10. The passivation film 41 is, for example, a silicon nitride (SiN) film. The thickness of the passivation film 41 is, for example, about 0.2 μm. The passivation film 41 has an opening 41a that exposes the p-type contact layer 22 of the mesa 81, and an opening 41b that exposes the n-type contact layer 21 between the pixel region 11 and the electrode connection region 12. The side surface of the pn junction 39 is in contact with the passivation film 41.
[0036] In each of the mesa 81, a p-electrode 52 is formed on a p-type contact layer 22. The p-electrode 52 is in contact with the p-type contact layer 22 through an opening 41a. The p-electrode 52 is composed of a metal multilayer film in which, for example, a titanium (Ti) layer and a platinum (Pt) layer are stacked in sequence. For example, the thickness of the Ti layer is about 50 nm, and the thickness of the Pt layer is about 80 nm.
[0037] A first n electrode 51 is formed on an n-type contact layer 21 between the pixel region 11 and the electrode connection region 12. The first n electrode 51 is in contact with the n-type contact layer 21 through an opening 41b. A second n electrode 53 is formed on a passivation film 41 on the mesa 82. The first n electrode 51 and the second n electrode 53 are composed of a metal multilayer film, for example, a Ti layer and a Pt layer stacked in sequence. For example, the thickness of the Ti layer is about 50 nm and the thickness of the Pt layer is about 80 nm.
[0038] The wiring 54 connects the first n electrode 51 and the second n electrode 53. The wiring 54 is formed on the passivation film 41. The wiring 54 is composed of a metal multilayer film in which, for example, a Ti layer and a gold (Au) layer are stacked in sequence. For example, the thickness of the Ti layer is about 50 nm and the thickness of the Au layer is about 600 nm.
[0039] An In bump 62 is provided on top of the p electrode 52. In each pixel 1 in the pixel region 11, a circular p electrode 52 is formed on the upper surface of the mesa 81, and a circular In bump 62 is formed on top of the p electrode 52.
[0040] In the electrode connection region 12, an In bump 61 is provided on the second n electrode 53. The In bump 61 has a circular planar shape and is formed on the second n electrode 53.
[0041] The second n electrode 53 and p electrode 52 are connected to electrodes provided on the readout circuit board 400 (see Figure 18) via In bumps 61 and 62, respectively. The height of In bumps 61 and 62 is, for example, about 10 μm.
[0042] The anti-reflective coating 36 is provided on the second main surface 10b. The anti-reflective coating 36 is, for example, a SiN film.
[0043] Next, a method for manufacturing the light-receiving element 100 according to the first embodiment will be described. Figures 3 to 11 are cross-sectional views showing the method for manufacturing the light-receiving element according to the first embodiment.
[0044] First, as shown in Figure 3, an n-type contact layer 21, a light-receiving layer 31, an intermediate layer 32, an n-type wide-gap layer 34, a p-type wide-gap layer 35, and a p-type contact layer 22 are sequentially formed on the first main surface 10a of the substrate 10 by epitaxial growth. Metal-organic vapor phase epitaxy (MOVPE) is used for the epitaxial growth of the compound semiconductor layers described above. The thickness of the substrate 10 is, for example, 400 μm to 500 μm.
[0045] Next, as shown in Figure 4, a SiN film 191 with a thickness of approximately 0.4 μm is formed on the p-type contact layer 22 by plasma chemical vapor deposition (CVD). Then, a photoresist is applied to the SiN film 191, and a resist pattern (not shown) is formed by exposure and development using an exposure apparatus. This resist pattern has openings in the region where the first groove 71 is formed, the region where the second groove 72 is formed, and the region where the third groove 73 is formed. A mask is formed from the SiN film 191 by removing the SiN film 191 at the openings in the resist pattern by wet etching using buffered hydrofluoric acid. After that, the resist pattern is removed with an organic solvent or the like.
[0046] Next, as shown in Figure 5, the p-type contact layer 22, the p-type wide gap layer 35, and a portion of the n-type wide gap layer 34 exposed at the opening of the SiN film 191 are removed by dry etching such as reactive ion etching (RIE). In this RIE, for example, a mixed gas of silicon tetrachloride (SiCl4) gas and argon (Ar) gas is used. In this way, the first groove 71 for pixel separation is formed. In addition, a temporary groove 72X is formed in the region where the second groove 72 is formed, and a temporary groove 73X is formed in the region where the third groove 73 is formed. With the formation of the first groove 71, a mesa 81 is formed, and each pixel 1 (see Figure 1) is separated.
[0047] Next, deposits (not shown) generated by dry etching are removed. These deposits can be removed using buffered hydrofluoric acid. Damage may occur during dry etching near the first groove 71 of the p-type contact layer 22, the p-type wide gap layer 35, and the n-type wide gap layer 34. Therefore, after removing the deposits, wet etching is performed to remove the areas damaged during dry etching. For example, the portions of the p-type contact layer 22, the p-type wide gap layer 35, and the n-type wide gap layer 34 exposed to the first groove 71 are removed to a thickness of 0.1 μm. After that, the SiN film 191 is removed with buffered hydrofluoric acid.
[0048] Next, as shown in Figure 6, a SiN film 192 with a thickness of approximately 0.8 μm is formed by plasma CVD to cover the p-type contact layer 22, the p-type wide gap layer 35, and the n-type wide gap layer 34. Then, a photoresist is applied to the SiN film 192, and a resist pattern (not shown) is formed by exposure and development using an exposure apparatus. This resist pattern has openings in the region where the second groove 72 is formed and in the region where the third groove 73 is formed. A mask is formed from the SiN film 192 by removing the SiN film 192 at the openings in the resist pattern by wet etching using buffered hydrofluoric acid. After that, the resist pattern is removed with an organic solvent or the like.
[0049] Next, as shown in Figure 7, the n-type wide gap layer 34, the intermediate layer 32, the light-receiving layer 31, and a portion of the n-type contact layer 21 exposed at the opening of the SiN film 192 are removed by dry etching such as RIE. For this RIE, a mixed gas of SiCl4 gas and Ar gas is used, for example. In this way, the second groove 72 and the third groove 73 are formed, and the mesa 82 is formed outside the second groove 72 when viewed from the mesa 81. Also, the mesa 83 is formed between the first groove 71 and the second groove 72. Since the width of the third groove 73 is narrower than the width of the second groove 72, the etching rate differs between the second groove 72 and the third groove 73 due to the microloading effect, but both the second groove 72 and the third groove 73 can be formed to reach the n-type contact layer 21.
[0050] Next, deposits (not shown) generated by dry etching are removed. These deposits can be removed using buffered hydrofluoric acid. Damage may occur during dry etching near the second groove 72 or third groove 73 of the n-type wide gap layer 34, the intermediate layer 32, the photodetector layer 31, and the n-type contact layer 21. Therefore, after removing the deposits, wet etching is performed to remove the areas damaged during dry etching. For example, the portions of the n-type wide gap layer 34, the intermediate layer 32, the photodetector layer 31, and the n-type contact layer 21 that are exposed to the second groove 72 or third groove 73 are removed to a thickness of 0.1 μm. After that, the SiN film 192 is removed with buffered hydrofluoric acid.
[0051] Next, as shown in Figure 8, a passivation film 41 is formed. Specifically, a SiN film (not shown) is deposited over the entire surface by plasma CVD, a photoresist is applied on top of the deposited SiN film, and exposure and development are performed using an exposure apparatus to form a resist pattern (not shown). This resist pattern has openings in the region where the p electrode 52 is formed and in the region where the first n electrode 51 is formed, and the SiN film in the openings of the resist pattern is removed by dry etching such as RIE. As a result, a passivation film 41 is formed having an opening 41a that exposes the surface of the p-type contact layer 22 of the mesa 81 and an opening 41b that exposes the surface of the n-type contact layer 21.
[0052] Next, as shown in Figure 9, a p-electrode 52 is formed on the p-type contact layer 22, a first n-electrode 51 is formed on the n-type contact layer 21, and a second n-electrode 53 is formed on the mesa 82 via a passivation film 41. The p-electrode 52, first n-electrode 51, and second n-electrode 53 are formed by the lift-off method. Specifically, a resist pattern (not shown) is formed having openings in the region where the p-electrode 52 is formed, the region where the first n-electrode 51 is formed, and the region where the second n-electrode 53 is formed. A metal multilayer film in which Ti layers and Pt layers are sequentially stacked is deposited by electron beam (EB) deposition, and then the film is immersed in an organic solvent or the like. As a result, the resist pattern and the metal multilayer film on top of the resist pattern are removed, and the p-electrode 52, first n-electrode 51, and second n-electrode 53 are formed from the remaining metal multilayer film.
[0053] Furthermore, wiring 54 connecting the first n electrode 51 and the second n electrode 53 is formed by the lift-off method. Specifically, a resist pattern (not shown) having an opening in the region where the wiring 54 is to be formed is formed, a metal multilayer film in which a Ti layer and an Au layer are sequentially stacked is deposited by EB deposition, and then the film is immersed in an organic solvent or the like. As a result, the resist pattern and the metal multilayer film on top of the resist pattern are removed, and the wiring 54 is formed from the remaining metal multilayer film. The EB deposition for forming the wiring 54 is, for example, oblique deposition from a direction inclined from a direction perpendicular to the first main surface 10a.
[0054] Next, as shown in Figure 10, the second main surface 10b of the substrate 10 is polished to a mirror finish. Then, an anti-reflective coating 36 is formed on the second main surface 10b. The anti-reflective coating 36 is formed by plasma CVD.
[0055] Next, as shown in Figure 11, an In bump 61 is formed on the second n electrode 53, and an In bump 62 is formed on the p electrode 52. The In bumps 61 and 62 are formed by the lift-off method. After this, the chip is divided.
[0056] In this way, the light-receiving element 100 according to the first embodiment can be manufactured.
[0057] The photodetector 100 is used with a reverse bias voltage of, for example, -8V applied between the p electrode 52 and the second n electrode 53. When near-infrared light is incident on the photodetector layer 31 from the second main surface 10b of the substrate 10 with the reverse bias voltage applied, holes and electrons are generated in the photodetector layer 31. The electrons flow toward the n-type contact layer 21, and the holes flow toward the p-type contact layer 22.
[0058] Holes and electrons are generated not only in the light-receiving layer 31 below the mesa 81 within the pixel region 11, but also in the light-receiving layer 31 below the mesa 83. However, in this embodiment, the light-receiving layer 31 below the mesa 83 is separated from the light-receiving layer 31 below the mesa 81 by the third groove 73. Therefore, even if holes and electrons are generated in the light-receiving layer 31 below the mesa 83, these holes do not flow toward the p-type contact layer 22 within the pixel region 11, and the holes and electrons recombine and disappear within the light-receiving layer 31. Consequently, each pixel 1 within the pixel region 11 is not affected by the holes and electrons generated in the light-receiving layer 31 below the mesa 83. Therefore, when light of the same intensity is incident, the same magnitude of photocurrent flows through each pixel 1. In other words, variations in sensitivity between pixels 1 are suppressed.
[0059] Here, a reference example will be described for comparison with the first embodiment. Figure 12 is a cross-sectional view showing a light-receiving element according to the reference example. Figure 12 corresponds to a cross-sectional view along the line II-II in Figure 1.
[0060] In the reference example of the photodetector 100X, the third groove 73 is not formed. Therefore, in the photodetector 100X, when holes and electrons are generated in the photodetector layer 31 below the mesa 83, the holes can flow toward the p-type contact layer 22 of the nearest pixel 1, i.e., the pixel 1 located on the outermost edge of the two-dimensional array. As a result, when light of the same intensity is incident, a larger photocurrent flows in the outermost pixel 1 than in the other pixels 1. In other words, the sensitivity of the outermost pixel 1 is higher than that of the other pixels 1.
[0061] Thus, the light-receiving element 100 can suppress variations in sensitivity and improve sensitivity uniformity.
[0062] Mesa 83 functions as a dummy mesa relative to mesa 81, contributing to ensuring uniformity of exposure and etching during the formation of the first groove 71.
[0063] The exposure of the n-type wide gap layer 34 at the bottom of the first groove 71 facilitates reliable pixel separation.
[0064] The pixel separation adjustment layer 33 of the outermost pixel 1, i.e., the pixel 1 closest to the third groove 73, has, in a plan view perpendicular to the first main surface 10a, a first region 33a between the two first grooves 71 and a second region 33b between the first region 33a and the third groove 73. The dimensions of the second region 33b in the X-axis direction and the Y-axis direction are preferably 2.5 μm or more and 3.5 μm or less. If the dimensions of the second region 33b in the X-axis direction and the Y-axis direction are less than 2.5 μm, there is a risk that dark current will easily flow through the side surface of the pixel 1. Also, if the dimensions of the second region 33b in the X-axis direction and the Y-axis direction are greater than 3.5 μm, there is a risk that the sensitivity of the pixel 1 will be higher than that of other pixels 1. The dimensions of the second region 33b are more preferably 2.7 μm or more and 3.5 μm or less.
[0065] The third groove 73 only needs to separate at least a portion of the light-receiving layer 31 in the thickness direction, and does not need to reach the n-type contact layer 21. In other words, the light-receiving layer 31 may be exposed at the bottom surface of the third groove 73. If the third groove 73 separates at least a portion of the light-receiving layer 31 in the thickness direction, the flow from the light-receiving layer 31 below the mesa 83 to the p-type contact layer 22 in the pixel region 11 can be suppressed, and variations in sensitivity between pixels 1 are suppressed. However, if the n-type contact layer 21 is exposed at the bottom surface of the third groove 73, it is particularly easy to improve the uniformity of sensitivity between pixels 1.
[0066] (Second Embodiment) A second embodiment will be described. 2The embodiment differs from the first embodiment primarily in that it does not include the mesa 83. Figure 13 is a cross-sectional view showing the photodetector according to the second embodiment. Figure 13 corresponds to a cross-sectional view along the line II-II in Figure 1.
[0067] In the photodetector 200 according to the second embodiment, a plurality of first grooves 71 are formed in the p-type contact layer 22, the p-type wide gap layer 35, and a portion of the n-type wide gap layer 34. Furthermore, outside the plurality of first grooves 71 in the X-axis direction or the Y-axis direction, a second groove 72 is formed in the p-type contact layer 22, the p-type wide gap layer 35, the n-type wide gap layer 34, the intermediate layer 32, the photodetector layer 31, and a portion of the n-type contact layer 21. However, the photodetector 200 does not have a third groove 73. The second groove 72 connects to the first groove 71 located furthest out in the X-axis direction and the first groove 71 located furthest out in the Y-axis direction among the plurality of first grooves 71. The photodetector layer 31 of the pixel 1 located on the outermost periphery of the two-dimensional array is exposed to the second groove 72. In other words, among the multiple pixels 1, the light-receiving layer 31 of the pixel 1 located furthest in the X-axis direction and the light-receiving layer 31 of the pixel 1 located furthest in the Y-axis direction are exposed to the second groove 72. The width of the second groove 72 is, for example, about 450 μm.
[0068] Other configurations of the second embodiment are the same as those of the first embodiment.
[0069] Next, 2 Image of light-receiving element 2 The manufacturing method for 00 will now be described. Figures 14 to 17 are cross-sectional views showing the manufacturing method for the light-receiving element according to the second embodiment.
[0070] First, as in the first embodiment, an n-type contact layer 21, a light-receiving layer 31, an intermediate layer 32, an n-type wide-gap layer 34, a p-type wide-gap layer 35, and a p-type contact layer 22 are sequentially formed on the first main surface 10a of the substrate 10 by epitaxial growth (see Figure 3).
[0071] Next, as shown in Figure 14, a SiN film 291 with a thickness of approximately 0.4 μm is formed on the p-type contact layer 22 by plasma CVD. Then, a photoresist is applied on the SiN film 291, and a resist pattern (not shown) is formed by exposure and development using an exposure apparatus. This resist pattern has openings in the region where the first groove 71 is formed and the region where the second groove 72 is formed. A mask is formed from the SiN film 291 by removing the SiN film 291 at the openings of the resist pattern by wet etching using buffered hydrofluoric acid. After that, the resist pattern is removed with an organic solvent or the like.
[0072] Next, as shown in Figure 15, the p-type contact layer 22, the p-type wide gap layer 35, and a portion of the n-type wide gap layer 34 exposed at the opening of the SiN film 291 are removed by dry etching such as RIE. In this way, the first groove 71 for pixel separation is formed. In addition, a temporary groove 72X is formed in the region where the second groove 72 is to be formed. A mesa 81 is formed along with the formation of the first groove 71, and each pixel 1 (see Figure 1) is separated.
[0073] Next, the deposits (not shown) generated by dry etching are removed. Then, wet etching is performed to remove any areas damaged during dry etching. Finally, the SiN film 291 is removed with buffered hydrofluoric acid.
[0074] Next, as shown in Figure 16, a SiN film 292 with a thickness of approximately 0.8 μm is formed by plasma CVD to cover the p-type contact layer 22, the p-type wide gap layer 35, and the n-type wide gap layer 34. Then, a photoresist is applied to the SiN film 292, and a resist pattern (not shown) is formed by exposure and development using an exposure apparatus. This resist pattern has openings in the region where the second groove 72 is formed. A mask is formed from the SiN film 292 by removing the SiN film 292 at the openings in the resist pattern by wet etching using buffered hydrofluoric acid. After that, the resist pattern is removed with an organic solvent or the like.
[0075] Next, as shown in Figure 17, the n-type wide gap layer 34, the intermediate layer 32, the light-receiving layer 31, and a portion of the n-type contact layer 21 exposed at the opening of the SiN film 292 are removed by dry etching such as RIE. In this way, the second groove 72 is formed, and the mesa 82 is formed outside the second groove 72 when viewed from the mesa 81.
[0076] Next, as in the first embodiment, the process from the removal of the unillustrated deposits generated by dry etching is carried out.
[0077] In this way, the light-receiving element 200 according to the second embodiment can be manufactured.
[0078] The light-receiving element 200 also helps to suppress variations in sensitivity and improve sensitivity uniformity.
[0079] In the outermost pixel 1, as in the first embodiment, the dimensions of the second region 33b in the X-axis direction and the Y-axis direction are preferably 2.5 μm or more and 3.5 μm or less, and more preferably 2.7 μm or more and 3.5 μm or less.
[0080] (Third embodiment) Next, a third embodiment will be described. The third embodiment relates to a photodetector including the light-receiving element 100 according to the first embodiment. Figure 18 is a cross-sectional view showing the photodetector according to the third embodiment.
[0081] The photodetector 300 according to the third embodiment includes a photodetector 100 and a readout integrated circuit (ROIC) 400. The readout integrated circuit 400 includes a wiring board 410, a pixel electrode 452, and a common electrode 451. The pixel electrode 452 and the common electrode 451 are arranged on one side of the wiring board 410. The readout integrated circuit 400 includes a circuit for reading the signal output from the photodetector 100, such as a multiplexer. The readout integrated circuit 400 is an example of a circuit board.
[0082] The photodetector 300 further includes a connecting member 352 that connects the p electrode 52 and the pixel electrode 452, and a connecting member 351 that connects the second n electrode 53 and the common electrode 451. The connecting member 351 is composed of an In bump 61 and an In bump that was provided on the common electrode 451 of the read circuit board 400 before bonding. The connecting member 352 is composed of an In bump 62 and an In bump that was provided on the pixel electrode 452 of the read circuit board 400 before bonding.
[0083] According to the third embodiment, the uniformity of sensitivity between pixels can be improved.
[0084] Alternatively, a light-receiving element 200 may be used instead of the light-receiving element 100.
[0085] Although embodiments have been described in detail above, the invention is not limited to any particular embodiment, and various modifications and changes are possible within the scope described in the claims. [Explanation of symbols]
[0086] 1: Pixel 10: Circuit board 10a: First main surface 10b: Second main surface 11: Pixel area 12: Electrode connection area 21: n-type contact layer 22: p-type contact layer 31: Light receiving layer 32: Middle Class 33: Pixel separation adjustment layer 33a:First area 33b:Second area 34: n-type wide gap layer 35: p-type wide gap layer 36: Anti-reflection film 39: pn junction 41: Passivation membrane 41a, 41b: Opening 51: 1st n electrode 52:p electrode 53: 2nd n electrode 54: Wiring 61, 62: In Bump 71: 1st groove 72:Second groove 72X, 73X: Temporary groove 73: Third groove 81, 82, 83: Mesa 100, 100X, 200: Photodetector 191, 192, 291, 292: SiN film 300: Light detection device 351 、3 52: Connecting member 400: Readout circuit board 410: Wiring board 451: Common electrode 452: Pixel electrode
Claims
1. A substrate having a first main surface, A first contact layer of a first conductivity type is provided on the first main surface, A light-receiving layer provided on the first contact layer, A pixel separation adjustment layer provided on the light-receiving layer, A second contact layer of second conductivity type is provided on the aforementioned pixel separation adjustment layer, A plurality of first grooves that separate the second contact layer and the pixel separation adjustment layer into a plurality of pixels in a first direction parallel to the first main surface, Outside the plurality of first grooves in the first direction, a second groove is formed in the second contact layer, the pixel separation adjustment layer, and the light receiving layer, and reaches the first contact layer, Between the plurality of first grooves and the second groove in the first direction, a third groove formed in the second contact layer and the light-receiving layer, At the bottom of the second groove, the first electrode in contact with the first contact layer, A second electrode provided on the second contact layer, It has, The third groove is connected to the first groove located furthest outward in the first direction among the plurality of first grooves. The aforementioned pixel separation adjustment layer is A first semiconductor layer of the first conductivity type is provided on the light-receiving layer, A second semiconductor layer of the second conductivity type is provided on the first semiconductor layer, It has, A light-receiving element in which the first semiconductor layer is exposed at the bottom surface of the first groove.
2. Among the plurality of pixels, the pixel separation adjustment layer of the pixel located furthest out in the first direction is, in a plan view perpendicular to the first main surface, The first region between two of the plurality of first grooves, The second region between the first region and the third groove, It has, The light-receiving element according to claim 1, wherein the dimension of the second region in the first direction is 2.5 μm or more and 3.5 μm or less.
3. The light-receiving element according to claim 2, wherein the dimension of the second region in the first direction is 2.7 μm or more and 3.5 μm or less.
4. The light-receiving element according to any one of claims 1 to 3, wherein the first contact layer is exposed on the bottom surface of the third groove.
5. A light-receiving element according to any one of claims 1 to 3, A circuit board connected to the aforementioned light-receiving element, A light detection device having the following features.