Semiconductor equipment

By introducing a second conductive portion with opposite stress direction and a cavity to buffer stress, the semiconductor device addresses warpage and resistance issues, ensuring structural integrity and improved performance.

JP7867455B2Active Publication Date: 2026-05-29KK TOSHIBA +1

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
KK TOSHIBA
Filing Date
2023-02-06
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Semiconductor devices with capacitors in trenches experience warpage due to stress from conductive portions, which can lead to wafer warping and increased electrical resistance, affecting performance, especially in high-frequency applications.

Method used

Incorporating a second conductive portion within the semiconductor layer that generates stress in the opposite direction to the first conductive portion, offsetting stress and reducing warpage, while using a cavity to further buffer stress and lower electrical resistance.

Benefits of technology

The solution effectively suppresses warpage and reduces electrical resistance, enhancing the semiconductor device's performance by maintaining structural integrity and improving frequency characteristics.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a semiconductor device capable of suppressing warpage.SOLUTION: A semiconductor device includes a semiconductor layer, an insulating film, a first conductive portion, and a second conductive portion. The first conductive portion is provided in the semiconductor layer. The insulating film is provided in the semiconductor layer. The insulating film is provided between the semiconductor layer and the first conductive portion. The second conductive portion is provided in the semiconductor layer. The second conductive portion is provided so that the first conductive portion is positioned between the second conductive portion and the insulating film. The second conductive portion is electrically connected to the first conductive portion. The second conductive portion produces a stress in an opposite direction to a direction of a stress produced by the first conductive portion.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor device.

Background Art

[0002] A semiconductor device in which a capacitor is formed in a trench of a semiconductor layer has been proposed. This semiconductor device has a structure in which an insulating film is provided on the semiconductor layer inside the trench, and a conductive portion is provided on the insulating film. Thereby, charge is accumulated between the semiconductor layer and the conductive portion. In such a semiconductor device, warpage due to the stress of the conductive portion is a concern.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The problem to be solved by the present invention is to provide a semiconductor device capable of suppressing warpage.

Means for Solving the Problems

[0005] The semiconductor device according to the embodiment includes a semiconductor layer, an insulating film, a first conductive portion, and a second conductive portion. The first conductive portion is provided in the semiconductor layer. The insulating film is provided in the semiconductor layer. The insulating film is provided between the semiconductor layer and the first conductive portion. The second conductive portion is provided in the semiconductor layer. The second conductive portion is provided such that the first conductive portion is positioned between the second conductive portion and the insulating film. The second conductive portion is electrically connected to the first conductive portion. The second conductive portion generates a stress in a direction opposite to the direction of the stress of the first conductive portion.

Brief Description of the Drawings

[0006] [Figure 1] Figure 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Figure 2] Figure 2 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Figure 3] Figure 3 is a schematic cross-sectional view illustrating a semiconductor device according to a reference example. [Figure 4] Figures 4(a) to 4(c) are schematic cross-sectional views illustrating a semiconductor device according to a modified embodiment. [Figure 5] Figure 5 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. [Figure 6] Figure 6 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. [Figure 7] Figures 7(a) to 7(c) are schematic cross-sectional views illustrating a semiconductor device according to a modified embodiment. [Figure 8] Figure 8 is a schematic perspective view illustrating a semiconductor device according to an embodiment. [Figure 9] Figure 9 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Modes for carrying out the invention]

[0007] Each embodiment of the present invention will be described below with reference to the drawings. Drawings are schematic or conceptual, and the relationships between the thickness and width of each part, as well as the ratios of the sizes of different parts, are not necessarily identical to those of reality. Even when representing the same part, the dimensions and ratios may differ between drawings. In this specification and in each figure, elements similar to those already described are denoted by the same reference numerals, and detailed explanations are omitted as appropriate.

[0008] Figures 1 and 2 are schematic cross-sectional views illustrating semiconductor devices according to the embodiment. Figure 1 corresponds to the cross-section along line AA in Figure 2. Figure 2 corresponds to the cross-section along line BB in Figure 1.

[0009] As shown in Figure 1, the semiconductor device 100 according to this embodiment includes a semiconductor layer 10, an insulating film 20, a first conductive portion 30, a second conductive portion 40, and a third conductive portion 50. The semiconductor device 100 is, for example, a silicon capacitor.

[0010] In describing the embodiments, the XYZ Cartesian coordinate system is used. The direction from the semiconductor layer 10 toward the third conductive part 50 is defined as the Z direction (first direction). The two directions perpendicular to the Z direction and mutually orthogonal are defined as the X and Y directions. For explanatory purposes, the direction from the semiconductor layer 10 toward the third conductive part 50 may be referred to as "up," and the opposite direction as "down." These directions are based on the relative positional relationship between the semiconductor layer 10 and the third conductive part 50 and are independent of the direction of gravity.

[0011] The semiconductor layer 10 is, for example, a semiconductor substrate and has an upper surface 10s (for example, the main surface of the semiconductor substrate). The Z direction corresponds to the direction perpendicular to the upper surface 10s of the semiconductor layer 10. The upper surface 10s extends along the XY plane.

[0012] A trench T is provided at the top of the semiconductor layer 10. The trench T has a trench bottom surface Tb and a trench side surface Ts that extends upward from the trench bottom surface Tb, and a trench inner surface Ta.

[0013] In other words, a protruding convex portion 11 (e.g., a mesa portion) is provided on the upper part of the semiconductor layer 10. The convex portion 11 is located between adjacent trenches T in the XY plane. The side surface of the convex portion 11 corresponds to the trench side surface Ts, and the upper surface 11s of the convex portion 11 corresponds to the upper surface 10s of the semiconductor layer 10. In this example, the trench side surface Ts is substantially parallel to the Z direction, but it is not limited to this and may be inclined with respect to the Z direction.

[0014] The depth TD of the trench T (i.e., the length along the Z direction from the top surface 10s to the bottom surface Tb of the trench) is, for example, between 10 micrometers (μm) and 100 μm.

[0015] The semiconductor layer 10 contains, for example, silicon. For the semiconductor layer 10, a single crystal silicon substrate is used, for example. The semiconductor layer 10 is, for example, of n-type and doped with n-type impurities such as phosphorus and arsenic. The n-type impurity concentration in the upper part of the semiconductor layer 10 where the trench T is formed may be higher than the n-type impurities in the lower part of the semiconductor layer 10. However, the semiconductor layer 10 may be of p-type.

[0016] The insulating film 20 is laminated on the semiconductor layer 10. The insulating film 20 has a portion provided on the inner surface Ta of the trench T. That is, a part of the insulating film 20 is provided along the inner surface Ta of the trench and is in contact with the inner surface Ta of the trench.

[0017] More specifically, a part of the insulating film 20 is along the trench side surface Ts and in contact with the trench side surface Ts. Another part of the insulating film 20 is along the trench bottom surface Tb and in contact with the trench bottom surface Tb. Further, the insulating film 20 has a portion along the upper surface 11s of the convex portion 11 and in contact with the upper surface 11s of the convex portion 11. That is, the insulating film 20 is continuously provided so as to cover the inner surface Ta of the trench and the upper part of the convex portion 11.

[0018] The insulating film 20 contains at least any one of, for example, silicon oxide (SiO2), silicon nitride (SiN), and silicon oxynitride (SiON). The thickness of the insulating film 20 (the length L20b of the insulating film 20 along the trench side surface Ts in the direction perpendicular to the trench side surface Ts) is, for example, 10 nm or more and 300 nm or less.

[0019] The first conductive part 30 is laminated on the insulating film 20. The first conductive part 30 has a portion provided on the insulating film 20 within the trench T. That is, a part of the first conductive part 30 is located inside the trench T and closer to the inside of the trench T than the insulating film 20 within the trench T. A part of the first conductive part 30 is provided along the insulating film 20 within the trench T and is in contact with the insulating film 20. The first conductive part 30 is insulated from the semiconductor layer 10 by the insulating film 20.

[0020] More specifically, the first conductive portion 30 is in contact with a portion of the insulating film 20 along the trench side surface Ts. Furthermore, the first conductive portion 30 is in contact with a portion of the insulating film 20 along the trench bottom surface Tb. Additionally, the first conductive portion 30 is in contact with a portion of the insulating film 20 along the upper surface 11s of the protrusion 11. In other words, the first conductive portion 30 is continuously provided so as to cover a portion of the insulating film 20 along the trench inner surface Ta and a portion of the insulating film 20 along the upper surface 11s of the protrusion 11.

[0021] For example, polysilicon can be used for the first conductive part 30. The polysilicon is doped with impurities such as n-type impurities.

[0022] The second conductive portion 40 is laminated on the first conductive portion 30. The second conductive portion 40 has a portion that is provided on the first conductive portion 30 within the trench T. That is, a part of the second conductive portion 40 is located inside the trench T, further inside than the first conductive portion 30. A part of the second conductive portion 40 is provided along the first conductive portion 30 within the trench T and is in contact with the first conductive portion 30. The second conductive portion 40 is electrically connected to the first conductive portion 30. The second conductive portion 40 may be a metal film containing metal.

[0023] More specifically, the second conductive portion 40 is in contact with a portion of the first conductive portion 30 along the trench side Ts (the insulating film 20 on the trench side Ts). The second conductive portion 40 is also in contact with a portion of the first conductive portion 30 along the trench bottom Tb (the insulating film 20 on the trench bottom Tb). Furthermore, the second conductive portion 40 is in contact with a portion of the first conductive portion 30 along the upper surface 11s of the protrusion 11 (the insulating film 20 on the upper surface 11s). In other words, the second conductive portion 40 is continuously provided so as to cover a portion of the first conductive portion 30 along the trench inner surface Ta and a portion of the first conductive portion 30 along the upper surface 11s of the protrusion 11. In this example, the inside of the first conductive portion 30 within the trench T is completely filled by the second conductive portion 40.

[0024] The second conductive part 40 contains a material having stress in the opposite direction to that of the first conductive part 30. For example, the first conductive part 30 has an internal stress that pulls the semiconductor layer 10 to expand in the direction of the XY plane. For example, the first conductive part 30 has an internal stress that applies a force to the semiconductor layer 10 that causes it to bend upward. In contrast, the second conductive part 40 has an internal stress that compresses the semiconductor layer 10 to contract in the direction of the XY plane. For example, the second conductive part 40 has an internal stress that applies a force to the semiconductor layer 10 that causes it to bend downward. The stress is caused, for example, by the difference in lattice constants when the films are stacked. Thus, the stress of the second conductive part 40 includes a component in the opposite direction to the stress of the first conductive part 30. Alternatively, the stress of the first conductive part 30 may include a component that causes the semiconductor layer 10 to bend downward, and the stress of the second conductive part 40 may include a component that causes the semiconductor layer 10 to bend upward.

[0025] The thickness of the second conductive portion 40 is, for example, 0.2 times or more and 5.0 times or less the thickness of the first conductive portion 30. The thickness of the second conductive portion 40 is, for example, the length L40a along the Z direction of the second conductive portion 40 above the upper surface 11s. In this case, the thickness of the first conductive portion 30 is the length L30a along the Z direction of the first conductive portion 30 above the upper surface 11s. That is, the length L40a is, for example, 0.2 times or more and 5.0 times or less the length L30a.

[0026] Alternatively, the thickness of the second conductive portion 40 may be, for example, the length L40b of the second conductive portion 40 along the trench side Ts in a direction perpendicular to the trench side Ts. In this case, the thickness of the first conductive portion 30 is the length L30b of the second conductive portion 40 along the trench side Ts in a direction perpendicular to the trench side Ts. That is, the length L40b may be, for example, 0.2 times or more and 5.0 times or less of the length L30b.

[0027] Length L30a is, for example, between 100 nm and 2000 nm. Length L30b is, for example, between 50 nm and 2000 nm. Length L40a is, for example, between 20 nm and 800 nm. Length L40b is, for example, between 40 nm and 1600 nm.

[0028] The electrical resistivity Ω·cm (ohm-centimeter) of the second conductive part 40 is lower than that of the first conductive part 30.

[0029] For example, the second conductive portion 40 includes at least one of titanium (Ti), titanium nitride (TiN), and tungsten (W). The second conductive portion 40 may have a structure in which multiple metal films are laminated. For example, the second conductive portion 40 has a structure in which a film containing Ti, a film containing TiN, and a film containing W are laminated. The second conductive portion 40 may also contain compounds such as silicide.

[0030] The third conductive part 50 (metal layer) is laminated on the second conductive part 40. The third conductive part 50 is in contact with the second conductive part 40 above the protrusion 11 and above the trench T, and is electrically connected to the second conductive part 40. The third conductive part 50 does not have to be provided in the trench T. The third conductive part 50 includes, for example, aluminum (Al). The electrical resistivity of the third conductive part 50 is lower than that of the first conductive part 30. The electrical resistivity of the third conductive part 50 may be lower than that of the second conductive part 40.

[0031] As shown in Figure 2, in this example, the trenches T are arranged in a mesh (grid) pattern in the XY plane. Each of the multiple columnar protrusions 11 is positioned so as to be surrounded by the trenches T. In this example, when viewed along the Z direction, the planar shape of the protrusions 11 is a rectangle.

[0032] Multiple protrusions 11 are arranged side by side in a second direction D2 and a third direction D3. The second direction D2 is perpendicular to the Z direction, which in this example is the X direction. The third direction D3 is perpendicular to the Z direction and intersects the X direction, which in this example is the Y direction. Part of the trench T extends perpendicular to the second direction D2 between two adjacent protrusions 11 in the second direction D2. Another part of the trench T extends perpendicular to the third direction D3 between two adjacent protrusions 11 in the third direction D3.

[0033] The insulating film 20, the first conductive portion 30, the second conductive portion 40, and the third conductive portion 50 are continuous so as to cover the sides and top surfaces 11s of the multiple protrusions 11. In the cross-section of Figure 2 (a cross-section passing through the protrusions 11 and perpendicular to the Z direction), the insulating film 20 is provided in an annular shape, surrounding the sides of the columnar protrusions 11 (i.e., the trench sides Ts). The first conductive portion 30 is provided in an annular shape, surrounding the sides 20s of the insulating film 20. The second conductive portion 40 is provided in a mesh-like pattern, surrounding the sides 30s of the first conductive portion 30.

[0034] The width W11 of the protrusion 11 (the length of the protrusion 11 along the second direction D2) is, for example, 300 nm to 2000 nm. The width WT of the trench T (the distance between two adjacent protrusions 11 in the second direction D2) is, for example, 300 nm to 4000 nm. In this example, the trench T extends in the XY plane with a substantially constant width WT. The width W11 may be wider or narrower than the width WT.

[0035] The first conductive portion 30 is electrically connected to the second conductive portion 40 and the third conductive portion 50. On the other hand, the first conductive portion 30 is insulated from the semiconductor layer 10 by the insulating film 20. As a result, the semiconductor device 100 functions as a semiconductor device that accumulates charge between the first conductive portion 30 and the semiconductor layer 10. For example, when a voltage is applied between an electrode electrically connected to the third conductive portion 50 and an electrode electrically connected to the semiconductor layer 10, charge is accumulated between the first conductive portion 30 and the semiconductor layer 10.

[0036] The semiconductor device 100 according to this embodiment is a semiconductor device connected to a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor). For example, the semiconductor device 100 is used in a snubber circuit and connected in parallel with the IGBT. For example, one electrode of the semiconductor device 100 is electrically connected to the emitter of the IGBT, and the other electrode is electrically connected to the collector of the IGBT.

[0037] The effects of the embodiment will be explained with reference to the example. Figure 3 is a schematic cross-sectional view illustrating a semiconductor device according to a reference example. In the reference example semiconductor device 190 shown in Figure 3, compared to the semiconductor device 100, the second conductive portion 40 and the third conductive portion 50 are not provided, and the first conductive portion 30 is provided in a thicker form. In the semiconductor device 190, the trench T is filled with the first conductive portion 30. When manufacturing such a semiconductor device 190, if the first conductive portion 30 is thickly laminated on the insulating film 20, there is a risk that the semiconductor substrate (wafer) may warp due to the stress of the first conductive portion 30. Furthermore, in capacitors connected to power semiconductor elements, for example, a large capacitance is required. Therefore, increasing the capacitance per unit effective area by deepening the trench is a possible approach. However, if the trench becomes deeper, the first conductive portion 30 becomes thicker, and there is a risk that warping may occur due to stress on the first conductive portion 30. Also, as shown in Figure 3, the capacitance C formed in the trench T is connected to the electrical resistance R10 of the semiconductor layer 10 and the electrical resistance R30 of the first conductive portion 30. If the trench T becomes deeper, these electrical resistances also increase, which may affect performance such as frequency characteristics. For example, if a semiconductor device with a large resistance component is used for processing high-frequency signals, signal delay may occur.

[0038] In the semiconductor device 100 according to this embodiment, the depth TD of the trench T is 10 μm or more. This allows for a larger capacitance, making it possible to provide a capacitor that can be connected to, for example, a power semiconductor element. However, as mentioned above, when the trench T is deep, 10 μm or more, there is concern about wafer warping and increased electrical resistance. In response to this, in the semiconductor device 100, the second conductive part 40 generates stress in the opposite direction to the stress direction of the first conductive part 30. As a result, at least a portion of the stress in the first conductive part 30 is offset by at least a portion of the stress in the second conductive part 40, thereby suppressing warping. Furthermore, by providing a second conductive part 40 with low electrical resistivity, the resistive component connected to the capacitance can be reduced. This makes it possible to suppress, for example, the occurrence of signal delay.

[0039] As described above, for example, the thickness of the second conductive part 40 is between 0.2 and 5.0 times the thickness of the first conductive part 30. This prevents the second conductive part 40 from being too thin or too thick compared to the first conductive part 30, making it easier to cancel out stresses.

[0040] For example, the thickness of the second conductive part 40 may be greater than the thickness of the first conductive part 30. By making the second conductive part 40 relatively thicker, the resistive component connected to the capacitance can be reduced. However, the second conductive part 40 may be thinner than the first conductive part 30.

[0041] Figures 4(a) to 4(c) are schematic cross-sectional views illustrating a semiconductor device according to a modified embodiment. Figures 4(a) to 4(c) show cross-sections in the XY plane, similar to Figure 2. The semiconductor devices 100a to 100c shown in Figures 4(a) to 4(c) have different planar shapes of the protrusions 11 compared to semiconductor device 100.

[0042] In the semiconductor device 100a shown in Figure 4(a), the protrusion 11 is triangular when viewed along the Z direction. In the semiconductor device 100b shown in Figure 4(b), the protrusion 11 is hexagonal when viewed along the Z direction. In the semiconductor device 100c shown in Figure 4(c), the protrusion 11 is octagonal when viewed along the Z direction.

[0043] Thus, the planar shape of the convex portion 11 can be a polygon (for example, a regular polygon). For example, the planar shape of the convex portion 11 can be a square in Figure 2, an equilateral triangle in Figure 4(a), and a regular hexagon in Figure 4(b). In Figure 4(c), the planar shape of the convex portion 11 is a square with its four corners cut off in straight lines. Note that the polygon is not limited to a strictly defined polygon; for example, it can be a polygon with rounded corners.

[0044] As shown in Figures 4(a) to 4(c), the insulating film 20 surrounds the outer surface (trench side Ts) of the protrusion 11. The first conductive portion 30 surrounds the outer surface 20s of the insulating film 20. The second conductive portion 40 surrounds the outer surface 30s of the first conductive portion 30. By arranging the insulating film 20, the first conductive portion 30, and the second conductive portion 40 to surround the polygonal columnar protrusion 11 in this way, the capacitance of the semiconductor device can be increased.

[0045] Figures 5 and 6 are schematic cross-sectional views illustrating another semiconductor device according to the embodiment. Figure 5 shows a cross-section along the CC line shown in Figure 6. Figure 6 corresponds to a cross-section along the DD line shown in Figure 5.

[0046] As shown in Figure 5, the semiconductor device 101 according to this embodiment differs from the semiconductor device 100 in that it is provided with a cavity 60. The cavity 60 is formed inside the second conductive portion 40 within the trench T.

[0047] The cavity 60 is surrounded by a second conductive portion 40 (metal film) and a third conductive portion 50. That is, the lower end of the cavity 60 and the sides of the cavity 60 are separated by the second conductive portion 40. The upper end of the cavity 60 is separated by the third conductive portion 50.

[0048] In the cross-section of Figure 6 (a cross-section passing through the convex portion 11 and perpendicular to the Z direction), the second conductive portion 40 surrounds the outer surface 30s of the first conductive portion 30 and is provided in an annular shape. The cavity portion 60 surrounds the outer surface 40s of the second conductive portion 40 in the XY plane and is provided in a mesh-like (grid-like) pattern.

[0049] By providing such a cavity 60, stress on the semiconductor layer 10, the first conductive portion 30, or the second conductive portion 40 can be buffered. For example, even if the width of the protrusion 11 changes due to stress on the first conductive portion 30 or the second conductive portion 40, the cavity 60 can absorb the change in the width of the protrusion 11. The cavity 60 makes it possible to further suppress warping of the wafer as a whole.

[0050] For example, as shown in Figure 5, length L60 may be longer than length L40b or longer than length L30b. In other words, the width (length L60) of the cavity 60 may be wider than the thickness of the second conductive part 40 or wider than the thickness of the first conductive part 30. However, it is not limited to this, and length L60 may be shorter than length L40b or shorter than length L30b. Length L60 is the length of a portion of the cavity 60 that is aligned in a direction perpendicular to the direction in which the portion of the cavity 60 extends in the XY plane (for example, the third direction D3). Length L60 is, for example, between 50 nm and 1000 nm.

[0051] As shown in Figure 5, the length D60 of the cavity 60 along the Z direction may be equal to the depth TD of the trench T. The length D60 is, for example, 0.1 to 1.1 times the depth TD. The length D60 is, for example, 0.5 μm to 110 μm. The upper end 60t of the cavity 60 is located above, for example, the upper end of the semiconductor layer 10. The upper end 60t of the cavity 60 may also be above the insulating film 20 or the first conductive part 30 above the protrusion 11. By providing a long cavity 60 in this way, stress can be buffered more reliably by the cavity 60, for example.

[0052] Figures 7(a) to 7(c) are schematic cross-sectional views illustrating a semiconductor device according to a modified embodiment. Figures 7(a) to 7(c) show cross-sections in the XY plane, similar to Figure 6. The semiconductor devices 101a to 101c shown in Figures 7(a) to 7(c) have different planar shapes of the protrusions 11 compared to semiconductor device 101.

[0053] In the semiconductor device 101a shown in Figure 7(a), the protrusion 11 is triangular when viewed along the Z direction. In the semiconductor device 101b shown in Figure 7(b), the protrusion 11 is hexagonal when viewed along the Z direction. In the semiconductor device 101c shown in Figure 7(c), the protrusion 11 is octagonal when viewed along the Z direction.

[0054] In these examples as well, the cavity 60 surrounds the outer surface 40s of the second conductive part 40 in the XY plane and is arranged in a mesh (grid) pattern. For example, a part of the cavity 60 extends perpendicular to the second direction D2 between two adjacent protrusions 11 in the second direction D2. Another part of the cavity 60 extends perpendicular to the third direction D3 between two adjacent protrusions 11 in the third direction D3. The part of the cavity 60 extending in the second direction D2 and the part of the cavity 60 extending in the third direction D3 intersect and are connected. In this way, the cavity 60 extends between multiple protrusions 11. Because the cavity 60 extends in multiple directions within the XY plane, it can buffer stress in multiple directions. For example, it can distribute stress in multiple directions.

[0055] Figure 8 is a schematic perspective view illustrating a semiconductor device according to an embodiment. Figure 9 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. Figure 9 shows a cross-section along the EE line in Figure 8. For example, as shown in Figure 9, an insulating film 71 is provided on the third conductive portion 50. A conductive portion 81 is provided on the insulating film 71. The conductive portion 81 is electrically connected to the third conductive portion 50 via an opening 71e provided in the insulating film 71. An insulating film 72 and a first electrode pad 83 are provided on the conductive portion 81. The first electrode pad 83 is electrically connected to the conductive portion 81 via an opening 72e provided in the insulating film 72.

[0056] A conductive part 82 is provided on the third conductive part 50, which is electrically connected to the third conductive part 50. The conductive part 82 is aligned with the conductive part 81 in the X direction and is insulated from the conductive part 82. A second electrode pad 84 is provided on the conductive part 82. The second electrode pad 84 is electrically connected to the conductive part 82 via an opening 72f provided in the insulating film 72. The second electrode pad 84 is aligned with the first electrode pad 83 in the XY plane (for example, in the X direction). An insulating film 72 is provided between the second electrode pad 84 and the first electrode pad 83, insulating the second electrode pad 84 from the first electrode pad 83.

[0057] In this configuration, the first electrode pad 83 is electrically connected to the first conductive part 30 and insulated from the semiconductor layer 10. The second electrode pad 84 is electrically connected to the semiconductor layer 10 and insulated from the first conductive part 30. By applying a voltage between the first electrode pad 83 and the second electrode pad 84, charge is accumulated between the first conductive part 30 and the semiconductor layer 10.

[0058] The embodiment may include the following configurations. (Composition 1) Semiconductor layer, A first conductive portion provided within the semiconductor layer, An insulating film provided within the semiconductor layer and between the semiconductor layer and the first conductive portion, A second conductive portion is provided within the semiconductor layer, positioned between the first conductive portion and the insulating film, electrically connected to the first conductive portion, and generating a stress in the opposite direction to the stress direction of the first conductive portion. A semiconductor device equipped with the following features. (Configuration 2) The semiconductor device according to configuration 1, wherein a cavity is formed inside the second conductive portion. (Composition 3) The semiconductor device according to configuration 2, wherein the upper end of the cavity is located above the upper end of the semiconductor layer. (Composition 4) The semiconductor device according to any one of configurations 1 to 3, wherein the thickness of the second conductive portion is 0.2 times or more and 5.0 times or less the thickness of the first conductive portion. (Composition 5) The semiconductor layer includes a protrusion projecting in a first direction, The insulating film surrounds the side surface of the protrusion, The first conductive portion surrounds the side surface of the insulating film, The second conductive portion surrounds the side surface of the first conductive portion, and is a semiconductor device according to any one of configurations 1 to 4. (Composition 6) The semiconductor device according to configuration 5, wherein the convex portion is a triangle, a quadrilateral, a hexagon, or an octagon in a plane perpendicular to the first direction. (Composition 7) The semiconductor layer includes a plurality of protrusions projecting in a first direction, The semiconductor device according to any one of configurations 1 to 6, wherein the plurality of protrusions are arranged in a second direction perpendicular to the first direction and in a third direction perpendicular to the first direction and intersecting the second direction. (Composition 8) The semiconductor layer includes a plurality of protrusions projecting in a first direction, The plurality of protrusions are arranged in a second direction perpendicular to the first direction, and in a third direction perpendicular to the first direction and intersecting the second direction. The semiconductor device according to configuration 2 or 3, wherein the cavity extends between the plurality of protrusions. (Composition 9) The semiconductor device according to any one of configurations 1 to 8, wherein the electrical resistivity of the second conductive portion is lower than the electrical resistivity of the first conductive portion. (Composition 10) The first conductive part contains polysilicon, The semiconductor device according to any one of configurations 1 to 9, wherein the second conductive part includes a metal. (Composition 11) The semiconductor device according to configuration 10, wherein the second conductive portion has a structure in which a film containing titanium, a film containing titanium nitride, and a film containing tungsten are laminated.

[0059] According to the embodiment, a semiconductor device capable of suppressing warping can be provided.

[0060] Although several embodiments of the present invention have been illustrated above, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. Furthermore, the embodiments described above can be implemented in combination with each other. [Explanation of symbols]

[0061] 10: Semiconductor layer 10s:Top surface 11: Convex part 11s:Top surface 20: Insulating film 20s: Side 30: First conductive part 30s: Side 40: Second conductive part 40s: Side 50: Third conductive part 60: Cavity 60t: Upper end 71: Insulating Film 72: Insulating film 81: Conductive part 82: Conductive parts 83: First electrode pad 84: Second electrode pad 100, 100a~100c, 101, 101a~101c, 190: Semiconductor devices C: Electrical capacity D60: Length L20b: Length L30a: Length L30b: Length L40a: Length L40b: Length L60: Length R10: Electrical resistance R30: Electrical resistance T: Trench TD: Depth Ta: Trench interior Tb: Trench bottom Ts: Trench side W11: Width WT: Width

Claims

1. Semiconductor layer, A first conductive portion provided within the semiconductor layer, An insulating film provided within the semiconductor layer and between the semiconductor layer and the first conductive portion, A second conductive portion is provided within the semiconductor layer, positioned between the first conductive portion and the insulating film, electrically connected to the first conductive portion, and generating a stress in the opposite direction to the stress direction of the first conductive portion. Equipped with, The first conductive part contains polysilicon, The semiconductor device has a structure in which the second conductive portion is made up of a stacked film containing titanium, a film containing titanium nitride, and a film containing tungsten.

2. The semiconductor device according to claim 1, wherein a cavity is formed inside the second conductive portion.

3. The semiconductor device according to claim 2, wherein the upper end of the cavity is located above the upper end of the semiconductor layer.

4. The semiconductor device according to any one of claims 1 to 3, wherein the thickness of the second conductive portion is 0.2 times or more and 5.0 times or less the thickness of the first conductive portion.

5. The semiconductor layer includes a protrusion projecting in a first direction, The insulating film surrounds the side surface of the protrusion, The first conductive portion surrounds the side surface of the insulating film, The semiconductor device according to any one of claims 1 to 3, wherein the second conductive portion surrounds the side surface of the first conductive portion.

6. The semiconductor device according to claim 5, wherein the convex portion is a triangle, a quadrilateral, a hexagon, or an octagon in a plane perpendicular to the first direction.

7. The semiconductor layer includes a plurality of protrusions projecting in a first direction, The semiconductor device according to any one of claims 1 to 3, wherein the plurality of protrusions are arranged in a second direction perpendicular to the first direction and in a third direction perpendicular to the first direction and intersecting the second direction.

8. The semiconductor layer includes a plurality of protrusions projecting in a first direction, The plurality of protrusions are arranged in a second direction perpendicular to the first direction, and in a third direction perpendicular to the first direction and intersecting the second direction. The semiconductor device according to claim 2 or 3, wherein the cavity extends between the plurality of protrusions.

9. The semiconductor device according to any one of claims 1 to 3, wherein the electrical resistivity of the second conductive portion is lower than the electrical resistivity of the first conductive portion.