Margin tester and margin test method

The margin tester system addresses the challenge of adapter-induced errors in high-speed tests by using adapter identifiers to determine expected margins, ensuring accurate and efficient testing without manual deembedding.

JP7867770B2Active Publication Date: 2026-06-01TEKTRONIX INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
TEKTRONIX INC
Filing Date
2021-09-21
Publication Date
2026-06-01

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Patent Text Reader

Abstract

To make it possible for a user to easily de-embed an adapter.SOLUTION: A margin tester 202 comprises: an identification reader 204 for reading an adaptor unique identifier 206 of an adaptor 208; an interface configured to connect to a device 212 under test through the adaptor 208; and a controller 104 having a processor configured to assess a margin of the test device 212 under test. Assessing the margin can include assessing the margin based on an expected margin that is predicted or provided based on the adaptor unique identifier 206.SELECTED DRAWING: Figure 2
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Description

Technical Field

[0001] This disclosure relates to a test measurement system, particularly a margin tester and a margin test method for performing a high-speed margin test on an electrical device under test (DUT).

Background Art

[0002] A test measurement device is connected to a device under test (DUT) via one or more accessories or adapters. Such accessories or adapters include, for example, electrical or optical probes, coaxial cables, fiber optic cables, connectors, fixtures, etc. Examples of DUTs include printed circuit boards, integrated circuits (ICs), etc.

[0003] However, accessories and adapters can affect signal transmission between the test measurement device and cause errors in the tests performed by the test measurement device. Accessories and adapters may only be able to measure within a certain margin (tolerance range), and errors may occur when attempting to measure outside that margin (tolerance range).

[0004] To remove the influence of accessories or adapters, the influence of the accessories or adapters used to connect the test measurement device to the DUT may be de-embedded from the test results through arithmetic processing.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

[0006] However, deembedding the effects of cables, fixtures, and other accessories or adapters requires measuring the electrical characteristics of the cables, fixtures, and other accessories or adapters and determining the deembedding parameters. This can take several days for a user to perform and is prone to errors, especially at high data rates and frequencies.

[0007] Embodiments of the disclosed technology aim to solve the shortcomings of these and other prior art. [Means for solving the problem]

[0008] The following examples are provided that are useful for understanding the technology disclosed herein. These embodiments may include one or more of the examples described below, or any combination thereof.

[0009] Embodiment 1 is a margin tester comprising an identification (ID) reader configured to receive an adapter identifier of an adapter, an interface configured to connect to a device under test via the adapter, and one or more processors configured to evaluate the margin of the device under test and tag the evaluation data with the adapter identifier. The adapter identifier may also be implemented, for example, by having the ID reader of the margin tester read and identify a unique combination of pins that are mechanically connected to the margin tester via the interface, with each adapter being unique.

[0010] Example 2 is the margin tester of Example 1, further comprising a memory configured to store a margin tester identifier.

[0011] Example 3 is a margin tester according to Example 1 or 2, wherein one or more of the processors are further configured to tag the evaluation data with a margin tester identifier.

[0012] Example 4 is a margin tester of Example 2 or 3, wherein one or more of the processors are further configured to determine the expected margin of the device under test based on the margin tester identifier.

[0013] Example 5 is a margin tester according to any of Examples 1 to 4, wherein one or more of the processors are further configured to determine the expected margin of the device under test based on the adapter identifier.

[0014] Example 6 is a margin tester according to any of Examples 1 to 5, wherein the adapter is a high-density adapter and is connected to the interface via a high-density connection section. In this case, the high-density connection section may be different for each individual adapter and may function as an adapter identifier.

[0015] Example 7 is a margin tester according to any of Examples 1 to 6, wherein the adapter is connected to the device under test via a mechanical form factor.

[0016] Example 8 is a margin tester according to any of Examples 1 to 7, further comprising a transceiver (transmitter / receiver) configured to transmit the adapter identifier to a remote database and to receive the expected margin of the device under test based on the adapter identifier.

[0017] Example 9 is a method for performing a margin test on a device under test, comprising a process of receiving an adapter identifier in a margin tester, a process of determining whether the adapter is a known adapter based on the adapter identifier, a process of evaluating the margin of the device under test through the adapter, and a process of tagging the adapter identifier to the evaluation data of the margin of the device under test.

[0018] Example 10 is the method of Example 9, further comprising a process of storing a margin tester identifier.

[0019] Example 11 is the method of Example 10, further comprising a process of tagging the margin tester identifier to the evaluation data.

[0020] Example 12 is the method of Example 10 or 11, further comprising a process of obtaining an expected margin of the device under test based on the margin tester identifier.

[0021] Example 13 is any one of the methods of Examples 9 to 12, further comprising a process of obtaining an expected margin of the device under test based on the adapter identifier.

[0022] Example 14 is the method of Example 13, wherein the process of obtaining the expected margin includes a process of obtaining the expected margin based on calibration at the manufacturer or vendor of the margin tester and the adapter.

[0023] Example 15 is the method of Example 13, wherein the margin tester is a first margin tester, and the process of obtaining the expected margin includes a process of obtaining the expected margin based on calibration at the manufacturer or vendor of the adapter and a second margin tester.

[0024] Example 16 is the method of Example 13, wherein the process of obtaining the expected margin includes a process of predicting the expected margin based on calibration by manufacturers or vendors of a plurality of combinations of different adapters and a plurality of margin testers.

[0025] Example 17 is the method of Example 13, wherein the process of obtaining the expected margin includes a process of obtaining the expected margin from a remote database.

[0026] Example 18 is a margin tester, comprising an identification reader configured to receive an adapter identifier of a high-density adapter, an interface configured to be connected to a device under test via the adapter, a margin evaluation unit configured to evaluate the margin of the device under test, and a data tagging unit configured to tag the adapter identifier to evaluation data.

[0027] Example 19 is the margin tester of Example 18, wherein the margin evaluation unit is further configured to obtain an expected margin of the device under test based on the adapter identifier.

[0028] Example 20 is the margin tester of either Example 18 or 19, wherein the adapter is connected to the interface via a high-density connection part.

[0029] Aspects, features, and advantages of examples of the present disclosure will become apparent from the description of the examples with reference to the following additional drawings.

Brief Description of Drawings

[0030] [Figure 1] FIG. 1 is a block diagram of a margin tester according to an example of the technology of the present disclosure. [Figure 2] FIG. 2 is a block diagram of a test measurement system according to an example of the technology of the present disclosure. [Figure 3] FIG. 3 is a flowchart showing the process of a test measurement device according to an example of the technology of the present disclosure. [Modes for carrying out the invention]

[0031] A margin tester or margin test system is a test and measurement device capable of performing high-speed margin tests on a DUT, such as electrical margin tests or optical margin tests. A margin tester can establish a single-lane or multi-lane high-speed input / output link of a DUT and evaluate the margins of either the transmit direction, the receive direction, or both of each lane of the single-lane or multi-lane high-speed input / output link.

[0032] Patent documents 1 and 2, filed on January 31, 2020, respectively, disclose a system and method for performing high-speed margin testing on a DUT. Such margin testers can be particularly useful for testing DUTs that employ multi-lane communication protocols such as PCI (Peripheral Component Interconnect) Express, USB (Universal Serial Bus), SATA (Serial AT Attachment), DDR (Double Data Rate), and SAS (Serial Attached SCSI).

[0033] Figure 1 is a block diagram showing a margin tester 100 having multiple interfaces 102 according to an example of the present invention, the multiple interfaces 102 are configured to be connected to at least one fixture (fixing jig) by, for example, one or more cables, in order to evaluate the margin of the DUT's multi-lane high-speed I / O links in either the transmit direction or the receive direction or both.

[0034] The margin tester 100 includes a controller 104 and associated memory 106, which may store instructions and other data for the controller 104 to read, use, or execute to perform the functions described herein. The controller 104 has one or more processors and controls the operation of the margin tester 100. The margin tester 100 may have a certain number of lanes, which can be connected (e.g., by cable) to a standard test fixture via interface 102 or to cables and adapters for performing margin testing under the control of the controller 104. The margin tester 100 includes transmitters and receivers (not shown) connected to interface 102.

[0035] The controller 104 may also be configured to evaluate the margin of a single-lane or multi-lane high-speed input / output (I / O) link by at least reducing the eye width opening of the eye pattern, such reduction of the eye width opening, for example, the margin... Te Jitter in the transmitter or This may be done by injecting noise (or by implementing other methods to reduce the eye width aperture), by simultaneously applying selectable noise injection to all lanes of a single-lane or multi-lane high-speed input / output link, or by applying it independently to each lane of a single-lane or multi-lane high-speed input / output link. The controller 104 may also be configured to evaluate the margin of a single-lane or multi-lane high-speed input / output (I / O) link by at least reducing the eye height aperture of the eye pattern, such reduction of the eye height aperture may be, for example, a margin reduction. Te Jitter in the transmitter or This may be done by injecting noise (or by implementing other methods to reduce the eye height aperture), by simultaneously applying selectable noise injection to all lanes of a single-lane or multi-lane high-speed input / output link, or by applying it independently to each lane of a single-lane or multi-lane high-speed input / output link.

[0036] The Margin Tester 100 can support multiple protocols, and the configuration of the Margin Tester 100's controller 104 includes options for configuring (setting up) lanes for different protocols and host / device functions. The Margin Tester 100 can also be used to test add-in cards by cabling them to a fixture, such as a standard PCI Express Compliance Base Board (CBB) for testing add-in cards.

[0037] During margin evaluation, the controller 104 can compare the measured margin of the DUT with the expected margin. The DUT must exceed a certain margin to be considered minimum compliant. However, the margin that needs to be exceeded may vary due to the influence of the margin tester and any adapters or accessories installed between the margin tester and the DUT.

[0038] The controller 104 may also be connected to a memory 106, which can store instructions and other data for the controller 104 to read, use, and execute to perform the functions described herein. For example, the memory 106 can store the identifier (ID) 108 of the margin tester 100. The identifier 108 may be any unique identifier specific to each individual margin tester, such as the serial number of the margin tester 100, but is not limited to this. The memory 106 may also store the expected margin of the DUT.

[0039] The interface 102 of the margin tester 100 may have standard coaxial connectors and cables for each high-speed differential signal, or in various other embodiments, it may have custom high-density connectors and fixtures to minimize the number of cables and allow for more efficient switching from one DUT to another. For example, a high-density connector adapter that connects to a specific mechanical form factor (physical specifications or standards) of the DUT may be used to connect the margin tester 100 to the DUT. An example of a specific mechanical form factor is a specific type of PCI Express motherboard slot. That is, the adapter may have one end that connects to the interface 102 of the margin tester 100 and the other end that is a specific type of PCI Express motherboard slot. The high-density adapter may be any adapter with eight or more connection points.

[0040] Figure 2 shows a block diagram of a test measurement system 200 according to an example of the present invention. The margin tester 202 may be the same as or similar to the margin tester 100 described in relation to Figure 1, and may have some or all of the functions of the margin tester 100. The margin tester 202 may also have an identification (ID) reader 204 for reading the unique identifier (unique ID) 206 of the adapter 208. The unique identifier 206 may be stored in an optional memory 210 of the adapter 208 in some examples, as shown in Figure 2. The memory 210 may be, for example, a read-only memory used to store the unique identifier 206. However, the present invention is not limited to this type of memory, and other types of memory may be used. The adapter 208 is also connected to a device under test (DUT) 212.

[0041] The unique identifier 206 does not necessarily have to be stored in memory 210. In some examples, an adapter 208 may have a set of unique mechanical pins (a combination of multiple pins) on a portion of the adapter 208 connected to the margin tester 202. This unique set of mechanical pins is different for each individual adapter 208 and functions as the unique identifier 206 of the adapter 208. Alternatively, the adapter 208 may have an RFID tag that stores the unique identifier 206. Thus, the unique identifier 206 may be any type of identifier that can be read by the identification reader 204 of the margin tester 2020.

[0042] The identification reader 204 of the margin tester 202 can determine the unique identifier 206 of the adapter 208. The identification reader 204 may be any type of reader capable of receiving or reading the unique identifier 206, such as a serial interface, an RFID reader, or a mechanical reader that can determine the unique identifier 206 by the mechanical pins of the adapter 208.

[0043] The identification reader 204 can transmit the unique identifier 206 to the controller 104. The controller 104 of the margin tester 202 can tag all margin data with the adapter 208's margin tester identifier 108 and unique identifier 206. For example, if the adapter 208 does not have a unique identifier 206, or if the identification reader 204 cannot read or determine the adapter 208's unique identifier 206, the margin data can also be tagged to indicate that an unknown adapter 208 was used during testing.

[0044] Based on the unique identifier 206 of the adapter 208, controllers such as the controller 104 or remote controllers located in a cloud system can determine the expected margin of the test measurement system 200 based on both the margin tester identifier 108 and the unique identifier 206 of the adapter 208.

[0045] The expected margin may be stored in the memory 106 of the margin tester 100, or it may be retrieved from a remote database such as a cloud database via the internet, a local network connection, or a wired connection. If it is not already stored in memory 106, the expected margin may be stored in the memory 106 of the margin tester 100 upon reception.

[0046] Numerous different processes can be used to determine the expected margin of the test measurement system 200, based on the unique identifier 206 of the adapter 208 and the identifier 108 of the margin tester 202. In the simplest example of the technology disclosed, during factory calibration, the expected margin for testing a minimum-compliant device is determined for a specific margin tester and adapter in combination with a particular type of DUT. The determined margin for a specific margin tester and adapter in combination with a particular type of DUT may then be stored as the expected margin.

[0047] During testing, multiple DUT212s of this particular form may be tested using a specific combination of a factory-calibrated margin tester 202 and adapter 208. Then, the factory-determined expected margins based on the specific combination of margin tester 202 and adapter 208 can be used to evaluate the test results of multiple DUT212s of this particular form. The expected margins may be stored in the memory 106 of the margin tester 100, or they may be retrieved from a remote database based on the identifier 108 of the margin tester 100 or the unique identifier 206 of the adapter 208. The data collected during testing may be tagged with either or both of identifiers 108 and 206.

[0048] If adapter 208 is unknown, the expected margin can be set based solely on the identifier 108 of the margin tester 202, or it can be set based on user input. Data collected and analyzed using an unknown adapter 208 will be tagged as "unknown adapter 208" and also tagged with the identifier 108 of the margin tester 202. This allows the user to immediately determine / evaluate that the data was collected using an unknown adapter 208.

[0049] However, factory calibration of each specific margin tester 200 and adapter 208 for a particular type of DUT can be time-consuming, especially when multiple margin testers 200 and adapters 208 are present in the test measurement system 200. In some cases, instead of determining the exact expected margin for a particular combination of margin tester and adapter, predictive analytics may be used to predict what the expected margin for a particular type of DUT 212 will be, based on normalized factory calibration.

[0050] For example, in some examples of the technology disclosed herein, multiple adapters 208 may be tested in the factory with the same margin tester 202 and the same specific type of DUT. That is, during factory calibration, multiple different adapters 208 may be tested using the same margin tester 200 and the same type of DUT 212, and the margins of each of these adapters 208, along with their respective fixed identifiers 206, can be recorded in a database. If a particular adapter 208 is used with the same type of DUT and different margin testers 202, the expected margin may be predicted based on initial factory testing of the adapter 208 using the different margin testers 202. In some examples, the predicted expected margin may be set based on the known characteristics of the margin tester 202 used in a particular test and the expected margin measured on the adapter 208 with the factory margin tester 202. In this application, as a typical example, calibration and testing are described as being performed at the factory. However, instead of the factory, such calibration and testing (vendor calibration or testing) may be performed by a person with specialized knowledge and skills at the vendor (including the manufacturer's subsidiaries, affiliates, distributors, and sales agents).

[0051] Methods performed in addition to or alternative to those described above are described below. Numerous different margin testers 202 are tested at the factory using the same adapter 208 and the same specific type of DUT 212. The expected margin for each of these margin testers 202 can be recorded along with its identifier 108. When testing each of multiple DUT 212 of a particular type, the expected margin can be set based on the identifier 108 of the margin tester 200, as long as the same type of adapter 208 is used. In such examples, the unique identifier 206 of the specific adapter 208 used is also recorded and tagged in the data. In some examples, the predicted expected margin may be set based on the known characteristics of the adapter 208 used in a particular test and the expected margin measured using the factory adapter 208 and margin tester 202.

[0052] In addition to the above, or alternative methods, are described below. Multiple margin testers 202 and multiple adapters 208 of various types may be tested in the factory using the same type of DUT212. The largest outliers of the margin testers 202 and adapters 208 are tested directly, and these tests can be used to set the expected margins of a particular type of DUT212 when performing testing of these types of DUT212.

[0053] However, an example of the technology disclosed herein uses a margin tester 202 and adapter 208 to directly test a specific type of DUT212. contact measurement The method is not limited to determining a fixed expected margin. In another example, the adapter 208 can be measured directly using a vector network analyzer, and the margin tester 202 can be measured using an oscilloscope or a bit error rate tester. Variations in measurements between multiple adapters 208 can be used to determine variations in the expected margin. Similarly, variations in measurements between multiple margin testers 202 can be used to determine variations in the expected margin. For example, the length of the cables used may differ between a factory margin tester 202 and a laboratory margin tester 202.

[0054] Figure 3 is a flowchart illustrating an example of the present invention. In step 300, some form of calibration is first performed in the factory. The calibration may be any of the calibration processes described above. For example, such calibration may involve calibrating a specific combination of margin tester and adapter using a specific type of DUT212. In another example, a specific type of DUT212 and a specific margin tester 202 may be tested with a number of different adapters 208. In yet another example, a specific type of DUT212 and a specific adapter 208 may be tested with a number of different margin testers 202. In yet another example, different combinations of multiple margin testers 202 and multiple adapters 208 may be tested with a specific type of DUT212.

[0055] Next, in step 302, during the test, the identification reader 204 of the margin tester 202 may read or determine the identifier 206 of the adapter 208. In step 304, it may also be determined whether the adapter 208 is a known adapter 208. In some examples, in addition to determining whether the adapter 208 is known, in step 304, it may also be determined whether the adapter 208 and cable are in a normal state, as disclosed in Patent Document 4. The controller 104 may determine whether the identification reader 204 is unable to read the identifier 206 of the adapter 208. If the identification reader 204 is able to read the identifier 206, the controller 104 may determine whether the identifier 206 is known by comparing the identifier 206 with a known identifier stored in memory 106, or by having the identifier 206 sent to a remote database.

[0056] If identifier 206 is unknown ("No" in step 304), in step 306, the margin tester controller 104 may determine the expected margin based on user input or based on identifier 108 of margin tester 202, and may also determine the health of the cable (whether it is normal or not), if defined or included in step 306. The controller 104 may determine the expected margin directly, or it may use the expected margin obtained from a remote database. In step 308, margin tester 202 may collect data from DUT 212 and attach a tag to the data indicating that the data was collected by an unknown adapter 208.

[0057] If adapter 208 is known (if the answer is "Yes" in step 304), in step 310, the controller 104 can still determine the expected margin for DUT 212, but in this case, the expected margin is determined using the identifier 206 of adapter 208, and a determination of cable health may also be made in step 310, if included. The controller 104 may retrieve the expected margin from memory 106 based on the identifier 206, or the controller 104 may send the identifier 206 and, in some examples, the identifier 108 in addition to it to a remote database, which then determines the expected margin based on the known adapter 208 and margin tester 202.

[0058] Using the expected margin, the controller 104 can evaluate the margin of the DUT 212 and tag the data with the identifier 206 of the adapter 208. In some examples, the controller 104 may also tag the data with the identifier 108 of the margin tester 202. In step 312, the margin tester 202 collects data from the DUT 212 and can tag the data to indicate that the data was collected with a known adapter 208, and may also tag the data with other information such as cable health.

[0059] An example of the technology disclosed herein is that more accurate test results for the DUT212 can be provided by using the known characteristics of specific test equipment, such as the margin tester 202 and adapter 208. The data collected by the controller 104 can be displayed to the user, allowing the user to immediately see which data was collected using the known adapter 208 and which data was not collected using the known adapter 208. The user can verify that the data collected using the known adapter 208 is accurate and takes into account the characteristics of the adapter 208 and the margin tester 202. This eliminates the error-prone manual work required to determine the de-embedding parameters of the adapters in the system.

[0060] Embodiments of the disclosed technology can operate on a specially programmed general-purpose computer, including specially created hardware, firmware, digital signal processors, or processors that operate according to programmed instructions. The terms “controller” or “processor” in this application mean microprocessors, microcomputers, ASICs, and dedicated hardware controllers, etc. Embodiments of the disclosed technology can be implemented by one or more computers (including monitoring modules) or other devices, using computer-readable data such as program modules and computer-executable instructions. Generally, program modules include routines, programs, objects, components, data structures, etc., which, when executed by a processor in a computer or other device, perform specific tasks or implement specific abstract data formats. Computer-executable instructions may be stored on computer-readable storage media such as hard disks, optical disks, removable storage media, solid-state memory, RAM, etc. As will be understood by those skilled in the art, the functions of the program modules may be combined or distributed as needed in various embodiments. Furthermore, these functions can be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits or field-programmable gate arrays (FPGAs). One or more aspects of the disclosed technology can be more effectively implemented using specific data structures, such data structures are considered to be within the scope of computer-executable instructions and computer-usable data described herein.

[0061] The disclosed embodiments may, in some cases, be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored in one or more computer-readable media that can be read and executed by one or more processors. Such instructions may be referred to as computer program products. The computer-readable media described herein means any medium accessible by a computing device. For example, but not limited to, computer-readable media may include computer storage media and communication media.

[0062] Computer storage media means any medium that can be used to store computer-readable information. Examples of computer storage media include, but are not limited to, random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory and other memory technologies, compact disc read-only memory (CD-ROM), DVD (Digital Versatile Disc) and other optical disc storage devices, magnetic cassettes, magnetic tapes, magnetic disk storage devices and other magnetic storage devices, and any other volatile or non-volatile removable or non-removable media implemented by any technology. Computer storage media exclude signals themselves and temporary forms of signal transmission.

[0063] A communication medium refers to any medium that can be used to transmit computer-readable information. Examples of communication mediums, though not limited to them, include coaxial cables, fiber optic cables, air, or any other medium suitable for transmitting electrical, optical, radio frequency (RF), infrared, sound, or other forms of signals.

[0064] The various forms of the disclosed subject matter described above have many effects that are described or will be obvious to those skilled in the art. Nevertheless, not all of these effects or features are required in all forms of the disclosed apparatus, system, or method.

[0065] In addition, the description of this application refers to certain features. It should be understood that the disclosures herein include all possible combinations of these specific features. Where a particular feature is disclosed in relation to a particular aspect or example, that feature may, to the extent possible, also be used in relation to other aspects and examples.

[0066] Furthermore, when this application refers to a method having two or more defined steps or processes, these defined steps or processes may be performed in any order or simultaneously, as long as the circumstances do not rule out such possibilities.

[0067] For the sake of explanation, specific embodiments of the present invention have been illustrated and described, but it should be understood that various modifications are possible without deviating from the gist and scope of the present invention. Therefore, the present invention should not be limited to anything other than the appended claims. [Explanation of Symbols]

[0068] 100 Margin Tester 102 Interfaces 104 Controller 106 memory 108 Identifier (ID) 200 Test and Measurement Systems 202 Margin Tester 204 Identifier (ID) Reader 206 Unique Identifier (Unique ID) 208 Adapter 210 memory 212 Device under test (DUT)

Claims

1. An identification reader configured to receive the adapter identifier of an adapter, An interface configured to connect to the device under test via the adapter described above, One or more processors configured to evaluate the margin of the device under test, tag the evaluation data with the adapter identifier or margin tester identifier, and determine the expected margin of the device under test based on the adapter identifier or margin tester identifier. A margin tester equipped with [a specific feature].

2. An identification reader configured to receive the adapter identifier of an adapter, An interface configured to connect to the device under test via the adapter described above, One or more processors configured to evaluate the margin of the above-mentioned device under test and tag the evaluation data with the above-mentioned adapter identifier or margin tester identifier, A transceiver configured to transmit the above adapter identifier to a remote database and to receive the expected margin of the device under test based on the above adapter identifier. A margin tester equipped with [a specific feature].

3. A method for performing margin testing on a device under test, The process of receiving the adapter identifier in the margin tester, A process to determine whether the adapter is a known adapter based on the above adapter identifier, The above adapter is used to evaluate the margin of the device under test, The process involves tagging the evaluation data of the above margin of the above device under test with the above adapter identifier or margin tester identifier, A process to determine the expected margin of the device under test based on the adapter identifier or margin tester identifier mentioned above. A margin testing method that includes [the following].

4. The margin testing method according to claim 3, wherein the process for determining the expected margin includes a process for determining the expected margin based on the calibration of the margin tester and the adapter.

5. The margin testing method according to claim 3, wherein the process for determining the above expected margin includes a process for predicting the above expected margin based on the calibration of a number of combinations of different adapters and multiple margin testers.

6. The margin testing method according to claim 3, wherein the process for determining the expected margin includes a process for obtaining the expected margin from a remote database.

7. An identification reader configured to receive an adapter identifier of an adapter, An interface configured to connect to the device under test via the adapter described above, A margin evaluation unit is configured to evaluate the margin of the device under test and to determine the expected margin of the device under test based on the adapter identifier or margin tester identifier. A data tagging unit configured to tag evaluation data with the adapter identifier or margin tester identifier. A margin tester equipped with [a specific feature].