Method and apparatus for managing a cache directory

Abstract

The method and apparatus monitors evacuation conflicts between cache directory entries in a cache directory and generates cache directory victim entry information for a memory manager. In some examples, the memory manager reduces future cache directory conflicts by modifying page-level physical address assignments for pages of memory based on the generated cache directory victim entry information. In some examples, the scalable data fabric includes hardware control logic that performs the monitoring of evacuation conflicts between cache directory entries in a cache directory and generates the cache directory victim entry information.

Claims

1. A method for managing cache directories, The hardware control logic monitors for save conflicts between cache directory entries within the cache directory, The hardware control logic generates cache directory sacrifice entry information for the memory manager, This includes modifying the page-level physical address assignment for memory pages based on the generated cache directory sacrifice entry information, method.

2. The cache directory entry corresponds to a page cached by the system, The hardware control logic generates cache directory sacrifice entry information indicating the one or more cache directory entries that have been saved from the cache directory, to the memory manager which allocates physical address space to pages in the system's memory, in response to the saving of one or more cache directory entries in the cache directory. The memory manager includes selecting future pages of memory from the physical address space in accordance with the generated cache directory sacrifice entry information, The method according to claim 1.

3. The cache directory is a page-level set-associative cache directory, where each entry corresponds to a page in memory, and generating cache directory sacrifice entry information includes logging cache directory sacrifice entry information to memory for at least one of the sacrifice conflicts. The method according to claim 1.

4. Monitoring for backup conflicts in the cache directory includes reading a conflict sacrifice buffer that stores the most recently saved entry from the cache directory. The method according to claim 3.

5. Logging includes storing the cache directory sacrifice entry information relating to at least one of the saved entries in kernel memory readable by the virtual memory manager. The method according to claim 3.

6. Logging includes storing the cache directory sacrifice entry information relating to at least one of the saved entries in a log buffer readable by the hardware control logic. The method according to claim 3.

7. This includes reducing memory channel congestion based on the generated cache directory sacrifice entry information by assigning the physical addresses of memory pages to different memory channels based on the generated cache directory sacrifice entry information. The method according to claim 1.

8. The memory manager reduces cache directory contention by modifying the page-level physical address assignment for pages of memory so that they move to different sets within the page-level set-associative cache directory. The method according to claim 3.

9. A multi-mode operation of cache evacuation monitoring, including a first mode that provides continuous logging of evacuation conflicts, and a second mode that provides logging of evacuation conflicts to a log buffer based on whether a condition is met, The sampling rate of the number of race evacuations logged, A count setting to set the number of backup conflicts to be stored, This includes setting one or more configuration registers using data representing at least one of the following: The method according to claim 1.

10. The generation includes the hardware control logic generating cache directory sacrifice entry information relating to multiple save conflicts detected within the cache directory. The method according to claim 1.

11. It is a device, One or more processors accessing the cache hierarchy, Memory that operates to store the cache directory, Hardware control logic and It includes a memory manager, The aforementioned hardware control logic is This involves monitoring backup conflicts between cache directory entries within the aforementioned cache directory, To generate cache directory sacrifice entry information for the aforementioned memory manager, It operates to perform the following actions: The memory manager operates to mitigate future cache directory contention by modifying page-level physical address assignments for memory pages based on the generated cache directory sacrifice entry information. Device.

12. The aforementioned cache directory is a page-level set-associative cache directory, where each entry corresponds to a page in memory. The aforementioned hardware control logic is A race-sacrificing buffer configured to store the most recently saved entry from the aforementioned cache directory, A controller that operates to generate cache directory sacrifice entry information from the conflict sacrifice buffer by logging cache directory sacrifice entry information relating to at least one of the save conflicts into memory readable by the memory manager, The apparatus according to claim 11.

13. The hardware control logic includes a log buffer that is readable and writable by the controller, and the controller operates to store the cache directory sacrifice entry information relating to at least one of the saved entries in the log buffer. The apparatus according to claim 12.

14. The cache directory entry corresponds to a page cached by the system, The hardware control logic operates to generate cache directory sacrifice entry information indicating the one or more cache directory entries that have been saved from the cache directory, for the memory manager which allocates physical address space to pages in the system's memory, in response to the saving of one or more cache directory entries in the cache directory. The memory manager operates to select future pages of memory from the physical address space in accordance with the generated cache directory sacrifice entry information. The apparatus according to claim 11.

15. A multi-mode operation of cache evacuation monitoring, including a first mode that provides continuous logging of evacuation conflicts and a second mode that provides logging of evacuation based on the fulfillment of conditional data, The sampling rate of the number of race evacuations logged, A count setting to set the number of backup conflicts to be stored, A configuration register is provided which is configured to provide control of the controller using data representing at least one of the following: The apparatus according to claim 12.

16. A system comprising any of the devices of claims 11 to 15, The one or more processors mentioned above include a host processor, The memory is coupled to the host processor and comprises a plurality of remote memory devices. The scalable data fabric is coupled to the host processor and the plurality of remote memory devices and includes the hardware control logic, system.

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