Adaptive logic board for variable speed drive units for heating, ventilation, air conditioning, and refrigeration systems

Abstract

An adaptive logic board (100) for a variable speed drive (52) or VSD of a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system includes a signal sensing circuit (154) configured to receive an input signal from a sensor (120, 130) of the VSD. The signal sensing circuit includes a filter (190) configured to condition the input signal. The filter includes a variable resistance element (184) configured to adjust a cutoff frequency of the filter. The filter is configured to attenuate a waveform of the input signal having a frequency above the cutoff frequency to generate a conditioned signal. The adaptive logic board also includes a controller (164) configured to receive the conditioned signal and adjust the variable resistance element to adjust the cutoff frequency of the filter based on parameters of the HVAC&R system.

Description

Technical Field

[0001] The present invention relates to an adaptive logic board for a variable speed drive for heating, ventilation, air conditioning, and refrigeration systems.

Background Art

[0002] This section intends to introduce readers to various aspects of the art that may be relevant to various aspects of the present disclosure described below. This discussion is thought to be useful in providing background information to the reader to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these descriptions are to be read from this perspective and not as an admission of prior art.

[0003] Cooling systems for use in commercial or industrial heating, ventilation, air conditioning, and refrigeration (HVAC&R) systems typically include a relatively large motor for powering a compressor. The power output of the motor can be selected based on the capacity of the HVAC&R system (e.g., cooling demand). For example, the power output of the motor can range from 100 horsepower (HP) to 5,000 HP, or exceed 5,000 HP. Many of these systems include a variable speed drive (VSD) for controlling the speed of the motor in response to changes in the cooling demand of the HVAC&R system. The VSD can increase the speed of the motor, and thus the speed of the compressor, as the cooling demand of the HVAC&R system increases. Conversely, the VSD can decrease the speed of the motor as the cooling demand of the HVAC&R system decreases.

[0004] The threshold power output of a motor can determine the size (e.g., power output range) of the VSD used in the HVAC&R system. For example, a relatively high-power motor may be controlled by a VSD capable of supporting higher current draws and voltage demands than a VSD used to control a relatively low-power motor. This means that different sized VSDs may be included in the HVAC&R system to accommodate motors operating across a wide power output range. Each VSD size may include a logic board (e.g., a printed circuit board) that controls or monitors the operation of the VSD. Unfortunately, manufacturing different logic boards for each VSD size can complicate the production of logic boards and HVAC&R systems, and increase manufacturing costs. [Overview of the project]

[0005] This disclosure relates to an adaptive logic board for a variable-speed drive unit (VSD) of a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system. The adaptive logic board includes a signal sensing circuit configured to receive an input signal from a sensor of the VSD. The signal sensing circuit includes a filter configured to condition the input signal. The filter includes a variable resistor element configured to adjust the cutoff frequency of the filter. The filter is configured to attenuate the waveform of the input signal having a frequency above the cutoff frequency to produce a conditioned signal. The adaptive logic board also includes a controller configured to receive the conditioned signal and adjust the filter's cutoff frequency by adjusting the variable resistor element based on parameters of the HVAC&R system.

[0006] This disclosure also relates to a method for operating a variable speed drive (VSD) using an adaptive logic board. This method includes determining the size of the VSD, wherein the size of the VSD is at least partially based on the power output range of the VSD, and determining a target cutoff frequency of a filter in a signal sensing circuit of the adaptive logic board based on the size of the VSD. This method also includes adjusting a variable resistor element in the signal sensing circuit to achieve the target cutoff frequency of the filter. This method further includes filtering an input signal received from a sensor of the VSD through the filter to attenuate the electrical waveform of the input signal having a frequency above the target cutoff frequency, thereby generating a conditioned signal corresponding to the input signal.

[0007] This disclosure further relates to a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system, including a variable-speed drive (VSD) coupled to a motor of a compressor and configured to control the operating speed of the motor. The HVAC&R system also includes a sensor configured to generate input signals indicating the operating parameters of the VSD. The HVAC&R system further includes an adaptive logic board communicatively coupled to the sensor and the VSD. The adaptive logic board includes a signal sensing circuit having a filter configured to receive input signals from the sensor and to condition the input signals. The filter includes a variable resistor element that can be adjusted to change the cutoff frequency of the filter. The filter is configured to attenuate the electrical waveform of an input signal having a frequency above the cutoff frequency. The adaptive logic board also includes a controller configured to adjust the variable resistor element to change the cutoff frequency of the filter based on parameters of the HVAC&R system.

[0008] Various aspects of this disclosure can be better understood by reading the following detailed description and referring to the drawings. [Brief explanation of the drawing]

[0009] [Figure 1]This is a perspective view of an embodiment of a building in which a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system may be used in a commercial setting, according to the aspects of this disclosure. [Figure 2] This is a perspective view of an embodiment of a vapor compression system according to the present disclosure. [Figure 3] This is a schematic diagram of an embodiment of the vapor compression system shown in Figure 2, according to an aspect of the present disclosure. [Figure 4] This is a schematic diagram of an embodiment of the vapor compression system shown in Figure 2, according to an aspect of the present disclosure. [Figure 5] These are schematic diagrams of embodiments of a variable speed drive (VSD) that may be used in the steam compression system shown in Figures 2 to 4, according to aspects of this disclosure. [Figure 6] This is a schematic diagram of an embodiment of an adaptive logic board that may be used in the VSD shown in Figure 5, according to an aspect of this disclosure. [Figure 7] This is a flowchart of an embodiment of a method for operating the adaptive logic board shown in Figure 6, according to an aspect of the present disclosure. [Figure 8] This is a schematic diagram of an embodiment of a signal sensing circuit that may be included in the adaptive logic board of Figure 6 according to an aspect of the present disclosure. [Modes for carrying out the invention]

[0010] One or more specific embodiments of this disclosure are described below. These described embodiments are merely examples of the technology of this disclosure. In addition, not all features of actual implementations may be described herein in order to provide a concise description of these embodiments. It should be understood that in the development of any such actual implementation, such as in any engineering or design project, many implementation-specific decisions must be made to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which may differ from implementation to implementation. Furthermore, it should be understood that while such development efforts can be complex and time-consuming, they are nevertheless routine design, fabrication, and manufacturing tasks for those skilled in the art who are interested in this disclosure.

[0011] When describing elements of the various embodiments of this disclosure, the articles “a,” “an,” and “the” are intended to mean that there is one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be comprehensive and mean that there may be additional elements other than those listed. In addition, it should be understood that any reference in this disclosure to “one embodiment” or “embodiment” is not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the listed features.

[0012] Heating, ventilation, air conditioning, and refrigeration (HVAC&R) systems can be used to thermally regulate spaces within buildings, houses, or other suitable structures. For example, such an HVAC&R system may include a vapor compression system that transfers thermal energy between a heat transfer fluid, such as a refrigerant, and a conditioned fluid, such as air or water. This vapor compression system may include a condenser and an evaporator that are fluidly coupled to each other via conduits. The compressor may be used to circulate the refrigerant through the conduits, thereby enabling the transfer of thermal energy between the condenser and the evaporator.

[0013] In many cases, the compressor in an HVAC&R system can be driven by a motor. The motor can be communicatively coupled to a control system, which may include a variable speed drive unit (VSD). The control system can accelerate the motor from zero revolutions per minute (RPM) to a threshold speed. In some cases, the control system may further adjust the magnitude of the threshold speed during the operation of the HVAC&R system. The motor's power output can be selected based on the capacity of the HVAC&R system (e.g., cooling demand). In some cases, the size of the VSD is proportional to the motor's rated power output. For example, a relatively large motor can be controlled by a VSD that can supply larger currents and voltages than a VSD configured to control a relatively small motor. This allows several sizes of VSDs to be used with an HVAC&R system to control a wide range of motors with varying power output thresholds.

[0014] Each VSD may include a logic board (e.g., a printed circuit board (PCB)) that can monitor and / or control specific operating parameters of the VSD. For example, the logic board may monitor the magnitude of the current and / or voltage drawn by or supplied to the VSD, the magnitude of the current and / or voltage output by the VSD (e.g., to a motor), the magnitude of the current through the VSD's DC bus, and / or any other suitable operating parameters of the VSD.

[0015] A particular logic board may be configured to accommodate a VSD of a specific size and to monitor the operating parameters of a VSD of that size. For example, a logic board configured to monitor the operating parameters of a relatively large VSD may include sensing circuits (e.g., a first set of electrical components) configured to monitor the operating parameters of a relatively large VSD, while a logic board configured to monitor the operating parameters of a relatively small VSD may include sensing circuits (e.g., a second set of electrical components) configured to monitor the operating parameters of a relatively small VSD. Thus, several logic boards may be included in an HVAC&R system, each containing different internal components configured to enable monitoring of VSD parameters of a particular size VSD. Unfortunately, manufacturing and including multiple different logic boards within an HVAC&R system can complicate assembly and increase the production cost of the HVAC&R system.

[0016] Embodiments of this disclosure relate to an adaptive logic board that is implemented on a VSD of multiple different sizes (e.g., VSDs of different models) and configured to monitor the operating parameters of VSDs of various sizes. In particular, this adaptive logic board includes an adjustable sensing circuit configured to facilitate monitoring of the operating parameters of the VSD at different sampling frequencies that can be selected and / or adjusted based on the size of the VSD (e.g., model, type). Thus, the adaptive logic board can be implemented on VSDs of various different sizes to effectively monitor the operation of the VSDs.

[0017] For example, the sensing circuit of an adaptive logic board may include at least one signal sensing circuit configured to receive input signals (e.g., analog signals, electrical waveforms) from sensors of a VSD (e.g., voltage transducers, current transducers). This sensor may be configured to monitor the power of a certain phase flowing through the power lines of the VSD, control signals transmitted and received by the VSD, and / or other suitable flows of electrical energy through the VSD. Thus, the input signal generated by the sensor may indicate the frequency, voltage, and / or current of electrical energy flowing through a particular component or part of the VSD. The signal sensing circuit may include a filter (e.g., a low-pass filter) configured to condition or filter the input signal to produce a conditioned signal, which may be sent to a data logging component of the adaptive logic board (e.g., an analog-to-digital converter) for processing. Thus, this data logging component can convert the conditioned signal, for example, from an analog signal to a digital signal. In some embodiments, a relatively large VSD may output electrical energy in a phase or transmit a corresponding data signal at a first frequency which may be less than a second frequency at which a relatively small VSD outputs electrical energy in a phase or transmits a corresponding data signal. Therefore, since the frequency of the input signal generated by the sensor and received by the signal sensing circuit may vary based on the size of the VSD to which the adaptive logic board is coupled, the sampling frequency of the data logging component can be adjusted based on the size of the VSD to facilitate the acquisition of data corresponding to the monitored operating parameters of the VSD.

[0018] To suppress aliasing during the analysis of a conditioned signal received by a data logging component, it is desirable to adjust the filter's cutoff frequency based on the sampling frequency of the data logging component, or in other words, based on the VSD size. In particular, it may be desirable to adjust the cutoff frequency to a value less than the sampling frequency of the data logging component (e.g., less than 80 percent of the sampling frequency), so that any electrical waveforms present in the input signal that have frequencies that could cause aliasing when sampled by the data logging component are substantially attenuated. For clarity, where used herein, the term “aliasing” should be interpreted as understood by those skilled in the art and as defined herein. For example, “aliasing” of data may refer to distortion of the data signal or the generation of artifacts in the data signal when the data signal is reconstructed from a sampling different from the original continuous data signal.

[0019] The filter of the signal sensing circuit includes a variable resistor element (e.g., a digital potentiometer) which is operable to adjust the filter's cutoff frequency to a target cutoff frequency corresponding to the size of the VSD to which the adaptive logic board is coupled, as described in detail herein. Thus, the filter enables sampling of the conditioned signal (e.g., via a data logging component) with virtually no aliasing at various sampling frequencies. The adaptive logic board's controller may be configured to determine the size of the VSD and generate instructions to adjust the resistance value of the variable resistor element based on the size of the VSD and / or the sampling frequency of the data logging component. The controller may be configured to receive instructions for the size of the VSD to which the adaptive logic board is coupled from a remote source (e.g., an external control system, a cloud computing system) or a combination thereof, during mounting the adaptive logic board onto the VSD, during VSD startup, during adaptive logic board startup, and / or during startup of a cooling system having a VSD. When the controller receives an instruction for the VSD size, or otherwise determines the VSD size, it can adjust the filter's cutoff frequency to a target cutoff frequency corresponding to the VSD size. That is, the controller can adjust the filter's cutoff frequency to a cutoff frequency that allows sampling of the input signal at a desired sampling frequency (e.g., via a data logging component) with virtually no aliasing.

[0020] As a non-limiting example, if the adaptive logic board determines or receives an indication that it is coupled to a relatively large VSD, it can adjust the components of the signal sensing circuit (e.g., a variable resistor) so that the filter has a first target cutoff frequency (e.g., a relatively low cutoff frequency). Thus, the filter can appropriately condition a relatively low-frequency input signal that may be output by the VSD's sensor and received by the signal sensing circuit with virtually no aliasing, enabling sampling of the input signal (e.g., via a data logging component) at a first sampling frequency (e.g., a relatively low sampling frequency). Conversely, if the adaptive logic board determines or receives an indication that it is coupled to a relatively small VSD, it can adjust the components of the signal sensing circuit (e.g., a variable resistor) so that the filter has a second target cutoff frequency (e.g., a relatively high cutoff frequency) that can be greater than the first target cutoff frequency. Therefore, the filter can appropriately condition the relatively high-frequency input signal that may be output by the VSD's sensor and received by the signal sensing circuit, enabling sampling of the input signal at a second sampling frequency (e.g., a relatively high sampling frequency, i.e., a sampling frequency greater than the first sampling frequency) with virtually no aliasing (e.g., via a data logging component). In this way, the adaptive logic board can be implemented on VSDs of various sizes to monitor and acquire data on the VSD's operating parameters at various sampling frequencies, with the acquired data having virtually no aliasing. Thus, the adaptive logic board can reduce assembly costs and simplify production compared to conventional logic boards.

[0021] For clarity, as used herein, the "size" of a VSD may indicate the type or model of the VSD implemented within an HVAC system. The model of the VSD can be selected based on one or more operating parameters of the HVAC system, such as, for example, the magnitude and / or frequency of the alternating current (A / C) or voltage supplied to the VSD, the power output range of the VSD, and / or other suitable parameters. For example, in some embodiments, the model or type (e.g., the size) of the VSD electrically coupled to the motor of the HVAC system can be determined based on the magnitude of the input voltage supplied to the VSD by the power source. Thus, even if the total power output ranges (e.g., the current supplied to their respective motors by the VSDs) of a first model of VSD and a second model of VSD are substantially similar to each other, the first model of VSD (e.g., the first size of the VSD) can be implemented in embodiments where the voltage output of the power source is relatively large, and the second model of VSD (e.g., the second size of the VSD) can be implemented in embodiments where the voltage output of the power source is relatively small. It should be understood that the various "sizes" of the VSD can indicate models or types of VSDs that are configured to receive and / or output electricity at different currents, voltages, and / or frequencies, and / or have different internal structures, components, and / or layouts.

[0022] Referring now to the drawings, FIG. 1 is a perspective view of an environmental embodiment for a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system 10 in a building 12 of a typical commercial situation. The HVAC&R system 10 can include a vapor compression system 14 (e.g., a chiller) that supplies a cooled liquid that can be used to dissipate heat from the building 12. The HVAC&R system 10 can also include a boiler 16 for supplying a warm liquid to heat the building 12 and an air distribution system for circulating air through the building 12. The air distribution system can also include an air return duct 18, an air supply duct 20, and / or an air handler 22. In some embodiments, the air handler 22 can include a heat exchanger connected to the boiler 16 and the vapor compression system 14 by a conduit 24. The heat exchanger within the air handler 22 can receive either the heated liquid from the boiler 16 or the cooled liquid from the vapor compression system 14, depending on the operating mode of the HVAC&R system 10. The HVAC&R system 10 is shown with a separate air handler for each floor of the building 12, but in other embodiments, the HVAC&R system 10 can include an air handler 22 and / or other components that can be shared between floors.

[0023] FIGS. 2 and 3 are embodiments of a vapor compression system 14 that can be used in the HVAC&R system 10. The vapor compression system 14 can circulate refrigerant through a circuit that begins with a compressor 32. The circuit can also include a condenser 34, an expansion valve or expansion device 36, and a liquid chiller or evaporator 38. The vapor compression system 14 can further include a control panel 40 having an analog-to-digital (A / D) converter 42, a microprocessor 44, a non-volatile memory 46, and / or an interface board 48.

[0024] Some examples of fluids that can be used as refrigerants in the vapor compression system 14 are hydrofluorocarbon (HFC) refrigerants, such as R-410A, R-407, R-134a, hydrofluoroolefins (HFOs), or “natural” refrigerants such as ammonia (NH3) (R-717), carbon dioxide (CO2) (R-744), or hydrocarbon refrigerants, water vapor, or any other suitable refrigerant. In some embodiments, the vapor compression system 14 may be configured to efficiently utilize a refrigerant having a standard boiling point of about 19 degrees Celsius (66 degrees Fahrenheit) at atmospheric pressure, also referred to as a low-pressure refrigerant in contrast to a medium-pressure refrigerant such as R-134a. As used herein, “standard boiling point” may refer to the boiling temperature measured at atmospheric pressure.

[0025] In some embodiments, the vapor compression system 14 may use one or more of the following: a variable speed drive unit (VSD) 52, a motor 50, a compressor 32, a condenser 34, an expansion valve or expansion device 36, and / or an evaporator 38. The motor 50 may drive the compressor 32 and may be powered by the variable speed drive unit (VSD) 52. The VSD 52 receives AC power having a specific fixed circuit voltage and fixed circuit frequency from an alternating current (AC) power source and provides power having a variable voltage and frequency to the motor 50. In other embodiments, the motor 50 may be powered directly from an AC or DC power source. The motor 50 may include any type of motor that is powered by the VSD or can be powered directly from an AC or DC power source, such as a switched reluctance motor, an induction motor, an electronically rectified permanent magnet motor, or another suitable motor.

[0026] The compressor 32 compresses the refrigerant vapor and delivers it to the condenser 34 through a discharge passage. In some embodiments, the compressor 32 may be a centrifugal compressor. The refrigerant vapor delivered to the condenser 34 by the compressor 32 can transfer heat to the cooling fluid (e.g., water or air) in the condenser 34. As a result of heat transfer with the cooling fluid, the refrigerant vapor can condense into liquid refrigerant in the condenser 34. The liquid refrigerant from the condenser 34 can flow through an expansion device 36 to the evaporator 38. In the embodiment illustrated in Figure 3, the condenser 34 is water-cooled and includes a bundle of tubes 54 connected to a cooling tower 56 that supplies the cooling fluid to the condenser 34.

[0027] The liquid refrigerant delivered to the evaporator 38 may absorb heat from another cooling fluid, which may or may not be the same cooling fluid used in the condenser 34. The liquid refrigerant in the evaporator 38 may undergo a phase change from liquid refrigerant to refrigerant vapor. As shown in the illustrated embodiment in Figure 3, the evaporator 38 may include a tube bundle 58 having a supply line 60S and a return line 60R connected to the cooling load 62. The cooling fluid in the evaporator 38 (e.g., water, ethylene glycol, calcium chloride brine, sodium chloride brine, or any other suitable fluid) enters the evaporator 38 via the return line 60R and exits the evaporator 38 via the supply line 60S. The evaporator 38 may reduce the temperature of the cooling fluid in the tube bundle 58 through heat transfer with the refrigerant. The tube bundle 58 in the evaporator 38 may include multiple tubes and / or multiple tube bundles. In any case, the refrigerant vapor exits the evaporator 38 and returns to the compressor 32 via the suction line to complete the cycle.

[0028] Figure 4 is a schematic diagram of a vapor compression system 14 having an intermediate circuit 64 incorporated between a condenser 34 and an expansion device 36. The intermediate circuit 64 may have an inlet line 68 that is directly fluid-connected to the condenser 34. In other embodiments, the inlet line 68 may be indirectly fluid-connected to the condenser 34. As shown in the illustrated embodiment of Figure 4, the inlet line 68 includes a first expansion device 66 positioned upstream of the intermediate vessel 70. In some embodiments, the intermediate vessel 70 may be a flash tank (e.g., a flash intercooler). In other embodiments, the intermediate vessel 70 may be configured as a heat exchanger or a "surface economizer". In the illustrated embodiment of Figure 4, the intermediate vessel 70 is used as a flash tank, and the first expansion device 66 is configured to reduce the pressure of the liquid refrigerant received from the condenser 34 (e.g., to expand it). During the expansion process, a portion of the liquid may vaporize, and therefore the intermediate vessel 70 can be used to separate the vapor from the liquid received from the first expansion device 66.

[0029] Furthermore, the intermediate container 70 can cause further expansion of the liquid refrigerant due to the pressure drop it experiences when it enters the intermediate container 70 (for example, due to the rapid increase in volume it experiences when entering the intermediate container 70). The vapor in the intermediate container 70 can be drawn out by the compressor 32 through the suction line 74 of the compressor 32. In other embodiments, the vapor in the intermediate container can be drawn into the intermediate stage of the compressor 32 (for example, instead of the suction stage). The liquid refrigerant collected in the intermediate container 70 may have a lower enthalpy than the liquid refrigerant leaving the condenser 34 due to expansion in the expansion device 66 and / or within the intermediate container 70. The liquid from the intermediate container 70 can then flow through line 72 to the evaporator 38 through the second expansion device 36.

[0030] In some embodiments, the size (e.g., type, model) of the VSD52 may indicate the magnitude of the power output range (e.g., supply current, supply voltage) that the VSD52 is configured to generate. For example, a larger VSD may be used to control the operation of a relatively large motor (e.g., a 5,000 horsepower (HP) motor) and may be configured to receive relatively large currents and / or voltages. Conversely, a smaller VSD may be used to operate a relatively small motor (e.g., a 100 HP motor) and may be configured to receive and / or output relatively small currents and / or voltages. Additionally or alternatively, as described above, the size of the VSD52 may indicate, for example, the magnitude of the voltages and / or currents received in the VSD52 from a power source (e.g., an A / C power source) and / or other configurations of the VSD52.

[0031] In some embodiments, various components of the VSD52 may output and / or receive power, output and / or receive control signals, and / or otherwise operate at specific frequencies corresponding to and varying based on the size of the VSD52. As a non-limiting example, in embodiments where the VSD52 is relatively large, the VSD52 may be configured to output power to a certain phase at a relatively low first frequency (e.g., for the motor 50). Conversely, in embodiments where the VSD52 is relatively small, the VSD52 may be configured to output power to a phase at a relatively high second frequency (e.g., higher than the first frequency) (e.g., for the motor 50). Therefore, when monitoring the operating parameters of the VSD52 (e.g., power to a phase output by the VSD52) and the logging data corresponding to the operating parameters (e.g., via a data logging component on a logic board), it is desirable to adjust the sampling frequency of the data logging component based on the repetition frequency of the monitored operating parameters of the VSD52 to improve the accuracy of the data logging operation. Accordingly, embodiments of the present disclosure relate to an adaptive logic board, which includes a sensing circuit having an adjustable sampling frequency and a filter cutoff frequency, enabling the acquisition of data corresponding to one or more monitored operating parameters of the VSD52 based on the size of the VSD52, with substantially no aliasing. It should be understood that any of the features described herein can be incorporated with the vapor compression system 14 or any other suitable HVAC&R system 10.

[0032] With the foregoing in mind, Figure 5 is a schematic diagram of an embodiment of the VSD52, including an adaptive logic board 100 that can be used to monitor and / or control the operation of the VSD52. It should be understood that the VSD52 and the adaptive logic board 100 can be used to control, for example, the motor 50 of the vapor compression system 14 in Figures 1 to 4. An alternating current (AC) power supply 102 can supply AC power to the VSD52, which then supplies AC power to the motor 50. The AC power supply 102 can provide three-phase, fixed-voltage, and fixed-frequency AC power to the VSD52 from an AC power grid or distribution system. For example, the AC power supply 102 can provide first-phase AC power, second-phase AC power, and third-phase AC power through a first power receiving line 104, a second power receiving line 106, and a third power receiving line 108, respectively.

[0033] AC power can be supplied directly from the electric utility or from one or more transformer substations between the electric utility and the AC power supply 102. In some embodiments, the AC power supply 102 may supply the VSD 52 with a three-phase AC voltage or line voltage of up to 15 kilovolts (kV) at a line frequency of 50 hertz (Hz) to 60 Hz, depending on the AC power supply 102. However, in other embodiments, the AC power supply 102 may provide the VSD 52 with any suitable fixed line voltage or fixed line frequency, depending on the configuration of the AC power supply 102. In addition, a particular site may have multiple AC power supplies that can meet the requirements for different line voltages and line frequencies.

[0034] The VSD52 induces AC power from the AC power supply 102 to the motor 50 at a desired voltage and frequency. In certain embodiments, the VSD52 can provide the motor 50 with AC power at a higher voltage and frequency than, or lower than, the fixed voltage and frequency AC power received from the AC power supply 102. For example, the VSD52 may have three internal stages: a converter 110 (e.g., a rectifier), a direct current (DC) link 112, and an inverter 114. The converter 110 can convert a fixed line frequency and / or fixed line voltage from the AC power supply 102 into DC power. The DC link 112 can filter the DC power from the converter 110 and / or store energy through components such as capacitors and / or inductors. The inverter 114 can convert the DC power from the DC link 112 into variable frequency variable voltage AC power (e.g., three-phase AC power) for the motor 50. For example, the inverter 114 can supply AC power of the first phase, AC power of the second phase, and AC power of the third phase to the motor 50 via the first output line 116, the second output line 118, and the third output line 120, respectively.

[0035] In some embodiments, the converter 110 may be a pulse-width modulation (PWM) boost converter or rectifier having an insulated-gate bipolar transistor (IGBT) to provide a boosted DC voltage to the DC link 112 and produce a basic root-mean-square (RMS) output voltage from the VSD 52 that is greater than the fixed nominal underlying RMS input voltage to the VSD 52. Furthermore, in some embodiments, the VSD 52 may incorporate components in addition to those shown in Figure 5 to provide the motor 50 with an appropriate output voltage and frequency.

[0036] In a particular embodiment, the motor 50 may be an induction motor capable of being driven at a variable speed. The induction motor may have any preferred pole configuration, including 2 poles, 4 poles, 6 poles, or any preferred number of poles. The induction motor is used to drive a load such as the compressor 32 of the vapor compression system 14. In other embodiments, the motor 50 may be any preferred motor for driving the compressor 32 and / or other preferred devices.

[0037] In some embodiments, the adaptive logic board 100 may be communicatively coupled to the VSD 52 via one or more harnesses 124. This harness 124 may include multiple wires (e.g., copper wires, optical fibers) that enable the transmission of data and / or signals between the VSD 52 and the adaptive logic board 100. In some embodiments, the adaptive logic board 100 may monitor and / or control various operating parameters of the power supplied to the VSD 52 by the AC power supply 102, such as the frequency and / or voltage of the power supplied to the VSD 52, and / or the magnitude of the current drawn by the VSD 52.

[0038] For example, the adaptive logic board 100 may be communicatively coupled to an input sensing unit 130 (e.g., via a harness 124), which may be positioned on, around, or adjacent to each of the first power receiving line 104, the second power receiving line 106, and / or the third power receiving line 108. In particular, a first input sensing unit 132 positioned on the first power receiving line 104 can monitor the first phase AC power flowing through the first power receiving line 104. The first input sensing unit 132 may include a voltage transducer, a current transducer, or another suitable device or sensor configured to measure parameters of the first phase AC power, such as the frequency of the first phase AC power, the voltage value of the first phase AC power, and / or the current value of the first phase AC power. The first input sensing unit 132 can output a signal (e.g., an analog signal, an electrical waveform) that is proportional to the value of the parameters of the first phase AC power being monitored by the first input sensing unit 132. For example, in an embodiment where the first input sensing unit 132 is configured to monitor the frequency of the first phase AC power supplied to the VSD 52, the first input sensing unit 132 can output an electrical waveform having a frequency corresponding to (e.g., substantially equivalent to) the frequency of the first phase AC power. Similarly, a second input sensing unit 134 located on the second power receiving line 106 can monitor the parameters (e.g., frequency, voltage, and / or current) of the second phase AC power flowing through the second power receiving line 106, and a third input sensing unit 136 located on the third power receiving line 108 can monitor the parameters (e.g., frequency, voltage, and / or current) of the third phase AC power flowing through the third power receiving line 108.As described in detail herein, the first input sensing unit 132, the second input sensing unit 134, and the third input sensing unit 136 can be communicably coupled (for example, via harness 124) to one or more signal sensing circuits 138 of the adaptive logic board 100, which are configured to sample the respective signals output by the first input sensing unit 132, the second input sensing unit 134, and the third input sensing unit 136.

[0039] The adaptive logic board 100 can additionally or alternatively monitor parameters of the power supplied to the motor 50 by the VSD 52. For example, the output sensing unit 140 may include a first output sensing unit 142, a second output sensing unit 144, and a third output sensing unit 146, respectively, arranged on, around, or adjacent to the first output line 116, the second output line 118, and the third output line 120. Thus, the first output sensing unit 142, the second output sensing unit 144, and the third output sensing unit 146 can monitor the first phase AC power, the second phase AC power, and the third phase AC power flowing through the first output line 116, the second output line 118, and the third output line 120, respectively. That is, the first output sensing unit 142, the second output sensing unit 144, and the third output sensing unit 146 may include voltage transducers, current transducers, and / or other suitable devices or sensors configured to measure the frequency, voltage value, and / or current value of the AC power of the first phase, the AC power of the second phase, and the AC power of the third phase, respectively. Similar to the input sensing unit 130 described above, the output sensing units 140 can be communicably coupled to one or more signal sensing circuits 138 of the adaptive logic board 100 via the harness 124.

[0040] Figure 6 is a schematic diagram of an embodiment of the adaptive logic board 100. As described above, the adaptive logic board 100 includes one or more signal sensing circuits 138 that can be used to analyze output signals generated by each of the input sensing units 130, each of the output sensing units 140, and / or other suitable sensing units that may be included with the VSD 52. Note that the embodiment illustrated in Figure 6 shows a single signal sensing circuit 154 of the one or more signal sensing circuits 138, which is associated with and configured to analyze an output signal generated by a third output sensing unit 146. However, as described below, the adaptive logic board 100 may include individual signal sensing circuits associated with each of the input sensing units 130 and each of the output sensing units 140, and configured to monitor the respective output signals of each of the input sensing units 130 and the output sensing units 140. Therefore, in some embodiments, the adaptive logic board 100 may include six signal sensing circuits 138, where each of the six signal sensing circuits 138 is associated with and communicatively coupled to one of the input sensing units 130 or one of the output sensing units 140. Additionally or alternatively, the adaptive logic board 100 may include additional or fewer than six signal sensing circuits 138. For example, a particular embodiment of the adaptive logic board 100 may include one, two, three, four, five, six, or more signal sensing circuits 138. In fact, the adaptive logic board 100 may include multiple signal sensing circuits 138, which may enable the adaptive logic board 100 to monitor, for example, the input current, voltage, and / or frequency of power flowing through the first power receiving line 104, the second power receiving line 106, and the third power receiving line 108, as well as the output current, voltage, and / or frequency of power flowing through the first output line 116, the second output line 118, and the third output line 118, the current and / or voltage of power flowing through the DC link 112, and / or the filter current of the VSD 52.

[0041] In the embodiment illustrated in Figure 6, the signal sensing circuit 154 includes an input signal line 160 electrically coupled to a third output sensing unit 146. In this way, the signal sensing circuit 154 can receive an input signal 162 (e.g., an analog input signal, an electrical waveform) from the third output sensing unit 146. In some embodiments, the full frequency of the input signal 162 can correspond to the frequency of the phase AC power flowing through the third output line 120 of the VSD 52. In other embodiments, it should be understood that the input signal line 160 can be coupled to any other suitable sensor or sensing unit configured to monitor specific operating parameters or a set of parameters of the VSD 52.

[0042] The signal sensing circuit 154 can be communicatively coupled to the controller 164 of the adaptive logic board 100 via an output signal line 166. The output signal line 166 can transmit an output signal 168 (e.g., an analog output signal) from the signal sensing circuit 154 to the controller 164. As described in detail herein, the output signal 168 can correspond to the form of the input signal 162 conditioned (e.g., filtered) by the signal sensing circuit 154. The controller 164 may include a data logging component 170 (e.g., an analog-to-digital converter) configured to analyze (e.g., sample) the output signal 168 to generate a data signal (e.g., digital data) corresponding to the operating parameters monitored by the signal sensing circuit 154. In particular, the data logging component 170 may be configured to sample the output signal 168 at a specific sampling frequency to generate a digital output 172 (e.g., a digital data signal) corresponding to the input signal 162. In other words, the digital output 172 may include data indicating the values ​​of operating parameters monitored by the signal sensing circuit 154, such as the frequency, voltage, and / or current of the phase power flowing through the third output line 120. The controller 164 can redirect the digital output 172 to other control circuits of the vapor compression system 14 and / or use the digital output 172 to control / adjust the operation of the VSD 52.

[0043] In the illustrated embodiment, the signal sensing circuit 154 includes a first resistor 180, a second resistor 182, a variable resistor element 184, and a first capacitor 186, all electrically coupled to the input signal line 160. The first resistor 180 and the variable resistor element 184 are electrically coupled to the input signal line 160 in parallel with each other, while the second resistor 182 is electrically coupled to the input signal line 160 in series with the first resistor 180 and the variable resistor element 184. The first capacitor 186 can be electrically coupled to the input signal line 160 of the adaptive logic board 100 and to ground 188 (e.g., electrical ground). The first resistor 180, the second resistor 182, the variable resistor element 184, and the first capacitor 186 can collectively form at least a portion of the filter 190 (e.g., a low-pass filter) of the signal sensing circuit 154. As will be described in detail below, the filter 190 can be configured to condition the input signal 162 so that it attenuates or removes certain frequencies of the input signal 162 that may cause aliasing of the input signal 162 when sampled by the controller 164.

[0044] The signal sensing circuit 154 may include an operational amplifier 192 electrically coupled to the filter 190 via line 194. In particular, line 194 can electrically couple the filter 190 to a first input terminal 196 (e.g., a non-inverting input terminal) of the operational amplifier 192. A second input terminal 198 (e.g., an inverting input terminal) of the operational amplifier 192 may be electrically coupled to an output terminal 200 of the operational amplifier 192 via line 195. The operational amplifier 192 may include a first lead wire 202 electrically coupled to ground 188 and a second lead wire 204 electrically coupled to a power source 206 (e.g., a positive voltage source) configured to supply a voltage differential (e.g., 0 volts ± 20 volts) that enables the operation of the operational amplifier 192. The operational amplifier 192 may include a predetermined or adjustable gain and can amplify the magnitude of the conditioned signal 210 received from the filter 190 to generate an output signal 168. As will be described in more detail below, the conditioned signal 210 can be conditioned (e.g., filtered) by the filter 190 to represent a form of the input signal 162 that attenuates certain frequencies of the electrical waveform that may be present in the input signal 162. By amplifying the magnitude of the conditioned signal 210 (e.g., to generate the output signal 168), the operational amplifier 192 can facilitate sampling of the conditioned signal 210 via the controller 164 (e.g., via the data logging component 170 of the controller 164). In certain embodiments, the second capacitor 212 can be electrically coupled to ground 188 and the power source 206 to mitigate fluctuations in the voltage that can be supplied to the operational amplifier 192 by the power source 206, thus enabling the effective operation of the operational amplifier 192.

[0045] In some embodiments, the first resistor 180 and the second resistor 182 may each have a fixed resistance value, and the first capacitor 186 and the second capacitor 212 may each have a fixed capacitance value. For example, the resistance value of the first resistor 180 may be about 1000 ohms to about 4000 ohms, while the resistance value of the second resistor 182 may be about 500 ohms to about 3000 ohms. The capacitance values ​​of the first capacitor 186 and the second capacitor 212 may each be about 2000 picofarads to 4000 picofarads.

[0046] The variable resistor element 184 is operable to adjust the resistance value (e.g., resistivity) between its input terminal 220 and output terminal 222. For example, the variable resistor element 184 may include a digital potentiometer, a multiplier-to-digital-to-analog converter (MDAC), or another preferred device operable to adjust the resistance value between its input terminal 220 and output terminal 222. As a non-limiting example, the variable resistor element 184 may be operable to selectively adjust the resistance value between its input terminal 220 and output terminal 222 to be between approximately 0 ohms and approximately 10,000 ohms.

[0047] In some embodiments, the controller 164 can be communicatively and / or electrically coupled to the variable resistor element 184 via a communication line 197. As described in detail below, the controller 164 can be configured to command the variable resistor element 184 (for example, via a control signal transmitted over the communication line 197) to adjust the resistance between the input terminal 220 and the output terminal 222 based on one or more inputs received by the controller 164. To this end, the controller 164 can operate the variable resistor element 184 based on the received inputs to adjust the cutoff frequency of the filter 190 between a number of discrete values.

[0048] For example, in some embodiments, the cutoff frequency of the filter 190 can be expressed by the equation f = 1 / (2πRC), where "f" represents the cutoff frequency of the filter 190, "R" (also referred to herein as the "R value") represents the combined resistance of at least a first resistor 180, a second resistor 182, and a variable resistor element 184, and "C" represents the capacitance value of at least a first capacitor 186. The controller 164 can adjust the combined resistance value "R" in the above equation by adjusting the resistance across the variable resistor element 184. Thus, the controller 164 can adjust the cutoff frequency of the filter 190 by controlling the resistance value of the variable resistor element 184. As described below, the filter 190 can condition (e.g., filter) the input signal 162 received by the filter 190 to substantially attenuate the electrical waveform of the input signal 162 having a frequency above the cutoff frequency set for the filter 190. Therefore, the conditioned signal 210 output by the filter 190 can be in the form of an input signal 162 that does not contain, or substantially does not contain, electrical waveforms with frequencies above the cutoff frequency of the filter 190.

[0049] In some embodiments, the controller 164 can adjust the cutoff frequency of the filter 190 to a target cutoff frequency based on the size of the VSD 52 to which the adaptive logic board 100 is coupled. In certain embodiments, the controller 164 may be configured to determine the size of the VSD 52 coupled to the adaptive logic board 100 based on the configuration of a dual in-line package (DIP) switch 230 or other switching device that is communicably coupled to the controller 164 (e.g., via line 232). The DIP switch 230 can be coupled to the VSD 52, to the chassis of the adaptive logic board 100, or to any other suitable component of the vapor compression system 14. The DIP switch 230 may include one or more switches 233 that can each be adjusted to separate positions (e.g., on / off position, up / down position) (e.g., via input from an operator of the vapor compression system 14). A particular configuration of the switches 233 can correspond to the size of the VSD 52. For example, positioning switch 233 in the first configuration can indicate that the adaptive logic board 100 is coupled to a relatively large VSD 52, while positioning switch 233 in the second configuration can indicate that the adaptive logic board 100 is coupled to a relatively small VSD 52. When mounting the adaptive logic board 100 to a specific size VSD 52, the operator of the vapor compression system 14 can adjust switch 233 of the DIP switch 230 to the corresponding set value.

[0050] The controller 164 may include a processor 234 that can determine the size (e.g., model, type) of the VSD52 coupled to the adaptive logic board 100 based on the configuration of the DIP switch 230. For example, when the compressor 32, VSD52, and / or the adaptive logic board 100 are started, the processor 234 can determine the configuration of switch 233 of the DIP switch 230. The processor 234 can refer to a reference table stored in the memory device 236 of the controller 164, which correlates a specific configuration of switch 233 with various sizes of VSD52. Thus, the processor 234 can use the reference table to determine the size of VSD52 based on the configuration of switch 233.

[0051] It should be understood that the processor 234 may include a microprocessor capable of running software to control components of the adaptive logic board 100, such as the variable resistor element 184, the components of the VSD 52, and / or other components of the vapor compression system 14. Furthermore, the processor 234 may include multiple microprocessors, one or more "general-purpose" microprocessors, one or more dedicated microprocessors, and / or one or more application-specific integrated circuits (ASICs), one or more field-programmable gate arrays (FPGAs), one or more digital signal processors (DSPs), or a combination thereof. For example, the processor 234 may include one or more reduced instruction set (RISC) processors. The memory device 236 may store information such as control software, reference tables, configuration data, executable instructions, and any other suitable data. The memory device 236 may include volatile memory such as random access memory (RAM) and / or non-volatile memory such as read-only memory (ROM). The memory device 236 can store processor-executable instructions, including firmware or software for processor 234 to execute, such as instructions for controlling components of the adaptive logic board 100 and / or VSD52. In some embodiments, the memory device 236 is a tangible, non-temporary, machine-readable medium that can store machine-readable instructions for processor 234 to execute. The memory device 236 may include ROM, flash memory, a hard drive, or any other suitable optical, magnetic, or semiconductor storage medium, or a combination thereof.

[0052] In some embodiments, the controller 164 can determine the size of the VSD52 to which the adaptive logic board 100 is coupled based on input signals received from an external computing device 240 that is communicably coupled to the controller 164 via a communication interface 242. The external computing device 240 may include a computer, tablet, smart wearable device, display, or another suitable computing device on which an operator can input the size of the VSD52. The communication interface 242 can transmit input signals indicating the size of the VSD52 to the operator from the external computing device 240 to the controller 164 via wireless or wired communication technology (e.g., Wi-Fi, near-field communication, Bluetooth, Zigbee, Z-wave, ISM, built-in wireless module, another suitable wireless communication technology, or wired connection). Thus, the controller 164 can use the input signals received in the external computing device 240 to adjust the operation of the adaptive logic board 100 based on the size of the VSD52 coupled to the adaptive logic board 100. It should be understood that the external computing device 240 may include processing circuits that are independent of and separate from the controller 164.

[0053] In some embodiments, the controller 164 can determine the size of the VSD52 based on the structure of the harness 124 (see Figure 5). For example, a particular harness may be associated with each size or range of sizes of the VSD52. The harness 124 may include additional or fewer connection wires depending on the size of the associated VSD52. For example, a harness associated with a relatively large VSD52 may include a first amount of connection wires (e.g., a large amount of connection wires), while a harness associated with a relatively small VSD52 may include a second amount of connection wires (e.g., a small amount of connection wires). In some embodiments, the harness 124 can be electrically coupled to the adaptive logic board 100 via a universal plug (e.g., a terminal plug). The universal plug may include a predetermined number of connection ports, of which a first amount of connection ports are electrically coupled to the connection wires. Thus, in some embodiments, a second amount (e.g., the remaining amount) of connection ports may be left empty. The controller 164 can determine the amount of connection wires to be included in the universal plug and the amount of available connection ports, and therefore can determine the size of the VSD52.

[0054] For example, the controller 164 can send a test signal to each of the multiple connection ports to determine whether a particular connection port can communicatively couple the adaptive logic board 100 to the VSD 52. Thus, the adaptive logic board 100 can determine some established connection ports and some vacant connection ports. The adaptive logic board 100 can use some established connection ports and some vacant connection ports to determine the size of the VSD 52. As a non-limiting example, three vacant positions may indicate that the adaptive logic board 100 is coupled to a relatively small VSD, while no vacant positions may indicate that the adaptive logic board 100 is coupled to a relatively large VSD.

[0055] In some embodiments, the adaptive logic board 100 can be electrically coupled to the VSD 52 using multiple harnesses. For example, the adaptive logic board 100 may include a harness associated with various communication, voltage sensing, and / or current sensing features of the adaptive logic board 100. In some embodiments, the controller 164 may be configured to determine the size of the VSD 52 based on these additional harnesses, in addition to or instead of harness 124. That is, in some embodiments, the controller 164 can determine the size of the VSD 52 based on the structure and / or communication from any one harness or combination of harnesses that can be used to electrically couple the adaptive logic board 100 to the VSD 52. Thus, based on the techniques described above, the adaptive logic board 100 can determine the size of the VSD 52 by, for example, identifying some established connection ports in the additional harnesses and some vacant connection ports in the additional harnesses. Additionally or alternatively, the adaptive logic board 100 can determine the size of the VSD based on identification codes that can be stored in one or more of the harnesses (for example, via each memory device disposed within the harnesses).

[0056] In either case, once the adaptive logic board 100 determines the size of the VSD 52 to which it is coupled, the controller 164 can adjust the variable resistor element 184 (for example, via a control signal transmitted over the communication line 197) to achieve the target cutoff frequency of the filter 190 corresponding to the size of the VSD 52. Thus, the filter 190 can effectively attenuate the frequency of the input signal 162 that exceeds the target cutoff frequency and which otherwise might cause aliasing when sampled by the controller 164 (for example, via the data logging component 170).

[0057] In some embodiments, the controller 164 can determine a target cutoff frequency for the filter 190 corresponding to the size of the VSD 52 associated with the adaptive logic board 100 by referring to a reference table stored in the memory device 236. Additionally or alternatively, the controller 164 can receive feedback indicating the target cutoff frequency from an external computing device 240. In any case, once the size of the VSD 52 to which the adaptive logic board 100 is coupled is determined, the controller 164 can adjust the resistance of the variable resistor element 184 to achieve the desired target cutoff frequency for the filter 190 corresponding to the size of the VSD 52. In this way, as described below, the controller 164 can configure a signal sensing circuit 154 to more effectively condition, for example, an input signal 162 received from a third output sensing unit 146.

[0058] Figure 7 is a flowchart of an embodiment of Method 280 for operating the adaptive logic board 100 to evaluate an input signal (e.g., input signal 162) received from a sensor (e.g., sensing units 130, 140) of the VSD 52. Figures 6 and 7 will be referenced together throughout the following description. Note that the steps of Method 280 described below can be performed in any preferred order and are not limited to the order shown in the embodiment illustrated in Figure 7. Furthermore, note that in certain embodiments, additional steps of Method 280 may be performed, and certain steps of Method 280 may be omitted. Also, understand that certain steps of Method 280 may be performed simultaneously with other steps. Method 280 can be performed by the processor 234 of the controller 164 and / or by other preferred processing circuits of the vapor compression system 14. While the following description refers to the tuning of components in signal sensing circuit 154, it should be understood that method 280 may be implemented to tune corresponding components of any other signal sensing circuits contained within one or more signal sensing circuits 138, in accordance with the disclosed technology.

[0059] Method 280 includes determining the size of the VSD52, as shown in block 282. For example, according to the aforementioned technique, the controller 164 can determine the size of the VSD52 based on the configuration of the DIP switch 230, based on operator input signals received for the external computing device 240, based on the structure and / or use of the harness 124, or via another preferred technique. Once the size of the VSD52 is determined, the controller 164 can determine the target cutoff frequency of the filter 190 of the signal sensing circuit 154 corresponding to the size of the VSD52, as shown in block 284. For example, the controller 164 can refer to a reference table stored in the memory device 236 and / or receive feedback from the external computing device 240 indicating the target cutoff frequency of the filter 190 corresponding to a particular VSD52 to which the adaptive logic board 100 is coupled.

[0060] In some embodiments, simultaneously with, before, or after the execution of block 284, the controller 164 can determine the sampling frequency of the data logging component 170 based on the size of the VSD 52. For example, if the controller 164 determines or receives an indication that the adaptive logic board 100 is coupled to a relatively large VSD 52, it can set the sampling frequency of the data logging component 170 to a relatively low sampling frequency (e.g., a first target sampling frequency). Conversely, if the controller 164 determines or receives an indication that the adaptive logic board 100 is coupled to a relatively small VSD 52, it can set the sampling frequency of the data logging component 170 to a relatively high sampling frequency (e.g., a second target sampling frequency greater than the first target sampling frequency). Furthermore, in some embodiments, the controller 164 can determine the target cutoff frequency of the filter 190 based on the sampling frequency of the data logging component 170. As a non-limiting example, the controller 164 may set the target cutoff frequency of the filter 190 to a percentage (e.g., a predetermined percentage) of the sampling frequency of the data logging component 170, which can be determined based on the size of the VSD 52 to which the adaptive logic board 100 is coupled. Thus, in such an embodiment, the controller 164 can indirectly adjust the cutoff frequency of the filter 190 based on the size of the VSD 52.

[0061] In any case, method 280 includes adjusting the variable resistor element 184 to achieve the target cutoff frequency of the filter 190, as shown in block 286. In some embodiments, the appropriate resistance value of the variable resistor element 184 to achieve the target cutoff frequency of the filter 190 can be stored in the memory device 236. Thus, the controller 164 can refer to the data stored in the memory device 236 to determine the appropriate resistance setpoint of the variable resistor element 184 to achieve the determined target cutoff frequency of the filter 190. In other embodiments, the controller 164 can be configured to calculate the appropriate resistance setpoint of the variable resistor element 184 using the above formula. In any case, the controller 164 can adjust the variable resistor element 184 to achieve the target cutoff frequency corresponding to the size of the VSD 52. Once the variable resistor element 184 has been adjusted to achieve the target cutoff frequency of the filter 190, the controller 164 can evaluate the output signal 168 generated by the signal sensing circuit 154, as shown in block 288.

[0062] For example, when the adaptive logic board 100 determines or receives an instruction that it is coupled to a relatively large VSD 52, the controller 164 can adjust the filter 190 to have a first target cutoff frequency (e.g., via an instruction sent to the variable resistor element 184), which can correspond to a relatively low cutoff frequency (e.g., about 10 kHz to about 19 kHz). Thus, the filter 190 can receive the input signal 162 and attenuate the electrical waveform in the input signal 162 having frequencies above the first target cutoff frequency to generate a conditioned signal 210. For this purpose, the conditioned signal 210 can represent the input signal 162 having any frequency of the electrical waveform above the substantially attenuated first target cutoff frequency. The operational amplifier 192 can receive the conditioned signal (e.g., at the input terminal 220) and amplify the conditioned signal 210 to generate an output signal 168. The controller 164 receives the output signal 168 and can sample the output signal 168 at a first sampling frequency (e.g., a relatively low sampling frequency) via the data logging component 170. Thus, the data logging component 170 can generate a digital output 172 corresponding to the input signal 162. The first sampling frequency of the data logging component 170 can exceed a first target cutoff frequency. For example, the first sampling frequency may be about 17 kHz to 24 kHz. In some embodiments, the controller 164 can adjust the target cutoff frequency of the filter 190 and / or the sampling frequency of the data logging component 170, so that the target cutoff frequency is a percentage of the first sampling frequency (e.g., 70 percent to 80 percent).

[0063] Conversely, when the adaptive logic board 100 determines or receives an instruction that it is coupled to a relatively small VSD 52, the controller 164 can adjust the filter 190 (for example, via an instruction sent to the variable resistor element 184) to include a second target cutoff frequency that can accommodate a relatively high cutoff frequency (e.g., about 18 kHz to about 35 kHz). Thus, the filter 190 can receive the input signal 162 and attenuate the electrical waveform of the input signal 162 having a frequency above the second target cutoff frequency to generate a conditioned signal 210. Thus, the conditioned signal 210 can represent the input signal 162 having any frequency of the electrical waveform above the substantially attenuated second target cutoff frequency. The operational amplifier 192 can receive the conditioned signal 210 (for example, at the input terminal 220) and amplify the conditioned signal 210 to generate an output signal 168. The controller 164 receives the output signal 168 and can sample the output signal 168 via the data logging component 170 at a second sampling frequency which may be higher than the first sampling frequency. Thus, the data logging component 170 can generate a digital output 172 corresponding to the input signal 162. The second sampling frequency of the data logging component 170 can exceed a second target cutoff frequency. For example, the second sampling frequency may be about 24 kHz to 45 kHz. In some embodiments, the controller 164 can adjust the target cutoff frequency of the filter 190 and / or the sampling frequency of the data logging component 170 so that the target cutoff frequency is a percentage (e.g., 70 percent to 80 percent) of the second sampling frequency.

[0064] It should be understood that in certain embodiments, the filter 190 may include additional or fewer components than those shown in the illustrated embodiment of Figure 6. In fact, the filter 190 may include any suitable component array that allows the cutoff frequency of the filter 190 to be adjusted (for example, based on a control signal provided via the controller 164) according to the techniques described herein. To name a few examples, the filter 190 may include a Sallen-Key filter, a passive or active variable filter, or another suitable filter architecture.

[0065] Figure 8 is a schematic diagram of some embodiments of the adaptive logic board 100 illustrating a plurality of signal sensing circuits 300. In particular, the adaptive logic board 100 includes a first signal sensing circuit 302, a second signal sensing circuit 304, a third signal sensing circuit 306, and a fourth signal sensing circuit 308. The first signal sensing circuit 302, the second signal sensing circuit 304, the third signal sensing circuit 306, and the fourth signal sensing circuit 308 can each include some or all of the components of the signal sensing circuit 154 described above. For example, the first signal sensing circuit 302, the second signal sensing circuit 304, the third signal sensing circuit 306, and the fourth signal sensing circuit 308 can each include a first resistor 180, a second resistor 182, a first capacitor 186, and an operational amplifier 192. It should be understood that the first resistor 180, the second resistor 182, and / or the first capacitor 186 of the first signal sensing circuit 302, the second signal sensing circuit 304, the third signal sensing circuit 306, and / or the fourth signal sensing circuit 308, respectively, may each be substantially identical to one another or may contain different resistance / capacitance values.

[0066] In the illustrated embodiment, each of the signal sensing circuits 300 is coupled to a common variable resistor element 310 (e.g., a quad-channel digital potentiometer). The common variable resistor element 310 may include a plurality of independently adjustable resistor elements, each associated with one of the signal sensing circuits 300. For example, the common variable resistor element 310 may include a first variable resistor element 312 corresponding to a first signal sensing circuit 302, a second variable resistor element 314 corresponding to a second signal sensing circuit 304, a third variable resistor element 316 corresponding to a third signal sensing circuit 306, and a fourth variable resistor element 318 corresponding to a fourth signal sensing circuit 308. The common variable resistor element 310 can be operated (for example, via commands received from the controller 164) to independently adjust the resistance values ​​of the first variable resistor element 312, the second variable resistor element 314, the third variable resistor element 316, and the fourth variable resistor element 318, so that the first variable resistor element 312, the second variable resistor element 314, the third variable resistor element 316, and the fourth variable resistor element 318 can adjust the respective "R value" of the signal sensing circuit 300. In fact, the common variable resistor element 310 can be communicably coupled to the controller 164 via one or more control lines 320, so that the controller 164 can command the common variable resistor element 310 to adjust the resistance values ​​of the first variable resistor element 312, the second variable resistor element 314, the third variable resistor element 316, and the fourth variable resistor element 318. Therefore, the controller 164 can adjust the corresponding target cutoff frequency of each filter 322 (e.g., a multiple of filter 190) included in each of the signal sensing circuits 300, according to the aforementioned techniques (e.g., based on the size of the VSD 52 to which the adaptive logic board 100 is coupled). It should be understood that in some embodiments, the common variable resistor element 310 may include a pair of dual-channel digital potentiometers or four single-channel digital potentiometers instead of a quad-channel digital potentiometer.

[0067] In the illustrated embodiment, each of the signal sensing circuits 300 includes an input terminal 330 configured to receive a corresponding input signal (e.g., input signal 162) and an output terminal 332 configured to transmit a corresponding output signal (e.g., output signal 168) to a controller 164 (e.g., a data logging component 170 of the controller 164). For example, in some embodiments, the first signal sensing circuit 302 may include a first input terminal 331 electrically coupled to a first input sensing unit 132 (see Figure 6) and configured to receive input signals from the sensing unit; the second signal sensing circuit 304 may include a second input terminal 333 electrically coupled to a second input sensing unit 134 (see Figure 6) and configured to receive input signals from the sensing unit; the third signal sensing circuit 306 may include a third input terminal 334 electrically coupled to a third input sensing unit 136 (see Figure 6) and configured to receive input signals from the sensing unit; and the fourth signal sensing circuit 308 may include a fourth input terminal 335 electrically coupled to an input sensing unit 336 (see Figure 5) configured to measure the frequency, voltage, and / or current of electrical energy transmitted through the DC link 112 and configured to receive a fourth input signal from the input sensing unit. Each of the signal sensing circuits 300 can filter its respective input signal according to the techniques described above and provide the filtered output signal to the data logging component 170 via the output terminal 332.

[0068] As described above, embodiments of the present disclosure can provide one or more useful technical effects for enabling a single adaptive logic board to be implemented in multiple different sizes of VSDs to monitor the operating parameters of VSDs of various sizes. The adaptive logic board disclosed herein includes an adjustable sensing circuit configured to facilitate monitoring of VSD operating parameters at different sampling frequencies, which can be selected based on the size of the VSD. Thus, the adaptive logic board can be implemented in various different sizes of VSDs to effectively monitor the operation of the VSDs. The technical effects and technical problems described herein are examples and not limiting. It should be noted that embodiments described herein may have other technical effects and may solve other technical problems.

[0069] Please understand that this application is not limited to the details or methodologies set forth below or illustrated in the drawings. Furthermore, please understand that the expressions and terms used herein are for illustrative purposes only and should not be considered limiting.

[0070] While the exemplary embodiments illustrated in the drawings and described herein are currently preferred, it should be understood that these embodiments are provided only as examples. Therefore, this application is not limited to any particular embodiment, but extends to various modifications within the scope of the appended claims. Any order or sequence of process or method steps may be changed or rearranged according to alternative embodiments.

[0071] It is important to note that the configurations and arrangements of the VSD and / or logic boards as shown in various exemplary embodiments are illustrative only. Although only a few embodiments are described in detail in this disclosure, anyone considering this disclosure will readily understand that many modifications (e.g., changes in the size, dimensions, structure, shape and proportion of various elements, parameter values, mounting arrangements, material use, color, orientation, etc.) are possible without substantially departing from the novel teachings and merits of the subject matter described in the claims. For example, elements shown as integrally formed may consist of multiple parts or elements, the positions of elements may be reversed or otherwise altered, and the nature or number of separate elements or positions may be changed or altered. Therefore, all such modifications are intended to be included within the scope of this application. Any order or sequence of process or method steps may be changed or rearranged according to alternative embodiments. In the claims, any means-plus-function clause is intended to encompass not only the structures and structural equivalents but also the equivalent structures described herein as performing the enumerated functions. Without departing from the scope of this application, other substitutions, modifications, changes, and omissions may be made to the design, operating conditions, and arrangement of exemplary embodiments.

Claims

1. An adaptive logic board for a variable speed drive unit (VSD) of a heating, ventilation, air conditioning, and refrigeration (HVAC&R) system, A signal sensing circuit configured to receive an input signal from the VSD sensor, wherein the signal sensing circuit is A filter configured to condition the aforementioned input signal, A signal sensing circuit including a variable resistor element of the filter, wherein the variable resistor element is configured to adjust the cutoff frequency of the filter, and the filter is configured to attenuate the waveform of the input signal having a frequency exceeding the cutoff frequency to generate a conditioned signal. A controller configured to receive the conditioned signal, wherein the controller is configured to adjust the cutoff frequency of the filter by adjusting the variable resistor element based on the parameters of the HVAC&R system, An adaptive logic board wherein the parameters include a model of the VSD, the controller is configured to adjust the variable resistor element to adjust the cutoff frequency of the filter to a first target cutoff frequency in response to determining that the VSD is a first model, the controller is configured to adjust the variable resistor element to adjust the cutoff frequency of the filter to a second target cutoff frequency in response to determining that the VSD is a second model, and the first target cutoff frequency is different from the second target cutoff frequency.

2. The adaptive logic board according to claim 1, comprising a dual in-line package (DIP) switch communicatively coupled to the controller, wherein the controller is configured to determine the model of the VSD based on the configuration of one or more switches of the DIP switch.

3. The adaptive logic board according to claim 1, comprising an external computing device communicably coupled to the controller, wherein the controller is configured to receive operator input from the external computing device indicating the model of the VSD.

4. The adaptive logic board according to claim 1, wherein the first target cutoff frequency is less than the second target cutoff frequency, and the first model of the VSD has a higher rated power output than the second model of the VSD.

5. The adaptive logic board according to claim 1, wherein the controller includes a data logging component configured to receive the conditioned signal, sample the conditioned signal at a sampling frequency, and generate a digital output corresponding to the input signal.

6. The adaptive logic board according to claim 5, wherein the parameter includes the sampling frequency of the data logging component.

7. The adaptive logic board according to claim 6, wherein the controller is configured to determine the model of the VSD or receive feedback indicating the model of the VSD, adjust the sampling frequency of the data logging component based on the model of the VSD, and adjust the cutoff frequency by adjusting the variable resistor element based on the sampling frequency such that the cutoff frequency is a predetermined percentage of the sampling frequency.

8. The adaptive logic board according to claim 1, wherein the variable resistor element is a digital potentiometer.

9. A method for operating a variable speed drive (VSD) using an adaptive logic board, The controller of the adaptive logic board determines the size of the VSD, wherein the size of the VSD is at least partially based on the power output range of the VSD. The controller determines the target cutoff frequency of the filter of the signal sensing circuit of the adaptive logic board based on the size of the VSD, The controller adjusts the variable resistor element of the signal sensing circuit to achieve the target cutoff frequency of the filter, A method comprising the filter filtering an input signal received from the sensor of the VSD through the filter to attenuate the electrical waveform of the input signal having a frequency above the target cutoff frequency, thereby generating a conditioned signal corresponding to the input signal.

10. Determining the size of the VSD is The configuration of the dual inline package (DIP) switch of the adaptive logic board is determined via the controller of the adaptive logic board, The method according to claim 9, wherein the controller determines the size of the VSD based on the configuration of the DIP switch.

11. The method according to claim 9, wherein determining the size of the VSD includes receiving operator input indicating the size of the VSD via an external computing device communicably coupled to the adaptive logic board.

12. Determining the size of the VSD is The structure of the harness that connects the adaptive logic board and the VSD in a communicative manner via the controller of the adaptive logic board is determined. The method according to claim 9, comprising determining the size of the VSD based on the structure of the harness via the controller.

13. Determining the target cutoff frequency of the filter is The controller of the adaptive logic board references a reference table that correlates multiple target cutoff frequencies of the filter with the corresponding sizes of the VSD, The method according to claim 9, wherein the controller identifies the target cutoff frequency from a plurality of target cutoff frequencies corresponding to the size of the VSD.

14. The method according to claim 9, comprising sampling the conditioned signal at a sampling frequency greater than the target cutoff frequency via the data logging component of the adaptive logic board to generate a digital output corresponding to the input signal.

15. The method according to claim 9, wherein adjusting the variable resistor element includes adjusting the resistance value of the variable resistor element to increase or decrease the existing cutoff frequency of the filter and achieve the target cutoff frequency.

16. A heating, ventilation, air conditioning, and refrigeration (HVAC&R) system, A variable speed drive unit (VSD) is coupled to the motor of the compressor and configured to control the operating speed of the motor, A sensor configured to generate an input signal indicating the operating parameters of the VSD, An adaptive logic board is communicatively coupled to the sensor and the VSD, wherein the adaptive logic board is A signal sensing circuit including a filter configured to receive the input signal from the sensor and to condition the input signal, wherein the filter includes a variable resistor element adjustable to change the cutoff frequency of the filter, and the filter is configured to attenuate the electrical waveform of the input signal having a frequency exceeding the cutoff frequency, A heating, ventilation, air conditioning, and refrigeration (HVAC&R) system comprising: a controller configured to adjust the variable resistor element to change the cutoff frequency of the filter based on the parameters of the HVAC&R system, wherein the parameters include a model of the VSD; and an adaptive logic board.

17. The aforementioned controller Configuration of the dual inline pack (DIP) switch coupled to the adaptive logic board, Operator input received via an external computing device communicatively coupled to the controller, or The HVAC&R system according to claim 16, configured to determine the model of the VSD based on the structure of a harness that connects the adaptive logic board to the VSD.

18. The HVAC&R system according to claim 16, wherein the controller includes a data logging component configured to sample the conditioned signal at a target sampling frequency and generate a digital output corresponding to the input signal, the parameter includes the target sampling frequency, and the controller is configured to adjust the variable resistor element to change the cutoff frequency to achieve a target cutoff frequency determined based on the target sampling frequency.

19. The HVAC&R system according to claim 16, wherein the VSD is configured to supply power to a certain phase of the motor through a power line, and the operating parameters include the phase of the power.

20. The HVAC&R system according to claim 16, wherein the model of the VSD indicates the magnitude of power configured to be received by the VSD, the magnitude of power configured to be output by the VSD, the frequency of power configured to be received by the VSD, the frequency configured to be output by the VSD, the internal structure of the VSD, the components of the VSD, or the layout of the VSD.

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