Semiconductor device and voltage application method

Abstract

For example, a semiconductor device 400 comprises: an internal power supply 410 for generating VREG from VIN; a circuit block 420 operating with VREG; a circuit block 430 operating with a node voltage Vn appearing at an internal node n1; and a switching unit 440 for switching the destinations to which the internal node n1 is to connect to. The switching unit 440 includes a switch SW1 connected between a VREG-applied end and the internal node n1, and a switch SW2 connected between an external terminal PAD and the internal node n1. The circuit block 430 includes a switch control unit 432 configured to control the switches SW1 and SW2. The switch control unit 432, when switching between a first state (SW1-on, SW2-off) and a second state (SW1-off, SW2-on), controls the switching unit 440 to go through a third state (SW1-on, SW2-off).

Claims

1. An internal power supply configured to generate an internal power supply voltage from an input voltage, A first circuit block configured to operate by the aforementioned internal power supply voltage, A second circuit block configured to operate based on node voltages appearing at internal nodes, A switching unit configured to switch the connection destination of the internal node, It has, The switching unit includes a first switch connected between the application terminal of the internal power supply voltage and the internal node, and a second switch connected between the external terminal and the internal node. The second circuit block includes a switch control unit configured to control the first switch and the second switch, respectively. The switch control unit controls the switching unit so that when switching the operating state of the switching unit between a first state in which the first switch is ON and the second switch is OFF, and a second state in which the first switch is OFF and the second switch is ON, the switching unit passes through a third state in which both the first switch and the second switch are ON.

2. The semiconductor device according to claim 1, wherein the internal power supply has only the capability to supply current to the application terminal of the internal power supply voltage.

3. The semiconductor device according to claim 1, wherein the second circuit block includes a load circuit that requires a different drive voltage depending on the operating mode.

4. The semiconductor device according to claim 3, wherein the load circuit is a memory that requires different drive voltages when data is being written and when data is not being written, and the switch control unit sets the switching unit to the first state when data is not being written and sets the switching unit to the second state when data is being written.

5. The semiconductor device according to claim 1, wherein the second circuit block is a digital circuit block subject to a static power supply current measurement test, and the switch control unit sets the switching unit to the first state when the static power supply current measurement test is not performed, and sets the switching unit to the second state when the static power supply current measurement test is performed.

6. The semiconductor device according to claim 5, wherein the second switch is an N-channel MOSFET.

7. The semiconductor device according to claim 1, further comprising a resistor that limits the current flowing from the external terminal to the third circuit block.

8. The semiconductor device according to claim 7, further comprising a clamper downstream of the resistor that limits the voltage applied from the external terminal to the third circuit block.

9. The semiconductor device according to claim 1, wherein operation is switched in accordance with an enable signal input to the external terminal when the switching unit is in the first state.

10. A voltage application method for applying an external power supply voltage to an external terminal provided in a semiconductor device according to any one of claims 1 to 9, comprising the steps of: setting the external power supply voltage to a first voltage equal to or greater than a target value of the internal power supply voltage before switching from a first state to a third state; raising the external power supply voltage from the first voltage to a second voltage after switching from a third state to a second state; lowering the external power supply voltage from the second voltage to a first voltage before switching from a second state to a third state; and stopping the application of the external power supply voltage after switching from a third state to a first state.

Images