Hybrid energy device, system and method

Abstract

To integrate hybrid-energy sources such as solar cells and solar batteries for providing electrical energy for various applications.SOLUTION: A solar-cell layer has a plurality of solar cells for receiving light through a substrate and converting energy of the received light to first electrical energy. An energy-storage layer has one or more energy-storage units for storing second electrical energy. A converter layer has one or more power converters electrically connected to the solar-cell layer and the energy-storage layer, for receiving the first electrical energy and the second electrical energy therefrom and outputting third electrical energy via output thereof.SELECTED DRAWING: Figure 23

Description

[Technical Field]

[0001] Cross-reference of related applications This application claims the interests of U.S. Provisional Patent Application No. 62 / 862,898, filed on 18 June 2019, the entirety of which is incorporated herein by reference.

[0002] This disclosure relates to energy devices, systems, and methods thereof, in particular to devices and systems that integrate hybrid energy sources such as solar cells and solar batteries for providing electrical energy for various applications. [Background technology]

[0003] Solar energy is used as a clean and practical energy source for a variety of applications. For example, solar panels can be deployed in sunny locations such as roofs to collect solar energy and convert the collected energy into electricity to power various electrical devices. Solar panels of various shapes, styles, and sizes are widely used as energy source components for a variety of devices such as solar tiles, telephone chargers, home appliances, and industrial equipment.

[0004] For example, Figures 1-3 show several prior art solar energy collection systems, collectively indicated using reference numeral 10. In the solar energy collection system 10 shown in Figure 1, solar panels 12, more specifically photovoltaic (PV) panels, are used to convert solar energy into electricity, which is then output to an electronic power converter 14. The electronic power converter 14 converts the received power into a form that can be used to supply power to a load 16.

[0005] The electronic power converter 14 is also connected to the AC commercial power grid 20 via a switch 18. Therefore, when the switch 18 is closed, the electronic power converter 14 outputs power to the AC commercial power grid 20, supplying power to various devices (not shown) electrically connected to it, or it can use the AC commercial power grid 20 to supply power to the load 16 when the output of the electronic power converter 14 is insufficient.

[0006] Energy storage can be used to provide reliability to system 10. As shown in Figure 2, the prior art system 10 in this embodiment further includes energy storage 22, such as a battery assembly, which is connected to the load 16 and the AC commercial power grid 20 via another electronic power converter 24. Using the battery assembly 22, system 10 can compensate for the intermittent nature of the solar energy output from the PV panels 12, thereby improving the reliability of the system.

[0007] Figure 3 is similar to that shown in Figure 2, but shows a load 16 and a prior art solar energy collection system 10 connected to a direct current (DC) commercial power grid 26 instead of an AC commercial power grid 20.

[0008] Prior art solar energy collection systems have the following drawbacks and / or challenges: ● The unreliability of solar energy generation due to the intermittency of sunlight. ● As solar irradiance fluctuates throughout the day, the operating points of the solar energy collection system (e.g., voltage, current, and / or similar) fluctuate widely, which significantly reduces the overall efficiency of the system. ● The system typically requires a commercial power grid to provide resilience to the system, i.e., a commercial power grid to provide power to various loads when solar energy is insufficient or unavailable.

[0009] Due to these shortcomings and / or challenges, prior art solar energy harvesting systems may not provide optimal solutions for many new applications such as solar tiles and solar chargers. Therefore, prior art solar energy harvesting systems with suboptimal or unoptimized performance will otherwise negatively impact the rapid growth of solar energy systems. Thus, reliable solar energy harvesting solutions are desired.

[0010] Electronic devices typically use at least two electrodes, including a cathode and an anode, for electrical connection to other devices, application of voltage to a device, or collection of current from a device, depending on their application. Some small devices, such as photovoltaics and light-emitting diodes (LEDs), require a thin layer of metal as the cathode and a conductive, transparent metal oxide as the anode. In a typical fabrication process for such devices, a layer of indium tin oxide (ITO) is the first layer of a composition, typically deposited as the anode by magneton sputtering or other thermal methods. The top electrode can be transparent, depending on the application. Other layers of the composition are then deposited, coated, or otherwise bonded to the ITO layer, as needed, with the final layer being the cathode layer.

[0011] For example, Figures 4 and 5 are schematic diagrams showing the simplest single-layer structures of several prior art photovoltaic devices and organic LED (OLED) devices. As shown in Figure 4, a prior art photovoltaic device 40 may comprise an anode layer 44 deposited on a substrate 42, followed by an active layer 46 and a cathode layer 48. As shown in Figure 5, an OLED device 60 may comprise an anode layer 64 deposited on a substrate 62, followed by a hole injection / carrier layer 66, an active layer 68, an electron injection layer 70, and a metallic cathode layer 72.

[0012] In the prior art, various deposition methods such as thermal deposition, radio frequency (RF) sputtering, DC sputtering, and / or similar methods can be used to deposit a thin film of a metal, such as silver or aluminum, as a cathode layer on top of a preceding layer, such as an active layer, in the fabrication of these devices.

[0013] Figure 6 shows a prior art thermal evaporation device 80 widely used for the small-scale fabrication of electronic devices. As shown, the prior art thermal evaporation device 80 comprises a vacuum chamber 82 that receives a heater 84 at its bottom and a sample holder 86 at its top. The sample holder 86 comprises a window 88.

[0014] The substrate 90 is placed on the sample holder 86 and exposed to a window 88. Heaters 84 heat pure metal 92 on them to evaporate the metal 92 into a gas phase, which flows upward through the window 88 of the sample holder 86, as indicated by arrow 94, and deposits on the substrate 90 to form a metal cathode layer. The prior art thermal evaporation device 80 may also include a vacuum gauge 96 for monitoring the vacuum level in the vacuum chamber 82, and a gas inlet 98 for introducing ambient gases (not shown) such as O2, N2, etc., to facilitate surface reactions or maintain film stoichiometry.

[0015] Conventional deposition methods generally require high levels of vacuum, which can place a significant burden on the large-scale fabrication of electronic devices. Furthermore, the above-mentioned conventional deposition methods also have other drawbacks, such as: (1) Long operating time, (2) Damage to the previous layer due to the impact of metal particles during the deposition of the current layer, (3) The processing method is costly.

[0016] Due to the aforementioned drawbacks, conventional deposition methods may not provide an optimal solution for the large-scale fabrication of electronic devices. Therefore, improved processing technologies are desired to address this issue. [Overview of the project]

[0017] Embodiments of this disclosure relate to hybrid energy devices or modules that integrate solar cells, battery cells, and, in some embodiments, electronic circuits in an efficient and reliable manner, resulting in a highly efficient and reliable energy device or module.

[0018] According to one aspect of the present disclosure, a multilayer device is provided having a transparent or translucent substrate, a solar cell layer bonded to the substrate, an energy storage layer bonded to the solar cell layer, and a converter layer bonded to the energy storage layer. The solar cell layer has a plurality of solar cells for receiving light through the substrate and converting the energy of the received light into first electrical energy; the energy storage layer has one or more energy storage units for storing second electrical energy; and the converter layer has one or more power converters electrically connected to the solar cell layer and the energy storage layer, receiving first and second electrical energy from them and outputting third electrical energy through their outputs.

[0019] In some embodiments, the substrate may include a layer of glass.

[0020] In some embodiments, the substrate may include a flexible, transparent, or translucent material such as a transparent or translucent plastic material such as polyethylene terephthalate (PET, also denoted as poly(ethylene terephthalate)), poly(ethersulfone) (PES), polyethylene naphthalene (PEN), polyimide (PI), and / or similar.

[0021] In some embodiments, the solar cell layer may be an inverted organic photovoltaic (OPV) structure, which comprises, in order from the substrate, a sublayer of indium tin oxide (ITO) deposited on the substrate or otherwise bonded to the substrate to function as an anode, a sublayer of zinc oxide (ZnO), a sublayer of ethoxylated poly(ethyleneimine) and poly(ethyleneimine) (i.e., PEIE), a sublayer of organic bulk heterojunction (BHJ) (i.e., a blend of p-type and n-type conjugated polymers), a sublayer of molybdenum trioxide (MoO3), and a sublayer of silver (Ag) or aluminum (Al) as a cathode.

[0022] In some embodiments, the energy storage layer comprises one or more semiconductor capacitors.

[0023] In some embodiments, each semiconductor capacitor comprises multiple gallium arsenide (GaAs) / aluminum gallium arsenide (AlGaAs) sublayers, such as n AlGaAs layers (n>0 is an integer) and (n+1) GaAs layers, where each AlGaAs layer is sandwiched between two adjacent GaAs layers.

[0024] In some embodiments, the converter layer comprises a multi-input electronic power converter having a solar input converter, a battery input converter, and an output converter.

[0025] In some embodiments, one of the solar input converter, battery input converter, and output converter may include a coil wound around a ferromagnetic core or a ferrimagnetic core.

[0026] In some embodiments, any of the solar input converter, battery input converter, and output converter may have a structure of at least three layers, including a core layer made of ferrite material and sandwiched between two wiring layers. Each wiring layer has conductive wiring on a base, and the wiring of two wiring layers is interconnected through vias or holes thereon to form a coil wound around the ferrite core.

[0027] According to one aspect of the present disclosure, a hybrid power system is provided, the hybrid power system comprising: a solar cell module having a plurality of solar cells; a solar cell module electrically coupled to a first circuit having one or more first semiconductors for converting the output of the solar cell module into a first alternating current (AC) current; an energy storage module coupled to a second circuit having one or more second semiconductors for converting the output of the energy storage module into a second AC current; an output module coupled to a third circuit having one or more third semiconductors for outputting power; a transformer coupling the first and second circuits to the third circuit; and a control module for optimizing output power by adjusting signals applied to the gate terminals of the first semiconductor, the second semiconductor, and the third semiconductor based on at least the output voltage of the solar module, the output voltage of the energy storage module, the current of the first circuit, the output current of the second circuit, the input current of the third circuit, and the output voltage of the output power.

[0028] According to one aspect of the present disclosure, a power circuit is provided, the power circuit comprising: a first input circuit for coupling to a photovoltaic (PV) source; a second input circuit for coupling to an energy storage source; a third circuit coupled to the first and second input circuits for processing and outputting electrical energy received from at least one of the first and second circuits; and a control circuit coupled to the first, second and third circuits for optimizing the output of the third circuit by controlling the flow of power between the circuits based on the output voltages of the PV source and the energy storage source, the outputs of the first and second input circuits coupled to the third circuit, and the output voltage of the third circuit.

[0029] In some embodiments, the third circuit is coupled to the first and second input circuits via a transformer, with the first and second input circuits located on the input side of the transformer and the third circuit located on the output side of the transformer.

[0030] In some embodiments, each of the first circuit, the second circuit, and the third circuit comprises one or more semiconductors for power conversion.

[0031] In some embodiments, the control circuit is configured to optimize the output of the third circuit by adjusting gate signals applied to the gate terminals of the semiconductors of the first, second, and third circuits based on the output voltages of the PV source and energy storage source, the outputs of the first and second input circuits coupled to the third circuit, and the output voltage of the third circuit.

[0032] In some embodiments, the outputs of the first and second input circuits are the output currents of the first and second input circuits, and the power supply circuit further comprises one or more current sensors for sensing the output currents of the first and second input circuits.

[0033] In some embodiments, the control circuit is configured to optimize the output of the third circuit based on at least one of the output currents of the PV source and the energy storage source, as well as the input current of the third circuit.

[0034] In some embodiments, the output of the third circuit is a direct current (DC) output, and the power supply circuit further comprises a DC-AC inverter circuit coupled to the third circuit to convert the DC output of the third circuit to an alternating current (AC) output, and the control circuit is configured to optimize the output of the DC-AC inverter circuit based on the output voltages of the PV source and energy storage source, the output currents of the first and second input circuits coupled to the third circuit, the output voltage of the third circuit, the output voltage of the DC-AC inverter circuit, and the output current of the DC-AC inverter circuit.

[0035] In some embodiments, the outputs of the first and second input circuits are the output voltages of the first and second input circuits, and the power circuit further comprises one or more current estimators for estimating the output currents of the first and second input circuits based on the output voltages of a PV source, an energy storage source, and a third circuit, as well as the gate signals of the semiconductors of the first, second, and third circuits.

[0036] In some embodiments, one or more semiconductors in at least one of the first, second, and third circuits are gallium nitride (GaN) gates, the power supply circuit further comprises a GaN gate driver circuit to prevent the GaN gate from shooting through, and the GaN gate driver circuit comprises a level shifter circuit.

[0037] In some embodiments, the level shifter circuit comprises a Zener diode and a capacitor coupled in parallel and in series with a resistor.

[0038] In some embodiments, the third circuit includes a parallel inductor on the output side of the transformer to compensate for parasitic capacitance.

[0039] According to one aspect of the present disclosure, an energy device is provided, the energy device comprising a transparent or translucent substrate, a solar cell layer bonded to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting the energy of the received light into first electrical energy, an energy storage layer bonded to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing second electrical energy, and a converter layer bonded to the solar cell layer and the energy storage layer for receiving and processing electrical energy from them and outputting the processed energy via an output, the converter layer comprising the power circuit described above, using the solar cell layer and the energy storage layer as a PV source and an energy storage source, respectively.

[0040] According to one aspect of the present disclosure, a thermoelectric recycling structure is provided, comprising a first component for engaging with a heat source and receiving heat generated from the heat source, a second component spaced apart from the first component, and a thermally nonconductive electron-hole carrier thermoelectric layer sandwiched between the first and second components for receiving heat from the first component and converting the received heat into electricity.

[0041] In some embodiments, the thermoelectric recycling structure further comprises a light-collecting layer coupled to a first component on the opposite side of the thermoelectric layer for engaging the first component with a heat source, the light-collecting layer comprising a metasurface for collecting light, and a nanowire layer coupled to the metasurface for converting the collected light into converted heat and transferring the converted heat to the thermoelectric layer.

[0042] In some embodiments, the thermoelectric layer includes one or more thermoelectric components made of one or more two-dimensional (2D) materials.

[0043] In some embodiments, one or more 2D materials include 2D perovskite.

[0044] In some embodiments, one or more thermoelectric components comprise a continuous thermoelectric sheet made of one or more 2D materials.

[0045] In some embodiments, the thermoelectric layer comprises a plurality of thermoelectric components that are separated from each other.

[0046] In some embodiments, the thermoelectric layer comprises a plurality of conductive nanochannels having one or more subwavelength dimensions.

[0047] In some embodiments, the thermoelectric layer has a thickness of about 10 nanometers (nm).

[0048] According to one aspect of the present disclosure, an energy device is provided, the energy device comprising a transparent or translucent substrate, a solar cell layer bonded to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting the energy of the received light into first electrical energy, an energy storage layer bonded to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing second electrical energy, a converter layer bonded to the solar cell layer and the energy storage layer for receiving and processing electrical energy from them and outputting the processed energy via an output, and at least one of the solar cell layer and the converter layer for receiving heat generated therefrom, comprising at least one of the thermoelectric recycling structures according to claims 13 to 20.

[0049] According to one aspect of the present disclosure, a supercapacitor is provided, the supercapacitor comprising one or more capacitor layers, and a first electrical terminal and a second electrical terminal, each capacitor layer comprising a pair of conductive thin film sublayers flanking an electrically insulating membrane sublayer, a conductive medium between each thin film sublayer and the membrane sublayer, and a first conductor sublayer and a second conductor sublayer flanking the pair of thin film sublayers and the membrane sublayer, wherein the first conductor sublayer is coupled to the first electrical terminal and the second conductor sublayer is coupled to the second electrical terminal.

[0050] In some embodiments, the thin film sublayer comprises at least one of activated carbon, graphene, and graphite.

[0051] In some embodiments, the conductive medium includes at least one of an ionic liquid, a conductive ink, and a current collector.

[0052] In some embodiments, the conductive medium is coated onto the membrane sublayer.

[0053] In some embodiments, the ionic liquid includes 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIMBF4).

[0054] In some embodiments, the conductive thin film sublayer, the membrane sublayer, and the first and second conductive sublayers are flexible.

[0055] In some embodiments, a conductive thin film sublayer, as well as the first and second conductive sublayers, are coated onto the membrane sublayer using at least one of slot die coating, spray coating printing, and doctor blade.

[0056] According to one aspect of the present disclosure, an energy device is provided, the energy device comprising a transparent or translucent substrate, a solar cell layer bonded to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting the energy of the received light into first electrical energy, an energy storage layer bonded to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing second electrical energy, and a converter layer bonded to the solar cell layer and the energy storage layer for receiving and processing electrical energy from them and outputting the processed energy via an output, the energy storage layer comprising one or more of the above supercapacitors. [Brief explanation of the drawing]

[0057] Herein, embodiments of the present disclosure are described with reference to the following drawings, in which the same reference numerals in different drawings indicate the same element.

[0058] [Figure 1] This is a schematic diagram showing a prior art solar energy harvesting system connected to a load and / or alternating current (AC) commercial power grid, the solar energy harvesting system having solar panels for harvesting solar energy. [Figure 2] This is a schematic diagram showing a prior art solar energy collection system connected to a load and / or to an AC commercial power grid, the solar energy collection system having solar panels and energy storage. [Figure 3] This is a schematic diagram showing a prior art solar energy collection system connected to a load and / or a direct current (DC) commercial power grid, the solar energy collection system having solar panels and energy storage. [Figure 4] This is a schematic diagram showing a prior art photovoltaic device having a metal cathode layer. [Figure 5]This is a schematic diagram showing a prior art solar cell or light-emitting device (LED) having a metal cathode layer. [Figure 6] This is a schematic diagram showing a prior art thermal evaporation device for the small-scale fabrication of electronic devices. [Figure 7] The present disclosure illustrates several embodiments of a solar energy collection system having a hybrid energy device and connected to a load and / or AC commercial power grid. [Figure 8] The present disclosure illustrates several embodiments of a solar energy collection system having a hybrid energy device and connected to a load and / or a DC commercial power grid. [Figure 9A] Figures 7 and 8 are schematic diagrams showing the physical structure of a hybrid energy device for a solar energy collection system according to some embodiments of the present disclosure, the hybrid energy device comprising a layer of battery cells as energy storage. [Figure 9B] Figures 7 and 8 are schematic diagrams showing the physical structure of a hybrid energy device for a solar energy collection system according to some embodiments of the present disclosure, the hybrid energy device comprising a layer of supercapacitors as energy storage. [Figure 10] These are schematic diagrams showing the physical structure of the hybrid energy device of the solar energy collection system shown in Figures 7 and 8, according to some embodiments of the present disclosure. [Figure 11A] Figures 9A and 9B are schematic diagrams showing the solar cell layer and substrate of a hybrid energy device according to some embodiments of the present disclosure, the substrate being made of glass. [Figure 11B] Figures 9A and 9B are schematic diagrams showing the solar cell layer and substrate of a hybrid energy device according to some embodiments of the present disclosure, the substrate being made of transparent or translucent plastic. [Figure 12]Figure 11B is a schematic diagram showing multiple sublayers of the solar cell layer, which are printed on a large scale on the substrate and form multiple solar cells. [Figure 13] Figures 9A and 9B are conceptual diagrams showing the printing of the solar cell layer and energy storage layer of the hybrid energy device onto a substrate. [Figure 14-17] This disclosure illustrates solar cell layers according to various embodiments. [Figure 18] Figure 9B shows the structure of the supercapacitor. [Figure 19A] Figure 9A is a schematic diagram showing the structure of the battery cell in the energy storage layer of the hybrid energy device. [Figure 19B] Figure 9A is a schematic diagram showing the structure of a lithium-ion battery cell. [Figure 19C] Figure 9A is a schematic diagram showing the structure of a battery cell, which is a form of lithium-ion battery cell according to some embodiments of the present disclosure. [Figure 20] This is a schematic diagram showing two battery cells printed in series on top of each other and sharing a common current collector sublayer between them. [Figure 21] This demonstrates a stencil printing technique for creating battery cells by using a cold manual laminator as a stencil printer device. [Figure 22] Figure 21 shows a process for fabricating an anode sublayer on a current collector sublayer using the stencil printing technique shown, without the use of any processing solvents. [Figure 23] Figures 9A and 9B are schematic diagrams showing details of the hybrid energy device. [Figures 24A-24B] This is a block diagram of a solar energy collection system with integrated electronic power converters for AC and DC applications. [Figure 25A]Figures 24A and 24B are schematic diagrams showing the functional structure of an integrated electronic power converter, which comprises a solar input converter, a battery input converter, and an output converter. [Figure 25B] Figure 25A is a schematic diagram showing the functional structure of the solar input converter, battery input converter, and output converter. [Figure 25C] Figures 24A and 24B are circuit diagrams of the integrated electronic power converter. [Figure 26A] These are schematic diagrams showing the physical implementation of an integrated electronic power converter, as shown in Figures 24A and 24B, according to some embodiments of the present disclosure. [Figure 26B] Figure 26A is a cross-sectional view of the integrated electronic power converter along the cross-sectional line AA. [Figure 26C] Figure 26A is a schematic perspective view of a portion of an integrated electronic power converter according to some embodiments of the present disclosure. [Figure 27] Figures 7 and 8 show schematic diagrams illustrating DC hybrid energy devices in a solar energy collection system according to some embodiments of the present disclosure, the DC hybrid energy device having an integrated DC power converter for supplying power to the DC energy device. [Figure 28] Figure 27 shows the waveforms of several signals in the solar cell module of the DC hybrid energy device shown. [Figure 29] Figure 27 is a block diagram of a current shaping control module for a DC hybrid energy device, according to some embodiments of the present disclosure. [Figure 30] Figure 27 shows the waveform of the current shaping control module of the DC hybrid energy device. [Figure 31]The block diagram shows that pulses are generated in the transformer secondary power semiconductor of the DC hybrid energy device shown in Figure 27 by using a zero-voltage switching (ZVS) control circuit and ensuring that the currents have the correct polarity at the switching point. [Figure 32] Figure 27 is a block diagram showing multiple DC hybrid energy devices connected in parallel to supply power to a DC load and / or DC power grid, according to some embodiments of the present disclosure. [Figure 33] Figure 27 is a block diagram showing multiple DC hybrid energy devices connected in series to supply power to a DC load and / or DC power grid, according to some embodiments of the present disclosure. [Figure 34] This block diagram shows multiple DC hybrid energy devices, as shown in Figure 27, connected in parallel to supply power to AC loads and / or AC power grids via DC / AC inverters, according to some embodiments of the present disclosure. [Figure 35] This block diagram shows multiple DC hybrid energy devices, as shown in Figure 27, connected in series to supply power to AC loads and / or AC power grids via a DC / AC inverter, according to some embodiments of the present disclosure. [Figure 36] Figures 7 and 8 show circuit diagrams illustrating AC hybrid energy devices in a solar energy collection system according to some embodiments of the present disclosure, the AC hybrid energy device having an integrated AC power converter for supplying power to the AC energy device. [Figure 37] This block diagram shows multiple AC hybrid energy devices, as shown in Figure 36, connected in parallel to supply power to an AC load and / or an AC power grid, according to some embodiments of the present disclosure. [Figure 38] This is a schematic diagram showing a mobile phone case in which a hybrid energy device is integrated into its rear wall, according to some embodiments of the present disclosure. [Figure 39] Figure 38 is a schematic diagram showing the structure of the hybrid energy device. [Figure 40] This is a schematic diagram showing a mobile phone in which a hybrid energy device is integrated into its screen, according to some embodiments of the present disclosure. [Figure 41] Figure 40 is a schematic diagram showing the structure of the hybrid energy device. [Figure 42] Figure 27 is a block diagram of a current shaping control module for a DC hybrid energy device shown in some embodiments of the present disclosure, which uses an HF current estimator 602 to estimate a digital high-frequency (HF) current waveform. [Figure 43] This is a circuit diagram showing a GaN gate driver circuit that has an overcharging problem. [Figure 44] This is a circuit diagram showing a GaN gate driver circuit according to some embodiments of the present disclosure. [Figure 45] This is a circuit diagram showing a level-shifting circuit to avoid the shoot-through problem. [Figure 46] This is a circuit diagram showing a power converter with parasitic capacitance. [Figure 47] This is a circuit diagram showing a DC power converter with soft switching and parasitic capacitance compensation according to some embodiments of the present disclosure. [Figure 48] This is a schematic diagram showing a thermoelectric unit coupled to a heat source. [Figure 49A] Figure 48 is a schematic diagram showing the details of the thermoelectric unit. [Figure 49B] This is a schematic diagram showing a magnified portion of the thermoelectric unit shown in Figure 48. [Figure 50] Figure 48 is a schematic perspective view of an exemplary implementation of a photovoltaic (PV) panel integrated with a thermoelectric unit. [Figure 51A] This is a schematic diagram showing a photovoltaic-thermoelectric unit according to some embodiments of the present disclosure. [Figure 51B]This is a schematic diagram showing a magnified portion of the photovoltaic-thermoelectric unit shown in Figure 51A. [Figure 51C] This is a schematic perspective view of a portion of the metasurface. [Figure 51D] This is a schematic perspective view of a portion of a metasurface according to some embodiments of the present disclosure. [Figure 52] This is a schematic diagram showing a thermoelectric unit according to some embodiments of the present disclosure, the thermoelectric unit comprising multiple nanochannels in parallel. [Figure 53] This is a schematic diagram showing a thermoelectric unit according to some embodiments of the present disclosure, the thermoelectric unit comprising a mixture of multiple nanochannels in parallel and series. [Figure 54A] This is a schematic diagram showing the structure of a supercapacitor according to some embodiments of the present disclosure. [Figure 54B] Figure 54A is a schematic diagram showing the capacitor layer of the supercapacitor. [Figure 55] This is a schematic diagram showing the structure of a symmetrical supercapacitor or symmetrical supercapacitor cell according to some embodiments of the present disclosure. [Figure 56] Figure 55 is a schematic diagram illustrating a large-scale fabrication process for a supercapacitor or supercapacitor cell, as shown, using spray coating technology, according to some embodiments of the present disclosure. [Figure 57] Figure 45 is a schematic perspective view showing a supercapacitor formed by stacking multiple supercapacitor cells shown in Figure 45 with a suitable insulator. [Modes for carrying out the invention]

[0059] Overview of Solar Energy Collection Systems Referring now to Figure 7, a solar energy collection system according to several embodiments of the present disclosure is shown, collectively identified using reference numeral 100. As shown, the solar energy collection system 100 comprises a hybrid energy device 102 for supplying power to a load 104.

[0060] The hybrid energy device 102 is also connected to the AC commercial power grid 106 via a switch 108. Therefore, when the switch 108 is closed, the hybrid energy device 102 may output power to the AC commercial power grid 106 to supply power to various devices (not shown) electrically connected to it, or to supply power to the load 104 using the AC commercial power grid 106 when the output of the hybrid energy device 102 is insufficient.

[0061] In these embodiments, the hybrid energy device 102 comprises a solar panel 112, such as a photovoltaic (PV) panel having multiple solar cells to collect solar energy and function as a first energy source, and an energy storage 114 as a second energy source. The solar panel 112 and the energy storage 114 output power to a multi-input electronic power converter 116. The multi-input electronic power converter 116 converts the received power into a form suitable for supplying power to a load 104 and / or outputting to the AC commercial power grid 106 (e.g., having a suitable voltage, current, frequency, and / or similar), and uses the output of the solar panel 112 to charge the energy storage 114. Furthermore, the multi-input electronic power converter 116 controls the flow of power between different components.

[0062] Figure 8 shows solar energy collection systems 100 according to several embodiments of the present disclosure. These embodiments of solar energy collection systems 100 are similar to those shown in Figure 7, except that the hybrid energy device 102 is connected to a direct current (DC) commercial power grid 118. A multi-input electronic power converter 116 also controls the flow of power between different components.

[0063] In the embodiments shown in Figures 7 and 8, the hybrid energy device 102, which includes a solar cell 112, an energy storage device 114, and a multi-input electronic power converter 116, is an integrated device that is printed, deposited, or otherwise coupled to a substrate, and may have different mountings in different embodiments.

[0064] Figures 9A and 9B are schematic diagrams showing the physical structure of a hybrid energy device 102 having various energy storage 114 in different embodiments.

[0065] In the embodiment shown in Figure 9A, the hybrid energy device 102 comprises a substrate 132 made of one or more suitable transparent or translucent materials, such as glass, transparent or translucent plastic, transparent or translucent polymer, and / or the like. The solar cell layer 134 is bonded to the substrate 132 by printing, deposition, or other means. Thus, the transparent substrate 132 allows the solar cells 112 to be exposed to ambient or incident light and provides support and protection to the solar cell layer 112 and other layers on them.

[0066] In these embodiments, the energy storage 114 comprises a layer 136 of battery cells printed, deposited, or otherwise coupled to a layer 112 of solar cells. A layer 116 of the multi-input electronic power converter circuitry is coupled to the layer 136 of battery cells. The solar cell layer 112, the battery cell layer 136, and the multi-input electronic power converter layer 116 are electrically connected according to Figure 7 or Figure 8 (not shown).

[0067] The hybrid energy device 102 in the embodiment shown in Figure 9B is similar to that shown in Figure 9A, except that in these embodiments the energy storage 114 comprises one or more capacitors 138 or supercapacitors (i.e., capacitors with large capacitance).

[0068] In the embodiments shown in Figures 9A and 9B, the solar cell 112 is coated on the substrate 132, followed by an energy storage layer 114 (which is a battery cell 136 or supercapacitor 138) and a converter layer 116. In some embodiments shown in Figure 10, the order of the layers may be substrate 132, converter 116, energy storage layer 114 (which is a battery cell 136 in the embodiments shown in Figure 10), and solar cell layer 112.

[0069] In these embodiments, the substrate 132 may include a flexible material such as PET. A layer of UV-curable epoxy may be applied on top of the substrate 132 for protection.

[0070] Figure 11A is a schematic diagram showing a solar cell layer 112 on a glass substrate 132. As shown, the solar cell layer 112 comprises, in order from the substrate 132, several sublayers, including an anode sublayer 142 made of a suitable material such as indium tin oxide (ITO) deposited or otherwise bonded onto the substrate 132, a zinc oxide (ZnO) sublayer 144, a poly(ethyleneimine) and poly(ethyleneimine)ethoxylated (i.e., PEIE) sublayer 146, an organic solar cell sublayer 148 such as a bulk heterojunction (BHJ) polymer solar cell sublayer, a molybdenum trioxide (MoO3) sublayer 150, and a cathode sublayer 152 made of a suitable material such as silver (Ag) or aluminum (Al). The anode 142 and cathode 152 are electrically connected to higher layers such as the energy storage layer 114 (i.e., the battery cell layer 136 or supercapacitor layer 138) and / or the integrated converter layer 116.

[0071] Figure 11B is a schematic diagram showing a solar cell layer 112 on a substrate 132 made of a flexible, transparent or translucent material such as polyethylene terephthalate (PET, also denoted as poly(ethylene terephthalate)), poly(ethersulfone) (PES), polyethylene naphthalene (PEN), polyimide (PI), and / or similar. The solar cell layer 112 is the same as that shown in Figure 11A.

[0072] Glass substrates result in rigid solar cell structures, while plastic substrates result in flexible solar cell structures. Those skilled in the art will understand that plastic substrates offer numerous advantages, such as the following: 1) Ease of use in large-scale manufacturing techniques such as roll-to-roll coating technology for fabricating solar cells and stencil printing technology for fabricating batteries. 2) Flexible solar cells enable a simplified fabrication process for all of their layers.

[0073] In some embodiments, the solar cell layer 112, the energy storage layer 114 (i.e., the battery layer 136 or capacitor layer 138), and the integrated converter layer 116 can be printed on a large scale.

[0074] Figure 12 is a schematic diagram showing the above sublayers 142-152 of the solar cell layer 112, which is printed on a large scale on a substrate 132 to form multiple solar cells. First, the anode (ITO) sublayer 142 is printed on the PET substrate 132 as multiple ITO blocks in a matrix configuration. Next, multiple ZnO sublayers 144 are printed on top of the ITO sublayers, and each ZnO block 144 is coupled to multiple ITO blocks 142 in adjacent rows, thereby forming a parallel connection structure. Then, the PEIE sublayer 146, BHJ sublayer 148, and MoO3 sublayer 150 are sequentially printed on top of each other as multiple blocks. Each set of PEIE sublayers 146, BHJ sublayers 148, and MoO3 sublayers 150 forms a solar cell (without considering the anode and cathode sublayers) printed on the anode sublayer 142.

[0075] The cathode (Ag or Al) sublayer 152 is ultimately printed on the layer stack as multiple blocks, with each cathode block extending in series to the anode layer 142 of the adjacent solar cell.

[0076] In the embodiments described above, the solar cell layer 112 comprises a ZnO sublayer 144 and a PEIE sublayer 146. However, in some alternative embodiments, the solar cell layer 112 may comprise only one of the ZnO sublayer 144 and the PEIE sublayer 146. However, the performance of the solar cell layer 112 in these embodiments may be reduced.

[0077] Figure 13 is a conceptual diagram showing the printing of several sublayers of the solar cell layer 112 onto the substrate 132, including the ZnO sublayer 144, the PEIE sublayer 146, and the BHJ sublayer 148. In these embodiments, the MoO3 sublayer 150 and the Ag sublayer 152 are deposited by using a thermal evaporator.

[0078] As shown in Figure 13, the substrate 132 is positioned on the plane of the platform 172. A printing device (not shown) equipped with a slot die head 174 is used to print the sublayers / layers. The slot die head 174 is equipped with ink cartridges 176 filled with their respective "inks" and moves (indicated by arrows 178) over the substrate 132 (or printed layer) to deposit material from the ink cartridges 176 onto it to form solar cells 112 or energy storage cells (not shown). First, the solar cells 112 are printed on the substrate 132, and then the energy storage layer 114 (i.e., battery cells 136 or supercapacitors 138) is printed on the solar cell layer 112. Next, a multi-input electronic power converter 116 (in the form of a printed circuit board) is coupled to the energy storage layer 114.

[0079] In this specification, “ink” refers to a sublayer / layer material in a preferred form, such as a solution, gel, or powder, used as a precursor for the fabrication of the sublayer / layer. For example, an ink of ZnO dissolved in butanol may be deposited by slot die coating to form the ZnO sublayer 144 of the solar cell layer 112. During the slot die fabrication of each sublayer, heat treatment is typically used to evaporate the solvent and solidify the fabricated sublayer.

[0080] As shown in Figure 14, in some embodiments, the solar cell layer 112 may be a conventional OPV structure, which comprises several sublayers, starting from the substrate 132, such as an ITO anode sublayer 142, a poly(3,4-ethylenedioxythiophene) polystyrene sulfonic acid (PEDOT:PSS) sublayer 143, a BHJ sublayer as an active layer 148, and an Al or Ag sublayer 152 as a cathode. More organic or inorganic charge transport layers may be inserted into this configuration to achieve efficient exciton confinement, which results in improved performance.

[0081] In some embodiments shown in Figure 15, the solar cell layer 112 comprises, in order from the substrate 132, a fluorine-doped tin oxide (FTO) sublayer 159, an electron-carrying titanium dioxide (TiO2) sublayer 157 deposited directly on the FTO-coated substrate 132, a pure 2D, pure 3D, or mixed 2D-3D hybrid inorganic-organic perovskite sublayer 155, a sublayer 153 of 2,2',7,7'-tetrakis-(N,N-di-4-methoxyphenylamino)-9,9'-spirobifluorene (Spiro-OMeTAD) or other suitable hole-carrying material that can be deposited on top of the perovskite sublayer 155, and an Ag or Al deposit 152 forming a cathode sublayer.

[0082] Using FTO has the advantage of better energy level alignment between the work function of FTO159 and the conduction band of TiO2.

[0083] In some embodiments shown in Figure 16, the solar cell layer 112 may comprise, in order from the substrate 132, a number of sublayers such as an FTO sublayer 159, a TiO2 sublayer 157, an inorganic quantum dot (QD) layer 155, a thin MoO3 sublayer 161, followed by Al, Ag, or gold (Au) electrodes 152.

[0084] In these embodiments, both ITO and FTO can be used. Depending on the conduction band energy level of QD155, both metal oxides (i.e., ITO and FTO) can provide a low-energy barrier for efficient charge extraction from the solar cell. Then, either ZnO or TiO2 is deposited on the ITO-coated or FTO-coated substrate 132. Next, the active layer 155 is coated on the electron-carrying metal oxide. The fabrication process is then completed by depositing a thin MoO3 sublayer 161, followed by Al, Ag, or gold (Au) electrodes.

[0085] In some embodiments shown in Figure 17, the solar cell layer 112 may be in a tandem structure, the tandem structure comprising a perovskite sublayer 171 coupled in series to a QD solar cell layer 175, with an intermediate layer 173 sandwiched between them. The intermediate layer 173 may be any suitable organic or inorganic material. In such a configuration, one of the cells is first fabricated without depositing the upper metal electrodes. Then the other cell is fabricated directly on top, followed by the deposition of the upper electrodes. An efficient and stable tandem solar cell can be realized, provided by the effective photon collection capabilities of both the QD and perovskite materials, which can then be integrated with other components of the solar energy collection system 100.

[0086] In the embodiment shown in Figure 9B, the supercapacitor 138 is used as the energy storage layer 114. Figure 18 shows the structure of the supercapacitor 138. As shown, the energy storage layer 114 or supercapacitor layer 138 comprises multiple GaAs / AlGaAs sublayers, such as n aluminum gallium arsenide (AlGaAs) layers (n>0 is an integer) and (n+1) gallium arsenide (GaAs) layers, where each AlGaAs layer is sandwiched between two adjacent GaAs layers, thereby forming multiple semiconductor capacitors.

[0087] Each GaAs or AlGaAs sublayer may be deposited using a suitable technique such as DC sputtering, radio frequency (RF) sputtering, thermal deposition, and / or similar methods.

[0088] Figure 19A is a schematic diagram showing the structure of a battery cell 136 of the energy storage layer 114 in the embodiment shown in Figure 9A. As shown, the battery cell 136 comprises a plurality of sublayers, including a pair of current collector sublayers 202 and 210 coupled to an anode sublayer 204 and a cathode sublayer 208, respectively, and a separator sublayer 206 sandwiched between the anode sublayer 204 and the cathode sublayer 208.

[0089] Current flows through current collector sublayers 202 and 210, which are coupled to anode sublayer 204 and cathode sublayer 208. The anode sublayer 204 is a negative or reducing electrode that emits electrons to the external circuit and is oxidized during the electrochemical reaction. The cathode sublayer 208 is a positive or oxidizing electrode that acquires electrons from the external circuit and is reduced during the electrochemical reaction.

[0090] The separator sublayer 206 is a medium that prevents short-circuit current between the cathode 208 and anode 204 of the battery cell 136 and also provides an ion transport mechanism between them. In various embodiments, the separator sublayer 206 may include a solid electrolyte and / or other suitable materials. Compared to liquid electrolytes, which typically contain a solvent that dissolves salts, acids, or alkalis for ion conduction and are usually flammable, solid electrolytes are safer, and the resulting battery assembly may be more compact because the required safety monitoring and / or safety precautionary components and / or subsystems are reduced. Batteries using solid electrolytes also offer improvements in energy density and power density.

[0091] Figure 19B is a schematic diagram showing the structure of a battery cell 136 in the form of a lithium-ion battery cell. In this embodiment, the current collector sublayers 202 and 210 are thin layers of aluminum foil or conductive paper, respectively. The anode sublayer 204 is Li4Ti5O activated by an electrolyte gel containing carbon (including single-layer carbon nanotubes (SWCNTs) and carbon powder, which are described in more detail below), as well as a semi-interpenetrating polymer network (SIPN or semi-IPN) skeleton dissolved in sebaconitrile and a lithium salt (such as lithium tetrafluoroborate (LIBF4)). 12(i.e., LTO). The separator sublayer 206 is formed by a solid electrolyte, which in this embodiment is Al2O3, and the electrolyte gel described above. The cathode sublayer 208 is LiCoO2 (i.e., lithium cobaltate or LCO) activated by carbon (including SWCNTs and carbon powder, which are described in more detail below) and an electrolyte gel.

[0092] The semi-IPN skeleton is an ultraviolet (UV) curable polymer composed of ethoxylated trimethylolpropane triacrylate (i.e., ETPTA) incorporating 1.0 wt% 2-hydroxy-2-methylpropiophenone (HMPP) as a photoinitiator, and poly(vinylidene fluoride cohexafluoropropylene) (i.e., PVdF-HFP) with a hexafluoropropylene (HFP) content of 6 mol% (mol%), where the ETPTA / PVdF-HFP ratio is 75 / 25 w / w. The semi-IPN skeleton functions as a binder for other materials in electrodes and electrolytes.

[0093] To increase the conductivity of LCO and LTO, electrode-activated LCO or LTO powder (e.g., nanoparticles) is coated with SWCNTs. Specifically, the LCO or LTO powder is added to an SWCNT suspension solution (LCO / SWCNT ratio of 99.75 / 0.25 w / w, LTO / SWCNT ratio of 99.35 / 0.65 w / w) and mixed. The mixed solution is then filtered to obtain a solid, which is rinsed and dried to obtain SWCNT-coated LCO (i.e., activated LCO) or SWCNT-coated LTO (i.e., activated LTO).

[0094] Next, an electrode paste for fabricating the cathode sublayer 208 is formed by mixing SWCNT-coated LCO nanoparticles with carbon black (i.e., carbon powder) and a semi-IPN skeleton (in a ratio of 55 / 6 / 39 w / w / w). Then, an electrode paste for fabricating the anode sublayer 204 is formed by mixing SWCNT-coated LTO nanoparticles with carbon black (i.e., carbon powder) and a semi-IPN skeleton (in a ratio of 30 / 7 / 63 w / w / w). In this specification, carbon black is used to increase the conductivity of the electrodes.

[0095] The solid electrolyte separator sublayer 206 contains 1 mole (mol / liter, M) of LiBF4 in a ratio of 85 / 15 w / w in sebaconitrile (SBN) and semi-IPN skeleton, and then the aggregate is mixed with Al2O3 (approximately 300 moles) in a ratio of 60 / 40 w / w. Al2O3 is used as a spacer to prevent any short circuits of the electrodes.

[0096] The battery cell 136 shown in Figure 19B has many advantages over conventional lithium-ion batteries that use liquid electrolytes, such as being safer and more flexible. On the other hand, the battery cell 136 shown in Figure 19B also has disadvantages, such as complex manufacturing (requiring multiple printing steps) and low anode capacity, which may make it unsuitable for large-scale production.

[0097] Figure 19C is a schematic diagram showing the structure of a battery cell 136 in the form of a lithium-ion battery cell according to several embodiments of the present disclosure. In this embodiment, the current collector sublayers 202 and 210 are thin layers of aluminum foil or conductive paper, respectively. The anode sublayer 204 is activated Si containing SWCNTs with graphite and the electrolyte gel described above. The separator layer 206 is a polyethylene or paper-based nanoporous material. The cathode sublayer 208 is LCO activated with carbon (including SWCNTs and carbon powder) and an electrolyte gel.

[0098] Compared to the battery cell 136 shown in Figure 19B which uses LTO, the use of graphite and Si in these embodiments improves the capacity of the battery cell 136. Compared to using aluminum foil as the current collector sublayers 202 and 210, the use of conductive paper reduces the weight of the battery cell 136 and can reduce the potential chemical reactions between the anode 204 and cathode 208 and the current collectors 202 and 210. Furthermore, the use of paper-based or polypropylene-based (PP) separators makes the manufacturing process inexpensive and easy, and therefore the battery cell 136 in these embodiments is cost-effective for large-scale production.

[0099] The semi-IPN skeleton is a UV-curable polymer composed of ETPTA incorporating 1.0 wt% HMPP as a photoinitiator. The semi-IPN skeleton functions as a binder to other materials in electrodes and electrolytes.

[0100] To increase the conductivity of LCO and Si, electrode-activated LCO or Si powder (e.g., nanoparticles) is coated with SWCNTs. Specifically, the LCO or Si powder is added to a SWCNT suspension solution (LCO / SWCNT ratio of 99.75 / 0.25 w / w, Si / SWCNT ratio of 99.00 / 1.00 w / w) and mixed. The mixed solution is then filtered to obtain a solid, which is rinsed and dried to obtain SWCNT-coated LCO (i.e., activated LCO) or SWCNT-coated Si (i.e., activated Si).

[0101] Next, an electrode paste for fabricating the cathode sublayer 208 is formed by mixing SWCNT-coated LCO nanoparticles with carbon black (i.e., carbon powder) and an electrolyte gel (in a ratio of 55 / 6 / 39 w / w / w). Then, an electrode paste for fabricating the anode sublayer 204 is formed by mixing SWCNT-coated Si nanoparticles with graphite and an electrolyte gel (in a ratio of 5 / 45 / 50 w / w / w). In this specification, carbon black is used to increase the conductivity of the electrodes.

[0102] The nanoporous separator sublayer 206 comprises a nanoporous membrane such as a paper membrane, a PP or polyethylene (PE) based membrane, or the same.

[0103] Figure 20 is a schematic diagram showing two battery cells 136 printed in series with respect to a common current collector sublayer (labeled 202 / 210). Each battery cell 136 has an output voltage of volts (V), and the combined voltage of the two battery cells 136 is 2aV.

[0104] Figure 21 illustrates a stencil printing technique for fabricating battery cells 136 by using a cold manual laminator as a stencil printer device. Specifically, a pair of rollers 222 rotate as indicated by arrow 224 to apply pressure to the hybrid energy device to be fabricated (denoted as 102', having a substrate 132 and a solar cell layer 112 printed on it), and the hybrid energy device is fed to the rollers 222 as indicated by arrow 228. The fed hybrid energy device 102' is prepared with a copper mask (not shown) superimposed on it, and a gel or paste, each having one of the above materials from sublayers 204-208, is applied to the masked hybrid energy device 102'. Thus, after passing through the rollers 222, a thin layer 230 of gel (having a thickness of approximately 100 μm) is printed or coated onto the masked hybrid energy device 102'.

[0105] Figure 22 illustrates the process of fabricating an anode sublayer 204 on an aluminum or conductive paper current collector sublayer 202 using the stencil printing technique described above, which does not use a processing solvent. As shown, the LTO anode paste 252 is applied to a feed hybrid energy device 102' having an aluminum or conductive paper current collector sublayer 202 (not shown), and a rotating roller 222 applies pressure to the anode paste 252 as it passes through to form a thin LTO film 204, which is then subjected to approximately 2000 mW.cm². -2 The LTO anode sublayer 204 is exposed to UV irradiation 254 from an Hg UV lamp 256 having an irradiation peak intensity for 30 seconds to solidify and form a printed LTO anode sublayer 204.

[0106] Next, the hybrid energy device 102' can be masked, coated with electrolyte paste, and fed through roller 222 using the same stencil printing and UV curing process as described above to print a solid electrolyte separator sublayer 206 onto the anode sublayer 204. The cathode sublayer 208 can then be fabricated by printing cathode paste onto the solid electrolyte separator sublayer 206 of the hybrid energy device 102' and curing by UV irradiation. After placing the Al current collector sublayer 210 on top of the printed cathode sublayer 208, a seamlessly integrated all-solid-state battery cell layer 136 is obtained, which may be a monofull cell, i.e., the entire battery cell layer 136 comprising a single battery cell.

[0107] The above process can be repeated to print another battery cell layer 136 on top, thereby inducing printed bipolar battery cells 136.

[0108] In some embodiments, the sublayers of the battery cell 136 may be printed using the above-described printing device having a slot die head 174 as shown in Figure 13. In these embodiments, all sublayers of the solid battery cell 136 may be printed using slot die coating with a specific head 174. However, stencil printing (see Figure 21) is much easier to use with high-viscosity inks. Furthermore, it is not necessary to coat thin (i.e., nm-scale) layers (nm scale) to produce the batteries disclosed herein. The sublayers of the battery cell 136 may have relatively thick thicknesses in the range of micrometers, which can be easily achieved by using stencil printing.

[0109] Figure 23 shows details of the hybrid energy device 102. In this embodiment, the energy storage layer 114 is a supercapacitor layer comprising multiple GaAs / AlGaAs sublayers 138 that form multiple semiconductor capacitors as described above.

[0110] Integrated Electronic Power Converter In some embodiments, the multi-input electronic power converter 116 may be an integrated electronic power converter that can be printed, deposited, or otherwise integrated into the layer 136 of the battery cell (see Figures 9A and 9B). The block diagrams of the integrated electronic power converters shown in Figures 24A and 24B show a solar energy collection system 100 having integrated electronic power converters 116 for AC and DC applications, respectively.

[0111] Figure 25A is a block diagram of the integrated electronic power converter 116. As shown, the integrated electronic power converter 116 includes a solar input converter 284 that receives the output of the solar cell layer 112 at the solar input 282 and converts the solar input 282 into a first intermediate form (voltage, current, frequency, and / or similar) and outputs it to the output converter 288. The integrated electronic power converter 116 also includes a battery input converter 286 that receives the output of the energy storage layer 114 at the battery input 290 and converts the battery input 290 into a second intermediate form (voltage, current, frequency, and / or similar) and outputs it to the output converter 288. The output converter 288 receives and integrates the electrical outputs from the solar input converter 284 and the battery input converter 286, and converts the integrated electrical energy into a suitable form (voltage, current, frequency, and / or similar) and outputs it (292) to the load and / or commercial power grid (not shown).

[0112] In these embodiments, the solar input converter 284, the battery input converter 286, and the output converter 288 are high-frequency (HF) circuits and have a functional structure similar to that shown in Figure 25B. As can be seen, each of the converters 284, 286, and 288 comprises a power circuit 312 for receiving power input, coupled to a drive circuit 314 for outputting power. A control and sensing module 316 is coupled to the drive circuit 314 to control the power output and maintain balance between the solar input 282 and the battery input 290.

[0113] Figure 25C is a circuit diagram of the integrated electronic power converter 116. As shown, the solar input converter 284, the battery input converter 286, and the output converter 288 are electrically coupled to a ferromagnetic core or ferrimagnetic core via a transformer 322. The control and sensing module 316 controls the respective output currents i of the solar input converter 284 and the battery input converter 286. p1 and i p2 (i = 1 or 2) pi (collectively represented as), as well as the output voltage v of output converter 288 o It senses i Pi and v o This is used to adjust the parameters of the solar input converter 284, the battery input converter 286, and the output converter 288 to optimize their performance.

[0114] As shown in Figures 26A to 26C, the integrated electronic power converter 116 in some embodiments may be formed by printed circuits on a plurality of flexible printed circuit boards (PCBs) 330.

[0115] In these embodiments, the integrated electronic power converter 116 is mounted as an integrated circuit (IC) chip and comprises a core layer 334 made of ferrite material, thereby forming a ferrite core. The ferrite core 334 is sandwiched between two silicon-based wiring layers 330. Figure 26C is a schematic perspective view of a portion of the integrated electronic power converter 116. For ease of explanation, the structure of the integrated electronic power converter 116 is shown with a gap between the ferrite core 334 and the wiring layers 330. However, those skilled in the art will understand that such a gap is for illustrative purposes only, and that the actual integrated electronic power converter 116 may not have any gap between the ferrite core 334 and the wiring layers 330. For example, the ferrite core 334 may be printed, deposited, or otherwise integrated onto any one of the wiring layers 330.

[0116] The ferrite core 334 comprises three ferrite loops 336A, 336B, and 336C, which function as the cores for the inductors Ls of the solar input converter 284, the battery input converter 286, and the output converter 288, respectively.

[0117] Conductive wiring 332, including 332A, 332B, and 332C, is distributed on wiring layer 330 and connects the solar input converter 284, the battery input converter 286, and the output converter 288. As shown in Figures 26B and 26C, the conductive wiring 332 on the opposite wiring layer 330 is connected through vias 342 (conductive holes on wiring layer 330) and wrapped around the ferrite core 334.

[0118] In some embodiments, the integrated electronic power converter 116 is implemented as a circuit board having two wiring layers 220 made from a flexible PCB and a core layer 334 shown in FIGS. 26A-26C and structured in a manner similar to that described above. The conductive wiring 332, including 332A, 332B, and 332C, is made from an etched conductive layer on the flexible PCB 330. The conductive wiring 332 on the opposite flexible PCB 330 is connected through vias 342 and wrapped around the ferrite core 334.

[0119] Circuit of Hybrid Energy Device FIG. 27 is a circuit diagram showing a DC hybrid energy device 102 having an integrated DC power converter 116DC according to some embodiments of the present disclosure and supplying power to a DC energy device (not shown and collectively referred to as "output devices") at its output 402. The DC power converter 116DC is integrated into the hybrid energy device 102 and can electrically connect the solar cell 112 and the energy storage 114 to their respective output devices.

[0120] In these embodiments, the integrated DC power converter 116DC includes a plurality of HF circuit modules including a solar input converter 284, an energy storage converter 286, and an output converter 288. The integrated DC power converter 116DC also includes a current shaping control module 316 for accurately controlling the flow of power between the solar cell 112, the energy storage 114, and the output 402, which shapes the HF current passing through the HF transformer 332 to achieve desired performance.

[0121] As shown in FIG. 27, each of the circuit modules 284, 286, and 288 includes a pair of metal oxide semiconductor field effect transistors (MOSFETs) (Q in the solar input converter 284 1、PV and Q 2、PV , Q in the energy storage converter 286 1、ES and Q 2、ES , Q in the output converter 2881、o and Q 2、o A pair of power semiconductors, such as ), together with an LC circuit (having two capacitors and an inductor in this example), form a switch circuit for electrically coupling them via a transformer 322. Circuit modules 284, 286, and 288 have their power semiconductor gate terminals Q 1、PV Q 2、PV Q 1、ES Q 2、ES Q 1、o , and Q 2、o It can be controlled by adjusting the signal applied to it.

[0122] In the embodiment shown in Figure 27, the current shaping control module 316 controls the output voltage v of the solar cell layer 112. pv , the output voltage v of the energy storage layer 114 Bat The output current i of the solar input converter 284 and the energy storage converter 286, respectively, to be coupled to the output converter 288 via the transformer 322. p、PV i p、ES (collectively i p (as it is written), and the output voltage of the output converter is 288 v o It senses multiple parameters, including Q. The current shaping control module 316 senses the power semiconductor gate terminals (collectively Q). i、PV Q i、ES , and Q i、o The performance of the integrated DC power converter 116DC is optimized by controlling the signal applied to (where i=1 or 2).

[0123] In particular, based on the detected parameters described above, the current shaping control module 316 controls the gate terminal signal Q i、PV Q i、ES , and Q i、o This controls the duty cycle d of the power semiconductor in the transformer PV side 284. PV , Transformer battery side 286 duty cycle d ES , the duty cycle d of the power semiconductor at the transformer output side 288 o, the phase shift (i.e., φ) between the pulse of the power semiconductor on the PV side 284 of the transformer and the pulse of the power semiconductor on the output side 288. PV ), the phase shift (i.e., φ) between the pulse of the power semiconductor on the transformer battery side 286 and the pulse of the power semiconductor on the output side 288. ES ), and switching frequency (i.e., T s Various signal parameters such as ) are adjusted to shape the HF currents of the three modules 284, 286, and 288.

[0124] Figure 28 shows the HF waveforms of several signals in the solar cell module 284.

[0125] Figure 29 is a block diagram of a current shaping control module 316 for controlling a solar cell module 284 in some embodiments. According to this figure, the power output from the solar cell module 284 is pulsed Q by the PV-side power semiconductor of the transformer. i、PV Phase shift φ between (i=1, 2) and the pulse of the transformer output power semiconductor. PV It is controlled using a constant reference current value I as the maximum value of the instantaneous current of the transformer. In particular, the current shaping control module 316 controls the current shaping control module 316 as a constant reference current value I max Using a pair of reference signals v* PV and i* PV Generate signal k d、PV The input is passed to controller 412, which outputs (here "*" represents the reference signal). The current shaping control module 316 also receives the input signal Q. 1、o or Q 2、o A pair of monostable multivibrator circuits are used to detect the rising edge and output a pulse of a predetermined length. Similar control can be performed for the energy storage module 286.

[0126] Generally, the current shaping control module 316 receives two signals i at the input side of amplifiers 414 and 416, respectively. ref1 and i ref2 Q 2、o If ='1', i ref1 =Imax -k d、PV ×t, Q 1、o If ='1', i ref2 =I max -k d、PV We decide on ×t. Here, "×" represents multiplication.

[0127] Next, signal i ref1 and i ref2 In amplifiers 414 and 416, respectively, Q 2、o x|i p、PV | and Q 1、o x|i p、PV Subtracting |(where "|a|" represents the absolute value of a), the outputs of amplifiers 414 and 416 are used to trigger the SR flip-flop 418, and the signal Q 1、PV and Q 2、PV Generates.

[0128] A current shaping control module 316 for controlling the energy storage module 286 may be similar to that shown in Figure 29, except that the phase shift can be positive or negative depending on the charging or discharging mode of operation.

[0129] Figure 30 shows the waveform related to the current shaping control module 316. The controller controls the signal i generated by controller 412. ref1 and i ref2 Droop gradient k di The phase shift is adjusted by adjusting (i=1,2) and the power is controlled. Transformer current i p、PV or i p、ES Since the gradient can be positive or negative (depending on the input and output voltages), controlling the droop gradient allows for effective control of the phase shift regardless of the transformer current gradient. PV d o , T s Other control variables, such as those mentioned above, can be used to ensure soft switching of power semiconductors.

[0130] Figure 31 is a block diagram showing the generation of pulses in the secondary power semiconductor of the converter by using a zero-voltage switching (ZVS) control circuit 422. This ZVS control circuit 422 controls the HF current i p (i p、PV or i p、ES Ensure that the (which may be) has the correct polarity at the time of switching.

[0131] In some embodiments shown in Figure 32, multiple DC hybrid energy devices 102 (see Figure 27) can be connected in parallel or otherwise combined to supply power to a DC load 104 and / or a DC power grid 118.

[0132] In some embodiments shown in Figure 33, multiple DC hybrid energy devices 102 described herein may be connected in series or otherwise combined to power a DC load 104 and / or a DC power grid 118. An advantage of these embodiments is that while the voltage output of each hybrid energy device 102 may be low, a combination of multiple hybrid energy devices 102 can provide a high voltage output as needed.

[0133] In some embodiments, the DC hybrid energy device 102 may be used to power an AC load and / or an AC power grid using a DC / AC inverter. For example, Figure 34 shows multiple DC hybrid energy devices 102 connected in parallel to power a DC load 104 and / or a DC power grid 118 via a single-input DC / AC inverter 432. Figure 31 shows multiple DC hybrid energy devices 102 connected in series to power a DC load 104 and / or a DC power grid 118 via a single-input DC / AC inverter 432.

[0134] Figure 36 is a schematic diagram showing an AC hybrid energy device 102 with an output 402 having an integrated AC power converter 116AC for supplying power to AC energy devices (not shown, collectively referred to as output devices) according to some embodiments of the present disclosure. The AC power converter 116AC is integrated into the hybrid energy device 102 and can electrically connect solar cells 112 and energy storage 114 to their respective output devices.

[0135] As shown in Figure 36, the integrated AC power converter 116AC has an output converter 288 which is a pair of power semiconductor Q 3、o and Q 4、o Furthermore, the inductor L g It is similar to the integrated DC power converter 116DC except that it further includes the following. Therefore, the current shaping control module 316 of the integrated AC power converter 116AC also controls the AC output voltage v g and AC output current i g It senses and optimizes. Based on the sensed parameters, the current shaping control module 316 also controls the power semiconductor Q 3、o and Q 4、o (That is, in Figure 36, Q is i=1, 2, 3, 4) i、o Adjusts the signal applied to the gate terminal of ).

[0136] In these embodiments, the current shaping control module 316 is similar to that of the integrated DC power converter 116DC. For example, the current shaping control module 316 for controlling the solar cell module 284 may have a structure similar to that shown in Figure 29. The current shaping control module 316 in these embodiments also uses a ZVS control circuit similar to that shown in Figure 31 to generate pulses in the transformer secondary side power semiconductor, thereby generating an HF current i p This ensures that the device has the correct polarity at the time of switching.

[0137] Those skilled in the art will know that in some embodiments shown in Figure 37, multiple AC hybrid energy devices 102 shown in Figure 36 can be connected in parallel or otherwise combined to supply power to an AC load 104 and / or an AC power grid 106.

[0138] Exemplary use of a solar energy collection system The solar energy collection system 100 described above may also be present within various electrical and electronic devices, either as a removable part or as an integrated part thereof, as needed.

[0139] For example, Figure 38 shows a mobile phone case 500 having multiple side walls 502 and a rear wall 504, thereby forming a recess 506 into which a mobile phone (not shown), such as a smartphone, is received. The hybrid energy device 102 is integrated into these rear walls 502. As shown in Figure 39, the hybrid energy device 102 comprises, in order from the rear wall 502 of the mobile phone case 500, an electronic power converter 116, an energy storage layer 114, a solar cell layer 112, and a transparent substrate 132 such as a transparent glass piece. The energy storage layer 114 is connected to the battery in the mobile phone via the electronic power converter 116.

[0140] In some alternative embodiments, the hybrid energy device 102 may not have an energy storage layer 114. Rather, the solar cell layer 112 is connected to a battery in a mobile phone via an electronic power converter 116.

[0141] In some alternative embodiments, the case 500 may be a case for other portable devices, such as a tablet.

[0142] In some alternative embodiments, the hybrid energy device 102 may be integrated into the rear wall of a mobile phone or tablet.

[0143] In some alternative embodiments, the hybrid energy device 102 may be integrated into the rear wall of the laptop computing device's display.

[0144] In some embodiments shown in Figure 40, the hybrid energy device 102 may be integrated into the screen 542 of the mobile phone 540.

[0145] As shown in Figure 41, the screen 542 comprises, from the outermost layer to the innermost layer, a transparent substrate layer 132 such as glass having one or more sublayers for touch detection (e.g., capacitive touch detection), a display layer 544 having multiple LEDs for displaying an image, a solar cell layer 112, an energy storage layer 114, and an electronic power converter 116. The display layer 544 is a transparent layer such as a transparent OLED layer, and the transparent layer allows light to pass through it to the solar cell layer 112 below. The energy storage layer 114 is connected to the battery in the mobile phone via the electronic power converter 116. Alternatively, the mobile phone 540 may not have a separate set of batteries other than the energy storage layer 114.

[0146] In these embodiments, the mobile phone 540 does not need to have an energy storage layer 114. Rather, the solar cell layer 112 is connected to the battery of the mobile phone 540 via an electronic power converter 116.

[0147] In various embodiments, the screen 542 may further include other necessary layers that may be located below the solar cell layer 112, or, if the layer is transparent, above the solar cell layer 112.

[0148] In some alternative embodiments, the display layer 544 may be a liquid crystal display (LCD) layer. In these embodiments, a backlight may be required to provide the illumination necessary to display the image. Furthermore, the light energy conversion efficiency of the solar cell layer 112 may be affected by the image displayed on the display layer 544. For example, the light energy conversion of the solar cell layer 112 may be significantly reduced or even disabled when the display layer 544 displays a dark or black image on it.

[0149] In some alternative embodiments, the screen 542 may further comprise an optical conversion layer between the transparent substrate 132 and the display layer 544. The optical conversion layer comprises one or more metasurfaces that adjust one or more parameters of the light emitted from the display layer 544, such as amplitude or intensity, phase, polarization, pattern, and direction. Details of the optical conversion layer are described in the present applicant's concurrently pending U.S. Provisional Patent Application No. 62 / 862,853, filed June 18, 2019, and No. 62 / 961,317, filed January 15, 2020, the contents of which are incorporated herein by reference in their entirety.

[0150] Digital Current Estimation In the embodiments shown in Figures 27 and 29, the current shaping control module 316 is an HF current sensor and includes sensing circuits (or "sensors") necessary to sense multiple parameters. For example, the current shaping control module 316 uses the HF current sensor to sense the HF current i p It detects.

[0151] Current sensors are typically expensive and can introduce noise and delay into the control module 316. The HF current sensor in the current shaping control module 316, as shown in Figures 27 and 29, increases the cost of the hybrid energy device, reduces its power density, and diminishes the reliability of the control module 316.

[0152] FIG. 42 shows a current shaping control module 316 in some embodiments. The current shaping control module 316 in these embodiments is similar to that shown in FIG. 27. However, the current shaping control module 316 in these embodiments uses a digital HF current estimator 602 to estimate the HF current waveform and utilizes it as feedback for the closed-loop control system shown in FIG. 27.

[0153] Specifically, the current shaping control module 316 of these embodiments receives input and output voltages (v o 、v Bat 、v pv ) as well as gate pulse signals Q i、pv 、Q i、ES 、and Q i、o to estimate the HF current waveform, thereby avoiding the use of any current sensors.

[0154] Gallium nitride (GaN) gate driver circuit Prior art GaN gate drivers may have reliability issues and may not be suitable for industrial applications. One of the main reliability issues is due to the high reverse conduction voltage caused by the reverse conduction mechanism of GaN devices. In some embodiments, GaN devices can be used as power semiconductors (Q 1、PV and Q 2、PV 、Q 1、ES and Q 2、ES 、and Q 1、o and Q 2、o ) in circuit modules 284, 286, and 288 of the power converter 116.

[0155] In GaN gate driver circuits, using bootstrap techniques in a half-bridge configuration can be difficult because it requires careful adjustment of the gate bias (e.g., a bias of 5-6V with a maximum rating of 7V). As shown in Figure 43, during low-side freewheeling, the negative voltage at the switch node can overcharge the bootstrap capacitor, causing the GaN high-side gate voltage to exceed its maximum rating of 7V. As a result, post-regulation or voltage clamping may be required after bootstrapping.

[0156] Figure 44 shows a GaN gate driver circuit 610 with minimized reverse conduction time used in a multi-input electronic power converter 116. As shown, the GaN gate driver circuit 610 comprises two GaN gates Q1 and Q2 that are charged or discharged. The GaN gate driver circuit 610 includes two control switches S1 and S2, a pair of coupling inductors L1 and L2, and a clamp capacitor C B Furthermore, a level shifter 612 is used to avoid shoot-through. The level shifter 612 may be a voltage source. However, in these embodiments, the level shifter 612 is a Zener diode D z and capacitor C z It is implemented using a resistor R connected in parallel and in series. z Connected.

[0157] The GaN gate driver circuit 610 offers several advantages, including significantly reduced switching losses due to rapid turn-on and turn-off of the power switch during transition time, noise immunity, substantial reduction in gate driver losses due to gate energy recovery, zero-voltage switching of the drive switch, a small number of components, and the simplicity of its control circuit. Compared to other current source drivers (CSDs), the GaN gate driver circuit 610 has the significant advantage that the voltage level of the GaN input capacitor rises higher than the gate driver power supply voltage. The effects of transformer parasitic capacitors can be mitigated by adding a parallel inductor to the secondary side of the transformer.

[0158] Enhancement-mode GaN transistors have the characteristic that a failure mechanism occurs in the device when the maximum gate voltage of the device exceeds a certain voltage level (e.g., 7V). This is also true for depletion-mode GaN devices. Enhancement-mode GaN devices require a gate voltage close to a certain voltage level (e.g., 6V) to achieve optimal performance. Unlike its corresponding silicon counterpart, enhancement-mode GaN devices fail when a certain voltage (e.g., 7V) is exceeded. Higher gate-source voltages in GaN can lead to lower drain-source resistance in the turn-on state, significantly reducing conduction losses. For some high-frequency applications, a CSD that can drive the gate-source voltage of a GaN device higher than the supply voltage is desirable. Existing gate drivers for GaN that can drive two GaNs within one bridge leg cannot drive the gate at a voltage higher than the supply voltage. A unique feature of the GaN gate driver circuit 610 is R ds This is the gate-source voltage boosting capability that reduces (on), and therefore the conduction loss.

[0159] Using the GaN gate driver circuit 610 minimizes dead time and the resulting reverse conduction loss. In fact, the reason for reverse conduction loss is dead time. To avoid shoot-through, dead time may be inserted between the gate driver signals. As long as the crossover level of the gate driver signal is below the device threshold voltage, dead time can be eliminated and shoot-through can also be avoided. The crossover level of the gate signal is always V CCThis is half of the threshold voltage, which is usually higher, and can cause a shoot-through problem. In the GaN gate driver circuit 610, the level shifter circuit 612 can be inserted into the driver loop of either the upper or lower switch. Based on the level shifter circuit 612, the crossover point can be adjusted to avoid the shoot-through problem, as shown in Figure 45. In addition, the negative voltage generated by the level shifter bias ensures high reliability of the turn-off status and avoids false turn-on due to a low threshold voltage. These advantages make the GaN gate driver circuit 610 suitable for GaN devices in a half-bridge structure.

[0160] Soft switching for HF operation Soft switching is important for high-frequency applications because it significantly reduces switching losses. For example, in some embodiments, the electronic power converter 116 of the hybrid energy device 102 may operate in the megahertz (MHz) frequency range. Therefore, hard switching can result in degraded performance and excessive switching losses that require complex thermal management.

[0161] The power converter 116DC shown in Figure 27 provides zero-voltage switching (ZVS), which can substantially reduce switching losses. However, under certain conditions, ZVS may be lost, thereby degrading performance. This problem stems from the fact that high-frequency transformers may have some parasitic capacitance. For example, Figure 46 shows various parasitic capacitances C p1 ~C p3 , and C of HF transformer T s1 ~C s3 This indicates that these parasitic capacities distort ZVS operation under certain conditions.

[0162] Figure 47 is a schematic diagram of a DC power converter 116DC in several embodiments that may be used in the hybrid energy device 102 shown in Figure 27. The power converter 116 has a parallel inductor L on the output side of the HF transformer 322.p This effectively compensates for the parasitic capacitances mentioned above and provides soft switching to the DC power converter 116DC. Those skilled in the art will understand that a similar design may be applied to the AC power converter 116AC shown in Figure 36.

[0163] Thermoelectric recycling Some components of the hybrid energy device 102 can generate heat. For example, the solar panel 112 and power electronics (e.g., the electronic power converter 116) are the main heat sources in the hybrid energy device 102.

[0164] In some embodiments, the heat generated can be reused and converted into electricity by using a thermoelectric unit (also known as a "thermoelectric generator" (TEG)).

[0165] Figure 48 is a schematic diagram showing a thermoelectric unit 620 coupled to a heat source 622, such as a solar panel 112 or an electronic power converter 116. The thermoelectric unit 620 comprises, in order from the heat source 622, a hot plate 624, a thermoelectric layer 626, and a cold plate 628.

[0166] The hot plate 624 is made of a suitable thermally conductive material, such as a metallic material, to receive the heat generated by the heat source 622. In some embodiments, the hot plate 624 may be a substrate of the heat source 622. In some other embodiments, the hot plate 624 may be a separate plate bonded to the substrate of the heat source 622 using suitable means such as thermally conductive adhesive, screws, bolts, and / or the like. The cold plate 628 is made of a suitable material, such as metal.

[0167] The thermoelectric layer 626 includes a suitable thermoelectric material having low thermal conductivity (or substantially thermally inconductive or thermally insulating) and high electron and hole mobility (i.e., electron and hole carrying ability), such as a two-dimensional (2D) perovskite or other suitable 2D material, which converts the temperature gradient between the hot plate 624 and the cold plate 628 into an electric current. Here, the 2D material is a material that effectively carries electrons and holes but has poor heat transfer performance. In these embodiments, the 2D material may be any suitable type of 2D material and may differ from the 2D perovskite used in the active layer of the solar cell. 3D materials can carry both electricity and heat and are therefore undesirable in these embodiments.

[0168] The hot plate 624, thermoelectric layer 626, and cold plate 628 have good electronic conductivity. Furthermore, the thermoelectric layer 626 has low thermal conductivity, and therefore the hot plate 624, thermoelectric layer 626, and cold plate 628 form a structure that receives heat from the heat source 622, confines the received heat near the hot plate 624, and converts it into electricity.

[0169] As shown in Figures 49A and 49B, the thermoelectric layer 626 in these embodiments comprises one or more 2D material sublayers 632, such as a 2D perovskite sublayer, extending between the hot plate 624 and the cold plate 628. The one or more 2D material sublayers 632 may be a continuous 2D material sheet, or a plurality of 2D material sheet segments or columns spaced apart from each other or separated by a plurality of spacers or fillers such as a membrane 634. For example, the thermoelectric layer 626 in one embodiment may be made of a plurality of 2D perovskite sheets arranged alternately with a plurality of membrane sheets. In another embodiment, the thermoelectric layer 626 may be made by laminating a 2D perovskite sheet with a membrane sheet and rolling the laminated sheets into a cylinder to form the thermoelectric layer 626.

[0170] During operation, the hot plate 624 receives heat from the heat source 622, forming a temperature gradient within the thermoelectric unit 620, which causes electrons 636 to move toward the cold plate 628, thereby generating an electric current.

[0171] Therefore, the thermoelectric unit 620 can provide useful redundancy to the solar energy collection system 100 and can effectively reuse a portion of the thermal energy generated by the heat source 622.

[0172] In some embodiments, either the solar panel 112 or the electronic power converter 116 is coupled to the thermoelectric unit 620.

[0173] In some embodiments, either the solar panel 112 or the electronic power converter 116 is coupled to the thermoelectric unit 620.

[0174] Figure 50 shows an exemplary implementation of a PV panel 112 integrated with, or otherwise coupled to, a thermoelectric unit, i.e., TEG620. In this device, wavelengths of solar radiation (typically in the range of 300-800 nm) are absorbed through the PV panel 112, and longer wavelengths are absorbed through the thermoelectric unit 620. By combining the PV panel 112 and TEG620, their power output is greater than that of the PV panel 112 alone. Furthermore, the TEG620 also functions as a heat sink, lowering the operating temperature of the PV panel 112, thereby extending the lifespan of the PV panel 112.

[0175] Figures 51A and 51B are schematic diagrams showing a photovoltaic thermoelectric unit 650 according to several embodiments of the present disclosure. As shown, the photovoltaic thermoelectric unit 650 comprises a photocollection layer 652 and a TEG 620 coupled thereto. The TEG 620 is similar to those shown in Figures 48-50 and comprises, in order from the photocollection layer 652, a hot plate 624, a thermoelectric layer 626, and a cold plate 628.

[0176] The light harvesting layer 652 comprises a first sublayer having multiple solar cells 654 mixed with multiple metasurfaces 656 (which are multiple nanocolumns as shown in Figure 47C), and a second sublayer having multiple nanowires 658 bonded to the first sublayer.

[0177] As those skilled in the art will understand, the solar cell 654 can collect energy only in a specific frequency spectrum. In conventional solar panels, uncollected light energy is typically wasted as heat.

[0178] In these embodiments, the metasurface 656 is designed to further improve the use of solar energy by utilizing the energy of the light spectrum that is unavailable to the solar cell 654. Specifically, the metasurface 656 may be designed to conduct light having a particular frequency that is unavailable to the solar cell 654. This light conducted through the metasurface 656 is converted into heat by the nanowire 658 and then into electricity by the TEG 620.

[0179] As shown in Figure 51D, the nanowire 658 can be embedded in the hot plate 624 and the converted heat can be directly transferred to the thermoelectric layer 626 to be converted into electricity.

[0180] Figure 52 shows a thermoelectric unit, or TEG700, according to several embodiments of the present disclosure. In these embodiments, the TEG700 comprises a hot plate 624 and a cold plate 628 similar to those described above, as well as a nanochannel layer 702 sandwiched between the hot plate 624 and the cold plate 628. The nanochannel layer 702 comprises a plurality of nanochannels 704 in parallel. The nanochannels are made of a suitable conductive material such as carbon (e.g., graphene), gold, and / or similar, and have one or more subwavelength dimensions. For example, in some embodiments, the nanochannel layer 702 may have a subwavelength thickness (dimension between the hot plate 624 and the cold plate 628), such as about 10 nm, to highlight quantum effects and enable electron transfer (see Figure 49B).

[0181] In these embodiments, the nanochannel 704 is used to confine heat to the hot plate side and provide a channel for electrons 706 to flow through. In other words, the nanochannel layer 702 is conductive, allowing electrons 706 to flow, but at the same time hindering heat transfer and maintaining a temperature gradient.

[0182] In some similar embodiments, the nanochannel layer 702 may comprise multiple nanochannels 704 arranged in series or in a mixture of parallel and series. See Figure 53.

[0183] Supercapacitor technology Because actual sunlight conditions are usually unstable, energy storage in the solar energy collection system 100 is important. Considering the intermittency of solar energy, the energy storage unit can be an integral part of the hybrid energy device 102.

[0184] Energy can be stored using various methods, but batteries and supercapacitors are among the most common solutions due to their superior performance. For example, in some embodiments, high-density lithium-ion (LI) batteries can be used to store energy.

[0185] In some embodiments, such as those in which large-sized PV panels 112 are used, supercapacitors may be used to store energy.

[0186] Supercapacitors are a relatively new class of energy storage systems that offer high-speed power delivery and a lifespan of over several thousand charge-discharge cycles at high current densities. Electrochemical double-layer capacitors (EDLCs) store opposite charges at the anode-cathode interface through physiocosphate, a mechanism different from batteries (energy storage occurs through oxidation-reduction reactions). As a result, supercapacitors can offer faster ion exchange rates and longer operating cycles compared to batteries. Supercapacitors are particularly attractive for use in high-power applications such as hybrid electric vehicles and power plants.

[0187] Figures 54A and 54B show the structure of the supercapacitor 740. As shown, the supercapacitor 740 comprises multiple multilayer capacitor layers 742 coupled to a pair of conductors or a pair of electrical terminals 744 and 746.

[0188] Each capacitor layer 742 comprises a pair of thin-film sublayers 752 separated by an electrically insulating membrane sublayer 754 sandwiched between them, and a pair of conductive sublayers 756 and 758 sandwiching the thin-film sublayers 752 (and membrane sublayers 754) between them. The thin-film sublayers 752 are made of conductive thin-film materials such as a mixture of activated carbon, graphene, graphite, and / or similar. The membrane sublayers 754 are coated with an ionic liquid material, or by immersing the membrane in an ionic liquid and removing excess liquid by suspending the membrane for several minutes.

[0189] Conductor sublayers 756 and 758 are electrically connected to their respective terminals 744 or 746. For example, as shown in Figure 54A, conductor sublayer 756 is electrically connected to terminal 744, and conductor sublayer 758 is electrically connected to terminal 746.

[0190] When multiple capacitor layers 742 are stacked together, adjacent capacitor layers 742 may share a conductor sublayer. For example, as shown in Figure 54A, adjacent capacitor layers 742-1 and 742-2 share a conductor sublayer 762, which is effectively the conductor sublayer 758-1 of capacitor layer 742-1 and the conductor sublayer 758-2 of capacitor layer 742-2. Similarly, adjacent capacitor layers 742-2 and 742-3 share a conductor sublayer 764, and adjacent capacitor layers 742-3 and 742-4 (not shown) share a conductor sublayer 766.

[0191] This structure allows the supercapacitor 740 to have a thin thickness over a large area. Multiple supercapacitors 740 can be integrated to provide sufficient storage capacity required for the hybrid energy device 102. The supercapacitor 740 has several key advantages.

[0192] For example, using thin-film materials makes it easier to construct the high-energy-density supercapacitor 740.

[0193] The supercapacitor 740 exhibits high-speed dynamic behavior; that is, the charging and discharging of the supercapacitor 740 can be much faster than that of a battery. Such high-speed dynamic behavior is important for the solar energy collection system 100 due to the unstable nature of solar energy.

[0194] Another advantage of the Super Capacitor 740 is its lifespan. Unlike batteries, the Super Capacitor 740 does not undergo electrochemical reactions. Therefore, the lifespan of the Super Capacitor 740 can be extended for many years with minimal performance degradation.

[0195] Another advantage of the Super Capacitor 740 is its wide temperature range, which makes it ideal for outdoor applications.

[0196] The following describes symmetrical supercapacitors and their fabrication processes. A supercapacitor may comprise one or more supercapacitor cells, each of which comprises a membrane, an electrolyte (i.e., an ionic liquid), a cathode, an anode, and a separator such as a pair of current collectors.

[0197] In some embodiments, the membrane may be cellulose fibers. In some other embodiments, the membrane may be a polymer membrane having high density pores and / or a suitable separator provided by Celgard LLC in Charlotte, North Carolina, United States.

[0198] The electrolyte ionic liquid may be 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIMBF4), which is stable in air and water, making it a good candidate for supercapacitors that operate at extremely high or low temperatures.

[0199] The cathode and anode may include a thin film of conductive material coated on the surface of the separator.

[0200] In some embodiments, silver nanoparticles dissolved in xylene or other suitable solvents may be used to form the current collector. In some other embodiments, a thin foil of a metal or graphene-based sheet may be used as the current collector. In even more other embodiments, a combination of coated silver ink and thin foil may be used to form the current collector.

[0201] Each supercapacitor cell may be formed from an ionic liquid, a conductive ink, and a membrane coated with a current collector. The conductive ink may contain activated carbon, graphene, a binder, and a volatile solvent. In some embodiments, both the cathode and anode can be fabricated using the same conductive ink, while in other embodiments, the components in the ink may differ for the electrodes.

[0202] The supercapacitor cell may be manufactured using a suitable printing or coating technique, such as slot die coating, spray coating printing, and a combination of doctor blades. The ink used for printing the cathode and anode contains activated carbon, graphene, carbon nanotubes, and a binder dispersed in a volatile solvent such as acetone.

[0203] Figure 55 shows the structure of a supercapacitor 800 according to several embodiments of the present disclosure. The supercapacitor 800 in these embodiments is a symmetrical supercapacitor having an anode 802 and a cathode 804 separated by a membrane 806, and a pair of current collectors 808 and 810 sandwiching the combination of anode 802, membrane 806, and cathode 804. The supercapacitor 800 also includes an ionic liquid (not shown) between anode 802 and membrane 806, and between cathode 804 and membrane 806.

[0204] In these embodiments, the anode 802, cathode 804, and current collectors 808 and 810 are coating films coated with a suitable conductive material. The membrane 806 may be cellulose or a polymer having high porosity. The ionic liquid may be EMIMBF4 or a similar electrolyte. The cathode and anode are made of similar materials with sufficient conductivity.

[0205] This structure makes the Supercapacitor 800 a flexible supercapacitor.

[0206] In some embodiments, the supercapacitor 800 may be formed by one or more supercapacitor cells 800', each having a structure as shown in Figure 55.

[0207] Figure 56 is a schematic diagram showing the fabrication process 820 for a supercapacitor cell 800' using spray coating technology. Fabrication process 820 is suitable for large-scale fabrication of supercapacitor cells 800'.

[0208] In various embodiments, a slot die coater or doctor blade method may be used as the printing tool. In some embodiments, in addition to the spray-coated current collector, a thin foil of metal or GRAFOIL® flexible graphite (GRAFOIL is a registered trademark of Neograf Solutions, LLC, Lakewood, Ohio, USA) may be used to reduce the resistivity of the cell. The thin metal foil may be aluminum, nickel, or other materials, depending on the selection of the ionic liquid and conductive ink compound. In some embodiments, PMMA may be used as an insulator and sealant.

[0209] In these embodiments, the ink compound has a high concentration of activated carbon and graphene mixed with a stabilizer and a volatile solvent, facilitating the fabrication process 820. In some embodiments, the ink may be made of carbon nanotubes or carbon fibers mixed with activated carbon and graphene. In some embodiments, the supercapacitor cell 800’ may be fabricated using different cathode and anode materials or different concentrations of compounds in the ink.

[0210] As shown in FIG. 56, in the ink preparation stage 822, the conductive ink is processed using a ball mill 842 to grind materials 844 such as activated carbon, graphene, a binder, and a suitable medium into fine-sized particles. All the powders and solvents are added to the ball mill in this step and mixed for several hours. The processed ink is then filtered and transferred to a printing station (not shown).

[0211] In the coating stage 824, two spray coaters 846 are used to sequentially apply a solution 848 of an ionic liquid, a conductive ink, and a current collector to the opposite side of the membrane 806, and a suitable annealing procedure is used to remove the volatile solvent.

[0212] In the encapsulation stage 826, two spray coaters 856 are used to apply a thin layer of PMMA insulator 858 to the supercapacitor cell 800’ to prevent short circuits in the stacked supercapacitor cell. In the packaging stage 828, the supercapacitor cell 800’ is transferred to a vacuum chamber for final encapsulation and packaging to fabricate the supercapacitor 800.

[0213] FIG. 57 shows a supercapacitor 800 formed by stacking a plurality of supercapacitor cells 800’ and a suitable insulator 872 such as a PMMA insulator sandwiched between each pair of adjacent supercapacitor cells 800’ for electrical insulation. In these embodiments, the supercapacitor cells 800’ may be stacked in series or in parallel. The PMMA insulator may be coated on the supercapacitor cell 800’.

[0214] This structure makes PMMA a good sealing material that prevents air and moisture from entering the supercapacitor cells 800', thus extending the lifespan of each cell 800' in the supercapacitor 800.

[0215] While embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that modifications and alterations can be made without departing from the scope of the invention as defined by the accompanying claims.

Claims

1. A power circuit, A first input circuit for coupling to a photovoltaic (PV) source, A second input circuit for coupling to an energy storage source, A third circuit coupled to the first input circuit and the second input circuit, the third circuit for coupling the outputs from the first input circuit and the second input circuit and providing a direct current (DC) output, A control circuit coupled to the first input circuit, the second input circuit, and the third circuit, which controls the duty cycle, switching frequency, and / or phase shift of the semiconductor switches of the first input circuit, the second input circuit, and the third circuit based on the detected output voltages of the PV source and the energy storage source, the currents of the first input circuit and the second input circuit coupled to the third circuit, and the output voltage of the third circuit, in order to adjust the power flow and maintain stable output operation. A power circuit equipped with the following features.

2. The power circuit according to claim 1, further comprising a transformer which couples the first input circuit, the second input circuit, and the third circuit to the first input circuit and the second input circuit on the input side of the transformer, and couples the third circuit to the output side of the transformer.

3. The power circuit according to claim 1, wherein each of the first input circuit, the second input circuit, and the third circuit comprises one or more semiconductors for power conversion.

4. The power circuit according to claim 3, wherein the control circuit generates a pulse-width modulation (PWM) gate signal for one or more semiconductors of the first input circuit, the second input circuit, and the third circuit, and dynamically adjusts the duty cycle and phase timing of the gate signal in response to the detected PV voltage, battery voltage, and output voltage to optimize the conversion efficiency.

5. The outputs of the first input circuit and the second input circuit are the output currents of the first input circuit and the second input circuit. The power circuit according to claim 1, further comprising one or more current sensors for sensing the output currents of the first input circuit and the second input circuit.

6. The power circuit according to claim 1, wherein the control circuit optimizes the output of the third circuit based on at least one of the output current of the PV source, the output current of the energy storage source, and the input current of the third circuit by adjusting at least one of the duty cycle, switching frequency, and phase relationship of the semiconductor switches included in the first input circuit, the second input circuit, and the third circuit.

7. The output of the third circuit is a DC output. The power circuit according to claim 1, further comprising a DC-AC inverter circuit coupled to the third circuit for converting the DC output of the third circuit into an alternating current (AC) output.

8. The outputs of the first input circuit and the second input circuit are output voltages, The power circuit further comprises one or more current estimators configured to estimate the output currents of the first input circuit and the second input circuit based on the output voltages of the PV source, the energy storage source, and the third circuit, as well as the gate signals of semiconductor switches included in the first input circuit, the second input circuit, and the third circuit. The power circuit according to claim 4, wherein the control circuit controls the operation of the third circuit by adjusting at least one of the duty cycle, switching frequency, and phase relationship of the semiconductor switch using the estimated output current.

9. At least one of the first input circuit, the second input circuit, and the third circuit is a gallium nitride (GaN) gate. The power circuit according to claim 3, further comprising a GaN gate driver circuit for preventing the GaN gate from shooting through, wherein the GaN gate driver circuit comprises a level shifter circuit.

10. The power circuit according to claim 9, wherein the level shifter circuit comprises a Zener diode and a capacitor coupled in parallel and in series with a resistor.

11. The power circuit according to claim 2, wherein the third circuit is provided with a parallel inductor on the output side of the transformer to compensate for parasitic capacitance.

12. It is an energy device, A transparent or translucent substrate, A solar cell layer bonded to the substrate, wherein the solar cell layer comprises a plurality of solar cells that receive light through the substrate and convert the energy of the received light into first electrical energy, An energy storage layer coupled to the solar cell layer, wherein the energy storage layer comprises one or more energy storage units for storing a second electrical energy, A converter layer coupled to the solar cell layer and the energy storage layer, which combines the outputs of the solar cell layer and the energy storage layer and outputs electrical energy, An energy device in which the converter layer comprises the power circuit described in any one of claims 1 to 11, and the solar cell layer and the energy storage layer are used as the PV source and the energy storage source, respectively.

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