Power conversion device, temperature estimation device, and temperature estimation method

Abstract

To estimate the temperature of a semiconductor element with a simple structure.SOLUTION: A temperature estimation device includes: a semiconductor device including a semiconductor element with a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire bonded to the second main electrode, a second main terminal electrically connected to the second main electrode through the main wire, an auxiliary wire bonded to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode through the auxiliary wire; a voltage detection unit that detects voltage between the auxiliary terminal and the second main terminal; a current detection unit that detects current flowing between main terminals of the first main terminal and the second main terminal; and an estimation unit that estimates, based on a relation among the voltage in a conduction state between the main terminals, the current in the conduction state, and the temperature of the semiconductor element, the temperature corresponding to the voltage detected in the conduction state by the voltage detection unit and the current in the conduction state detected by the current detection unit.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] This disclosure relates to a power conversion device, a temperature estimation device, and a temperature estimation method. [Background technology]

[0002] Conventionally, a technique is known for accumulating time-series data consisting of pairs of on-voltages between the main terminals of a semiconductor device and the on-currents flowing between the main terminals in that on state, and for estimating the temperature of semiconductor elements within the semiconductor device using the accumulated time-series data (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-195194 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Generally, the on-voltage between the main terminals of a semiconductor device is a very small voltage, ranging from tens to hundreds of millivolts, while the off-voltage between the main terminals is a high voltage of several hundred volts or more. Therefore, in conventional technology, the voltage detection unit that detects the voltage between the main terminals needs to be isolated from the high-voltage off-voltage, which can make the configuration for estimating the temperature of the semiconductor element complex.

[0005] This disclosure provides a power conversion device, a temperature estimation device, and a temperature estimation method that can estimate the temperature of a semiconductor device with a simple configuration. [Means for solving the problem]

[0006] In one aspect of this disclosure, A semiconductor device comprising a semiconductor element having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, A voltage detection unit for detecting the voltage between the auxiliary terminal and the second main terminal, A current detection unit for detecting the current flowing between the main terminals of the first main terminal and the second main terminal, The semiconductor device comprises a control unit for controlling the switching of the semiconductor device, A power conversion device is provided in which the control unit estimates the temperature corresponding to the voltage detected by the voltage detection unit and the current detected by the current detection unit in the energized state, based on the relationship between the voltage and the current in the energized state between the main terminals and the temperature of the semiconductor element.

[0007] In another aspect of this disclosure, A semiconductor device comprising a semiconductor element having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, A voltage detection unit for detecting the voltage between the auxiliary terminal and the second main terminal, A current detection unit for detecting the current flowing between the main terminals of the first main terminal and the second main terminal, A temperature estimation device is provided, comprising an estimation unit that estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage in the energized state between the main terminals, the current in the energized state and the temperature of the semiconductor element.

[0008] In another aspect of this disclosure, A method for estimating the temperature of a semiconductor device having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, comprising: A voltage detection unit detects a voltage between the auxiliary terminal and the second main terminal. A current detection unit detects a current flowing between the first main terminal and the second main terminal. An estimation unit estimates the temperature corresponding to the voltage detected in the energized state by the voltage detection unit and the current detected in the energized state by the current detection unit based on the relationship between the voltage in the energized state between the main terminals, the current in the energized state, and the temperature of the semiconductor element. A temperature estimation method is provided.

Advantages of the Invention

[0009] According to the present disclosure, the temperature of a semiconductor element can be estimated with a simple configuration.

Brief Description of the Drawings

[0010] [Figure 1] It is a diagram showing a configuration example of a power conversion device according to a first embodiment. [Figure 2] It is a plan view showing a configuration example of a semiconductor device according to a first embodiment. [Figure 3] It is a diagram showing a configuration example of a temperature estimation device according to a first embodiment. [Figure 4] It is a timing chart exemplifying waveforms of respective parts accompanying a detection operation of a current Ic in an energized state between both terminals of a semiconductor device. [Figure 5] It is a functional block diagram showing a first example of a overheat determination method. [Figure 6] It is a functional block diagram showing a second example of a overheat determination method.

Modes for Carrying Out the Invention

[0011] The following describes the power conversion device, overheat detection device, and overheat detection method according to this embodiment.

[0012] The adoption of power converters is accelerating in applications requiring high reliability (such as power transmission and distribution equipment, or mobile devices like trains and automobiles). One of the main causes of failure in power converters is semiconductor equipment such as power semiconductor modules. Semiconductor equipment includes semiconductor elements such as power semiconductor chips. Since semiconductor elements fail if their absolute maximum rated temperature is exceeded due to overload or module degradation, estimating and monitoring the temperature of semiconductor elements leads to increased reliability of power converters.

[0013] The power conversion device or temperature estimation device according to this embodiment estimates the temperature of a semiconductor element with a simple configuration. Furthermore, this disclosure provides a temperature estimation method that enables the estimation of the temperature of a semiconductor element with a simple configuration.

[0014] <First Embodiment> Figure 1 is a diagram showing an example configuration of a power converter according to this embodiment. The power converter 200 shown in Figure 1 comprises a main circuit unit 10 that converts DC power supplied from a DC power source 33 into AC power supplied to a load 14, and a control unit 20 that controls the power conversion operation of the main circuit unit 10. Figure 1 illustrates a configuration in which the main circuit unit 10 converts DC power into three-phase AC power.

[0015] The main circuit section 10 includes a plurality of power semiconductor modules 111 to 116, a plurality of voltage detection units VD1 to VD6, a plurality of gate drive units PD1 to PD6, and a current detection unit 30. The power semiconductor modules 111 to 116 are examples of semiconductor devices for power conversion.

[0016] Figure 1 illustrates an IGBT module in a 1-in-1 package, which incorporates an IGBT chip for one arm of an inverter and a diode chip (FWD chip) connected in antiparallel to it, as a power semiconductor module. IGBT is an abbreviation for Insulated Gate Bipolar Transistor, the IGBT chip is an example of a power semiconductor element, and the FWD chip is an example of a rectifier element. However, the package configuration of the power semiconductor module may be other types of package configurations, such as 6-in-1, and the power semiconductor elements configured in the power semiconductor module may be other types of power semiconductor elements, such as MOSFETs. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0017] Multiple power semiconductor modules 111 to 116 may each have the same configuration, multiple voltage detection units VD1 to VD6 may each have the same configuration, and multiple gate drive units PD1 to PD6 may each have the same configuration.

[0018] The u-phase upper arm power semiconductor module 111 has an IGBT chip Q1 and an FWD chip D1. The power semiconductor module 111 also has a collector terminal C, an emitter terminal E, a gate terminal G, and an auxiliary emitter terminal Es. The collector terminal C is an example of a first terminal, the emitter terminal E is an example of a second terminal, the gate terminal G is an example of a control terminal, and the auxiliary emitter terminal Es is an example of an auxiliary terminal.

[0019] The IGBT chip Q1 is an example of a switching element (semiconductor element) having a collector electrode 11c, an emitter electrode 11e, and a gate electrode 11g. The collector electrode 11c is an example of a first main electrode, the emitter electrode 11e is an example of a second main electrode, and the gate electrode 11g is an example of a control electrode.

[0020] The FWD chip D1 is an example of a rectifier element (semiconductor element) having an anode electrode 11a and a cathode electrode 11k.

[0021] The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k. The emitter terminal E is electrically connected to the emitter electrode 11e and the anode electrode 11a. The gate terminal G is electrically connected to the gate electrode 11g. The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e and the anode electrode 11a.

[0022] The u-phase lower arm power semiconductor module 112 has an IGBT chip Q2 and an FWD chip D2. The v-phase upper arm power semiconductor module 113 has an IGBT chip Q3 and an FWD chip D3. The v-phase lower arm power semiconductor module 114 has an IGBT chip Q4 and an FWD chip D4. The w-phase upper arm power semiconductor module 115 has an IGBT chip Q5 and an FWD chip D5. The w-phase lower arm power semiconductor module 116 has an IGBT chip Q6 and an FWD chip D6. Power semiconductor modules 112 to 116 have the same configuration as power semiconductor module 111 described above.

[0023] The gate drive unit PD1 is a circuit that drives the gate electrode 11g of the IGBT chip Q1 according to an on or off switching command S1 supplied from the control unit 20. Similarly, the gate drive units PD2 to PD6 are circuits that drive the gate electrode 11g of the IGBT chips Q2 to Q6 according to on or off switching commands S2 to S6 supplied from the control unit 20, respectively. The gate drive units PD1 to PD6 are drive units that apply a drive voltage to switch the IGBT chips Q1 to Q6 of the power semiconductor modules 111 to 116 between the gate terminal G and the auxiliary emitter terminal Es, according to the switching commands S1 to S6 from the control unit 20.

[0024] Voltage detection circuit VD1 detects the voltage Vee1 between the auxiliary emitter terminal Es and emitter terminal E of power semiconductor module 111 and transmits the detected value of Vee1 to control unit 20. Similarly, voltage detection circuits VD2 to VD6 detect the voltages Vee2 to Vee6 between the auxiliary emitter terminal Es and emitter terminal E of power semiconductor modules 112 to 116 and transmit the detected values ​​of Vee2 to Vee6 to control unit 20.

[0025] The current detection unit 30 is a current sensor that detects the three-phase alternating currents iu, iv, and iw flowing between the power semiconductor modules 111 to 116 and the load 14, and transmits the detected values ​​of the alternating currents iu, iv, and iw to the control unit 20.

[0026] The control unit 20 is a control device that includes, for example, a processor such as a CPU (Central Processing Unit) and memory. The functions of the control unit 20 are realized by the processor operating according to a program stored in memory. The functions of the control unit 20 may also be realized by an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0027] The main circuit unit 10 may also include a heat sink temperature detection unit 80. The heat sink temperature detection unit 80 is a temperature sensor that detects the temperature of a heat sink (e.g., fins, etc.) for cooling the power semiconductor modules 111 to 116 and transmits the detected heat sink temperature Th to the control unit 20.

[0028] Figure 2 is a plan view showing an example of the configuration of a semiconductor device according to the first embodiment. Figure 2 shows, for example, the circuit configuration of one arm of an inverter. In the case of the circuit configuration of the upper arm of the u-phase, the semiconductor device 101 corresponds to, for example, the power semiconductor module 111 described above. Since the circuit configurations of each arm are the same, unless otherwise specified, the upper arm of the u-phase will be used as an example in the following explanation.

[0029] The semiconductor device 101 shown in Figure 2 comprises an insulating substrate 5, a collector terminal E, an emitter terminal E, an auxiliary emitter terminal Es, a gate terminal G, an IGBT chip Q1, an FWD chip D1, and wires 15, 16, 17, 18, and 19.

[0030] The insulating substrate 5 is a substrate on which the IGBT chip Q1 and FWD chip D1 are mounted, and can be, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Blazing) substrate. The insulating substrate 5 is fixed onto a base substrate (not shown) via a bonding material such as solder.

[0031] The insulating substrate 5 includes an insulating layer 5a and a wiring layer 5c. The insulating layer 5a is, for example, a ceramic plate. The wiring layer 5c is provided on the upper surface of the insulating layer 5a and is a conductor layer formed of, for example, a conductive metal such as copper. The wiring layer 5c includes at least one conductor pattern.

[0032] The IGBT chip Q1 is a semiconductor element incorporated into the semiconductor device 101, and is a semiconductor switching element having electrodes on both its front surface 12 and back surface 13. The IGBT chip Q1 may be either a Si semiconductor element or a SiC semiconductor element.

[0033] The IGBT chip Q1 has a front surface 12 on which an emitter electrode 11e and a gate electrode 11g are formed, and a back surface 13 on which a collector electrode 11c is formed. The collector electrode 11c is an example of a first main electrode of the IGBT chip Q1. The emitter electrode 11e is an example of a second main electrode of the IGBT chip Q1. The gate electrode 11g is an example of a control electrode of the IGBT chip Q1. The IGBT chip Q1 is fixed onto the insulating substrate 5 on its back surface 13 by bonding the collector electrode 11c to the conductor pattern of the wiring layer 5c with a bonding material such as solder.

[0034] The FWD chip D1 is a semiconductor element incorporated into the semiconductor device 101, and is a semiconductor diode element having electrodes on both its front surface 8 and back surface 9. The FWD chip D1 may be either a Si semiconductor element or a SiC semiconductor element.

[0035] The FWD chip D1 has a front surface 8 on which the anode electrode 11a is formed, and a back surface 9 on which the cathode electrode 11k is formed. The FWD chip D1 is fixed onto the insulating substrate 5 on the back surface 9 by bonding the cathode electrode 11k to the conductor pattern of the wiring layer 5c with a bonding material such as solder. The cathode electrode 11k is electrically connected to the collector electrode 11c by the conductor pattern of the wiring layer 5c.

[0036] The collector terminal C, emitter terminal E, gate terminal G, and auxiliary emitter terminal Es are external terminals for connecting the semiconductor device 101 to the outside. Each of these external terminals is formed into a cylindrical or flat shape using a conductive metal such as copper or aluminum.

[0037] The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k via wire 19.

[0038] The emitter terminal E is electrically connected to the emitter electrode 11e via wire 15 and to the anode electrode 11a via wire 18.

[0039] The gate terminal G is electrically connected to the gate electrode 11g via wire 17.

[0040] The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e via wire 16.

[0041] Wires 15-19 are bonding wires formed with a diameter of 300-500 μm using conductive metals such as copper and aluminum, or conductive alloys such as iron-aluminum alloy. Wire 15 is one or more (e.g., three) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern of the wiring layer on which the emitter terminal E is provided. Wire 16 is one or more (e.g., one) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern of the wiring layer on which the auxiliary emitter terminal Es is provided. Wire 17 is one or more (e.g., one) linear members that connect the gate electrode 11g, which is the surface electrode of the IGBT chip Q1, to the conductor pattern of the wiring layer on which the gate terminal G is provided. Wire 18 is one or more (e.g., three) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, and the anode electrode 11a, which is the surface electrode of the FWD chip D1. Wire 19 is one or more (e.g., three) linear members that connect the conductor pattern of the wiring layer 5c and the conductor pattern of the wiring layer on which the collector terminal C is provided. Wire 15 is an example of a first wire or main wire. Wire 16 is an example of a second wire or auxiliary wire.

[0042] The current Ic flowing through semiconductor device 101 flows through wires 15, 18, and 19, but not through wires 16 and 17. The current Ic flowing into semiconductor device 101 from collector terminal C flows to collector electrode 11c via the conductor pattern and bonding material of wiring layer 5c and passes through IGBT chip Q1. Then, the current Ic output from emitter electrode e flows to emitter terminal E via wire 15 and the conductor pattern. Conversely, the current Ic flowing into semiconductor device 101 from emitter terminal E flows to anode electrode 11a via the conductor pattern and wires 15 and 18 and passes through FWD chip D1. Then, the current Ic output from cathode electrode 11k flows to collector electrode C via the bonding material, the conductor pattern of wiring layer 5c, and wire 19.

[0043] The IGBT chip Q1 and FWD chip D1 are thermally connected in the following sequence: bonding material, insulating substrate 5, bonding material, base substrate, thermal grease, and heat sink, respectively. Each chip is cooled by heat dissipation from the heat sink into the ambient air.

[0044] It is known that semiconductor device 101 deteriorates due to repeated heat generation caused by the current flowing through each chip and switching. Main areas of deterioration include wire connections between wires and chips or wiring patterns, and solder and other bonding materials beneath the chips. Deterioration of wire connections primarily increases electrical resistance, while deterioration of solder and other bonding materials beneath the chips primarily increases thermal resistance. Thermal grease deteriorates with temperature changes in semiconductor device 101 or heat sink. Deterioration of thermal grease increases thermal resistance. Heat sinks also experience increased thermal resistance due to fin clogging or fan failure.

[0045] Figure 3 shows an example of the configuration of a temperature estimation device according to the first embodiment. The temperature estimation device 301 shown in Figure 3 estimates the temperature of a semiconductor device 101 (in particular, the IGBT chip Q1). Figure 3 shows, for example, the circuit configuration for one arm of an inverter. In the case of the circuit configuration of the upper arm of the u-phase, the semiconductor device 101 corresponds to, for example, the power semiconductor module 111 described above. Since the circuit configurations of each arm are the same, unless otherwise specified, the upper arm of the u-phase will be used as an example in the following explanation. Figure 3 shows the electrical resistance component Rs of the bonding material and wire 19 (see Figure 2) between the collector terminal C and the collector electrode 11c, and the electrical resistance component Ree including the wire 15 (see Figure 2) between the emitter terminal E and the emitter electrode 11e.

[0046] The temperature estimation device 301 shown in Figure 3 comprises a semiconductor device 101, a gate drive unit 40, a voltage detection unit 51, a current detection unit 30 (see Figure 1), and a control unit 21.

[0047] The gate drive unit 40 is a drive unit that applies a drive voltage to switch the IGBT chip Q1 of the semiconductor device 101 between the gate terminal G and the auxiliary emitter terminal Es, in accordance with a switching command S from the control unit 21. The gate drive unit 40 corresponds to, for example, the gate drive unit PD1 described above.

[0048] The voltage detection unit 51 detects the voltage Vee between the auxiliary emitter terminal Es and the emitter terminal E of the semiconductor device 101 and transmits the detected value of Vee to the control unit 21. The voltage detection unit 51 corresponds to, for example, the voltage detection circuit VD1 described above.

[0049] The control unit 21 generates a switching command S based on the detected values ​​of the AC currents iu, iv, and iw obtained from the current detection unit 30 (Figure 1). The control unit 21 estimates the temperature of the IGBT chip Q1 or FWD chip D1 and performs an overheat determination based on the estimated value. The control unit 21 corresponds to, for example, the control unit 20 (Figure 1) described above, but it may be a different control unit from the control unit 20.

[0050] A current Ic flows through the semiconductor device 101. The sign of the current Ic is determined by, for example, whether it flows from the collector terminal C through the IGBT chip Q1 to the emitter terminal E (positive) or from the emitter terminal E through the FWD chip D1 to the collector terminal C (negative). In the case of an inverter, the control unit 21 can determine the direction in which the current Ic is flowing based on the AC currents iu, iv, and iw obtained from the current detection unit 30 (Figure 1) and the state of the switching command (on or off).

[0051] Figure 4 is a timing chart illustrating the waveforms of various parts during the detection operation of current Ic when the semiconductor device is energized between both terminals. In the example shown, iu is a sinusoidal current, and the U-phase voltage command is a sinusoidal voltage. The on and off states of the upper and lower arms of the U-phase are determined by the relative magnitudes of the U-phase voltage command and the carrier wave. In the example shown, the control unit 20 outputs a switching command S1 that turns Q1 on and turns Q2 off during periods when the U-phase voltage command is greater than the carrier wave. On the other hand, the control unit 20 outputs a switching command S1 that turns Q1 off and turns Q2 on during periods when the U-phase voltage command is less than the carrier wave.

[0052] When Q1 is on and iu is positive, the same current as iu flows through Q1. When Q2 is off and iu is negative, the same current as iu flows through D1. For example, the detected voltage Vce1 is transmitted as a discrete value from the voltage detection circuit VD1 to the control unit 20, and the detected current iu is transmitted as a discrete value from the current detection unit 30 to the control unit 20. In the example shown in the figure, the sampling timing for voltage Vce1 and current iu is at the bottom of each carrier wave.

[0053] The control unit 20, for example, samples the detected current iu from the current detection unit 30 at each bottom of the carrier wave. This allows the control unit 20 to obtain the detected current Ic from the current detection unit 30 when the current Ic flows from the collector terminal C to the emitter terminal E into the IGBT chip Q1 (powered state A). The control unit 20 can also obtain the detected current Ic from the current detection unit 30 when the current Ic flows from the emitter terminal E to the collector terminal C into the FWD chip D1 (powered state B).

[0054] Current-on states A and B are conduction states in which the main current (current Ic in this example) flows between the first main terminal and the second main terminal of the semiconductor device. Current-on state A is an example of the first current-on state in which the current from the first main terminal to the second main terminal of the semiconductor device flows through the switching element. Current-on state B is an example of the second current-on state in which the current from the second main terminal to the first main terminal of the semiconductor device flows through the diode.

[0055] However, the method for detecting the current Ic between the main terminals when the IGBT chip or the FWD chip connected in antiparallel to it is ON (powered on) is not limited to this.

[0056] As shown in Figure 3, when the semiconductor device 101 is conducting, a main current (current Ic in this example) flows between the collector terminal C and the emitter terminal E (between the main terminals). When current Ic flows between the main terminals, the voltage drop that occurs between the main terminals of the semiconductor device 101 includes the voltage drop between the collector terminal C and the emitter electrode 11e, and the voltage drop between the emitter electrode 11e and the emitter terminal E.

[0057] The voltage drop between the collector terminal C and the emitter electrode 11e mainly includes the voltage drop across the IGBT chip Q1 and the voltage drop due to the electrical resistance component Rs, which includes the solder and other bonding materials beneath the chip. The voltage drop between the emitter electrode 11e and the emitter terminal E mainly includes the voltage drop due to the electrical resistance component Ree, which includes the wire 15 that electrically connects the emitter electrode 11e and the emitter terminal E.

[0058] The control unit 21 controls Ree, Ree = Vee / Ic ··· (1) It can be calculated by [method].

[0059] Furthermore, the temperature dependence of the resistance of the conductor is, R(T) = R t { 1 + α t (T - t)} ··· (2) R(T): Electrical resistance of a conductor at temperature T. R t : Electrical resistance of a conductor at temperature t T: Any temperature α t : Temperature coefficient of resistance at temperature t It can be defined as follows.

[0060] Similarly to equation (2), the temperature T of the wire (specifically, aluminum wire) w Temperature dependence of wire resistance R Tw teeth, R Tw (Tw) = R 20 { 1 + α 20 ( T w - 20 )} ··· (3) R 20 : Electrical resistance of the wire at 20°C α 20 : Temperature coefficient of resistance of the wire at 20°C (in the case of an aluminum wire, 0.0042) can be defined as follows.

[0061] Here, Tw is the temperature of the wire 15 directly bonded to the IGBT chip Q1. Since the wire 15 is exposed to the heat generated by the IGBT chip Q1, Tw is approximately equal to the temperature of the IGBT chip Q1 (T w ≈ temperature T j ). Furthermore, since R Tw ≈ Ree holds, from Equation (3), R ee (T j ) ≈ R 20 { 1 + α 20 ( T j - 20 )} ··· (4) can be obtained.

[0062] The control unit 21 measures R j (=Vee / Ic) at at least one arbitrary T ee and substitutes it into (4) to derive the remaining unknown R 20 . Note that "R j at at least one arbitrary T ee " may be, for example, the measured value under room temperature conditions before the shipment of the semiconductor device 101.

[0063] When Equation (4) is transformed, an estimation formula for uniquely obtaining Tj from Vee and Ic T j = ( (Vee / Ic ) / R 20 - 1 ) / α 20 + 20 ··· (5) can be obtained.

[0064] Therefore, the control unit 21 can estimate the temperature Tj of the IGBT chip Q1 by substituting the detected values ​​of Vee and Ic at any given time into equation (5). In this way, the voltage detection unit 51 according to this embodiment does not detect Vce, which is a high voltage when the IGBT chip Q1 is off, but rather detects a relatively small Vee whether the IGBT chip Q1 is on or off. This simplifies the configuration of the voltage detection unit 51, and for example, the withstand voltage of the voltage detection unit 51 can be designed to be lower. Thus, the temperature estimation device 301 can estimate the temperature Tj of the IGBT chip Q1 with a simple configuration.

[0065] The control unit 21 may determine that the IGBT chip Q1 is overheating if the estimated temperature Tj,est of the IGBT chip Q1 exceeds a predetermined overheating threshold. This enables overheating protection.

[0066] The control unit 21 determines that the IGBT chip Q1 is overheating if, for example, the estimated value Tj,est of the temperature Tj of the IGBT chip Q1 exceeds a predetermined overheating determination threshold, and issues an alarm to indicate that the IGBT chip Q1 is overheating. The overheating determination threshold is set, for example, to the absolute maximum rated temperature of the IGBT chip Q1. Since the control unit 21 uses the estimated value Tj,est, which is derived with high accuracy based on equation (5), to determine if the IGBT chip Q1 is overheating, it can accurately determine if the IGBT chip Q1 is overheating.

[0067] Furthermore, thermal stress due to temperature changes in Tj is cited as one of the factors contributing to the degradation of the semiconductor device 101. The control unit 21 may have a predefined relational rule (such as a table or calculation formula) that defines the relationship between the temperature change in Tj and the amount of damage. Based on this relational rule, the control unit 21 can derive the amount of damage corresponding to the estimated Tj value and accumulate the derived amount of damage, thereby predicting the lifespan of the IGBT chip Q1 with high accuracy.

[0068] Figure 5 is a functional block diagram showing a first example of an overheating detection method performed by the control unit. The functions shown in Figure 5 may be realized solely by hardware resources such as circuits, or by the cooperation of hardware resources and software. The control unit 21 includes a divider 63, an estimation unit 61, and a determination unit 62.

[0069] The control unit 21 divides the voltage detected by the voltage detection unit 51 in energized state A (Vee,det) by the current detected by the current detection unit 30 in energized state A (Ic,det) using the divider 63. The control unit 21 calculates the resistance value Ree,dat of the electrical resistance component Ree by dividing the voltage detected in energized state A (Vee,det) by the current detected at the same timing as the voltage Vee in energized state A (Ic,det).

[0070] The estimation unit 61 has a relationship (relationship X1) between the electrical resistance component Ree and the temperature Tj of the IGBT chip Q1. Relationship X1 may be defined by a map or an arithmetic formula. The data for defining relationship X1 is stored in memory in advance. The arithmetic formula for defining relationship X1 may be the above formula (5).

[0071] The estimation unit 61 estimates the temperature Tj corresponding to the resistance value Ree,dat of the electrical resistance component Ree, based on the relationship X1. As a result, even during the operation of the semiconductor device 101 where one or both of the voltage Vce and / or current Ic fluctuate, the estimation unit 61 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to any voltage Vce and any current Ic. The estimation unit 61 outputs the estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

[0072] The determination unit 62 determines that the IGBT chip Q1 is overheating if the estimated value Tj,est of the temperature Tj of the IGBT chip Q1 exceeds a predetermined first overheating determination threshold, and issues an alarm to indicate overheating of the IGBT chip Q1. The first overheating determination threshold is set, for example, to the absolute maximum rated temperature of the IGBT chip Q1. Since the determination unit 62 uses the estimated value Tj,est, which is derived with high accuracy by the estimation unit 61 based on the relationship X1, to determine overheating of the IGBT chip Q1, it can accurately determine overheating of the IGBT chip Q1.

[0073] The control unit 21 can prevent failure of the semiconductor device 101 by reducing or stopping the output of the power converter 200 upon the activation of an overheat alarm for the IGBT chip Q1.

[0074] Figure 6 is a functional block diagram showing a second example of an overheating detection method performed by the control unit. The functions shown in Figure 6 may be realized solely by hardware resources such as circuits, or by the cooperation of hardware resources and software. In addition to the configuration of Figure 5 (divider 63, estimation unit 61, and determination unit 62), the control unit 22 includes a temperature estimation unit 65, a resistance estimation unit 66, and a degradation determination unit 67.

[0075] The control unit 22 includes a correction unit (temperature estimation unit 65 and resistance estimation unit 66) that corrects errors in the estimated temperature Tj,est due to the deterioration of the semiconductor device 101, and a diagnosis unit (deterioration determination unit 67) that diagnoses the deterioration of the semiconductor device 101.

[0076] As the deterioration of the wire 15, which is the main deterioration site of the semiconductor device 101, progresses, Ree increases, which becomes a source of error in the estimation of temperature Tj. The control unit 22 updates the data (definition data) for defining the relationship X1 used for temperature estimation in the estimation unit 61 according to the degree of deterioration of the wire 15, etc. of the semiconductor device 101, thereby suppressing errors in the estimated values ​​Tj,est.

[0077] The temperature estimation unit 65 calculates a calculated value Tj,cal of the temperature Tj for error compensation. The temperature estimation unit 65 derives a calculated value Tj,cal of the temperature Tj of the IGBT chip Q1 using the operating conditions of the power converter 200, the thermal resistance of the thermal circuit network, and the temperature detection value Th of the heat sink. The operating conditions include data necessary for calculating the losses of the semiconductor device, such as load current, carrier frequency, DC voltage, and output frequency. The thermal resistance of the thermal circuit network is the thermal resistance Rth(jc) between the chip and the case. The case is a housing that covers the semiconductor device 101 and is fixed in contact with the heat sink via thermal grease.

[0078] Clearly, the following equation holds true: "Semiconductor element temperature Tj = Heat sink temperature Th + Temperature between case and heat sink Tch + Temperature between semiconductor element and case Tcc". Of these, the temperature Tch between the case and heat sink is complex due to the thermal network. Furthermore, if other semiconductor devices are mounted on the same heat sink, the temperature Tch is affected by the heat loss generated by those other semiconductor devices, making it difficult to create an accurate model. On the other hand, the temperature Tcc between the semiconductor element and case can be modeled relatively simply and accurately using the thermal resistance Rth(jc) and loss parameters listed in the datasheet.

[0079] Therefore, under conditions where "Tj ≈ Th + Tcc" can be considered (for example, after the power converter 200 has not been operating for a sufficiently longer period than the time constant of the heat sink), the temperature estimation unit 65 estimates the calculated value Tj,cal of the temperature Tj of the IGBT chip Q1 immediately after the start of operation (a time shorter than the time constant of temperature Th).

[0080] The resistance estimation unit 66 obtains Vee, det, and Ic in the energized state between the main terminals of the semiconductor device 101 when estimating the calculated value Tj_cal, and substitutes Tj = T_cal into equation (4) to obtain the electrical resistance R after degradation of the semiconductor device 101. 20 The resistance estimation unit 66 can calculate (estimate) the electrical resistance R after degradation. 20The estimated value is output. The resistance estimation unit 66 outputs the electrical resistance R, which is one of the data (definition data) used to define the relationship X1 used for temperature estimation in the estimation unit 61. 20 The electrical resistance R after degradation 20 By updating the estimated values, the error in the estimated values ​​Tj,est due to the degradation of the semiconductor device 101 is suppressed.

[0081] The degradation determination unit 67 determines the electrical resistance R after degradation. 20 The estimated value is compared with a predetermined degradation threshold, and the electrical resistance R after degradation is determined. 20 When the estimated value exceeds a predetermined degradation threshold, wire degradation is detected. The predetermined degradation threshold is, for example, the R value before the module's degradation. 20 This is a value equivalent to, and more specifically, it is R20, etc., estimated before product shipment or in the early stages of product operation.

[0082] The degradation determination unit 67 determines the electrical resistance R after degradation. 20 When the estimated value exceeds a predetermined degradation threshold, it is determined that the IGBT chip Q1 has deteriorated, and an alarm is issued to indicate the deterioration of the IGBT chip Q1. The degradation threshold is set, for example, to the absolute maximum rated temperature of the IGBT chip Q1. The degradation determination unit 67 uses the highly accurate derived electrical resistance R after degradation to determine the degradation threshold. 20 Since the estimated value is used for determining overheating of the IGBT chip Q1, overheating of the IGBT chip Q1 can be determined with high accuracy.

[0083] Although embodiments have been described above, the present invention is not limited to the embodiments described above. Various modifications and improvements are possible, such as combinations or substitutions with some or all of the other embodiments.

[0084] For example, the semiconductor element is not limited to power transistors such as IGBTs, but can also be a diode, thyristor, gate turn-off thyristor, triac, etc. [Explanation of symbols]

[0085] 5. Insulating substrate 8 surface 9 Back side 10 Main circuit section 11a Anode electrode 11c collector electrode 11e Emitter electrode 11g gate electrode 11k cathode electrode 12 Surface 13 Back side 14 load 15-19 wires 20, 21, 22 Control Unit 30 Current detection unit 33 Power supply 40 Gate drive unit 51 Voltage detection unit 61 Estimation part 62 Judgment section 101 Semiconductor Equipment 111-116 Power semiconductor modules 200 Power converter 301 Temperature estimation device C Collector terminal E emitter terminal Es Auxiliary Emitter Terminal G gate terminal

Claims

1. A semiconductor device having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, A voltage detection unit for detecting the voltage between the auxiliary terminal and the second main terminal, A current detection unit for detecting the current flowing between the main terminals of the first main terminal and the second main terminal, A control unit for controlling the switching of the semiconductor device, comprising: a control unit that estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage and current in the energized state between the main terminals and the temperature of the semiconductor device, The control unit determines the degradation of the semiconductor element by comparing definition data for defining the relationship with a predetermined degradation determination threshold, and updates the definition data according to the voltage and current in the energized state, in a power conversion device.

2. The power conversion device according to claim 1, wherein the control unit determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold.

3. The power conversion device according to claim 1 or 2, wherein the control unit calculates the temperature in a manner different from the method of estimating the temperature based on the relationship, and calculates the definition data based on the calculated value of the temperature, the voltage in the energized state at the time of the temperature calculation, and the current in the energized state at the time of the temperature calculation.

4. A semiconductor device having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, A voltage detection unit for detecting the voltage between the auxiliary terminal and the second main terminal, A current detection unit for detecting the current flowing between the main terminals of the first main terminal and the second main terminal, An estimation unit estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage, current, and temperature of the semiconductor element in the energized state between the main terminals, The system includes a determination unit that determines the degradation of the semiconductor element by comparing definition data for defining the aforementioned relationship with a predetermined degradation determination threshold, A temperature estimation device that updates the defined data according to the voltage and current under the energized state.

5. A method for estimating the temperature of a semiconductor device having a first main electrode and a second main electrode, a first main terminal electrically connected to the first main electrode, a main wire joined to the second main electrode, a second main terminal electrically connected to the second main electrode via the main wire, an auxiliary wire joined to the second main electrode, and an auxiliary terminal electrically connected to the second main electrode via the auxiliary wire, The voltage detection unit detects the voltage between the auxiliary terminal and the second main terminal. The current detection unit detects the current flowing between the main terminals of the first main terminal and the second main terminal, The estimation unit estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage and current in the energized state between the main terminals and the temperature of the semiconductor element. The determination unit determines the degradation of the semiconductor element by comparing the definition data for defining the relationship with a predetermined degradation determination threshold. A temperature estimation method that updates the defined data according to the voltage and current under the energized state.

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