Multilayer ceramic electronic components and methods for manufacturing multilayer ceramic electronic components

JP7878523B2Active Publication Date: 2026-06-23MURATA MFG CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
MURATA MFG CO LTD
Filing Date
2025-07-16
Publication Date
2026-06-23

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Abstract

To provide a multilayer ceramic electronic component that prevents electrode discontinuities and enables thinning of an internal electrode layer.SOLUTION: The multilayer ceramic electronic component includes a multilayer body having multiple insulating layers containing ceramic and multiple internal electrode layers. The aspect ratio of metal particles constituting the internal electrode layers is 1.8 or greater. According to this multilayer ceramic electronic component, it is possible to prevent the occurrence of electrode discontinuities and thin the internal electrode layers.SELECTED DRAWING: Figure 4
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Claims

1. A method for manufacturing a multilayer ceramic electronic component comprising a laminate having a plurality of insulating layers containing ceramic and a plurality of internal electrode layers, A heat treatment step in which the chips of the laminate are passed through a furnace body set to a temperature of 1200°C to 1600°C for a residence time of 30 seconds or less, After the chip has undergone the aforementioned heat treatment process, a final firing process is performed in which the chip is subjected to a heat treatment at a maximum temperature of 1150°C to 1300°C. A method for manufacturing multilayer ceramic electronic components, comprising at least the following:

2. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein in the main firing step, the heating rate from 900°C to the maximum temperature is 5°C / min or more.

3. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the residence time of the chips in the furnace body during the main firing process is 30 minutes or less.

4. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein in the main firing step, the holding time at the maximum temperature is 200 seconds or less.

5. A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, further comprising a degreasing step with a maximum temperature of 300°C or less before the heat treatment step.

6. A lamination step of producing a laminated block by stacking multiple ceramic green sheets for the insulating layer, each having an internal electrode pattern for forming the internal electrode layer formed on it, A cutting step of cutting the laminated block to obtain a plurality of laminated chips, A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, further comprising:

7. The aspect ratio of the metal particles constituting the internal electrode layer is 1.8 or more and 30 or less. The aforementioned metal particles, when observed by SIM from a 90° angle to the FIB-processed surface of the laminate, which has been processed at a 45° angle to the surface where the internal electrode layer is exposed, refer to each region of the internal electrode layer demarcated by lines. A method for manufacturing a multilayer ceramic electronic component according to claim 1.

8. The thickness T (μm) of the internal electrode layer and the volume V (mm) of the laminate 3 A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, 7, wherein ) satisfies the following relational expression (1). T ≤ 0.0552 × lnV + 0.5239 (1)

9. A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, 7, wherein the internal electrode layer contains at least one element selected from Ni, Cu, Ag, Pd, and Au.

10. The method for manufacturing a multilayer ceramic electronic component according to claim 9, wherein the main component of the internal electrode layer is Ni.

11. A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, 7, wherein the main component of the insulating layer is one of barium titanate, calcium titanate, strontium titanate, barium calcium titanate, or calcium zirconate.