Inaccessible prefix pages while a virtual machine is running.

The described solution addresses the challenge of managing prefix pages in virtual machines by determining accessibility and terminating execution when necessary, ensuring secure and efficient processing within computing environments.

JP7882621B2Active Publication Date: 2026-06-30INTERNATIONAL BUSINESS MACHINE CORPORATION

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
INTERNATIONAL BUSINESS MACHINE CORPORATION
Filing Date
2022-08-25
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

In computing environments, particularly those supporting virtual machines, managing prefix pages is challenging due to their pinning requirements, which complicate memory management and security, especially for secure virtual machines where the hypervisor cannot access guest prefix pages, complicating memory management and making it difficult to keep these pages in memory during execution.

Method used

A computer program product facilitates processing by determining the accessibility of memory regions, such as prefix pages, and terminating virtual machine execution if they are inaccessible, with specific actions based on the type of access and exceptions, using a trusted entity like an ultravisor to manage and secure virtual machine operations.

Benefits of technology

This approach simplifies processing by ensuring secure and efficient management of prefix pages, maintaining security and performance by handling implicit and explicit access, and allowing secure virtual machines to operate without hypervisor interference.

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Abstract

The virtual machine is dispatched and based on the dispatch, a determination is made as to whether a selected region of memory accessible by the virtual machine and expected to be used in communications between the virtual machine and the operating system is accessible by the virtual machine. Based on a determination that the selected region of memory is not accessible by the virtual machine, execution of the virtual machine is terminated along with the selected interception code.
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Description

Technical Field

[0001] One or more aspects are generally related to facilitating processing within a computing environment, and more particularly, to improving such processing.

Background Art

[0002] A computing environment often includes a selected area of memory used by a machine or program to communicate with an operating system. This area of memory may be referred to as a prefix page and, in one example, includes 8K (kilobytes) of memory. The memory is defined as real memory and does not require dynamic translation for access. These pages include a series of defined and allocated storage locations. Each virtual processor within the operating system configuration has a unique prefix value. This prefix value maps the allocated real storage location to an absolute address used only by that processor. Pages of memory can be accessed explicitly or implicitly during program execution. Explicit access occurs as a result of the execution of certain instructions, such as supervisor call instructions or function list storage instructions defined in the z / Architecture(R) instruction set architecture provided by, for example, International Business Machines Corporation. Implicit access occurs due to conditions outside the scope of instruction execution and includes, for example, designed interrupts such as machine checks, external interrupts, input / output (I / O) interrupts, or program interrupts that occur during instruction execution as a side effect of storage or due to the abnormal termination of a transaction.

[0003] For example, if a machine detects a program exception, it stores information about the exception in a prefix page. This information includes the current program status word (PSW) and instruction address (known as the program's old PSW) of the running program, the type of program exception that occurred (program interrupt code), and information about the exception itself, such as the memory address and addressing mode. In addition, the machine retrieves the program status word and instruction address (also known as the program's new PSW) of the software program interrupt handler and uses this to initiate execution of the program interrupt handler in the operating system. After handling the program exception, the operating system restores the program's old PSW and resumes execution of the original program. Furthermore, in one example, when a memory transaction occurs in the guest, the guest's prefix page is also stored along with diagnostic information.

[0004] In computing environments that support virtualization, prefix pages for virtual machines (guests) are mapped to the virtual machines and made accessible by the virtual machines. For virtual machines running as guests of a hypervisor (or host), the guest's prefix pages are accessed as physical pages, but there may be hypervisor translations that provide virtualization at the hypervisor level and map the guest's physical pages to the host's absolute storage.

[0005] In a standard hypervisor implementation, the prefix pages of a virtual machine are known to the hypervisor. The hypervisor is responsible for pinning these pages in memory and keeping their host translations valid for the duration of the guest execution. Pinning virtual machine prefix pages is troublesome for the hypervisor because it makes it difficult to modify the memory management scheme to prevent the guest's prefix pages from being paged out. Running a secure virtual machine further complicates the hypervisor's memory management. In this case, for security reasons, the hypervisor cannot access prefix pages belonging to the secure guest, even if the prefix pages are still mapped from dynamic hardware translations. This prevents an untrusted hypervisor from influencing and accessing the guest's data.

[0006] Processing related to virtual machines, including secure virtual machines, and the use of prefix pages should be made easier. [Overview of the project]

[0007] The provision of computer program products that facilitate processing within a computing environment overcomes the shortcomings of prior art and brings additional advantages. A computer program product includes one or more computer-readable storage media and program instructions collectively stored in one or more computer-readable storage media to execute a method. This method is accessible by virtual machines based on virtual machine dispatch. and the above It is used in communication between the virtual machine and the operating system. andThis includes determining whether a selected region of memory that is expected to be accessible is accessible by the virtual machine. Based on the determination that the selected region of memory is not accessible by the virtual machine, the execution of the virtual machine is terminated with the selected interception code. In this way, processing is simplified by preventing the execution of guest instructions when a selected region of memory that is expected to be accessible is not accessible.

[0008] In one example, one or more guest instructions of the virtual machine are executed based on the determination that a selected region of memory is accessible to the virtual machine.

[0009] In one example, based on the determination that a selected region of memory is accessible, a determination is made regarding the virtual machine's guest instructions whether access to the selected region of memory exists. Based on the determination that access exists, a check is made to determine whether this access is explicit or implicit. Based on whether the access is explicit or implicit, one or more actions are performed.

[0010] A selected region of memory that is expected to be accessible is checked again for accessibility to facilitate processing. One or more embodiments address situations in which the hypervisor is unable to keep a selected region of memory (e.g., prefix pages) of the guest (e.g., a virtual machine) fixed for the duration of the guest's execution.

[0011] For example, based on the fact that access is implicit access, one or more actions may include, for instance, determining the reason for the implicit access and performing one or more selected actions based on the reason for the implicit access.

[0012] In one example, based on the reason for implicit access being an asynchronous interrupt, one or more selected actions include, for example, performing a preliminary test of a selected region of memory and determining whether an exception occurred during the preliminary test of the selected region of memory. For example, based on the determination that an exception occurred during the preliminary test of the selected region of memory, there is an exit that returns to the host of the virtual machine, with the asynchronous interrupt remaining in a pending state in the virtual machine and accompanied by a selected interception code.

[0013] In one example, based on the fact that the reason for implicit access is a program interrupt, one or more selected actions include determining whether the program interrupt is for accessing a selected region of memory, and, based on the determination that the program interrupt is for accessing the selected region of memory, performing a preliminary test of the selected region of memory. In another example, a determination is made as to whether an exception occurred during the preliminary test of the selected region of memory, and based on whether an exception occurred during the preliminary test of the selected region of memory, processing is performed.

[0014] In one example, the process involves continuing instruction processing based on the determination that no exception occurred during a preliminary test of a selected region of memory. In another example, the process involves checking whether the guest instruction is executed as part of a transaction execution based on the determination that an exception occurred during a preliminary test of a selected region of memory. Based on the check indicating that the guest instruction is executed as part of a transaction execution, the virtual machine execution is terminated with a selected interception code and the transaction execution is terminated abnormally. In another example, based on the check indicating that the guest instruction is not executed as part of a transaction execution, the type of exception is determined, and one or more selected actions are performed based on the type of exception.

[0015] For example, based on the type of exception being an invalid or suppression exception, one or more selected actions include disabling a guest instruction. Furthermore, in one example, based on the type of exception being a completion or early-specified exception, one or more selected actions include saving interrupt information to a secure location, locking the virtual machine due to the exception, and terminating the execution of the virtual machine with selected interception code.

[0016] In one example, the next time the virtual machine starts, the virtual machine's locks are checked, and based on the fact that the locks are set, program exception handling is completed.

[0017] The process is made easier by determining the cause / conditions for termination and taking action based on them.

[0018] Computer implementation methods and systems related to one or more embodiments are also described and claimed herein. Furthermore, services related to one or more embodiments may also be described and claimed herein.

[0019] Further features and advantages are realized by the technologies described herein. Other embodiments and aspects are described in detail herein and are considered to be part of the claimed embodiments.

[0020] One or more embodiments are specifically pointed out and expressly claimed as examples in the claims at the end of this specification. The foregoing, as well as the purposes, features, and advantages of one or more embodiments, will become apparent from the following detailed description made in conjunction with the accompanying drawings. [Brief explanation of the drawing]

[0021] [Figure 1] This figure shows one example of a computing environment for using one or more embodiments of the present invention. [Figure 2]A diagram showing an example of a control block used in starting a virtual machine including a secure virtual machine according to one or more aspects of the present invention. [Figure 3A] A diagram showing an example of prefix access processing related to the execution of a virtual machine according to one or more aspects of the present invention. [Figure 3B] A diagram showing an example of prefix access processing related to the execution of a virtual machine according to one or more aspects of the present invention. [Figure 4A] A diagram showing an example of facilitating processing within a computing environment according to one or more aspects of the present invention. [Figure 4B] A diagram showing an example of facilitating processing within a computing environment according to one or more aspects of the present invention. [Figure 4C] A diagram showing an example of facilitating processing within a computing environment according to one or more aspects of the present invention. [Figure 5A] A diagram showing another example of a computing environment for incorporating and using one or more aspects of the present invention. [Figure 5B] A diagram showing further details of the memory of FIG. 5A according to one or more aspects of the present invention. [Figure 6] A diagram showing one embodiment of a cloud computing environment according to one or more aspects of the present invention. [Figure 7] A diagram showing an example of an abstract model layer according to one or more aspects of the present invention.

Best Mode for Carrying Out the Invention

[0022] According to one or more aspects of the present invention, an ability is provided to facilitate processing within a computing environment. As an example, this ability includes selective processing that is executed during the execution of a virtual machine based on the accessibility of a selected area of memory (e.g., a prefix page).

[0023] One embodiment of a computing environment for using one or more aspects of the present invention is described with reference to Figure 1. As an example, the computing environment is based on the z / Architecture(R) instruction set architecture provided by International Business Machines Corporation (Armonk, New York). One embodiment of the z / Architecture instruction set architecture is described in the publication “z / Architecture Principles of Operation,” IBM Publication No. SA22-7832-12, Thirteenth Edition, September 2019, which is incorporated herein by reference in its entirety. However, the z / Architecture instruction set architecture is only one exemplary architecture, and other architectures or other types of computing environments of International Business Machines Corporation or other entities, or both, may include, use, or both, one or more aspects of the present invention. z / Architecture and IBM are trademarks or registered trademarks of International Business Machines Corporation in at least one jurisdiction.

[0024] Referring to Figure 1, in one example, the computing environment 100 includes a central processor complex (CPC) 102. The central processor complex 102 is, for example, an IBM Z(R) server (or other server or machine provided by International Business Machines Corporation or other entity) and includes several components, such as one or more processor units (also called processors) 110 and memory 104 (also called system memory, main memory, primary memory, central memory, or storage) coupled to an input / output (I / O) subsystem 111. Examples of processor units 110 include one or more general-purpose processors (also known as central processors or central processing units (CPUs)) or one or more other processors or both. IBM Z is a trademark or registered trademark of International Business Machines Corporation in at least one jurisdiction.

[0025] The I / O subsystem 111 may be part of the central processing unit complex or it may be separate from the central processing unit complex. The I / O subsystem 111 directs the flow of information between the main memory 104 and the input / output control unit 108 and input / output (I / O) devices 106 which are coupled to the central processing unit complex.

[0026] Many types of I / O devices may be used. One particular type is a data storage device 140. The data storage device 140 can store one or more programs 142, one or more computer-readable program instructions 144, or data, or a combination thereof. The computer-readable program instructions may be configured to perform functions of embodiments of the present invention.

[0027] The central processing unit complex 102 may include, or be coupled to, a removable / non-removable, volatile / non-volatile computer system storage medium, or both. For example, the central processing unit complex 102 may include, or be coupled to, a magnetic disk drive for reading and writing to a non-removable, non-volatile magnetic medium (commonly called a “hard drive”), a removable, non-volatile magnetic disk (e.g., a “floppy disk”), or an optical disk drive for reading or writing to a removable, non-volatile optical disk such as a CD-ROM, DVD-ROM, or other optical medium, or a combination thereof, or both. It should be understood that other hardware components or software components, or both, may be used in conjunction with the central processing unit complex 102. Examples include, but are not limited to, microcode or millicode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archive storage systems.

[0028] Furthermore, the central processing unit complex 102 can be operated in a number of other general-purpose or dedicated computing system environments or configurations. Examples of well-known computing systems, environments, or configurations, or combinations thereof, that may be suitable for use with the central processing unit complex 102 include, but are not limited to, personal computer (PC) systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, microcomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of these systems or devices.

[0029] The central processing unit complex 102 supports virtualization in one or more embodiments, and virtualization support includes, for example, memory 104, one or more virtual machines 112 (also called guests), a virtual machine manager such as a hypervisor 114 that manages the virtual machines, a trusted execution environment 115, and processor firmware 116. One example of a hypervisor 114 is the z / VM(R) hypervisor provided by International Business Machines Corporation (Armonk, New York). A hypervisor is sometimes referred to as a host. z / VM is a trademark or registered trademark of International Business Machines Corporation in at least one jurisdiction.

[0030] In one or more embodiments, the trusted execution environment 115 may be at least partially implemented in hardware or firmware, or both, configured to run processes such as those described herein. The trusted execution environment is trusted firmware (sometimes called an ultravisor) or hardware, or both, that implements memory protection using memory protection hardware. The guest owner can securely pass information to the trusted execution environment (for example, using IBM Secure Execution) by using a public host key embedded in a host key document. To process sensitive information, the trusted execution environment uses a matching private host key. The private host key is unique to the server (e.g., an IBM Z(R) server) and is hardware protected.

[0031] The processor firmware 116 includes, for example, the processor's microcode or millicode. The processor firmware 116 also includes, for example, hardware-level instructions or data structures, or both, used in the implementation of higher-level machine code. In one embodiment, the processor firmware 116 includes, for example, proprietary code that controls the operating system's access to the system's hardware, typically provided as microcode or millicode specific to the underlying hardware, including trusted software.

[0032] The Central Processing Unit's support for virtual machines provides the ability to operate a large number of virtual machines 112, each virtual machine 112 which can run with a different program 120 and execute a guest operating system 122 such as the Linux(R) operating system. Each virtual machine 112 can function as a separate system; that is, each virtual machine can be reset independently, execute a guest operating system, and run with a different program. An operating system or application program running within a virtual machine appears to have access to the entire system, but in reality, only a portion of it is available. While z / VM and Linux are provided as examples, other virtual machine managers and / or operating systems may be used according to one or more aspects of the present invention. The registered trademark Linux(R) is used in accordance with a sublicense from the Linux Foundation (exclusive licensee of Linus Torvalds, the worldwide trademark owner).

[0033] In one embodiment, one or more virtual machines 112 are secure virtual machines. The secure virtual machine is started by a hypervisor (e.g., hypervisor 114) in a manner that prevents the hypervisor from observing the state of the secure virtual machine (e.g., memory, registers, etc.). For example, in one embodiment of sensitive computing, the hypervisor can start / stop the secure virtual machine and can identify where the data used to start the secure virtual machine is located, but cannot see inside the running secure virtual machine. The data used to load / start the secure virtual machine may be encrypted in a manner that prevents the hypervisor from seeing the secure machine. The owner of the secure virtual machine image places sensitive data in secure guest metadata and then generates the secure virtual machine image with the secure guest metadata. After the secure virtual machine is loaded, all information exchange with the state of the secure virtual machine is handled by a trusted execution environment, such as a trusted execution environment 115.

[0034] In one example, referring to Figure 2, to start a secure virtual machine, the hypervisor (e.g., hypervisor 114) issues a virtual machine start instruction 200, such as an interpret execution start instruction, which is executed by a trusted entity (e.g., an ultravisor). For example, the virtual machine start instruction 200 includes an operand that points to a control block (e.g., a non-secure state description 202 that contains the interface between the host (e.g., hypervisor 114) and the virtual machine). For example, the non-secure state description 202 includes a secure indicator 204 that indicates whether the virtual machine being started is a secure virtual machine. For example, if the secure indicator 204 is set to, for example, 1, the virtual machine is a secure virtual machine (if the secure indicator 204 is set to, for example, 0, the virtual machine is a non-secure virtual machine). Furthermore, the non-secure state description 202 includes secure execution identification information 206 and a pointer called a secure state description pointer 210 that points to another control block (secure state description 220). The secure state description 220 contains sensitive data of the secure virtual machine that should not be seen by the hypervisor. In one example, the secure state description 220 also includes a pointer 230 to the non-secure state description 202 (in one example, if the virtual machine being started is a non-secure virtual machine, the secure state description is neither pointed to nor used).

[0035] Based on executing a virtual machine start command for a secure virtual machine, a trusted entity loads the secure virtual machine into hardware, and when the start command completes, the virtual machine is running securely on the hardware. For the duration of execution of a secure or non-secure virtual machine, a selected region of memory (e.g., prefix pages) should be accessible by the virtual machine. That is, the host mapping must be valid, the relevant host absolute address must be obtainable, and the pages must be accessible. However, this cannot be assumed. Therefore, a check is performed during the execution of the virtual machine, and if the selected region of memory is not accessible, a specific action is taken. One embodiment of this process is illustrated with reference to Figures 3A and 3B.

[0036] In one example, referring to Figure 3A, the hypervisor (e.g., hypervisor 114) dispatches a virtual machine (300). Based on this dispatch, in one example, processing is performed by a trusted entity (e.g., an ultravisor). For example, a determination is made as to whether a selected region of memory is expected to be accessible or is actually accessible. In one example, the selected region of memory is a prefix page, and therefore a determination is made as to whether the prefix page is accessible (302). If the prefix page is not accessible, the execution of the virtual machine terminates with a selected intercept code (e.g., code 112) according to an aspect of the present invention (304). However, if the prefix page is accessible, one or more guest instructions of the virtual machine may be executed (306).

[0037] If a prefix page is not accessed during the execution of a guest instruction (for example, if access to the prefix is ​​not required) (308), the guest instruction processing continues. However, if a prefix page is accessed (308), a determination is made (for example, by a trusted entity) as to whether the access is explicit, i.e., whether the access is due to the execution of a particular instruction (310). If the access is explicit, the page is accessed, and if an exception occurs during the page access, the exception is reported (312). However, if the access is implicit (314), a determination is made (for example, by a trusted entity) as to the reason for the access (316).

[0038] If the reason for accessing a prefix page is an asynchronous interrupt (e.g., an I / O interrupt, an external interrupt, etc.) (318), a preliminary test of the prefix page being accessed (e.g., by a trusted entity) is performed (320). If the preliminary test shows an exception (322), the interrupt remains pending in the virtual machine, and there is a virtual machine termination returning to the host with a selected interception code (324). However, if there is no exception from the preliminary test (322), the asynchronous interrupt is presented to the virtual machine (326), and the virtual machine continues to run (328).

[0039] Returning to 316, if the reason for the access is a program interrupt (330), a further determination is made (e.g., by a trusted entity) as to whether the interrupt is for accessing a prefix page (e.g., the interrupt requires access to a prefix) (332). If the interrupt is not for accessing a prefix page, processing proceeds normally (334). However, if the interrupt is for accessing a prefix page (332), a preliminary test of the prefix page to be used is performed (e.g., by a trusted entity) (336). If there are no exceptions during the preliminary test (338), processing proceeds normally (334). However, if there are exceptions during the preliminary test (338), a determination is made (e.g., by a trusted entity) as to whether the instruction is being executed as part of a transaction execution (e.g., between a transaction start instruction and a transaction end instruction) (340). If an instruction is being executed as part of a transaction execution, according to an aspect of the present invention, the virtual machine is terminated with a selected interception code, the transaction is terminated abnormally, and an exception is reported to the host (e.g., the hypervisor) (342).

[0040] On the other hand, if an instruction is not executed as part of a transaction execution (340), referring to Figure 3B, a query is made (for example, by a trusted entity) regarding the type of exception (350). If the type of exception is, for example, invalid or suppressed (352), the guest instruction is invalidated (for example, by a trusted entity) (354), and the virtual machine terminates with the selected intercept code (364). The hypervisor then resolves (366) the prefix page to make it accessible, and the virtual machine is redispatched by the hypervisor (368). Furthermore, if the type of exception is complete (356) or early specified (358), the interrupt information is stored (for example, by a trusted entity) in a storage area (for example, a secure state description in secure mode) (360). This information includes, for example, the program state word / instruction address of the currently running program, the type of program exception (program interrupt code), and information about the exception such as memory address and addressing mode (in other examples, additional information, less information, other information, or a combination thereof may be stored). The virtual machine is locked due to the exception (for example, by a trusted entity) (362), and the execution of the virtual machine is terminated with a selected interception code (364). The hypervisor then resolves the prefix page (366), and the virtual machine is redispatched by the hypervisor (368).

[0041] In one example, returning to Figure 3A, a determination is made (e.g., by a trusted entity) as to whether the virtual machine is locked due to an exception (370), based on redispatching the virtual machine. If the virtual machine is not locked due to an exception, processing continues execution of the guest instruction (306). However, if the virtual machine is locked due to an exception, the program exception that was saved before the end of the selected interception is presented to the operating system (e.g., by a trusted entity), and the operating system handles this program exception as usual (372). Processing may then proceed, for example, to "an interrupt requires access to a prefix" (332).

[0042] In the example above, the virtual machine is a secure virtual machine, but in other embodiments, one or more embodiments may be applied to a non-secure virtual machine.

[0043] According to one or more aspects of the present invention, prefix page checking and processing are performed while a virtual machine (e.g., a secure virtual machine) is running. Access by the virtual machine to prefix pages (or other selected areas of memory used for communication between the virtual machine and the operating system) may be explicit or implicit. Explicit access to prefix pages while a guest is running is handled like any other memory access. For example, the virtual machine accesses a prefix page as physical memory, and if the page cannot be accessed, a host program exception is reported. Implicit access is more difficult to manage because it can occur at any time during guest dispatch. During implicit access to these pages, a trusted entity (e.g., an ultravisor) tests the accessibility of the pages. If these pages are not accessible, the ultravisor checks the reason for the implicit access. Depending on the reason, the ultravisor terminates with a selected interception code (e.g., 112) indicating to the hypervisor that the guest's prefix pages are inaccessible, and decides whether to revoke the unit of operation from the guest (e.g., invalidate instructions) before returning to the host (e.g., the hypervisor), or to capture the virtual machine state and save it to the ultravisor's secure storage and lock the virtual machine. After terminating the virtual machine, the hypervisor makes one or more pages accessible to the guest and re-dispatches the guest. During the re-dispatch of the virtual machine (e.g., interpret execution start), the trusted entity checks whether the virtual machine is locked, and if so, presents the interrupts saved as part of the guest state before termination, along with the selected interception code. These interrupts are then handled by the operating system, and finally, the guest execution resumes.

[0044] In one or more embodiments, the ability is provided to handle the case where a virtual machine's prefix page is determined to be inaccessible when accessed while the virtual machine is running. If the prefix is ​​inaccessible, a trusted entity (e.g., an ultravisor) is used, if applicable, to save the state of the virtual machine, including any pending interrupts, and to inform the hypervisor via selected intercept code that the prefix is ​​no longer accessible. In one example, the hypervisor then converts the prefix page from insecure to secure and dispatches the virtual machine again. In another example, the hypervisor maps the guest's prefix page within the hypervisor's virtual storage. During the execution of the virtual machine startup, the ultravisor then checks the accessibility of the prefix and completes the work that the virtual machine was supposed to perform before the termination of the selected intercept code.

[0045] In one or more instances, a selected interception code (e.g., 112) occurs while the guest is in an uninterruptible position. For example, if the guest experiences a completed exception (e.g., overflow, program event logging, etc.), the guest updates guest storage or guest registers, or both. However, in one example, the guest cannot present an interrupt because the prefix is ​​inaccessible and therefore cannot simply terminate and return to the hypervisor. Thus, the trusted entity in this case stores information about the program exception in secure storage, locks the guest, and terminates. Other examples where the guest cannot simply terminate when the prefix is ​​inaccessible, and therefore the trusted entity performs a specific action, include abnormal termination of a transaction and the runtime instrumentation sample. Other examples may exist.

[0046] One or more aspects of the present invention are closely related to computer technology and facilitate processing within computers, thereby improving their performance. Processing is facilitated by managing access to prefix pages by virtual machines (e.g., secure virtual machines) while maintaining security and improving performance.

[0047] Since the processing within the computing environment is related to one or more aspects of the present invention, further details of one embodiment that facilitates such processing will be described with reference to Figures 4A to 4C.

[0048] Referring to Figure 4A, in one embodiment, based on the dispatch of the virtual machine, a determination is made as to whether a selected region of memory that is accessible by the virtual machine and is expected to be used in communication between the virtual machine and the operating system is accessible by the virtual machine (400). Based on the determination that the selected region of memory is not accessible by the virtual machine, the execution of the virtual machine is terminated with a selected interception code (402).

[0049] In this way, processing is facilitated by preventing the execution of guest instructions when a selected region of memory that is expected to be accessible is not accessible. One or more embodiments address situations in which the hypervisor is unable to keep a selected region of memory (e.g., prefix pages) of the guest (e.g., a virtual machine) fixed for the duration of the guest's execution.

[0050] Furthermore, in one example, one or more guest instructions of the virtual machine are executed (404) based on the determination that a selected region of memory is accessible by the virtual machine.

[0051] In one example, based on the determination that a selected region of memory is accessible, a determination is made as to whether there is access to the selected region of memory with respect to the virtual machine's guest instructions (406). Based on the determination that there is access, a check is made as to whether this access is explicit or implicit (408). Based on whether the access is explicit or implicit, one or more actions are performed (410).

[0052] Selected memory regions that are expected to be accessible are checked again for accessibility to facilitate processing.

[0053] For example, based on the fact that access is implicit access (412), one or more actions include, for example, determining the reason for implicit access (414), and performing one or more selected actions based on the reason for implicit access (416).

[0054] In one example, referring to Figure 4B, based on the fact that the reason for implicit access is an asynchronous interrupt (420), one or more selected actions include, for example, performing a preliminary test of a selected region of memory (422) and determining whether an exception occurred during the preliminary test of the selected region of memory (424). For example, based on the determination that an exception occurred during the preliminary test of the selected region of memory, there is an exit that returns to the host of the virtual machine with the asynchronous interrupt remaining in a pending state and a selected interception code (426).

[0055] In one example, based on the fact that the reason for implicit access is a program interrupt (430), one or more selected actions include, for example, determining whether the program interrupt is for accessing a selected region of memory (432), and, based on the determination that the program interrupt is for accessing a selected region of memory, performing a preliminary test of the selected region of memory (434). In one example, a determination is made as to whether an exception occurred during the preliminary test of the selected region of memory (436), and, based on whether an exception occurred during the preliminary test of the selected region of memory, processing is performed (438).

[0056] In one example, referring to Figure 4C, the process involves continuing instruction processing based on the determination that no exception occurred during a preliminary test of a selected region of memory (440). In another example, the process involves checking whether the guest instruction is executed as part of a transaction execution based on the determination that an exception occurred during a preliminary test of a selected region of memory (442). Based on the check indicating that the guest instruction is executed as part of a transaction execution, in one example, the execution of the virtual machine is terminated with a selected interception code and the transaction execution is terminated abnormally (444). In another example, based on the check indicating that the guest instruction is not executed as part of a transaction execution, the type of exception is determined, and one or more selected actions are performed based on the type of exception (446).

[0057] For example, based on the type of exception being an invalid or suppression exception, one or more selected actions include disabling a guest instruction (448). In addition, in one example, based on the type of exception being a completion or early-specified exception (450), one or more selected actions include saving interrupt information to a secure location (452), locking the virtual machine due to the exception (454), and terminating the execution of the virtual machine with selected intercept code (456).

[0058] In one example, at the next startup of the virtual machine, the virtual machine's locks are checked (458), and program exception handling is completed based on the fact that the locks are set by locking (460).

[0059] The process is made easier by determining the cause / conditions for termination and taking action based on them.

[0060] Other variations and embodiments are possible.

[0061] Aspects of the present invention may be used in many types of computing environments. Another embodiment of a computing environment for using one or more aspects of the present invention is described with reference to Figure 5A. In this example, the computing environment 36 includes, for example, one or more native central processing units (CPUs) 37, memory 38, and one or more input / output devices or interfaces 39, coupled to each other via one or more buses 40 or other connections or both. For example, the computing environment 36 may include a PowerPC(R) processor provided by International Business Machines Corporation (Armonk, New York), an HP Superdome with an Intel(R) Itanium(R) II processor provided by Hewlett-Packard Corporation (Palo Alto, California), or other machines or combinations based on architectures provided by International Business Machines Corporation, Hewlett-Packard Corporation, Intel Corporation, Oracle Corporation, or other companies, or a combination thereof. PowerPC is a trademark or registered trademark of International Business Machines Corporation in at least one jurisdiction. Intel and Itanium are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

[0062] The native central processing unit 37 includes one or more native registers 41, such as one or more general-purpose registers or one or more dedicated registers or both, used during processing within the environment. These registers contain information representing the state of the environment at any particular point in time.

[0063] Furthermore, the native central processing unit 37 executes instructions and code stored in memory 38. In one particular example, the central processing unit executes emulator code 42 stored in memory 38. This code allows a computing environment configured on one architecture to emulate another architecture. For example, the emulator code 42 allows machines based on architectures other than the z / Architecture instruction set architecture (such as PowerPC processors and HP Superdome servers) to emulate the z / Architecture instruction set architecture and execute software and instructions developed based on the z / Architecture instruction set architecture.

[0064] Further details relating to the emulator code 42 are explained with reference to Figure 5B. The guest instructions 43 stored in memory 38 include software instructions developed to run on architectures other than the architecture of the native CPU 37 (e.g., those that interact with machine instructions). For example, the guest instructions 43 may be designed to run on a processor based on the z / Architecture instruction set architecture, but instead are emulated on the native CPU 37, which may be, for example, an Intel Itanium II processor. In one example, the emulator code 42 includes an instruction fetch routine 44 for retrieving one or more guest instructions 43 from memory 38 and for optionally providing local buffering of the retrieved instructions. The emulator code 42 also includes an instruction translation routine 45 for determining the type of guest instruction retrieved and for translating the guest instruction into one or more corresponding native instructions 46. This translation includes, for example, identifying the function performed by the guest instruction and selecting a native instruction to perform that function.

[0065] Furthermore, the emulator code 42 includes an emulation control routine 47 for triggering the execution of a native instruction. The emulation control routine 47 may cause the native CPU 37 to execute a native instruction routine that emulates one or more already obtained guest instructions, and upon completion of such execution, return control to the instruction fetch routine to emulate the acquisition of the next guest instruction or group of guest instructions. The execution of the native instruction 46 may include reading data from memory 38 into a register, storing data back into memory from the register, or performing some kind of arithmetic or logical operation as determined by the translation routine.

[0066] For example, each routine is implemented in software stored in memory and executed by the native central processing unit 37. In other examples, one or more routines or operations are implemented in firmware, hardware, software, or any combination thereof. Registers of the emulated processor may be emulated by using the registers 41 of the native CPU or by using locations in memory 38. In embodiments, the guest instruction 43, the native instruction 46, and the emulator code 42 may reside in the same memory or be distributed across different memory devices.

[0067] Instructions that can be emulated include guest instructions described herein in accordance with one or more aspects of the present invention. Furthermore, other instructions, commands, functions, operations, calls, or one or more aspects of the present invention, or combinations thereof, may be emulated in accordance with one or more aspects of the present invention.

[0068] The computing environments described herein are merely examples of available computing environments. Other environments may be used, including, but not limited to, undivided environments, divided environments, cloud environments, or emulated environments, or combinations thereof, and embodiments are not limited to any one of these environments. Various examples of computing environments are described herein, but one or more embodiments of the present invention may be used with many types of environments. The computing environments provided herein are merely examples.

[0069] Each computing environment can be configured to include one or more embodiments of the present invention.

[0070] One or more embodiments may relate to cloud computing.

[0071] While this disclosure includes a detailed description of cloud computing, it should be understood that implementations of the contents enumerated herein are not limited to cloud computing environments. Embodiments of the present invention may be implemented in combination with any other type of computing environment that is currently known or may be developed in the future.

[0072] Cloud computing is a service delivery model that enables convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services), allowing these resources to be provisioned and released quickly with minimal administrative effort or interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0073] The features are as follows:

[0074] On-demand self-service: Cloud users can unilaterally and automatically provision computing power, such as server time and network storage, as needed, without requiring human interaction with service providers.

[0075] Broad network access: The capability is available over the network and accessible through standard mechanisms, facilitating use by heterogeneous thin-client or thick-client platforms (e.g., mobile phones, laptops, and PDAs).

[0076] Resource Pooling: A provider's computing resources are pooled and delivered to multiple users using a multi-tenant model, with various physical and virtual resources dynamically allocated and reallocated as needed. There is a sense of location independence, and users typically have neither control nor know the exact location of the resources provided, although at a higher level of abstraction, they may be able to specify a location (e.g., country, state, or data center).

[0077] Rapid Adaptability: Capabilities can be provisioned quickly and flexibly, sometimes automatically, scale out rapidly, and be released quickly to scale in rapidly. The capacity available for provisioning often appears to the user as if they can purchase any amount at any time without limit.

[0078] Measured Services: Cloud systems leverage metering capabilities to automatically control and optimize resource usage at an appropriate level of abstraction for each type of service (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency to both service providers and users.

[0079] The service model is as follows:

[0080] Software as a Service (SaaS): The ability provided to the user is the use of a provider's applications running on a cloud infrastructure. These applications can be accessed from various client devices via thin-client interfaces such as web browsers (e.g., web-based email). Users do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or individual application functions, except for the possibility of making limited user-specific application configuration settings.

[0081] Platform as a Service (PaaS): The ability provided to the user is to deploy applications created or acquired by the user, written using programming languages ​​and tools supported by the provider, onto a cloud infrastructure. The user does not manage or control the underlying cloud infrastructure, including the network, servers, operating system, or storage, but can control the configuration of the deployed application and, in some cases, the application hosting environment.

[0082] Infrastructure as a Service (IaaS): The capability provided to users is the provisioning of processing, storage, networking, and other basic computing resources, allowing users to deploy and run any software, including operating systems and applications. Users do not manage or control the underlying cloud infrastructure, but they can control the operating system, storage, and deployed applications, and in some cases, have limited control over selected network components (e.g., host firewalls).

[0083] The deployment model is as follows:

[0084] Private Cloud: This cloud infrastructure is operated solely for the organization. It can be managed by this organization or a third party and can reside on-premises or off-premises.

[0085] Community Cloud: This cloud infrastructure is shared by multiple organizations and supports specific communities that share common interests (e.g., missions, security requirements, policies, and compliance considerations). It can be managed by these organizations or third parties and can reside on-premises or off-premises.

[0086] Public Cloud: This cloud infrastructure is available for use by general users or large industry groups and is owned by the organization that sells the cloud service.

[0087] Hybrid Cloud: This cloud infrastructure is a combination of two or more clouds (private, community, or public) that are joined together while retaining their own distinct entities, through standardized or proprietary technologies that enable the portability of data and applications (e.g., cloud bursting to adjust load balancing between clouds).

[0088] Cloud computing environments are service-oriented environments that emphasize statelessness, low coupling, modularity, and semantic interoperability. At the heart of cloud computing is the infrastructure, which includes a network of interconnected nodes.

[0089] Referring now to Figure 6, an exemplary cloud computing environment 50 is shown. As illustrated, the cloud computing environment 50 includes one or more cloud computing nodes 52 that can communicate with local computing devices used by cloud users (e.g., a personal digital assistant (PDA) or mobile phone 54A, a desktop computer 54B, a laptop computer 54C, or an automotive computer system 54N, or a combination thereof). The nodes 52 may communicate with each other. The nodes 52 may be physically or virtually grouped within one or more networks into a private cloud, community cloud, public cloud, or hybrid cloud, or a combination thereof, as described herein (not shown). This allows the cloud computing environment 50 to provide infrastructure, platforms, or software, or a combination thereof, as a service, without requiring cloud users to maintain resources on their local computing devices. The types of computing devices 54A-N shown in Figure 10 are intended for illustrative purposes only, and it is understood that the computing node 52 and the cloud computing environment 50 can communicate with any type of computer-controlled device via any type of network or network-addressable connection (e.g., a connection using a web browser) or both.

[0090] Referring now to Figure 7, a set of functional abstraction layers provided by the cloud computing environment 50 (Figure 6) is shown. It should be understood in advance that the components, layers, and functions shown in Figure 7 are intended for illustrative purposes only, and embodiments of the present invention are not limited thereto. As illustrated, the following layers and corresponding functions are provided:

[0091] The hardware and software layer 60 includes hardware components and software components. Examples of hardware components include a mainframe 61, RISC (Reduced Instruction Set Computer) architecture-based servers 62, 63, blade servers 64, storage devices 65, and networks and network components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0092] The virtualization layer 70 includes an abstraction layer that can provide virtual entities such as virtual servers 71, virtual storage 72, virtual networks 73 including virtual private networks, virtual applications and operating systems 74, and virtual clients 75.

[0093] In one example, the management layer 80 may provide the functions described below. Resource provisioning 81 dynamically procures computing and other resources used to perform tasks within the cloud computing environment. Measurement and pricing 82 tracks the costs of using resources within the cloud computing environment and sends invoices or bills for the use of those resources. In one example, those resources may include application software licenses. Security verifies the identities of cloud users and tasks and protects data and other resources. The user portal 83 provides users and system administrators with access to the cloud computing environment. Service level management 84 allocates and manages cloud computing resources to meet required service levels. Service Level Agreement (SLA) planning and execution 85 prepares and procures cloud computing resources in advance of anticipated future demands in accordance with the SLA.

[0094] Workload Layer 90 provides examples of capabilities available in a cloud computing environment. Examples of workloads and capabilities that may be provided from this layer include mapping and navigation 91, software development and lifecycle management 92, virtual classroom education delivery 93, data analysis processing 94, transaction processing 95, and memory selection area (e.g., prefix page) management processing 96.

[0095] Aspects of the present invention may be systems, methods, or computer program products, or combinations thereof, at any possible level of technical detail of integration. A computer program product may include one or more computer-readable storage media containing computer-readable program instructions for causing a processor to perform aspects of the present invention.

[0096] A computer-readable storage medium can be a tangible device capable of holding and storing instructions for use by an instruction execution device. A computer-readable storage medium may be, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exclusive list of further specific examples of computer-readable storage media includes portable floppy disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM) or flash memory, static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disks (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or grooved structures on which instructions are recorded, and any appropriate combination thereof. When used herein, computer-readable storage media should not be interpreted as transient signals in themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmitting media (e.g., light pulses passing through fiber optic cables), or electrical signals transmitted through wires.

[0097] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to each computing device / processing device, or to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof). This network may include copper transmission cables, optical transmission fibers, wireless transmitters, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface within each computing device / processing device receives computer-readable program instructions from the network and transfers those computer-readable program instructions for storage on a computer-readable storage medium within each computing device / processing device.

[0098] The computer-readable program instructions for performing the operation of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk(R) and C++, and procedural programming languages ​​such as the C programming language or similar programming languages. The computer-readable program instructions may be executed as a whole on the user's computer, partially as a standalone software package on the user's computer, partially on the user's computer and a remote computer, respectively, or as a whole on a remote computer or a server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (for example, via the Internet using an Internet service provider). In some embodiments, to carry out aspects of the present invention, electronic circuits including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs) may be customized by executing computer-readable program instructions using state information of computer-readable program instructions.

[0099] Aspects of the present invention will be described herein by reference to flowcharts or block diagrams, or both, of methods, apparatuses (systems), and computer program products, according to embodiments of the present invention. It will be understood that each block in a flowchart or block diagram, or both, and any combination of blocks contained in a flowchart or block diagram, or both, can be implemented by computer-readable program instructions.

[0100] These computer-readable program instructions may be provided to a computer or other programmable data processing device processor to create a machine, so that instructions executed via the processor of the computer or other programmable data processing device may create means to perform functions / operations specified in one or more blocks of a flowchart or block diagram or both. These computer-readable program instructions may be stored on a computer-readable storage medium containing instructions that include a product containing instructions to perform modes of functions / operations specified in one or more blocks of a flowchart or block diagram or both, and may be used to instruct a computer, a programmable data processing device, or other device, or a combination thereof, to function in a particular manner.

[0101] Computer-readable program instructions may be read into a computer, another programmable data processing device, or other device so that instructions executed on a computer, another programmable device, or other device perform functions / operations specified in one or more blocks of a flowchart or block diagram, or both, thereby causing a series of operable steps to be executed on a computer, another programmable device, or other device that generates a computer implementation process.

[0102] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of instructions comprising one or more executable instructions for implementing a defined logical function. In some alternative implementations, the functions shown in the blocks may occur in an order different from the order shown in the figures. For example, two consecutively shown blocks may actually be implemented as a single step, executed simultaneously, executed substantially simultaneously in a way that partially or completely overlaps in time, or possibly executed in reverse order, depending on the functions they contain. Note also that each block in the block diagram or flowchart diagram, or both, and any combination of blocks contained in the block diagram or flowchart diagram, or both, may be implemented by a dedicated hardware-based system that performs a defined function or operation, or a combination of dedicated hardware and computer instructions.

[0103] In addition to the above, one or more aspects may be provided, presented, deployed, managed, or serviced by a service provider that provides management of the customer's environment. For example, a service provider may create, maintain, and support computer code or computer infrastructure, or both, that runs one or more aspects for one or more customers. In return, the service provider may receive payment from the customer, for example, in accordance with a subscription or fee agreement, or both. As an additional or alternative, the service provider may receive payment from the sale of advertising content to one or more third parties.

[0104] In one aspect, an application may be deployed to perform one or more embodiments. As one example, the deployment of an application may include providing a computer infrastructure that functions to perform one or more embodiments.

[0105] In a further embodiment, a computing infrastructure may be deployed that includes integrating computer-readable code into a computing system, such that the code combined with the computing system can execute one or more embodiments.

[0106] In a further embodiment, a process for integrating a computing infrastructure may be provided, which includes integrating computer-readable code into a computer system. The computer system comprises a computer-readable medium, the computer medium including one or more embodiments. The code combined with the computer system can perform one or more embodiments.

[0107] Although various embodiments have been described above, these are merely examples. For example, computing environments of other architectures may be used to incorporate one or more embodiments, to use one or more embodiments, or both. Furthermore, various instructions, commands, functions, calls, or actions, or combinations thereof, may be used. Furthermore, various actions may be performed. Many variations are possible.

[0108] Various embodiments are described herein. Furthermore, many modifications are possible without departing from the spirit of the embodiments of the present invention. It should be noted that each embodiment or feature and its variations described herein can be combined with any other embodiment or feature, in particular, as long as they do not contradict each other.

[0109] Furthermore, other types of computing environments can benefit and be used. For example, a data processing system could be used that includes at least two processors, directly or indirectly coupled to memory elements via a system bus, suitable for storing, executing, or both program code. These memory elements include, for example, local memory used during the actual execution of program code, bulk storage, and cache memory for temporarily storing at least some program code to reduce the number of times the code must be retrieved from bulk storage during execution.

[0110] Input / output devices or I / O devices (including, but not limited to, keyboards, displays, pointing devices, DASDs, tapes, CDs, DVDs, thumb drives, and other storage media) may be coupled to the system directly or through an intermediary I / O controller. Network adapters may be coupled to the system, enabling data processing systems to be coupled to other data processing systems or remote printers or storage devices through an intermediary private or public network. Modems, cable modems, and Ethernet(R) cards are just a few of the types of network adapters that can be used.

[0111] The terms used herein are intended solely to describe specific embodiments and are not intended to be limiting. Where used herein, the singular forms “a,” “an,” and “the” are intended to include the plural form unless otherwise explicitly indicated in the context. It will be further understood that the terms “equipped with” or “possessing” or both, as used herein, indicate the presence of a described function, integer, step, operation, element, or component, or a combination thereof, but do not exclude the presence or addition of one or more other functions, integers, steps, operations, elements, components, or groups thereof, or combinations thereof.

[0112] All means or steps and functional elements within the following claims, along with their corresponding structures, materials, actions, and equivalents, are intended to include, if any, any structures, materials, or actions for performing a function in combination with other claimed elements, when specifically claimed. Descriptions of one or more embodiments are presented for illustrative and explanatory purposes, but are not intended to be exhaustive and are not limited to the disclosed forms. Many modifications and variations will be apparent to those skilled in the art. Embodiments have been selected and described to best illustrate various aspects and practical applications, and to enable others skilled in the art to understand the diverse embodiments with various modifications suitable for a particular intended use.

Claims

1. A method of having a computer perform actions to facilitate processing within a computing environment, Based on the dispatch of the virtual machine, it is determined whether a selected region of memory that is expected to be accessible by the virtual machine and used in communication between the virtual machine and the operating system is accessible by the virtual machine. Based on the determination that the selected region of memory is inaccessible to the virtual machine, the execution of the virtual machine is terminated with the selected intercept code. Includes, Based on the determination that the selected region of the memory is accessible, the method With respect to the guest instructions of the virtual machine, it is determined whether or not there is access to the selected region of memory, Based on the determination that access exists, check whether such access is explicit or implicit, Performing one or more actions based on whether the access is the explicit access or the implicit access. Further including, method.

2. The method according to claim 1, further comprising executing one or more guest instructions of the virtual machine based on the determination that a selected area of ​​the memory is accessible by the virtual machine.

3. Based on the fact that the access is implicit access, one or more of the actions, Determining the reason for the aforementioned implicit access, Performing one or more selected actions based on the aforementioned reasons for the implicit access The method according to claim 1, including the method described in claim 1.

4. Based on the reason for the implicit access being an asynchronous interrupt, the one or more selected actions Perform a preliminary test on the selected area of ​​the memory, To determine whether an exception occurred during the preliminary test of the selected memory region, Based on the determination that the exception occurred during the preliminary test of the selected memory region, the virtual machine keeps the asynchronous interrupt pending, terminates with the selected interception code, and returns to the host of the virtual machine. The method according to claim 3, including the method described in claim 3.

5. Based on the reason for the implicit access being a program interrupt, one or more selected actions may be performed. Determining whether the program interrupt is for accessing the selected region of memory, Based on the determination that the program interrupt is for accessing the selected region of memory, a preliminary test of the selected region of memory is performed. To determine whether an exception occurred during the preliminary test of the selected memory region, The process is to be executed based on whether the exception occurred during the preliminary test of the selected memory region. The method according to claim 3, including the method described in claim 3.

6. The method according to claim 5, wherein the execution of the process is carried out based on the determination that no exception occurred during the preliminary test of the selected region of memory, and the instruction processing is continued.

7. The execution of the aforementioned process is based on the determination that the exception occurred during the preliminary test of the selected memory region. The check is performed to determine whether the aforementioned guest instruction is executed as part of a transaction execution, Based on the check indicating that the guest instruction is executed as part of a transaction execution, the execution of the virtual machine is terminated with the selected interception code, and the transaction execution is terminated abnormally. The method according to claim 5, including the method described in claim 5.

8. The execution of the aforementioned process is based on the determination that the exception occurred during the preliminary test of the selected memory region. The check is performed to determine whether the aforementioned guest instruction is executed as part of a transaction execution, The type of exception is determined based on the fact that the check indicates that the guest instruction is not executed as part of transaction execution. Based on the type of the aforementioned exception, one or more selected actions are performed. The method according to claim 5, including the method described in claim 5.

9. The method according to claim 8, wherein the one or more selected actions include invalidating the guest instruction based on the type of the exception being an invalid exception or a suppression exception.

10. Based on the type of the exception being a completion exception or an early-specified exception, the one or more selected actions are: Storing interrupt information in a secure location, Locking the aforementioned virtual machine due to an exception, Terminate the execution of the virtual machine with the selected intercept code. The method according to claim 8, including the method described in claim 8.

11. The method described above is At the next startup of the said virtual machine, the lock of the said virtual machine is checked, By locking the aforementioned lock, program exception handling is completed based on the fact that the lock is set. The method according to claim 10, further comprising:

12. A method for causing a computer to execute, Running a virtual machine within a computing environment, wherein the virtual machine is able to access a selected region of memory within the computing environment, and the selected region of memory is used for communication between the virtual machine and the operating system within the computing environment; The execution of a guest instruction of the virtual machine by the virtual machine based on a selected region of the accessible memory, wherein the selected region of memory is accessed as an implicit access based on the execution of the guest instruction, and the execution occurs under conditions that the implicit access to the selected region of memory occurs outside the scope of the instruction execution of the virtual machine. During the implicit access, the execution of the virtual machine is terminated with selected intercept code, at least based on the occurrence of an exception during a preliminary test of the accessibility of the selected region of memory for the guest instruction, Methods that include...

13. A method for causing a computer to execute, The execution of a virtual machine start command for initiating the execution of a virtual machine within a computing environment by a trusted execution environment within the computing environment, wherein the virtual machine is made able to access a selected region of memory within the computing environment, and the selected region of memory is used for communication between the virtual machine and the operating system within the computing environment. Controlling the execution of the virtual machine by the trusted execution environment, and controlling the execution of the virtual machine based on implicit access to a selected region of memory during the execution of the guest instructions of the virtual machine, including terminating the execution of the virtual machine with selected interception code based on the fact that the selected region of memory that is expected to be accessible to the virtual machine is not accessible to the virtual machine, wherein the selected region of memory is not accessible to the virtual machine based on an exception that occurred during a preliminary test of the accessibility of the selected region of memory during the implicit access, and the implicit access to the selected region of memory is caused by conditions that occurred outside the scope of the instruction execution of the virtual machine. Methods that include...

14. A method for causing a computer to execute, The process of starting a virtual machine by executing a virtual machine start command within a computing environment, wherein the virtual machine is able to access a selected area of ​​memory within the computing environment. Terminating the execution of the virtual machine, along with selected intercept code, based on implicit access to the selected region of memory during the execution of a guest instruction of the virtual machine, where the selected region of memory is inaccessible to the virtual machine based on an exception occurring during a preliminary test of the accessibility of the selected region of memory that occurs during the implicit access, and where the implicit access to the selected region of memory occurs outside the scope of the instruction execution of the virtual machine. Methods that include...

15. A computer system for facilitating processing within a computing environment, wherein the computer system is Memory and A computer system comprising at least one processor communicating with the memory, wherein the computer system is configured to perform the method described in any one of claims 1 to 14.

16. A computer program that facilitates processing within a computing environment, which causes a computer to perform the method described in any one of claims 1 to 14.