Semiconductor device

Abstract

This semiconductor device comprises: two switching semiconductor elements; a first conductor that electrically connects between second electrodes of each of the two semiconductor elements; a second conductor that electrically connects between the two electrodes; and a first power terminal that is electrically connected to the first conductor and has continuity with the second electrode of each semiconductor element. The two semiconductor elements are connected in parallel. There is a first conduction path that passes through the first conductor and a second conduction path that passes through the second conductor between the two electrodes of each of the two semiconductor elements. At least a portion of the first conduction path and the second conduction path are in parallel. The combined inductance of the first conduction path inductance and the second conduction path inductance is smaller than the first conduction path inductance.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices including power semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. In such semiconductor devices, a configuration in which multiple power semiconductor elements are connected in parallel to ensure the allowable current of the semiconductor device is known (see, for example, Patent Document 1). The configuration (power module) described in Patent Document 1 includes multiple first semiconductor elements, multiple first connection wirings, a wiring layer, and a signal terminal. The multiple first semiconductor elements are, for example, MOSFETs. Each first semiconductor element is turned on and off in response to a drive signal input to a gate terminal. The multiple first semiconductor elements are connected in parallel. The multiple first connection wirings are, for example, wires, and connect the gate terminals of the multiple first semiconductor elements to the wiring layer. The wiring layer is connected to a signal terminal. The signal terminal is connected to the gate terminal of each first semiconductor element via the wiring layer and each first connection wiring. The signal terminal supplies a drive signal for driving each first semiconductor element to the gate terminal of each first semiconductor element.

[0003] JP 2016-225493 A

[0004] When multiple semiconductor elements are connected in parallel for use, as in Patent Document 1, a resonance phenomenon may occur when each semiconductor element is switched (on / off driven). This resonance phenomenon may cause the drive signals of the multiple semiconductor elements to oscillate, which may cause malfunction or destruction of each semiconductor element.

[0005] The present disclosure has been devised in view of the above circumstances, and one object of the present disclosure is to provide a semiconductor device that can suppress the resonance phenomenon that occurs when multiple semiconductor elements are operated in parallel.

[0006] The semiconductor device disclosed herein includes two first semiconductor elements, each having a first electrode, a second electrode, and a third electrode, and whose switching operation is controlled in response to a first drive signal input to the third electrode; a first conductor electrically connecting the second electrodes of the two first semiconductor elements; a second conductor electrically connecting the second electrodes of the two first semiconductor elements; and a first power terminal electrically connected to the first conductor and conducting to the second electrodes of the two first semiconductor elements. The two first semiconductor elements are electrically connected in parallel. Between the second electrodes of the two first semiconductor elements, there is a first conduction path passing through the first conductor and a second conduction path passing through the second conductor. The first conduction path and the second conduction path are at least partially in a parallel relationship. A combined inductance of the inductance of the first conduction path and the inductance of the second conduction path is smaller than the inductance of the first conduction path.

[0007] According to the above configuration of the present disclosure, the resonance phenomenon can be suppressed in the semiconductor device.

[0008] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment. FIG. 2 is a perspective view of FIG. 1 with a portion of the case (top plate) and a resin member omitted. FIG. 3 is a plan view of the semiconductor device according to the first embodiment. FIG. 4 is a plan view of FIG. 3 with a portion of the case (top plate) and a resin member omitted. FIG. 5 is a partially enlarged view of a portion (right half) of FIG. 4. FIG. 6 is a partially enlarged view of a portion (left half) of FIG. 4. FIG. 7 is a front view of the semiconductor device according to the first embodiment. FIG. 8 is a bottom view of the semiconductor device according to the first embodiment. FIG. 9 is a cross-sectional view taken along line IX-IX of FIG. 4. FIG. 10 is a cross-sectional view taken along line X-X of FIG. 4. FIG. 11 is a cross-sectional view taken along line XI-XI of FIG. 4. FIG. 12 is a cross-sectional view taken along line XII-XII of FIG. 4. FIG. 13 is a cross-sectional view taken along line XIII-XIII of FIG. 4. FIG. 14 is a plan view showing a semiconductor device according to a second embodiment, with a portion of the case (top plate) and the resin member omitted. FIG. 15 is a partially enlarged view of FIG. 14. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 14. FIG. 17 is a plan view showing a semiconductor device according to a first modified example of the second embodiment, with a portion of the case (top plate) and the resin member omitted. FIG. 18 is a perspective view showing a semiconductor device according to a second modified example of the second embodiment. FIG. 19 is a view showing the perspective view of FIG. 18 with the sealing member omitted. FIG. 20 is a plan view showing a semiconductor device according to a second modified example of the second embodiment, with the sealing member indicated by an imaginary line (chain double-dashed line). FIG. 21 is a view showing the plan view of FIG. 20 with some connecting members and the sealing member omitted. FIG. 22 is a plan view showing a semiconductor device according to a third embodiment, with a portion of the case (top plate) and the resin member omitted. Fig. 23 is an enlarged cross-sectional view of a main portion taken along line XXIII-XXIII in Fig. 22. Fig. 24 is an enlarged cross-sectional view of a main portion taken along line XXIV-XXIV in Fig. 22. Fig. 25 is an enlarged cross-sectional view of a main portion taken along line XXV-XXV in Fig. 22. Fig. 26 is a perspective view showing a semiconductor device according to a third embodiment. Fig. 27 is a plan view showing a semiconductor device according to the third embodiment, in which a sealing member is indicated by an imaginary line (two-dot chain line). Fig. 28 is a cross-sectional view taken along line XXVIII-XXVIII in Fig. 27.Fig. 29 is a plan view showing a first switching unit according to a modified example. Fig. 30 is a cross-sectional view taken along line XXX-XXX in Fig. 29. Fig. 31 is a cross-sectional view taken along line XXXI-XXXI in Fig. 29. Fig. 32 is a plan view showing a semiconductor device according to a fourth embodiment, with part of the case (top plate) and the resin member omitted.

[0009] Preferred embodiments of the semiconductor device of the present disclosure will be described below with reference to the drawings. Hereinafter, identical or similar components will be designated by the same reference numerals, and redundant explanations will be omitted. Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not intended to necessarily assign any order to their objects.

[0010] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on (an) object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on (an) object B" includes "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "when viewed from a certain direction, an object A overlaps an object B" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."

[0011] 1 to 13 show a semiconductor device A1 according to a first embodiment. The semiconductor device A1 includes a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 21, an insulating substrate 30, a plurality of power wiring portions 311, 312, and 313, a plurality of signal wiring portions 321A, 321B, 322A, 322B, and 323, a plurality of power terminals 41, 42, and 43, a plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47, a plurality of connecting members, a heat sink 60, a case 61, and a resin member 65. The semiconductor device A1 includes a plurality of connecting members 51A, 51B, 52A, 52B, 531A, 531B, 532A, 532B, 541A, 541B, 542A, 542B, 55, and 56 as the connecting members. As will be understood from the configuration described in detail later, semiconductor device A1 includes power wiring section 311 as an example of a "first wiring section," power wiring section 313 as an example of a "second wiring section," and power wiring section 312 as an example of a "third wiring section." Semiconductor device A1 also includes power terminal 43 as an example of a "first power terminal," power terminal 42 as an example of a "second power terminal," and power terminal 41 as an example of a "third power terminal." Semiconductor device A1 also includes connecting member 51A as an example of a "first connecting member," connecting member 52A as an example of a "second connecting member," and connecting member 51B as an example of a "third connecting member."

[0012] For ease of explanation, the thickness direction of the first semiconductor element 11 is referred to as the "thickness direction z." Furthermore, in the following explanation, "plan view" refers to the view along the thickness direction z. A direction perpendicular to the thickness direction z is referred to as the "first direction x." The first direction x is, for example, the left-right direction in the plan view of the semiconductor device A1 (see FIG. 3). The direction perpendicular to the thickness direction z and the first direction x is referred to as the "second direction y." The second direction y is, for example, the up-down direction in the plan view of the semiconductor device A1 (see FIG. 3).

[0013] The first semiconductor elements 11 and the second semiconductor elements 21 are each, for example, a metal-insulator-semiconductor field-effect transistor (MOSFET). Instead of a MOSFET, the first semiconductor elements 11 and the second semiconductor elements 21 may each be other switching elements, such as a field-effect transistor including a metal-insulator-semiconductor field-effect transistor (MISFET) or a bipolar transistor including an IGBT. The first semiconductor elements 11 and the second semiconductor elements 21 are each made of silicon carbide (SiC). The semiconductor material is not limited to SiC, and may be silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (GaO), or the like.

[0014] 9 and 13, each of the multiple first semiconductor elements 11 has a first element main surface 11a and a first element back surface 11b. The first element main surface 11a and the first element back surface 11b are spaced apart from each other in the thickness direction z. The first element main surface 11a faces one side (upward) in the thickness direction z, and the first element back surface 11b faces the other side (downward) in the thickness direction z.

[0015] Each of the multiple first semiconductor elements 11 has a first electrode 111, a second electrode 112, and a third electrode 113, as shown in Figures 5, 6, 9, and 13. In an example in which each first semiconductor element 11 is a MOSFET, the first electrode 111 is a drain, the second electrode 112 is a source, and the third electrode 113 is a gate. In each first semiconductor element 11, the first electrode 111 is disposed on the first element back surface 11b, as shown in Figures 9 and 13, and the second electrode 112 and the third electrode 113 are disposed on the first element main surface 11a, as can be seen from Figures 5, 6, 9, and 13.

[0016] A first drive signal (e.g., gate voltage) is input to the third electrode 113 (gate) of each of the multiple first semiconductor elements 11. Each of the multiple first semiconductor elements 11 switches between a conductive state and a cutoff state in response to the input first drive signal. This switching between the conductive state and the cutoff state is called a switching operation. In the conductive state, current flows from the first electrode 111 (drain) to the second electrode 112 (source), and in the cutoff state, this current does not flow. In other words, in each first semiconductor element 11, the first electrode 111 (drain) and the second electrode 112 (source) are turned on and off by the first drive signal (e.g., gate voltage) input to the third electrode 113 (gate). The switching frequency of each first semiconductor element 11 depends on the frequency of the first drive signal.

[0017] The first electrodes 111 (drains) of the multiple first semiconductor elements 11 are electrically connected to each other and the second electrodes 112 (sources) of the multiple first semiconductor elements 11 are electrically connected to each other by a configuration described in detail later. As a result, the multiple first semiconductor elements 11 are electrically connected in parallel. The semiconductor device A1 inputs a common first drive signal to the multiple first semiconductor elements 11 connected in parallel, causing the multiple first semiconductor elements 11 to operate in parallel.

[0018] 2, 4, and 9, the plurality of first semiconductor elements 11 are arranged in the first direction x. Each first semiconductor element 11 is bonded to the power wiring portion 311 via a conductive bonding material. The conductive bonding material is, for example, solder, a metal paste material, or a sintered metal.

[0019] 10 and 13, each of the multiple second semiconductor elements 21 has a second element main surface 21a and a second element back surface 21b. The second element main surface 21a and the second element back surface 21b are spaced apart from each other in the thickness direction z. The second element main surface 21a faces one side (upward) in the thickness direction z, and the second element back surface 21b faces the other side (downward) in the thickness direction z.

[0020] As shown in Figures 5, 6, 10, and 13, each of the multiple second semiconductor elements 21 has a fourth electrode 211, a fifth electrode 212, and a sixth electrode 213. In an example in which each second semiconductor element 21 is a MOSFET, the fourth electrode 211 is a drain, the fifth electrode 212 is a source, and the sixth electrode 213 is a gate. In each second semiconductor element 21, the fourth electrode 211 is arranged on the second element back surface 21b as shown in Figures 10 and 13, and the fifth electrode 212 and the sixth electrode 213 are arranged on the second element main surface 21a, as can be seen from Figures 5, 6, 10, and 13.

[0021] A second drive signal (e.g., gate voltage) is input to the sixth electrode 213 (gate) of each of the multiple second semiconductor elements 21. Each of the multiple second semiconductor elements 21 switches between a conductive state and a cutoff state in response to the input second drive signal. In the conductive state, current flows from the fourth electrode 211 (drain) to the fifth electrode 212 (source), and in the cutoff state, this current does not flow. That is, in each second semiconductor element 21, the on / off state between the fourth electrode 211 (drain) and the fifth electrode 212 (source) is controlled by the second drive signal (e.g., gate voltage) input to the sixth electrode 213 (gate). The switching frequency of each second semiconductor element 21 depends on the frequency of the second drive signal.

[0022] The second semiconductor elements 21 are electrically connected at their fourth electrodes 211 (drains) and at their fifth electrodes 212 (sources) by a configuration described in detail below. This electrically connects the second semiconductor elements 21 in parallel. The semiconductor device A1 inputs a common second drive signal to the second semiconductor elements 21 connected in parallel, causing the second semiconductor elements 21 to operate in parallel.

[0023] 2, 4, and 10, the plurality of second semiconductor elements 21 are arranged in the first direction x. Each second semiconductor element 21 is bonded to the power wiring portion 313 via a conductive bonding material. The conductive bonding material is, for example, solder, a metal paste material, or a sintered metal.

[0024] The heat sink 60 is, for example, a flat plate having a rectangular shape in a plan view. The heat sink 60 is made of a material with high thermal conductivity, such as copper or a copper alloy. The surface of the heat sink 60 may be Ni-plated. If necessary, a cooling member (for example, a heat sink) is attached to the lower surface of the heat sink 60 in the thickness direction z. As shown in FIGS. 9, 10, and 13, the insulating substrate 30 is placed on the heat sink 60.

[0025] As can be seen from Figures 1 to 4, 9, 10, and 13, the case 61 is, for example, a rectangular parallelepiped. The case 61 is made of a synthetic resin that has electrical insulation properties and excellent heat resistance, such as PPS (polyphenylene sulfide). In a plan view, the case 61 has a rectangular shape that is approximately the same size as the heat sink 60. As shown in Figures 1 to 4 and 7 to 13, the case 61 includes a frame portion 62, a top plate 63, and a plurality of terminal blocks 641 to 644.

[0026] The frame 62 is fixed to the upper surface of the heat sink 60 in the thickness direction z. The top plate 63 is fixed to the frame 62. As shown in FIGS. 1 , 3 , 9 , 10 , and 13 , the top plate 63 closes the opening of the frame 62 on the upper side in the thickness direction z. As shown in FIGS. 9 , 10 , and 13 , the top plate 63 faces the heat sink 60, which closes the lower side of the frame 62 in the thickness direction z. The top plate 63, the heat sink 60, and the frame 62 define a circuit accommodating space (a space that accommodates a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 21, etc.) inside the case 61. Hereinafter, this circuit accommodating space may be referred to as the inside of the case 61.

[0027] The two terminal blocks 641, 642 are arranged on one side of the frame portion 62 in the first direction x and are formed integrally with the frame portion 62. The two terminal blocks 643, 644 are arranged on the other side of the frame portion 62 in the first direction x and are formed integrally with the frame portion 62. The two terminal blocks 641, 642 are arranged along the second direction y on the side wall of the frame portion 62 on one side in the first direction x. The terminal block 641 covers a portion of the power terminal 41, and a portion of the power terminal 41 is arranged on the upper surface in the thickness direction z. The terminal block 642 covers a portion of the power terminal 42, and a portion of the power terminal 42 is arranged on the upper surface in the thickness direction z. The two terminal blocks 643, 644 are arranged along the second direction y on the side wall of the frame portion 62 on the other side in the first direction x. The terminal block 643 covers a portion of one of the two power terminals 43, and this portion of the power terminal 43 is disposed on the upper surface in the thickness direction z. The terminal block 644 covers a portion of the other of the two power terminals 43, and this portion of the power terminal 43 is disposed on the upper surface in the thickness direction z.

[0028] As shown in FIGS. 9, 10, and 13, the resin member 65 fills the area (the circuit accommodating space) surrounded by the top plate 63, the heat sink 60, and the frame portion 62. The resin member 65 covers the first semiconductor elements 11, the second semiconductor elements 21, and the like. The resin member 65 is made of, for example, black epoxy resin. The resin member 65 may be made of other insulating materials such as silicone gel instead of epoxy resin. The semiconductor device A1 is not limited to a configuration that includes the resin member 65, and may not include the resin member 65.

[0029] The insulating substrate 30 has electrical insulation properties. The insulating substrate 30 is made of, for example, ceramics with excellent thermal conductivity. Examples of such ceramics include AlN (aluminum nitride), SiN (silicon nitride), and Al2O3 (aluminum oxide). The insulating substrate 30 is, for example, in the shape of a flat plate.

[0030] As shown in Figures 9, 10, and 13, the insulating substrate 30 has a main surface 30a and a back surface 30b. The main surface 30a and the back surface 30b are spaced apart in the thickness direction z. The main surface 30a faces one side (upward) in the thickness direction z, and the back surface 30b faces the other side (downward) in the thickness direction z. The multiple first semiconductor elements 11 and the multiple second semiconductor elements 21 are each disposed on the main surface 30a. The back surface 30b faces the heat sink 60.

[0031] As shown in Figures 4, 9, 10, and 13, the multiple power wiring sections 311-313 and the multiple signal wiring sections 321A, 321B, 322A, 322B, and 323 are formed on the main surface 30a of the insulating substrate 30. The multiple power wiring sections 311-313 and the multiple signal wiring sections 321A, 321B, 322A, 322B, and 323 are each, for example, a metal layer. This metal layer is made of, for example, copper or a copper alloy, but may be made of aluminum or an aluminum alloy instead of copper or a copper alloy. The multiple power wiring sections 311-313 and the multiple signal wiring sections 321A, 321B, 322A, 322B, and 323 are spaced apart from one another.

[0032] The plurality of power wiring sections 311, 312, and 313 form a conduction path for the main current in the semiconductor device A1.

[0033] The power wiring portion 311 is electrically connected to each of the first electrodes 111 (drains) of the multiple first semiconductor elements 11. The power wiring portion 311 is electrically connected to the power terminals 41. The power wiring portion 311 includes two pad portions 311a, 311b and an extending portion 311c. The two pad portions 311a, 311b and the extending portion 311c are connected to each other and formed integrally.

[0034] As shown in FIGS. 4 to 6, 9, and 13, the pad portion 311a is bonded to a plurality of first semiconductor elements 11 and is electrically connected to each of the first electrodes 111 (drains) of the plurality of first semiconductor elements 11. The pad portion 311a extends from the pad portion 311b in the first direction x. In a plan view, the pad portion 311a is, for example, strip-shaped with the first direction x as its longitudinal direction. The plurality of first semiconductor elements 11 are arranged on the pad portion 311a in the first direction x.

[0035] 4, 5, and 9, the power terminal 41 is joined to the pad portion 311b. In a plan view, the pad portion 311b has a strip shape with its longitudinal direction aligned in the second direction y. The pad portion 311b is connected to an edge of the pad portion 311a on one side in the first direction x (the side where the power terminal 41 is located).

[0036] 4 and 6, the extension portion 311c extends in the second direction y from the end of the pad portion 311a on the other side in the first direction x (the side opposite to the side on which the power terminal 41 is located). In the example shown in Figures 4 and 6, the extension portion 311c is located between the power wiring portion 312 (pad portion 312b described below) and the two signal wiring portions 321A and 322A in a plan view.

[0037] The power wiring portion 312 is electrically connected to the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21. The power wiring portion 312 is electrically connected to the power terminals 42. The power wiring portion 312 includes two pad portions 312a and 312b. The two pad portions 312a and 312b are connected to each other and formed integrally.

[0038] 5, 6, and 13, the pad portion 312a is joined to a plurality of connection members 51B and is electrically connected to the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21 via the plurality of connection members 51B. The pad portion 312a extends from the pad portion 312b in the first direction x. In a plan view, the pad portion 312a has, for example, a strip shape with the first direction x as its longitudinal direction. The pad portion 312a is located on the other side of the pad portion 311a in the second direction y (the lower side in FIG. 4), and is formed parallel (or approximately parallel) to the pad portion 311a.

[0039] 4 and 5, a slit 312s is formed in the pad portion 312a. In a plan view, the slit 312s extends in the first direction x from an edge of the pad portion 312a on one side in the first direction x (the side on which the pad portion 312b is located). The tip of the slit 312s is located in the center of the pad portion 312a in the first direction x.

[0040] As shown in Figures 4, 5, and 10, the pad portion 312b is joined to the power terminal 42. In a plan view, the pad portion 312b is strip-shaped with its longitudinal direction aligned in the second direction y. The pad portion 312b is connected to an edge of the pad portion 312a on one side in the first direction x (the side on which the power terminal 42 is located). The pad portion 312b is located on the other side in the second direction y (the lower side in Figure 4) of the pad portion 311b.

[0041] The power wiring portion 313 is electrically connected to the second electrodes 112 (sources) of the multiple first semiconductor elements 11, and is also electrically connected to the fourth electrodes 211 (drains) of the multiple second semiconductor elements 21. The power wiring portion 313 is electrically connected to two power terminals 43. The power wiring portion 313 includes two pad portions 313a, 313b. The two pad portions 313a, 313b are connected to each other and formed integrally.

[0042] As shown in FIGS. 5, 6, and 13, the pad portion 313a has a plurality of connection members 51A bonded thereto and is electrically connected to the second electrodes 112 (sources) of the plurality of first semiconductor elements 11 via the plurality of connection members 51A. As shown in FIGS. 4 to 6, 10, and 13, the pad portion 313a has a plurality of second semiconductor elements 21 bonded thereto and is electrically connected to the fourth electrodes 211 (drains) of the plurality of second semiconductor elements 21. The pad portion 313a extends from the pad portion 313b in the first direction x. In a plan view, the pad portion 313a has, for example, a strip shape with the first direction x as its longitudinal direction. The plurality of second semiconductor elements 21 are arranged on the pad portion 313a in the first direction x. The pad portion 313a is located between the pad portion 311a and the pad portion 312a in the second direction y, and is formed parallel (or approximately parallel) to the pad portion 311a and the pad portion 312a.

[0043] 4, 6, 9, and 10, two power terminals 43 are joined to the pad portion 313b. In a plan view, the pad portion 313b has a strip shape with its longitudinal direction aligned in the second direction y. The pad portion 313b is connected to the edge of the pad portion 313a on the other side in the first direction x (the side where each power terminal 43 is located).

[0044] As shown in FIGS. 4 to 6 , the signal wiring portion 321A is joined to a plurality of connection members 531A and is electrically connected to the respective third electrodes 113 (gates) of the plurality of first semiconductor elements 11 via the plurality of connection members 531A. The signal wiring portion 321A transmits a first drive signal. As shown in FIGS. 4 to 6 , the signal wiring portion 321B is joined to a plurality of connection members 531B and is electrically connected to the respective sixth electrodes 213 (gates) of the plurality of second semiconductor elements 21 via the plurality of connection members 531B. The signal wiring portion 321B transmits a second drive signal. As shown in FIGS. 4 to 6 , the signal wiring portion 321A and the signal wiring portion 321B are located on opposite sides of the pad portions 311a, 312a, and 313a in the second direction y. The signal wiring portion 321A is located on the opposite side of the pad portion 313a with respect to the pad portion 311a in the second direction y. The signal wiring portion 321B is located on the opposite side of the pad portion 312a from the pad portion 313a in the second direction y.

[0045] As shown in FIGS. 4 to 6 , the signal wiring portion 322A is joined to a plurality of connection members 541A and is electrically connected to the second electrodes 112 (sources) of the plurality of first semiconductor elements 11 via the plurality of connection members 541A. The signal wiring portion 322A transmits a first detection signal. The first detection signal is an electrical signal indicating the electrical continuity of each first semiconductor element 11, and is, for example, a voltage signal corresponding to the current (source current) flowing through each second electrode 112 (source). As shown in FIGS. 4 to 6 , the signal wiring portion 322B is joined to a plurality of connection members 541B and is electrically connected to the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21 via the plurality of connection members 541B. The signal wiring portion 322B transmits a second detection signal. The second detection signal is an electrical signal indicating the electrical continuity of each second semiconductor element 21, and is, for example, a voltage signal corresponding to the current (source current) flowing through each fifth electrode 212 (source). 4 to 6, the signal wiring portion 322A and the signal wiring portion 322B are located on opposite sides of the pad portions 311a, 312a, and 313a in the second direction y. The signal wiring portion 322A is located on the same side as the signal wiring portion 321A with respect to the pad portion 311a in the second direction y. The signal wiring portion 322B is located on the same side as the signal wiring portion 321B with respect to the pad portion 312a in the second direction y.

[0046] As shown in FIGS. 4 and 5 , the pair of signal wiring portions 323 are spaced apart from each other in the second direction y. For example, a thermistor 91 is bonded to each of the pair of signal wiring portions 323. The thermistor 91 is disposed across the pair of signal wiring portions 323. In an example different from the semiconductor device A1, the thermistor 91 does not have to be bonded to the pair of signal wiring portions 323. As shown in FIGS. 4 and 5 , the pair of signal wiring portions 323 are located near the corners of the insulating substrate 30. The pair of signal wiring portions 323 are located between the pad portion 311a and the two signal wiring portions 321A, 322A in the first direction x.

[0047] 1 and 3, a portion of each of the plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47 is exposed from the case 61. The constituent material of each of the plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47 is, for example, copper or a copper alloy, but may be other metals.

[0048] 4, 5, and 9, the power terminal 41 is joined to the power wiring portion 311 inside the case 61. The power terminal 41 is electrically connected to each of the first electrodes 111 (drains) of the plurality of first semiconductor elements 11 via the power wiring portion 311.

[0049] 4, 5, and 10, the power terminal 42 is joined to the power wiring portion 312 inside the case 61. The power terminal 42 is electrically connected to each of the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21 via the power wiring portion 312.

[0050] 4, 6, 9, and 10, the two power terminals 43 are each joined to the power wiring portion 313 inside the case 61. The two power terminals 43 are each electrically connected to the second electrodes 112 (sources) of the multiple first semiconductor elements 11 and to the fourth electrodes 211 (drains) of the multiple second semiconductor elements 21 via the power wiring portion 313.

[0051] The power terminals 41 and 42 are connected to a power source and receive a power supply voltage (e.g., a DC voltage). For example, the power terminal 41 is a positive terminal (P terminal), and the power terminal 42 is a negative terminal (N terminal). The power terminals 41 and 42 are spaced apart from each other and arranged along the second direction y. The two power terminals 43 output voltages (e.g., AC voltages) converted by the switching operations of the first semiconductor elements 11 and the second semiconductor elements 21. Each of the two power terminals 43 is a power output terminal (OUT terminal). The two power terminals 43 are spaced apart from each other and arranged along the second direction y. The power terminals 41 and 42 and the two power terminals 43 are arranged on opposite sides of the insulating substrate 30 in the first direction x. In a configuration different from that of the semiconductor device A1, the number of power terminals 43 may be one instead of two. In this case, one power terminal 43 may be disposed at the center in the second direction y of one side wall of the frame portion 62 on one side in the first direction x. The main current in the semiconductor device A1 is generated by the power supply voltage and the converted voltage.

[0052] 6 , a connecting member 532A is joined to the signal terminal 44A. The signal terminal 44A is electrically connected to the signal wiring portion 321A via the connecting member 532A. Since the signal wiring portion 321A is electrically connected to each of the third electrodes 113 (gates) of the multiple first semiconductor elements 11, the signal terminal 44A is electrically connected to each of the third electrodes 113 (gates) of the multiple first semiconductor elements 11. The signal terminal 44A is an input terminal for a first drive signal.

[0053] 5, a connecting member 532B is joined to the signal terminal 44B. The signal terminal 44B is electrically connected to the signal wiring portion 321B via the connecting member 532B. Since the signal wiring portion 321B is electrically connected to each of the sixth electrodes 213 (gates) of the plurality of second semiconductor elements 21, the signal terminal 44B is electrically connected to each of the sixth electrodes 213 (gates) of the plurality of second semiconductor elements 21. The signal terminal 44B is an input terminal for a second drive signal.

[0054] 6 , a connecting member 542A is joined to the signal terminal 45A. The signal terminal 45A is electrically connected to the signal wiring portion 322A via the connecting member 542A. Since the signal wiring portion 322A is electrically connected to each of the second electrodes 112 (sources) of the multiple first semiconductor elements 11, the signal terminal 45A is electrically connected to each of the second electrodes 112 (sources) of the multiple first semiconductor elements 11. The signal terminal 45A is an output terminal for the first detection signal.

[0055] 5, a connecting member 542B is joined to the signal terminal 45B. The signal terminal 45B is electrically connected to the signal wiring portion 322B via the connecting member 542B. Since the signal wiring portion 322B is electrically connected to each of the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21, the signal terminal 45B is electrically connected to each of the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21. The signal terminal 45B is an output terminal for the second detection signal.

[0056] 5, a pair of connecting members 55 are respectively joined to the pair of signal terminals 46. The pair of signal terminals 46 are electrically connected to the pair of signal wiring portions 323 via the pair of connecting members 55. As a result, the pair of signal terminals 46 are electrically connected to the thermistor 91. The pair of signal terminals 46 are terminals for detecting the temperature inside the case 61. When the thermistor 91 is not joined to the pair of signal wiring portions 323, the pair of signal terminals 46 are non-connected terminals.

[0057] As shown in FIG. 6 , a connection member 56 is joined to the signal terminal 47. The signal terminal 47 is electrically connected to the power wiring portion 311 via the connection member 56. As a result, the signal terminal 47 is electrically connected to each of the first electrodes 111 (drains) of the multiple first semiconductor elements 11. The signal terminal 47 is an output terminal for a third detection signal. The third detection signal is a signal for detecting the voltage applied to the power wiring portion 311.

[0058] Each of the plurality of connection members 51A, 51B, 52A, 52B, 531A, 531B, 532A, 532B, 541A, 541B, 542A, 542B, 55, 56 electrically connects two mutually spaced apart portions. In the semiconductor device A1, the plurality of connection members 51A, 51B, 52A, 52B, 531A, 531B, 532A, 532B, 541A, 541B, 542A, 542B, 55, 56 are all bonding wires. Each of the plurality of connection members 51A, 51B, 52A, 52B, 531A, 531B, 532A, 532B, 541A, 541B, 542A, 542B, 55, 56 may be made of gold, copper, or aluminum.

[0059] As shown in FIGS. 4 to 6 and 13 , the multiple connection members 51A are bonded to the second electrodes 112 (sources) of the multiple first semiconductor elements 11 and the pad portion 313a, respectively, to electrically connect the second electrodes 112 and the power wiring portion 313. In the semiconductor device A1, as shown in FIGS. 5 and 6 , multiple connection members 51A are bonded to each of the multiple second electrodes 112. A main current in the semiconductor device A1 flows through the multiple connection members 51A. In the semiconductor device A1, the connection members 51A may be plate-shaped members made of metal (e.g., copper) instead of bonding wires. In this case, the number of connection members 51A bonded to each second electrode 112 and pad portion 313a may be one.

[0060] As shown in FIGS. 4 to 6 and 13 , the multiple connection members 51B are bonded to the fifth electrodes 212 (sources) of the multiple second semiconductor elements 21 and the pad portion 312a, respectively, to electrically connect the fifth electrodes 212 and the power wiring portion 312. In the semiconductor device A1, as shown in FIGS. 5 and 6 , multiple connection members 51B are bonded to each of the multiple fifth electrodes 212. The main current in the semiconductor device A1 flows through the multiple connection members 51B. In the semiconductor device A1, the connection members 51B may not be bonding wires but may be plate-shaped members made of metal (e.g., copper). In this case, the number of connection members 51B bonded to each of the fifth electrodes 212 and the pad portion 312a may be one.

[0061] 5, 6, and 9, each of the plurality of connection members 52A is joined to the second electrodes 112 (sources) of two first semiconductor elements 11 adjacent to each other in the first direction x, thereby electrically connecting these second electrodes 112. Each of the plurality of connection members 52A extends along the first direction x in a plan view.

[0062] 5, 6, and 10, the plurality of connection members 52B are joined to the fifth electrodes 212 (sources) of two second semiconductor elements 21 adjacent to each other in the first direction x, and electrically connect these fifth electrodes 212. Each of the plurality of connection members 52B extends along the first direction x in a plan view.

[0063] 5 and 6 , the multiple connection members 531A are bonded to the third electrodes 113 (gates) of the multiple first semiconductor elements 11 and the signal wiring portion 321A, thereby electrically connecting the third electrodes 113 and the signal wiring portion 321A. As shown in FIGS. 5 and 6 , the connection member 532A is bonded to the signal wiring portion 321A and the signal terminal 44A, thereby electrically connecting the signal wiring portion 321A and the signal terminal 44A. Thus, the signal terminal 44A is electrically connected to the third electrodes 113 of the multiple first semiconductor elements 11 via the connection member 532A, the signal wiring portion 321A, and the multiple connection members 531A.

[0064] 5 and 6, the plurality of connection members 531B are bonded to the sixth electrodes 213 (gates) of the plurality of second semiconductor elements 21 and the signal wiring portion 321B, thereby electrically connecting the sixth electrodes 213 and the signal wiring portion 321B. As shown in FIGS. 5 and 6, the connection member 532B is bonded to the signal wiring portion 321B and the signal terminal 44B, thereby electrically connecting the signal wiring portion 321B and the signal terminal 44B. Thus, the signal terminal 44B is electrically connected to the sixth electrodes 213 of the plurality of second semiconductor elements 21 via the connection member 532B, the signal wiring portion 321B, and the plurality of connection members 531B.

[0065] 5 and 6 , the multiple connection members 541A are bonded to the second electrodes 112 (sources) of the multiple first semiconductor elements 11 and the signal wiring portion 322A, thereby electrically connecting the second electrodes 112 and the signal wiring portion 322A. As shown in FIGS. 5 and 6 , the connection members 542A are bonded to the signal wiring portion 322A and the signal terminal 45A, thereby electrically connecting the signal wiring portion 322A and the signal terminal 45A. Thus, the signal terminal 45A is electrically connected to the second electrodes 112 of the multiple first semiconductor elements 11 via the connection members 542A, the signal wiring portion 322A, and the multiple connection members 541A.

[0066] 5 and 6 , the plurality of connection members 541B are bonded to the signal wiring portion 322B and each of the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21, thereby electrically connecting the fifth electrodes 212 and the signal wiring portion 322B. As shown in FIGS. 5 and 6 , the connection member 542B is bonded to the signal wiring portion 322B and the signal terminal 45B, thereby electrically connecting the signal wiring portion 322B and the signal terminal 45B. Thus, the signal terminal 45B is electrically connected to the fifth electrodes 212 of the plurality of second semiconductor elements 21 via the connection member 542B, the signal wiring portion 322B, and the plurality of connection members 541B.

[0067] 5, the pair of connecting members 55 are respectively joined to the pair of signal wiring portions 323 and the pair of signal terminals 46, thereby providing electrical continuity therebetween. Thus, the pair of signal terminals 46 are electrically connected to the thermistor 91 via the pair of connecting members 55 and the pair of signal wiring portions 323. If the thermistor 91 is not joined to the pair of signal wiring portions 323, the pair of connecting members 55 is unnecessary.

[0068] 6 , the connection member 56 is joined to the extending portion 311c and the signal terminal 47, and provides electrical continuity between the power wiring portion 311 and the signal terminal 47. Thus, the signal terminal 47 is electrically connected to each of the first electrodes 111 (drains) of the plurality of first semiconductor elements 11 via the connection member 56 and the power wiring portion 311.

[0069] The semiconductor device A1 has the following advantages.

[0070] The semiconductor device A1 includes a plurality of first semiconductor elements 11, which are connected in parallel to one another. The semiconductor device A1 also includes a first conductor and a second conductor, which are electrically interposed between the second electrodes 112 (sources) of two first semiconductor elements 11 adjacent to one another in the first direction x. For example, each of the first conductor and the second conductor forms a conductive path extending between the two second electrodes 112, electrically connecting the two second electrodes 112 to one another. In the semiconductor device A1, the first conductor includes a connection member 51A bonded to the second electrode 112 of one first semiconductor element 11, a connection member 51A bonded to the second electrode 112 of the other first semiconductor element 11, and a portion of the pad portion 313a (power wiring portion 313) that is interposed between the portions to which the aforementioned connection members 51A are bonded. The second conductor is a connecting member 52A directly connected to each second electrode 112 of the two first semiconductor elements 11. In any two first semiconductor elements 11 adjacent in the first direction x, the two second electrodes 112 are electrically connected to each other via a first conductive path passing through the first conductor and a second conductive path passing through the second conductor. The first conductive path is a conductive path between the second electrodes 112 that is connected when a main current path is formed. The first conductive path and the second conductive path are at least partially parallel to each other, and the combined inductance of the inductance of the first conductive path and the inductance of the second conductive path is smaller than the inductance of the first conductive path. With this configuration, in any two first semiconductor elements 11 adjacent in the first direction x, the inductance between the second electrodes 112 (sources) is reduced by the second conductive path that is at least partially parallel to the first conductive path that is formed when a main current path is formed. In other words, the semiconductor device A1 can reduce the inductance between the second electrodes 112 (sources) compared to when there is no second conductive path. According to research by the present inventors, when two first semiconductor elements 11 are operated in parallel, the smaller the inductance between the second electrodes 112 (sources), the more the occurrence of resonance can be suppressed. Therefore, the semiconductor device A1 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0071] In the semiconductor device A1, the inductance of the second conduction path is smaller than the inductance of the first conduction path. In the semiconductor device A1, since the first conduction path and the second conduction path are in a parallel relationship, when the inductance of the first conduction path is the same, the smaller the inductance of the second conduction path, the smaller the combined inductance. In other words, when the inductance of the first conduction path is the same, the smaller the inductance of the second conduction path, the smaller the ratio of the combined inductance to the inductance of the first conduction path. Therefore, the semiconductor device A1 can further reduce the inductance between the second electrodes 112.

[0072] In the semiconductor device A1, the second conductive path is shorter than the first conductive path. Inductance varies depending on the material, shape, and size (length, width, thickness, etc.) of the conductor. For example, the shorter the length, the smaller the inductance. Therefore, in the semiconductor device A1, the inductance of the second conductive path can be made smaller than the inductance of the first conductive path.

[0073] In the semiconductor device A1, the connection member 52A is directly bonded to each of the second electrodes 112 of two first semiconductor elements 11 adjacent to each other in the first direction x. With this configuration, the length of the second conduction path between the second electrodes 112 of two first semiconductor elements 11 adjacent to each other in the first direction x can be made shorter than the length of the first conduction path.

[0074] The semiconductor device A1 includes a plurality of second semiconductor elements 21, which are connected in parallel to one another. The semiconductor device A1 also includes a third conductor and a fourth conductor, which are electrically interposed between the fifth electrodes 212 (sources) of two second semiconductor elements 21 adjacent to one another in the first direction x. In the semiconductor device A1, the third conductor includes a plurality of connecting members 51B connected to the fifth electrodes 212 of one pair of second semiconductor elements 21, a plurality of connecting members 51A connected to the fifth electrode 212 of the other second semiconductor element 21, and a portion of the pad portion 312a (power wiring portion 312) interposed between the portions where these connecting members 51A are joined. The fourth conductor is a connecting member 52B directly connected to the fifth electrodes 212 of the two second semiconductor elements 21. In any two second semiconductor elements 21 adjacent to each other in the first direction x, the two fifth electrodes 212 are electrically connected via a third conductive path passing through the third conductor and a fourth conductive path passing through the fourth conductor. The third conductive path is a conductive path between the fifth electrodes 212 that is connected when a main current path is formed. The third conductive path and the fourth conductive path are at least partially parallel to each other, and the combined inductance of the third conductive path and the fourth conductive path is smaller than the inductance of the third conductive path. With this configuration, in any two second semiconductor elements 21 adjacent to each other in the first direction x, the fourth conductive path, at least partially parallel to the third conductive path that is formed when a main current path is formed, reduces the inductance between the fifth electrodes 212 (sources). In other words, the semiconductor device A1 can reduce the inductance between the fifth electrodes 212 (sources) compared to a case in which the fourth conductive path is not provided. Therefore, in the semiconductor device A1, similar to the plurality of first semiconductor elements 11, the occurrence of resonance phenomenon when the plurality of second semiconductor elements 21 are operated in parallel can be suppressed.

[0075] In the semiconductor device A1, the inductance of the fourth conduction path is smaller than the inductance of the third conduction path. In the semiconductor device A1, since the third conduction path and the fourth conduction path are in a parallel relationship, when the inductance of the third conduction path is the same, the smaller the inductance of the fourth conduction path, the smaller the combined inductance. In other words, when the inductance of the third conduction path is the same, the smaller the inductance of the fourth conduction path, the smaller the ratio of the combined inductance to the inductance of the third conduction path. Therefore, the semiconductor device A1 can further reduce the inductance between the fifth electrodes 212.

[0076] In the semiconductor device A1, the fourth conduction path is shorter than the third conduction path. With this configuration, the semiconductor device A1 can have a smaller inductance of the fourth conduction path than the inductance of the third conduction path.

[0077] In the semiconductor device A1, the connection member 52B is directly bonded to each of the fifth electrodes 212 of two second semiconductor elements 21 adjacent to each other in the first direction x. With this configuration, the length of the fourth conductive path can be made shorter than the length of the third conductive path in electrical conduction between the fifth electrodes 212 of two second semiconductor elements 21 adjacent to each other in the first direction x.

[0078] In the semiconductor device A1, each connection member 52A may be a metal (e.g., copper) plate-like member rather than a bonding wire. In this case, the inductance of the connection member 52A can be reduced, thereby further reducing the inductance of the second conductive path. Similarly, each connection member 52B may be a metal (e.g., copper) plate-like member rather than a bonding wire. In this case, the inductance of the connection member 52B can be reduced, thereby further reducing the inductance of the fourth conductive path.

[0079] 14 to 16 show a semiconductor device B1 according to the second embodiment. The semiconductor device B1 differs from the semiconductor device A1 mainly in the following respects. First, the semiconductor device B1 is provided with a connection member 57A instead of the multiple connection members 51A and the multiple connection members 52A. Second, the semiconductor device B1 is provided with a connection member 57B instead of the multiple connection members 51B and the multiple connection members 52B.

[0080] The pair of connecting members 57A, 57B are each a plate-shaped member made of metal, which may be, but is not limited to, copper or a copper alloy.

[0081] As shown in FIGS. 14 and 15 , the connection member 57A includes multiple strip-shaped portions 571A and multiple linking portions 572A. Like the multiple connection members 51A, each of the multiple strip-shaped portions 571A is bonded to each second electrode 112 (source) of the multiple first semiconductor elements 11 and the pad portion 313a (power wiring portion 313), thereby establishing electrical continuity between them. Each of the multiple strip-shaped portions 571A has a strip shape with its longitudinal direction in the second direction y in a plan view. As shown in FIG. 16 , each of the multiple strip-shaped portions 571A is partially bent. The multiple linking portions 572A are sandwiched between two adjacent strip-shaped portions 571A in the first direction x and connected to them. In the example shown in FIGS. 14 and 15 , each linking portion 572A is connected to a portion of the strip-shaped portion 571A that is located between the portion bonded to the second electrode 112 and the portion bonded to the pad portion 313a. The strip portions 571A are electrically connected to one another via the connecting portions 572A.

[0082] As shown in FIGS. 14 and 15 , the connection member 57B includes a plurality of strip-shaped portions 571B and a plurality of linking portions 572B. Like the plurality of connection members 51B, each of the strip-shaped portions 571B is joined to each of the fifth electrodes 212 (sources) of the plurality of second semiconductor elements 21 and the pad portion 312a (power wiring portion 312), thereby establishing electrical continuity therebetween. Each of the strip-shaped portions 571B has a strip shape with the longitudinal direction in the second direction y in a plan view. As shown in FIG. 16 , each of the strip-shaped portions 571B is partially bent. Each of the linking portions 572B is sandwiched between two adjacent strip-shaped portions 571B in the first direction x and connected to them. The strip-shaped portions 571B are electrically connected to each other via the linking portions 572B. 14 and 15 , each strip-shaped portion 571B extends in both directions in the second direction y from a portion joined to the fifth electrode 212. Each connecting portion 572B is connected to a portion of the strip-shaped portion 571B that is on the opposite side of the portion joined to the fifth electrode 212 from the side joined to the pad portion 312a. In this example, the dimension of each strip-shaped portion 571B in the second direction y from the portion joined to the fifth electrode 212 to the portion connected to the connecting portion 572B is smaller than the dimension of each strip-shaped portion 571B in the second direction y from the portion joined to the fifth electrode 212 to the portion joined to the pad portion 312a.

[0083] The semiconductor device B1 has the following advantages.

[0084] Like the semiconductor device A1, the semiconductor device B1 also includes a first conductor and a second conductor. In the semiconductor device B1, the first conductor is a strip portion 571A of the connecting member 57A connected to the second electrode 112 of one of the first semiconductor elements 11, a strip portion 571A connected to the second electrode 112 of the other first semiconductor element 11, and a portion of the pad portion 313a (power wiring portion 313) interposed between the portions where these strip portions 571A are joined. The second conductor is a linking portion 572A and the portions of each of the two strip portions 571A connected to the linking portion 572A, extending from the second electrode 112 to the corresponding linking portion 572A. In any two first semiconductor elements 11 among the plurality of first semiconductor elements 11, the two second electrodes 112 (sources) are electrically connected to each other via a first conductive path passing through the first conductor and a second conductive path passing through the second conductor. In the semiconductor device B1, as in the semiconductor device A1, the first conduction path is a conduction path between the second electrodes 112 that are connected when the main current path is formed. The first conduction path and the second conduction path are at least partially parallel to each other, and the combined inductance of the inductance of the first conduction path and the inductance of the second conduction path is smaller than the inductance of the first conduction path. With this configuration, in the semiconductor device B1, as in the semiconductor device A1, the inductance between the second electrodes 112 (sources) of any two first semiconductor elements 11 is reduced by the second conduction path. Therefore, the semiconductor device B1 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0085] In the semiconductor device B1, the connection member 57A includes a linking portion 572A connecting two adjacent strip-shaped portions 571A. Each linking portion 572A connects to a portion of each strip-shaped portion 571A that is located between the portion bonded to the second electrode 112 and the portion bonded to the pad portion 313a. With this configuration, the length of the second conduction path between the second electrodes 112 of the two first semiconductor elements 11 can be made shorter than the length of the first conduction path. Furthermore, in the semiconductor device B1, because the length of the second conduction path is shorter than the length of the first conduction path, the inductance of the second conduction path can be made smaller than the inductance of the first conduction path.

[0086] Like the semiconductor device A1, the semiconductor device B1 also includes a third conductor and a fourth conductor. In the semiconductor device B1, the third conductor is a strip portion 571B of the connecting member 57B connected to the fifth electrode 212 of one second semiconductor element 21, a strip portion 571B connected to the fifth electrode 212 of the other second semiconductor element 21, and a portion of the pad portion 312a (power wiring portion 312) interposed between the respective portions where the two strip portions 571B are joined. The fourth conductor is a portion of each of the linking portion 572B and the two strip portions 571B connected to the linking portion 572B, extending from the fifth electrode 212 to the portion connected to the linking portion 572B. In any two second semiconductor elements 21 among the plurality of second semiconductor elements 21, the two fifth electrodes 212 (sources) are electrically connected to each other via a third conductive path passing through the third conductor and a fourth conductive path passing through the fourth conductor. In the semiconductor device B1, as in the semiconductor device A1, the third conduction path is a conduction path between the fifth electrodes 212 that are connected when the main current path is formed. The third conduction path and the fourth conduction path are at least partially parallel to each other, and the combined inductance of the third conduction path and the inductance of the fourth conduction path is smaller than the inductance of the third conduction path. With this configuration, in the semiconductor device B1, as in the semiconductor device A1, the inductance between the fifth electrodes 212 (sources) of any two second semiconductor elements 21 is reduced by the fourth conduction path. Therefore, the semiconductor device B1 can suppress the occurrence of resonance when multiple second semiconductor elements 21 are operated in parallel.

[0087] In the semiconductor device B1, the connection member 57B includes a linking portion 572B connecting two adjacent strip-shaped portions 571B. In each strip-shaped portion 571B, the dimension along the second direction y from the portion bonded to the fifth electrode 212 to the portion connected to the linking portion 572B is smaller than the dimension along the second direction y from the portion bonded to the fifth electrode 212 to the portion bonded to the pad portion 312a. With this configuration, the length of the fourth conduction path can be made shorter than the length of the third conduction path in electrical conduction between the fifth electrodes 212 of the two second semiconductor elements 21. Furthermore, in the semiconductor device B1, the length of the fourth conduction path is shorter than the length of the third conduction path, so that the inductance of the fourth conduction path can be made smaller than the inductance of the third conduction path.

[0088] 17 shows a semiconductor device B2 according to a first modification of the second embodiment. The semiconductor device B2 differs from the semiconductor device B1 in the shape of a connecting member 57A.

[0089] In the connecting member 57A of the semiconductor device B2, each linking portion 572A is connected to a portion of each strip-shaped portion 571A that overlaps with each first semiconductor element 11 in a plan view (a portion bonded to the second electrode 112). With this configuration, the multiple first semiconductor elements 11 are arranged such that, in a plan view, the third electrodes 113 are located on one side in the second direction y (the side on which the signal wiring portion 321A is located). In a plan view, each third electrode 113 does not overlap the connecting member 57A, enabling wire bonding to the third electrodes 113.

[0090] The semiconductor device B2 also achieves the same effects as the semiconductor device B1. Furthermore, in the semiconductor device B2, the second conduction path, i.e., the conduction path via the coupling portion 572A, is shorter than in the semiconductor device B1, so the inductance of the second conduction path is reduced more than in the semiconductor device B1. Therefore, the semiconductor device B2 can suppress the occurrence of resonance phenomenon when multiple first semiconductor elements 11 are operated in parallel more effectively than the semiconductor device B1.

[0091] 18 to 21 show a semiconductor device B3 according to a second modification of the second embodiment. The semiconductor device B3 has a different module structure from the semiconductor device B1. The semiconductor device B1 has a case-type module structure in which a plurality of first semiconductor elements 11 and a plurality of second semiconductor elements 21 are housed in a case 61, but the semiconductor device B3 has a mold-type module structure in which the plurality of first semiconductor elements 11 and a plurality of second semiconductor elements 21 are covered with a sealing member 7.

[0092] 18 to 21 , the semiconductor device B3 includes a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 21, an insulating substrate 30, a pair of conductive substrates 33A and 33B, a pair of insulating layers 34A and 34B, a plurality of signal wiring portions 321A, 321B, 322A, 322B, 324, and 329, a plurality of power terminals 41 to 43, a plurality of signal terminals 44A, 44B, 45A, 45B, 47, and 48, a plurality of connecting members 531A, 531B, 541A, 541B, and 56, a pair of connecting members 57A and 57B, and a sealing member 7. As will be understood from the configuration described in detail later, the semiconductor device B3 includes a conductive substrate 33A as an example of a “first wiring portion” and a conductive substrate 33B as an example of a “second wiring portion.”

[0093] The sealing member 7 covers the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 21. The sealing member 7 is made of, for example, black epoxy resin. The sealing member 7 may also be made of other insulating resins. The sealing member 7 has, for example, a rectangular shape in a plan view.

[0094] The sealing member 7 includes a resin main surface 71, a resin back surface 72, a pair of resin side surfaces 73, and a pair of resin side surfaces 74. The resin main surface 71 and the resin back surface 72 are spaced apart in the thickness direction z. The resin main surface 71 faces upward in the thickness direction z, and the resin back surface 72 faces downward in the thickness direction z. The pair of resin side surfaces 73 and the pair of resin side surfaces 74 are sandwiched between and connected to the resin main surface 71 and the resin back surface 72 in the thickness direction z. The pair of resin side surfaces 73 are spaced apart in the first direction x and face opposite directions from each other in the first direction x. The pair of resin side surfaces 74 are spaced apart in the second direction y and face opposite directions from each other in the second direction y.

[0095] 18 , a plurality of signal terminals 44A, 44B, 45A, 45B, 47, and 48 protrude from resin main surface 71. Back surface 30b of insulating substrate 30 is exposed from resin back surface 72. Note that back surface 30b may be covered with sealing member 7 without being exposed from resin back surface 72. As shown in FIGS. 18 and 20 , power terminal 41 and two power terminals 42 protrude from one of a pair of resin side surfaces 73, and two power terminals 43 protrude from the other of the pair of resin side surfaces 73.

[0096] The pair of conductive substrates 33A and 33B are each disposed on the insulating substrate 30. The pair of conductive substrates 33A and 33B are each made of a metal, such as copper or a copper alloy, or aluminum or an aluminum alloy.

[0097] The conductive substrate 33A has a plurality of first semiconductor elements 11 mounted thereon. The conductive substrate 33A faces the first element back surfaces 11b of the plurality of first semiconductor elements 11. The conductive substrate 33A is electrically connected to the first electrodes 111 of the plurality of first semiconductor elements 11. The first electrodes 111 of the plurality of first semiconductor elements 11 are electrically connected via the conductive substrate 33A.

[0098] The conductive substrate 33B has a plurality of second semiconductor elements 21 mounted thereon. The conductive substrate 33B faces the second element back surfaces 21b of the plurality of second semiconductor elements 21. The conductive substrate 33B is electrically connected to the fourth electrodes 211 of the plurality of second semiconductor elements 21. The fourth electrodes 211 of the plurality of second semiconductor elements 21 are electrically connected via the conductive substrate 33B.

[0099] The insulating layer 34A is disposed on the conductive substrate 33A. A plurality of signal wiring portions 321A, 322A, and 329 are disposed on the insulating layer 34A. The insulating layer 34A is made of, for example, ceramics.

[0100] The insulating layer 34B is disposed on the conductive substrate 33B. A plurality of signal wiring portions 321B, 322B, and 329 are disposed on the insulating layer 34B. The insulating layer 34B is made of, for example, ceramics.

[0101] The plurality of signal wiring portions 329 are disposed on one of the pair of insulating layers 34A, 34B. None of the plurality of connecting members are joined to the plurality of signal wiring portions 329, and the plurality of signal wiring portions 329 are not electrically connected to either the plurality of first semiconductor elements 11 or the plurality of second semiconductor elements 21.

[0102] The power terminal 41 is formed integrally with the conductive substrate 33A. The dimension of the power terminal 41 in the thickness direction z is smaller than that of the conductive substrate 33A. The power terminal 41 extends from the conductive substrate 33A to one side in the first direction x. This one side in the first direction x is the opposite side of the conductive substrate 33A from the side on which the conductive substrate 33B is located. The power terminal 41 is electrically connected to the first electrodes 111 (drains) of the multiple first semiconductor elements 11.

[0103] The two power terminals 42 are each spaced apart from the conductive substrate 33A. The two power terminals 42 are arranged on opposite sides of the power terminal 41 in the second direction y. The two power terminals 42 are arranged on one side of the conductive substrate 33A in the first direction x. This one side of the first direction x is the side on which the power terminal 41 is located with respect to the conductive substrate 33A. A connecting member 57B is joined to each of the two power terminals 42. The two power terminals 42 are each electrically connected to the fifth electrodes 212 (sources) of the multiple second semiconductor elements 21.

[0104] Each of the two power terminals 43 is formed integrally with the conductive substrate 33B. The dimension of each of the two power terminals 43 in the thickness direction z is smaller than that of the conductive substrate 33B. Each of the two power terminals 43 extends from the conductive substrate 33B toward the other side in the first direction x. This other side in the first direction x is the opposite side of the conductive substrate 33B from the side on which the conductive substrate 33A is located. Each of the two power terminals 43 is electrically connected to the second electrodes 112 (sources) of the multiple first semiconductor elements 11 and the fourth electrodes 211 (drains) of the multiple second semiconductor elements 21.

[0105] The signal terminal 44A is provided upright on the signal wiring portion 321A. The signal terminal 44A is electrically connected to the signal wiring portion 321A. The signal terminal 44B is provided upright on the signal wiring portion 321B. The signal terminal 44B is electrically connected to the signal wiring portion 321B. As shown in FIG. 19 , each of the pair of signal terminals 44A, 44B includes a holder 441 and a metal pin 442.

[0106] The holder 441 is made of a conductive material. The holder 441 of the signal terminal 44A is joined to the signal wiring portion 321A, and the holder 441 of the signal terminal 44B is joined to the signal wiring portion 321B. The holder 441 is cylindrical. The metal pin 442 is press-fitted into the holder 441 and extends in the thickness direction z. The metal pin 442 protrudes upward in the thickness direction z from the resin main surface 71 of the sealing member 7, and a portion of the metal pin 442 is exposed from the sealing member 7.

[0107] The signal terminal 45A is provided upright on the signal wiring portion 322A. The signal terminal 45A is electrically connected to the signal wiring portion 322A. The signal terminal 45B is provided upright on the signal wiring portion 322B. The signal terminal 45B is electrically connected to the signal wiring portion 322B. As shown in FIG. 19 , each of the pair of signal terminals 45A, 45B includes a holder 451 and a metal pin 452. The holder 451 and the metal pin 452 are configured similarly to the holder 441 and the metal pin 442, respectively. The holder 451 of the signal terminal 45A is joined to the signal wiring portion 322A, and the holder 451 of the signal terminal 45B is joined to the signal wiring portion 322B.

[0108] The signal terminal 47 is provided upright on the signal wiring portion 324. The signal terminal 47 is electrically connected to the signal wiring portion 324. The signal wiring portion 324 is electrically connected to the conductive substrate 33A via a connecting member 56. As shown in FIG. 19 , the signal terminal 47 includes a holder 471 and a metal pin 472. The holder 471 and the metal pin 472 are configured in the same manner as the holder 441 and the metal pin 442, respectively. The holder 471 is joined to the signal wiring portion 324.

[0109] The plurality of signal terminals 48 are provided upright on the signal wiring portion 329. The plurality of signal terminals 48 are not electrically connected to either the plurality of first semiconductor elements 11 or the plurality of second semiconductor elements 21. Each of the plurality of signal terminals 48 is a non-connect terminal.

[0110] In the semiconductor device B3, similarly to the semiconductor device B1, in any two of the multiple first semiconductor elements 11, the two second electrodes 112 (sources) are electrically connected to each other via a first conductive path and a second conductive path. In the semiconductor device B3, the first conductor is a strip portion 571A of the connecting member 57A connected to the second electrode 112 of one of the first semiconductor elements 11, a strip portion 571A connected to the second electrode 112 of the other first semiconductor element 11, and a portion of the conductive substrate 33B interposed between the portions where these strip portions 571A are joined. The second conductor is a linking portion 572A and the portions of each of the two strip portions 571A connected to the linking portion 572A, from the second electrode 112 to the portion connected to the linking portion 572A. The first conduction path and the second conduction path are at least partially in parallel, and the combined inductance of the first conduction path and the inductance of the second conduction path is smaller than the inductance of the first conduction path. With this configuration, in the semiconductor device B3, similar to the semiconductor device B1, the inductance between the second electrodes 112 (sources) of any two first semiconductor elements 11 is reduced by the second conduction path. Therefore, the semiconductor device B3 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0111] In the semiconductor device B3, each connecting portion 572A is connected to a portion of each strip-shaped portion 571A that is located between the portion bonded to the second electrode 112 and the portion bonded to the conductive substrate 33B. With this configuration, the length of the second conduction path can be made shorter than the length of the first conduction path in electrical conduction between the second electrodes 112 of the two first semiconductor elements 11. Furthermore, in the semiconductor device B3, because the length of the second conduction path is shorter than the length of the first conduction path, the inductance of the second conduction path can be made lower than the inductance of the first conduction path.

[0112] 22 to 25 show a semiconductor device C1 according to the third embodiment. The semiconductor device C1 differs from the semiconductor device A1 in the following respects. First, a plurality of first semiconductor elements 11 are covered with a resin member 12 to form the first switching unit 1. Second, a plurality of second semiconductor elements 21 are covered with a resin member 22 to form the second switching unit 2.

[0113] The first switching unit 1 is configured by utilizing rewiring technology to integrate multiple first semiconductor elements 11 into a single component. The first switching unit 1 has a main surface 10a and a back surface 10b. The main surface 10a and the back surface 10b are spaced apart in the thickness direction z. The main surface 10a faces one side (upward) in the thickness direction z. The back surface 10b faces the other side (downward) in the thickness direction z and faces the pad portion 311a (power wiring portion 311). The first switching unit 1 includes multiple first semiconductor elements 11, a resin member 12, a wiring layer 13, a main surface terminal portion 14, a back surface terminal portion 15, and multiple interlayer electrodes 161-164. As will be understood from the configuration described in detail later, the semiconductor device C1 includes the resin member 12, the wiring layer 13, and the main surface terminal portion 14.

[0114] The resin member 12 covers the plurality of first semiconductor elements 11, the wiring layer 13, and the plurality of interlayer electrodes 161 to 164. The resin member 12 is made of, for example, an insulating resin material.

[0115] In a plan view, the wiring layer 13 has a strip shape extending along the arrangement direction (first direction x) of the plurality of first semiconductor elements 11. In a plan view, the wiring layer 13 overlaps the plurality of first semiconductor elements 11. However, as can be seen from FIG. 25 , the wiring layer 13 is formed to avoid the third electrodes 113 in a plan view.

[0116] The main surface terminal portion 14 is disposed on the main surface 10a and exposed from the resin member 12. The main surface terminal portion 14 includes a plurality of first pad portions 141 and a plurality of second pad portions 142. Each of the plurality of first pad portions 141 is electrically connected to a respective second electrode 112 (source) of each of the plurality of first semiconductor elements 11 via the wiring layer 13 and two interlayer electrodes 161, 162. The number of first pad portions 141 is, for example, the same as the number of first semiconductor elements 11 (second electrodes 112). Each of the plurality of second pad portions 142 is electrically connected to a respective third electrode 113 (gate) of each of the plurality of first semiconductor elements 11 via an interlayer electrode 163. The number of second pad portions 142 is, for example, the same as the number of first semiconductor elements 11 (third electrodes 113).

[0117] The back surface terminal portion 15 is disposed on the back surface 10b and is exposed from the resin member 12. The back surface terminal portion 15 includes a plurality of pad portions 151. The plurality of pad portions 151 are each electrically connected to the first electrodes 111 (drains) of the plurality of first semiconductor elements 11 via interlayer electrodes 164.

[0118] The multiple interlayer electrodes 161 to 164 each extend in the thickness direction z. The multiple interlayer electrodes 161 each connects the second electrodes 112 of the multiple first semiconductor elements 11 to the wiring layer 13. The multiple interlayer electrodes 162 each connects the wiring layer 13 to each of the multiple first pad portions 141. The multiple interlayer electrodes 163 each connects the third electrodes 113 of the multiple first semiconductor elements 11 to each of the multiple second pad portions 142. The multiple interlayer electrodes 164 each connects the first electrodes 111 of the multiple first semiconductor elements 11 to each of the multiple pad portions 151.

[0119] Like the first switching unit 1, the second switching unit 2 is configured by utilizing rewiring technology to integrate multiple second semiconductor elements 21 into a single component. The second switching unit 2 has a main surface 20a and a back surface 20b. The main surface 20a and the back surface 20b are spaced apart in the thickness direction z. The main surface 20a faces one side (upward) in the thickness direction z. The back surface 20b faces the other side (downward) in the thickness direction z and faces the pad portion 313a (power wiring portion 313). The second switching unit 2 includes multiple second semiconductor elements 21, a resin member 22, a wiring layer 23, a main surface terminal portion 24, a back surface terminal portion 25, and multiple interlayer electrodes 261 to 264.

[0120] The resin member 22 covers the second semiconductor elements 21, the wiring layer 23, and the interlayer electrodes 261 to 264. The resin member 22 is made of, for example, an insulating resin material.

[0121] In a plan view, the wiring layer 23 has a strip shape extending along the arrangement direction (first direction x) of the plurality of second semiconductor elements 21. In a plan view, the wiring layer 23 overlaps the second semiconductor elements 21. However, as can be seen from FIG. 25 , the wiring layer 23 is formed to avoid the sixth electrodes 213 in a plan view.

[0122] The main surface terminal portion 24 is disposed on the main surface 20a and exposed from the resin member 22. The main surface terminal portion 24 includes a plurality of first pad portions 241 and a plurality of second pad portions 242. Each of the plurality of first pad portions 241 is electrically connected to a corresponding fifth electrode 212 (source) of each of the plurality of second semiconductor elements 21 via the wiring layer 23 and two interlayer electrodes 261, 262. The number of first pad portions 241 is, for example, the same as the number of second semiconductor elements 21 (fifth electrodes 212). Each of the plurality of second pad portions 242 is electrically connected to a corresponding sixth electrode 213 (gate) of each of the plurality of second semiconductor elements 21 via an interlayer electrode 263. The number of second pad portions 242 is, for example, the same as the number of second semiconductor elements 21 (sixth electrodes 213).

[0123] The back surface terminal portion 25 is disposed on the back surface 20b and is exposed from the resin member 22. The back surface terminal portion 25 includes a plurality of pad portions 251. The plurality of pad portions 251 are each electrically connected to the fourth electrodes 211 (drains) of the plurality of second semiconductor elements 21 via the interlayer electrodes 264.

[0124] The multiple interlayer electrodes 261 to 264 each extend in the thickness direction z. The multiple interlayer electrodes 261 each connects the fifth electrodes 212 of the multiple second semiconductor elements 21 to the wiring layer 23. The multiple interlayer electrodes 262 each connects the wiring layer 23 to each of the multiple first pad portions 241. The multiple interlayer electrodes 263 each connects the sixth electrodes 213 of the multiple second semiconductor elements 21 to each of the multiple second pad portions 242. The multiple interlayer electrodes 264 each connects the fourth electrodes 211 of the multiple second semiconductor elements 21 to each of the multiple pad portions 251.

[0125] The semiconductor device C1 has the following advantages.

[0126] Like the semiconductor devices A1 and B1, the semiconductor device C1 also includes a first conductor and a second conductor. In the semiconductor device C1, the first conductor includes a portion from the second electrode 112 of one first semiconductor element 11 to the first pad portion 141 on the second electrode 112 (two interlayer electrodes 161, 162 and a part of the wiring layer 13), a connection member 51A bonded to the first pad portion 141, a portion from the second electrode 112 of the other first semiconductor element 11 to the first pad portion 141 on the second electrode 112 (two interlayer electrodes 161, 162 and a part of the wiring layer 13), the connection member 51A bonded to the first pad portion 141, and a portion of the pad portion 313 a (power wiring portion 313) interposed between the portions to which the above-mentioned connection members 51A are bonded. The second conductor is an interlayer electrode 161 in contact with the second electrode 112 of one first semiconductor element 11, an interlayer electrode 161 in contact with the second electrode 112 of the other first semiconductor element 11, and a portion of the wiring layer 13 interposed between the portions in contact with the aforementioned interlayer electrodes 161. In any two first semiconductor elements 11 among the plurality of first semiconductor elements 11, the two second electrodes 112 (sources) are electrically connected to each other via a first conductive path passing through the first conductor and a second conductive path passing through the second conductor. In the semiconductor device C1, as in the semiconductor devices A1 and B1, the first conductive path is a conductive path between the second electrodes 112 that are connected when a main current path is formed. At least a portion of the first conductive path and the second conductive path are in parallel, and the combined inductance of the first conductive path and the second conductive path is smaller than the inductance of the first conductive path. With this configuration, similar to the semiconductor device A1, the semiconductor device C1 has the second conduction path reducing the inductance between the second electrodes 112 (sources) of any two first semiconductor elements 11. Therefore, the semiconductor device C1 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0127] In the semiconductor device C1, the first switching unit 1 includes a wiring layer 13. The wiring layer 13 conducts electricity between each of the second electrodes 112 of the multiple first semiconductor elements 11 inside the resin member 12. With this configuration, in the conduction between the second electrodes 112 of two first semiconductor elements 11, the length of the second conduction path can be made shorter than the length of the first conduction path. Furthermore, in the semiconductor device C1, the length of the second conduction path is shorter than the length of the first conduction path, so that the inductance of the second conduction path can be made smaller than the inductance of the first conduction path.

[0128] Like the semiconductor devices A1 and B1, the semiconductor device C1 also includes a third conductor and a fourth conductor. In the semiconductor device C1, the third conductor includes a portion from the fifth electrode 212 of one second semiconductor element 21 to the first pad portion 241 on the fifth electrode 212 (the two interlayer electrodes 261, 262 and a part of the wiring layer 23), a connection member 51B bonded to the first pad portion 241, a portion from the fifth electrode 212 of the other second semiconductor element 21 to the first pad portion 241 on the fifth electrode 212 (the two interlayer electrodes 261, 262 and a part of the wiring layer 23), the connection member 51B bonded to the first pad portion 241, and portions of the pad portion 312 a (power wiring portion 312) interposed between the portions to which the above-mentioned connection members 51B are bonded. The fourth conductor is an interlayer electrode 261 in contact with the fifth electrode 212 of one second semiconductor element 21, an interlayer electrode 261 in contact with the fifth electrode 212 of the other second semiconductor element 21, and a portion of the wiring layer 23 interposed between the portions in contact with the aforementioned interlayer electrodes 261. In any two second semiconductor elements 21 among the plurality of second semiconductor elements 21, the two fifth electrodes 212 (sources) are electrically connected to each other via a third conductive path passing through the third conductor and a fourth conductive path passing through the fourth conductor. In the semiconductor device C1, as in the semiconductor devices A1 and B1, the third conductive path is a conductive path between the fifth electrodes 212 that are connected when the main current path is formed. The third conductive path and the fourth conductive path are at least partially parallel to each other, and the combined inductance of the third conductive path and the fourth conductive path is smaller than the inductance of the third conductive path. According to this configuration, in the semiconductor device C1, similar to the semiconductor device A1, the inductance between the fifth electrodes 212 (sources) is reduced by the fourth conductive path in any two second semiconductor elements 21. Therefore, the semiconductor device C1 can suppress the occurrence of resonance when a plurality of second semiconductor elements 21 are operated in parallel.

[0129] In the semiconductor device C1, the second switching unit 2 includes a wiring layer 23. The wiring layer 23 conducts electricity between each of the fifth electrodes 212 of the plurality of second semiconductor elements 21 inside the resin member 22. With this configuration, in the conduction between the fifth electrodes 212 of two second semiconductor elements 21, the length of the fourth conduction path can be made shorter than the length of the third conduction path. Furthermore, in the semiconductor device C1, the length of the fourth conduction path is shorter than the length of the third conduction path, so that the inductance of the fourth conduction path can be made smaller than the inductance of the third conduction path.

[0130] 26 to 28 show a semiconductor device C2 according to a modification of the third embodiment. The semiconductor device C2 has a different module structure from the semiconductor device C1.

[0131] 26 to 28 , semiconductor device C2 includes a first switching unit 1, a second switching unit 2, an insulating substrate 30, a pair of conductive substrates 33A and 33B, a pair of insulating layers 34A and 34B, a plurality of signal wiring portions 321A, 321B, 322A, and 322B, a plurality of power terminals 41 to 43, a plurality of signal terminals 44A, 44B, 45A, 45B, and 48, a plurality of connecting members 531A, 531B, 532A, 532B, 541A, 541B, 542A, and 542B, and a sealing member 7. As will be understood from the configuration described in detail later, semiconductor device C2 includes conductive substrate 33A as an example of a “first wiring portion” and conductive substrate 33B as an example of a “second wiring portion.”

[0132] 27 , the first switching unit 1 is mounted on a conductive substrate 33A. The back surface 10b faces the conductive substrate 33A. The back surface terminal 15 (plurality of pads 151) of the first switching unit 1 is joined to the conductive substrate 33A, and is electrically connected to each of the first electrodes 111 of the plurality of first semiconductor elements 11. The first electrodes 111 of the plurality of first semiconductor elements 11 are electrically connected via the conductive substrate 33A.

[0133] 27 , the second switching unit 2 is mounted on a conductive substrate 33B. The back surface 20b faces the conductive substrate 33B. The back surface terminals 25 (plurality of pads 251) of the second switching unit 2 are joined to the conductive substrate 33B, and are electrically connected to the respective fourth electrodes 211 of the plurality of second semiconductor elements 21. The fourth electrodes 211 of the plurality of second semiconductor elements 21 are electrically connected via the conductive substrate 33B.

[0134] In the semiconductor device C2, each of the plurality of connection members 51A, 51B is a metal plate-like member, as can be seen from Fig. 27. Each connection member 51A is bonded to each first pad portion 141 and the conductive substrate 33B, as shown in Fig. 27. Each connection member 51B is bonded to each first pad portion 241 and a portion of the power terminal 42 (each of the comb-shaped portions), as shown in Fig. 27.

[0135] The power terminal 41 is bonded to the conductive substrate 33A and is electrically connected to the first electrodes 111 of the multiple first semiconductor elements 11. As shown in FIG. 28 , the power terminal 42 is stacked on the power terminal 41 with an insulating plate 49 sandwiched therebetween. The power terminal 42 is electrically connected to the fifth electrodes 212 of the multiple second semiconductor elements 21 via the respective connecting members 51B. The power terminal 43 is bonded to the conductive substrate 33B and is electrically connected to the fourth electrodes 211 of the multiple second semiconductor elements 21. The power terminal 43 is also electrically connected to the second electrodes 112 of the multiple first semiconductor elements 11 via the conductive substrate 33B and the respective connecting members 51A.

[0136] In the semiconductor device C2, similar to the semiconductor device C1, in any two of the multiple first semiconductor elements 11, the two second electrodes 112 (sources) are electrically connected to each other via a first conduction path and a second conduction path. In the semiconductor device C2, the first conductor includes a portion of the conductive substrate 33B instead of a portion of the pad portion 313a. The first conduction path and the second conduction path are at least partially parallel to each other, and the combined inductance of the first conduction path and the second conduction path is smaller than the inductance of the first conduction path. With this configuration, similar to the semiconductor device C1, in the semiconductor device C2, in any two of the first semiconductor elements 11, the inductance between the second electrodes 112 (sources) is reduced by the second conduction path. Therefore, the semiconductor device C2 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0137] In the semiconductor device C2, similar to the semiconductor device C1, in any two of the multiple second semiconductor elements 21, the two fifth electrodes 212 (sources) are electrically connected to each other via a third conduction path and a fourth conduction path. In the semiconductor device C2, the third conductor includes a portion of the power terminal 42 instead of a portion of the pad portion 312a. The third conduction path and the fourth conduction path are at least partially parallel to each other, and the combined inductance of the third conduction path and the fourth conduction path is smaller than the inductance of the third conduction path. With this configuration, similar to the semiconductor device C1, in the semiconductor device C2, in any two of the second semiconductor elements 21, the inductance between the fifth electrodes 212 (sources) is reduced by the fourth conduction path. Therefore, the semiconductor device C2 can suppress the occurrence of resonance when multiple second semiconductor elements 21 are operated in parallel.

[0138] In each of the semiconductor devices C1 and C2, the first switching unit 1 may have a configuration shown in, for example, FIGS. 29 to 31 . FIGS. 29 to 31 show an example of a first switching unit 1 including, for example, four first semiconductor elements 11. In the example shown in FIGS. 29 to 31 , the main surface terminal unit 14 of the first switching unit 1 includes a single first pad 141 rather than multiple first pads 141. As shown in FIG. 30 , the first pad 141 is formed on the surface (upper surface in the thickness direction z) of the wiring layer 13 connected to each of the second electrodes 112 of the multiple first semiconductor elements 11. In the example shown in FIGS. 29 to 31 , the back surface terminal unit 15 of the first switching unit 1 includes a single pad 151 rather than multiple pads 151. As shown in FIG. 30 , the pad 151 is formed on the surface (lower surface in the thickness direction z) of the wiring layer 13 connected to each of the first electrodes 111 of the multiple first semiconductor elements 11. The back surface terminal portion 15 does not have to be configured to include one pad portion 151, but may be configured to include multiple pad portions 151, similar to the semiconductor devices C1 and C2. Even in a first switching portion 1 configured in this manner, the multiple second electrodes 112 are electrically connected to each other via the wiring layer 13, thereby forming a conduction path via the second conductor. This configuration is applicable not only to the first switching portion 1 but also to the second switching portion 2.

[0139] 32 shows a semiconductor device D1 according to the fourth embodiment. As shown in the figure, the semiconductor device D1 differs from the semiconductor device A1 mainly in the shape of each of the power wiring portions 311 to 313 in plan view.

[0140] The power wiring portion 312 of the semiconductor device D1 differs from the power wiring portion 312 of the semiconductor device A1 in that it further includes a plurality of protrusions 312c. Moreover, the power wiring portion 313 of the semiconductor device D1 differs from the power wiring portion 313 of the semiconductor device A1 in that it further includes a plurality of protrusions 313c.

[0141] Each of the multiple protrusions 312c protrudes from a corresponding pad portion 312a toward one side in the second direction y (the side where the multiple second semiconductor elements 21 are located). In a plan view, each of the multiple protrusions 312c is disposed between two second semiconductor elements 21 adjacent to each other in the first direction x. Two connection members 52B are bonded to each of the multiple protrusions 312c. These connection members 52B are bonded to the fifth electrodes 212 of the second semiconductor elements 21 located adjacent to each other in the first direction x in a plan view.

[0142] Each of the multiple protrusions 313c protrudes from a corresponding pad portion 313a toward one side in the second direction y (the side where the multiple first semiconductor elements 11 are located). In a plan view, each of the multiple protrusions 313c is disposed between two first semiconductor elements 11 adjacent to each other in the first direction x. Two connection members 52A are bonded to each of the multiple protrusions 313c. These connection members 52A are bonded to the second electrodes 112 of the first semiconductor elements 11 located adjacent to each other in the first direction x in a plan view.

[0143] The semiconductor device D1 has the following advantages.

[0144] Like the semiconductor devices A1, B1, and C1, the semiconductor device D1 also includes a first conductor and a third conductor. Like the semiconductor device A1, the first conductor in the semiconductor device D1 includes a connecting member 51A bonded to the second electrode 112 of one first semiconductor element 11, a connecting member 51A bonded to the second electrode 112 of the other first semiconductor element 11, and a portion of the pad portion 313a (power wiring portion 313) interposed between the portions to which the aforementioned connecting members 51A are bonded. The second conductor includes a protrusion 313c disposed between the two first semiconductor elements 11 and two connecting members 52A bonded to the protrusion 313c. In any two first semiconductor elements 11 adjacent in the first direction x, the two second electrodes 112 are electrically connected to each other via a first conductive path passing through the first conductor and a second conductive path passing through the second conductor. In the semiconductor device D1, as in the semiconductor devices A1, B1, and C1, the first conduction path is a conduction path between the second electrodes 112 that are connected when the main current path is formed. The first conduction path and the second conduction path are at least partially parallel to each other, and the combined inductance of the inductance of the first conduction path and the inductance of the second conduction path is smaller than the inductance of the first conduction path. With this configuration, in the semiconductor device D1, as in the semiconductor device A1, the inductance between the second electrodes 112 (sources) of any two first semiconductor elements 11 adjacent in the first direction x is reduced by the second conduction path. Therefore, the semiconductor device D1 can suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel.

[0145] In the semiconductor device D1, the power wiring portion 313 includes a protruding portion 313c that protrudes from the pad portion 313a and is disposed between two first semiconductor elements 11 adjacent in the first direction x. The connection members 52A that are respectively bonded to the second electrodes 112 of the two first semiconductor elements 11 are bonded to the protruding portion 313c. With this configuration, the length of the second conduction path can be made shorter than the length of the first conduction path in electrical conduction between the second electrodes 112 of the two first semiconductor elements 11 adjacent in the first direction x. Furthermore, in the semiconductor device D1, because the length of the second conduction path is shorter than the length of the first conduction path, the inductance of the second conduction path can be made smaller than the inductance of the first conduction path.

[0146] In the semiconductor device D1, a protrusion 313c is disposed between two first semiconductor elements 11 adjacent in the first direction x. For example, in the semiconductor device A1, the first electrodes 111 of two first semiconductor elements 11 adjacent in the first direction x are electrically connected to each other through a path that linearly connects these first electrodes 111 at the pad portion 311a. However, in the semiconductor device D1, the first electrodes 111 of two first semiconductor elements 11 adjacent in the first direction x are electrically connected to each other through a path that avoids the protrusion 313c at the pad portion 311a. In other words, in the semiconductor device D1, the protrusion 313c is disposed so as to interrupt the electrically conductive path that linearly connects two first electrodes 111 adjacent in the first direction x. Therefore, the electrically conductive path between the first electrodes 111 is extended compared to the semiconductor device A1. As a result, the inductance between the first electrodes 111 of the semiconductor device D1 is increased compared to the semiconductor device A1. Research by the inventors of the present application has revealed that the occurrence of resonance is suppressed as the inductance of the conduction paths between the first electrodes 111 of each first semiconductor element 11 increases. Therefore, the semiconductor device D1 can further suppress the occurrence of resonance when multiple first semiconductor elements 11 are operated in parallel than the semiconductor device A1.

[0147] Like the semiconductor devices A1, B1, and C1, the semiconductor device D1 also includes a third conductor and a fourth conductor. Like the semiconductor device A1, the third conductor in the semiconductor device D1 includes a connecting member 51B bonded to the fifth electrode 212 of one second semiconductor element 21, a connecting member 51B bonded to the fifth electrode 212 of the other second semiconductor element 21, and a portion of the pad portion 312a (power wiring portion 312) interposed between the portions to which the aforementioned connecting members 51B are bonded. The fourth conductor includes a protrusion 312c disposed between the two second semiconductor elements 21 and two connecting members 52B bonded to the protrusion 312c. In any two second semiconductor elements 21 adjacent in the first direction x, the two fifth electrodes 212 are electrically connected to each other via a third conductive path passing through the third conductor and a fourth conductive path passing through the fourth conductor. In the semiconductor device D1, as in the semiconductor devices A1, B1, and C1, the third conduction path is a conduction path between the fifth electrodes 212 that are connected when the main current path is formed. The third conduction path and the fourth conduction path are at least partially parallel to each other, and the combined inductance of the third conduction path and the fourth conduction path is smaller than the inductance of the third conduction path. With this configuration, in the semiconductor device D1, as in the semiconductor device A1, the inductance between the fifth electrodes 212 (sources) of any two second semiconductor elements 21 adjacent in the first direction x is reduced by the fourth conduction path. Therefore, the semiconductor device D1 can suppress the occurrence of resonance when multiple second semiconductor elements 21 are operated in parallel.

[0148] In the semiconductor device D1, the power wiring portion 312 includes a protruding portion 312c that protrudes from the pad portion 312a and is disposed between two second semiconductor elements 21 adjacent to each other in the first direction x. The connection members 52B that are respectively bonded to the fifth electrodes 212 of the two second semiconductor elements 21 are bonded to the protruding portion 312c. With this configuration, the length of the fourth conduction path can be made shorter than the length of the third conduction path in any two second semiconductor elements 21 adjacent to each other in the first direction x. Furthermore, in the semiconductor device D1, the length of the fourth conduction path is shorter than the length of the third conduction path, so that the inductance of the fourth conduction path can be made smaller than the inductance of the third conduction path.

[0149] In the semiconductor device D1, a protrusion 312c is disposed between two second semiconductor elements 21 adjacent in the first direction x. For example, in the semiconductor device A1, the fourth electrodes 211 of two second semiconductor elements 21 adjacent in the first direction x are electrically connected to each other through a path that linearly connects these fourth electrodes 211 at the pad portion 313a. However, in the semiconductor device D1, the fourth electrodes 211 of two second semiconductor elements 21 adjacent in the first direction x are electrically connected to each other through a path that avoids the protrusion 312c at the pad portion 313a. In other words, in the semiconductor device D1, the protrusion 312c is disposed so as to interrupt the electrically conductive path that linearly connects two fourth electrodes 211 adjacent in the first direction x. Therefore, the electrically conductive path between the fourth electrodes 211 is extended compared to the semiconductor device A1. As a result, the inductance between the fourth electrodes 211 of the semiconductor device D1 is increased compared to the semiconductor device A1. Therefore, the semiconductor device D1 can further suppress the occurrence of the resonance phenomenon when a plurality of second semiconductor elements 21 are operated in parallel than the semiconductor device A1.

[0150] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways. For example, the present disclosure includes the embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: two first semiconductor elements each having a first electrode, a second electrode, and a third electrode, and a switching operation of which is controlled in response to a first drive signal input to the third electrode; a first conductor electrically connecting the second electrodes of the two first semiconductor elements; a second conductor electrically connecting the second electrodes of the two first semiconductor elements; and a first power terminal electrically connected to the first conductor and conducting to the second electrodes of the two first semiconductor elements, wherein the two first semiconductor elements are electrically connected in parallel, between the second electrodes of the two first semiconductor elements there are a first conduction path passing through the first conductor and a second conduction path passing through the second conductor, at least a portion of the first conduction path and the second conduction path are in a parallel relationship, and a combined inductance of the inductance of the first conduction path and the inductance of the second conduction path is smaller than the inductance of the first conduction path. The semiconductor device according to Supplementary Note 1, wherein an inductance of the second conduction path is smaller than an inductance of the first conduction path.Supplementary Note 3: The semiconductor device according to either Supplementary Note 1 or Supplementary Note 2, wherein the second conduction path is shorter than the first conduction path.Supplementary Note 4: The semiconductor device according to any of Supplementary Note 1 to Supplementary Note 3, further comprising: a first wiring portion and a second wiring portion spaced apart from each other; and a first connection member conducting to the second electrodes of each of the two first semiconductor elements, wherein the first wiring portion is conducting to the first electrodes of each of the two first semiconductor elements, the second wiring portion is joined to the first connection member and is conducting to the second electrodes of each of the two first semiconductor elements via the first connection member, and the first conductor includes a portion of the first connection member and a portion of the second wiring portion.Appendix 5. The semiconductor device according to Appendix 4, wherein each of the two first semiconductor elements has a first element main surface and a first element back surface spaced apart from each other in a thickness direction of the first semiconductor element, and in each of the two first semiconductor elements, the first electrode is arranged on the first element back surface, and the second electrode and the third electrode are arranged on the first element main surface. Appendix 6. The semiconductor device according to Appendix 5, wherein each of the two first semiconductor elements is mounted on the first wiring portion with the first element back surface facing the first wiring portion. Appendix 7. The semiconductor device according to Appendix 6, wherein the second conductor includes a second connecting member, and the second connecting member is bonded to the second electrode of each of the two first semiconductor elements. Appendix 8. The semiconductor device according to Appendix 7, wherein the second connecting member is a bonding wire. Appendix 9. the first connection member includes two strip-shaped portions spaced apart from each other and a linking portion sandwiched between the two strip-shaped portions and connected to the two strip-shaped portions, one of the two strip-shaped portions is bonded to the second electrode of one of the two first semiconductor elements and the second wiring portion, the other of the two strip-shaped portions is bonded to the second electrode of the other of the two first semiconductor elements and the second wiring portion, the first conductor includes a portion interposed between the two strip-shaped portions and portions of the second wiring portion where the two strip-shaped portions are bonded, and the second conductor includes the linking portion and a portion of each of the two strip-shaped portions from the portion bonded to the second electrode to the portion connected to the linking portion.Appendix 11. The semiconductor device according to Appendix 6, further comprising: a resin member covering at least a portion of each of the two first semiconductor elements; a wiring layer disposed above the first element main surface of each of the two first semiconductor elements and covered with the resin member; and a terminal portion exposed from the resin member and to which the first connection member is joined, wherein the terminal portion is electrically connected to the second electrode of each of the second first semiconductor elements, and the wiring layer is electrically connected to the second electrode of each of the two first semiconductor elements and overlaps the second electrode of each of the two first semiconductor elements when viewed in the thickness direction. Appendix 12. The semiconductor device according to claim 11, wherein the terminal portion includes two pad portions spaced apart from each other and to which the first connection member is joined, one of the two pad portions overlaps the second electrode of one of the two first semiconductor elements when viewed in the thickness direction, and the other of the two pad portions overlaps the second electrode of the other of the two first semiconductor elements when viewed in the thickness direction. The semiconductor device according to any one of Supplementary Note 6 to Supplementary Note 12, further comprising: two second semiconductor elements each having a fourth electrode, a fifth electrode, and a sixth electrode, and a switching operation of which is controlled in response to a second drive signal input to the sixth electrode; a third conductor electrically connecting the fifth electrodes of the two second semiconductor elements; a fourth conductor electrically connecting the fifth electrodes of the two second semiconductor elements; and a second power terminal electrically connected to the third conductor and conducting to the fifth electrodes of the two second semiconductor elements, wherein the two second semiconductor elements are electrically connected in parallel, between the fifth electrodes of the two second semiconductor elements there are a third conduction path passing through the third conductor and a fourth conduction path passing through the fourth conductor, the third conduction path and the fourth conduction path being at least partially in a parallel relationship, and a combined inductance of an inductance of the third conduction path and an inductance of the fourth conduction path being smaller than the inductance of the third conduction path. 14. The semiconductor device according to claim 13, wherein an inductance of the fourth conductive path is smaller than an inductance of the third conductive path.Appendix 15. The semiconductor device according to any one of Appendix 13 or Appendix 14, wherein the fourth conduction path is shorter than the third conduction path. Appendix 16. The semiconductor device according to any one of Appendix 13 to Appendix 15, further comprising: a third wiring portion spaced apart from each of the first wiring portion and the second wiring portion; and a third connection member conducting to the fifth electrode of each of the two second semiconductor elements, wherein the second wiring portion is conducting to the fourth electrode of each of the two second semiconductor elements, the third connection member is joined to the third wiring portion and is conducting to the fifth electrode of each of the two second semiconductor elements via the third connection member, and the third conductor includes a portion of the third connection member and a portion of the third wiring portion. Appendix 17. The semiconductor device according to Supplementary Note 16, further comprising a third power terminal connected to the first wiring portion, wherein the second power terminal and the third power terminal are input terminals for a DC voltage, the DC voltage is converted into an AC voltage by switching operations of the two first semiconductor elements and the two second semiconductor elements, and the first power terminal is an output terminal for the AC voltage. Supplementary Note 18. The semiconductor device according to any of Supplementary Note 13 to Supplementary Note 17, wherein each of the two second semiconductor elements is a MOSFET, the fourth electrode is a drain, the fifth electrode is a source, and the sixth electrode is a gate. Supplementary Note 19. The semiconductor device according to any of Supplementary Note 1 to Supplementary Note 18, wherein each of the two first semiconductor elements is a MOSFET, the first electrode is a drain, the second electrode is a source, and the third electrode is a gate.

[0151] A1, B1, B2, B3, C1, C2, D1: semiconductor device 1: first switching section 10a: main surface 10b: back surface 11: first semiconductor element 11a: first element main surface 11b: first element back surface 111: first electrode 112: second electrode 113: third electrode 12: resin member 13: wiring layer 14: main surface terminal section 141: first pad section 142: second pad section 15: back surface terminal section 151: pad section 161 to 164: interlayer electrodes 2: second switching section 20a: main surface 20b: back surface 21: second semiconductor element 21a: second element main surface 21b: second element back surface 211: fourth electrode 212: fifth electrode 213: sixth electrode 22: resin member 23: wiring layer 24: Main surface terminal portion 241: First pad portion 242: Second pad portion 25: Back surface terminal portion 251: Pad portion 261 to 264: Interlayer electrodes 30: Insulating substrate 30a: Main surface 30b: Back surface 311: Power wiring portion 311a: Pad portion 311b: Pad portion 311c: Extension portion 312: Power wiring portion 312a: Pad portion 312b: Pad portion 312c: Protrusion portion 312s: Slit 313: Power wiring portion 313a: Pad portion 313b: Pad portion 313c: Protrusion portion 321A, 321B: Signal wiring portion 322A, 322B: Signal wiring portion 323: Signal wiring portion 324: Signal wiring portion 329: Signal wiring portion 33A, 33B: Conductive substrate 34A, 34B: Insulating layers 41, 42, 43: Power terminals 44A, 44B, 45A, 45B, 46, 47, 48: Signal terminals 441, 451, 471: Holder 442, 452, 472: Metal pins 49: Insulating plate 51A, 51B: Connecting members 52A, 52B: Connecting members 531A, 531B: Connecting members 532A, 532B: Connecting members 541A, 541B: Connecting members 542A, 542B: Connecting members 55: Connecting members 56: Connecting members 57A, 57B: Connecting members 571A, 571B: Strip-shaped portions 572A, 572B: Linking portions 60: Heat sink 61: Case 62: Frame portion 63: Top plate 641 to 644: Terminal blocks 65: Resin member 7: Sealing member 71: Resin main surface 72: Resin back surface 73, 74: Resin side surface 91: Thermistor

Claims

1. two first semiconductor elements each having a first electrode, a second electrode, and a third electrode, and a switching operation of which is controlled in response to a first drive signal input to the third electrode; a first conductor electrically connecting the second electrodes of the two first semiconductor elements; a second conductor electrically connecting the second electrodes of the two first semiconductor elements; a first power terminal electrically connected to the first conductor and conducting to the second electrodes of the two first semiconductor elements; Equipped with the two first semiconductor elements are electrically connected in parallel; Between the second electrodes of the two first semiconductor elements, there is a first conductive path passing through the first conductor and a second conductive path passing through the second conductor; the first conductive path and the second conductive path are at least partially in parallel with each other, A semiconductor device, wherein a combined inductance of an inductance of the first conduction path and an inductance of the second conduction path is smaller than an inductance of the first conduction path.

2. The semiconductor device according to claim 1 , wherein an inductance of said second conductive path is smaller than an inductance of said first conductive path.

3. The semiconductor device according to claim 1 , wherein the second conductive path is shorter than the first conductive path.

4. a first wiring portion and a second wiring portion spaced apart from each other; a first connection member electrically connected to the second electrodes of the two first semiconductor elements; It also has the first wiring portion is electrically connected to the first electrodes of the two first semiconductor elements; the second wiring portion is joined to the first connection member and is electrically connected to the second electrodes of the two first semiconductor elements via the first connection member; The semiconductor device according to claim 1 , wherein the first conductor includes a part of the first connection member and a part of the second wiring portion.

5. each of the two first semiconductor elements has a first element main surface and a first element back surface spaced apart from each other in a thickness direction of the first semiconductor element; 5. The semiconductor device according to claim 4, wherein in each of the two first semiconductor elements, the first electrode is disposed on a rear surface of the first element, and the second electrode and the third electrode are disposed on a main surface of the first element.

6. The semiconductor device according to claim 5 , wherein each of the two first semiconductor elements is mounted on the first wiring portion with a back surface of the first element facing the first wiring portion.

7. the second conductor includes a second connection member; The semiconductor device according to claim 6 , wherein the second connection member is joined to the second electrodes of each of the two first semiconductor elements.

8. The semiconductor device according to claim 7 , wherein the second connection member is a bonding wire.

9. The first connection member includes two band-shaped portions spaced apart from each other, and a coupling portion sandwiched between the two band-shaped portions and connected to the two band-shaped portions, one of the two strip-shaped portions is joined to the second electrode of one of the two first semiconductor elements and to the second wiring portion; the other of the two strip-shaped portions is joined to the second electrode of the other of the two first semiconductor elements and to the second wiring portion; the first conductor includes a portion interposed between the two strip-shaped portions and a portion of the second wiring portion where the two strip-shaped portions are joined, 7. The semiconductor device according to claim 6, wherein the second conductor includes the coupling portion and a portion of each of the two strip portions extending from a portion joined to the second electrode to a portion connected to the coupling portion.

10. The semiconductor device according to claim 9 , wherein the connecting portion is connected to a portion of each of the two strip portions that overlaps with each of the two first semiconductor elements when viewed in the thickness direction.

11. a resin member covering at least a portion of each of the two first semiconductor elements; a wiring layer disposed above the first element main surfaces of the two first semiconductor elements and covered with the resin member; a terminal portion exposed from the resin member and to which the first connection member is joined; Further equipped with the terminal portion is electrically connected to the second electrode of each of the second first semiconductor elements; 7. The semiconductor device according to claim 6, wherein the wiring layer is electrically connected to the second electrodes of the two first semiconductor elements and overlaps the second electrodes of the two first semiconductor elements when viewed in the thickness direction.

12. the terminal portion includes two pad portions spaced apart from each other and to which the first connection member is joined; one of the two pad portions overlaps the second electrode of one of the two first semiconductor elements when viewed in the thickness direction; The semiconductor device according to claim 11 , wherein the other of the two pad portions overlaps the second electrode of the other of the two first semiconductor elements when viewed in the thickness direction.

13. two second semiconductor elements each having a fourth electrode, a fifth electrode, and a sixth electrode, and whose switching operation is controlled in response to a second drive signal input to the sixth electrode; a third conductor electrically connecting the fifth electrodes of the two second semiconductor elements; a fourth conductor electrically connecting the fifth electrodes of the two second semiconductor elements; a second power terminal electrically connected to the third conductor and conducting to the fifth electrodes of the two second semiconductor elements; It also has the two second semiconductor elements are electrically connected in parallel; a third conductive path passing through the third conductor and a fourth conductive path passing through the fourth conductor are present between the fifth electrodes of the two second semiconductor elements; the third conductive path and the fourth conductive path are at least partially in parallel with each other, 13 . The semiconductor device according to claim 6 , wherein a combined inductance of the third conduction path and an inductance of the fourth conduction path is smaller than an inductance of the third conduction path.

14. The semiconductor device according to claim 13 , wherein an inductance of the fourth conductive path is smaller than an inductance of the third conductive path.

15. The semiconductor device according to claim 13 , wherein the fourth conductive path is shorter than the third conductive path.

16. a third wiring portion spaced apart from each of the first wiring portion and the second wiring portion; a third connection member electrically connected to the fifth electrodes of the two second semiconductor elements; It also has the second wiring portion is electrically connected to the fourth electrodes of the two second semiconductor elements, the third wiring portion is joined to the third connection member and is electrically connected to the fifth electrodes of the two second semiconductor elements via the third connection member; The semiconductor device according to claim 13 , wherein the third conductor includes a part of the third connection member and a part of the third wiring portion.

17. a third power terminal connected to the first wiring portion; the second power terminal and the third power terminal are DC voltage input terminals, the DC voltage is converted into an AC voltage by switching operations of the two first semiconductor elements and the two second semiconductor elements; The semiconductor device according to claim 16 , wherein the first power terminal is an output terminal for the AC voltage.

18. Each of the two second semiconductor elements is a MOSFET; the fourth electrode is a drain; the fifth electrode is a source; The semiconductor device according to claim 13 , wherein the sixth electrode is a gate.

19. Each of the two first semiconductor elements is a MOSFET; the first electrode is a drain; the second electrode is a source; The semiconductor device according to claim 1 , wherein the third electrode is a gate.