High-voltage pulsed power supply device, gas laser oscillator, and laser processing machine

Abstract

A high-voltage pulsed power supply device (10) comprises an i-th capacitor (Ci), an i-th full-bridge inverter (Invi) that is connected to both ends of the i-th capacitor, a positive electrode–side diode (Dpi) that is connected at the cathode to one end of the i-th capacitor, and a negative electrode–side diode (Dni) that is connected at the anode to the other end of the i-th capacitor. One (Npi) and the other (Nni) output terminals of second and third full-bridge inverters (Inv2, Inv3) are respectively connected to the other and the one of the output terminals of adjacent full-bridge inverters. One (Np1) output terminal of a first full-bridge inverter (Inv1) is a power supply output terminal, and the other (Nn1) output terminal is connected to the second full-bridge inverter. One (Np4) output terminal of a fourth full-bridge inverter (Inv4) is connected to the third full-bridge inverter, and the other (Nn4) output terminal is a power supply output terminal.

Description

High-voltage pulse power supply, gas laser oscillator, and laser processing machine

[0001] The present disclosure relates to a high-voltage pulse power supply device that outputs high-voltage pulses, a gas laser oscillator, and a laser processing machine.

[0002] A gas laser oscillator is one example of a conventional application of a power supply device that outputs high-voltage pulses. The power supply circuit of a gas laser oscillator must apply a high-voltage pulse to discharge electrodes placed in a chamber filled with a laser medium such as carbon dioxide gas to excite the laser medium by generating a discharge between the electrodes.

[0003] Patent Document 1 discloses a pulse power supply for a plasma processing apparatus that outputs pulse voltages of various waveforms, such as those with variable rise and fall characteristics. This pulse power supply includes: a voltage pattern setting unit that stores voltage pattern information corresponding to at least one cycle of an output voltage waveform; a high voltage generation unit that generates, based on externally supplied AC power, a high voltage of either positive or negative polarity or both polarities according to a peak voltage value according to the voltage pattern information, the high voltage having an absolute value equal to or greater than the peak voltage value; a waveform shaping unit that is a multilevel converter employing a phase-shift PWM (Pulse Width Modulation) system that switches the high voltage provided by the high voltage generation unit or a voltage derived therefrom in accordance with changes in the pattern shape corresponding to the passage of time according to the voltage pattern information; and a filter that removes unnecessary signal components superimposed on the voltage waveform output from the waveform shaping unit.

[0004] JP 2023-25882 A

[0005] However, the pulse power supply for plasma processing equipment described in Patent Document 1 incorporates a high-frequency switching transformer in each component of a multilevel cascade converter, serving as an individual DC power supply for each inverter. The switching transformer is particularly susceptible to common-mode noise due to parasitic capacitance when driven at high frequencies, which can cause input power supply failure. Furthermore, reducing the parasitic capacitance requires designing a transformer with a low coupling coefficient, which increases the volume of the switching transformer and reduces the efficiency of the power supply. Therefore, with the prior art, it has been difficult to obtain a high-voltage pulse power supply with a long life and high efficiency.

[0006] The present disclosure has been made in view of the above, and has as its object to provide a high-voltage pulse power supply device that has a longer life and higher efficiency than conventional techniques.

[0007] In order to solve the above-mentioned problems and achieve the object, the present disclosure provides a high-voltage pulse power supply apparatus having a DC power supply, the high-voltage pulse power supply apparatus including: first to n-th capacitors each consisting of i-th capacitors numbered 1 to n, where n is an integer equal to or greater than 2 and i is an integer between 1 and n; first to n-th full-bridge inverters each including an i-th full-bridge inverter; a pair of power supply output terminals; first to n-th positive-side diodes each including an i-th positive-side diode; first to n-th negative-side diodes each including an i-th negative-side diode; and a gate controller. The first to n-th full-bridge inverters each have a pair of input terminals and a pair of output terminals, and the pair of input terminals is connected in parallel across the i-th capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals includes an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)-th full-bridge inverter. The first to nth positive-side diodes have cathodes connected to one end of the ith capacitor and anodes connected to the cathode of the (i+1)th positive-side diode and one end of the (i+1)th capacitor, or the positive side of the DC power supply. The first to nth negative-side diodes have anodes connected to the other end of the ith capacitor and cathodes connected to the anode of the (i+1)th negative-side diode and the other end of the (i+1)th capacitor, or the negative side of the DC power supply. The gate control unit controls the on / off of semiconductor switching elements included in the first to nth full-bridge inverters using gate signals.

[0008] The use of the technology according to the present disclosure has the effect of making it possible to provide a high-voltage pulse power supply device with a longer life and higher efficiency than conventional technology.

[0009] Circuit diagram showing a configuration example of a high-voltage pulse power supply device according to embodiment 1 Partial circuit diagram showing a configuration example of a main power supply circuit section included in high-voltage pulse power supply devices according to embodiments 1, 4 and 6 Diagram showing an example of the configuration of a processing circuit when the processing circuit of the gate control section included in the high-voltage pulse power supply device according to embodiment 1 is realized by a processor and memory Diagram showing an example of the configuration of a processing circuit when the processing circuit of the gate control section included in the high-voltage pulse power supply device according to embodiment 1 is realized by dedicated hardware Circuit diagram showing a configuration example of a high-voltage pulse power supply device according to embodiment 2 Partial circuit diagram showing a configuration example of a main power supply circuit section included in high-voltage pulse power supply devices according to embodiments 2, 4 and 5 FIG. 10 is a diagram showing the timing of switch switching operations and changes in output voltage and charging current in a high-voltage pulse power supply device according to a second embodiment. FIG. 11 is a circuit diagram showing a configuration example of a high-voltage pulse power supply device according to a third embodiment. FIG. 12 is a partial circuit diagram showing a configuration example of a main power supply circuit section included in the high-voltage pulse power supply device according to the third embodiment. FIG. 13 is a circuit diagram showing a configuration example of a high-voltage pulse power supply device according to a fourth embodiment. FIG. 14 is a partial circuit diagram showing a configuration example of a high-voltage pulse power supply device according to a fifth embodiment.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-voltage pulse power supply device, a gas laser oscillator, and a laser processing machine according to embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0011] Embodiment 1 (Component Elements) Fig. 1 is a circuit diagram showing an example of the configuration of a high-voltage pulse power supply device 10 according to embodiment 1. The high-voltage pulse power supply device 10 includes a main power supply circuit section 11 and a gate control section 12. In the example of Fig. 1, a discharge electrode section 13 is connected to the high-voltage pulse power supply device 10 as a load.

[0012] The main power supply circuit 11 includes a DC power supply V1, a positive-side diode Dpi, a negative-side diode Dni, a capacitor Ci, and a full-bridge inverter Invi. Here, i is an integer between 1 and n, and n is an integer equal to or greater than 2. In the first embodiment, the main power supply circuit 11 includes n positive-side diodes Dpi, n negative-side diodes Dni, capacitors Ci, and full-bridge inverters Invi. While the example in FIG. 1 illustrates a configuration where n=4, n can be freely selected depending on the required voltage. In the example in FIG. 1, the main power supply circuit 11 includes a DC power supply V1, positive-side diodes Dp1 to Dp4 including the positive-side diode Dpi, negative-side diodes Dn1 to Dn4 including the negative-side diode Dni, capacitors C1 to C4 including the capacitor Ci, and full-bridge inverters Inv1 to Inv4 including the full-bridge inverter Invi. The full-bridge inverter Invi also includes semiconductor switching elements Sj-i, where j is an integer between 1 and 4. That is, the full-bridge inverter Invi is configured with four semiconductor switching elements S1-i, S2-i, S3-i, and S4-i. Here, an example is shown in which each arm includes one semiconductor switching element Sj-i, but m semiconductor switching elements Sj-i may be connected in parallel to match the flowing current. Therefore, the main power supply circuit unit 11 includes 4×m×n semiconductor switching elements Sj-i.

[0013] An example of the configuration of the main power supply circuit section 11 included in the high-voltage pulse power supply device 10 according to embodiment 1 is shown in Fig. 2. The circuit configuration of the main power supply circuit section 11 shown in Fig. 2 also appears in the high-voltage pulse power supply devices 10 according to embodiment 4 (Fig. 10) and embodiment 6 (Fig. 13) described below. That is, Fig. 2 is a partial circuit diagram showing an example of the configuration of the main power supply circuit section 11 included in the high-voltage pulse power supply devices 10 according to embodiment 1, embodiment 4, and embodiment 6.

[0014] The full-bridge inverter Invi includes a pair of input terminals Ipi and Ini and a pair of output terminals Npi and Nni. The pair of input terminals Ipi and Ini are connected in parallel to both ends of the capacitor Ci. As described above, the full-bridge inverter Invi includes semiconductor switching elements S1-i, S2-i, S3-i, and S4-i. The full-bridge inverter Invi includes a left leg LegLi in which the semiconductor switching elements S1-i and S4-i are connected in series, a right leg LegRi in which the semiconductor switching elements S2-i and S3-i are connected in series, and the left leg LegLi and the right leg LegRi are connected in parallel. As shown in FIG. 2 , the output terminal Npi is located on the left leg LegLi, and the output terminal Nni is located on the right leg LegRi. In this document, the output terminal Npi of the pair of output terminals Npi and Nni may be referred to as "one of the output terminals" and the output terminal Nni may be referred to as "the other output terminal."

[0015] 1, the semiconductor switching elements Sj-i are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), but it is preferable that they are made of silicon, silicon carbide, gallium nitride, etc. Examples of semiconductor switching elements Sj-i other than MOSFETs include transistors and IGBTs (Insulated Gate Bipolar Transistors).

[0016] The positive side of the DC power supply V1 is connected to a positive-side diode Dp4, and the negative side is connected to a negative-side diode Dn4. Although the DC power supply V1 is depicted as a battery in Fig. 1, it actually outputs a DC voltage obtained by AC (Alternating Current) / DC (Direct Current) conversion of an AC voltage supplied from an external commercial AC power supply.

[0017] The discharge electrode unit 13 that generates laser oscillation includes resonance reactors L1 and L2 and a pair of discharge electrodes T. Here, the discharge electrode unit 13 uses a dielectric barrier discharge that can obtain a stable discharge without generating an arc, i.e., a spark. When generating a dielectric barrier discharge, the discharge electrode T may have a structure in which a metal electrode is covered with a dielectric. Examples of materials that can be used as the dielectric that covers the metal electrode include glass, alumina, and ceramic.

[0018] In the discharge electrode section 13, CO ２ When a high-frequency voltage is applied between the discharge electrodes T in a state where a laser medium such as a quartz crystal or the like is filled in the discharge electrode unit 13, a stable dielectric barrier discharge is generated between the discharge electrodes T. When the laser medium is excited in the discharge electrode unit 13 by discharge power equal to or greater than a specified power, laser oscillation occurs due to stimulated emission from the laser medium. Furthermore, since the discharge electrode T has a capacitive component and a resistive component, the discharge electrode unit 13 forms a series resonant circuit using reactors L1 and L2 during discharge to efficiently supply power to the discharge electrode T, and a resonant current flows through the discharge electrode T. Typically, the capacitance of the discharge electrode T is about several nF, and from the perspective of miniaturizing the reactors L1 and L2, the resonant frequency of the discharge electrode unit 13 is often several hundred kHz to several MHz.

[0019] (Connection) Next, the connections of the components will be described. A capacitor Ci is connected to the input of each full-bridge inverter Invi. The capacitor Ci is made of a ceramic, film, or other material that can be driven at high frequency, and it is desirable to select one with a capacitance sufficiently larger than the required amount of charge to be supplied. The cathode of a positive-side diode Dpi is connected to one positive terminal of the capacitor Ci, and the anode of a negative-side diode Dni is connected to the other negative terminal of the capacitor Ci. Furthermore, the positive-side diode Dpi is sequentially connected in series with a positive-side diode Dp(i+1), and the negative-side diode Dni is sequentially connected in series with a negative-side diode Dn(i+1). The anode of the lowest positive-side diode Dpn, which is connected in series with the positive-side diode Dpi, is connected to the positive side of the DC power supply V1, and the cathode of the lowest negative-side diode Dnn, which is connected in series with the negative-side diode Dni, is connected to the negative side of the DC power supply V1. That is, the cathode of the positive diode Dpi is connected to one end of the capacitor Ci, and the anode is connected to one end of the positive diode Dp(i+1) and one end of the capacitor C(i+1), or to the DC power supply V1. The anode of the negative diode Dni is connected to the other end of the capacitor Ci, and the cathode is connected to the anode of the negative diode Dn(i+1) and the other end of the capacitor C(i+1), or to the DC power supply V1.

[0020] With respect to the output section of the full-bridge inverter Invi, the output terminal Nni of the right leg LegRi is connected to the output terminal Np(i+1) of the left leg LegL(i+1) of the full-bridge inverter Inv(i+1). In the full-bridge inverters Inv1 to Invn connected in this manner, the output terminal Np1 of the left leg LegL1 of the uppermost full-bridge inverter Inv1 is connected to the reactor L1 of the discharge electrode unit 13, and the output terminal Nn4 of the right leg LegRn of the lowermost full-bridge inverter Invn is connected to the reactor L2 of the discharge electrode unit 13. That is, in the main power supply circuit 11, the output terminal Nn1 of the full-bridge inverter Inv1 to the output terminals Np2 and Nn2 of the full-bridge inverter Inv2, the output terminals Np3 and Nn3 of the full-bridge inverter Inv3, and the output terminal Np4 of the full-bridge inverter Inv4 are connected in series in this order. In the full-bridge inverter Inv1, the output terminal Np1 that is not connected to the full-bridge inverter Inv2 constitutes one of a pair of power supply output terminals, and in the full-bridge inverter Inv4, the output terminal Nn4 that is not connected to the full-bridge inverter Inv3 constitutes the other of the pair of power supply output terminals. One end of the reactor L1 is connected to one of the power supply output terminals, and the other end of the reactor L1 is connected to one end of the discharge electrode T. One end of the reactor L2 is connected to the other power supply output terminal, and the other end of the reactor L2 is connected to the other end of the discharge electrode T. In the full-bridge inverter Invi, the gates of the semiconductor switching elements S1-i, S2-i, S3-i, and S4-i are connected to a gate control unit 12 that performs switching operations.

[0021] Here, the configuration of the high-voltage pulse power supply 10 according to the first embodiment will be summarized. While Fig. 1 shows an example of the high-voltage pulse power supply 10 where n = 4, as mentioned above, n may be 2 or greater. Below, the configuration of the high-voltage pulse power supply 10 according to the first embodiment will be described generally without using reference numerals.

[0022] A high-voltage pulse power supply apparatus according to a first embodiment is a high-voltage pulse power supply apparatus equipped with a DC power supply, and includes: first to n-th capacitors each consisting of i-th capacitors numbered 1 to n, where n is an integer equal to or greater than 2 and i is an integer between 1 and n; first to n-th full-bridge inverters each including an i-th full-bridge inverter; a pair of power supply output terminals; first to n-th positive-side diodes each including an i-th positive-side diode; first to n-th negative-side diodes each including an i-th negative-side diode; and a gate control unit. The first to n-th full-bridge inverters each have a pair of input terminals and a pair of output terminals, and the pair of input terminals is connected in parallel across the i-th capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals includes an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)-th full-bridge inverter. The first to nth positive-side diodes have cathodes connected to one end of the ith capacitor and anodes connected to the cathode of the (i+1)th positive-side diode and one end of the (i+1)th capacitor, or the positive side of the DC power supply. The first to nth negative-side diodes have anodes connected to the other end of the ith capacitor and cathodes connected to the anode of the (i+1)th negative-side diode and the other end of the (i+1)th capacitor, or the negative side of the DC power supply. The gate control unit controls the on / off of semiconductor switching elements included in the first to nth full-bridge inverters using gate signals.

[0023] (Function) Next, the function of each component will be described. The DC power supply V1 applies a DC voltage to charge each capacitor Ci. The gate control unit 12 controls the on / off of the semiconductor switching elements Sj-i included in each full-bridge inverter Invi, i.e., controls the switching operation, and alternately turns on and off pairs of diagonal semiconductor switching elements Sj-i of the full-bridge inverter Invi to obtain an AC output from the high-voltage pulse power supply device 10. The gate control unit 12 controls the on / off of the semiconductor switching elements Sj-i included in each full-bridge inverter Invi using gate signals for the semiconductor switching elements Sj-i included in each full-bridge inverter Invi. Specifically, the gate control unit 12 obtains a positive output by turning on the semiconductor switching elements S1-i and S3-i of the full-bridge inverter Invi, and obtains a negative output by turning on the semiconductor switching elements S2-i and S4-i of the full-bridge inverter Invi. The outputs of each full-bridge inverter Invi are synchronized by the gate control unit 12. Therefore, the output voltages of the full-bridge inverters Invi are superimposed, and the voltage output to the discharge electrode unit 13 is a value obtained by multiplying the voltage of the DC power supply V1 by n.

[0024] In the full-bridge inverter Invi, in the left leg LegLi in which the semiconductor switching elements S1-i and S4-i are connected in series, the semiconductor switching elements S1-i and S4-i are not turned on at the same time. Similarly, in the right leg LegRi in which the semiconductor switching elements S2-i and S3-i are connected in series, the semiconductor switching elements S2-i and S3-i are not turned on at the same time.

[0025] When a pulse current flows through the discharge electrode 13, the charge stored in the capacitor Ci is released to the full-bridge inverter Invi. When the charge on the capacitor Ci decreases, the DC power supply V1 charges the capacitor Ci. Since each capacitor Ci is connected to a positive-side diode Dpi and a negative-side diode Dni, a charging current flows from the DC power supply V1 only when the voltage of the capacitor Ci is lower than the voltage of the DC power supply V1. When the semiconductor switching elements S1-i and S3-i of the full-bridge inverter Invi are turned on, the capacitors Ci are connected in series so that the capacitor C1 has a high potential. Therefore, no current flows through the positive-side diode Dpi. Since the negative-side diode Dni does not limit the current to the DC power supply V1, it is necessary to limit the current using a resistor or other device. Furthermore, when the semiconductor switching elements S2-i and S4-i of the full-bridge inverter Invi are turned on, the capacitors Ci are connected in series so that the capacitor C4 has a high potential. Therefore, no current flows through the negative diode Dni. In this case, the positive diode Dpi does not limit the current to the DC power supply V1, so it is necessary to limit the current using a resistor or the like.

[0026] As explained above, the high-voltage pulse power supply 10 according to the first embodiment is configured without using a switching transformer, which is prone to propagation of common-mode noise due to parasitic capacitance when driven at high frequencies, causing breakdowns in the input power supply and reducing the efficiency of the power supply. This makes it possible to obtain a high-voltage pulse power supply 10 that is longer-lived and more efficient than the prior art.

[0027] Next, the hardware configuration of the gate control unit 12 included in the high-voltage pulse power supply device 10 according to the first embodiment will be described. In the high-voltage pulse power supply device 10, the gate control unit 12 is realized by a processing circuit. The processing circuit may be a memory that stores a program and a processor that executes the program stored in the memory, or it may be dedicated hardware. The processing circuit may also be called a control circuit.

[0028] FIG. 3 is a diagram showing an example of the configuration of a processing circuit 90 when the processing circuit of the gate control unit 12 included in the high-voltage pulse power supply 10 according to the first embodiment is realized by a processor 91 and a memory 92. The processing circuit 90 shown in FIG. 9 is a control circuit and includes a processor 91 and a memory 92. When the processing circuit 90 is configured with the processor 91 and the memory 92, each function of the processing circuit 90 is realized by software, firmware, or a combination of software and firmware. The software or firmware is written as a program and stored in the memory 92. In the processing circuit 90, each function is realized by the processor 91 reading and executing the program stored in the memory 92. That is, the processing circuit 90 includes the memory 92 for storing a program that results in the processing of the gate control unit 12 included in the high-voltage pulse power supply 10. This program can also be said to be a program executed by the gate control unit 12 included in the high-voltage pulse power supply 10 realized by the processing circuit 90. This program may be provided by a storage medium on which the program is stored, or by other means such as a communication medium.

[0029] Here, the processor 91 is, for example, a CPU (Central Processing Unit), a processing device, an arithmetic device, a microprocessor, a microcomputer, or a DSP (Digital Signal Processor), etc. The memory 92 is, for example, a non-volatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, an EPROM (Erasable Programmable ROM), or an EEPROM (Electrically EPROM), a magnetic disk, a flexible disk, an optical disk, a compact disk, a minidisk, or a DVD (Digital Versatile Disc).

[0030] 4 is a diagram showing an example of the configuration of the processing circuit 93 when the processing circuit of the gate control unit 12 included in the high-voltage pulse power supply 10 according to the first embodiment is realized by dedicated hardware. The processing circuit 93 shown in FIG. 10 corresponds to, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof. The processing circuit 93 may be partially realized by dedicated hardware and partially realized by software or firmware. In this way, the processing circuit 93 can realize each of the above-described functions by dedicated hardware, software, firmware, or a combination thereof.

[0031] Embodiment 2. Figure 5 is a circuit diagram showing an example configuration of a high-voltage pulse power supply 10 according to embodiment 2. In the high-voltage pulse power supply 10 according to embodiment 1, each stage is insulated by a positive-side diode Dpi and a negative-side diode Dni. However, in this configuration, as the charging current from the DC power supply V1 increases, the conduction loss in the positive-side diode Dpi and the negative-side diode Dni increases, and the power supply efficiency decreases. In embodiment 2, in order to obtain a high-voltage pulse power supply 10 with high power supply efficiency, the positive-side diode Dpi and the negative-side diode Dni are replaced with a positive-side semiconductor switching element Spi and a negative-side semiconductor switching element Sni, respectively.

[0032] An example of the configuration of the main power supply circuit section 11 included in the high-voltage pulse power supply device 10 according to embodiment 2 is shown in Fig. 6. The circuit configuration of the main power supply circuit section 11 shown in Fig. 6 also appears in the high-voltage pulse power supply devices 10 according to embodiment 4 (Fig. 10) and embodiment 5 (Fig. 11) described below. That is, Fig. 6 is a partial circuit diagram showing an example of the configuration of the main power supply circuit section 11 included in the high-voltage pulse power supply devices 10 according to embodiment 2, embodiment 4, and embodiment 5.

[0033] Here, the configuration of the high-voltage pulse power supply 10 according to embodiment 2 will be summarized. In Fig. 5, an example of the high-voltage pulse power supply 10 according to embodiment 2 is shown where n = 4, but similar to embodiment 1, n may be 2 or more. Below, the configuration of the high-voltage pulse power supply 10 according to embodiment 2 will be described generally without using reference numerals.

[0034] A high-voltage pulse power supply device according to a second embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors each consisting of an ith capacitor (where n is an integer equal to or greater than 2 and i is an integer between 1 and n); first to n-th full-bridge inverters each including an ith full-bridge inverter; a pair of power supply output terminals; first to n-th positive-side semiconductor switching elements each including an ith positive-side semiconductor switching element; first to n-th negative-side semiconductor switching elements each including an ith negative-side semiconductor switching element; and a gate control unit. The first to n-th full-bridge inverters each have a pair of input terminals and a pair of output terminals, and the pair of input terminals is connected in parallel across the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals includes an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. Each of the first to n-th positive-side semiconductor switching elements, including the ith positive-side semiconductor switching element, has one end connected to one end of the ith capacitor and the other end connected to one end of the (i+1)th positive-side semiconductor switching element and one end of the (i+1)th capacitor, or the positive side of a DC power supply. Each of the first to n-th negative-side semiconductor switching elements, including the ith negative-side semiconductor switching element, has one end connected to the other end of the ith capacitor and the other end connected to one end of the (i+1)th negative-side semiconductor switching element and the other end of the (i+1)th capacitor, or the negative side of a DC power supply. The gate control unit controls the on / off of the semiconductor switching elements included in the first to n-th full-bridge inverters, as well as the first to n-th positive-side semiconductor switching elements and the first to n-th negative-side semiconductor switching elements, using gate signals.

[0035] (Discharge Gate Control) Next, discharge gate control will be described. In a gas laser oscillator, which is an application example of the high-voltage pulse power supply device 10, it is necessary to control the laser output depending on the application, and the power input to the discharge space is constantly controlled by the power supply. Fig. 7 is a diagram showing the timing of the switch switching operation and the changes in the output voltage and charging current in the high-voltage pulse power supply device 10 according to embodiment 2. Fig. 7 schematically shows the timing of the switch switching operation and the output voltage and charging current over time for switching control for efficiently generating a discharge current to be passed through the discharge electrode portion 13.

[0036] As shown in FIG. 7, a state in which semiconductor switching elements S1-i and S3-i are turned on and semiconductor switching elements S2-i and S4-i as well as positive side semiconductor switching element Spi and negative side semiconductor switching element Sni are turned off to output a positive side voltage is referred to as "State A," and a state in which semiconductor switching elements S2-i and S4-i are turned on and semiconductor switching elements S1-i, S3-i as well as positive side semiconductor switching element Spi and negative side semiconductor switching element Sni are turned off to output a negative side voltage is referred to as "State B." Furthermore, a state in which the semiconductor switching elements S1-i, S2-i, S3-i, S4-i and the positive side semiconductor switching element Spi and the negative side semiconductor switching element Sni are turned off is defined as "State C," and a state in which the semiconductor switching elements S1-i, S2-i, S3-i, S4-i are turned off and the positive side semiconductor switching element Spi and the negative side semiconductor switching element Sni are turned on, and charging of the capacitor Ci from the DC power supply V1 is defined as "State D."

[0037] In the high-voltage pulse power supply device 10 according to the second embodiment, insulation is achieved by the semiconductor switching elements S1-i, S2-i, S3-i, S4-i and the positive-side semiconductor switching element Spi and the negative-side semiconductor switching element Sni, so it is difficult to continuously perform repeated switching from state A to state B and switching from state B to state A over a long period of time. For this reason, the repeated operation between state A and state B is temporarily stopped, the device is switched to state C, and operation is performed in state D. Since it is necessary to charge the capacitor Ci during operation in state D, it is necessary to determine the operation time so that charging can be completed in time.

[0038] Similar to the first embodiment, the high-voltage pulse power supply 10 according to the second embodiment is configured without using a switching transformer, which is prone to propagation of common-mode noise due to parasitic capacitance when driven at high frequencies, causing failure of the input power supply and reducing the efficiency of the power supply. This makes it possible to obtain a high-voltage pulse power supply 10 that is long-lived and highly efficient compared to the prior art. Furthermore, the high-voltage pulse power supply 10 according to the second embodiment uses a positive-side semiconductor switching element Spi and a negative-side semiconductor switching element Sni instead of the positive-side diode Dpi and the negative-side diode Dni, making it possible to improve the power supply efficiency compared to the first embodiment.

[0039] Embodiment 3 In the high-voltage pulse power supply 10 according to embodiment 1, each stage is insulated by the positive-side diode Dpi and the negative-side diode Dni. However, since voltages are applied to the positive-side diode Dpi and the negative-side diode Dni in the positive and negative directions, it is necessary to limit the current flowing through the positive-side diode Dpi and the negative-side diode Dni. For this reason, in the high-voltage pulse power supply 10 according to embodiment 1, if a charging resistor or a diode is connected in series, losses increase during repeated driving, making it unsuitable for repeated driving.

[0040] In the high-voltage pulse power supply 10 according to the second embodiment, each stage is insulated by the positive-side semiconductor switching element Spi and the negative-side semiconductor switching element Sni. On the other hand, when MOSFETs having body diodes are used as the positive-side semiconductor switching element Spi and the negative-side semiconductor switching element Sni, it is necessary to limit the current as in the first embodiment. Furthermore, when transistors or IGBTs are used as the positive-side semiconductor switching element Spi and the negative-side semiconductor switching element Sni, these elements generally have low resistance to reverse voltage, which can lead to element damage due to application of an overvoltage. In the third embodiment, a high-voltage pulse power supply 10 that can address this issue will be described.

[0041] FIG. 8 is a circuit diagram showing a configuration example of a high-voltage pulse power supply 10 according to a third embodiment. FIG. 9 is a partial circuit diagram showing a configuration example of a main power supply circuit unit 11 included in the high-voltage pulse power supply 10 according to the third embodiment. In the high-voltage pulse power supply 10 according to the third embodiment, the positive semiconductor switching element Spi shown in FIGS. 5 and 6 is replaced with an i-th positive semiconductor switching element consisting of a set of a first positive semiconductor switching element Sp1-i and a second positive semiconductor switching element Sp2-i connected in series. The negative semiconductor switching element Sni shown in FIGS. 5 and 6 is replaced with an i-th negative semiconductor switching element consisting of a set of a first negative semiconductor switching element Sn1-i and a second negative semiconductor switching element Sn2-i connected in series. While FIGS. 8 and 9 show two serially connected i-th positive and i-th negative semiconductor switching elements, the number of serially connected i-th positive and i-th negative semiconductor switching elements may be three or more.

[0042] Here, the configuration of the high-voltage pulse power supply 10 according to embodiment 3 will be summarized. Although Fig. 8 shows an example of the high-voltage pulse power supply 10 according to embodiment 3 where n = 4, similarly to embodiment 2, n may be any number equal to or greater than 2. Below, the configuration of the high-voltage pulse power supply 10 according to embodiment 3 will be described generally without using reference numerals.

[0043] A high-voltage pulse power supply device according to a third embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors each consisting of i-th capacitors numbered 1 to n, where n is an integer equal to or greater than 2 and i is an integer between 1 and n; first to n-th full-bridge inverters each including an i-th full-bridge inverter; a pair of power supply output terminals; first to n-th positive-side semiconductor switching elements each including two or more i-th positive-side semiconductor switching elements connected in series; first to n-th negative-side semiconductor switching elements each including two or more i-th negative-side semiconductor switching elements connected in series; and a gate control unit. The first to n-th full-bridge inverters each have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel across the i-th capacitor. The output terminals of the first to nth full-bridge inverters are connected in series, and a pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the nth full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. Each of the first to nth positive-side semiconductor switching elements, including two or more series-connected i-th positive-side semiconductor switching elements, has one end connected to one end of the i-th capacitor and the other end connected to one end of the two or more series-connected i+1th positive-side semiconductor switching elements and one end of the i+1th capacitor, or the positive side of a DC power supply. Each of the first to nth negative-side semiconductor switching elements, including two or more series-connected i-th negative-side semiconductor switching elements, has one end connected to the other end of the i-th capacitor and the other end connected to one end of the two or more series-connected i+1th negative-side semiconductor switching elements and the other end of the i+1th capacitor, or the negative side of a DC power supply.The gate control unit controls the on / off of the semiconductor switching elements included in the first to nth full-bridge inverters, as well as the first to nth positive-side semiconductor switching elements and the first to nth negative-side semiconductor switching elements, using gate signals.

[0044] In the high-voltage pulse power supply device 10 according to the third embodiment, the gate controls of the first positive semiconductor switching element Sp1-i and the second positive semiconductor switching element Sp2-i and the first negative semiconductor switching element Sn1-i and the second negative semiconductor switching element Sn2-i are always synchronized. The timing of the switching operation of these elements and the time course of the output voltage are the same as those in the second embodiment.

[0045] Furthermore, during discharge in state A and state B, the first positive-side semiconductor switching element Sp1-i and the second positive-side semiconductor switching element Sp2-i, and the first negative-side semiconductor switching element Sn1-i and the second negative-side semiconductor switching element Sn2-i are all turned off. If MOSFETs with body diodes are used for these elements, the polarities of the two body diodes are opposite, so no current flows through the elements regardless of whether a positive or negative voltage is applied. Furthermore, if transistors or IGBTs are used for these elements, a positive voltage is applied to each element, so there is no risk of element damage due to overvoltage application.

[0046] Like the first embodiment, the high-voltage pulse power supply 10 according to the third embodiment is configured without using a switching transformer, which is prone to propagation of common-mode noise due to parasitic capacitance during high-frequency operation, causing failure of the input power supply and reducing power supply efficiency. This makes it possible to obtain a high-voltage pulse power supply 10 that has a longer life and higher efficiency than the prior art. Furthermore, the high-voltage pulse power supply 10 according to the third embodiment uses, instead of the positive-side diode Dpi and the negative-side diode Dni, two or more first positive-side semiconductor switching elements Sp1-i and second positive-side semiconductor switching elements Sp2-i connected in series, and two or more first negative-side semiconductor switching elements Sn1-i and second negative-side semiconductor switching elements Sn2-i connected in series. This makes it possible to improve power supply efficiency compared to the first embodiment and to relax current limitations during repeated use compared to the second embodiment.

[0047] Embodiment 4. In Embodiments 1 to 3, the same type of elements are used as elements connected to the DC power supply V1. While Embodiment 3 has superior effects compared to the above-described Embodiments 1 and 2, it has the disadvantage of increasing the number of gate drive circuits not shown in FIG. 1 and the like, which may result in increased costs in practical use and a more complex structure in a high-voltage device.

[0048] Furthermore, in the first to third embodiments, diodes or semiconductor switching elements are used as elements connected to the DC power supply V1, but it is also possible to use inductors instead of these elements. When the semiconductor switching elements Sj-i of the full-bridge inverter Invi operate, high-frequency components such as pulse currents are limited by the inductors arranged on the positive and negative sides, so that the DC power supply V1 and the capacitor Ci can be insulated from each other.

[0049] In any case, configurations using diodes, semiconductor switching elements, and inductors each have their own characteristics in terms of the magnitude of loss, structural complexity, pulse width limitations, etc., and it is necessary to adopt an appropriate configuration according to the desired voltage waveform and current waveform. In light of this, in embodiment 4 and embodiments 5 and 6 described below, configurations using multiple types of elements are adopted rather than using one type of element.

[0050] Fig. 10 is a circuit diagram showing a configuration example of a high-voltage pulse power supply 10 according to a fourth embodiment. The high-voltage pulse power supply 10 according to the fourth embodiment has a configuration in which the positive-side diodes Dp3 and Dp4 in the configuration of Fig. 1 are replaced with positive-side semiconductor switching elements Sp3 and Sp4, and the negative-side diodes Dn3 and Dn4 are replaced with negative-side semiconductor switching elements Sn3 and Sn4. The high-voltage pulse power supply 10 according to the fourth embodiment may also be considered to have a configuration in which the positive-side semiconductor switching elements Sp1 and Sp2 in the configuration of Fig. 5 are replaced with positive-side diodes Dp1 and Dp2, and the negative-side semiconductor switching elements Sn1 and Sn2 are replaced with negative-side diodes Dn1 and Dn2. The positive-side semiconductor switching elements Sp3 and Sp4 and the negative-side semiconductor switching elements Sn3 and Sn4 may each be a set of two or more series-connected semiconductor switching elements, as in the configurations of Figs. 8 and 9.

[0051] Here, the configuration of the high-voltage pulse power supply 10 according to embodiment 4 will be summarized. Although Fig. 10 shows an example of the high-voltage pulse power supply 10 according to embodiment 4 where n = 4, similarly to embodiments 1 to 3, n may be 2 or more. Below, the configuration of the high-voltage pulse power supply 10 according to embodiment 4 will be described generally without using reference numerals.

[0052] A high-voltage pulse power supply device according to a fourth embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors constituted by ith capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; first to n-th full-bridge inverters including the ith full-bridge inverter; a pair of power supply output terminals; first to k-th positive-side diodes including the p-th positive-side diode; first to k-th negative-side diodes including the p-th negative-side diode; first to n-th positive-side semiconductor switching elements including the q-th positive-side semiconductor switching element; The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel across the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side diodes, including the p-th positive-side diode, have cathodes connected to one end of the p-th capacitor and anodes connected to one end of the p+1th capacitor and the cathode of the p+1th positive-side diode, or one end of the p+1th capacitor and one end of one or more q-th positive-side semiconductor switching elements connected in series. The first to kth negative-side diodes including the pth negative-side diode have anodes connected to the other end of the pth capacitor and cathodes connected to the other end of the p+1th capacitor and the anode of the p+1th negative-side diode, or the other end of the p+1th capacitor and one end of one or more qth negative-side semiconductor switching elements connected in series.The first positive-side semiconductor switching element to the n-kth positive-side semiconductor switching element, including the qth positive-side semiconductor switching element, have one end connected to one end of the qth capacitor and the other end connected to one end of the q+1th capacitor and one end of one or more q+1th positive-side semiconductor switching elements connected in series, or the positive side of a DC power supply. The first negative-side semiconductor switching element to the n-kth negative-side semiconductor switching element, including the qth negative-side semiconductor switching element, have one end connected to the other end of the qth capacitor and the other end connected to the other end of the q+1th capacitor and one end of one or more q+1th negative-side semiconductor switching elements connected in series, or the negative side of a DC power supply. The gate control unit controls the on / off of the semiconductor switching elements included in the first to nth full-bridge inverters, as well as the first positive-side semiconductor switching element to the nth positive-side semiconductor switching element and the first negative-side semiconductor switching element to the nth negative-side semiconductor switching element, using gate signals.

[0053] 10 shows a configuration in which the element closer to the DC power supply V1 is a semiconductor switching element and the element farther from the DC power supply V1 is a diode, but these arrangements may be reversed. That is, in a high-voltage pulse power supply device according to a modification of the fourth embodiment, the element closer to the DC power supply V1 may be a diode and the element farther from the DC power supply V1 may be a semiconductor switching element. This configuration can be generally described without using reference numerals as follows:

[0054] a first capacitor to an n-th capacitor constituted by ith capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; a pair of power supply output terminals; first to k-th positive side semiconductor switching elements including one or more p-th positive side semiconductor switching elements connected in series; first to k-th negative side semiconductor switching elements including one or more p-th positive side semiconductor switching elements connected in series; first to k-th positive side diodes including the q-th positive side diode; The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel across the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side semiconductor switching elements, including one or more series-connected p-th positive-side semiconductor switching elements, have one end connected to one end of the p-th capacitor and the other end connected to one end of the p+1th capacitor and one end of the one or more series-connected p+1th positive-side semiconductor switching elements, or one end of the p+1th capacitor and the cathode of the p+1th positive-side diode.The first to kth negative-side semiconductor switching elements, including one or more series-connected pth positive-side semiconductor switching elements, have one end connected to the other end of the pth capacitor and the other end connected to the other end of the p+1th capacitor and one end of one or more series-connected p+1th negative-side semiconductor switching elements, or the other end of the p+1th capacitor and the anode of the p+1th negative-side diode. The first to n-kth positive-side diodes, including the qth positive-side diode, have their cathodes connected to one end of the qth capacitor and their anodes connected to one end of the q+1th capacitor and the cathode of the q+1th positive-side diode, or the positive side of a DC power supply. The first to n-kth negative-side diodes, including the qth negative-side diode, have their anodes connected to the other end of the qth capacitor and their cathodes connected to the other end of the q+1th capacitor and the anode of the q+1th negative-side diode, or the negative side of a DC power supply. The gate control unit controls the on / off of the semiconductor switching elements included in the first to nth full-bridge inverters, as well as the first to nth positive-side semiconductor switching elements and the first to nth negative-side semiconductor switching elements, using gate signals.

[0055] A supplementary note on the circuit configuration of Figure 10 . In the configuration of the high-voltage pulse power supply 10 common to this paper, capacitor Ci is charged from a single DC power supply V1 through elements connected in series, but the charging current is diverted from the side closest to the DC power supply V1 and flows to capacitor Ci. That is, the largest current flows through the element closest to the DC power supply V1, and the smallest current flows through the element farthest from the DC power supply V1. Therefore, when configuring the high-voltage pulse power supply 10 by combining diodes and semiconductor switching elements, it is desirable to arrange the semiconductor switching elements closer to the DC power supply V1 and the diodes farther from the DC power supply V1, as shown in Figure 10 . The configuration shown in Figure 10 makes it possible to reduce conduction loss and improve power supply efficiency.

[0056] Fifth Embodiment Fig. 11 is a circuit diagram showing a configuration example of a high-voltage pulse power supply 10 according to a fifth embodiment. Fig. 12 is a partial circuit diagram showing a configuration example of a main power supply circuit unit 11 included in a high-voltage pulse power supply 10 according to the fifth embodiment. The high-voltage pulse power supply 10 according to the fifth embodiment has a configuration in which the positive-side semiconductor switching elements Sp1 and Sp2 are replaced with positive-side inductors Lp1 and Lp2, and the negative-side semiconductor switching elements Sn1 and Sn2 are replaced with negative-side inductors Ln1 and Ln2 in the configuration of Fig. 5. That is, the high-voltage pulse power supply 10 according to the fifth embodiment has a configuration in which inductors and semiconductor switching elements are combined. Note that the positive-side semiconductor switching elements Sp3 and Sp4 and the negative-side semiconductor switching elements Sn3 and Sn4 may each be a set of two or more series-connected semiconductor switching elements, as in the configurations of Figs. 8 and 9.

[0057] Here, the configuration of the high-voltage pulse power supply 10 according to embodiment 5 will be summarized. In Fig. 11, an example of the high-voltage pulse power supply 10 according to embodiment 5 is shown where n = 4, but similar to embodiments 1 to 4, n may be 2 or more. Below, the configuration of the high-voltage pulse power supply 10 according to embodiment 5 will be described generally without using reference numerals.

[0058] A high-voltage pulse power supply device according to a fifth embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors constituted by ith capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; first to n-th full-bridge inverters including the ith full-bridge inverter; a pair of power supply output terminals; first to k-th positive-side inductors including the p-th positive-side inductor; first to k-th negative-side inductors including the p-th negative-side inductor; first to k-th positive-side semiconductor switching elements including the q-th positive-side semiconductor switching element; The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel to both ends of the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series in sequence, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side inductors, including the p-th positive-side inductor, have one end connected to one end of the p-th capacitor and the other end connected to one end of the p+1th capacitor and one end of the p+1th positive-side inductor, or one end of the p+1th capacitor and one end of one or more q-th positive-side semiconductor switching elements connected in series. The first negative pole side inductor to the kth negative pole side inductor, including the pth negative pole side inductor, have one end connected to the other end of the pth capacitor and the other end connected to the other end of the p+1th capacitor and one end of the p+1th negative pole side inductor, or the other end of the p+1th capacitor and one end of one or more qth negative pole side semiconductor switching elements connected in series.The first positive-side semiconductor switching element to the n-kth positive-side semiconductor switching element, including the qth positive-side semiconductor switching element, have one end connected to one end of the qth capacitor and the other end connected to one end of the q+1th capacitor and one end of one or more q+1th positive-side semiconductor switching elements connected in series, or the positive side of a DC power supply. The first negative-side semiconductor switching element to the n-kth negative-side semiconductor switching element, including the qth negative-side semiconductor switching element, have one end connected to the other end of the qth capacitor and the other end connected to the other end of the q+1th capacitor and one end of one or more q+1th negative-side semiconductor switching elements connected in series, or the negative side of a DC power supply. The gate control unit controls the on / off of the semiconductor switching elements included in the first to nth full-bridge inverters, as well as the first positive-side semiconductor switching element to the nth positive-side semiconductor switching element and the first negative-side semiconductor switching element to the nth negative-side semiconductor switching element, using gate signals.

[0059] 11 shows a configuration in which the element closer to the DC power supply V1 is a semiconductor switching element and the element farther from the DC power supply V1 is an inductor, but these arrangements may be reversed. That is, in a high-voltage pulse power supply device according to a modification of the fifth embodiment, the element closer to the DC power supply V1 may be an inductor and the element farther from the DC power supply V1 may be a semiconductor switching element. This configuration can be generally described without using reference numerals as follows:

[0060] a first capacitor to an n-th capacitor constituted by i-th capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; first full bridge inverters to an n-th full bridge inverter including an i-th full bridge inverter; a pair of power supply output terminals; first positive side semiconductor switching element to a k-th positive side semiconductor switching element including one or more series-connected p-th positive side semiconductor switching elements; first negative side semiconductor switching element to a k-th negative side semiconductor switching element including one or more series-connected p-th positive side semiconductor switching elements; The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel across the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side semiconductor switching elements, including one or more series-connected p-th positive-side semiconductor switching elements, have one end connected to one end of the p-th capacitor and the other end connected to one end of the p+1th capacitor and one end of the one or more series-connected p+1th positive-side semiconductor switching elements, or one end of the p+1th capacitor and one end of the p+1th positive-side inductor.The first negative-side semiconductor switching element to the k-th negative-side semiconductor switching element, including one or more series-connected p-th positive-side semiconductor switching elements, have one end connected to the other end of the p-th capacitor and the other end connected to the other end of the p+1-th capacitor and one end of one or more series-connected p+1-th negative-side semiconductor switching elements, or the other end of the p+1-th capacitor and the p+1-th negative-side inductor. The first positive-side inductor to the n-k-th positive-side inductor, including the q-th positive-side inductor, have one end connected to one end of the q-th capacitor and the other end connected to one end of the q+1-th capacitor and one end of the q+1-th positive-side inductor, or the positive side of a DC power supply. The first negative-side inductor to the n-k-th negative-side inductor, including the q-th negative-side inductor, have one end connected to the other end of the q-th capacitor and the other end connected to the other end of the q+1-th capacitor and one end of the q+1-th negative-side inductor, or the negative side of a DC power supply. The gate control unit controls the on / off of the semiconductor switching elements included in the first to nth full-bridge inverters, as well as the first to nth positive-side semiconductor switching elements and the first to nth negative-side semiconductor switching elements, using gate signals.

[0061] A supplementary note on the circuit configuration of FIG. 11 will be provided. When semiconductor switching elements and inductors are combined, the inductors operate to limit high-frequency components such as pulse current when the semiconductor switching elements Sj-i of the full-bridge inverter Invi operate. This operation provides insulation between the DC power supply V1 and the capacitor Ci. The inductor not only blocks high-frequency components during discharge, but also delays the rise of current during charging. This effect is best achieved by reducing the current flowing through the inductor. Therefore, when configuring a high-voltage pulse power supply 10 by combining semiconductor switching elements and inductors, it is desirable to arrange the semiconductor switching elements closer to the DC power supply V1 and the inductors farther from the DC power supply V1, as shown in FIG. 11.

[0062] 11, the DC power supply V1 charges the capacitor Ci after the switching operation of the semiconductor switching elements Sj-i of the full-bridge inverter Invi has stopped. Therefore, the user of the high-voltage pulse power supply 10 determines the inductance of the positive-side inductor Lpi and the negative-side inductor Lni depending on the pulse width to be output. Furthermore, when the pulse width to be output is large, the user selects positive-side inductor Lpi and negative-side inductor Lni with sufficiently large inductance.

[0063] Sixth Embodiment Fig. 13 is a circuit diagram showing a configuration example of a high-voltage pulse power supply 10 according to a sixth embodiment. The high-voltage pulse power supply 10 according to the sixth embodiment has a configuration in which the positive-side diodes Dp3, Dp4 in the configuration of Fig. 1 are replaced with positive-side inductors Lp3, Lp4, and the negative-side diodes Dn3, Dn4 are replaced with negative-side inductors Ln3, Ln4. In other words, the high-voltage pulse power supply 10 according to the sixth embodiment has a configuration in which diodes and inductors are combined.

[0064] Here, the configuration of the high-voltage pulse power supply 10 according to embodiment 6 will be summarized. Although Fig. 13 shows an example of the high-voltage pulse power supply 10 according to embodiment 6 where n = 4, similarly to embodiments 1 to 5, n may be 2 or more. Below, the configuration of the high-voltage pulse power supply 10 according to embodiment 6 will be described generally without using reference numerals.

[0065] A high-voltage pulse power supply device according to a sixth embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors constituted by ith capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; first to n-th full-bridge inverters including the ith full-bridge inverter; a pair of power supply output terminals; first to k-th positive-side diodes including the p-th positive-side diode; first to k-th negative-side diodes including the p-th negative-side diode; first to n-th positive-side inductors including the q-th positive-side inductor; first to n-th negative-side inductors including the q-th negative-side inductor; and a gate control unit. The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel across the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side diodes, including the p-th positive-side diode, have cathodes connected to one end of the p-th capacitor and anodes connected to one end of the p+1th capacitor and the cathode of the p+1th positive-side diode, or one end of the p+1th capacitor and one end of one or more q-th positive-side semiconductor switching elements connected in series. The first to kth negative-side diodes including the pth negative-side diode have anodes connected to the other end of the pth capacitor and cathodes connected to the other end of the p+1th capacitor and the anode of the p+1th negative-side diode, or the other end of the p+1th capacitor and one end of one or more qth negative-side semiconductor switching elements connected in series.Each of the first positive-side inductor to the n-kth positive-side inductor, including the qth positive-side inductor, has one end connected to one end of the qth capacitor and the other end connected to one end of the q+1th capacitor and one end of the q+1th positive-side inductor, or the positive side of the DC power supply. Each of the first negative-side inductor to the n-kth negative-side inductor, including the qth negative-side inductor, has one end connected to the other end of the qth capacitor and the other end connected to the other end of the q+1th capacitor and one end of the q+1th negative-side inductor, or the negative side of the DC power supply. The gate control unit controls the on / off of semiconductor switching elements included in the first to nth full-bridge inverters using gate signals.

[0066] 13 shows a configuration in which the element closer to the DC power supply V1 is an inductor and the element farther from the DC power supply V1 is a diode, but these arrangements may be reversed. That is, in a high-voltage pulse power supply device according to a modification of the sixth embodiment, the element closer to the DC power supply V1 may be a diode and the element farther from the DC power supply V1 may be an inductor. This configuration can be generally described without using reference numerals as follows:

[0067] A high-voltage pulse power supply device according to a modification of the sixth embodiment is a high-voltage pulse power supply device equipped with a DC power supply, and includes: first to n-th capacitors constituted by ith capacitors from 1 to n, where n is an integer of 2 or more, i is an integer from 1 to n, k is an integer of 1 to n-1, p is an integer from 1 to k, and q is an integer from k+1 to n; first to n-th full-bridge inverters including the ith full-bridge inverter; a pair of power supply output terminals; first to k-th positive-side inductors including the p-th positive-side inductor; first to k-th negative-side inductors including the p-th negative-side inductor; first to k-th positive-side diodes including the q-th positive-side diode; first to n-th negative-side diodes including the q-th negative-side diode; and a gate control unit. The first to n-th full-bridge inverters, including the ith full-bridge inverter, have a pair of input terminals and a pair of output terminals, and the pair of input terminals are connected in parallel to both ends of the ith capacitor. The output terminals of the first to n-th full-bridge inverters are connected in series, and the pair of power supply output terminals is composed of an output terminal of the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal of the n-th full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The first to k-th positive-side inductors, including the p-th positive-side inductor, have one end connected to one end of the p-th capacitor and the other end connected to one end of the p+1-th capacitor and one end of the p+1-th positive-side inductor, or one end of the p+1-th capacitor and the cathode of the q-th positive-side diode. The first negative side inductor to the kth negative side inductor, including the pth negative side inductor, have one end connected to the other end of the pth capacitor and the other end connected to the other end of the p+1th capacitor and one end of the p+1th negative side inductor, or the other end of the p+1th capacitor and the anode of the qth negative side diode.The first positive-side diode to the n-kth positive-side diode, including the qth positive-side diode, have their cathodes connected to one end of the qth capacitor and their anodes connected to one end of the q+1th capacitor and the cathode of the q+1th positive-side diode, or the positive side of the DC power supply. The first negative-side diode to the n-kth negative-side diode, including the qth negative-side diode, have their anodes connected to the other end of the qth capacitor and their cathodes connected to the other end of the q+1th capacitor and the anode of the q+1th negative-side diode, or the negative side of the DC power supply. The gate control unit controls the on / off of semiconductor switching elements included in the first to nth full-bridge inverters using gate signals.

[0068] A supplementary note about the circuit configuration in Figure 13: When a diode and an inductor are combined, the inductor acts to limit high-frequency components such as pulse current when the semiconductor switching element Sj-i of the full-bridge inverter Invi operates. This action isolates the DC power supply V1 from the capacitor Ci.

[0069] Furthermore, in the configuration of the common high-voltage pulse power supply 10 described herein, capacitor Ci is charged from a single DC power supply V1 through elements connected in series, but the charging current is shunted from the side closest to the DC power supply V1 and flows to capacitor Ci. That is, the largest current flows through the element closest to the DC power supply V1, and the smallest current flows through the element farthest from the DC power supply V1. Therefore, when configuring the high-voltage pulse power supply 10 by combining a diode and an inductor, it is desirable to configure the inductor on the side closest to the DC power supply V1 and the diode on the side farthest from the DC power supply V1, as shown in Figure 13. The configuration shown in Figure 13 makes it possible to reduce conduction loss and improve power supply efficiency.

[0070] 13, the DC power supply V1 charges the capacitor Ci after the switching operation of the semiconductor switching elements Sj-i of the full-bridge inverter Invi has stopped. Therefore, the user of the high-voltage pulse power supply 10 determines the inductance of the positive-side inductor Lpi and the negative-side inductor Lni depending on the pulse width to be output. Furthermore, when the pulse width to be output is large, the user selects positive-side inductor Lpi and negative-side inductor Lni with sufficiently large inductance.

[0071] Embodiment 7 (Gas Laser Oscillator) The high-voltage pulse power supply devices 10 shown in embodiments 1 to 6 can be used in gas laser oscillators. Fig. 14 is a diagram showing an example of the configuration of a gas laser oscillator 20 according to embodiment 7. The gas laser oscillator 20 includes the high-voltage pulse power supply device 10 and a discharge electrode portion 13c.

[0072] The high-voltage pulse power supply 10 has the functions described in Embodiments 1 to 6. The discharge electrode unit 13c includes resonant reactors L1 and L2, electrode plates E1 and E2, dielectrics D1 and D2, and a carbon dioxide pipe DT. In Fig. 14, of the two output terminals included in the high-voltage pulse power supply 10, one output terminal is connected to one terminal of the reactor L1, and the other output terminal is connected to one terminal of the reactor L2. The other terminal of the reactor L1 is connected to the electrode plate E1, and the other terminal of the reactor L2 is connected to the electrode plate E2. The dielectric D1 is connected to the back surface of the electrode plate E1, the dielectric D2 is connected to the back surface of the electrode plate E2, and the carbon dioxide pipe DT is connected between the dielectrics D1 and D2.

[0073] In the gas laser oscillator 20, when the high-voltage pulse power supply 10 outputs a high-voltage pulse to the discharge electrode 13c, a discharge current is generated in the carbon dioxide pipe DT, which excites carbon dioxide molecules and causes laser oscillation. By configuring the gas laser oscillator 20 using the high-voltage pulse power supply 10 as described above, the efficiency can be improved and the repetition frequency of laser oscillation can be increased.

[0074] Eighth Embodiment (Laser Processing Machine) In an eighth embodiment, a case will be described in which the gas laser oscillator 20 described in the seventh embodiment is mounted on a laser processing machine and used.

[0075] Fig. 15 is a diagram showing an example of the configuration of a laser processing machine 30 according to embodiment 8. The laser processing machine 30 includes a gas laser oscillator 20, an interface 21, a control device 22, a transmission optical system 23, a calculation unit 24, a power meter 25, and a work table 26. In Fig. 15, the interface is abbreviated as I / F.

[0076] The interface 21 includes a terminal for allowing a user of the laser processing machine 30 to input processing conditions. The interface 21 is connected to a control device 22.

[0077] The control device 22 is connected to the gas laser oscillator 20, the transmission optical system 23, the calculation unit 24, the power meter 25, and the work table 26, and transmits and receives control signals to and from each of these components. When the laser processing machine 30 emits a laser, the control device 22 first transmits a control signal to the gas laser oscillator 20. Based on the control signal received from the control device 22, the gas laser oscillator 20 drives the high-voltage pulse power supply 10 to emit laser light. The transmission optical system 23, operated by the control device 22, shapes and positions the laser light emitted from the gas laser oscillator 20. At the same time, the work table 26, operated by the control device 22, adjusts the position of the laser light irradiated onto the workpiece 27. After determining the position, the transmission optical system 23 first irradiates the laser without the workpiece 27 present. The power meter 25, connected to the work table 26, measures the laser output from the transmission optical system 23. The power meter 25 transmits the measurement value to the calculation unit 24. The calculation unit 24 calculates a pulse irradiation pattern based on the measurement values ​​acquired from the power meter 25 and transmits the pulse irradiation pattern to the control device 22. The laser processing machine 30 places the workpiece 27 on the work table 26 and processes the workpiece 27 based on the pulse irradiation pattern determined in this manner.

[0078] The laser processing machine 30 is configured using the gas laser oscillator 20 as described above, and thus the repetition frequency of the laser oscillation can be increased, thereby improving production efficiency.

[0079] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention.

[0080] 10 High voltage pulse power supply device, 11 Main power supply circuit section, 12 Gate control section, 13, 13c Discharge electrode section, 20 Gas laser oscillator, 21 Interface, 22 Control device, 23 Transmission optical system, 24 Calculation section, 25 Power meter, 26 Work table, 27 Work, 30 Laser processing machine, 90, 93 Processing circuit, 91 Processor, 92 Memory, C1 to C4, Ci Capacitor, D1, D2 Dielectric, DT Carbon dioxide gas pipe, Dn1 to Dn4, Dni, Dnn Negative side diode, Dp1 to Dp4, Dpi, Dpn Positive side diode, E1, E2 Electrode plate, Inv1 to Inv4, Invi, Invn Full bridge inverter, Ini, Ipi Input terminal, L1, L2 Reactor, LegL1, LegLi Left leg, LegRi, LegRn right leg, Ln1 to Ln4, Lni negative side inductors, Lp1 to Lp4, Lpi positive side inductors, Nn1 to Nn4, Nni, Np1 to Np4, Npi output terminals, S1-i to S4-i, Sj-i semiconductor switching elements, Sn1 to Sn4, Sni negative side semiconductor switching element, Sn1-i first negative side semiconductor switching element, Sn2-i second negative side semiconductor switching element, Sp1 to Sp4, Spi positive side semiconductor switching element, Sp1-i first positive side semiconductor switching element, Sp2-i second positive side semiconductor switching element, T discharge electrode, V1 DC power supply.

Claims

1. A high-voltage pulse power supply device equipped with a DC power supply, Let n be an integer greater than or equal to 2, i be an integer from 1 to n, k be an integer from 1 to n-1, p be an integer from 1 to k, and q be an integer from k+1 to n. A first capacitor to an nth capacitor, which is composed of the i-th capacitor numbered from 1 to n, A first full-bridge inverter to an nth full-bridge inverter, including an i-th full-bridge inverter having a pair of input terminals and a pair of output terminals, wherein the pair of input terminals are connected in parallel to both ends of the i-capacitor, The output terminals from the first full-bridge inverter to the nth full-bridge inverter are connected in series in sequence, and a pair of power output terminals are provided, consisting of an output terminal in the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal in the nth full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. A first positive-side inductor to a k positive-side inductor, one end of which is connected to one end of the p-th capacitor, and the other end of which is connected to one end of the p+1 capacitor and one end of the p+1 positive-side inductor, or one end of the p+1 capacitor and one end of one or more series-connected q-th positive-side semiconductor switching elements, The first negative electrode inductor, which includes a p negative electrode inductor, has one end connected to the other end of the p capacitor, and the other end is connected to the other end of the p+1 capacitor and one end of the p+1 negative electrode inductor, or to the other end of the p+1 capacitor and one end of one or more q negative electrode semiconductor switching elements connected in series, to the k negative electrode inductor, One end of a first positive-side semiconductor switching element is connected to one end of the q-th capacitor, and the other end of a first positive-side semiconductor switching element, which includes one end of the q+1 capacitor and one or more series-connected positive-side semiconductor switching elements, or a q-th positive-side semiconductor switching element connected to the positive side of the DC power supply, to the n-k positive-side semiconductor switching elements, A first negative electrode semiconductor switching element to an n-k negative electrode semiconductor switching element, one end of which is connected to the other end of the q capacitor, and the other end of which is connected to the other end of the q+1 capacitor and one or more q+1 negative electrode semiconductor switching elements connected in series, or to the q negative electrode semiconductor switching element connected to the negative side of the DC power supply, A gate control unit controls the on / off switching of semiconductor switching elements included in the nth full-bridge inverter from the first full-bridge inverter, as well as the nth positive semiconductor switching element from the first positive semiconductor switching element and the nth negative semiconductor switching element from the first negative semiconductor switching element, based on a gate signal. A high-voltage pulse power supply device characterized by comprising the following features.

2. A high-voltage pulse power supply device equipped with a DC power supply, Let n be an integer greater than or equal to 2, i be an integer from 1 to n, k be an integer from 1 to n-1, p be an integer from 1 to k, and q be an integer from k+1 to n. A first capacitor to an nth capacitor, which is composed of the i-th capacitor numbered from 1 to n, A first full-bridge inverter to an nth full-bridge inverter, including an i-th full-bridge inverter having a pair of input terminals and a pair of output terminals, wherein the pair of input terminals are connected in parallel to both ends of the i-capacitor, The output terminals from the first full-bridge inverter to the nth full-bridge inverter are connected in series in sequence, and a pair of power output terminals are provided, consisting of an output terminal in the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal in the nth full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. One end of a first positive-side semiconductor switching element is connected to one end of the p-th capacitor, and the other end of a first positive-side semiconductor switching element to a k-th positive-side semiconductor switching element, which includes one or more series-connected p-th positive-side semiconductor switching elements connected to one end of the p+1-th capacitor and one end of the p+1-th positive-side inductor, A first negative-side semiconductor switching element to a k-th negative-side semiconductor switching element, one end of which is connected to the other end of the p-th capacitor, and the other end of which is connected to the other end of the p+1 capacitor and one or more p+1 negative-side semiconductor switching elements connected in series, or one or more p-th negative-side semiconductor switching elements connected to the other end of the p+1 capacitor and the other end of the p+1 negative-side inductor, One end is connected to one end of the q capacitor, and the other end is connected to one end of the q+1 capacitor and one end of the q+1 positive side inductor, or to the q positive side inductor connected to the positive side of the DC power supply, from the first positive side inductor to the n-k positive side inductors, One end is connected to the other end of the q capacitor, and the other end is connected to the other end of the q+1 capacitor and one end of the q+1 negative side inductor, or to the q negative side inductor which is connected to the negative side of the DC power supply, from the first negative side inductor to the n-k negative side inductors, A gate control unit controls the on / off switching of semiconductor switching elements included in the nth full-bridge inverter from the first full-bridge inverter, as well as the nth positive semiconductor switching element from the first positive semiconductor switching element and the nth negative semiconductor switching element from the first negative semiconductor switching element, based on a gate signal. A high-voltage pulse power supply device characterized by comprising the following features.

3. A high-voltage pulse power supply device equipped with a DC power supply, Let n be an integer greater than or equal to 2, i be an integer from 1 to n, k be an integer from 1 to n-1, p be an integer from 1 to k, and q be an integer from k+1 to n. A first capacitor to an nth capacitor, which is composed of the i-th capacitor numbered from 1 to n, A first full-bridge inverter to an nth full-bridge inverter, including an i-th full-bridge inverter having a pair of input terminals and a pair of output terminals, wherein the pair of input terminals are connected in parallel to both ends of the i-capacitor, The output terminals from the first full-bridge inverter to the nth full-bridge inverter are connected in series in sequence, and a pair of power output terminals are provided, consisting of an output terminal in the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal in the nth full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. The cathode is connected to one end of the p-th capacitor, and the anode is connected to one end of the p+1-th capacitor and the cathode of the p+1-th positive diode, or to one end of the p+1-th capacitor and one end of the q-th positive inductor, and the first positive diode to the k-th positive diode, The anode is connected to the other end of the p-th capacitor, and the cathode is connected to the other end of the p+1-th capacitor and the anode of the p+1-th negative diode, or to the other end of the p+1-th capacitor and one end of the q-th negative inductor, and the first negative diode to the k-th negative diode, One end is connected to one end of the q capacitor, and the other end is connected to one end of the q+1 capacitor and one end of the q+1 positive side inductor, or to the q positive side inductor connected to the positive side of the DC power supply, from the first positive side inductor to the n-k positive side inductors, One end is connected to the other end of the q capacitor, and the other end is connected to the other end of the q+1 capacitor and one end of the q+1 negative side inductor, or to the q negative side inductor which is connected to the negative side of the DC power supply, from the first negative side inductor to the n-k negative side inductors, A gate control unit that controls the on / off switching of semiconductor switching elements included in the n full-bridge inverter from the first full-bridge inverter by a gate signal, A high-voltage pulse power supply device characterized by comprising the following features.

4. A high-voltage pulse power supply device equipped with a DC power supply, Let n be an integer greater than or equal to 2, i be an integer from 1 to n, k be an integer from 1 to n-1, p be an integer from 1 to k, and q be an integer from k+1 to n. A first capacitor to an nth capacitor, which is composed of the i-th capacitor numbered from 1 to n, A first full-bridge inverter to an nth full-bridge inverter, including an i-th full-bridge inverter having a pair of input terminals and a pair of output terminals, wherein the pair of input terminals are connected in parallel to both ends of the i-capacitor, The output terminals from the first full-bridge inverter to the nth full-bridge inverter are connected in series in sequence, and a pair of power output terminals are provided, consisting of an output terminal in the first full-bridge inverter that is not connected to the second full-bridge inverter and an output terminal in the nth full-bridge inverter that is not connected to the (n-1)th full-bridge inverter. One end is connected to one end of the p-th capacitor, and the other end is connected to one end of the p+1-th capacitor and one end of the p+1-th positive inductor, or to one end of the p+1-th capacitor and the cathode of the q-th positive diode, including the first positive inductor to the k-th positive inductor, One end of the first negative inductor is connected to the other end of the p-th capacitor, and the other end of the first negative inductor is connected to the other end of the p+1-th capacitor and one end of the p+1-th negative inductor, or to the other end of the p+1-th capacitor and the anode of the q-th negative diode, and the negative inductors range from the first negative inductor to the k-th negative inductor, The cathode is connected to one end of the q capacitor, and the anode is connected to one end of the q+1 capacitor and the cathode of the q+1 positive diode, or to the q positive diode connected to the positive side of the DC power supply, from the first positive diode to the n-k positive diodes, The anode is connected to the other end of the q capacitor, and the cathode is connected to the other end of the q+1 capacitor and the anode of the q+1 negative diode, or to the q negative diode connected to the negative side of the DC power supply, from the first negative diode to the n-k negative diodes, A gate control unit that controls the on / off switching of semiconductor switching elements included in the n full-bridge inverter from the first full-bridge inverter by a gate signal, A high-voltage pulse power supply device characterized by comprising the following features.

5. A gas laser oscillator characterized by comprising a high-voltage pulse power supply device according to any one of claims 1 to 4.

6. A laser processing machine characterized by comprising the gas laser oscillator described in claim 5.