Glass substrate having through via with vertical section and method of manufacturing the same

Abstract

The present invention relates to a glass substrate having a through-via formed by penetrating from a first surface to a second surface of the glass substrate, wherein the through-via comprises a first tapered section in which the diameter decreases inwardly from a first opening on the first surface side, a second tapered section in which the diameter decreases inwardly from a second opening on the second surface side, and a vertical section located between the two tapered sections, the sidewall of which is substantially parallel to the thickness direction of the glass substrate. The vertical section has a predetermined axial length while maintaining the minimum diameter of the through-via, and an electroplated growth bonding surface of a conductive metal filled inside the through-via is formed within the vertical section. Due to the presence of the vertical section, the allowable range of electroplating pinching is extended from a point to a finite length section, thereby dramatically improving the process margin, and circumferential pinching uniformity is ensured due to the uniform diameter of the vertical section, thereby achieving high-quality metal filling without voids.

Description

Technology Field

[0001] The present invention relates to a through-glass via (TGV) structure formed in a glass substrate, and more specifically, to a glass substrate having a through-glass via having a first tapered section in which the diameter decreases as it extends inward from a first surface side, a second tapered section in which the diameter decreases as it extends inward from a second surface side, and a vertical section located between the first tapered section and the second tapered section, the sidewall of which is substantially parallel to the thickness direction of the glass substrate, and a method for manufacturing the same. The glass substrate according to the present invention can be applied to various semiconductor packaging applications, such as an interposer for a semiconductor package, a core substrate for a flip-chip ball grid array (FC-BGA), and a glass panel for panel level packaging (PLP). Background Technology

[0003] As the integration density and computational speed of high-performance semiconductor chips, such as artificial intelligence (AI) computing processors, GPUs (Graphics Processing Units), and High Bandwidth Memory (HBM), increase rapidly, the demand for semiconductor packaging technology to interconnect these chips is rising exponentially. In particular, for next-generation AI accelerator packages, the size of a single package is expanding to more than three times the limit, and consequently, the demand for large-area interposer substrates is surging.

[0004] Glass substrates are attracting attention as next-generation interposer materials because they possess low dielectric loss compared to silicon substrates, a coefficient of thermal expansion (CTE) similar to silicon, ease of forming large-area panels, and high thermal and dimensional stability. To utilize glass substrates as interposers, it is essential to secure electrical connections by forming conductive paths, or through-vias (TGVs), that penetrate the substrate in the vertical direction and filling them with conductive metal.

[0005] In conventional TGV formation technology, a laser-damage-and-etch process combining laser modification and wet etching is primarily used. In this process, a damage track is formed in the thickness direction by irradiating a glass substrate with an ultrashort pulse laser, and then the damage track is preferentially etched by immersing it in an etching solution such as hydrofluoric acid (HF) to form a through-via. The TGV formed by this process typically has an hourglass shape, and etching proceeds symmetrically from both sides of the glass substrate, forming a waist with a minimum diameter in the center of the via.

[0006] In a conventional hourglass-shaped TGV, the waist is formed at the point where two tapered sections meet. That is, the tapered section from the first side and the tapered section from the second side meet at a single intersection point, and this intersection point becomes the location of the minimum diameter of the via. The filling of the conductive metal inside the through-via is performed by an electroplating process, in which metal ions in the plating solution grow inward from the openings on both sides of the via and join at the waist position to form a metal bridge, and the remaining space is filled starting from this bridge.

[0007] However, in conventional punctual waist structures, the location where the growth fronts on both sides can be joined during electroplating is geometrically fixed to a single plane. This results in the following problems.

[0008] First, the allowable range for process deviation is extremely narrow. If the arrival times of the plating fronts on both sides are slightly misaligned, the bonding surface is pushed from the droplet waist into the tapered section. In the tapered section, the diameter changes according to the axial position, so the shape of the bonding surface becomes non-uniform, and consequently, the plating solution becomes trapped, making it easy for voids to form. In other words, the droplet waist is a structure in which the process margin of plating pinching geometrically converges to zero.

[0009] Second, it is difficult to ensure uniformity of bonding in the circumferential direction. Since the droplet waist forms an intersecting shape where two tapered slopes meet, if there is a slight diameter deviation in the circumferential direction, pinching occurs first only in a part of the circumference, and the plating solution gets trapped in the remaining part, leading to voids or seams.

[0010] Third, the location where the plating joint surface is formed coincides exactly with the stress concentration point. In hourglass vias, the minimum diameter portion has the minimum cross-sectional area, making it the location where stress is maximally concentrated during thermal cycling, and the plating joint surface (i.e., the interface between the two growth fronts) can be microstructurally weaker compared to the bulk metal. As these two weaknesses overlap at the same location, the probability of crack formation increases and long-term reliability is reduced.

[0011] Therefore, there is a need for a new TGV structure that can extend the spatial range where the formation of the electroplated joint surface is allowed from a point to a finite length section, maintain a uniform diameter within the section to improve circumferential pinching uniformity, and simultaneously achieve stress concentration relief effects. The problem to be solved

[0013] The present invention aims to solve the problems of the aforementioned prior art by providing a through-via structure that can significantly improve process margins by inserting a vertical section between two tapered sections of a through-via, wherein the sidewall is substantially parallel to the thickness direction of the glass substrate, thereby expanding the spatial range where electroplating pinching is allowed from a point to a section having a finite axial length, and achieve high-quality metal filling without voids by improving circumferential pinching uniformity through the uniform diameter of the vertical section, and improve long-term reliability by separating the position of the plating bonding surface from the stress concentration point.

[0014] Another objective of the present invention is to provide a method for manufacturing a through via having the vertical portion. means of solving the problem

[0016] To achieve the above objective, a glass substrate having a through-via according to one embodiment of the present invention comprises a glass substrate and a through-via formed by penetrating from a first surface to a second surface of the glass substrate. The through-via comprises a first tapered section in which the diameter decreases as it extends inward from a first opening on the first surface side, a second tapered section in which the diameter decreases as it extends inward from a second opening on the second surface side, and a vertical section located between the first tapered section and the second tapered section, the vertical section having a sidewall substantially parallel to the thickness direction of the glass substrate. The vertical section has a predetermined axial length in the thickness direction while maintaining the minimum diameter of the through-via. A conductive metal is filled inside the through-via, and an electroplated growth bonding surface of the conductive metal is formed within the vertical section.

[0017] A method for manufacturing a glass substrate having a through-via according to another embodiment of the present invention comprises the steps of: forming a through-via that penetrates from a first surface to a second surface of a glass substrate, wherein the through-via comprises a first tapered section in which the diameter decreases as it extends inward from the first surface side, a second tapered section in which the diameter decreases as it extends inward from the second surface side, and a vertical section between the first tapered section and the second tapered section having a sidewall substantially parallel to the thickness direction of the glass substrate and having a predetermined axial length while maintaining a minimum diameter; and filling the interior of the through-via with a conductive metal by electroplating, wherein plating layers growing from the first opening side and the second opening side, respectively, are joined within the vertical section to form a growth bonding surface. Effects of the invention

[0019] According to the present invention, the following effects can be achieved.

[0020] First, the process margin of electroplating pinching is extended from a point to a section having a finite axial length. In conventional hourglass-shaped TGVs, the waist is a single intersection point where two tapered sections meet, so the position where the two plating fronts can be joined during electroplating is geometrically fixed to a single plane. If the arrival time of the two plating fronts is slightly misaligned due to process deviation, the joining surface is pushed into the tapered section, resulting in non-uniform joining in the region where the diameter changes and leading to voids. On the other hand, in the present invention, since the vertical section has a predetermined axial length, the entire length of the vertical section becomes the pinching allowance section. Since the diameter is the same regardless of where the plating front is joined within the vertical section, uniform pinching is guaranteed. This has the effect of dramatically improving the structural tolerance for process deviation by extending the spatial range where the formation of the joining surface is allowed from a point to a line during the process of a conductive metal growing and joining inside the through-via. This effect can only be achieved by a structure in which a section of uniform diameter is intentionally inserted between the tapered sections in the inner wall profile of the through via, and cannot be structurally achieved with a conventional dotted waist structure.

[0021] Second, the uniform diameter of the vertical section improves circumferential pinching uniformity and suppresses voids. In conventional spot waists, since the shape is an intersection where two tapered slopes meet, if there is a local diameter deviation in the circumferential direction, pinching occurs first only in a part of the circumference, and the plating solution gets trapped in the remaining part. In contrast, in the vertical section, the sidewall is substantially parallel to the thickness direction of the glass substrate, so the diameter is uniform in the circumferential direction; thus, pinching proceeds simultaneously across the entire circumference, achieving complete closure without plating solution trapping. This effect demonstrates that even with the same minimum diameter, the circumferential bonding uniformity is fundamentally different when the minimum diameter exists as a point versus when it exists as a vertical section of finite length. This implies that the axial range in which the minimum diameter is maintained, rather than the absolute value of the minimum diameter, is the dominant factor determining pinching quality.

[0022] Third, long-term reliability is improved as the location of the plated bonding surface is separated from the point of maximum stress concentration. In an hourglass-shaped via, the spot waist has the minimum cross-sectional area, making it the location where stress is maximally concentrated during thermal cycling, and simultaneously, where the plated bonding surface is formed. Since the plated bonding surface is the interface between the two growth fronts, it can be microstructurally weaker compared to the bulk metal. As these two weaknesses—stress concentration and microstructural weakness—overlap at the same location, the probability of crack occurrence increases. In the present invention, since the vertical section has a predetermined axial length, the stress distribution within the vertical section is dispersed axially, and because the plated bonding surface is formed at a specific location within the vertical section, it does not necessarily coincide with the point of maximum stress. Accordingly, the overlap of stress concentration and microstructural weakness is mitigated, thereby improving long-term reliability.

[0023] Fourth, by controlling the axial length of the vertical section, the electrical characteristics and plating processability of the through-via can be independently optimized. As the axial length of the vertical section increases, the pinching allowance expands, increasing the process margin; however, since the minimum diameter range becomes longer, the electrical resistance increases. If the axial length of the vertical section is short, the electrical resistance decreases, but the process margin is reduced. By utilizing this trade-off relationship, the axial length of the vertical section can be designed within a range of 3% to 25% of the glass substrate thickness, thereby selecting an optimal point that simultaneously satisfies electrical performance and process reliability.

[0024] Fifth, the boundary between the first tapered section and the vertical section and the boundary between the second tapered section and the vertical section can be formed as a rounded section having a radius of curvature, in which case stress concentration caused by abrupt shape changes in the tapered-vertical transition section is further relieved.

[0025] Sixth, the vertical section structure of the present invention is applicable not only to symmetric structures where the diameters of the openings on both sides are the same, but also to asymmetric structures where the diameters of the openings on both sides are different. In cases where the diameters of the openings on both sides are different, the position of the bonding surface is deflected within the vertical section due to the difference in plating growth rates on both sides; however, since bonding is performed within the axial length of the vertical section, pinching within the uniform diameter range is still guaranteed.

[0026] Seventh, since the vertical diameters of the power supply vias and signal transmission vias can be designed differently, the electrical characteristics of the power supply network (PDN) and the signal transmission path can be independently optimized within the same glass substrate.

[0027] Eighth, compared to conventional dot waist structures, the vertical section structure of the present invention improves uniformity between vias in large-area panel level manufacturing. In large-area panels, minute variations in laser irradiation and etching conditions are inevitable depending on the location; in dot waist structures, these variations are directly transferred to variations in waist diameter and location, causing variations in plating quality between vias. On the other hand, in the vertical section structure, the axial length of the vertical section functions as a buffer to absorb these process variations, thereby improving the uniformity of plating quality between vias and improving the yield at the large-area panel level. Brief explanation of the drawing

[0029] Figure 1 is a cross-sectional view of a conventional symmetric hourglass TGV structure. Figure 2 is a cross-sectional view of a conventional conical TGV structure. FIG. 3 is a cross-sectional view of a TGV structure having a vertical section according to one embodiment of the present invention. Figure 4 is an enlarged view comparing a conventional droplet waist and the vertical section of the present invention. Figure 5 is a cross-sectional view with dimensions indicating the relationship between the axial length of the vertical section and the thickness of the glass substrate. Figure 6 is an enlarged cross-sectional view showing the allowable range of the side wall inclination angle of the vertical section. FIG. 7 is a cross-sectional view of a symmetrical embodiment in which the inclination angles of the first tapered section and the second tapered section are the same. FIG. 8 is a cross-sectional view of an asymmetric embodiment in which the inclination angles of the first tapered section and the second tapered section are different. FIG. 9 is a cross-sectional view of an embodiment in which the diameter of the first opening and the diameter of the second opening are different. FIG. 10 is a comparative cross-sectional view of an embodiment in which the vertical portion is located at the center in the thickness direction and an embodiment formed at a biased position. Figure 11 is a cross-sectional view of a field via structure fully filled with copper. Figure 12 is a cross-sectional view of a conformal lining structure. FIG. 13 is a flowchart of the electroplating growth process of a TGV equipped with a vertical section. Figure 14 is a comparison diagram of the plating bonding process and void generation in a conventional spot waste. Figure 15 is a detailed diagram of the plating bonding process within the vertical section. FIG. 16 is an enlarged cross-sectional view showing the rounded portion of the tapered-vertical boundary. Figure 17 is a cross-sectional view of a vertical TGV structure with a resin buffer layer formed thereon. FIG. 18 is a plan view and a cross-sectional view of a plurality of vertical TGVs arranged in an array. FIG. 19 is a cross-sectional view showing the difference in vertical diameter between a power supply via and a signal transmission via. FIG. 20 is a cross-sectional view of an example of interposer application. Figure 21 is a cross-sectional view of an example of an AI accelerator package application. Figure 22 is a cross-sectional view of an example of FC-BGA core substrate application. Fig. 23 is a plan view of a glass panel for panel-level packaging. Figure 24 is an explanatory diagram showing the relationship between the laser beam intensity distribution and the formation of a vertical section during laser transformation. Figure 25 is a graph showing the relationship between the vertical axis length and the plating pinching process margin. Figure 26 is a graph showing the relationship between the ratio of the vertical section diameter to the opening diameter and the electrical resistance. Specific details for implementing the invention

[0031] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. Embodiments of the present invention may be modified in various different forms, and the scope of the present invention is not limited to the embodiments described below.

[0033] FIG. 1 illustrates a conventional symmetric hourglass TGV structure. A conventional through-via (10') is formed by penetrating from a first surface (101') to a second surface (102') of a glass substrate (100'), and a drop waist (30') is formed in the center of the via. The drop waist (30') is an intersection point where two tapered sections meet, and is a geometric point that has no axial length. During electroplating, the plating fronts on both sides are joined simultaneously at the drop waist (30'), making it easy for a void (V) to form.

[0035] FIG. 2 illustrates a conventional conical TGV structure. The conventional conical through-via (10'') has a tapered structure in which the diameter decreases monotonically from a large-diameter opening on the first surface (101'') to a small-diameter opening on the second surface (102''), and there is no minimum diameter portion inside.

[0037] Referring to FIG. 3, a glass substrate (1000) having a through-via according to a first embodiment of the present invention comprises a glass substrate (100) and a through-via (10) formed by penetrating from a first surface (101) to a second surface (102) of the glass substrate (100).

[0039] The glass substrate (100) may be made of borosilicate glass, aluminosilicate glass, or fused silica. The thickness (t) of the glass substrate (100) may be selected from a range of 100 μm or more and 500 μm or less, preferably 200 μm to 400 μm. The coefficient of thermal expansion (CTE) of the glass substrate (100) may be selected from a range of 3.0 ppm / °C to 4.0 ppm / °C, similar to the CTE of silicon (about 2.6 ppm / °C).

[0041] The through via (10) includes a first tapered section (20) in which the diameter decreases as it moves inward from a first opening (11) on the first surface (101) side, a second tapered section (25) in which the diameter decreases as it moves inward from a second opening (12) on the second surface (102) side, and a vertical section (30) located between the first tapered section (20) and the second tapered section (25) and having a side wall substantially parallel to the thickness direction of the glass substrate (100).

[0043] The first tapered section (20) has an inclined sidewall in which the diameter gradually decreases from the diameter (D1) of the first opening (11) to the diameter (Dv) of the vertical section (30). The sidewall inclination angle (α1) of the first tapered section (20) is measured with respect to the thickness direction of the glass substrate (100) (i.e., the longitudinal direction of the through via (10)) and can be selected in the range of 1° or more and 15° or less.

[0045] The second tapered section (25) has an inclined sidewall in which the diameter gradually decreases from the diameter (D2) of the second opening (12) to the diameter (Dv) of the vertical section (30). The sidewall inclination angle (α2) of the second tapered section (25) is measured with respect to the thickness direction of the glass substrate (100) and can be selected from a range of 1° to 15°. The sidewall inclination angle (α1) of the first tapered section (20) and the sidewall inclination angle (α2) of the second tapered section (25) may be the same or different from each other.

[0047] The vertical section (30) has a predetermined axial length (Lv) in the thickness direction of the glass substrate (100) while maintaining the minimum diameter (Dv) of the through via (10). The side wall (31) of the vertical section (30) is substantially parallel to the thickness direction of the glass substrate (100) and, specifically, has an angle of inclination within ±2°. It is preferable that the axial length (Lv) of the vertical section (30) be 3% or more and 25% or less of the thickness (t) of the glass substrate (100). For example, when the thickness (t) of the glass substrate (100) is 300 μm, the axial length (Lv) of the vertical section (30) is selected from a range of 9 μm or more and 75 μm or less. It is preferable that the diameter (Dv) of the vertical section (30) be 20% or more and 70% or less of the larger diameter of the first opening (11) and the second opening (12).

[0049] The diameter (D1) of the first opening (11) or the diameter (D2) of the second opening (12) can be selected from a range of 20 μm or more and 100 μm or less. The aspect ratio of the through-via (10) is defined as the value obtained by dividing the thickness (t) of the glass substrate (100) by the larger diameter of the first opening (11) and the second opening (12), and is preferably 5:1 or more and 20:1 or less.

[0051] The boundary (32) between the first tapered section (20) and the vertical section (30), and the boundary (33) between the second tapered section (25) and the vertical section (30) may each be formed of a rounded section having a radius of curvature (R). It is preferable that the radius of curvature (R) of the rounded section be 1 μm or more and 20 μm or less. The rounded section has the effect of alleviating stress concentration caused by abrupt shape changes in the tapered-vertical transition section and improving the coverage uniformity of the seed layer during electroplating.

[0053] A conductive metal (40) is filled inside the through-via (10). The conductive metal (40) is preferably copper (Cu), but other conductive metals such as silver (Ag), gold (Au), aluminum (Al), tungsten (W), and nickel (Ni) may also be used. A bonding layer (41) and a seed metal layer (42) are sequentially interposed between the inner wall of the through-via (10) and the conductive metal (40). The bonding layer (41) comprises at least one of Ti, TiN, TiW, Cr, and Ta, and has a thickness of 5 nm or more and 50 nm or less. The seed metal layer (42) is made of copper (Cu) or a copper alloy, and has a thickness of 50 nm or more and 500 nm or less.

[0055] The electroplated growth bonding surface (50) of the conductive metal (40) is formed within the vertical section (30). The electroplated growth bonding surface (50) is an interface where the plating layer grown from the first opening (11) side and the plating layer grown from the second opening (12) side meet and bond within the vertical section (30). It is preferable that the electroplated growth bonding surface (50) be continuously closed along the circumferential direction of the vertical section (30) so that no voids are formed. The electroplated growth bonding surface (50) can be formed at any location within the axial length (Lv) range of the vertical section (30), which means that the entire axial length of the vertical section (30) functions as a pinching allowance section.

[0057] Referring to FIGS. 13 and 15, the electroplating growth process of a through via (10) having a vertical section (30) is described. It is preferable that the electroplating be performed in a kinetic-limited regime where the Thiele modulus (μ) is 1 or less. When electroplating is initiated, copper (Cu) metal grows inward from both openings on the seed metal layer (42). A large-diameter plating front (F1) from the first opening (11) side and a small-diameter plating front (F2) from the second opening (12) side advance toward the vertical section (30), respectively. When both plating fronts (F1, F2) reach the vertical section (30), pinching proceeds simultaneously along the entire circumferential direction due to the uniform diameter (Dv) of the vertical section (30). When pinching is completed, an electroplated growth bonding surface (50) is formed within the vertical section (30), and the remaining space is filled by conformal plating.

[0059] Referring to FIG. 14, in a conventional droplet waist (30') structure, since both plating fronts are joined simultaneously at the intersection, the discharge path of the plating solution is suddenly blocked at the moment of pinching, causing a void (V). On the other hand, as shown in FIG. 15, in the vertical section (30) structure of the present invention, since pinching proceeds gradually within the axial length (Lv) of the vertical section (30), even if one plating front reaches the vertical section (30) first and starts pinching, the remaining space on the other side functions as a discharge path for the plating solution, thereby preventing plating solution trapping.

[0061] Referring to FIG. 11, the through-via (10) according to the second embodiment of the present invention has a filled via structure. The interior of the through-via (10) is completely filled with copper (Cu), which is a conductive metal (40), so that a continuous metal path is formed across the entire cross-section of the through-via (10). Since the filled via structure has minimal electrical resistance and maximum thermal conductivity, it is suitable for a high-current power supply path.

[0063] Referring to FIG. 12, a through-via (10) according to a third embodiment of the present invention has a conformal lining structure. A conductive metal (40) is formed as a conductive lining layer (43) conformally formed along the side wall of the through-via (10), and the inner space of the conductive lining layer (43) is filled with a dielectric material (44). The dielectric material (44) may be any one of SiO2, polyimide, benzocyclobutene (BCB), or epoxy resin.

[0065] Referring to FIG. 7, in the fourth embodiment of the present invention, the sidewall inclination angle (α1) of the first tapered section (20) and the sidewall inclination angle (α2) of the second tapered section (25) are identical to each other, and the diameter (D1) of the first opening (11) and the diameter (D2) of the second opening (12) are also substantially identical. In this case, the vertical section (30) is located at the center of the thickness direction of the glass substrate (100). The profile of the through-via (10) is vertically symmetric with respect to the axial center of the vertical section (30).

[0067] Referring to FIG. 8, in the fifth embodiment of the present invention, the side wall inclination angle (α1) of the first tapered section (20) and the side wall inclination angle (α2) of the second tapered section (25) are different from each other. In this case, the diameter (D1) of the first opening (11) and the diameter (D2) of the second opening (12) may be different.

[0069] Referring to FIG. 9, in the sixth embodiment of the present invention, the diameter (D1) of the first opening (11) and the diameter (D2) of the second opening (12) are different from each other. When D1 is larger than D2, the plating growth rate from the large diameter side (first opening (11) side) during electroplating is faster than that from the small diameter side (second opening (12) side), so the position of the electroplating growth bonding surface (50) may be biased toward the small diameter side within the vertical section (30). However, as long as the bonding surface (50) is formed within the axial length (Lv) of the vertical section (30), the pinching quality is guaranteed by the uniform diameter of the vertical section (30).

[0071] Referring to FIG. 10, the position of the vertical portion (30) may be located at the center of the thickness direction of the glass substrate (100) (left illustration), or may be formed at a position biased toward either the first surface (101) or the second surface (102) (right illustration).

[0073] Referring to FIG. 17, a glass substrate (1000) according to the seventh embodiment of the present invention has a structure in which a resin buffer layer (60) is formed on at least one of the first surface (101) and the second surface (102) of the glass substrate (100). The resin buffer layer (60) is made of a polymer resin such as epoxy resin, polyimide, or ABF (Ajinomoto Build-up Film), and has a thickness of 5 μm or more and 30 μm or less. The resin buffer layer (60) prevents cracks from occurring in the glass substrate (100) by elastically buffering thermal stress caused by the difference in the coefficient of thermal expansion between copper, which is a conductive metal (40), and the glass substrate (100).

[0075] Referring to FIG. 18, in a glass substrate (1000) according to the eighth embodiment of the present invention, a plurality of through-vias (10) are arranged in an array form on the glass substrate (100). The vertical portion (30) of each of the plurality of through-vias (10) is formed at the same axial position, so that the plating growth bonding surface (50) of all vias is formed within the same depth range during the electroplating process, thereby ensuring process uniformity.

[0077] Referring to FIG. 19, in a glass substrate (1000) according to the ninth embodiment of the present invention, a plurality of through vias (10) include power supply vias (10a) and signal transmission vias (10b). The diameter of the vertical portion (30a) of the power supply via (10a) is larger than the diameter of the vertical portion (30b) of the signal transmission via (10b). The power supply via (10a) provides low electrical resistance and high current capacity through the large-diameter vertical portion (30a), and the signal transmission via (10b) achieves high wiring density and low parasitic capacitance through the small-diameter vertical portion (30b).

[0079] Referring to FIGS. 20 and 21, a glass substrate (1000) according to the 10th embodiment of the present invention is applied as an interposer for a semiconductor package. A semiconductor die (200) is mounted on a first surface (101) of the glass substrate (100), and a solder ball (70) or bump is formed on a second surface (102) for connection with a package substrate or a printed circuit board (PCB) (300). The semiconductor die (200) may include at least one of an AI computing processor, a GPU, and an HBM memory. A through-via (10) may be placed in a power supply path that supplies a supply voltage (VDD) or a ground voltage (VSS) to the semiconductor die (200). A plurality of semiconductor dies (200) are arranged in parallel in a horizontal direction on a first surface (101) of a glass substrate (100), and a signal transmission path between the plurality of semiconductor dies (200) can be formed through a redistribution layer (RDL) (80) of the glass substrate (100).

[0081] Referring to FIG. 22, a glass substrate (1000) according to the 11th embodiment of the present invention is applied as a core substrate of a flip-chip ball grid array (FC-BGA). A build-up layer (90) is formed on both sides of the glass substrate (100).

[0083] Referring to FIG. 23, the glass substrate (1000) according to the 12th embodiment of the present invention is a glass panel (100P) for panel level packaging (PLP), and the size of the glass panel (100P) is 300 mm or more on one side.

[0085] Referring to FIG. 24, a method for manufacturing a through-via according to the 13th embodiment of the present invention is described. A laser modification process is performed on a glass substrate (100) to form a damage track in the thickness direction. The laser modification is performed using a picosecond or femtosecond pulse laser. To form a vertical section (30), the laser beam intensity in the region corresponding to the vertical section (30) is set differently from the laser beam intensity in the region corresponding to the first taper section (20) and the second taper section (25). Specifically, in the central region of the glass substrate (100) corresponding to the vertical section (30), the laser beam intensity is maintained uniformly so that the degree of modification of the damage track is constant in the axial direction, and near both surfaces, the laser beam intensity is set high to form an axial gradient of the degree of modification. Subsequently, when wet etching is performed, the etching rate is fast near the two surfaces with high degree of alteration and the etching rate is constant in the central region with uniform degree of alteration, so tapered sections are formed on both sides and a vertical section is formed in the center.

[0087] After the through via (10) is formed, a conductive metal (40) is filled into the interior of the through via (10) by an electroplating process. The electroplating is performed using a copper (Cu) electrolyte, and the electrolyte includes copper sulfate (CuSO4·5H2O), sulfuric acid (H2SO4), chloride ions (Cl-), and organic additives (suppressor, accelerator, leveler). It is preferable that the electroplating be performed in a kinetic-limited regime in which the Thiele modulus (μ) is 1 or less, so that the conductive metal (40) is pinched first within the vertical section (30) and the remaining space is filled by conformal plating. Explanation of the symbols

[0089] 10, 10', 10'': Penetrating via 10a: Power supply via 10b: via for signal transmission 11: First opening 12: Second opening 20: First taper section 25: Second taper section 30, 30': Vertical section / Droplet waist 30a: Vertical section of a power supply via 30b: Vertical section of a signal transmission via 31: Side wall of the vertical section 32: Boundary between the first taper section and the vertical section (round section) 33: Boundary between the second taper section and the vertical section (round section) 40: Conductive metal 41: Adhesion layer 42: Seed metal layer 43: Conductive lining layer 44: Genomic materials 50: Electroplated growth bonding surface 60: Resin buffer layer 70: Solder ball 80: Redistribution Layer (RDL) 90: Build-up layer 100, 100', 100'': Glass substrate 100P: Glass panel 101, 101', 101'': Page 1 102, 102', 102'': Page 2 200: Semiconductor die 300: Package board / Printed circuit board (PCB) 1000: Glass substrate with through-vias D1: Diameter of the first opening D2: Diameter of the second opening Dv: Diameter of the vertical section Lv: Axial length of the vertical section t: thickness of the glass substrate R: Radius of curvature of the rounded section α1: Sidewall inclination angle of the first taper section α2: Sidewall inclination angle of the second taper section F1: Large diameter side plating front F2: Small diameter side plating front V: Void

Claims

Claim 1 A glass substrate; and a through-via formed by penetrating from a first surface to a second surface of the glass substrate, wherein the through-via comprises a first tapered section in which the diameter decreases as it extends inward from a first opening on the first surface side, a second tapered section in which the diameter decreases as it extends inward from a second opening on the second surface side, and a vertical section located between the first tapered section and the second tapered section, the vertical section having a sidewall substantially parallel to the thickness direction of the glass substrate, wherein the vertical section has a predetermined axial length in the thickness direction while maintaining the minimum diameter of the through-via, and the interior of the through-via is filled with a conductive metal, wherein an electroplated growth bonding surface of the conductive metal is formed within the vertical section. Claim 2 A glass substrate having through-vias according to claim 1, characterized in that the axial length of the vertical portion is 3% or more and 25% or less of the thickness of the glass substrate. Claim 3 A glass substrate having a through-via, characterized in that, in claim 1, the diameter of the vertical portion is 20% or more and 70% or less of the larger diameter between the first opening and the second opening. Claim 4 A glass substrate having through-vias, characterized in that, in claim 1, the side wall of the vertical portion has an inclination angle of ±2° with respect to the thickness direction of the glass substrate. Claim 5 A glass substrate having through vias, characterized in that, in claim 1, the sidewall inclination angle of the first tapered section and the sidewall inclination angle of the second tapered section are identical to each other. Claim 6 A glass substrate having through vias, characterized in that, in claim 1, the sidewall inclination angle of the first tapered section and the sidewall inclination angle of the second tapered section are different from each other. Claim 7 A glass substrate having through-vias according to claim 1, characterized in that the diameter of the first opening and the diameter of the second opening are substantially the same. Claim 8 A glass substrate having a through-via according to claim 1, characterized in that the diameter of the first opening and the diameter of the second opening are different from each other. Claim 9 A glass substrate having a through-via, wherein, in claim 1, the vertical portion is located at the center of the thickness direction of the glass substrate. Claim 10 A glass substrate having a through-via according to claim 1, characterized in that the vertical portion is formed at a position deflected toward either the first surface or the second surface from the center of the thickness direction of the glass substrate. Claim 11 A glass substrate having a through-via, characterized in that, in claim 1, the conductive metal is copper (Cu), and the interior of the through-via is a filled via structure in which the copper is completely filled. Claim 12 A glass substrate having a through-via according to claim 1, wherein the conductive metal is a conductive lining layer conformally formed along the sidewall of the through-via, and the inner space of the conductive lining layer is filled with a dielectric material. Claim 13 A glass substrate having a through-via according to claim 1, wherein an adhesion layer and a seed metal layer are sequentially interposed between the sidewall of the through-via and the conductive metal, and the adhesion layer comprises at least one of Ti, TiN, TiW, Cr, and Ta. Claim 14 A glass substrate having through vias, characterized in that, in claim 1, the electroplated growth bonding surface is continuously closed along the circumferential direction of the vertical portion so as not to form voids. Claim 15 A glass substrate having through-vias according to claim 1, characterized in that the electroplated growth bonding surface can be formed at any position within the axial length range of the vertical portion. Claim 16 A glass substrate having through-vias according to claim 1, wherein a resin buffer layer is formed on at least one of the first surface and the second surface of the glass substrate, and the resin buffer layer buffers thermal stress caused by the difference in the coefficient of thermal expansion between the conductive metal and the glass substrate. Claim 17 A glass substrate having through vias, characterized in that, in claim 1, the boundary between the first tapered section and the vertical section and the boundary between the second tapered section and the vertical section are each formed by rounded sections having a radius of curvature. Claim 18 A glass substrate having through-vias according to claim 1, characterized in that the glass substrate is one of borosilicate glass, aluminosilicate glass, and fused silica. Claim 19 A glass substrate having through-vias according to claim 1, characterized in that the thickness of the glass substrate is 100 μm or more and 500 μm or less. Claim 20 A glass substrate having through-vias according to claim 1, characterized in that the aspect ratio of the through-vias is 5:1 or greater and 20:1 or less. Claim 21 A glass substrate having through-vias according to claim 1, characterized in that the diameter of the first opening or the second opening is 20 μm or more and 100 μm or less. Claim 22 A glass substrate having through-vias according to claim 1, wherein a plurality of through-vias are arranged in an array form on the glass substrate, and the vertical portion of each of the plurality of through-vias is formed at the same axial position. Claim 23 A glass substrate having through-vias according to claim 22, wherein the plurality of through-vias include power supply vias and signal transmission vias, and the diameter of the vertical portion of the power supply via is larger than the diameter of the vertical portion of the signal transmission via. Claim 24 A glass substrate having through-vias, wherein, in claim 1, the glass substrate serves as an interposer for a semiconductor package, wherein a semiconductor die is mounted on the first surface and a bump or solder ball for connection with a package substrate or a printed circuit board is formed on the second surface. Claim 25 A glass substrate having through-vias according to claim 24, wherein the semiconductor die comprises at least one of an AI computing processor, a GPU, and an HBM memory, and the through-vias are disposed in a power supply path that supplies a supply voltage or a ground voltage to the semiconductor die. Claim 26 A glass substrate having through-vias, characterized in that, in claim 1, the glass substrate is a core substrate of a flip-chip ball grid array (FC-BGA). Claim 27 A glass substrate having through-vias according to claim 1, wherein the glass substrate is a glass panel for panel level packaging (PLP), and the size of the glass panel is 300 mm or more on one side. Claim 28 A glass substrate having a through-via according to claim 1, wherein the through-via is formed by a combination of laser modification and wet etching, and wherein the vertical portion is formed by setting the laser beam intensity of the region corresponding to the vertical portion during the laser modification differently from the laser beam intensity of the region corresponding to the first taper section and the second taper section. Claim 29 A glass substrate having through-vias according to claim 1, characterized in that the electroplating of the conductive metal is performed in a kinetic-limited regime in which the Thiele modulus (μ) is 1 or less, and the conductive metal is preferentially pinched within the vertical portion, after which the remaining space is filled by conformal plating. Claim 30 A method for manufacturing a glass substrate having a through-via, comprising: a step of forming a through-via penetrating from a first surface to a second surface of a glass substrate, wherein the through-via includes a first tapered section in which the diameter decreases as it extends inward from the first surface side, a second tapered section in which the diameter decreases as it extends inward from the second surface side, and a vertical section between the first tapered section and the second tapered section having a sidewall substantially parallel to the thickness direction of the glass substrate and having a predetermined axial length while maintaining a minimum diameter; and a step of filling the interior of the through-via with a conductive metal by electroplating, wherein plating layers growing from the first opening side and the second opening side, respectively, are joined within the vertical section to form a growth bonding surface.

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