Display device

Abstract

In an organic EL display device (1), a circuit board (5) includes a laminated insulating film (36) provided to a substrate layer (10) so as to spread in a frame region (FA). The frame region includes a frame-form joining portion (SZ) in which a portion following the peripheral edge of a first inorganic barrier layer (81) included in a sealing film (80) is in contact with the laminated insulating film, and a terminal portion (TP) positioned outside the joining portion. The frame region (FA) is provided with a first frame line (40a) and a second frame line (40b) that extend along the joining portion and are drawn out to the terminal portion. The first frame line and the second frame line have a laminated structure in which a plurality of metal layers (45, 46) are laminated, and are formed so that the peripheral edge does not intersect the joining portion.

Description

display device

[0001] The present disclosure relates to a display device.

[0002] In recent years, organic electroluminescence (EL) display devices using organic electroluminescence (hereinafter referred to as EL) elements have been put to practical use. A plurality of organic EL elements are arranged in a predetermined array to form a display area where images are displayed. A frame area is provided outside the display area as a non-display area. The frame area is provided with a drive circuit for controlling image display, a power supply main line, lead lines, and the like.

[0003] Organic EL elements are susceptible to deterioration due to the influence of moisture. For this reason, organic EL display devices employ a technology for encapsulating the organic EL elements by covering them with an encapsulation film. One such technology is thin film encapsulation (TFE) technology. This technology aims to achieve high moisture barrier properties while maintaining flexibility through the use of an encapsulation film formed by alternately laminating inorganic and organic barrier layers.

[0004] The organic EL display device also includes a circuit board on which a drive circuit and other components are provided. The circuit board includes a surface insulating film made of an inorganic insulating material and a planarization film provided on the surface insulating film. The surface insulating film is provided so as to extend over the frame region. The sealing film forms a frame-shaped joint in the frame region where the inorganic barrier layer contacts the surface insulating film. The planarization film is made of an organic resin material and therefore has poor moisture barrier properties, but is surrounded by the joint together with the organic EL element. This provides the effect of preventing external moisture from penetrating the planarization film and being introduced into the display region.

[0005] Terminals for connecting to an external circuit are provided outside the joints of the sealing film in the frame region. Frame lines, such as power supply main lines for applying voltage to the organic EL elements, are provided in the frame region between the display region and the terminals. The periphery of such frame lines extends from the display region side of the lower layer of the sealing film to the outside of the joints so as to intersect with the joints. An example of an organic EL display device including such frame lines is disclosed in Patent Document 1.

[0006] International Publication No. 2023 / 007549

[0007] In organic EL display devices, the frame line is often constructed of a laminated film in which multiple metal layers are stacked to reduce resistance. A suitable laminated film structure is, for example, a structure in which a titanium layer, an aluminum layer, and another titanium layer are stacked in this order. However, when the laminated film is patterned by etching during the manufacture of the organic EL display device, side etching occurs, causing the aluminum layer to sink under the upper titanium layer. As a result, the upper titanium layer of the frame line protrudes to the side, forming a visor-like portion on the frame line.

[0008] In this case, the side end faces of the frame wiring cannot be adequately covered with an inorganic insulating film such as an inorganic barrier layer, and a gap is formed between the aluminum layer and the inorganic insulating film on the side of the frame wiring. This gap connects the inside and outside of the joint in the organic EL display device, and can serve as a path for moisture to penetrate from the outside into the display area. If moisture enters this gap and then travels down the frame wiring into the display area, it will cause deterioration of the organic EL elements and reduce the display quality and reliability of the organic EL display device.

[0009] An object of the present disclosure is to prevent moisture from entering the display area along the frame line.

[0010] The present disclosure relates to a display device. The display device according to the present disclosure includes a circuit board, a plurality of light-emitting elements provided on the circuit board, and a sealing film provided to cover the plurality of light-emitting elements. The plurality of light-emitting elements form a display area for displaying an image. A frame area is provided outside the display area as a non-display area where no image is displayed. The circuit board includes a base substrate and a laminated insulating film formed by laminating inorganic insulating materials and provided on the base substrate so as to extend into the frame area. The sealing film has an inorganic barrier layer made of an inorganic insulating material. The frame area includes a frame-shaped joint portion in which a portion along the periphery of the inorganic barrier layer contacts the laminated insulating film, and a terminal portion located outside the joint. The frame area is provided with a frame line extending along the joint portion and leading to the terminal portion. The frame line has a laminated structure in which a plurality of metal layers are laminated, and is formed so that its periphery does not intersect with the entire width of the joint portion.

[0011] According to the display device according to the present disclosure, it is possible to prevent moisture from entering the display area along the frame line.

[0012] FIG. 1 is a plan view illustrating a schematic configuration of an organic EL display device according to a first embodiment. FIG. 2 is a cross-sectional view of the organic EL display device taken along line II-II in FIG. 1. FIG. 3 is a plan view illustrating pixels and various wirings in a display region of the organic EL display device. FIG. 4 is a cross-sectional view of a main portion of the organic EL display device taken along line IV-IV in FIG. 3. FIG. 5 is a cross-sectional view of the organic EL display device taken along line V-V in FIG. 1. FIG. 6 is a cross-sectional view illustrating a part of a manufacturing process for the organic EL display device according to the first embodiment. FIG. 7 is a cross-sectional view illustrating a part of a manufacturing process for the organic EL display device according to the first embodiment. FIG. 8 is a cross-sectional view illustrating a part of a manufacturing process for the organic EL display device according to the first embodiment. FIG. 9A is a plan view illustrating a main portion of the organic EL display device according to the first embodiment during a light emission inspection. FIG. 9B is a plan view illustrating a main portion of an organic EL display device according to a comparative example during a light emission inspection. FIG. 10 is a plan view illustrating a schematic configuration of an organic EL display device according to a second embodiment. FIG. 11 is a cross-sectional view of a main portion of the organic EL display device taken along line XI-XI in FIG. 10. FIG. 12 is a cross-sectional view illustrating a part of the manufacturing process of the organic EL display device of Embodiment 2. FIG. 13 is a cross-sectional view illustrating a part of the manufacturing process of the organic EL display device of Embodiment 2. FIG. 14 is a plan view illustrating a schematic configuration of the organic EL display device of Embodiment 3. FIG. 15 is a cross-sectional view of a main part of the organic EL display device taken along line XV-XV in FIG. 14. FIG. 16 is a cross-sectional view illustrating a part of the manufacturing process of the organic EL display device of Embodiment 3. FIG. 17 is a cross-sectional view illustrating a part of the manufacturing process of the organic EL display device of Embodiment 3.

[0013] Exemplary embodiments will now be described in detail with reference to the accompanying drawings.

[0014] Exemplary embodiments will be described in detail below with reference to the drawings. In the following embodiments, an organic EL display device will be described as an example of a display device according to the present disclosure. Note that the drawings are intended to conceptually explain the technology of the present disclosure. Therefore, in the drawings, dimensions, ratios, or numbers may be exaggerated or simplified to facilitate understanding of the technology of the present disclosure.

[0015] In the following embodiments, the term "first direction" refers to the horizontal direction of the screen when the display device is oriented in a predetermined state of use. The term "second direction" refers to the direction perpendicular to the first direction and to the vertical direction of the screen when the display device is oriented in a predetermined state of use. A row of components such as subpixels refers to a horizontal arrangement of multiple components in a row in the first direction. A column of components such as subpixels refers to a vertical arrangement of multiple components in a row in the second direction.

[0016] In the following embodiments, when a component such as a film, layer, or element is provided or formed on another component such as another film, layer, or element, it does not only mean that the other component exists directly on top of the other component, but also includes cases where another component such as a film, layer, or element is interposed between the two components.

[0017] In the following embodiments, unless otherwise specified, a description that a certain component is connected to another component means that the components are electrically connected. This description not only means a direct connection, but also an indirect connection via other components, within the scope of the gist of the technology of the present disclosure. This description also includes a case where another component is integrated with a certain component, that is, a part of a certain component constitutes the other component.

[0018] In the following embodiments, a description that a certain component is in the same layer as another component means that the certain component is formed in the same process as the other component. A description that a certain component is a lower layer than the other component means that the certain component is deposited in an earlier process than the other component or is formed from a film deposited in an earlier process. A description that a certain component is an upper layer than the other component means that the certain component is deposited in a later process than the other component or is formed from a film deposited in a later process.

[0019] In the following embodiments, a description that a certain component is identical to or equivalent to another component does not mean only a state in which the certain component and the other component are completely identical or completely equivalent, but also a state in which the certain component and the other component are substantially identical or substantially equivalent, such as fluctuating within the range of manufacturing variations or tolerances.

[0020] In the following embodiments, the terms first, second, third, etc. are used to distinguish between terms to which these terms are attached, and do not limit the number of terms or even their order.

[0021] The organic EL display device 1 of this embodiment 1 is used as a display for a mobile device such as a multi-function phone called a smartphone or a tablet terminal. The organic EL display device 1 may also be used as a display for various other devices such as a personal computer (PC) or a television set.

[0022] -Configuration of Organic EL Display Device- The organic EL display device 1 is a display device that uses organic EL elements 65, also known as OLEDs (Organic Light Emitting Diodes). The organic EL display device 1 employs an active matrix drive system and is configured to provide a full-color display. As shown in Figures 1 and 2, the organic EL display device 1 has a display area DA and a frame area FA.

[0023] The display area DA is an area for displaying an image and constitutes a screen. The display area DA is provided, for example, in a rectangular shape. The display area DA may be a substantially rectangular shape, such as a shape with at least one arc-shaped side, a shape with at least one arc-shaped corner, or a shape with a notch on at least one side, or may be any other shape.

[0024] As shown in Fig. 3, the display area DA is composed of a plurality of pixels PX. The plurality of pixels PX are arranged in a matrix. Each pixel PX is composed of three sub-pixels SP. The three sub-pixels SP are a red sub-pixel SPr that emits red light, a green sub-pixel SPg that emits green light, and a blue sub-pixel SPb that emits blue light. These three sub-pixels SPr, SPg, and SPb are arranged, for example, in a striped pattern.

[0025] The display area DA is provided with a plurality of organic EL elements 65 and a plurality of pixel circuits PC. The plurality of organic EL elements 65 are provided corresponding to a plurality of sub-pixels SP. Each sub-pixel SP is formed by an organic EL element 65. The pixel circuit PC is a circuit for each sub-pixel, and controls the light emission of the organic EL element 65 that constitutes the corresponding sub-pixel SP.

[0026] 1 and 2 , the frame area FA is an area that constitutes the non-display portion outside the screen. The frame area FA is provided around the display area DA, for example, in the shape of a rectangular frame. The frame area FA may have a frame shape other than a rectangle. The frame area FA includes a joint portion SZ, a terminal portion TP, and a bending portion BP.

[0027] The joint portion SZ is a portion (hatched area in FIG. 1 ) where a portion along the periphery of the first inorganic barrier layer 81 constituting the sealing film 80 (described later) comes into contact with the laminated insulating film 36 included in the circuit board 5. The laminated insulating film 36 is a laminate of inorganic insulating films formed by laminating inorganic insulating materials. The joint portion SZ is provided in a frame shape so as to surround the display area DA, and blocks external moisture from entering the display area DA.

[0028] The terminal portion TP is a portion for connecting to an external circuit such as a display control circuit (source driver). The terminal portion TP is provided near the outer edge of a portion constituting one side of the frame area FA extending in the first direction Dx, and extends along that side. The terminal portion TP is located outside the joint portion SZ. A wiring board CB such as an FPC (Flexible Printed Circuit) is connected to the terminal portion TP.

[0029] The bent portion BP is provided between the terminal portion TP and the display area DA and extends horizontally across the entire frame area FA in the first direction Dx. The frame area FA is bent at the bent portion BP, for example, by about 180 degrees, to form a U-shape (shown by the two-dot chain line in FIG. 2 ). This positions the terminal portion TP on the rear side of the organic EL display device 1.

[0030] A driving circuit (not shown) is provided in the frame area FA. The driving circuit is arranged in a portion of the frame area FA that forms the side (each of the left and right sides in FIG. 1 ) adjacent to the side on which the terminal portion TP is provided. The driving circuit is monolithically formed as part of the TFT layer 20, which will be described later. The driving circuit includes a gate driver and an emission driver.

[0031] Additionally, a first frame line 40a and a second frame line 40b are provided in the frame area FA. The first frame line 40a and the second frame line 40b are each an example of a frame line. The first frame line 40a and the second frame line 40b are formed in a frame shape surrounding the display area DA and extend to the terminal portion TP. A high-level power supply voltage (ELVDD) is supplied to the first frame line 40a via the wiring board CB. A low-level power supply voltage (ELVSS) is supplied to the second frame line 40b via the wiring board CB.

[0032] Although not shown, a plurality of lead lines are also provided in the frame area FA. Each of the lead lines is drawn out from the display area DA and extends to the terminal portion TP. The end of each lead line located at the terminal portion TP and each end of the first frame line 40a and the second frame line 40b respectively form a terminal. The terminal portion TP has these multiple terminals.

[0033] 2, the organic EL display device 1 includes a circuit board 5, a light-emitting element layer 60, and a sealing film 80. The circuit board 5 includes a substrate layer 10 and a TFT layer (thin film transistor layer) 20. The circuit board 5 includes a plurality of circuit elements provided in a display area DA.

[0034] <Substrate Layer> The substrate layer 10 is an example of a base substrate. The substrate layer 10 in this example is a substrate made of a flexible resin. The substrate layer 10 is formed of an organic resin material such as polyimide resin, polyamide resin, or epoxy resin. The substrate layer 10 is made up of an organic insulating layer made of the organic resin material described above and a silicon oxide (SiO ２ A protective film 11 is attached to the back surface of the substrate layer 10.

[0035] <TFT Layer> The TFT layer 20 is provided on the substrate layer 10. In addition to the drive circuit described above, the TFT layer 20 includes a base coat film 21, various wirings 40, and a plurality of pixel circuits PC shown in Figures 3 and 4. The drive circuit, the various wirings 40, and the pixel circuits PC are provided on the base coat film 21. The base coat film 21 is provided on the substrate layer 10 and extends over substantially the entire surface of the substrate layer 10.

[0036] The various wirings 40 include the first frame line 40a and the second frame line 40b described above. In addition, the various wirings 40 include a plurality of gate lines 40g, a plurality of light-emitting control lines 40e, a plurality of initialization lines 40i, a plurality of power supply lines 40p, and a plurality of source lines 40s. Each of the gate lines 40g, the light-emitting control lines 40e, the initialization lines 40i, the power supply lines 40p, and the source lines 40s is provided in the display area DA.

[0037] The gate lines 40g are wirings that transmit gate signals to the pixel circuits PC. The gate lines 40g are arranged at intervals in the second direction Dy and extend parallel to each other in the first direction Dx. The gate lines 40g include first gate lines 40ga and second gate lines 40gb.

[0038] The first gate line 40ga is a gate line 40g used to control the P-channel TFT 50. The second gate line 40gb is a gate line 40g used to control the N-channel TFT 50. The first gate line 40ga and the second gate line 40gb are provided for each row of sub-pixels SP. Each first gate line 40ga and each second gate line 40gb is drawn out to the frame area FA and connected to a gate driver of the drive circuit.

[0039] Each of the plurality of light-emission control lines 40e is a wiring that transmits an emission signal to the pixel circuit PC. The plurality of light-emission control lines 40e are arranged at intervals from one another in the second direction Dy and extend parallel to one another in the first direction Dx. One light-emission control line 40e is provided for each row of sub-pixels SP. Each light-emission control line 40e is drawn out to the frame area FA and connected to an emission driver of the drive circuit.

[0040] The multiple initialization lines 40i are wirings that apply an initialization voltage to the pixel circuits PC. The multiple initialization lines 40i are arranged at intervals from one another in the second direction Dy and extend parallel to one another in the first direction Dx. One initialization line 40i is provided for each row of subpixels SP. Each initialization line 40i is drawn out to the frame area FA and connected to a drive circuit or a second frame line 40b.

[0041] Each of the multiple power supply lines 40p is a wiring that applies a predetermined high-level power supply voltage (ELVDD) to the pixel circuits PC. The multiple power supply lines 40p are arranged at intervals from one another in the first direction Dx and extend parallel to one another in the second direction Dy. One power supply line 40p is provided for each column of sub-pixels SP. Each power supply line 40p is drawn out into the frame area FA and connected to the first frame line 40a.

[0042] Each of the multiple source lines 40s is a wiring that transmits a source signal to the pixel circuit PC. The multiple source lines 40s are arranged at intervals from one another in the first direction Dx and extend parallel to one another in the second direction Dy. One source line 40s is provided for each column of subpixels SP. Each source line 40s is drawn out to a terminal portion TP as a lead line and connected to a display control circuit (source driver) via a wiring substrate CB.

[0043] The first gate line 40ga, the light-emitting control line 40e, and the initialization line 40i are formed of the same material in the same layer as a first gate electrode 24 (described later). The second gate line 40gb is formed of the same material in the same layer as a second gate electrode 33 (described later) and a second capacitor electrode 30. The power supply line 40p and the source line 40s are formed of the same material in the same layer as a first terminal electrode 37 and a second terminal electrode 38 (described later).

[0044] Each pixel circuit PC is connected to a first gate line 40ga, a second gate line 40gb, a light-emitting control line 40e, an initialization line 40i, a power supply line 40p, and a source line 40s. Each pixel circuit PC operates based on signals and voltages supplied by these various wirings 40, and in each frame, resets the charge accumulated in the pixel electrode 61 and then supplies a drive current corresponding to the source signal to the organic EL element 65.

[0045] 4, the pixel circuit PC includes a plurality of TFTs 50 and a capacitor 55. The TFTs 50 and the capacitor 55 are each an example of a circuit element. The plurality of TFTs 50 constituting the pixel circuit PC include a first TFT 50A and a second TFT 50B. The first TFT 50A, the second TFT 50B, and the capacitor 55 are provided corresponding to a plurality of sub-pixels SP, and a pixel circuit PC is constituted for each sub-pixel SP.

[0046] The first TFT 50A is a P-channel TFT 50 and is configured as a top-gate type with a top-contact structure. The first TFT 50A has a first semiconductor layer 22, a first gate insulating film 23, a first gate electrode 24, an interlayer insulating film 35, a first terminal electrode 37, and a second terminal electrode 38.

[0047] The first semiconductor layer 22 is provided in an island shape on the base coat film 21, and is provided continuously for the multiple first TFTs 50A. The first semiconductor layer 22 may be separated into individual first TFTs 50A. The first semiconductor layer 22 includes a first channel region 22a and a pair of first conductor regions 22b. The first channel region 22a is provided between the pair of first conductor regions 22b. The pair of first conductor regions 22b are provided spaced apart from each other with the first channel region 22a sandwiched therebetween.

[0048] The first gate insulating film 23 is provided continuously over the multiple first TFTs 50A so as to cover the multiple first semiconductor layers 22. The first gate insulating film 23 may be provided in an island shape on each first semiconductor layer 22 and may be individually separated for each first TFT 50A. The first gate electrode 24 is provided on the first gate insulating film 23. The first gate electrode 24 overlaps with the first channel region 22a of the first semiconductor layer 22 via the first gate insulating film 23.

[0049] The interlayer insulating film 35 is provided so as to cover the plurality of first gate electrodes 24. The interlayer insulating film 35 is configured by stacking a first interlayer insulating film 26 and a second interlayer insulating film 34 in this order on the first gate insulating film 23. A plurality of first contact holes Ha are formed in the interlayer insulating film 35.

[0050] A pair of first contact holes Ha are provided for each predetermined first TFT 50A. The pair of first contact holes Ha penetrate to different first conductor regions 22b of the corresponding first semiconductor layer 22. The first terminal electrode 37 and the second terminal electrode 38 are provided at positions spaced apart from each other on the interlayer insulating film 35. The first terminal electrode 37 and the second terminal electrode 38 are connected to the first conductor region 22b of the first semiconductor layer 22 via the different first contact holes Ha.

[0051] The second TFT 50B is an N-channel TFT 50 and is configured as a top-gate type with a bottom-contact structure. The second TFT 50B has a third terminal electrode 28, a fourth terminal electrode 29, a second semiconductor layer 31, a second gate insulating film 32, and a second gate electrode 33.

[0052] The third terminal electrode 28 and the fourth terminal electrode 29 are provided at positions spaced apart from each other on the first interlayer insulating film 26. A second contact hole Hb is formed in the second interlayer insulating film 34 corresponding to a predetermined second TFT 50B. The second contact hole Hb penetrates to the third terminal electrode 28 or the fourth terminal electrode 29 of the predetermined second TFT 50B. A relay line 40r and other wiring are provided on the second interlayer insulating film 34 for each pixel circuit PC. The relay line 40r is connected to the third terminal electrode 28 or the fourth terminal electrode 29 via the second contact hole Hb.

[0053] The second semiconductor layer 31 is provided in an island shape on the first interlayer insulating film 26, and is provided continuously for the plurality of second TFTs 50B. The second semiconductor layer 31 may be separated for each second TFT 50B. The second semiconductor layer 31 includes a second channel region 31a and a pair of second conductor regions 31b. The second channel region 31a is provided between the pair of second conductor regions 31b. The pair of second conductor regions 31b are provided spaced apart from each other with the second channel region 31a sandwiched therebetween.

[0054] One second conductor region 31b in the second semiconductor layer 31 partially overlaps the third terminal electrode 28, and the other second conductor region 31b partially overlaps the fourth terminal electrode 29. The second gate insulating film 32 is formed in an island shape on the first interlayer insulating film 26, and is provided continuously for the plurality of second TFTs 50B. The second gate insulating film 32 may be separated individually for each second TFT 50B.

[0055] The second gate insulating film 32 is provided so as to partially cover the multiple second semiconductor layers 31. The second gate insulating film 32 overlaps the second channel region 31a of each second semiconductor layer 31 and exposes the second conductor region 31b. The second gate electrode 33 is provided on the second gate insulating film 32. The second gate electrode 33 overlaps the second channel region 31a of the second semiconductor layer 31 with the second gate insulating film 32 interposed therebetween.

[0056] The capacitor 55 includes a first capacitance electrode 25, a second capacitance electrode 30, and a second gate insulating film 32. The first capacitance electrode 25 is formed of the same material in the same layer as the third terminal electrode 28 and the fourth terminal electrode 29, and is provided on the first interlayer insulating film 26. The second capacitance electrode 30 is formed of the same material in the same layer as the second gate electrode 33, and is provided on the second gate insulating film 32. The first capacitance electrode 25 and the second capacitance electrode 30 overlap each other with the second gate insulating film 32 interposed therebetween.

[0057] The base coat film 21, the first gate insulating film 23, the first interlayer insulating film 26, the second gate insulating film 32, and the second interlayer insulating film 34 are each made of, for example, silicon oxide (SiO ２ The insulating film may be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxynitride, etc. These various inorganic insulating films may be made of a single layer film or a multilayer film.

[0058] The base coat film 21, the first gate insulating film 23, the first interlayer insulating film 26, the second gate insulating film 32, the second interlayer insulating film 34, and a first covering insulating film 39 (described later) are stacked one on top of the other to form a stacked insulating film 36 (also shown in FIG. 5 ). That is, the stacked insulating film 36 is formed by stacking inorganic insulating materials. The stacked insulating film 36 is provided on the substrate layer 10 so as to extend over the entire display area DA and the frame area FA. The circuit board 5 includes such a stacked insulating film 36.

[0059] The first gate electrode 24, the first capacitance electrode 25, the third terminal electrode 28, the fourth terminal electrode 29, the light-emitting control line 40e, the first gate line 40ga, and the initialization line 40i are made of a metal material such as aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), copper (Cu), etc. These various wirings 40 and electrodes may be made of a single-layer film or a laminated film.

[0060] The second gate electrode 33, the first terminal electrode 37, the second terminal electrode 38, the second gate line 40gb, the source line 40s, the power supply line 40p, and the relay line 40r have a laminated structure in which multiple metal layers are stacked. The specific laminated structure of these electrodes and wiring is the same as that of the first frame line 40a or the second frame line 40b, which will be described later.

[0061] The first semiconductor layer 22 is made of polysilicon. The polysilicon that constitutes the first semiconductor layer 22 is, for example, low temperature polycrystalline silicon (LTPS). The second semiconductor layer 31 is made of an oxide semiconductor. The oxide semiconductor that constitutes the second semiconductor layer 31 is, for example, an In—Ga—Zn—O-based semiconductor.

[0062] The TFT layer 20 further includes a planarization film 59. The planarization film 59 is provided on the second interlayer insulating film 34 so as to cover the various wirings 40, the plurality of TFTs 50, and the plurality of capacitors 55 in the display area DA. The planarization film 59 extends over the entire display area DA. The surface of the TFT layer 20 is planarized by the planarization film 59.

[0063] A third contact hole Hc is formed for each sub-pixel SP in the planarization film 59. The third contact hole Hc penetrates to the relay line 40r. The planarization film 59 is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (Spin On Glass) material.

[0064] <Light-emitting element layer> The light-emitting element layer 60 is provided on the circuit board 5 (TFT layer 20). The light-emitting element layer 60 includes a plurality of organic EL elements 65 (organic electroluminescence elements) and an edge cover 66. The organic EL elements 65 are an example of a light-emitting element. The organic EL elements 65 are configured as a top-emission type. Light emitted by the organic EL elements 65 is extracted to the sealing film 80 side.

[0065] A plurality of organic EL elements 65 are provided corresponding to a plurality of sub-pixels SP. Each organic EL element 65 constitutes a sub-pixel SP. The light emission of each organic EL element 65 is controlled by the operation of the corresponding pixel circuit PC. Each organic EL element 65 has a pixel electrode 61, an organic EL layer 62, and a common electrode 63.

[0066] The pixel electrodes 61 are provided on the planarization film 59. The pixel electrodes 61 are arranged in a matrix corresponding to each of the plurality of sub-pixels SP. Each pixel electrode 61 is connected to a relay line 40r via a third contact hole Hc, and is connected to a third terminal electrode 28 or a fourth terminal electrode 29 (the fourth terminal electrode 29; pixel circuit PC in the example shown in FIG. 4 ) via the relay line 40r. The pixel electrode 61 functions as an anode and injects holes into the organic EL layer 62. It is preferable to use a conductive material with a large work function for the pixel electrode 61.

[0067] Examples of materials for the pixel electrodes 61 include metals such as silver (Ag), aluminum (Al), nickel (Ni), titanium (Ti), indium (In), and tin (Sn). The material for the pixel electrodes 61 may be a metal compound or an alloy. The material for the pixel electrodes 61 may be a conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrodes 61 may be formed of a single layer film or a laminated film.

[0068] The edge cover 66 is provided on the planarization film 59. The edge cover 66 is located above the pixel electrodes 61. The edge cover 66 is formed in a lattice shape so as to separate the multiple pixel electrodes 61. Specifically, the edge cover 66 extends between adjacent pixel electrodes 61 and around the periphery of the display area DA, and covers the outer edge (peripheral end portion) of each pixel electrode 61.

[0069] The edge cover 66 has a plurality of openings 67 corresponding to the sub-pixels SP. Each opening 67 partially exposes the pixel electrode 61 from the edge cover 66. The edge cover 66 is made of the same material as the planarizing film 59, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG material.

[0070] The organic EL layer 62 is provided on each pixel electrode 61 within the opening 67 of the edge cover 66. The organic EL layer 62 has a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. The hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer are stacked in this order on the pixel electrode 61 and are made of known compounds suitable for their respective functions. The organic EL layer 62 emits light when a current is applied between the pixel electrode 61 and the common electrode 63.

[0071] The common electrode 63 is provided as a continuous common film spanning multiple subpixels SP, extending across the entire display area DA. The common electrode 63 is an example of a conductive film provided in the display area DA. The common electrode 63 covers the edge cover 66 and each organic EL layer 62, and overlaps each pixel electrode 61 via the organic EL layer 62. The common electrode 63 also extends into the frame area FA and is connected to the second frame line 40b (second inner connection line 44). The common electrode 63 functions as a cathode and injects electrons into the organic EL layer 62. It is preferable to use a conductive material with a small work function for the common electrode 63.

[0072] Examples of materials for the common electrode 63 include conductive oxides such as indium tin oxide (ITO) and indium zinc oxide (IZO). The material for the common electrode 63 may be a metal such as silver (Ag), aluminum (Al), lithium (Li), magnesium (Mg), calcium (Ca), or ytterbium (Yb). The material for the common electrode 63 may be a metal compound or an alloy. The common electrode 63 may be formed of a single layer film or a laminated film.

[0073] <Sealing Film> The sealing film 80 is provided on the light-emitting element layer 60. The sealing film 80 covers and seals the plurality of organic EL elements 65, protecting each organic EL element 65 (particularly the organic EL layer 62) from moisture, oxygen, and the like. The sealing film 80 is provided over the entire display area DA and extends to the frame area FA. The sealing film 80 has a first inorganic barrier layer 81, an organic barrier layer 82, and a second inorganic barrier layer 83.

[0074] The first inorganic barrier layer 81 is provided to cover the common electrode 63. The organic barrier layer 82 is provided on the first inorganic barrier layer 81. The second inorganic barrier layer 83 is provided on the organic barrier layer 82. The first inorganic barrier layer 81 and the second inorganic barrier layer 83 extend further toward the outer periphery of the frame area FA than the organic barrier layer 82 and overlap each other in the outer portion of the frame area FA. The organic barrier layer 82 extends into the display area DA and its outer periphery, and is enclosed by the first inorganic barrier layer 81 and the second inorganic barrier layer 83.

[0075] The first inorganic barrier layer 81 and the second inorganic barrier layer 83 are each made of an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, etc. The organic barrier layer 82 is made of an organic resin material such as acrylic resin, epoxy resin, silicone resin, polyurea resin, parylene resin, polyimide resin, polyamide resin, etc. The organic barrier layer 82 is formed by applying a liquid material.

[0076] <First Frame Line, Second Frame Line> The first frame line 40a is a power supply trunk line that supplies a high-level power supply voltage (ELVDD). The second frame line 40b is a power supply trunk line that supplies a low-level power supply voltage (ELVSS). As shown in FIG. 1 , the first frame line 40a and the second frame line 40b each extend along the joint SZ and are formed in a frame shape around the entire periphery of the area that overlaps with the joint SZ.

[0077] The first frame line 40a includes a first outer connection line 41 and a first inner connection line 42. The first outer connection line 41 and the first inner connection line 42 are provided in pairs on both sides in the first direction Dx of a portion of the frame portion of the first frame line 40a that forms the side on the terminal portion TP side. Each of the pair of first outer connection lines 41 extends from the frame portion of the first frame line 40a to the terminal portion TP. Each of the pair of first inner connection lines 42 extends from the frame portion of the first frame line 40a to the display area DA and is connected to each power supply line 40p.

[0078] The second frame line 40b has a second outer connection line 43 and a second inner connection line 44. The second outer connection line 43 and the second inner connection line 44 are provided in pairs on both sides in the first direction Dx of a portion of the frame portion of the second frame line 40b that forms the side on the terminal portion TP side. Both of the pair of second outer connection lines 43 extend from the frame portion of the second frame line 40b to the terminal portion TP. Both of the pair of second inner connection lines 44 extend from the frame portion of the second frame line 40b to the display area DA and are connected to the common electrode 63.

[0079] In this manner, the first frame line 40a and the second frame line 40b connect each pixel circuit PC provided in the display area DA to the terminal portion TP. The first frame line 40a and the second frame line 40b are each formed of the same material and in the same layer as the electrodes constituting the circuit elements or the wiring connected to the circuit elements. In this example, the first frame line 40a is formed of the same material and in the same layer as the second gate line 40gb and the second gate electrode 33. In this example, the second frame line 40b is formed of the same material and in the same layer as the source line 40s, the power supply line 40p, the first terminal electrode 37, the second terminal electrode 38, and the relay line 40r.

[0080] As shown in FIG. 5, the first frame line 40a and the second frame line 40b are stacked with the second interlayer insulating film 34 interposed therebetween to form a wiring stacked portion 40L. The second interlayer insulating film 34 is an example of a first inorganic insulating film. The wiring stacked portion 40L is covered with a first covering insulating film 39. The first covering insulating film 39 is made of, for example, silicon oxide (SiO ２ The second frame line 40b is made of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxynitride. The second frame line 40b is located in a layer above the first frame line 40a. The side surfaces of the first frame line 40a and the second frame line 40b are offset from each other in the width direction of the wiring stacked portion 40L.

[0081] Specifically, the line width of the first frame line 40a is wider than the line width of the second frame line 40b. Both side surfaces in the width direction of the second frame line 40b correspond to the top surface of the first frame line 40a in the stacking direction of the wiring stacked section 40L. Both the first frame line 40a and the second frame line 40b have a stacked structure in which multiple metal layers 45, 46 are stacked. In this example, the stacked structure of the first frame line 40a and the stacked structure of the second frame line 40b are the same three-layer structure.

[0082] The multiple metal layers 45 forming the first frame line 40a include a first lower metal layer 45a, a first intermediate metal layer 45b, and a first upper metal layer 45c. The first lower metal layer 45a is provided on the surface of the first gate insulating film 23. The first intermediate metal layer 45b is provided on the first lower metal layer 45a. The first upper metal layer 45c is provided on the first intermediate metal layer 45b. The first lower metal layer 45a and the first upper metal layer 45c are each made of titanium (Ti) or a titanium alloy. The first intermediate metal layer 45b is made of aluminum (Al) or an aluminum alloy. The first frame line 40a is covered with the second interlayer insulating film 34.

[0083] The multiple metal layers 46 forming the second frame line 40b include a second lower metal layer 46a, a second intermediate metal layer 46b, and a second upper metal layer 46c. The second lower metal layer 46a is provided on the surface of the second interlayer insulating film 34. The first intermediate metal layer 45b is provided on the first lower metal layer 45a. The first upper metal layer 45c is provided on the first intermediate metal layer 45b. The first lower metal layer 45a and the first upper metal layer 45c are each made of titanium (Ti) or a titanium alloy. The first intermediate metal layer 45b is made of aluminum (Al) or an aluminum alloy. The second frame line 40b is covered with a first insulating coating film 39.

[0084] When the first frame line 40a has the above-described three-layer structure, during the manufacturing process of the organic EL display device 1, the first intermediate metal layer 45b is exposed to an alkaline developer used in etching and photolithography during patterning of the first frame line 40a, and is side-etched so as to sink under the first upper metal layer 45c. As a result, the first upper metal layer 45c protrudes laterally from the first frame line 40a, forming an eave-like portion on the first frame line 40a. As a result, the side end surfaces of the first frame line 40a cannot be tightly covered by the second interlayer insulating film 34, and a gap X is formed between the first intermediate metal layer 45b and the second interlayer insulating film 34 on the side of the first frame line 40a.

[0085] This also occurs in the second frame line 40b, which has a three-layer structure similar to that of the first frame line 40a. Specifically, during the manufacturing process of the organic EL display device 1, the second intermediate metal layer 46b is exposed to an alkaline developer used in etching and photolithography during patterning of the second frame line 40b, resulting in side etching that causes the second intermediate metal layer 46b to sink beneath the second upper metal layer 46c. As a result, the second upper metal layer 46c protrudes laterally from the second frame line 40b, forming an eave-like portion on the second frame line 40b. As a result, the side end surfaces of the second frame line 40b cannot be tightly covered by the first insulating coating film 39, and a gap X is formed between the second intermediate metal layer 46b and the first insulating coating film 39 on the side of the second frame line 40b.

[0086] Thus, the gaps X formed on the sides of the first frame line 40a and the second frame line 40b may serve as paths for external moisture to penetrate into the display area DA. Therefore, in the organic EL display device 1 of this embodiment, the first frame line 40a and the second frame line 40b are both formed so that their peripheral edges do not intersect with the joint portion SZ. As a result, the gaps X do not communicate with the inside and outside of the joint portion SZ, and therefore do not serve as paths for external moisture to penetrate into the display area DA.

[0087] Specifically, the outer periphery of the first frame line 40a extends in the region overlapping with the joint SZ except for the first outer connecting line 41, but does not reach the inside of the joint SZ (the display area DA side). The inner periphery of the first frame line 40a extends in the region overlapping with the joint SZ except for the first inner connecting line 42, but does not reach the outside of the joint SZ (the terminal portion TP side). Furthermore, the outer periphery of the second frame line 40b extends in the region overlapping with the joint SZ except for the second outer connecting line 43, but does not reach the inside of the joint SZ (the display area DA side). The inner periphery of the second frame line 40b extends in the region overlapping with the joint SZ except for the second inner connecting line 44, but does not reach the outside of the joint SZ (the terminal portion TP side).

[0088] -Method of Manufacturing Organic EL Display Device- To manufacture the organic EL display device 1, first, an organic resin material is applied to the surface of a glass substrate and baked, thereby forming a substrate layer 10 on the glass substrate.

[0089] Next, the TFT layer 20, the light-emitting element layer 60, and the sealing film 80 are formed in this order on the substrate layer 10 using a known film formation method such as plasma CVD (Chemical Vapor Deposition), sputtering, or vacuum deposition, a known coating method such as spin coating or slit coating, or a known patterning technique such as photolithography.

[0090] Thereafter, the glass substrate is peeled off from the substrate layer 10 by, for example, irradiating the rear surface of the substrate layer 10 with laser light from the glass substrate side. Next, a protective film 11 is attached to the rear surface of the substrate layer 10. A polarizing plate and a cover panel are attached to the surface of the sealing film 80. Furthermore, a wiring substrate CB is connected to the terminal portion TP. As a result, a display control circuit (source driver) is mounted on the panel that constitutes the organic EL display device 1.

[0091] In this manner, the organic EL display device 1 can be manufactured.

[0092] <Steps Relating to First Frame Line and Second Frame Line> In the step of forming the TFT layer 20, a silicon oxide film and a silicon nitride film are sequentially formed on the substrate layer 10 by, for example, plasma CVD, thereby forming a base coat film 21 as shown in FIG.

[0093] Next, an amorphous silicon film is formed on the substrate on which the base coat film 21 has been formed, for example, by plasma CVD, and the amorphous silicon film is crystallized by laser annealing or the like to form a first semiconductor film. Thereafter, the first semiconductor film is patterned by photolithography to form the first semiconductor layer 22.

[0094] Furthermore, a silicon oxide film is formed by, for example, plasma CVD on the substrate on which the first semiconductor layer 22 is formed, thereby forming a first gate insulating film 23 as shown in FIG.

[0095] Next, a molybdenum film is formed by sputtering, for example, to a thickness of about 100 nm to 500 nm on the substrate on which the first gate insulating film 23 has been formed. The molybdenum film is then patterned by photolithography to form the first gate line 40ga, the light-emission control line 40e, the initialization line 40i, and the first gate electrode 24. At this time, lead lines are also formed.

[0096] Next, the surface of the substrate on which the first gate line 40ga and the like are formed is doped with impurity ions such as phosphorus using the first gate electrode 24 as a mask, thereby forming a first channel region 22a and a pair of first conductor regions 22b in the first semiconductor layer 22.

[0097] Furthermore, on the substrate doped with impurity ions, a silicon oxide film is formed to a thickness of about 50 nm to 500 nm by, for example, plasma CVD so as to cover the first gate lines 40ga, the light-emission control lines 40e, the initialization lines 40i, and the first gate electrodes 24, and then a silicon nitride film is formed to a thickness of about 20 nm to 200 nm, thereby forming the first interlayer insulating film 26.

[0098] Next, a molybdenum film is formed by sputtering, for example, to a thickness of about 100 nm to 500 nm on the substrate on which the first interlayer insulating film 26 has been formed. The molybdenum film is then patterned by photolithography to form the third terminal electrode 28, the fourth terminal electrode 29, and the first capacitor electrode 25. At this time, lead wires may also be formed.

[0099] Next, on the substrate on which the third terminal electrode 28 and the like have been formed, InGaZnO ４ Then, a second semiconductor film made of an oxide semiconductor such as SiO 2 is formed. Subsequently, the second semiconductor film is patterned by photolithography to form a second semiconductor layer 31.

[0100] Furthermore, a silicon oxide film is formed by, for example, plasma CVD on the substrate on which the second semiconductor layer 31 is formed. Subsequently, the silicon oxide film is patterned by photolithography to form the second gate insulating film 32. In this example, the second gate insulating film 32 is not formed in the region where the first frame line 40a is to be formed.

[0101] 6(c), a titanium film 101 having a thickness of about 100 nm to 500 nm, an aluminum film 102 having a thickness of about 100 nm to 1000 nm, and a titanium film 103 having a thickness of about 5 nm to 300 nm are formed in this order by, for example, sputtering on the substrate on which the second gate insulating film 32 has been formed. Subsequently, as shown in FIG. 6(d), a photoresist 105 having a predetermined pattern is formed by a known photo process on the substrate on which the stacked film 104 consisting of the titanium film 101, the aluminum film 102, and the titanium film 103 has been formed.

[0102] Next, the laminated film 104 is dry-etched using the photoresist 105 as a mask, thereby patterning the laminated film 104. Thereafter, the photoresist 105 is removed by ashing or chemical treatment. In this way, the second gate line 40gb, the second gate electrode 33, and the second capacitor electrode 30 are respectively formed. At this time, the etching gas is, for example, carbon tetrachloride (CF ４ ) and oxygen (O ２ 6E, a first frame line 40a is formed from the same film as the second gate electrode 33, etc., so as to have a tapered cross section.

[0103] Next, a hydrogen plasma treatment is performed on the surface of the substrate on which the second gate electrode 33 and other components are formed, using the second gate electrode 33 as a mask. This hydrogen plasma treatment exposes the exposed portions of the second semiconductor layer 31 to plasma. When exposed to plasma, the oxide semiconductor constituting the second semiconductor layer 31 suffers oxygen deficiency, resulting in a low resistance. This results in the formation of a second channel region 31 a and a pair of second conductor regions 31 b in the second semiconductor layer 31.

[0104] Furthermore, on the substrate on which the second semiconductor layer 31 has been subjected to such resistance reduction treatment, a silicon oxide film is formed to a thickness of approximately 50 nm to 500 nm, for example, by plasma CVD, and then a silicon nitride film is formed to a thickness of approximately 20 nm to 200 nm. Subsequently, the stacked film made of the silicon oxide film and the silicon nitride film is patterned by photolithography to form the second interlayer insulating film 34. Thus, as shown in FIG. 7A, the first frame line 40a is covered with the second interlayer insulating film 34. This patterning also forms a first contact hole Ha and a second contact hole Hb in the stacked insulating film 36.

[0105] 7(b), a titanium film 106, an aluminum film 107, and a titanium film 108 are formed in this order by, for example, sputtering on the substrate on which the second interlayer insulating film 34 has been formed. Subsequently, as shown in FIG. 7(c), a photoresist 110 is formed in a predetermined pattern by a known photo process on the substrate on which the stacked film 109 consisting of the titanium film 106, the aluminum film 107, and the titanium film 108 has been formed.

[0106] Next, the laminated film 109 is dry-etched using the photoresist 110 as a mask, thereby patterning the laminated film 109. Thereafter, the photoresist 110 is removed by ashing or chemical treatment. In this way, the first terminal electrode 37, the second terminal electrode 38, the relay line 40r, etc. are formed. At this time, the etching gas is, for example, carbon tetrachloride (CF ４ ) and oxygen (O ２7D, the second frame line 40b is formed from the same film as the first terminal electrode 37, etc., so as to have a tapered cross section. This forms the wiring stacked portion 40L.

[0107] Next, a silicon oxide film is formed to a thickness of about 100 nm to 1000 nm by, for example, plasma CVD on the substrate on which the second frame line 40b etc. are formed, and then a silicon nitride film is formed to a thickness of 100 nm to 500 nm. Subsequently, as shown in FIG. 8A, the stacked film consisting of the silicon oxide film and the silicon nitride film is patterned by photolithography to form a first insulating coating film 39.

[0108] Furthermore, a photosensitive resin is applied by a known application method onto the substrate on which the first insulating coating film 39 has been formed. The photosensitive resin coating is then pre-baked, exposed to light, developed, and post-baked to form a planarization film 59 having third contact holes Hc. Then, by a known method, a pixel electrode 61, an edge cover 66, an organic EL layer 62, and a common electrode 63 are formed in this order on the substrate on which the planarization film 59 has been formed. In this way, the light-emitting element layer 60 is formed.

[0109] Thereafter, as shown in FIG. 8B , a first inorganic barrier layer 81 is formed by plasma CVD on the substrate on which the light-emitting element layer 60 has been formed. Subsequently, an organic resin material is applied to the substrate on which the first inorganic barrier layer 81 has been formed, and the applied film of the organic resin material is cured to form an organic barrier layer 82. Then, a second inorganic barrier layer 83 (not shown in FIG. 8B ) is formed by plasma CVD on the substrate on which the organic barrier layer 82 has been formed. Then, a sealing film 80 is formed so as to cover the wiring stacked portion 40L, and a joint portion SZ is formed that extends to correspond to each frame-shaped portion of the first frame line 40a and the second frame line 40b.

[0110] Features of Embodiment 1 In the organic EL display device 1 of Embodiment 1, the first frame line 40a is formed so that its periphery does not intersect with the joint SZ. As a result, even if a gap X is formed on the side of the first frame line 40a between the first intermediate metal layer 45b and the inorganic insulating film (the second interlayer insulating film 34 in this example) covering the first frame line 40a, the gap X does not communicate with the inside and outside of the joint SZ and does not serve as a path for moisture to penetrate from the outside into the display area DA. This makes it possible to prevent moisture from penetrating the display area DA along the first frame line 40a.

[0111] For example, in the organic EL display device 1 of the comparative example, which employs a configuration in which the first frame line 40 a and the second frame line 40 b intersect at their peripheries with the joint portion SZ, if moisture enters the display area DA along the first frame line 40 a or the second frame line 40 b, the luminance of the organic EL element 65 decreases due to degradation in the portion of the display area DA into which moisture has entered (the portion surrounded by the dashed circle) as shown in Fig. 9B , resulting in display unevenness. In contrast, in the organic EL display device 1 of the first embodiment, as described above, the intrusion of moisture into the display area DA along the first frame line 40 a and the second frame line 40 b can be prevented, thereby preventing deterioration of the organic EL element 65 and suppressing display unevenness as shown in Fig. 9A .

[0112] In the organic EL display device 1 of this embodiment, the second frame line 40b is formed so that its periphery does not intersect with the joint portion SZ. As a result, even if a gap X is formed on the side of the second frame line 40b between the second intermediate metal layer 46b and the inorganic insulating film (first insulating coating film 39 in this example) covering the second frame line 40b, the gap X does not communicate with the inside and outside of the joint portion SZ and does not serve as a path for moisture to penetrate from the outside into the display area DA. Therefore, moisture can be prevented from penetrating into the display area DA along the second frame line 40b.

[0113] In the organic EL display device 1 of this embodiment 1, the first frame line 40a and the second frame line 40b connect the pixel circuits PC provided in the display area DA to the terminal portion TP. Because the first frame line 40a and the second frame line 40b must be provided across the inside and outside of the joint portion SZ, they are prone to forming a path for moisture penetration. In contrast, the first frame line 40a and the second frame line 40b of this embodiment are each effective in preventing the formation of a path for moisture penetration, as described above.

[0114] In the organic EL display device 1 of this embodiment 1, the first frame line 40a and the second frame line 40b are each a power supply trunk line. The power supply trunk line preferably has low wiring resistance. To reduce the resistance of the power supply trunk line, it is preferable to configure the power supply trunk line using a laminated film in which multiple metal layers 45, 46 are stacked. The first frame line 40a and the second frame line 40b of this embodiment are each effective in preventing such power supply trunk lines from forming a path for moisture penetration.

[0115] In the organic EL display device 1 of this embodiment, the first frame line 40a and the second frame line 40b are stacked via the second interlayer insulating film 34 to form the wiring stacked portion 40L. This allows the first frame line 40a and the second frame line 40b to be accommodated in a smaller space than when one of the first frame line 40a and the second frame line 40b is provided outside the other. Furthermore, a joint portion SZ can be secured in the region overlapping with the wiring stacked portion 40L.

[0116] In the organic EL display device 1 of this embodiment 1, the second frame line 40b is located above the first frame line 40a, and the line width of the first frame line 40a is wider than the line width of the second frame line 40b. Furthermore, both side surfaces of the second frame line 40b correspond to the upper surface of the first frame line 40a in the stacking direction of the wiring stack 40L. As a result, both side surfaces of the first frame line 40a and both side surfaces of the second frame line 40b are shifted from each other in the width direction of the wiring stack 40L. This improves the step coverage of the first inorganic barrier layer 81 with respect to the wiring stack 40L.

[0117] In the organic EL display device 1 of this embodiment, the first frame line 40a has an eave shape. In this first frame line 40a, a gap X is formed between the metal layer forming the first frame line 40a (in this example, the first intermediate metal layer 45b) and the inorganic insulating film covering the first frame line 40a (in this example, the second interlayer insulating film 34). As described above, the first frame line 40a of this embodiment is effective in preventing the formation of a path for moisture penetration.

[0118] In the organic EL display device 1 of Embodiment 1, the second frame line 40b has an eave shape. In such a second frame line 40b, a gap X is formed between the metal layer forming the second frame line 40b (in this example, the second intermediate metal layer 46b) and the inorganic insulating film covering the second frame line 40b (in this example, the second interlayer insulating film 34). As described above, the second frame line 40b of this embodiment is effective in preventing the formation of a path for moisture penetration.

[0119] In the organic EL display device 1 of this embodiment 1, the first frame line 40a is formed in the same layer and from the same material as the electrodes constituting the circuit elements or the wiring connected to the circuit elements. This eliminates the need to add a process for forming the first frame line 40a in addition to the process for forming the electrodes and wiring of the circuit elements in the manufacture of the organic EL display device 1. This prevents the number of processes required for manufacturing the organic EL display device 1 from increasing, thereby reducing the manufacturing cost of the organic EL display device 1.

[0120] In the organic EL display device 1 of this embodiment 1, the second frame line 40b is formed in the same layer and from the same material as the electrodes constituting the circuit elements or the wiring connected to the circuit elements. This eliminates the need to add a process for forming the second frame line 40b in addition to the process for forming the electrodes and wiring of the circuit elements in the manufacture of the organic EL display device 1. This prevents the number of processes required for manufacturing the organic EL display device 1 from increasing, thereby reducing the manufacturing cost of the organic EL display device 1.

[0121] The organic EL display device 1 of this embodiment 2 differs from the above-described embodiment 1 in the configurations of the second frame line 40b, the first insulating coating film 39, and the common electrode 63. As shown in Fig. 10 , in the organic EL display device 1 of this embodiment 2, the second frame line 40b does not have the second inner connection line 44 like the second frame line 40b of the above-described embodiment 1. The second frame line 40b is an example of an upper wiring, which is a frame line located at the uppermost side of the wiring stack portion 40L.

[0122] 11 , a fourth contact hole Hd is formed in a portion of the first insulating coating film 39 corresponding to the second frame line 40b. The fourth contact hole Hd is an example of an opening. The fourth contact hole Hd is formed in a frame shape along the frame-shaped portion of the second frame line 40b. The fourth contact hole Hd may be formed in, for example, a U-shape so as to correspond to only a portion of the frame-shaped portion of the second frame line 40b in the circumferential direction. The fourth contact hole Hd exposes the upper surface of the second frame line 40b.

[0123] The common electrode 63 is provided so as to extend to a portion of the frame area FA corresponding to the wiring stacked portion 40L. The outer peripheral edge of the common electrode 63 is connected to the upper surface of the second frame line 40b via the fourth contact hole Hd. The common electrode 63 overlaps only a portion of the inner side (display area DA side) of the upper surface of the second frame line 40b exposed through the fourth contact hole Hd. The first inorganic barrier layer 81 extends to the outer peripheral side of the fourth contact hole Hd and contacts the other portion of the upper surface of the second frame line 40b via the fourth contact hole Hd.

[0124] To manufacture the organic EL display device 1 of this embodiment 2, as shown in Fig. 12(a), a first insulating coating film 39 is formed in the same manner as in embodiment 1, and then, as shown in Fig. 12(b), a photoresist 111 is formed in a predetermined pattern on the substrate on which the first insulating coating film 39 has been formed by a known photo process. Next, as shown in Fig. 12(c), the first insulating coating film 39 is patterned using the photoresist 111 as a mask to form fourth contact holes Hd. Then, as shown in Fig. 13(a), the photoresist 111 is removed by ashing or chemical treatment.

[0125] Next, on the substrate with the fourth contact hole Hd formed in the first insulating coating film 39, the pixel electrode 61, edge cover 66, organic EL layer 62, and common electrode 63 are formed in this order by a known method. At this time, as shown in FIG. 13B, the common electrode 63 is formed so as to extend to a portion of the frame area FA corresponding to the wiring stack portion 40L, and is connected to a part of the upper surface of the second frame line 40b via the fourth contact hole Hd. In this way, the light emitting element layer 60 is formed.

[0126] Thereafter, in the same manner as in the first embodiment, a first inorganic barrier layer 81, an organic barrier layer 82, and a second inorganic barrier layer 83 are formed in this order on the substrate on which the light-emitting element layer 60 has been formed. In this manner, as shown in Fig. 13(c) , a sealing film 80 is formed so as to cover the wiring stacked portion 40L, and a joint portion SZ is formed that extends to correspond to each frame-shaped portion of the first frame line 40a and the second frame line 40b.

[0127] - Features of Embodiment 2 - In the organic EL display device 1 of Embodiment 2, the upper surface of the second frame line 40b contacts the first inorganic barrier layer 81. Accordingly, by forming the upper surface of the second frame line 40b from a highly stable metal material, it is possible to ensure the sealing performance of the sealing film 80 even in the region overlapping with the wiring stack portion 40L.

[0128] In the organic EL display device 1 of the second embodiment, the common electrode 63 provided in the display area DA is connected to the upper surface of the second frame line 40b in the frame area FA through the fourth contact hole Hd in the first insulating coating film 39. This allows the common electrode 63 to be connected to the second frame line 40b without extending the second frame line 40b into the display area DA.

[0129] Third Embodiment The organic EL display device 1 of the third embodiment differs from the first embodiment in the configuration of the wiring stack 40L. As shown in Figures 14 and 15 , the organic EL display device 1 of the third embodiment further includes a third frame line 40c as a frame line in the frame area FA. The third frame line 40c is a power supply main line that supplies an initialization voltage. Like the first frame line 40a and the second frame line 40b, the third frame line 40c extends along the joint SZ and is formed in a frame shape around the entire periphery of the area overlapping with the joint SZ.

[0130] The third frame line 40c includes a third outer connection line 47 and a third inner connection line 48. The third outer connection line 47 and the third inner connection line 48 are provided in pairs on both sides in the first direction Dx of a portion of the frame portion of the second frame line 40b that forms the side on the terminal portion TP side. Each of the pair of third outer connection lines 47 extends from the frame portion of the third frame line 40c to the terminal portion TP. Each of the pair of third inner connection lines 48 extends from the frame portion of the third frame line 40c to the display area DA and is connected to the initialization line 40i.

[0131] In this way, the third frame line 40c connects each pixel circuit PC provided in the display area DA to the terminal portion TP. The third frame line 40c is stacked on the second frame line 40b via the first insulating coating film 39. The first insulating coating film 39 is an example of a second inorganic insulating film. The third frame line 40c, together with the first frame line 40a and the second frame line 40b, constitutes the wiring stacked portion 40L. The wiring stacked portion 40L is covered with the second insulating coating film 90. The second insulating coating film 90 is made of, for example, silicon oxide (SiO ２ ), silicon nitride (SiNx), silicon oxynitride, or other inorganic insulating materials.

[0132] The third frame line 40c and both side surfaces of the first and second frame lines 40a and 40b are offset from each other in the width direction of the wiring laminated unit 40L. Specifically, the line width of the second frame line 40b is wider than the line width of the third frame line 40c. Both side surfaces of the third frame line 40c in the width direction correspond to the upper surface of the second frame line 40b in the stacking direction of the wiring laminated unit 40L. The third frame line 40c has a layered structure in which multiple metal layers 49 are stacked. The layered structure of the third frame line 40c in this example is a three-layer configuration, the same as the layered structures of the first and second frame lines 40a and 40b.

[0133] The multiple metal layers 49 forming the third frame line 40c include a third lower metal layer 49a, a third intermediate metal layer 49b, and a third upper metal layer 49c. The third lower metal layer 49a is provided on the surface of the first insulating coating film 39. The third intermediate metal layer 49b is provided on the third lower metal layer 49a. The third upper metal layer 49c is provided on the first intermediate metal layer 45b. The third lower metal layer 49a and the third upper metal layer 49c are each made of titanium (Ti) or a titanium alloy. The third intermediate metal layer 49b is made of aluminum (Al) or an aluminum alloy. The third frame line 40c is covered with a second insulating coating film 90.

[0134] When the third frame line 40c has the above-described three-layer structure, similar to the first frame line 40a and the second frame line 40b, the third intermediate metal layer 49b is exposed to an alkaline developer used in etching and photolithography during patterning of the third frame line 40c, and is side-etched so as to sink beneath the third upper metal layer 49c. As a result, a gap X is formed between the third intermediate metal layer 49b and the second insulating coating film 90 on the side of the third frame line 40c. The gap X formed on the side of the third frame line 40c may serve as a path for external moisture to penetrate into the display area DA.

[0135] Therefore, in the organic EL display device 1 of this third embodiment, the third frame line 40c is formed so that its periphery does not intersect with the joint portion SZ. As a result, the gap X does not communicate with the inside and outside of the joint portion SZ, and therefore does not serve as a path for moisture to penetrate from the outside into the display area DA. Specifically, the outer periphery of the third frame line 40c extends through the area overlapping with the joint portion SZ, excluding the third outer connecting line 47, and does not reach the inside of the joint portion SZ (the display area DA side). The inner periphery of the third frame line 40c extends through the area overlapping with the joint portion SZ, excluding the first inner connecting line 42, and does not reach the outside of the joint portion SZ (the terminal portion TP side).

[0136] To manufacture the organic EL display device 1 of this embodiment 3, as shown in Figure 16(a), a first insulating coating film 39 is formed in the same manner as in embodiment 1 above, and then, as shown in Figure 16(b), a titanium film 121 with a thickness of approximately 100 nm to 500 nm, an aluminum film 122 with a thickness of approximately 100 nm to 1000 nm, and a titanium film 123 with a thickness of approximately 5 nm to 300 nm are formed in this order on the substrate on which the first insulating coating film 39 has been formed, for example by sputtering.

[0137] Next, as shown in FIG. 16(c), a photoresist 125 is formed in a predetermined pattern by a known photo process on the substrate on which the laminated film 124 consisting of the titanium film 121, the aluminum film 122, and the titanium film 123 has been formed. Next, the laminated film 124 is patterned by dry etching using the photoresist 125 as a mask. Thereafter, the photoresist 125 is removed by ashing or chemical treatment. By doing so, the third frame line 40c is formed so as to have a tapered cross section, as shown in FIG. 17(a). At this time, the etching gas is, for example, carbon tetrachloride (CF ４ ) and oxygen (O ２ ) mixed gas is used.

[0138] Next, a silicon oxide film is formed to a thickness of about 100 nm to 1000 nm by, for example, plasma CVD on the substrate on which the third frame line 40c is formed, and then a silicon nitride film is formed to a thickness of 100 nm to 500 nm. Subsequently, as shown in FIG. 17B, the stacked film consisting of the silicon oxide film and the silicon nitride film is patterned by photolithography to form a second insulating coating film 90.

[0139] Next, in the same manner as in the first embodiment, a planarization film 59 and a light-emitting element layer 60 are formed on the substrate on which the second insulating coating film 90 has been formed. Thereafter, a first inorganic barrier layer 81, an organic barrier layer 82, and a second inorganic barrier layer 83 are formed in this order on the substrate on which the light-emitting element layer 60 has been formed. By doing so, as shown in FIG. 17( c), a sealing film 80 is formed so as to cover the wiring stacked portion 40L, and joints SZ are formed that extend to correspond to the frame-shaped portions of the first frame line 40a, the second frame line 40b, and the third frame line 40c.

[0140] Features of Embodiment 3 In the organic EL display device 1 of Embodiment 3, the third frame line 40c is formed so that its periphery does not intersect with the joint SZ. As a result, even if a gap X is formed on the side of the third frame line 40c between the first intermediate metal layer 45b and the inorganic insulating film (the second interlayer insulating film 34 in this example) covering the first frame line 40a, the gap X does not communicate with the inside and outside of the joint SZ and does not serve as a path for moisture to penetrate from the outside into the display area DA. This makes it possible to prevent moisture from penetrating the display area DA along the third frame line 40c.

[0141] In the organic EL display device 1 of this third embodiment, the third frame line 40c is located above the second frame line 40b, and the line width of the second frame line 40b is wider than the line width of the third frame line 40c. Furthermore, both side surfaces of the third frame line 40c correspond to the upper surface of the second frame line 40b in the stacking direction of the wiring stack 40L. As a result, both side surfaces of the second frame line 40b and both side surfaces of the third frame line 40c are shifted from each other in the width direction of the wiring stack 40L. This improves the step coverage of the first inorganic barrier layer 81 with respect to the wiring stack 40L.

[0142] Other Embodiments In the above-described first to third embodiments, the line width of the first frame line 40a is wider than the line width of the second frame line 40b, and both side surfaces of the second frame line 40b correspond to the upper surface of the first frame line 40a in the stacking direction of the wiring stacked unit 40L. However, this is not limited to this. The line width of the first frame line 40a may be narrower than the line width of the second frame line 40b. Furthermore, both side surfaces of the first frame line 40a may correspond to the upper surface of the second frame line 40b in the stacking direction of the wiring stacked unit 40L.

[0143] In the above-described first to third embodiments, the first frame line 40a is formed of the same material in the same layer as the second gate line 40gb, etc., and the second frame line 40b is formed of the same material in the same layer as the first terminal electrode 37, etc. However, this is not limiting, and the first frame line 40a and the second frame line 40b may each be formed of the same material in the same layer as electrodes constituting other circuit elements or wiring connected to the circuit elements. Furthermore, the first frame line 40a and the second frame line 40b may each be formed in a separate process from the electrodes constituting the circuit elements or the wiring connected to the circuit elements.

[0144] Furthermore, the third frame line 40c in the third embodiment may be formed in the same layer and made of the same material as the electrodes constituting the circuit elements or the wiring connected to the circuit elements. For example, the first frame line 40a may be formed in a separate process from the electrodes constituting the circuit elements or the wiring connected to the circuit elements, the second frame line 40b may be formed in the same layer and made of the same material as the second gate line 40gb, etc., and the third frame line 40c may be formed in the same layer and made of the same material as the first terminal electrode 37, etc.

[0145] In the above-described first to third embodiments, the first frame line 40a has an eave shape, but this is not limiting. The first frame line 40a may have a cross-sectional inverted tapered shape in which the line width narrows toward the lower layer. In such a first frame line 40a, a gap is formed between the metal layer forming the first frame line 40a and the inorganic insulating film covering the first frame line 40a. The technology disclosed herein is effective in preventing the first frame line 40a from forming a path for moisture penetration through the gap. This is also true for the second frame line 40b and the third frame line 40c in the third embodiment.

[0146] In the above-described first to third embodiments, the first frame line 40a is a power supply trunk line that supplies a high-level power supply voltage, and the second frame line 40b is a power supply trunk line that supplies a low-level power supply voltage, but this is not limited to this. For example, in a configuration in which the pixel electrode 61 functions as a cathode and the common electrode 63 functions as an anode, as will be described later, the first frame line 40a may be a power supply trunk line that supplies a low-level power supply voltage, and the second frame line 40b may be a power supply trunk line that supplies a high-level power supply voltage.

[0147] Furthermore, in the third embodiment, the third frame line 40c is a power supply trunk line that supplies an initialization voltage, but this is not limited to this. For example, the third frame line 40c may be a power supply trunk line that supplies a low-level power supply voltage, and the second frame line 40b may be a power supply trunk line that supplies an initialization voltage. Furthermore, in the first to third embodiments, the first frame line 40a and the second frame line 40b may be wiring other than the power supply trunk lines. This also applies to the third frame line 40c in the third embodiment.

[0148] In the first and second embodiments, the first frame line 40 a and the second frame line 40 b are provided as frame lines to form the wiring stacked portion 40L, and in the third embodiment, the first frame line 40 a, the second frame line 40 b, and the third frame line 40 c are provided as frame lines to form the wiring stacked portion 40L. However, this is not limiting. Only one frame line may be provided in the frame area FA of the organic EL display device 1.

[0149] In the above embodiment, the organic EL layer 62 is provided individually for each subpixel SP, but this is not limited to this. The organic EL layer 62 may be provided as a continuous layer common to multiple subpixels SP. In this case, the organic EL display device 1 may be provided with a color filter or the like to express color tones in each subpixel SP.

[0150] In the above embodiment, each pixel PX is configured with sub-pixels SP of three colors, but this is not limited to this. The sub-pixels SP that configure each pixel PX may be of four or more colors. Furthermore, the three sub-pixels SP that configure each pixel PX are arranged in a stripe pattern, but this is not limited to this. The arrangement of the multiple sub-pixels SP may be another arrangement, such as a pentile arrangement.

[0151] In the above embodiment, the pixel electrode 61 functions as an anode and the common electrode functions as a cathode, but this is not limiting. The organic EL display device 1 may be configured so that the pixel electrode 61 functions as a cathode and the common electrode 63 functions as an anode. In this case, the organic EL layer 62 has an inverted stacked structure.

[0152] In the above embodiment, the organic EL layer 62 has a five-layer structure including a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, but is not limited to this. The organic EL layer 62 may have a three-layer structure including a hole injection / transport layer, a light-emitting layer, and an electron injection / transport layer, or any other laminated structure may be adopted.

[0153] In the above embodiment, the base substrate of the organic EL display device 1 is the substrate layer 10, but this is not limiting. The base substrate may be made of any material, such as a plastic substrate made of polyethylene terephthalate (PET) or a glass substrate.

[0154] In the above embodiment, the organic EL display device 1 is illustrated as an example of a display device according to the present disclosure, but the present disclosure is not limited to this. The technology of the present disclosure can be applied to a display device including a plurality of light-emitting elements. An example of such a display device is a quantum dot display device including QLEDs (Quantum-dot Light Emitting Diodes), which are light-emitting elements using a quantum dot-containing layer.

[0155] As described above, preferred embodiments have been described as examples of the technology of the present disclosure. However, the technology of the present disclosure is not limited to these, and can be applied to embodiments in which appropriate modifications, substitutions, additions, omissions, etc. are made. It will be understood by those skilled in the art that various modifications are possible to the above-described embodiments without departing from the spirit of the technology of the present disclosure, and that such modifications also fall within the scope of the technology of the present disclosure.

[0156] As described above, the present disclosure is useful for display devices.

[0157] DA Display area FA Frame area Hd Fourth contact hole (opening) PC Pixel circuit SZ Bonding portion TP Terminal portion 1 Organic EL display device (display device) 5 Circuit substrate 34 Second interlayer insulating film (first inorganic insulating film) 36 Stacked insulating film 39 First covering insulating film (covering insulating film, second inorganic insulating film) 40a First frame line (frame line) 40b Second frame line (frame line) 40c Third frame line (frame line) 40L Wiring stacked portion 45 Metal layer 45a First lower metal layer (lower metal layer) 45b First intermediate metal layer (intermediate metal layer) 45c First upper metal layer (upper metal layer) 46 Metal layer 46a Second lower metal layer (lower metal layer) 46b Second intermediate metal layer (intermediate metal layer) 46c Second upper metal layer (upper metal layer) 49 Metal layer 49a Third lower metal layer (lower metal layer) 49b Third intermediate metal layer (intermediate metal layer) 49c Third upper metal layer (upper metal layer) 50 TFT (circuit element) 55 Capacitor (circuit element) 80 Sealing film 81 First inorganic barrier layer (inorganic barrier layer) 82 Organic barrier layer 83 Second inorganic barrier layer

Claims

1. A display device comprising: a circuit board; a plurality of light-emitting elements provided on the circuit board; and a sealing film provided to cover the plurality of light-emitting elements, wherein the plurality of light-emitting elements form a display area for displaying an image, and a frame area is provided outside the display area as a non-display area in which no image is displayed, the circuit board includes a base substrate and a laminated insulating film provided on the base substrate so as to extend into the frame area and formed by laminating inorganic insulating materials, the sealing film having an inorganic barrier layer made of an inorganic insulating material, the frame area includes a frame-shaped joint portion at which a portion along a periphery of the inorganic barrier layer contacts the laminated insulating film, and a terminal portion located outside the joint, and a frame line is provided in the frame area, extending along the joint portion and being drawn out to the terminal portion, the frame line having a laminated structure in which a plurality of metal layers are laminated, and is formed so that its periphery does not intersect with the joint portion.

2. A display device according to claim 1, wherein the frame line connects pixel circuits provided in the display region to the terminal section.

3. A display device according to claim 1 or 2, wherein the frame line is formed in a frame shape around the entire periphery of the area overlapping with the joint portion.

4. A display device according to any one of claims 1 to 3, wherein the frame line is a power supply main line for applying a voltage to the light-emitting element.

5. A display device according to claim 4, wherein a first frame line and a second frame line are provided as the frame lines, one of the first frame line and the second frame line being a power supply main line for supplying a high-level power supply voltage, and the other being a power supply main line for supplying a low-level power supply voltage.

6. A display device according to claim 5, wherein the first frame line and the second frame line are laminated via a first inorganic insulating film to form a wiring laminate section.

7. A display device as described in claim 6, wherein the second frame line is located at a higher layer than the first frame line, the line width of the first frame line is wider than the line width of the second frame line, and both side surfaces in the width direction of the second frame line correspond to the upper surface of the first frame line in the stacking direction of the wiring stack portion.

8. A display device according to claim 6, further comprising a third frame line laminated on the second frame line via a second inorganic insulating film, the third frame line constituting the wiring laminate portion together with the first frame line and the second frame line.

9. A display device according to claim 8, wherein the line width of the second frame line is wider than the line width of the third frame line, and both side surfaces in the width direction of the third frame line correspond to the upper surface of the second frame line in the stacking direction of the wiring stack portion.

10. A display device according to any one of claims 6 to 9, wherein an upper surface of the upper wiring, which is the frame line located at the uppermost side of the wiring stack, is in contact with the inorganic barrier layer.

11. A display device according to claim 10, wherein the wiring stack is covered by a coating insulating film made of an inorganic insulating material, the coating insulating film has an opening formed therein to expose an upper surface of the upper wiring, and the inorganic barrier layer contacts the upper surface of the upper wiring through the opening in the coating insulating film.

12. A display device as claimed in claim 10 or 11, wherein the wiring stack is covered by a covering insulating film made of an inorganic insulating material, an opening is formed in the covering insulating film to expose an upper surface of the upper wiring, and a conductor film provided in the display region extends to the frame region and is connected to the upper surface of the upper wiring via the opening in the covering insulating film.

13. A display device according to any one of claims 1 to 12, wherein the plurality of metal layers include a lower metal layer, an intermediate metal layer provided on the lower metal layer, and an upper metal layer provided on the intermediate metal layer.

14. The display device according to claim 13, wherein the lower metal layer and the upper metal layer are made of titanium or a titanium alloy, and the intermediate metal layer is made of aluminum or an aluminum alloy.

15. A display device according to any one of claims 1 to 14, wherein the frame line has an eave shape in which an upper metal layer of adjacent metal layers projects outward in the width direction more than a lower metal layer, or has a cross-sectional inverse tapered shape in which the line width narrows toward the lower layer.

16. A display device according to any one of claims 1 to 15, wherein the circuit board includes a plurality of circuit elements provided in the display area, and the frame line is formed in the same layer and from the same material as the electrodes constituting the circuit elements or the wiring connected to the circuit elements.

17. A display device according to any one of claims 1 to 16, wherein the sealing film includes a first inorganic barrier layer as the inorganic barrier layer, an organic barrier layer provided on the first inorganic barrier layer, and a second inorganic barrier layer provided on the organic barrier layer.

18. The display device according to any one of claims 1 to 17, wherein the light-emitting element is an organic electroluminescence element.

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