Display panel, manufacturing method therefor, and display apparatus

Abstract

A display panel, the display panel comprising a base substrate (101), a driving circuit layer (102), a light-emitting device layer (EM), an encapsulation layer (EN), and a gray flat layer (GO). The driving circuit layer (102) is arranged on the base substrate (101); the light-emitting device layer (EM) is arranged on the side of the driving circuit layer (102) away from the base substrate (101); the encapsulation layer (EN) is arranged on the side of the light-emitting device layer (EM) away from the base substrate (101); the gray flat layer (GO) is arranged on the side of the encapsulation layer (EN) away from the base substrate (101). The display panel is provided with a main display region (AA), a sensor region (SS) and a light-transmitting display region (FDC), the main display region (AA) at least partially surrounding the sensor region (SS) and the light-transmitting display region (FDC), and the gray flat layer (GO) being arranged in the main display region (AA), the sensor region (SS) and the light-transmitting display region (FDC). The display panel has a low thickness, such that an ultra-thin display panel is achieved.

Description

Display panel and manufacturing method thereof, and display device Technical Field

[0001] Embodiments of the present disclosure relate to a display panel, a method for manufacturing the same, and a display device. Background Art

[0002] OLED (Organic Light Emitting Diode) displays offer a range of advantages, including self-luminescence, high contrast, high definition, wide viewing angle, low power consumption, fast response, and low manufacturing costs. They have become a key development direction for next-generation display devices and are therefore attracting increasing attention. Currently, optimizing the structure of display devices is a topic of ongoing research for those skilled in the art.

[0003] Summary of the Invention

[0004] At least one embodiment of the present disclosure provides a display panel, which includes a base substrate, a driving circuit layer, a light-emitting device layer, an encapsulation layer and a gray flat layer; the driving circuit layer is arranged on the base substrate, the light-emitting device layer is arranged on a side of the driving circuit layer away from the base substrate, the encapsulation layer is arranged on a side of the light-emitting device layer away from the base substrate, and the gray flat layer is arranged on a side of the encapsulation layer away from the base substrate; wherein, the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is arranged in the main display area, the sensor area and the light-transmitting display area.

[0005] For example, the display panel provided in at least one embodiment of the present disclosure further includes: a black matrix layer, arranged on a side of the encapsulation layer away from the base substrate, wherein the gray flat layer is arranged on a side of the black matrix layer away from the base substrate.

[0006] For example, in the display panel provided by at least one embodiment of the present disclosure, the main display area includes a plurality of first sub-pixels, each of the plurality of first sub-pixels includes a first light-emitting device located in the light-emitting device layer, the sensor area includes a plurality of second sub-pixels, each of the plurality of second sub-pixels includes a second light-emitting device located in the light-emitting device layer, and the black matrix layer includes a plurality of first light-emitting openings exposing the first light-emitting devices in the main display area, and includes a plurality of second light-emitting openings exposing the second light-emitting devices and a first sensor opening located between the plurality of second light-emitting openings in the sensor area.

[0007] For example, in the display panel provided by at least one embodiment of the present disclosure, the material of the gray flat layer is filled in the multiple first light exit openings, the multiple second light exit openings and the first sensor opening, wherein the area of ​​the material of the gray flat layer filled in the multiple first light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening, and the area of ​​the material of the gray flat layer filled in the multiple second light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening.

[0008] For example, in the display panel provided in at least one embodiment of the present disclosure, the light-transmitting display area includes a plurality of third sub-pixels, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the light-transmitting display area, the ratio of the light-emitting area of ​​the third light-emitting device to the light-emitting area of ​​the first light-emitting device is 1:4 to 1:2, and the black matrix layer includes a plurality of annular shading portions in the light-transmitting display area that respectively expose the third light-emitting devices of the plurality of third sub-pixels, and the plurality of annular shading portions are arranged at intervals.

[0009] For example, in the display panel provided by at least one embodiment of the present disclosure, the area of ​​the gray flat layer material filled in the plurality of annular light shielding portions is larger than the area of ​​the gray flat layer material filled in the first sensor opening.

[0010] For example, in the display panel provided by at least one embodiment of the present disclosure, the first light-emitting device includes a first anode pattern, a first light-emitting pattern and a first cathode layer which are stacked, the first cathode layers of the first light-emitting devices of the multiple first sub-pixels are continuously arranged in the main display area, the third light-emitting devices of the multiple third sub-pixels include a third anode pattern, a third light-emitting pattern and a third cathode pattern which are stacked, and the third cathode patterns of the third light-emitting devices of the multiple third sub-pixels are arranged at intervals in the light-transmitting display area.

[0011] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes multiple sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area. The sensor area includes a second sensor opening that at least partially overlaps with the first sensor opening in a direction perpendicular to the base substrate, and the light-transmitting display area includes multiple sub-pixel walls for defining the multiple third sub-pixel openings, and the multiple sub-pixel walls are arranged at intervals.

[0012] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-transmitting display area includes a sub-pixel setting area and a sub-pixel removal area, the sub-pixel setting area includes a plurality of third sub-pixels, the sub-pixel removal area does not include sub-pixels, the area ratio of the sub-pixel setting area to the sub-pixel removal area is 1:3 to 1:1, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the sub-pixel setting area, the light-emitting area of ​​the third light-emitting device is equal to the light-emitting area of ​​the first light-emitting device, the sub-pixel setting area also includes a plurality of first routing lines arranged at the edges of the plurality of third sub-pixels, the black matrix layer includes a plurality of first shielding lines in the sub-pixel setting area that at least partially overlap with the plurality of first routing lines in a direction perpendicular to the base substrate, and is hollowed out in the sub-pixel removal area.

[0013] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer further includes a pixel defining layer for defining sub-pixels, and the pixel defining layer is hollowed out in the sub-pixel removal area.

[0014] For example, in the display panel provided by at least one embodiment of the present disclosure, in a direction perpendicular to the base substrate, the first thickness of the gray flat layer in the main display area is 2μm-3μm, the second thickness of the gray flat layer in the sensor area is 0.2μm-0.5μm higher than the first thickness, and the third thickness of the gray flat layer in the light-transmitting display area is 0.4μm-0.6μm lower than the first thickness.

[0015] For example, the display panel provided by at least one embodiment of the present disclosure also includes: a reflection reduction layer, located in the sensor area and the light-transmitting display area, and located on the side of the second light-emitting device or the third light-emitting device away from the base substrate, wherein the encapsulation layer is located on the side of the reflection reduction layer away from the base substrate.

[0016] For example, in the display panel provided in at least one embodiment of the present disclosure, the material of the anti-reflection layer includes at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride, and the thickness of the anti-reflection layer in the direction perpendicular to the base substrate is 8nm-10nm.

[0017] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area. In the main display area, the first orthographic projection of the sub-pixel opening on the base substrate is located within the second orthographic projection of the first light output opening on the base substrate. In the sensor area, the third orthographic projection of the second light output opening on the base substrate is located within the fourth orthographic projection of the sub-pixel opening on the base substrate.

[0018] For example, in the display panel provided by at least one embodiment of the present disclosure, the third orthographic projection is shrunk by 1 μm-4 μm relative to the fourth orthographic projection.

[0019] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes multiple sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area, and the sensor area includes a second sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate, and the second light-emitting devices of the multiple second sub-pixels include a second anode pattern, a second light-emitting pattern, and a second cathode layer arranged in a stacked manner, and the second cathode layer is continuously arranged in the sensor area and includes a third sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate.

[0020] For example, in the display panel provided by at least one embodiment of the present disclosure, the fifth orthographic projection of the second sensor opening on the base substrate is located within the sixth orthographic projection of the third sensor opening on the base substrate.

[0021] For example, in the display panel provided by at least one embodiment of the present disclosure, the fifth orthographic projection is shrunk by 1 μm-2 μm relative to the sixth orthographic projection.

[0022] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer, the touch layer is arranged on the side of the encapsulation layer away from the base substrate, and includes a touch wiring layer and a touch insulation layer located on the side of the touch wiring layer away from the base substrate, wherein the gray flat layer is arranged on the side of the touch insulation layer away from the base substrate, and the black matrix layer is arranged on the side of the gray flat layer away from the base substrate.

[0023] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer, the touch layer is arranged on the side of the encapsulation layer away from the base substrate, and includes a touch wiring layer, and the touch wiring layer includes a plurality of touch wirings, wherein the gray flat layer is arranged on the side of the touch wiring layer away from the base substrate and contacts the plurality of touch wirings, and the black matrix layer is arranged on the side of the gray flat layer away from the base substrate.

[0024] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer; the touch layer is arranged on the side of the encapsulation layer away from the base substrate, including a touch routing layer, the touch routing layer including a plurality of touch routings, the black matrix layer is arranged on the side of the touch routing layer away from the base substrate, including a plurality of second shielding lines that contact and cover the plurality of touch routings, wherein the gray flat layer is arranged on the side of the black matrix layer away from the base substrate.

[0025] For example, the display panel provided in at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer; the black matrix layer is arranged on the side of the encapsulation layer away from the base substrate, and the touch layer is arranged on the side of the black matrix layer away from the base substrate, including a touch wiring layer, the touch wiring layer including multiple touch wirings, wherein the gray flat layer is arranged on the side of the touch wiring layer away from the base substrate.

[0026] For example, the display panel provided by at least one embodiment of the present disclosure further includes: a molybdenum oxide layer located on a side of the plurality of touch lines away from the base substrate, and including a plurality of cover lines to cover the plurality of touch lines.

[0027] For example, the display panel provided in at least one embodiment of the present disclosure also includes a black matrix layer and a transparent insulating layer; the black matrix layer is arranged on the side of the encapsulation layer away from the base substrate, including a plurality of shading patterns, and the transparent insulating layer is arranged on the side of the black matrix layer away from the base substrate, including a plurality of covering patterns, and the plurality of covering patterns respectively cover the plurality of shading patterns, wherein the gray flat layer is located on the side of the transparent insulating layer away from the base substrate.

[0028] For example, in the display panel provided by at least one embodiment of the present disclosure, the refractive index of the transparent insulating layer is n1, and the refractive index of the gray flat layer is n2, then: n1<n2.

[0029] For example, in the display panel provided by at least one embodiment of the present disclosure, n2-n1≥0.05.

[0030] For example, in the display panel provided by at least one embodiment of the present disclosure, the light transmittance of the gray flat layer is 40%-60%.

[0031] For example, in the display panel provided by at least one embodiment of the present disclosure, the gray flat layer includes a transparent matrix and a light-absorbing material dispersed in the transparent matrix.

[0032] For example, in the display panel provided in at least one embodiment of the present disclosure, the light-absorbing material includes at least one of oxazine compounds, cyanine compounds, porphyrazine compounds, and squarylium compounds.

[0033] At least one embodiment of the present disclosure further provides a display device, which includes the display panel provided by an embodiment of the present disclosure.

[0034] At least one embodiment of the present disclosure also provides a method for preparing a display panel, comprising: providing a base substrate, forming a driving circuit layer on the base substrate, forming a light-emitting device layer on a side of the driving circuit layer away from the base substrate, forming an encapsulation layer on a side of the light-emitting device layer away from the base substrate, and forming a gray flat layer on a side of the encapsulation layer away from the base substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is formed in the main display area, the sensor area and the light-transmitting display area. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.

[0036] FIG1 is a schematic plan view of a display panel provided by at least one embodiment of the present disclosure;

[0037] FIG2 is a partial cross-sectional schematic diagram of a display panel provided by at least one embodiment of the present disclosure;

[0038] 3 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in a display panel provided by at least one embodiment of the present disclosure;

[0039] FIG4 is a partial cross-sectional schematic diagram of another display panel provided by at least one embodiment of the present disclosure;

[0040] FIG5A is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in a display panel provided by at least one embodiment of the present disclosure;

[0041] 5B is a partial plan view of a black matrix in a main display area, a sensor area, and a light-transmitting display area of ​​a display panel provided by at least one embodiment of the present disclosure;

[0042] FIG6 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0043] FIG7 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0044] FIG8 is a diagram illustrating a principle of reducing reflection of a reduction layer in a display panel according to at least one embodiment of the present disclosure;

[0045] FIG9 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0046] FIG10 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in yet another display panel provided by at least one embodiment of the present disclosure;

[0047] FIG11 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0048] FIG12 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in yet another display panel provided by at least one embodiment of the present disclosure;

[0049] FIG13 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0050] FIG14 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0051] FIG15 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0052] FIG16 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0053] FIG17 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0054] FIG18 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0055] FIG19 is a plan view of a main display area in a display panel provided by at least one embodiment of the present disclosure; and

[0056] FIG20 is a plan view of a sensor area in a display panel according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0057] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0058] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0059] With increasing user demand for display devices like mobile phones and tablets, and the continuous advancement of display technology, users are increasingly demanding thinner display devices. Color filter on encapsulation (COE) technology reduces reflectivity by creating a black matrix (BM) and color filter (CF) above the encapsulation layer, thereby replacing circular polarizers.

[0060] In COE technology, color filters of different colors are respectively arranged above the light-emitting layers of the light-emitting devices of the sub-pixels of the corresponding colors. The color filters of different colors have high light transmittance to pass the light emitted by the light-emitting devices. The interval areas of the light-emitting devices are blocked by a black matrix. The black matrix can absorb most of the external light to achieve the effect of reducing reflection and increasing transmittance.

[0061] Currently, the thickness of circular polarizers used in flexible OLED displays is around 50μm, while COE technology can reduce this thickness to below 5μm, significantly reducing the thickness of display devices. However, users are still pursuing thinner display devices, and manufacturers are still pursuing simpler manufacturing processes.

[0062] At least one embodiment of the present disclosure provides a display panel, a preparation method thereof, and a display device, wherein the display panel includes a base substrate, a driving circuit layer, a light-emitting device layer, an encapsulation layer, and a gray flat layer; the driving circuit layer is arranged on the base substrate, the light-emitting device layer is arranged on a side of the driving circuit layer away from the base substrate, the encapsulation layer is arranged on a side of the light-emitting device layer away from the base substrate, and the gray flat layer is arranged on a side of the encapsulation layer away from the base substrate; wherein the display panel has a main display area, a sensor area, and a translucent display area, the main display area at least partially surrounds the sensor area and the translucent display area, and the gray flat layer is arranged in the main display area, the sensor area, and the translucent display area.

[0063] The above-mentioned display panel provided by the embodiment of the present disclosure uses a gray flat layer instead of the color film in the COE technology, thereby reducing the difficulty of manufacturing the display panel, such as reducing the number of masks for making the color film, and reducing the consumption of color film materials. At the same time, it can also achieve anti-reflection and anti-reflection and thinning of the display panel.

[0064] The display panel and its manufacturing method, and the display device provided by the embodiments of the present disclosure are described in detail below through several specific embodiments.

[0065] At least one embodiment of the present disclosure provides a display panel, FIG1 showing a schematic plan view of the display panel, and FIG2 showing a partial cross-sectional view of the display panel. As shown in FIG1 and FIG2, the display panel includes a substrate 101, a driving circuit layer 102, a light-emitting device layer EM, an encapsulation layer EN, and a gray flat layer GO.

[0066] As shown in Figures 1 and 2, the driving circuit layer 102 is provided on the base substrate 101 and includes a plurality of pixel driving circuits. For example, each pixel driving circuit includes a plurality of thin film transistors and a storage capacitor, and can be formed into various forms such as 3T1C (i.e., including three thin film transistors and one storage capacitor), 7T1C (i.e., including seven thin film transistors and one storage capacitor), 8T1C (i.e., including eight thin film transistors and one storage capacitor), or 8T2C (i.e., including eight thin film transistors and two storage capacitors). The embodiments of the present disclosure do not limit the form of the plurality of pixel driving circuits in the driving circuit layer 102.

[0067] The light-emitting device layer EM is disposed on a side of the driver circuit layer 102 that is away from the base substrate 101 and includes a plurality of light-emitting devices. The plurality of pixel driver circuits in the driver circuit layer 102 are configured to drive the plurality of light-emitting devices in the light-emitting device layer EM to emit light, thereby achieving display. The plurality of light-emitting devices may be, for example, OLED display devices or QLED display devices.

[0068] The encapsulation layer EN is disposed on a side of the light-emitting device layer EM away from the base substrate 101 to encapsulate the multiple light-emitting devices in the light-emitting device layer EM. The encapsulation layer EN may be, for example, a composite encapsulation layer comprising multiple sub-encapsulation layers, such as a stack of multiple inorganic and organic encapsulation sub-layers. For example, the inorganic encapsulation sub-layers may be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, while the organic encapsulation sub-layers may be made of an organic insulating material such as polyimide or resin. The embodiments of the present disclosure do not limit the specific form of the encapsulation layer EN.

[0069] The gray flat layer GO is disposed on a side of the encapsulation layer EN away from the base substrate 101 .

[0070] In the embodiments of the present disclosure, the gray flat layer GO has a certain grayscale, and the light transmittance of the gray flat layer GO is lower than the light transmittance of a conventional transparent flat layer. For example, the light transmittance of the gray flat layer GO can be 40%-60%, such as 50%-60%, such as 55%, while the light transmittance of a conventional transparent flat layer is generally above 95%.

[0071] For example, in some embodiments, the gray flat layer GO includes a transparent matrix and a light-absorbing material dispersed in the transparent matrix. For example, the transparent matrix may include an organic insulating material such as polyimide or resin; and the light-absorbing material may include at least one of a dye or pigment such as an oxazine compound, a cyanine compound, a tetraazine porphyrin compound, or a squarylium cyanide compound.

[0072] For example, in some embodiments, the thickness of the gray flat layer GO (that is, the dimension in the direction perpendicular to the base substrate 101, that is, the dimension in the vertical direction in Figure 2) can be 1μm-10μm, for example, 2μm-8μm, for example, 2μm-5μm, for example, 2μm-3μm, for example, 2.2μm, 2.5μm or 2.7μm, etc.

[0073] For example, in other embodiments, the gray flat layer GO may also have selective light transmittance, such as selectively absorbing light in the range of 480nm-510nm and 560nm-590nm. In this case, the peak transmittance of the gray flat layer GO is 50%-60%.

[0074] In the embodiments of the present disclosure, the gray flat layer GO can replace the color film in the traditional COE technology, thereby reducing the difficulty of manufacturing the display panel, such as reducing the number of masks used to make the color film, and reducing the consumption of color film materials. At the same time, it can also achieve anti-reflection and anti-reflection and thinning of the display panel.

[0075] For example, as shown in Figure 1, the display panel includes a main display area AA, a sensor area SS, and a translucent display area FDC. The main display area AA is the primary display area of ​​the display panel. The sensor area SS can also display and may also include sensors, such as an ambient light sensor, to enable other functions besides display. The translucent display area FDC is at least partially translucent and can be used in conjunction with devices such as a camera to enable simultaneous photography and video recording.

[0076] As shown in FIG1 , the main display area AA at least partially surrounds the sensor area SS and the light-transmitting display area FDC. That is, the sensor area SS and the light-transmitting display area FDC may be at least partially disposed in the main display area AA, so that the entire main display area AA can display.

[0077] For example, a gray flat layer GO is provided in the main display area AA, the sensor area SS, and the light-transmitting display area FDC. Thus, the gray flat layer GO can be used in the main display area AA, the sensor area SS, and the light-transmitting display area FDC to replace the color filter used in traditional technology, thereby simplifying the display panel manufacturing method and achieving the purpose of thinning.

[0078] For example, in some embodiments, as shown in FIG2 , the display panel may further include a black matrix layer BM, which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and a gray flat layer GO is disposed on a side of the black matrix layer away from the base substrate 101 .

[0079] For example, in some embodiments, as shown in FIG2 , the display panel may further include a touch layer T, which is disposed on a side of the encapsulation layer EN away from the base substrate 101. In this case, the black matrix layer BM is disposed on a side of the touch layer T away from the base substrate 101. For example, the touch layer T may include a plurality of touch traces for implementing a touch function.

[0080] For example, as shown in FIG2 , the main display area AA includes a plurality of first subpixels, each of which includes a first light-emitting device EM1 located in the light-emitting device layer EM. The sensor area SS includes a plurality of second subpixels, each of which includes a second light-emitting device EM2 located in the light-emitting device layer EM. The black matrix layer BM includes a plurality of first light exit openings BM1 in the main display area AA that expose the first light-emitting devices EM1. The black matrix layer BM includes a plurality of second light exit openings BM2 in the sensor area SS that expose the second light-emitting devices EM2, and a first sensor opening BM0 located between the plurality of second light exit openings BM2. The plurality of first light exit openings BM1 are used to emit light emitted by the plurality of first light-emitting devices EM1. The plurality of second light exit openings BM2 are used to emit light emitted by the plurality of second light-emitting devices EM2. The first sensor opening BM0 is used to transmit light for sensor operation.

[0081] For example, the sensor area SS is provided with a sensor S, which may be integrated on a side of the base substrate 101 away from the driving circuit layer 102. For example, the sensor S may be an ambient light sensor, which may sense ambient light through the first sensor opening BM0.

[0082] For example, as shown in FIG2 , the light-transmitting display area FDC includes a plurality of third sub-pixels, each of which includes a third light-emitting device EM3 located in the light-emitting device layer EM. For example, the arrangement density of the first light-emitting devices EM1 in the main display area AA is greater than or equal to the arrangement density of the third light-emitting devices EM3 ​​in the light-transmitting display area FDC, but the light-emitting area of ​​the third light-emitting devices EM3 ​​is smaller than the light-emitting area of ​​the first light-emitting devices EM1. For example, the ratio of the light-emitting area of ​​the third light-emitting devices EM3 ​​to the light-emitting area of ​​the first light-emitting devices EM1 is 1:4 to 1:2, such as 1:2, 1:3, or 1:4. The black matrix layer BM includes a plurality of annular light-shielding portions BM3 in the light-transmitting display area FDC, each of which exposes the third light-emitting devices EM3 ​​of the plurality of third sub-pixels. The plurality of annular light-shielding portions BM3 are arranged at intervals.

[0083] Thus, the light-transmitting display area FDC can transmit light except for the area where the third light-emitting device EM3 and the plurality of annular light-shielding portions BM3 are disposed. The light-emitting area of ​​the third light-emitting device EM3 is smaller than that of the first light-emitting device EM1, which can improve the light transmittance of the light-transmitting display area FDC.

[0084] For example, Figure 3 shows a planar schematic diagram of the black matrix layer BM in the main display area AA, the sensor area SS and the light-transmitting display area FDC. As shown in Figures 2 and 3, the material of the gray flat layer GO is filled in the multiple first light exit openings BM1, the multiple second light exit openings BM2 and the first sensor opening BM0. As shown in Figure 3, the area of ​​the material of the gray flat layer GO filled in the multiple first light exit openings BM1 is larger than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0, and the area of ​​the material of the gray flat layer GO filled in the multiple second light exit openings BM2 is larger than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0.

[0085] For example, as shown in FIG. 3 , the area of ​​the material of the gray flat layer GO filled in the plurality of ring-shaped light shielding portions BM3 is greater than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0 .

[0086] For example, in some embodiments, as shown in FIG3 , in the main display area AA, the plurality of first sub-pixels include a first red sub-pixel R1, a first green sub-pixel G1, and a first blue sub-pixel B1. One first red sub-pixel R1, two first green sub-pixels G1, and one first blue sub-pixel B1 constitute a first repeating unit in the main display area AA, and the plurality of first repeating units are arranged in an array in the main display area AA. Similarly, in the sensor area SS, the plurality of second sub-pixels include a second red sub-pixel R2, a second green sub-pixel G2, and a second blue sub-pixel B2. One second red sub-pixel R2, two second green sub-pixels G2, and one second blue sub-pixel B2 constitute a second repeating unit in the sensor area SS, and the plurality of second repeating units are arranged in an array in the sensor area SS. In the light-transmitting display area FDC, multiple third sub-pixels include a third red sub-pixel R3, a third green sub-pixel G3 and a third blue sub-pixel B3. One third red sub-pixel R3, two third green sub-pixels G3 and one third blue sub-pixel B3 constitute a third repeating unit in the light-transmitting display area FDC, and multiple third repeating units are arranged in an array in the light-transmitting display area FDC.

[0087] In this case, the ratio of the light-emitting area of ​​the third light-emitting device EM3 to the light-emitting area of ​​the first light-emitting device EM1 mentioned in the embodiment of the present disclosure is 1:4 to 1:2, which refers to the comparison of the light-emitting areas of sub-pixels of the same color. For example, the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third red sub-pixel R3 to the light-emitting area of ​​the first light-emitting device EM1 of the first red sub-pixel R1 is 1:4 to 1:2, the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third green sub-pixel G3 to the light-emitting area of ​​the first light-emitting device EM1 of the first green sub-pixel G3 is 1:4 to 1:2, and the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third blue sub-pixel B3 to the light-emitting area of ​​the first light-emitting device EM1 of the first blue sub-pixel B1 is 1:4 to 1:2.

[0088] In addition, in the embodiment of the present disclosure, the comparison of the areas of the material of the gray flat layer GO filled in the first light exit opening BM1 , the second light exit opening BM2 , and the first sensor opening BM0 is also for sub-pixels of the same color.

[0089] For example, for a first sub-pixel and a second sub-pixel of the same color, the light emitting area of ​​the first light emitting device EM1 is substantially the same as the light emitting area of ​​the second light emitting device EM2 .

[0090] For example, in some embodiments, in the main display area AA, taking the area occupied by one first repeating unit on the display substrate as a unit area, for each first sub-pixel, the area of ​​the gray planar layer GO material filled in the first light exit opening BM1 accounts for approximately 30%-50% of the unit area. For example, the area of ​​the gray planar layer GO material filled in the first light exit opening BM1 of the first blue sub-pixel B1 is greater than the area of ​​the gray planar layer GO material filled in the first light exit opening BM1 of the first red sub-pixel R1, and the area of ​​the gray planar layer GO material filled in the first light exit opening BM1 of the first red sub-pixel R1 is greater than the area of ​​the gray planar layer GO material filled in the first light exit opening BM1 of the first green sub-pixel G1.

[0091] For example, in the sensor area SS, taking the area occupied by one second repeating unit on the display substrate as a unit area, for each second sub-pixel, the area of ​​the gray planar layer GO material filling the second light exit opening BM2 accounts for approximately 30%-50% of the unit area. The area of ​​the gray planar layer GO material filling the second light exit opening BM2 of the second blue sub-pixel B2 is greater than the area of ​​the gray planar layer GO material filling the second light exit opening BM2 of the second red sub-pixel R2, and the area of ​​the gray planar layer GO material filling the second light exit opening BM2 of the second red sub-pixel R2 is greater than the area of ​​the gray planar layer GO material filling the second light exit opening BM2 of the second green sub-pixel G2. For example, the area of ​​the gray planar layer GO material filling the first sensor opening BM0 accounts for approximately 1.8%-6.0% of the unit area.

[0092] For example, in the light-transmitting display area AA, with the area occupied by one third repeating unit on the display substrate as the unit area, for each third sub-pixel, the area of ​​the annular light-shielding portion BM3 accounts for approximately 20%-28% of the unit area. The area of ​​the gray planar layer GO material filling the annular light-shielding portion BM3 of the third blue sub-pixel B3 is larger than the area of ​​the gray planar layer GO material filling the annular light-shielding portion BM3 of the third red sub-pixel R3, and the area of ​​the gray planar layer GO material filling the annular light-shielding portion BM3 of the third red sub-pixel R3 is larger than the area of ​​the gray planar layer GO material filling the annular light-shielding portion BM3 of the third red sub-pixel R3.

[0093] For example, Figures 19 and 20 respectively illustrate partial plan views of the main display area AA and sensor area SS of a display panel according to at least one embodiment of the present disclosure. As shown in Figure 20 , each second repeating unit corresponds to a first sensor opening BM0, which is surrounded by a second red subpixel R2, two second green subpixels G2, and a second blue subpixel B2. As shown in Figure 19 , the subpixels in the main display area AA and the sensor area SS are arranged in the same manner, except that the black matrix layer BM in the main display area AA does not include a first sensor opening BM0.

[0094] For example, in some embodiments, as shown in Figure 2, in the main display area AA, the first light-emitting device EM1 includes a first anode pattern 11, a first light-emitting pattern 12 and a first cathode layer 13 that are stacked. For example, the first anode pattern 11, the first light-emitting pattern 12 and the first cathode layer 13 are stacked in sequence in a direction away from the base substrate 101, and the first cathode layer 13 of the first light-emitting device EM1 of the plurality of first sub-pixels is continuously arranged in the main display area AA, that is, the entire first cathode layer 13 is formed in the main display area AA.

[0095] For example, in the sensor area SS, the second light-emitting device EM2 includes a second anode pattern 21, a second light-emitting pattern 22 and a second cathode layer 23 that are stacked. For example, the second anode pattern 21, the second light-emitting pattern 22 and the second cathode layer 23 are stacked in sequence in a direction away from the base substrate 101, and the second cathode layer 23 of the second light-emitting devices EM2 of multiple second sub-pixels is continuously arranged in the sensor area SS, that is, the entire second cathode layer 23 is formed in the sensor area SS.

[0096] For example, in some examples, in the sensor area SS, the second cathode layer 23 may also be arranged at intervals. For example, the pixel defining layer PDL includes a plurality of second sensor openings PDL0 in the sensor area SS (to be described in detail later). In the direction perpendicular to the base substrate 101, the plurality of second sensor openings PDL0 do not overlap with the second cathode layer 23, that is, there is no material of the second cathode layer 23 at the positions corresponding to the plurality of second sensor openings PDL0.

[0097] For example, in the light-transmitting display area FDC, the third light-emitting device EM3 includes a third anode pattern 31, a third light-emitting pattern 32 and a third cathode pattern 33 which are stacked in layers. The third anode pattern 31, the third light-emitting pattern 32 and the third cathode pattern 33 are stacked in sequence in a direction away from the base substrate 101, and the third cathode patterns 22 of the third light-emitting devices EM3 ​​of the plurality of third sub-pixels are arranged at intervals in the light-transmitting display area FDC. That is, in the light-transmitting display area FDC, except for the area where the third light-emitting device EM3 is arranged, there is no cathode material in other areas.

[0098] For example, in some examples, in the sensor area SS, the second cathode layer 23 is arranged at intervals, the pixel defining layer PDL includes a plurality of second sensor openings PDL0, and in a direction perpendicular to the base substrate 101, the plurality of second sensor openings PDL0 do not overlap with the second cathode layer 23, that is, there is no material of the second cathode layer 23 at positions corresponding to the plurality of second sensor openings PDL0; at this time, in the light-transmitting display area FDC, the third cathode patterns 22 are arranged at intervals in the light-transmitting display area FDC, and the interval between adjacent third cathode patterns 22 in the light-transmitting display area FDC is greater than the interval between adjacent second cathode layers 23 in the sensor area SS.

[0099] For example, in the embodiment of the present disclosure, the light emitting area of ​​a light emitting device is equal to the opening area of ​​the sub-pixel opening PDL1 in the corresponding pixel defining layer PDL (described in detail later), and is also equal to the area of ​​the light emitting pattern formed in the sub-pixel opening PDL1.

[0100] For example, as shown in Figure 2, the first cathode layer 13, the second cathode layer 23 and the third cathode pattern 33 are arranged in the same layer. Therefore, in the preparation process, the third cathode pattern 33 can be formed by removing the cathode material between adjacent third light-emitting devices. Not setting cathode material between adjacent third light-emitting devices can improve the transmittance of the translucent display area FDC.

[0101] It should be noted that in the embodiments of the present disclosure, "same-layer setting" means that two (or more) functional layers or structural layers are in the same layer and are formed of the same material in the hierarchical structure of the display substrate, that is, in the preparation process, the two (or more) functional layers or structural layers can be formed by the same material layer, and the required patterns and structures can be formed by the same composition process.

[0102] For example, as shown in Figure 2, the light-emitting device layer EM also includes a pixel defining layer PDL for defining different sub-pixels. The pixel defining layer PDL includes a plurality of sub-pixel openings PDL1 in the main display area AA, the sensor area SS and the light-transmitting display area FDC, for forming a light-emitting pattern. The pixel defining layer PDL includes a second sensor opening PDL0 in the sensor area SS that at least partially overlaps with the first sensor opening BM0 in a direction perpendicular to the base substrate 101. The pixel defining layer PDL includes a plurality of sub-pixel walls PDL2 for defining a plurality of third sub-pixel openings in the light-transmitting display area FDC. The plurality of sub-pixel walls PDL2 are arranged at intervals. That is, in the light-transmitting display area FDC, except for the plurality of sub-pixel walls PDL2 for defining different sub-pixels, there is no material of the pixel defining layer PDL in other areas, thereby improving the light transmittance of the light-transmitting display area FDC.

[0103] For example, in some embodiments, the pixel defining layer (PDL) can be a black pixel defining layer, thereby providing a second sensor opening (PDL0) in the pixel defining layer (PDL) to transmit light to the sensor S. The pixel defining layer (PDL) forms a plurality of spaced sub-pixel walls (PDL2) in the light-transmitting display region (FDC), thereby improving light transmittance in the light-transmitting display region (FDC). For example, the pixel defining layer (PDL) in the main display region (AA), the sensor region (SS), and the light-transmitting display region (FDC) can be provided in the same layer. During the manufacturing process, the plurality of sub-pixel walls (PDL2) in the light-transmitting display region (FDC) can be formed by removing material from the pixel defining layer (PDL) between adjacent third light-emitting devices.

[0104] For example, in other embodiments, the pixel defining layer PDL can be a light-transmitting pixel defining layer having a high light transmittance. In this case, the light-transmitting pixel defining layer can be provided with the above-mentioned second sensor opening PDL0, or the second sensor opening PDL0 can be not provided. In the light-transmitting display area FDC, the light-transmitting pixel defining layer can be provided at intervals or continuously.

[0105] For example, in other embodiments, the plurality of third sub-pixels in the light-transmitting display region FDC may also be arranged in different ways. For example, FIG4 shows a partial cross-sectional schematic diagram of another display panel provided by at least one embodiment of the present disclosure.

[0106] For example, as shown in FIG4 , the light-transmitting display area FDC may include a sub-pixel arrangement area FDC1 and a sub-pixel removal area FDC2. The sub-pixel arrangement area FDC1 includes a plurality of third sub-pixels, while the sub-pixel removal area FDC2 does not include sub-pixels, for example, it does not include various structures and materials used to form sub-pixels, such as a pixel defining layer, an anode, a light-emitting layer, and a cathode of a light-emitting device, and the sub-pixel removal area FDC2 is only used for light transmission. For example, the area ratio of the sub-pixel arrangement area FDC1 to the sub-pixel removal area FDC2 is 1:3 to 1:1, for example, 1:1, 1:2, or 1:3.

[0107] For example, Figure 5A shows a partial schematic plan view of the main display area AA, the sensor area SS, and the light-transmitting display area FDC in the above-described embodiment. As shown in Figure 5A , the arrangement density of the first light-emitting devices EM1 in the main display area AA is equal to the arrangement density of the third light-emitting devices EM3 ​​in the sub-pixel arrangement area FDC1, and is also equal to the arrangement density of the second light-emitting devices EM2 in the sensor area SS. The light-emitting area of ​​the third light-emitting devices EM3 ​​is equal to the light-emitting area of ​​the first light-emitting devices EM1. That is, for the third light-emitting devices EM3 ​​and the first light-emitting device EM1 that emit the same light color, the light-emitting area of ​​the third light-emitting device EM3 is equal to the light-emitting area of ​​the first light-emitting device EM1. For example, for the second light-emitting devices EM2 and the first light-emitting device EM1 that emit the same light color, the light-emitting area of ​​the second light-emitting device EM2 is also equal to the light-emitting area of ​​the first light-emitting device EM1.

[0108] For example, in some embodiments, as shown in Figure 5A, the sub-pixel setting area FDC1 may also include a plurality of first lines L1 arranged at the edges of a plurality of third sub-pixels. As shown in Figures 4 and 5A, the black matrix layer BM in the sub-pixel setting area FDC1 includes a plurality of first blocking lines BM4 that at least partially overlap with the plurality of first lines L1 in a direction perpendicular to the base substrate 101, and the black matrix layer BM is hollowed out in the sub-pixel removal area FDC2, thereby improving the transmittance of the translucent display area FDC.

[0109] For example, in some embodiments, the plurality of first traces L1 may be a plurality of touch traces in the touch layer T.

[0110] For example, in the embodiments of Figures 4 and 5A , the pixel definition layer PDL is also hollowed out in the sub-pixel removal area FDC2 to improve the transmittance of the light-transmitting display area FDC. For example, the arrangement of the pixel definition layer PDL in the sub-pixel arrangement area FDC1 is substantially the same as the arrangement of the pixel definition layer PDL in the main display area AA and the sensor area SS.

[0111] For example, Figure 5B shows a partial plan view of the black matrix surrounding the subpixels in the embodiment of Figures 4 and 5A. As shown in Figures 4 and 5B, the black matrix layer BM includes a plurality of first light-emitting openings BM1 in the main display area AA that expose the first light-emitting devices EM1 of the plurality of first subpixels, and a plurality of second light-emitting openings BM2 in the sensor area SS that expose the second light-emitting devices EM2 of the plurality of second subpixels. The black matrix layer BM is hollowed out in most of the light-transmitting display area FDC.

[0112] For example, as shown in FIG5B , in this embodiment, the material of the plurality of gray flat layers GO is filled in the plurality of first light exit openings BM1, the plurality of second light exit openings BM2, and the first sensor opening BM0. The area of ​​the gray flat layer GO material filled in the plurality of first light exit openings BM1 is larger than the area of ​​the gray flat layer GO material filled in the first sensor opening BM0, and the area of ​​the gray flat layer GO material filled in the plurality of second light exit openings BM2 is larger than the area of ​​the gray flat layer GO material filled in the first sensor opening BM0. For example, the area of ​​the gray flat layer GO material filled in the plurality of first light exit openings BM1 is substantially equal to the area of ​​the gray flat layer GO material filled in the plurality of second light exit openings BM2.

[0113] For example, in other embodiments, the thickness of the gray flat layer GO can be set to be different in different areas to reduce the reflectivity difference among the light-transmitting display area FDC, the sensor area SS, and the main display area AA, so that the visual display effects of the light-transmitting display area FDC, the sensor area SS, and the main display area AA are basically the same.

[0114] For example, in some embodiments, as shown in FIG6 , in a direction perpendicular to the base substrate 101, a first thickness H1 of the gray flat layer GO in the main display area AA (e.g., the maximum thickness in the main display area AA, also the thickness at a location where no black matrix layer BM material is present) may be 2 μm-3 μm, such as 2.2 μm, 2.5 μm, or 2.8 μm; a second thickness H2 of the gray flat layer GO in the sensor area SS (e.g., the maximum thickness in the sensor area SS, also the thickness at a location where no black matrix layer BM material is present) may be 0.2 μm higher than the first thickness H1. m-0.5μm, for example, the second thickness H2 can be 2.2μm-3.5μm, for example, 2.5μm, 2.8μm, 3.0μm or 3.2μm, etc.; the third thickness H3 of the gray flat layer GO in the light-transmitting display area FDC (for example, the maximum thickness in the light-transmitting display area FDC, and also the thickness at a position where there is no material of the black matrix layer BM) is 0.4μm-0.6μm lower than the first thickness H1, for example, 0.5μm lower, for example, the third thickness H3 can be 1.5μm-2.5μm, for example, 1.8μm, 2.0μm or 2.2μm, etc.

[0115] Through experiments, it is verified that, taking light with a wavelength of 530nm as an example, when the thickness of the gray flat layer GO is 1.5μm, the light transmittance of the gray flat layer GO is 72%; when the thickness of the gray flat layer GO is 2μm, the light transmittance of the gray flat layer GO is 64%; when the thickness of the gray flat layer GO is 2.5μm, the light transmittance of the gray flat layer GO is 58%; when the thickness of the gray flat layer GO is 3μm, the light transmittance of the gray flat layer GO is 51%; when the thickness of the gray flat layer GO is 3.5μm, the light transmittance of the gray flat layer GO is 46%. In addition, when the second thickness H2 of the gray flat layer GO in the sensor area SS is 0.2 μm higher than the first thickness H1 of the gray flat layer GO in the main display area AA, the reflectivity difference between the sensor area SS and the main display area AA is 0.29%; when the second thickness H2 is 0.3 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 0.44%; when the second thickness H2 is 0.5 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 0.70%; when the second thickness H2 is 0.8 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 1.20%.

[0116] Therefore, when the second thickness H2 is 0.2 μm-0.5 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA can be reduced by about 0.29%-0.7%, and the difference in visual display effects between the sensor area SS and the main display area AA is significantly reduced.

[0117] Therefore, when the thickness of the gray flat layer GO is different, its light transmittance is different. By adjusting the thickness of the gray flat layer GO in different areas, the light transmittance of the gray flat layer GO in different areas can be made different, so that the reflectivity difference in different areas of the display panel is reduced, and the overall visual display uniformity of the display panel is improved.

[0118] For example, as shown in FIG6 , in this embodiment, the display panel may further include a cover layer CO, which is disposed on a side of the gray flat layer GO away from the base substrate 101 to planarize the gray flat layer GO. For example, the cover layer CO may be made of an organic insulating material such as polyimide or resin, or an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0119] It should be noted that, in FIG. 6 and the following drawings, for the sake of simplicity, the base substrate 101 and the driving circuit layer 102 are not shown separately, and their positional relationship can be seen in FIG. 2 and FIG. 4 .

[0120] For example, in other embodiments, the reflectivity difference among the light-transmitting display area FDC, the sensor area SS, and the main display area AA may be reduced by other means, so that the overall visual display effects of the light-transmitting display area FDC, the sensor area SS, and the main display area AA are basically the same.

[0121] For example, in some embodiments, as shown in Figure 7, the display panel may further include a reflection-reducing layer F, which is located in the sensor area SS and the light-transmitting display area FDC, and is located on the side of the second light-emitting device EM2 or the third light-emitting device EM3 away from the substrate 101, that is, located on the side of the second cathode layer 23 and the third cathode pattern 33 away from the substrate 101. At this time, the encapsulation layer EN is located on the side of the reflection-reducing layer F away from the substrate 101.

[0122] For example, in some embodiments, the material of the reflection reduction layer F may include at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride. In the direction perpendicular to the base substrate 101, the thickness of the reflection reduction layer F is 8nm-10nm, for example, 8.5nm, 9.0nm or 9.5nm.

[0123] For example, Figure 8 shows a schematic diagram of the principle of reducing the reflectivity by the reflection-reducing layer F. As shown in Figure 8, the reflection-reducing layer F has an upper surface S1 and a lower surface S2. External light incident on the reflection-reducing layer F can be reflected from the upper surface S1 as light L1, and external light incident on the reflection-reducing layer F can be reflected from the lower surface S2 as light L2. The phases of the light L1 and the light L2 can be opposite to each other, so interference occurs, thereby greatly reducing the reflectivity of the area where the reflection-reducing layer F is set, that is, greatly reducing the reflectivity of the sensor area SS and the light-transmitting display area FDC, so that the overall visual display effects of the light-transmitting display area FDC, the sensor area SS and the main display area AA are basically the same.

[0124] For example, in other embodiments, the black matrix layer may be designed differently in different areas to reduce the reflectivity difference among the light-transmitting display area FDC, the sensor area SS, and the main display area AA, so that the visual display effects of the light-transmitting display area FDC, the sensor area SS, and the main display area AA are basically the same.

[0125] For example, in some embodiments, as shown in FIG9 , the pixel definition layer PDL includes a plurality of sub-pixel openings PDL1 in each of the main display area AA, the sensor area SS, and the light-transmitting display area. In the main display area AA, a first orthographic projection of the sub-pixel opening PDL1 on the substrate 101 is located within a second orthographic projection of the first light exit opening BM1 on the substrate 101. That is, in the main display area AA, the sub-pixel opening PDL1 is retracted relative to the first light exit opening BM1. For example, the retraction distance W1 is 3 μm-6 μm, such as 4 μm, 5 μm, or 6 μm. In the sensor area SS, a third orthographic projection of the second light exit opening BM2 on the substrate 101 is located within a fourth orthographic projection of the sub-pixel opening PDL1 on the substrate 101. That is, in the sensor area SS, the second light exit opening BM2 is retracted relative to the sub-pixel opening PDL1. For example, the distance W2 by which the second light exit opening BM2 is retracted relative to the sub-pixel opening PDL1 is 1μm-4μm, such as 2μm, 3μm or 4μm, etc., that is, the third orthographic projection is retracted relative to the fourth orthographic projection by 1μm-4μm, such as 2μm, 3μm or 4μm, etc.

[0126] For example, Figure 10 shows a partial schematic plan view of the light-transmitting display area FDC, the sensor area SS, and the main display area AA in the embodiment of Figure 9 . As shown in Figures 9 and 10 , in this embodiment, the black matrix layer BM includes multiple annular light-shielding portions BM3 in the light-transmitting display area FDC, with the multiple annular light-shielding portions BM3 spaced apart. Therefore, the area of ​​the black matrix layer BM in the light-transmitting display area FDC is much smaller than that in the main display area AA.

[0127] For example, as shown in FIG. 10 , the pixel defining layer PDL includes a second sensor opening PDL0 in the sensor region SS at least partially overlapping the first sensor opening BM0 in a direction perpendicular to the base substrate 101 , and the second sensor opening PDL0 is retracted relative to the first sensor opening BM0 in the black matrix layer BM.

[0128] Through testing, in the above embodiment, the light reflectivity of the sensor area SS can be reduced by about 0.2%-0.6%, and thus the light reflectivity difference between the sensor area SS and the main display area AA can be reduced by about 0.2%-0.6%.

[0129] For example, in the embodiment of FIG. 10 , the black matrix layer BM includes a plurality of annular light shielding portions BM3 in the light-transmitting display region FDC, which is basically the same as the implementation of the embodiment of FIG. 2 . For details, please refer to the above embodiment.

[0130] For example, in other embodiments, as shown in Figure 11, the pixel defining layer PDL includes a second sensor opening PDL0 in the sensor area SS that at least partially overlaps with the first sensor opening BM0 in a direction perpendicular to the base substrate 101. In the sensor area SS, the second cathode layer 23 of the second light-emitting device EM2 is continuously arranged in the sensor area SS and includes a third sensor opening 230 that at least partially overlaps with the first sensor opening BM0 in a direction perpendicular to the base substrate 101. At the same time, the third sensor opening 230 also at least partially overlaps with the second sensor opening PDL0.

[0131] For example, Figure 12 shows a partial schematic plan view of the light-transmitting display area FDC, the sensor area SS, and the main display area AA in the embodiment of Figure 11. As shown in Figures 11 and 12, the fifth orthographic projection of the second sensor opening PDL0 on the base substrate 101 is located within the sixth orthographic projection of the third sensor opening 230 on the base substrate 101. In other words, the second sensor opening PDL0 is retracted relative to the third sensor opening 230. In other words, the fifth orthographic projection is retracted relative to the sixth orthographic projection. For example, the retraction distance W3 is 1.0 μm to 2.0 μm, such as 1.2 μm, 1.5 μm, or 1.8 μm.

[0132] For example, as shown in Figures 11 and 12, in this embodiment, in the light-transmitting display area FDC, the third cathode patterns 23 of the third light-emitting device EM3 of the third sub-pixel are arranged at intervals. That is, in Figure 12, the position where the non-light-emitting device is located, where reference numeral 231 is located, does not contain cathode material. This improves the light transmittance of the light-transmitting display area FDC.

[0133] For example, in some embodiments, the first light-emitting patterns 12 in the main display area AA are continuously arranged, the second light-emitting patterns 22 in the sensor area SS are continuously arranged, and the third light-emitting patterns 32 in the light-transmitting display area FDC are arranged at intervals. For example, in some examples, the first light-emitting patterns 12 and the second light-emitting patterns 22 can also be continuously arranged.

[0134] For example, in some other embodiments, the black matrix layer BM and the gray flat layer GO may also have different configurations.

[0135] For example, as shown in FIG13 , the display panel further includes a touch layer T, which is disposed on a side of the encapsulation layer EN away from the base substrate 101. The touch layer T includes a touch trace layer T1 and a touch insulation layer T2 located on a side of the touch trace layer T1 away from the base substrate 101. For example, the touch insulation layer T2 can be made of an organic insulation material such as polyimide or resin.

[0136] For example, the gray flat layer GO is disposed on a side of the touch insulating layer T2 away from the base substrate 101 , and the black matrix layer BM is disposed on a side of the gray flat layer GO away from the base substrate 101 .

[0137] For example, as shown in FIG13 , the display panel may further include a cover layer CO, which is disposed on a side of the black matrix layer BM away from the base substrate 101 to planarize the black matrix layer BM. For example, the cover layer CO may be an organic cover layer or an inorganic cover layer. The organic cover layer may include an organic insulating material such as polyimide or resin, and the inorganic cover layer may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0138] For example, as shown in FIG13 , the touch trace layer T1 may include a first touch trace layer T11 and a second touch trace layer T12. The first touch trace layer T11 is disposed on a side of the second touch trace layer T12 away from the base substrate 101. The first touch trace layer T11 and the second touch trace layer T12 are separated by an insulating layer T4. For example, the first touch trace layer T11 and the second touch trace layer T12 may each include a plurality of touch traces, and some of the touch traces in the first touch trace layer T11 and the second touch trace layer T12 may be electrically connected via vias in the insulating layer T4, serving as a bridge connection structure for the touch trace layer T1.

[0139] For example, as shown in FIG13 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch trace layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0140] For example, in some other embodiments, the touch layer T, the black matrix layer BM, and the gray flat layer GO may also be arranged in different ways.

[0141] For example, as shown in FIG14 , in some embodiments, the touch layer T is disposed on a side of the encapsulation layer EN away from the base substrate 101 and includes a touch trace layer T1. The touch trace layer T1 includes a plurality of touch traces T111. The gray flat layer GO is disposed on a side of the touch trace layer T1 away from the base substrate 101 and contacts the plurality of touch traces T111, thereby insulating the plurality of touch traces T111. Compared to the embodiment of FIG13 , the touch insulating layer T2 is omitted. In the manufacturing process, the mask process for manufacturing the touch insulating layer T2 is omitted. In this case, as shown in FIG14 , the black matrix layer BM is disposed on the side of the gray flat layer GO away from the base substrate 101.

[0142] For example, as shown in FIG14 , the touch trace layer T1 may also include a first touch trace layer T11 and a second touch trace layer T12. The first touch trace layer T11 is disposed on a side of the second touch trace layer T12 that is farther from the base substrate 101. The first touch trace layer T11 and the second touch trace layer T12 are separated by an insulating layer T4. The first touch trace layer T11 and the second touch trace layer T12 each include multiple touch traces. In this case, the gray flat layer GO contacts and covers the touch trace T111 in the first touch trace layer T11, which is farther from the base substrate 101.

[0143] For example, as shown in FIG13 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch trace layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0144] For example, in other embodiments, as shown in FIG15 , the touch layer T is disposed on a side of the encapsulation layer EN away from the base substrate 101 and includes a touch trace layer T1, which includes a plurality of touch traces T111. The black matrix layer BM is disposed on a side of the touch trace layer T1 away from the base substrate 101 and includes a plurality of second shielding lines BM5 that contact and cover the plurality of touch traces T11. The gray flat layer GO is disposed on a side of the black matrix layer BM away from the base substrate 101. Therefore, compared to the embodiment of FIG13 , the touch insulating layer T2 is also omitted, and in the manufacturing process, the mask process for manufacturing the touch insulating layer T2 is omitted.

[0145] For example, as shown in FIG15 , the touch trace layer T1 may also include a first touch trace layer T11 and a second touch trace layer T12. The first touch trace layer T11 is disposed on a side of the second touch trace layer T12 that is further away from the base substrate 101. The first touch trace layer T11 and the second touch trace layer T12 are separated by an insulating layer T4. The first touch trace layer T11 and the second touch trace layer T12 each include multiple touch traces. In this case, the multiple second blocking lines BM5 contact and cover the touch traces T111 in the first touch trace layer T11 that is further away from the base substrate 101.

[0146] For example, as shown in FIG15 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch trace layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0147] For example, in other embodiments, as shown in FIG16 , the black matrix layer BM is disposed on the side of the encapsulation layer EN away from the base substrate 101, the touch layer T is disposed on the side of the black matrix layer BM away from the base substrate 101, and includes a touch trace layer T1, wherein the touch trace layer T1 includes a plurality of touch traces T111, and the gray flat layer GO is disposed on the side of the touch trace layer T1 away from the base substrate 101. Therefore, compared to the embodiment of FIG13 , the touch insulating layer T2 is also omitted, and in the manufacturing process, the mask process for manufacturing the touch insulating layer T2 is omitted.

[0148] For example, as shown in FIG16 , the display panel may further include a molybdenum oxide layer MO, and the material of the molybdenum oxide layer MO includes molybdenum oxide (MO x O y / MoO x The molybdenum oxide layer MO is located on a side of the plurality of touch traces T11 away from the base substrate 101 and includes a plurality of cover lines MO1 to cover the plurality of touch traces T11 .

[0149] For example, as shown in FIG16 , the multiple covering lines MO1 may directly contact and cover the multiple touch traces T11, but do not cover the sides of the multiple touch traces T11; or, in other embodiments, as shown in FIG17 , the multiple covering lines MO1 of the molybdenum oxide layer MO may also completely cover the multiple touch traces T11, that is, not only cover the top of the multiple touch traces T11, but also cover the sides of the multiple touch traces T11.

[0150] In the above embodiment, the molybdenum oxide layer MO is substantially black and covers the plurality of touch traces T11 to reduce the light reflectivity of the plurality of touch traces T11 .

[0151] For example, as shown in FIG16 and FIG17 , the orthographic projection of the molybdenum oxide layer MO on the base substrate 101 is located within the orthographic projection of the black matrix layer BM on the base substrate 101 to ensure the light transmittance of the display panel.

[0152] For example, as shown in Figures 16 and 17, in this embodiment, the touch trace layer T1 may also include a first touch trace layer T11 and a second touch trace layer T12. The first touch trace layer T11 is disposed on a side of the second touch trace layer T12 that is farther from the base substrate 101. The first touch trace layer T11 and the second touch trace layer T12 are separated by an insulating layer T4. The first touch trace layer T11 and the second touch trace layer T12 each include multiple touch traces. In this case, the multiple cover lines MO1 contact and cover the touch traces T111 in the first touch trace layer T11 that is farther from the base substrate 101.

[0153] For example, as shown in Figures 16 and 17, the touch layer T may further include a touch buffer layer T3, which is arranged on the side of the black matrix layer BM away from the base substrate 101, and can flatten the black matrix layer BM. The touch wiring layer T1 is arranged on the side of the touch buffer layer T3 away from the base substrate 101.

[0154] For example, in other embodiments, as shown in FIG18 , the display panel may further include a transparent insulating layer TO. The black matrix layer BM is disposed on the side of the encapsulation layer EN away from the base substrate 101 and includes a plurality of light-shielding patterns BM6. These light-shielding patterns BM6 are used to form the aforementioned first light exit opening BM1, second light exit opening BM2, first sensor opening BM0, and annular light-shielding portion BM3. For example, the transparent insulating layer TO is disposed on the side of the black matrix layer BM away from the base substrate 101 and includes a plurality of cover patterns TO1. The plurality of cover patterns TO1 respectively cover the plurality of light-shielding patterns BM6. For example, the transparent insulating layer TO is generally in a grid shape, and the overall pattern of the transparent insulating layer TO is substantially the same as the overall pattern of the black matrix layer BM. The plurality of cover patterns TO1 cover the black matrix layer BM and are in direct contact with the black matrix layer BM. In this case, the gray flat layer GO is located on the side of the transparent insulating layer TO away from the base substrate 101, for example, in direct contact with the plurality of cover patterns TO1.

[0155] For example, in the above embodiment, the refractive index of the transparent insulating layer TO is n1, and the refractive index of the gray flat layer GO is n2, so: n1 < n2. As a result, light emitted by the light-emitting device is refracted when it reaches the transparent insulating layer TO and the gray flat layer GO. As shown by the arrows in Figure 18, the light emitted by the light-emitting device is more inclined to be emitted in a direction perpendicular to the display panel, thereby improving the light extraction efficiency of the display panel, thereby increasing the light output brightness of the display panel and reducing power consumption.

[0156] For example, in some embodiments, n2-n1≥0.05, so as to further improve the light extraction efficiency of the display panel, enhance the light extraction brightness of the display panel, and reduce power consumption.

[0157] The embodiments of the present disclosure do not limit the materials of the various functional layers. For example, the base substrate 101 can be a rigid substrate such as glass or quartz, or a flexible substrate such as polyimide. The multiple touch traces of the touch trace layer T1 can be made of metal materials or alloy materials such as copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), for example, forming a single-layer metal layer structure or a multi-layer metal layer structure. The touch buffer layer T3 of the touch trace layer T can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the insulating layer T4 can also be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, or organic insulating materials such as polyimide and resin.

[0158] For example, the pixel defining layer PDL may be made of organic insulating materials such as polyimide and resin. When the pixel defining layer PDL is a black pixel defining layer, its material may include organic insulating materials such as polyimide and resin as a base material, and may also include other black dyes or pigments.

[0159] For example, the anode of each light-emitting device can be made of transparent metal oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), and gallium zinc oxide (GZO), and the cathode material can be metal materials such as lithium (Li), aluminum (Al), magnesium (Mg), and silver (Ag), and the light-emitting pattern can include organic light-emitting materials or quantum dot light-emitting materials.

[0160] For example, the display panel may further include other structures in addition to the above structures. For details, please refer to the relevant technology and will not be described in detail here.

[0161] At least one embodiment of the present disclosure provides a display device, which includes any of the above-mentioned display panels. The display device has advantages such as thinness and simple manufacturing.

[0162] For example, the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator.

[0163] At least one embodiment of the present disclosure further provides a method for preparing a display panel. Referring to Figures 1 and 2, the preparation method includes: providing a base substrate 101, forming a driving circuit layer 102 on the base substrate 101, forming a light-emitting device layer EM on a side of the driving circuit layer 102 away from the base substrate 101, forming an encapsulation layer EN on a side of the light-emitting device layer EM away from the base substrate 101, and forming a gray flat layer GO on a side of the encapsulation layer EN away from the base substrate 101; wherein the display panel has a main display area AA, a sensor area SS and a light-transmitting display area FDC, the main display area AA at least partially surrounds the sensor area SS and the light-transmitting display area FDC, and the gray flat layer GO is formed in the main display area AA, the sensor area SS and the light-transmitting display area FDC.

[0164] The preparation method of the above-mentioned display panel provided by the embodiment of the present disclosure is simpler. Compared with the traditional COE technology, it can save multiple mask plates for making color films. For example, for a display panel with red, green and blue sub-pixels, three mask plates can be saved, and at the same time, color film raw materials and costs can be saved, and a thinner display panel can be obtained.

[0165] There are a few points to note:

[0166] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure. Other structures may refer to conventional designs.

[0167] (2) For the sake of clarity, the thickness of layers or regions in the drawings used to describe the embodiments of the present disclosure are exaggerated or reduced, i.e., these drawings are not drawn to scale. It is understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or intervening elements may be present.

[0168] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to form new embodiments.

[0169] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. The protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A display panel, comprising: Substrate substrate, A driving circuit layer is arranged on the base substrate. The light emitting device layer is arranged on a side of the driving circuit layer away from the base substrate. an encapsulation layer, arranged on a side of the light emitting device layer away from the base substrate, and A grey flat layer is arranged on a side of the encapsulation layer away from the substrate; The display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is arranged in the main display area, the sensor area and the light-transmitting display area.

2. The display panel according to claim 1, further comprising: A black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, Wherein, the gray flat layer is arranged on a side of the black matrix layer away from the base substrate.

3. The display panel according to claim 2, wherein: The main display area includes a plurality of first sub-pixels, each of the plurality of first sub-pixels includes a first light emitting device located in the light emitting device layer, The sensor area includes a plurality of second sub-pixels, each of the plurality of second sub-pixels includes a second light emitting device located in the light emitting device layer, The black matrix layer includes a plurality of first light exit openings in the main display area for exposing the first light emitting device, and includes a plurality of second light exit openings in the sensor area for exposing the second light emitting device and a first sensor opening located between the plurality of second light exit openings.

4. The display panel according to claim 3, wherein: The material of the gray flat layer is filled in the plurality of first light exit openings, the plurality of second light exit openings and the first sensor opening. Among them, the area of ​​the material of the gray flat layer filled in the multiple first light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening, and the area of ​​the material of the gray flat layer filled in the multiple second light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening.

5. The display panel according to any one of claims 2 to 4, wherein: The light-transmitting display area includes a plurality of third sub-pixels, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, The arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the light-transmitting display area, and the ratio of the light-emitting area of ​​the third light-emitting devices to the light-emitting area of ​​the first light-emitting devices is 1:4 to 1:2, The black matrix layer includes a plurality of annular light shielding portions in the light-transmitting display area, respectively exposing the third light-emitting devices of the plurality of third sub-pixels, and the plurality of annular light shielding portions are arranged at intervals.

6. The display panel according to claim 5, wherein: An area of ​​the material of the gray flat layer filled in the plurality of annular light shielding portions is greater than an area of ​​the material of the gray flat layer filled in the first sensor opening.

7. The display panel according to claim 3 or 4, wherein: The first light emitting device includes a first anode pattern, a first light emitting pattern and a first cathode layer which are stacked. The first cathode layers of the first light emitting devices of the plurality of first sub-pixels are continuously arranged in the main display area, The third light emitting devices of the plurality of third sub-pixels include a third anode pattern, a third light emitting pattern and a third cathode pattern which are stacked. The third cathode patterns of the third light emitting devices of the plurality of third sub-pixels are arranged at intervals in the light-transmitting display area.

8. The display panel according to claim 3, 4 or 7, wherein: The light emitting device layer further comprises a pixel defining layer for defining sub-pixels. The pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area and the light-transmitting display area, the sensor area includes a second sensor opening at least partially overlapping the first sensor opening in a direction perpendicular to the base substrate, and the light-transmitting display area includes a plurality of sub-pixel walls for defining the plurality of third sub-pixel openings, and the plurality of sub-pixel walls are arranged at intervals.

9. The display panel according to any one of claims 2 to 4, wherein: The light-transmitting display area includes a sub-pixel setting area and a sub-pixel removal area, wherein the sub-pixel setting area includes a plurality of third sub-pixels, and the sub-pixel removal area does not include any sub-pixels. The area ratio of the sub-pixel setting area to the sub-pixel removal area is 1:3 to 1:1, Each of the plurality of third sub-pixels includes a third light emitting device located in the light emitting device layer, The arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the sub-pixel setting area, and the light-emitting area of ​​the third light-emitting devices is equal to the light-emitting area of ​​the first light-emitting devices. The sub-pixel arrangement area further includes a plurality of first wirings arranged at the edges of the plurality of third sub-pixels, The black matrix layer includes a plurality of first shielding lines at least partially overlapping with the plurality of first wirings in a direction perpendicular to the base substrate in the sub-pixel setting area, and is hollowed out in the sub-pixel removal area.

10. The display panel according to claim 9, wherein: The light emitting device layer further includes a pixel defining layer for defining sub-pixels, and the pixel defining layer is hollowed out in the sub-pixel removal area.

11. The display panel according to any one of claims 1 to 10, wherein: In a direction perpendicular to the substrate, The first thickness of the gray flat layer in the main display area is 2 μm-3 μm, The second thickness of the gray flat layer in the sensor area is 0.2 μm-0.5 μm higher than the first thickness, The third thickness of the gray flat layer in the light-transmitting display area is 0.4 μm-0.6 μm lower than the first thickness.

12. The display panel according to any one of claims 5-6 and 9-10, further comprising: a reflection reduction layer, located in the sensor area and the light-transmitting display area, and located on a side of the second light-emitting device or the third light-emitting device away from the base substrate, Wherein, the encapsulation layer is located on a side of the reflection reduction layer away from the substrate.

13. The display panel according to claim 12, wherein: The material of the anti-reflection layer includes at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride. In a direction perpendicular to the substrate, the thickness of the anti-reflection layer is 8nm-10nm.

14. The display panel according to claim 3 or 4, wherein: The light emitting device layer further comprises a pixel defining layer for defining sub-pixels. The pixel definition layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area. In the main display area, a first orthographic projection of the sub-pixel opening on the base substrate is located within a second orthographic projection of the first light exit opening on the base substrate, In the sensor area, the second light exit opening is at a third orthographic projection position on the substrate The sub-pixel opening is within a fourth orthographic projection on the base substrate.

15. The display panel according to claim 14, wherein: The third orthographic projection is shrunk by 1 μm-4 μm relative to the fourth orthographic projection.

16. The display panel according to claim 3 or 4, wherein: The light emitting device layer further comprises a pixel defining layer for defining sub-pixels. The pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area, and the sensor area includes a second sensor opening that overlaps the first sensor opening in a direction perpendicular to the base substrate. The second light emitting devices of the plurality of second sub-pixels include a second anode pattern, a second light emitting pattern and a second cathode layer which are stacked. The second cathode layer is continuously disposed in the sensor region and includes a third sensor opening overlapping the first sensor opening in a direction perpendicular to the substrate.

17. The display panel according to claim 16, wherein: A fifth orthographic projection of the second sensor opening on the substrate is located within a sixth orthographic projection of the third sensor opening on the substrate.

18. The display panel according to claim 17, wherein: The fifth orthographic projection is shrunk by 1 μm-2 μm relative to the sixth orthographic projection.

19. The display panel according to claim 1, further comprising: a touch layer, arranged on a side of the encapsulation layer away from the base substrate, comprising a touch wiring layer and a touch insulating layer located on a side of the touch wiring layer away from the base substrate, wherein the gray flat layer is arranged on a side of the touch insulating layer away from the base substrate, and The black matrix layer is arranged on a side of the gray flat layer away from the base substrate.

20. The display panel according to claim 1, further comprising: a touch layer, which is arranged on a side of the packaging layer away from the base substrate, and includes a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings, wherein the gray flat layer is arranged on a side of the touch wiring layer away from the base substrate and contacts the plurality of touch wirings, and The black matrix layer is arranged on a side of the gray flat layer away from the base substrate.

21. The display panel according to claim 1, further comprising: The touch layer is arranged on a side of the packaging layer away from the base substrate, and includes a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings. The black matrix layer is arranged on a side of the touch wiring layer away from the base substrate, and includes a A plurality of second shielding lines that touch and cover the plurality of touch wirings, Wherein, the gray flat layer is arranged on a side of the black matrix layer away from the base substrate.

22. The display panel according to claim 1, further comprising: A black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, The touch layer is arranged on a side of the black matrix layer away from the base substrate, and includes a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings. Wherein, the gray flat layer is arranged on a side of the touch wiring layer away from the base substrate.

23. The display panel according to claim 22, further comprising: The molybdenum oxide layer is located on a side of the plurality of touch lines away from the substrate, and includes a plurality of cover lines to cover the plurality of touch lines.

24. The display panel according to claim 1, further comprising: A black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, and includes a plurality of light shielding patterns. a transparent insulating layer, arranged on a side of the black matrix layer away from the base substrate, comprising a plurality of covering patterns, wherein the plurality of covering patterns respectively cover the plurality of light shielding patterns, Wherein, the gray flat layer is located on a side of the transparent insulating layer away from the base substrate.

25. The display panel according to claim 24, wherein: The refractive index of the transparent insulating layer is n1, and the refractive index of the gray flat layer is n2, then: n1<n2.

26. The display panel according to claim 25, wherein: n2-n1≥0.

05.

27. The display panel according to any one of claims 1 to 26, wherein: The light transmittance of the gray flat layer is 40%-60%.

28. The display panel according to any one of claims 1 to 27, wherein: The gray flat layer includes a transparent matrix and a light absorbing material dispersed in the transparent matrix.

29. The display panel according to claim 28, wherein: The light absorbing material includes at least one of oxazine compounds, cyanine compounds, porphyrazine compounds and squarylium compounds.

30. A display device comprising the display panel according to any one of claims 1-29.

31. A method for preparing a display panel, comprising: providing a substrate substrate, forming a driving circuit layer on the base substrate, A light emitting device layer is formed on a side of the driving circuit layer away from the base substrate, forming an encapsulation layer on a side of the light emitting device layer away from the base substrate, and forming a gray flat layer on a side of the encapsulation layer away from the base substrate; The display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is formed in the main display area, the sensor area and the light-transmitting display area.

Images