Display panel and display device

Abstract

The present application provides a display panel and a display device. The display panel comprises a first test group and a second test group. The first test group comprises a first connection line and a plurality of first test lines, the second test group comprises a second connection line and a plurality of second test lines, the first connection line and the first test lines are located on a same layer, and the second connection line and the second test lines are located on different layers. Each first test line comprises a first sub-wire and a second sub-wire which are disconnected; each second test line comprises a third sub-wire and a fourth sub-wire which are disconnected.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Before module production begins, to reduce resource consumption and improve yield, electronic paper display panels utilize a dot-screen detection circuit to detect defects. These dot-screen detection pads are located outside the backplane bonding area. During testing, the circuit activates the switches in the dot-screen detection switch area, connecting each signal line to the dot-screen detection pad. An external probe then applies a signal to the dot-screen detection pads, illuminating the screen and inspecting the panel for defects. However, the spacing between the multiple switches in the dot-screen detection switch area is small, increasing the risk of failure. SUMMARY OF THE INVENTION

[0003] Embodiments of the present application provide a display panel and a display device, which can improve the problem of high risk of failure of switching devices.

[0004] An embodiment of the present application provides a display panel, comprising a plurality of data lines, a first test group, and a second test group. The first test group comprises a first connecting line and a plurality of first test lines. Each of the first test lines comprises a first sub-route and a second sub-route disconnected from the first sub-route, the first sub-route being electrically connected to the first connecting line, and the second sub-route being electrically connected to the corresponding data line. The second test group comprises a second connecting line and a plurality of second test lines. Each of the second test lines comprises a third sub-route and a fourth sub-route disconnected from the third sub-route, the third sub-route being electrically connected to the second connecting line, and the fourth sub-route being electrically connected to the corresponding data line. The first connecting line and the second connecting line extend along a first direction, the plurality of the first test lines and the plurality of the second test lines extend along a second direction intersecting the first direction, and the first test lines and the second test lines are alternately arranged in the first direction; the first connecting line and the plurality of the first test lines are on the same layer, and the second connecting line and the plurality of the second test lines are on different layers.

[0005] Optionally, in some embodiments of the present application, the first connecting line and the second connecting line are in the same layer.

[0006] Optionally, in some embodiments of the present application, the display panel includes a first metal layer, a second metal layer, and a third metal layer. The first metal layer includes the first connecting line, the second connecting line, and a plurality of the first test lines; the second metal layer is located on the first metal layer, and the second metal layer includes a plurality of the second test lines; the third metal layer is located on the second metal layer, and the third metal layer includes at least one transition portion, and the transition portion is electrically connected between the second connecting line and the plurality of the second test lines.

[0007] Optionally, in some embodiments of the present application, the display panel includes a first insulating layer and a second insulating layer. The first insulating layer is located between the first metal layer and the second metal layer, the second insulating layer is located between the second metal layer and the third metal layer, the second insulating layer is provided with a plurality of first vias on a side of the first connecting line close to the second connecting line to expose the corresponding second test line, and the second insulating layer and the first insulating layer are provided with a plurality of second vias corresponding to the second connecting line to expose the second connecting line. The transition portion includes a first transition portion located in the first via hole, a second transition portion located in the second via hole, and a third transition portion connected between the first transition portion and the second transition portion.

[0008] Optionally, in some embodiments of the present application, the display panel includes a display area, a bonding area, and a transition area located on a side of the bonding area away from the display area. The second sub-routing of each first test line includes a first bonding portion and a first routing portion located at both ends of the first bonding portion and connected to the first bonding portion, and the width of the first bonding portion is greater than the width of the first routing portion. The fourth sub-routing of each second test line includes a second bonding portion and a second routing portion located at both ends of the second bonding portion and connected to the second bonding portion, and the width of the second bonding portion is greater than the width of the second routing portion. Wherein, a plurality of the data lines are located in the display area; the first connecting line and the second connecting line are located in the transition area, and the second connecting line is located on a side of the first connecting line away from the display area; the first bonding portion and the second bonding portion are located in the bonding area.

[0009] Optionally, in some embodiments of the present application, the display panel further includes a laser region located between the bonding region and the conversion region, wherein the break between the first sub-route and the second sub-route is located in the laser region, and the break between the third sub-route and the fourth sub-route is located in the laser region.

[0010] Optionally, in some embodiments of the present application, the display panel further comprises an electrostatic protection module, located within the laser area and electrically connected to the first connecting line and the second connecting line. The laser area has a symmetry line extending along the second direction, and the plurality of first test lines are symmetrical about the symmetry line, and the plurality of second test lines are symmetrical about the symmetry line. The first test lines and the second test lines located on both sides of the symmetry line have a first spacing in the laser area, and the first test lines and the second test lines have a second spacing on a side of the bonding area away from the laser area, wherein the first spacing is smaller than the second spacing.

[0011] Optionally, in some embodiments of the present application, the first routing section located between the first bonding section and the first sub-routing section includes a first sub-routing section, a second sub-routing section, and a third sub-routing section connected between the first and second sub-routing sections, with one end of the second sub-routing section remote from the third sub-routing section connected to the first bonding section. The second routing section located between the second bonding section and the third sub-routing section includes a fourth sub-routing section, a fifth sub-routing section, and a sixth sub-routing section connected between the fourth and fifth sub-routing sections, with one end of the fifth sub-routing section remote from the sixth sub-routing section connected to the second bonding section. The distance between the end of the third sub-routing section connected to the first sub-routing section and the symmetry line is less than the distance between the end of the third sub-routing section connected to the second sub-routing section and the symmetry line; and the distance between the end of the sixth sub-routing section connected to the fourth sub-routing section and the symmetry line is less than the distance between the end of the sixth sub-routing section connected to the fifth sub-routing section and the symmetry line.

[0012] Optionally, in some embodiments of the present application, the electrostatic protection module includes a first electrostatic protection module and a second electrostatic protection module. The first electrostatic protection module is electrically connected to the first connection line and the common voltage terminal, and the second electrostatic protection module is electrically connected to the second connection line and the common voltage terminal; wherein the plurality of first test lines and the plurality of second test lines are located between the first electrostatic protection module and the second electrostatic protection module.

[0013] Optionally, in some embodiments of the present application, the plurality of data lines include a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines and the plurality of second data lines are alternately arranged in the first direction. The first routing portion located on a side of the first bonding portion away from the first sub-routing is electrically connected to the corresponding first data line, and the second routing portion located on a side of the second bonding portion away from the third sub-routing is electrically connected to the corresponding second data line.

[0014] Optionally, in some embodiments of the present application, the display panel further includes a fan-out region located between the bonding region and the display region, wherein the first routing portion located on a side of the first bonding portion away from the first sub-routing is electrically connected to the corresponding first data line in the fan-out region.

[0015] The present application also provides a display panel, comprising a plurality of data lines, a first test group, and a second test group. The first test group comprises a first connecting line and a plurality of first test lines, the first connecting line extends along a first direction, the plurality of first test lines are electrically connected between the first connecting line and the corresponding data lines, and the plurality of first test lines extend along a second direction intersecting the first direction. The second test group comprises a second connecting line and a plurality of second test lines, the second connecting line extends along the first direction, the plurality of second test lines are electrically connected between the second connecting line and the corresponding data lines, and the plurality of second test lines extend along the second direction. The first test lines and the second test lines are alternately arranged in the first direction, the first connecting line and the plurality of first test lines are in the same layer, and the second connecting line and the plurality of second test lines are in different layers.

[0016] The present application also provides a display device, comprising any of the above-mentioned display panels and a driver chip, wherein the driver chip is electrically connected to the second sub-routes of the plurality of first test lines and the fourth sub-routes of the plurality of second test lines. Beneficial effects

[0017] Compared to the prior art, embodiments of the present application provide a display panel and a display device, the display panel comprising a plurality of data lines, a first test group, and a second test group. The first test group comprises a first connecting line and a plurality of first test lines, and the second test group comprises a second connecting line and a plurality of second test lines. The first connecting line and the second connecting line extend along a first direction, while the plurality of first test lines and the plurality of second test lines extend along a second direction intersecting the first direction. The first test lines and the plurality of second test lines are arranged alternately in the first direction. The first connecting line and the plurality of first test lines are on the same layer, while the second connecting line and the plurality of second test lines are on a different layer. This ensures that the electrical connection between the first connecting line and the plurality of first test lines, and the electrical connection between the second connecting line and the plurality of second test lines, no longer pass through the plurality of switching devices provided in the dot screen detection switch area. Therefore, the display panel can eliminate the need for a dot screen detection switch area comprising a plurality of switching devices, thereby alleviating the high risk of switch device failure. During dot screen detection, the plurality of first test lines are electrically connected between the first connecting line and the corresponding data lines, and the plurality of second test lines are electrically connected between the second connecting line and the corresponding data lines. After completing the dot screen detection, in order to avoid short circuit problems between multiple data lines, each first test line includes a first sub-route and a second sub-route disconnected from the first sub-route, the first sub-route is electrically connected to the first connecting line, and the second sub-route is electrically connected to the corresponding data line; each second test line includes a third sub-route and a fourth sub-route disconnected from the third sub-route, the third sub-route is electrically connected to the second connecting line, and the fourth sub-route is electrically connected to the corresponding data line. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] 1A to 1E are schematic structural diagrams of a display panel provided in an embodiment of the present application;

[0019] FIG2 is a schematic structural diagram of an electrostatic protection module provided in an embodiment of the present application;

[0020] 3A and 3B are schematic structural diagrams of a display device provided in an embodiment of the present application. Modes for Carrying Out the Invention

[0021] To make the purpose, technical solutions and effects of this application clearer and more specific, the following further describes this application in detail with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are only used to explain this application and are not intended to limit this application.

[0022] Specifically, FIG. 1A to FIG. 1E are schematic structural diagrams of a display panel provided in an embodiment of the present application; an embodiment of the present application provides a display panel, and the display panel includes an electronic paper display panel, etc.

[0023] The display panel includes a plurality of signal lines, a first test group 100 and a second test group 200 .

[0024] Optionally, the plurality of signal lines include a plurality of data lines DL. Optionally, the plurality of signal lines include a plurality of scan lines.

[0025] The first test group 100 includes a first connection line CL1 and multiple first test lines TL1. Each of the first test lines TL1 includes a first sub-line TL11 and a second sub-line TL12 disconnected from the first sub-line TL11. The first sub-line TL11 is electrically connected to the first connection line CL1, and the second sub-line TL12 is electrically connected to the corresponding signal line to avoid short circuit problems between the multiple signal lines electrically connected to the multiple first test lines TL1 after completing the dot screen test.

[0026] The second test group 200 includes a second connection line CL2 and multiple second test lines TL2. Each of the second test lines TL2 includes a third sub-line TL21 and a fourth sub-line TL22 disconnected from the third sub-line TL21. The third sub-line TL21 is electrically connected to the second connection line CL2, and the fourth sub-line TL22 is electrically connected to the corresponding signal line, so as to avoid short circuit problems between the multiple signal lines electrically connected to the multiple second test lines TL2 after completing the dot screen test.

[0027] The first connection line CL1 and the plurality of first test lines TL1 are on the same layer, while the second connection line CL2 and the plurality of second test lines TL2 are on different layers. This allows the first connection line CL1 to be directly electrically connected to the first sub-lines TL11 of the plurality of first test lines TL1. This ensures that the electrical connection between the first connection line CL1 and the plurality of first test lines TL1, and the electrical connection between the second connection line CL2 and the plurality of second test lines TL2, no longer passes through the plurality of switching devices provided in the dot screen detection switch area. Consequently, the display panel no longer needs to include a dot screen detection switch area including a plurality of switching devices, thereby alleviating the problem of a high risk of switching device failure.

[0028] Optionally, the second sub-line TL12 included in the multiple first test lines TL1 is electrically connected to the corresponding data line DL, and the fourth sub-line TL22 included in the multiple second test lines TL2 is electrically connected to the corresponding data line DL, so as to provide different test signals to the multiple data lines DL through the multiple first test lines TL1 and the second test lines TL2 during dot screen detection.

[0029] Optionally, the first connecting line CL1 and the second connecting line CL2 extend along a first direction x, and multiple first test lines TL1 and multiple second test lines TL2 extend along a second direction y that intersects the first direction x. The first test lines TL1 and the second test lines TL2 are alternately arranged in the first direction x so that there is a certain distance between the multiple first test lines TL1 and the multiple second test lines TL2, thereby reducing the risk of short circuit problems between the multiple first test lines TL1 and the multiple second test lines TL2.

[0030] Optionally, the plurality of data lines DL include a plurality of first data lines DL1 and a plurality of second data lines DL2, and the plurality of first data lines DL1 and the plurality of second data lines DL2 are alternately arranged in the first direction x. The second sub-lines TL12 included in the plurality of first test lines TL1 are electrically connected to the plurality of first data lines DL1, and the fourth sub-lines TL22 included in the plurality of second test lines TL2 are electrically connected to the plurality of second data lines DL2, so that the data lines in odd columns and the data lines in even columns are electrically connected to different test lines, respectively, so that during dot screen detection, the sub-pixels in odd columns and the sub-pixels in even columns of the display panel can be illuminated as needed in a time-sharing manner to achieve detection purposes.

[0031] Optionally, the first connection line CL1 and the second connection line CL2 are in the same layer, so that the first connection line CL1 and the second connection line CL2 can be manufactured simultaneously while reducing the risk of corrosion of the second connection line CL2.

[0032] Optionally, referring to FIG. 1C , the display panel includes a substrate 101 , a first metal layer 102 , a second metal layer 103 and a third metal layer 104 .

[0033] Optionally, the substrate 101 includes a flexible substrate and a rigid substrate. Optionally, the flexible substrate includes polyimide, etc. Optionally, the rigid substrate includes glass, ceramic, etc.

[0034] The first metal layer 102 is located on the substrate 101 and includes the first connection line CL1, the second connection line CL2, and a plurality of first test lines TL1. Optionally, the first metal layer 102 is made of at least one of Al, Ti, Mo, Cu, Ni, alloys thereof, or materials with high corrosion resistance.

[0035] The second metal layer 103 is located on the first metal layer 102 and includes a plurality of second test lines TL2. Optionally, the second metal layer 103 is made of at least one of Al, Ti, Mo, Cu, Ni, or alloys thereof, or a material with high corrosion resistance.

[0036] The third metal layer 104 is located on the second metal layer 103. The third metal layer 104 includes at least one transfer portion CP, which is electrically connected between the second connection line CL2 and the plurality of second test lines TL2. Optionally, the third metal layer 104 is made of a material such as indium tin oxide.

[0037] By arranging the first test line TL1 and the second test line TL2 in different layers, the risk of a short circuit between the first test line TL1 and the second test line TL2 due to width loss can be reduced when the first test line TL1 and the second test line TL2 are alternately arranged in the first direction x.

[0038] Optionally, the first metal layer 102 further includes a plurality of scan lines, the second metal layer 103 further includes a plurality of data lines DL, and the third metal layer 104 further includes pixel electrodes.

[0039] Optionally, referring to FIG. 1C , the display panel includes a first insulating layer 105 and a second insulating layer 106 .

[0040] The first insulating layer 105 is located between the first metal layer 102 and the second metal layer 103, and the second insulating layer 106 is located between the second metal layer 103 and the third metal layer 104. Optionally, the first insulating layer 105 and the second insulating layer 106 are made of at least one of silicon nitride and silicon oxide.

[0041] Compared with the design in which the second connecting line CL2 and the second test line TL2 are on the same layer, the present application makes the first connecting line CL1 and the second connecting line CL2 on the same layer, and the first insulating layer 105 and the second insulating layer 106 can be used to protect the second connecting line CL2, so that the risk of the second connecting line CL2 near the side boundary of the display panel being corroded by factors such as water vapor and thus failing is reduced, which is beneficial to improving the reliability of the display panel.

[0042] Optionally, the second insulating layer 106 is provided with a plurality of first vias H1 on the side of the first connecting line CL1 close to the second connecting line CL2 to expose the corresponding second test line TL2, and the second insulating layer 106 and the first insulating layer 105 are provided with one or more second vias H2 corresponding to the second connecting line CL2 to expose the second connecting line CL2.

[0043] The transition portion CP includes a first transition portion CP1 located in the first via hole H1 , a second transition portion CP2 located in the second via hole H2 , and a third transition portion CP3 connected between the first transition portion CP1 and the second transition portion CP2 .

[0044] Optionally, the display panel includes a plurality of transfer portions CP, each transfer portion CP is electrically connected to the corresponding second test line TL2 through a first via H1 , and each transfer portion CP is electrically connected to the second connection line CL2 through a second via H2 .

[0045] Optionally, the display panel includes a transfer portion CP, the transfer portion CP is electrically connected to the corresponding second test line TL2 through a plurality of first vias H1, and the transfer portion CP is electrically connected to the second connection line CL2 through one or more second vias H2.

[0046] Optionally, the display panel further includes a protective layer 107, which is located between the second insulating layer 106 and the third metal layer 104 to provide a planarization foundation for the transition portion CP. Accordingly, the first via H1 penetrates the protective layer 107 and the second insulating layer 106 to expose the corresponding second test line TL2, and the second via H2 penetrates the protective layer 107, the second insulating layer 106, and the first insulating layer 105 to expose the second connection line CL2. The transition portion CP is electrically connected to the second connection line CL2 and the corresponding second test line TL2 through the first via H1 and the second via H2, as shown in FIG1C .

[0047] Optionally, in some embodiments, the display panel may not include the protective layer 107 , and the second insulating layer 106 may be used to provide a planarization basis for the transfer portion CP.

[0048] Optionally, the display panel further includes an active layer 108, and the active layer 108 is located between the first insulating layer 105 and the second metal layer 103. Optionally, the active layer 108 includes silicon semiconductor, oxide semiconductor, etc.

[0049] Because the first test line TL1 and the second test line TL2 are on different layers and the dot screen detection switch area is eliminated, in addition to reducing the problem of signal line short circuits caused by switch device failure, when the display panel is manufactured using a four-pass mask process, the wiring is not restricted by space. The four-pass mask process can achieve the same function as the five-pass mask process, which is conducive to reducing costs. That is, the method for manufacturing a display panel may include:

[0050] providing a substrate 101;

[0051] A first metal layer 102 is formed on the substrate 101, and the first metal layer 102 is patterned using a first mask to obtain the first connection line CL1, the second connection line CL2 and a plurality of first test lines TL1;

[0052] Prepare a first insulating layer 105, an active layer 108 and a second metal layer 103, and use a second mask to pattern the active layer 108 and the second metal layer 103 to obtain a plurality of second test lines TL2;

[0053] Prepare a second insulating layer 106, and use the third mask to prepare the first via hole H1 and the second via hole H2;

[0054] A third metal layer 104 is prepared, and a fourth mask is used to pattern the third metal layer 104 to obtain the transfer portion CP.

[0055] During the step of forming the second insulating layer 106, the protective layer 107 may also be formed simultaneously. Specifically, the second insulating layer 106 and the protective layer 107 are formed, and the first via hole H1 and the second via hole H2 are formed using the third mask. Subsequently, the protective layer 107 may be retained in the display panel or removed.

[0056] Since the active layer 108 and the second metal layer 103 are patterned using the second mask, the active layer 108 remains under the data line DL and the second test line TL2 .

[0057] Alternatively, please continue to refer to FIG. 1A to FIG. 1B , the display panel includes a display area 10 a , a bonding area 10 b , and a conversion area 10 c located on a side of the bonding area 10 b away from the display area 10 a .

[0058] Optionally, a plurality of signal lines (such as a plurality of data lines DL and a plurality of scan lines) are located in the display area 10 a ; and the plurality of signal lines are electrically connected to a plurality of sub-pixels of the display panel.

[0059] Optionally, the first connection line CL1 and the second connection line CL2 are located in the conversion area 10c, and the second connection line CL2 is located on a side of the first connection line CL1 away from the display area 10a; the transfer portion CP is located in the conversion area 10c.

[0060] Optionally, the second sub-line TL12 of each first test line TL1 includes a first bonding portion TL121 and a first routing portion TL122 located at both ends of the first bonding portion TL121 and connected to the first bonding portion TL121, and the width of the first bonding portion TL121 is greater than the width of the first routing portion TL122.

[0061] The fourth sub-trace TL22 of each second test line TL2 includes a second bonding portion TL221 and second trace portions TL222 located at both ends of the second bonding portion TL221 and connected to the second bonding portion TL221. The width of the second bonding portion TL221 is greater than that of the second trace portion TL222.

[0062] The first bonding part TL121 and the second bonding part TL221 are located in the bonding area 10b, so that the driver chip is located in the bonding area 10b, and the bonding terminals of the driver chip are electrically connected to the first bonding part TL121 and the second bonding part TL221, so that the driver chip transmits signals to the plurality of signal lines through the first bonding part TL121 and the second bonding part TL221.

[0063] Optionally, the bonding terminals of the driver chip are electrically connected to the first bonding portion TL121 and the second bonding portion TL221 via conductive adhesive. The conductive adhesive includes conductive particles, and each bonding terminal is electrically connected to either the first bonding portion TL121 or the second bonding portion TL221.

[0064] Optionally, the third metal layer 104 also includes a first bonding adapter and a second bonding adapter, the first bonding adapter is electrically connected to the first bonding portion TL121 through a via penetrating the second insulating layer 106 and the first insulating layer 105, and the second bonding adapter is electrically connected to the second bonding portion TL221 through a via penetrating the second insulating layer 106, the conductive glue is located between the bonding terminal of the driver chip and the first bonding adapter and the second bonding adapter, and the bonding terminal of the driver chip is electrically connected to the first bonding portion TL121 and the second bonding portion TL221 through the first bonding adapter and the second bonding adapter.

[0065] Optionally, the signal line is the data line DL, and the first routing portion TL122 located on the side of the first bonding portion TL121 away from the first sub-routing portion TL11 is electrically connected to the corresponding first data line DL1, and the second routing portion TL222 located on the side of the second bonding portion TL221 away from the third sub-routing portion TL21 is electrically connected to the corresponding second data line DL2, so as to realize the electrical connection between the driving chip and the multiple data lines when the driving chip is electrically connected to the first bonding portion TL121 and the second bonding portion TL221.

[0066] Optionally, please continue to refer to FIG. 1A and FIG. 1B , the display panel further includes a laser region 10 d located between the bonding region 10 b and the conversion region 10 c .

[0067] The breaks of the first sub-trace TL11 and the second sub-trace TL12 are located in the laser area 10d, and the breaks of the third sub-trace TL21 and the fourth sub-trace TL22 are located in the laser area 10d.

[0068] It can be understood that when the display panel implements dot screen detection, the first sub-route TL11 and the second sub-route TL12 are electrically connected, and the third sub-route TL21 and the fourth sub-route TL22 are electrically connected, so that the second sub-route TL12 is electrically connected to the first connection line CL1, and the fourth sub-route TL22 is electrically connected to the second connection line CL2. When a test signal is applied to the pad electrically connected to the first connection line CL1 and to the pad electrically connected to the second connection line CL2 through a probe, the test signal is transmitted to the second sub-route TL12 via the first connection line CL1 and to the fourth sub-route TL22 via the second connection line CL2, thereby causing multiple data lines DL to receive the corresponding test signals, thereby implementing dot screen detection. After the display panel dot screen detection, in order to avoid short circuit problems between the multiple signal lines while not affecting the transmission of control signals for display by the driver chip to the display panel, the first sub-route TL11 and the second sub-route TL12 are disconnected in the laser area 10d, and the third sub-route TL21 and the fourth sub-route TL22 are disconnected.

[0069] Optionally, the distance between two adjacent first bonding portions TL121 and the distance between two adjacent second bonding portions TL221 may be set to a period width.

[0070] Optionally, please continue to refer to Figure 1B. In order to reduce the border width of the display panel, the display panel is further provided with an electrostatic protection module 300 in the laser area 10d. The electrostatic protection module 300 is electrically connected to the first connecting line CL1 and the second connecting line CL2. When the signal transmitted by the first connecting line CL1 and the second connecting line CL2 is affected by static electricity and the voltage changes, the voltage is discharged to prevent the display panel from being damaged by static electricity at the first connecting line CL1 and the second connecting line CL2 during the dot screen detection stage.

[0071] Optionally, the electrostatic protection module 300 includes a first electrostatic protection module 301 and a second electrostatic protection module 302. The first electrostatic protection module 301 is electrically connected to the first connection line CL1 and the common voltage terminal. When the voltage of the signal transmitted by the first connection line CL1 increases due to static electricity, the first electrostatic protection module 301 is configured to discharge the high voltage to the first voltage terminal. The second electrostatic protection module 302 is electrically connected to the second connection line CL2 and the common voltage terminal. When the voltage of the signal transmitted by the second connection line CL2 increases due to static electricity, the second electrostatic protection module 302 is configured to discharge the high voltage to the first voltage terminal.

[0072] Optionally, the first voltage terminal and a common voltage terminal of the display panel are at the same potential, and the common electrode of the display panel is electrically connected to the common voltage terminal, so as to reduce the number of power signals applied to the display panel.

[0073] Optionally, FIG2 is a schematic structural diagram of an electrostatic protection module provided in an embodiment of the present application; taking the first electrostatic protection module 301 as an example, the first electrostatic protection module 301 includes a first transistor T1 and a second transistor T2, wherein the control terminal and input terminal of the first transistor T1 are electrically connected to the first connection line CL1, the output terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the control terminal and output terminal of the second transistor T2 are electrically connected to the first voltage terminal V1, and the input terminal of the second transistor T2 is electrically connected to the first connection line CL1. Optionally, the first transistor T1 and the second transistor T2 are N-type transistors. When the voltage of the signal transmitted by the first connection line CL1 increases due to static electricity, the first transistor T1 is turned on, and the signal transmitted by the first connection line CL1 is discharged to the first voltage terminal V1 to prevent the display panel from being damaged at the first connection line CL1.

[0074] Similarly, the structure of the second electrostatic protection module 302 can also be obtained. By having the first electrostatic protection module 301 and the second electrostatic protection module 302 include the first transistor T1 and the second transistor T2, respectively, the electrostatic protection function can be achieved with a smaller number of components, which is beneficial for reducing the size of the laser area 10d of the display panel and facilitating a narrow-frame design of the display panel.

[0075] Optionally, please continue to refer to Figure 1B. Multiple first test lines TL1 and multiple second test lines TL2 are located between the first electrostatic protection module 301 and the second electrostatic protection module 302 to reduce the probability of short circuit problems between the electrostatic protection module 300 and the first test line TL1 and the second test line TL2, and also reduce the difficulty of wiring.

[0076] Optionally, referring to FIG. 1A-FIG . 1B , the laser region 10 d has a symmetry line syl extending along the second direction y, the first test lines TL1 are symmetric about the symmetry line syl, and the second test lines TL2 are symmetric about the symmetry line syl.

[0077] Optionally, please continue to refer to Figure 1A. The first test line TL1 and the second test line TL2 located on both sides of the symmetry line syl have a first spacing in the laser area 10d, and the first test line TL1 and the second test line TL2 have a second spacing in the bonding area 10b on a side away from the laser area 10d, and the first spacing is equal to the second spacing.

[0078] Optionally, please continue to refer to Figure 1B. The first test line TL1 and the second test line TL2 located on both sides of the symmetry line syl have a first spacing in the laser area 10d, and the first test line TL1 and the second test line TL2 have a second spacing in the bonding area 10b on the side away from the laser area 10d. The first spacing is smaller than the second spacing, so that there is space in the laser area 10d for placing the first electrostatic protection module 301 and the second electrostatic protection module 302.

[0079] Optionally, the first routing portion TL122 located between the first bonding portion TL121 and the first sub-routing portion TL11 includes a first sub-routing portion TLa, a second sub-routing portion TLb, and a third sub-routing portion TLc connected between the first sub-routing portion TLa and the second sub-routing portion TLb, and an end of the second sub-routing portion TLb away from the third sub-routing portion TLc is connected to the first bonding portion TL121. The second routing portion TL222 located between the second bonding portion TL221 and the third sub-routing portion TL21 includes a fourth sub-routing portion TLd, a fifth sub-routing portion TLe, and a sixth sub-routing portion TLf connected between the fourth sub-routing portion TLd and the fifth sub-routing portion TLe, and an end of the fifth sub-routing portion TLe away from the sixth sub-routing portion TLf is connected to the second bonding portion TL221.

[0080] Among them, the distance between the end of the third sub-routing portion TLc connected to the first sub-routing portion TLa and the symmetry line syl is less than the distance between the end of the third sub-routing portion TLc connected to the second sub-routing portion TLb and the symmetry line syl; the distance between the end of the sixth sub-routing portion TLf connected to the fourth sub-routing portion TLd and the symmetry line syl is less than the distance between the end of the sixth sub-routing portion TLf connected to the fifth sub-routing portion TLe and the symmetry line syl, so that the third sub-routing portion TLc and the sixth sub-routing portion TLf extend in a third direction intersecting the first direction x and the second direction y, thereby realizing electrical connection between the first sub-routing portion TLa and the second sub-routing portion TLb, and electrical connection between the fourth sub-routing portion TLd and the fifth sub-routing portion TLe.

[0081] Optionally, the display panel further includes a fan-out region 10e located between the bonding region 10b and the display region 10a. Since the data line DL and the first test line TL1 are located on different layers, to reduce the risk of short circuits between the multiple test lines and to minimize the impact on the display region 10a, the first trace portion TL122 located on a side of the first bonding portion TL121 away from the first sub-trace TL11 is electrically connected to the corresponding first data line DL1 in the fan-out region 10e.

[0082] Optionally, the first insulating layer 105 is provided with a third via hole in the fan-out area 10e to expose the first data line DL1, and the first routing portion TL122 located on the side of the first bonding portion TL121 away from the first sub-routing TL11 is electrically connected to the first data line DL1 through the third via hole.

[0083] Optionally, the third via is located at the junction of the fan-out area 10e and the display area 10a to prevent the data line DL from extending into the fan-out area 10e, thereby increasing the risk of short circuit between the data line DL and the second test line TL2.

[0084] Continuing to refer to FIG. 1D to FIG. 1E , the present application further provides a display panel including a plurality of data lines DL, a first test group 100 and a second test group 200 .

[0085] The first test group 100 includes a first connection line CL1 and a plurality of first test lines TL1. The first connection line CL1 extends along a first direction x. The plurality of first test lines TL1 are electrically connected between the first connection line CL1 and the corresponding data lines DL. The plurality of first test lines TL1 extend along a second direction y that intersects the first direction x. The second test group 200 includes a second connection line CL2 and a plurality of second test lines TL2. The second connection line CL2 extends along the first direction x. The plurality of second test lines TL2 are electrically connected between the second connection line CL2 and the corresponding data lines DL. The plurality of second test lines TL2 extend along the second direction y.

[0086] The first test lines TL1 and the second test lines TL2 are alternately arranged in the first direction x, the first connection line CL1 and the first test lines TL1 are in the same layer, and the second connection line CL2 and the second test lines TL2 are in different layers.

[0087] When the display panel is performing dot screen detection, an external probe applies a signal to the pad electrically connected to the first connection line CL1, so that the test signal is transmitted to the corresponding multiple data lines DL through the first connection line CL1 and the multiple first test lines TL1; then the external probe applies a signal to the pad electrically connected to the second connection line, so that the test signal is transmitted to the corresponding multiple data lines DL through the second connection line and the multiple second test lines TL2.

[0088] That is, the difference between the display panel shown in Figures 1A to 1B and the display panel shown in Figures 1D to 1E is that the display panel shown in Figures 1D to 1E does not have any fracture in the laser area 10d. The display panel shown in Figures 1D to 1E can be used to implement dot screen detection. After the dot screen detection, the first test line TL1 and the second test line TL2 are cut in the laser area 10d using a laser process to obtain the display panel shown in Figures 1A to 1B.

[0089] Figures 3A and 3B are structural schematic diagrams of a display device provided in an embodiment of the present application. The present application also provides a display device, including any of the above-mentioned display panels and a driver chip DIC, wherein the driver chip DIC is electrically connected to the second sub-lines TL12 of multiple first test lines TL1 and the fourth sub-lines TL22 of multiple second test lines TL2.

[0090] Optionally, the driving chip DIC is electrically connected to the first bonding portion TL121 of the second sub-trace TL12 and the second bonding portion TL221 of the fourth sub-trace TL22.

[0091] 3A and 3B only illustrate the pin regions of the driver chip DIC electrically connected to the second sub-trace TL12 and the fourth sub-trace TL22. In practical applications, depending on the size of the driver chip DUC, the driver chip DIC may also cover the laser region 10d and the conversion region 10c.

[0092] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for technical personnel in this field, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A display panel, wherein: include: Multiple data lines; A first test group, comprising a first connecting line and a plurality of first test lines; each of the first test lines comprises a first sub-line and a second sub-line disconnected from the first sub-line, the first sub-line is electrically connected to the first connecting line, and the second sub-line is electrically connected to the corresponding data line; A second test group, comprising a second connecting line and a plurality of second test lines; each of the second test lines comprises a third sub-line and a fourth sub-line disconnected from the third sub-line, the third sub-line is electrically connected to the second connecting line, and the fourth sub-line is electrically connected to the corresponding data line; Among them, the first connecting line and the second connecting line extend along a first direction, multiple first test lines and multiple second test lines extend along a second direction intersecting the first direction, and the first test lines and the second test lines are alternately arranged in the first direction; the first connecting line and multiple first test lines are in the same layer, and the second connecting line and multiple second test lines are in different layers.

2. The display panel according to claim 1, wherein: The first connection line and the second connection line are in the same layer.

3. The display panel according to claim 2, wherein: The display panel comprises: A first metal layer, comprising the first connecting line, the second connecting line and a plurality of the first test lines; A second metal layer, located on the first metal layer, comprising a plurality of the second test lines; and The third metal layer is located on the second metal layer and includes at least one transition portion, and the transition portion is electrically connected between the second connection line and a plurality of the second test lines.

4. The display panel according to claim 3, wherein: The display panel comprises: A first insulating layer, located between the first metal layer and the second metal layer; a second insulating layer, located between the second metal layer and the third metal layer, the second insulating layer being provided with a plurality of first via holes on a side of the first connecting line close to the second connecting line to expose the corresponding second test line, and the second insulating layer and the first insulating layer being provided with a plurality of second via holes corresponding to the second connecting line to expose the second connecting line; The transition portion includes a first transition portion located in the first via hole, a second transition portion located in the second via hole, and a third transition portion connected between the first transition portion and the second transition portion.

5. The display panel according to claim 1, wherein: The display panel comprises a display area, a bonding area and a conversion area located at a side of the bonding area away from the display area; The second sub-routing of each of the first test lines comprises a first bonding portion and first routing portions located at two ends of the first bonding portion and connected to the first bonding portion, and a width of the first bonding portion is greater than a width of the first routing portion; The fourth sub-routing of each of the second test lines comprises a second bonding portion and second routing portions located at two ends of the second bonding portion and connected to the second bonding portion, and a width of the second bonding portion is greater than a width of the second routing portion; Among them, the plurality of data lines are located in the display area; the first connection line and the second connection line are located in the conversion area, and the second connection line is located on a side of the first connection line away from the display area; the first bonding part and the second bonding part are located in the bonding area.

6. The display panel according to claim 5, wherein: The display panel also includes a laser region located between the bonding region and the conversion region; The breaks of the first sub-route and the second sub-route are located in the laser area, and the breaks of the third sub-route and the fourth sub-route are located in the laser area.

7. The display panel according to claim 6, wherein: The display panel further includes: An electrostatic protection module, located in the laser area and electrically connected to the first connecting line and the second connecting line; The laser area has a symmetry line extending along the second direction, a plurality of the first test lines are symmetric about the symmetry line, and a plurality of the second test lines are symmetric about the symmetry line; The first test line and the second test line located on both sides of the symmetry line have a first spacing in the laser area, and the first test line and the second test line have a second spacing in the bonding area away from the laser area, and the first spacing is smaller than the second spacing.

8. The display panel according to claim 7, wherein: The first routing portion located between the first bonding portion and the first sub-routing portion includes a first sub-routing portion, a second sub-routing portion, and a third sub-routing portion connected between the first sub-routing portion and the second sub-routing portion, and one end of the second sub-routing portion away from the third sub-routing portion is connected to the first bonding portion; The second routing portion located between the second bonding portion and the third sub-routing portion includes a fourth sub-routing portion, a fifth sub-routing portion, and a sixth sub-routing portion connected between the fourth sub-routing portion and the fifth sub-routing portion, and one end of the fifth sub-routing portion away from the sixth sub-routing portion is connected to the second bonding portion; Among them, the distance between one end of the third sub-routing portion connected to the first sub-routing portion and the symmetry line is less than the distance between one end of the third sub-routing portion connected to the second sub-routing portion and the symmetry line; the distance between one end of the sixth sub-routing portion connected to the fourth sub-routing portion and the symmetry line is less than the distance between one end of the sixth sub-routing portion connected to the fifth sub-routing portion and the symmetry line.

9. The display panel according to claim 7, wherein: The electrostatic protection module comprises: A first electrostatic protection module, electrically connected to the first connecting line and the common voltage terminal; A second electrostatic protection module, electrically connected to the second connecting line and the common voltage terminal; Wherein, a plurality of the first test lines and a plurality of the second test lines are located between the first electrostatic protection module and the second electrostatic protection module.

10. The display panel according to claim 5, wherein: The plurality of data lines include a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines and the plurality of second data lines are alternately arranged in the first direction; The first routing portion located on a side of the first bonding portion away from the first sub-routing is electrically connected to the corresponding first data line, and the second routing portion located on a side of the second bonding portion away from the third sub-routing is electrically connected to the corresponding second data line.

11. The display panel according to claim 10, wherein: The display panel also includes a fan-out region between the bonding region and the display region; The first routing portion located at a side of the first bonding portion away from the first sub-routing portion is electrically connected to the corresponding first data line in the fan-out region.

12. A display panel, wherein: include: Multiple data lines; A first test group includes a first connection line and a plurality of first test lines, wherein the first connection line extends along a first direction, the plurality of first test lines are electrically connected between the first connection line and the corresponding data lines, and the plurality of first test lines extend along a second direction intersecting the first direction; A second test group, comprising a second connection line and a plurality of second test lines, wherein the second connection line extends along the first direction, the plurality of second test lines are electrically connected between the second connection line and the corresponding data line, and the plurality of second test lines extend along the second direction; The first test lines and the second test lines are alternately arranged in the first direction, the first connection line and the plurality of the first test lines are in the same layer, and the second connection line and the plurality of the second test lines are in different layers.

13. A display device, wherein: It includes a display panel and a driving chip; the display panel includes a plurality of data lines, a first test group and a second test group; The first test group includes a first connection line and a plurality of first test lines; each of the first test lines includes a first sub-line and a second sub-line disconnected from the first sub-line, the first sub-line is electrically connected to the first connection line, and the second sub-line is electrically connected to the corresponding data line; The second test group includes a second connection line and a plurality of second test lines; each of the second test lines includes a third sub-line and a fourth sub-line disconnected from the third sub-line, the third sub-line is electrically connected to the second connection line, and the fourth sub-line is electrically connected to the corresponding data line; Among them, the first connecting line and the second connecting line extend along a first direction, multiple first test lines and multiple second test lines extend along a second direction intersecting the first direction, and the first test lines and the second test lines are alternately arranged in the first direction; the first connecting line and multiple first test lines are on the same layer, and the second connecting line and multiple second test lines are on different layers; the driving chip is electrically connected to the second sub-lines of the multiple first test lines and the fourth sub-lines of the multiple second test lines.

14. The display device according to claim 13, wherein: The first connection line and the second connection line are in the same layer.

15. The display device according to claim 14, wherein: The display panel comprises: A first metal layer, comprising the first connecting line, the second connecting line and a plurality of the first test lines; A second metal layer, located on the first metal layer, comprising a plurality of the second test lines; and The third metal layer is located on the second metal layer and includes at least one transition portion, and the transition portion is electrically connected between the second connection line and a plurality of the second test lines.

16. The display device according to claim 15, wherein: The display panel comprises: A first insulating layer, located between the first metal layer and the second metal layer; a second insulating layer, located between the second metal layer and the third metal layer, the second insulating layer being provided with a plurality of first vias on a side of the first connecting line close to the second connecting line to expose the corresponding second test line, and the second insulating layer and the first insulating layer being provided with a plurality of second vias corresponding to the second connecting line to expose the second connecting line; The transition portion includes a first transition portion located in the first via hole, a second transition portion located in the second via hole, and a third transition portion connected between the first transition portion and the second transition portion.

17. The display device according to claim 13, wherein: The display panel comprises a display area, a bonding area and a conversion area located at a side of the bonding area away from the display area; The second sub-routing of each of the first test lines comprises a first bonding portion and first routing portions located at two ends of the first bonding portion and connected to the first bonding portion, and a width of the first bonding portion is greater than a width of the first routing portion; The fourth sub-routing of each of the second test lines comprises a second bonding portion and second routing portions located at two ends of the second bonding portion and connected to the second bonding portion, and a width of the second bonding portion is greater than a width of the second routing portion; Among them, the plurality of data lines are located in the display area; the first connection line and the second connection line are located in the conversion area, and the second connection line is located on a side of the first connection line away from the display area; the first bonding part and the second bonding part are located in the bonding area.

18. The display device according to claim 17, wherein: The display panel also includes a laser region located between the bonding region and the conversion region; The breaks of the first sub-route and the second sub-route are located in the laser area, and the breaks of the third sub-route and the fourth sub-route are located in the laser area.

19. The display device according to claim 18, wherein: The display panel further includes: An electrostatic protection module, located in the laser area and electrically connected to the first connecting line and the second connecting line; The laser area has a symmetry line extending along the second direction, a plurality of the first test lines are symmetric about the symmetry line, and a plurality of the second test lines are symmetric about the symmetry line; The first test line and the second test line located on both sides of the symmetry line have a first spacing in the laser area, and the first test line and the second test line have a second spacing in the bonding area away from the laser area, and the first spacing is smaller than the second spacing.

20. The display device according to claim 19, wherein: The electrostatic protection module comprises: A first electrostatic protection module, electrically connected to the first connecting line and the common voltage terminal; A second electrostatic protection module, electrically connected to the second connecting line and the common voltage terminal; Wherein, a plurality of the first test lines and a plurality of the second test lines are located between the first electrostatic protection module and the second electrostatic protection module.

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