Encoding method, decoding method, encoder, decoder, and computer storage medium

Abstract

Embodiments of the present application relate to the technical field of communications, and disclose an encoding method, a decoding method, an encoder, a decoder, and a computer storage medium. In the embodiments of the present application, zero symbols with the number of zero symbols being consistent with the number of encoded check symbols are filled in message symbols in advance, so that these zero symbols subsequently can be used as symbols to be solved, and the solutions corresponding to these zero symbols are found by means of PPT, so as to directly obtain the check symbols. On one hand, an encoding process can be simplified, and on the other hand, input parameters (the input parameters comprise the total number of code words and the total number of message symbols) are not limited, and a message symbol of any input parameter is encoded according to the encoding method provided by the embodiments of the present application, and then can generate a legitimate code word, thereby improving the encoding flexibility.

Description

Coding method, encoder, decoder and computer storage medium

[0001] This application claims priority to Chinese patent application No. 202310940830.1 filed on July 27, 2023, entitled “Coding and decoding method, encoder, decoder and computer storage medium”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The embodiments of the present application relate to the field of communication technology, and in particular to a coding method, an encoder, a decoder, and a computer storage medium. Background Art

[0003] Reed-Solomon (RS) coding is an erasure code based on finite fields. The principle of RS coding is to encode k message symbols over a finite field to obtain L check symbols, which form a codeword of length n, where L = nk.

[0004] In the related art, an encoder receives a message vector, which includes k message symbols. The encoder divides the message vector into blocks of length T. Parts shorter than length T are padded with zero symbols to obtain multiple blocks of length T. The encoder performs a Lin-Chung-Han inverse fast Fourier transform (LCH-IFFT) on each block over a finite field to obtain vectors corresponding to each block. The encoder sums each vector bit by bit and performs a Lin-Chung-Han fast Fourier transform (LCH-FFT) on the summed vector over a finite field to obtain the LCH-FFT transform result. Based on the LCH-FFT transform result, the encoder determines that the length L is the check symbol.

[0005] The input parameters in the above method (input parameters include the total number of codewords and the total number of message symbols, that is, n and k) need to meet the constraints: L = nk, where 2 m is the order of the finite field.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a coding method, an encoder, a decoder, and a computer storage medium, which can achieve no restrictions on input parameters during coding, thereby improving coding flexibility. The technical solution is as follows:

[0008] In a first aspect, an encoding method is provided, wherein an encoder obtains k message symbols, where k is a positive integer;

[0009] The encoder fills k message symbols with nk zero symbols, where nk is the total number of encoded check symbols and n is a positive integer; the encoder determines a target symbol group and a fast Fourier transform (FFT) result based on the nk zero symbols and the k message symbols, wherein the target symbol group includes nk zero symbols and at least one message symbol among the k message symbols, and the FFT result is obtained by using the other message symbols except at least one message symbol among the k message symbols, and the length of the target symbol group is the same as the length of the FFT result; the encoder performs a main pivot transform (PPT) between the target symbol group and the FFT result to obtain nk check symbols corresponding to the nk zero symbols in the target symbol group.

[0010] In an embodiment of the present application, a number of zero symbols that is consistent with the number of check symbols after encoding is pre-filled in the message symbols, so that these zero symbols can be used as symbols to be solved later, and the solutions corresponding to these zero symbols are solved through the principle pivot transform (PPT), thereby directly obtaining the check symbols. On the one hand, the encoding process can be simplified, and on the other hand, since PPT itself has no constraints on input parameters (input parameters include the total number of codewords and the total number of message symbols), the encoding algorithm provided by the implementation of this application has no restrictions on input parameters. Message symbols with any input parameters can generate legal codewords after being encoded by the encoding method provided in the embodiment of the present application, thereby improving encoding flexibility.

[0011] Based on the method provided in the first aspect, in a possible implementation manner, nk zero symbols are padded before the first message symbol among the k message symbols after arrangement.

[0012] In this scenario, the encoder determines the target symbol group and the FFT transformation result based on nk zero symbols and k message symbols. The implementation process can be as follows: group the arranged nk zero symbols and k message symbols according to the first length T1 to obtain multiple groups of symbols, and use the first group of symbols as the target symbol group, nk is less than T1, and T1 is a positive integer; perform transposition Lin Zhonghan fast Fourier transform TLCH-FFT on the second group of symbols to the last group of symbols to obtain multiple transformation results corresponding to the second group of symbols to the last group of symbols; and sum the multiple transformation results bit by bit to obtain the FFT transformation result.

[0013] In an embodiment of the present application, TLCH-FFT is performed on the second group of symbols to the last group of symbols respectively, so that the obtained FFT transformation result includes T1-(nk) unknown quantities, and these T1-(nk) unknown quantities are located in the last few digits of the FFT transformation result, thereby providing the possibility of subsequent principle pivot transform (PPT).

[0014] Based on the method provided in the first aspect, in one possible implementation, the implementation process of grouping the arranged nk zero symbols and k message symbols according to the first length T1 can be: if the number of message symbols included in the last group of symbols after grouping is less than T1, then fill the last group of symbols with zero symbols so that the length of the last group of symbols reaches T1.

[0015] In this way, the length of each group of symbols can be guaranteed to be T1.

[0016] Based on the method provided in the first aspect, in one possible implementation, the length of the target symbol group and the length of the FFT transform result are both a first length T1, T1 is a positive integer, and the 1st to nkth symbols in the target symbol group are zero symbols, the n-k+1th to T1th symbols are message symbols, the 1st to nkth symbols in the FFT transform result are known symbols, and the n-k+1th to T1th symbols are unknown symbols.

[0017] In this scenario, the encoder performs PPT between the target symbol group and the FFT transformation result to obtain nk check symbols corresponding to the nk zero symbols in the target symbol group. The implementation process can be as follows: the encoder uses the target symbol group as the input signal of PPT and the FFT transformation result as the output signal of PPT, and based on the relationship between the input signal of PPT and the output signal of PPT, solves the point values ​​corresponding to the 1st to nkth symbols in the target symbol group, and uses the point values ​​corresponding to the 1st to nkth symbols in the target symbol group as nk check symbols.

[0018] In an embodiment of the present application, since the number of zero symbols included in the target symbol group is the same as the number of known symbols in the FFT transform result, and the number of message symbols included in the target symbol group is the same as the number of unknown symbols in the FFT transform result, the zero symbols included in the target symbol group can be used as symbols to be solved, and the target symbol group can be used as the input signal of the PPT, and the FFT transform result can be used as the output signal of the PPT, so that the point value of the unknown symbol in the input signal and the point value of the unknown symbol in the output signal are obtained based on the basic principles of the PPT transform, and the point value of the unknown symbol in the input signal can be used as a verification symbol.

[0019] Based on the method provided in the first aspect, in one possible implementation, the encoder determines that the finite field used for the FFT transform result includes multiple binary extended fields, the multiple binary extended fields are tower field structures, and the basis of each binary extended field in the multiple binary extended fields is a Cantor basis.

[0020] In the embodiment of the present application, the structure of the finite field used in the encoding process may also be improved to further optimize the encoding algorithm.

[0021] Based on the method provided in the first aspect, in one possible implementation, the encoder stores a multiplication table corresponding to a target binary extension domain, where the target binary extension domain is one of multiple binary extension domains. In this scenario, when the encoder determines the FFT transform result, when multiplying the first polynomial and the second polynomial, if there is a target polynomial in the first polynomial and the second polynomial that does not belong to the target binary extension domain, the target polynomial is split, and the target polynomial after the split belongs to the target binary extension domain, and the first polynomial and the second polynomial are two polynomials generated in the process of determining the FFT transform result; based on the split target polynomial and the multiplication table, the multiplication result corresponding to the first polynomial and the second polynomial is determined.

[0022] Accordingly, based on the method provided in the first aspect, in one possible implementation, if the first polynomial and the second polynomial are both polynomials in the target binary extension field, the multiplication results corresponding to the first polynomial and the second polynomial are searched from the multiplication table.

[0023] When the improved finite field is used in the encoding process, since elements in the higher-level binary extension fields of the tower-like finite field can be calculated using elements in the lower-level binary extension fields, the encoder only needs to maintain the multiplication table corresponding to one of the binary extension fields, thus optimizing the encoder's memory overhead.

[0024] Based on the method provided in the first aspect, in one possible implementation, when the encoder determines the FFT transform result, when obtaining the rotation factor of the third polynomial, it determines the number of bit shift operations and uses the number of bit shift operations as the rotation factor of the third polynomial, where the third polynomial is a polynomial generated in the process of determining the FFT transform result.

[0025] In the embodiment of the present application, based on the improved finite field, the denominator s0(v) in the rotation factor is 1. Therefore, when determining the rotation factor, it is only necessary to determine the number of bit shift operations. Therefore, there is no need to pre-configure a subspace polynomial tensor table in the encoder to query the rotation factor, further optimizing the memory overhead of the encoder.

[0026] In a second aspect, a decoding method is provided, in which a decoder obtains a codeword, the codeword includes n positions, each of the n positions corresponds to a symbol, k positions of the n positions correspond to k message symbols, and there is a missing message symbol at at least one position among the k positions, n and k are both positive integers, and n is greater than k; the decoder groups the codeword according to a second length T2 to obtain multiple sub-codewords, T2 is a positive integer; the decoder performs inverse fast Fourier transform (IFFT) on the multiple sub-codewords in parallel to obtain multiple vectors corresponding to the multiple sub-codewords; the decoder determines at least one missing message symbol in the codeword based on the multiple vectors and an error locator polynomial.

[0027] In the decoding method provided in the embodiment of the present application, the codewords are grouped and IFFT is performed on each sub-codeword in parallel to recover the lost message symbols. Compared with directly performing IFFT on the n-point receiving vector, this can reduce the decoding complexity in high-code rate scenarios, thereby improving the decoding efficiency in high-code rate scenarios.

[0028] Based on the method provided in the second aspect, in one possible implementation, the decoder determines the at least one message symbol missing in the codeword based on multiple vectors and an error locator polynomial. The implementation process may be as follows: the decoder bitwise sums the multiple vectors and performs polynomial multiplication on the summed vector and the error locator polynomial to obtain a target polynomial; the decoder performs a fast Fourier transform (FFT) on the target polynomial to obtain a transformation result, which includes the point value of the target polynomial at each erased point in the erased point set; the decoder determines the at least one message symbol missing in the codeword based on the transformation result and the error locator polynomial.

[0029] Since the target polynomial is obtained by performing polynomial multiplication of the summed vector and the error location polynomial, the highest order of the target polynomial is (2T2-1), which can greatly improve the efficiency of FFT at high bit rates, especially extremely high bit rates.

[0030] Based on the method provided in the first aspect, in one possible implementation, the finite field used by the decoder to determine the transformation result includes multiple binary extension fields, the multiple binary extension fields are tower field structures, and the basis of each binary extension field in the multiple binary extension fields is a Cantor basis.

[0031] In this scenario, the decoder can determine the at least one missing message symbol in the codeword based on the transformation result and the error locator polynomial by:

[0032] The decoder determines the missing at least one message symbol in the codeword using the following formula:

[0033] Among them, q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erased points, q [:T2] (ω) is the lower T2 bits of q(ω), and t is the number of shift operations.

[0034] When the finite field is a finite field constructed from a tower field, s′(ω) used to determine the missing message symbols is a constant 1. In actual decoding, only the missing message symbols can be decoded, and the missing check symbols are not processed. Therefore, the formula for determining the missing message symbols can be simplified to the above formula, further reducing the decoding complexity and thus improving the decoding efficiency.

[0035] In a third aspect, an encoder is provided, wherein the encoder has the function of implementing the encoding method described in the first aspect. The encoder includes at least one module, wherein the at least one module is configured to implement the encoding method described in the first aspect.

[0036] In a fourth aspect, a decoder is provided, wherein the decoder has the function of implementing the decoding method in the second aspect. The decoder includes at least one module, wherein the at least one module is used to implement the decoding method provided in the second aspect.

[0037] In a fifth aspect, an encoder is provided, comprising a processor and a memory, wherein the memory is configured to store a program that supports the encoder in executing the encoding method provided in the first aspect, and to store data involved in implementing the encoding method provided in the first aspect. The processor is configured to execute the program stored in the memory.

[0038] In a sixth aspect, a decoder is provided. The decoder includes a processor and a memory, wherein the memory is configured to store a program that supports the decoder in executing the decoding method provided in the second aspect, and to store data involved in implementing the decoding method provided in the second aspect. The processor is configured to execute the program stored in the memory.

[0039] In a seventh aspect, a computer-readable storage medium is provided, wherein instructions are stored in the computer-readable storage medium, which, when executed on a computer, enables the computer to execute the encoding method described in the first aspect above.

[0040] In an eighth aspect, a computer-readable storage medium is provided, wherein instructions are stored in the computer-readable storage medium. When the computer-readable storage medium is run on a computer, the computer executes the decoding method described in the second aspect.

[0041] In a ninth aspect, a computer program product comprising instructions is provided, which, when executed on a computer, enables the computer to execute the encoding method described in the first aspect.

[0042] In a tenth aspect, a computer program product comprising instructions is provided, which, when executed on a computer, enables the computer to execute the decoding method described in the second aspect.

[0043] The technical effects obtained in the above-mentioned third to tenth aspects are similar to the technical effects obtained by the corresponding technical means in the first or second aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] FIG1 is a schematic diagram of an encoding process of an RS encoding technology provided by the related art;

[0045] FIG2 is a schematic diagram of a decoding process of an RS encoding technology provided by the related art;

[0046] FIG3 is a schematic diagram of an implementation scenario provided by an embodiment of the present application;

[0047] FIG4 is a schematic diagram of another implementation scenario provided by an embodiment of the present application;

[0048] FIG5 is a schematic diagram of an audio and video transmission scenario provided by an embodiment of the present application;

[0049] FIG6 is a flow chart of an encoding method provided in an embodiment of the present application;

[0050] FIG7 is a schematic diagram of a process of performing TLCH-FFT on a group of symbols according to an embodiment of the present application;

[0051] FIG8 is another encoding flow chart provided in an embodiment of the present application;

[0052] FIG9 is another encoding flow chart provided in an embodiment of the present application;

[0053] FIG10 is a schematic diagram showing a comparison of coding performance provided by an embodiment of the present application;

[0054] FIG11 is a flowchart of a decoding method provided in an embodiment of the present application;

[0055] FIG12 is a schematic diagram of a process of performing LCH-IFFT on a sub-codeword according to an embodiment of the present application;

[0056] FIG13 is a schematic diagram of a process of performing LCH-FFT on a target polynomial according to an embodiment of the present application;

[0057] FIG14 is a schematic diagram of a process for determining all missing symbols of a codeword according to an embodiment of the present application;

[0058] FIG15 is a schematic diagram of another decoding process provided by an embodiment of the present application;

[0059] FIG16 is a schematic diagram showing a comparison of decoding performance provided by an embodiment of the present application;

[0060] FIG17 is a schematic structural diagram of an encoder provided in an embodiment of the present application;

[0061] FIG18 is a schematic structural diagram of a decoder provided in an embodiment of the present application;

[0062] FIG19 is a schematic structural diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solutions and advantages of the present application more clear, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0064] To facilitate subsequent understanding, the application scenarios of the embodiments of the present application are first explained below.

[0065] With the continuous development of computer technology, network technology and multimedia technology, network multimedia technologies based on the Internet Protocol (IP), such as video on demand, video conferencing, and Internet TV, have continued to mature. However, since data is easily lost during transmission, how to achieve reliable transmission of data with low latency in the network has always been a problem that needs to be solved in data transmission scenarios. In addition, in data storage scenarios, as the amount of data continues to increase, how to effectively store and maintain massive amounts of data is also a problem that needs to be solved. Erasure coding technology, as a technology that can recover lost data, is widely used in data transmission scenarios and data storage scenarios.

[0066] The basic principle of erasure coding is to encode k original data to produce an encoded result, which includes k original data and L parity data (also called redundant data). If L or fewer data are lost, k original data can be obtained from any k remaining data, where k and L are both positive integers. The process of encoding k original data to produce the encoded result is called encoding, and the process of recovering k original data from the remaining data is called decoding.

[0067] RS coding technology is a typical erasure coding technology that has been widely used. RS coding technology is a coding algorithm based on a finite field, which is also called Galois Field, named after the famous French mathematician Galois. The finite field can usually be marked as GF(2 mFor example, the finite field used in the current RS coding technology may include GF(2 8 )、GF(2 16 )wait.

[0068] Figure 1 is a schematic diagram of the encoding process of an RS encoding technology provided by the related art. As shown in Figure 1, when the encoder receives the message vector, since the block length T needs to meet the power of 2 requirement, that is, Therefore, the message vector is first padded with zeros to a power of 2, that is, zero symbols are padded after the k message symbols included in the message vector, and the length of the padded message vector satisfies the power of 2. The message vector padded with zero symbols is then divided into blocks according to the length T to obtain blocks m1', m2', m3', etc. as shown in Figure 1. LCH-IFFT is performed on each block to obtain vectors p1', p2', p3', etc. corresponding to each block. All vectors are summed bit by bit to obtain vector p', and LCH-FFT is performed on vector p' to obtain the LCH-FFT transformation result. L check symbols are determined based on the LCH-FFT transformation result. The L check symbols and k message symbols are combined to obtain the encoded codeword.

[0069] In the encoding process shown in Figure 1, the input parameters (i.e., n and k) need to meet the following constraints, resulting in low encoding flexibility:

[0070] L=nk.

[0071] Figure 2 is a schematic diagram of the decoding process of a RS encoding technique provided by related art. The vector that represents the codeword encoded by the encoder and transmitted through the channel to the decoder is called the receive vector, labeled r in Figure 2. The receive vector consists of n positions, one or more of which contain missing symbols. The goal of decoding is to recover these missing symbols. The positions of the missing symbols are called erasure bits, and the set of these erasure bits is called the erasure point set.

[0072] When the decoder decodes, it first multiplies the values ​​at the n positions in the received vector by the point values ​​corresponding to the error locator polynomial to obtain G. The error locator polynomial is a polynomial determined based on the erased bits and can be expressed as follows:

[0073] Where E is the set of erased points. Therefore, the point value of the error locator polynomial corresponding to each erased bit is 0.

[0074] After obtaining G, the decoder performs an n-point LCH-IFFT on G to obtain g(x), and solves the formal derivative g'(x) of g(x). Perform an n-point LCH-FFT on g'(x) to obtain the point value g'(ω) of g'(x) at each erased bit. i ), based on g'(ω i ) can be used to restore the original sign of the erased bit, that is, the erased value, by the following formula:

[0075] Wherein, f(ω) represents the erased value of the restored erased bit.

[0076] In the decoding process shown in FIG2 , two n-point Fourier transforms are required to solve the intermediate process. As the value of n, that is, the bit rate, increases, the decoding efficiency will also decrease.

[0077] Based on this, the embodiment of the present application provides a coding method and a decoding method. In the coding method provided in the embodiment of the present application, a number of zero symbols consistent with the number of check symbols after encoding are filled in the message symbol in advance, and these zero symbols are used as symbols to be solved, and the solution of these zero symbols is solved by the principle pivot transform (PPT) subsequently, so as to directly obtain the check symbol. On the one hand, the coding process can be simplified, and on the other hand, there is no restriction on the input parameters, so the coding flexibility can be improved. In the decoding method provided in the embodiment of the present application, the codewords are grouped, and IFFT is performed on each sub-codeword in parallel to recover the lost message symbols. Compared with directly performing IFFT on the receiving vector of n points, the decoding complexity in the high code rate scenario can be reduced, thereby improving the decoding efficiency in the high code rate scenario.

[0078] The following explains the implementation scenario of the method provided in the embodiment of the present application.

[0079] FIG3 is a schematic diagram of an implementation scenario provided by an embodiment of the present application. The implementation scenario can be a distributed storage system or a centralized storage system. As shown in FIG3 , the implementation scenario includes a first module 101 and at least one storage node 102. The first module 101 and each storage node 102 are communicatively connected. The communication connection method includes, but is not limited to, communication connection via a wired network or a wireless network.

[0080] Exemplarily, at least one storage node 102 is configured to encode the original data (i.e., the aforementioned message vector) to obtain an encoding result, where the encoding result includes the original data (k message symbols) and check data (L check symbols) obtained by encoding the original data. The first module 101 is configured to download data from the at least one storage node 102 to restore the original data. In one possible implementation, there are multiple storage nodes 102. When one or more storage nodes 102 fail, the first module 101 is further configured to download data from a surviving storage node 102 to restore the data on the failed storage node 102, and then write the restored data to a new storage node 102.

[0081] In an embodiment of the present application, the first module 101 and the at least one storage node 102 may be located in the same device or in different devices. In the case where the first module 101 and the at least one storage node 102 are located in the same device, the implementation scenario shown in FIG3 is a centralized storage system. In the case where the first module 101 and the at least one storage node 102 are located in different devices, the implementation scenario shown in FIG3 is a distributed storage system. The at least one storage node 102 may be at least one memory. In the case where there are multiple storage nodes 102, the types of the multiple memories may be the same or different, and this embodiment of the present application does not limit this.

[0082] The encoder involved in the embodiment of the present application may be, for example, the storage node 102 in FIG. 3 , and the decoder may be, for example, the first module 101 in FIG. 3 .

[0083] FIG4 is a schematic diagram of another implementation scenario provided by an embodiment of the present application. As shown in FIG4 , the implementation scenario includes a third module 103 and a fourth module 104, and the third module 103 and the fourth module 104 are connected via a wired network or a wireless network. The third module 103 can encode the data to be transmitted and transmit the encoded data to the fourth module 104. If part of the data is lost during the transmission process, the fourth module 104 can decode the remaining received data and recover the lost part of the data. In other words, the third module 103 and the fourth module 104 can be located in two devices that need to transmit data, or the third module 103 and the fourth module 104 can be two modules in the same device that need to transmit data.

[0084] The encoder involved in the embodiment of the present application may be illustratively the third module 103 in FIG. 4 , and the decoder may be illustratively the fourth module 104 in FIG. 4 .

[0085] The implementation scenario illustrated in FIG5 can be an audio and video transmission scenario. In this case, the operations performed by the third module 103 and the fourth module 104 can be as shown in FIG5 . Referring to FIG5 , the third module 103 performs program multiplexing and transport layer multiplexing on the audio and video data to be transmitted. It then performs multiplexing adaptation and energy spreading on the transport layer multiplexed audio and video data. It then encodes the energy-spread audio and video data, performs baseband shaping based on the encoded audio and video data, and transmits the baseband-shaped audio and video data to a channel. The fourth module 104 receives the encoded audio and video data via the channel, decodes the encoded audio and video data, and outputs the decoded audio and video data.

[0086] It can be understood that the modules and storage nodes shown in Figures 3 to 5 are for illustration only. The implementation scenario shown in Figure 3 may include fewer or more modules and storage nodes, and the implementation scenarios shown in Figures 4 and 5 may also include fewer or more modules. The embodiments of the present application do not limit this.

[0087] The encoding method provided in the embodiment of the present application is explained below.

[0088] Figure 6 is a flow chart of an encoding method provided by an embodiment of the present application. As shown in Figure 6, the method includes the following steps.

[0089] Step 601: The encoder obtains k message symbols, where k is a positive integer.

[0090] The k message symbols are the data to be encoded, and a vector consisting of the k message symbols can be called a message vector.

[0091] For example, the message symbol may be data to be stored in a data storage scenario, or data to be transmitted in a data transmission scenario, or data used to generate a QR code.

[0092] Step 602: The encoder fills k message symbols with nk zero symbols, where nk is the total number of encoded check symbols and n is a positive integer.

[0093] In an embodiment of the present application, in order to simplify the encoding process, the message symbols are pre-filled with zero symbols whose number is the same as the number of check symbols. These zero symbols can be used as unknown quantities later, and the check symbols can be obtained by solving the solutions corresponding to these zero symbols without the need for additional operations.

[0094] In some embodiments, the k message symbols in the message vector are arranged in sequence. In this scenario, step 602 can be implemented by the encoder padding nk zero symbols before the first message symbol in the arrangement. That is, the nk zero symbols are padded before the first message symbol in the arranged k message symbols. Subsequently, after the solution corresponding to these zero symbols is found, the solution corresponding to the zero symbol can be directly used to replace the zero symbol and the k message symbols to form a codeword.

[0095] Optionally, in this embodiment of the present application, n k zero symbols may be padded after the last message symbol of the k message symbols, which is not limited in this embodiment of the present application. When n k zero symbols are padded after the last message symbol of the k message symbols, the relevant operations of step 603 can refer to the relevant operations in the scenario of padded n k zero symbols before the first message symbol of the k message symbols.

[0096] It should be noted that the embodiment of the present application does not limit the arrangement order of the k message symbols. For example, in a data transmission scenario, the arrangement order of the k message symbols can be the order in which the encoder receives the message symbols.

[0097] Step 603: The encoder determines a target symbol group and a fast Fourier transform (FFT) result based on nk zero symbols and k message symbols. The target symbol group includes nk zero symbols and at least one message symbol among the k message symbols. The FFT result is obtained by using other message symbols except at least one message symbol among the k message symbols, and the length of the target symbol group is the same as the length of the FFT result.

[0098] In some embodiments, in a scenario where nk zero symbols are padded before the first message symbol in the arranged k message symbols, step 603 may be implemented as follows: grouping the arranged nk zero symbols and k message symbols according to a first length T1 to obtain multiple groups of symbols, taking the first group of symbols as the target symbol group, nk is less than T1, and T1 is a positive integer; performing transposed Lin-Chung-Han fast Fourier transform (TLCH-FFT) on the second group of symbols to the last group of symbols to obtain multiple conversion results corresponding to the second group of symbols to the last group of symbols; and summing the multiple conversion results bit by bit to obtain an FFT conversion result.

[0099] The first length T1 is a power of 2, which is the basic principle of FFT.

[0100] In an embodiment of the present application, TLCH-FFT is performed on the second group of symbols to the last group of symbols respectively, so that the obtained FFT transformation result includes T1-(nk) unknown quantities, and these T1-(nk) unknown quantities are located in the last few digits of the FFT transformation result, thereby providing the possibility of subsequent principle pivot transform (PPT).

[0101] For example, if nk = 3 and T1 = 5, the first three symbols in the first group of symbols are zero symbols. The first three symbols in the FFT transform result are known symbols, and the last two symbols are unknown symbols. In this way, the zero symbols in the first group of symbols can be used as the symbols to be solved. Subsequently, the PPT solution is used to obtain the solution for the first three symbols in the first group of symbols and the solution for the last two symbols in the FFT transform result.

[0102] FIG7 is a flow chart of performing TLCH-FFT on a group of symbols according to an embodiment of the present application. d0 to d3 represent four symbols in a group of symbols respectively. According to the process shown in FIG7 , IFFT is performed on the four symbols to obtain a coefficient expression. D0 to D3 in FIG7 are the four roots of the coefficient expression. These four roots constitute a conversion result corresponding to the group of symbols. In addition, s0() to s1() shown in FIG7 are the subspace vanishing polynomials s t In (), when t is 0 to 1, β is any value on the finite field corresponding to 2 raised to the power of z, and v0 to v1 represent the 0th value to the 1st value on a set of bases of the finite field respectively.

[0103] Among them, the Variables such as twiddle factors may be referred to as twiddle factors. In the embodiment of the present application, a subspace vanishing polynomial tensor table may be pre-configured in the encoder to query the twiddle factors required in the TLCH-FFT process.

[0104] Optionally, in an embodiment of the present application, the second group of symbols to the last group of symbols may also be processed by other FFTs that meet special conditions to obtain FFT transformation results that meet the above conditions, which will not be explained one by one here.

[0105] Furthermore, when the encoder groups nk zero symbols and k message symbols according to a first length T1, if the number of message symbols included in the last group of symbols after grouping is less than T1, the last group of symbols is padded with zero symbols to bring the length of the last group of symbols to T1. In this way, the length of each group of symbols can be guaranteed to be T1.

[0106] Step 604: The encoder performs a principal pivot transform (PPT) between the target symbol group and the FFT transform result to obtain nk check symbols corresponding to the nk zero symbols in the target symbol group.

[0107] Since the target symbol group includes nk zero symbols as padding, when the point values ​​corresponding to the nk zero symbols are obtained through PPT transformation, the point values ​​corresponding to the nk zero symbols can be directly used as the nk check symbols. Compared with the encoding process shown in Figure 1, the encoding process is simplified.

[0108] Since PPT has no requirements for input parameters (i.e., n and k), the encoding process provided in the embodiment of the present application has no requirements for input parameters. In other words, the encoding method provided in the embodiment of the present application allows any input parameter on a finite field to generate a legal codeword.

[0109] For example, when n=256 and k=129, the number of check symbols to be generated during encoding is L=256-129=127. If the encoding process shown in Figure 1 is used, then And k+T=257>256=2 8 , so it is necessary to use a relatively inefficient finite field for GF(2 16 ) is implemented by the encoder on the GF(2 8 ) can generate legal codewords.

[0110] Assume that the length of the target symbol group and the length of the FFT transform result are both T1. This T1 is also the first length used for grouping in step 603. Based on step 603, it can be seen that in some embodiments, the 1st to nkth symbols in the target symbol group are zero symbols, the n-k+1th to T1th symbols are message symbols, the 1st to nkth symbols in the FFT transform result are known symbols, and the n-k+1th to T1th symbols are unknown symbols.

[0111] Based on this, the target symbol group can be used as the input signal of the PPT, and the FFT transform result can be used as the output signal of the PPT. Based on the relationship between the PPT input signal and the PPT output signal, the point values ​​corresponding to the 1st to nkth zero symbols in the target symbol group and the point values ​​corresponding to the n-k+1th to T1th unknown symbols in the FFT transform result can be solved. Among them, the point values ​​corresponding to the 1st to nkth zero symbols in the target symbol group can be used as the nk check symbols.

[0112] In an embodiment of the present application, since the number of zero symbols included in the target symbol group is the same as the number of known symbols in the FFT transform result, and the number of message symbols included in the target symbol group is the same as the number of unknown symbols in the FFT transform result, the zero symbols included in the target symbol group can be used as symbols to be solved, and the target symbol group can be used as the input signal of the PPT, and the FFT transform result can be used as the output signal of the PPT, so that the point value of the unknown symbol in the input signal and the point value of the unknown symbol in the output signal are obtained based on the basic principles of the PPT transform, and the point value of the unknown symbol in the input signal can be used as a verification symbol.

[0113] For example, when nk is greater than T1 / 2, it indicates that more than half of the symbols in the target symbol group are symbols to be solved. In this scenario, step 604 can be implemented by performing a self-recursive call on the second half of the symbols in the target symbol group (i.e., the input signal) to obtain a first intermediate result, which includes the point values ​​corresponding to each zero symbol in the second half of the input signal. The first intermediate result is integrated with the first half of the FFT transform result (i.e., the output signal) and then subjected to IFFT to obtain the point values ​​corresponding to each zero symbol in the first half of the input signal. The first intermediate result is directly subjected to calculations such as summation with the first half of the output signal to obtain the point values ​​corresponding to each unknown symbol in the second half of the output signal.

[0114] When nk is less than or equal to T1 / 2, it indicates that no more than half of the symbols in the target symbol group are symbols to be solved. In this scenario, step 604 can be implemented as follows: perform FFT on the second half of the input signal (all known symbols) to obtain a second intermediate result; sum the second intermediate result with the known symbols in the first half of the output signal, substitute the sum result into the first half of the input signal for self-recursive call, and obtain the point value corresponding to each zero symbol in the first half of the input signal and the point value corresponding to each unknown symbol in the first half of the output signal; integrate the first half of the output signal and the second intermediate result to obtain the point value corresponding to each unknown symbol in the second half of the output signal.

[0115] The above process of solving the point values ​​corresponding to the 1st to nkth symbols in the target symbol group can be implemented by the code shown in the following Table 1, for example.

[0116] The codes corresponding to numbers 1 to 34 in Table 1 indicate the PPT process, which can be referred to as the PPT algorithm. The codes corresponding to numbers 7 to 19 indicate the processing for scenarios where nk is less than or equal to T1 / 2. The codes corresponding to numbers 20 to 33 indicate the processing for scenarios where nk is greater than T1 / 2. T in Table 1 is the same value as T1 in the aforementioned embodiment.

[0117] Table 1

[0118] It should be noted that the PPT algorithm shown in Table 1 is used to illustrate the point values ​​corresponding to the 1st to nkth symbols in the target symbol group, and does not constitute a limitation on the embodiments of the present application.

[0119] In addition, the finite field used in the encoding process in the above embodiment can be a finite field defined based on a polynomial ring. Optionally, in the embodiment of the present application, the structure of the finite field used in the encoding process can be improved to further optimize the encoding algorithm.

[0120] In some embodiments, the finite field used by the encoder to determine the FFT transform result includes multiple binary extension fields, the multiple binary extension fields are of tower field construction, and the basis of each binary extension field in the multiple binary extension fields is a Cantor basis.

[0121] When the encoding process uses the improved finite field described above, since elements in the higher-level binary extension fields of the tower-like finite field can be calculated using elements in the lower-level binary extension fields, the encoder only needs to maintain the multiplication table corresponding to one of the binary extension fields, thereby optimizing the encoder's memory overhead. The multiplication table corresponding to the binary extension field is used to query the product of any two elements in the binary extension field.

[0122] For example, the encoder stores a multiplication table corresponding to a target binary extended domain, where the target binary extended domain is one of multiple binary extended domains. In this scenario, when determining an FFT transform result, when multiplying a first polynomial and a second polynomial, if one of the first and second polynomials contains a target polynomial that does not belong to the target binary extended domain, the encoder splits the target polynomial, and the split target polynomial belongs to the target binary extended domain. The first and second polynomials are two polynomials generated in the process of determining the FFT transform result. Based on the split target polynomial and the multiplication table, the encoder determines the multiplication result corresponding to the first and second polynomials.

[0123] Correspondingly, if the first polynomial and the second polynomial are both polynomials in the target binary extension field, the multiplication results corresponding to the first polynomial and the second polynomial can be directly searched from the multiplication table.

[0124] When determining the FFT transform result, the encoder typically needs to calculate the multiplication of two polynomials. Because the encoder maintains only a single multiplication table for the binary extended range, when multiplying a first polynomial and a second polynomial, if either polynomial does not belong to the target binary extended range, the polynomial that does not belong to the target binary extended range must be split to determine the multiplication result corresponding to the first and second polynomials based on the multiplication table.

[0125] For example, the finite field includes two binary extension fields, namely GF(2 8 ) and GF(2 16 ), at this time the encoder only needs to maintain GF(2 8 )The multiplication table corresponding to this binary extension domain is sufficient.

[0126] In addition, when the finite field used in the encoding process is the improved finite field described above, when the encoder determines the FFT transform result, when obtaining the rotation factor of the third polynomial, it determines the number of bit shift operations and uses the number of bit shift operations as the rotation factor of the third polynomial. The third polynomial is a polynomial generated in the process of determining the FFT transform result.

[0127] When the encoder determines the FFT transform result, it usually rotates some polynomials. In this scenario, it is necessary to determine the rotation factor used during the rotation. As shown in Figure 7, the rotation factor can be understood as , where s0(β) can be referred to as the number of bit shift operations. In the embodiment of the present application, based on the improved finite field, the denominator s0(v) in the twiddle factor is 1. Therefore, when determining the twiddle factor, only the number of bit shift operations needs to be determined. Therefore, there is no need to pre-configure a subspace vanishing polynomial tensor table in the encoder to query the twiddle factor, further optimizing the encoder's memory overhead.

[0128] The following uses Figures 8 and 9 as examples to illustrate the encoding method provided in the embodiment of the present application. It should be noted that Figures 8 and 9 are used for illustration and do not constitute a limitation on the encoding method provided in the embodiment of the present application.

[0129] As shown in Figures 8 and 9, taking encoding of L check symbols as an example, the specific operation of the encoder is as follows: first, the first (T1-L) bits of the message symbol are taken as m0, and 0 is added to the front of the taken message symbol m0 to form p0 of length T1, and then the message symbol is grouped from (T1-L) bits backward with a length of T1 to obtain m1, m2...m N / T1-1 Where N is the total length of the message vector after the zero symbols are filled in the message vector. Perform TLCH-FFT on each of m1, m2, etc. to obtain p1, p2, ... p N / T1-1 Etc. The result of the TLCH transformation is added to p1. The accumulated result is then PPTed with p0. The resulting p0 is called p0', and the check symbol is obtained from the L bits before p0'. Finally, the message symbol is appended to the check symbol to obtain a codeword of length n, labeled c in Figure 9.

[0130] In summary, in an embodiment of the present application, a number of zero symbols consistent with the number of check symbols after encoding is pre-filled in the message symbol, so that these zero symbols can be used as symbols to be solved later, and the solutions corresponding to these zero symbols are solved by the principle pivot transform (PPT), thereby directly obtaining the check symbols. On the one hand, the encoding process can be simplified, and on the other hand, since PPT itself has no constraints on the input parameters (input parameters include the total number of code words and the total number of message symbols), the encoding algorithm provided by the implementation of the present application has no restrictions on the input parameters. Message symbols with any input parameters can generate legal code words after being encoded by the encoding method provided in the embodiment of the present application, thereby improving the encoding flexibility.

[0131] In order to further illustrate the technical effect of the encoding method provided in the embodiment of the present application, the encoder performs encoding based on the encoding processes shown in Figures 1 and 6 according to the parameters shown in Table 2.

[0132] Table 2

[0133] As shown in Figure 10, assuming the order of the finite field is 2 m =2 8 From the simulation test results, we can see that when the input parameters meet the constraints When the input parameters do not meet the constraints, for example, in the scenario where k / L is {128 / 16, 128 / 28, 128 / 40, 128 / 128} in Figure 10, the encoding process shown in Figure 6 has approximately 10% redundant computation due to the introduction of PPT. Therefore, the throughput of the encoding process shown in Figure 6 in this scenario is slightly lower than that of the encoding process shown in Figure 1. However, when the input parameters do not meet the constraints, for example, in the scenario where k / L is {196 / 50, 196 / 60} in Figure 10, the throughput of the encoding process shown in Figure 6 is more than double that of the encoding process shown in Figure 1 due to the upscaling operation caused by the encoding process shown in Figure 1.

[0134] The decoding method provided in the embodiment of the present application is explained below.

[0135] FIG11 is a flow chart of a decoding method provided in an embodiment of the present application. As shown in FIG11 , the method includes the following steps.

[0136] Step 1101: The decoder obtains a codeword, where the codeword includes n positions, each of the n positions corresponds to a symbol, k positions of the n positions correspond to k message symbols, and there is a missing message symbol in at least one of the k positions, n and k are both positive integers, and n is greater than k.

[0137] Since at least one message symbol is missing in the codeword obtained by the decoder, the decoder needs to decode the codeword to restore the missing message symbol.

[0138] Step 1102: The decoder groups the codewords according to a second length T2 to obtain a plurality of sub-codewords, where T2 is a positive integer.

[0139] In an embodiment of the present application, in order to reduce decoding complexity, a codeword may be divided into multiple sub-codewords so that the multiple sub-codewords can be processed in parallel subsequently.

[0140] The second length T2 in step 1102 may be the same as or different from the first length T1 in the embodiment of FIG. 6 .

[0141] Step 1103: The decoder performs IFFT on the multiple sub-codewords in parallel to obtain multiple vectors corresponding to the multiple sub-codewords.

[0142] In some embodiments, the IFFT may be, for example, a Lin-Chung-Han Inverse Fast Fourier Transform (Lin-Chung-Han IFFT, LCH-IFFT).

[0143] FIG12 is a flow chart of performing LCH-IFFT on a sub-codeword according to an embodiment of the present application. y0 to y7 represent 8 positions in a sub-codeword respectively. According to the process shown in FIG12 , the symbols at the 8 positions are IFFTed to obtain a coefficient expression. U0 to u7 in FIG12 are the 8 roots of the coefficient expression. These 8 roots constitute a vector corresponding to the sub-codeword. In addition, s0() to s2() shown in FIG12 are the subspace vanishing polynomials s respectively. t In (), when t is between 0 and 2, β is any value on the finite field corresponding to 2 raised to the power of z, and v0 to v2 represent the 0th to 2nd values ​​on a set of bases of the finite field, respectively.

[0144] Step 1104: The decoder determines at least one message symbol missing from the codeword based on the multiple vectors and the error locator polynomial.

[0145] In some embodiments, the decoder determines at least one message symbol missing from the codeword based on multiple vectors and an error locator polynomial in the following manner: the decoder adds the multiple vectors bit by bit, and performs polynomial multiplication on the added vectors and the error locator polynomial to obtain a target polynomial; the decoder performs FFT on the target polynomial to obtain a transformation result, which includes the point value of the target polynomial at each erased point in the erased point set; the decoder determines at least one message symbol missing from the k message symbols based on the transformation result and the error locator polynomial.

[0146] Since the target polynomial is obtained by performing polynomial multiplication of the summed vector and the error location polynomial, the highest order of the target polynomial is (2T2-1), which can greatly improve the efficiency of FFT in high code rates, especially extremely high code rates.

[0147] In some embodiments, the method of performing polynomial multiplication of the added vector and the error location polynomial to obtain the target polynomial can be implemented by the following formula:

[0148] q(x)←s(x)Π(x)

[0149] Where q(x) is the target polynomial, s(x) is the added vector, and Π(x) is the error location polynomial.

[0150] The above formula can be implemented by the code corresponding to the LCH fast polynomial multiplication shown in Table 3. Optionally, the decoder can also determine the target polynomial by other means, which will not be described one by one here.

[0151] Table 3

[0152] Additionally, in some embodiments, the FFT may be an LCH-FFT.

[0153] FIG13 is a flow chart of performing LCH-FFT on a target polynomial according to an embodiment of the present application. u0 to u7 represent the roots of the target polynomial respectively. According to the process shown in FIG13 , the target polynomial is subjected to IFFT to obtain 8 point values, which are the point values ​​of the target polynomial at each erased point in the erased point set. y0 to y7 in FIG13 are the obtained 8 point values, which are the transformation results of the target polynomial. In addition, s0() to s2() shown in FIG13 are the subspace vanishing polynomial s respectively. t In (), when t is between 0 and 2, β is any value on the finite field corresponding to 2 raised to the power of z, and v0 to v2 represent the 0th to 2nd values ​​on a set of bases of the finite field, respectively.

[0154] Optionally, the decoder may also transform the target polynomial through other types of FFT to determine the point value of the target polynomial at each erased point in the erased point set, which will not be described one by one here.

[0155] In addition, in some embodiments, the decoder determines at least one message symbol missing from the codeword based on the transformation result and the error locator polynomial in the following manner: the decoder determines all missing symbols of the codeword based on the transformation result and the error locator polynomial, and then filters out the message symbol from all missing symbols.

[0156] The decoder can determine all missing symbols of the codeword based on the transformation result and the error locator polynomial, for example, by the following formula:

[0157] Where q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erased points, and s′(ω) is the evaluation of the formal derivative of the subspace polynomial of the finite field at the point ω.

[0158] FIG14 is a flow chart of a method for determining all missing symbols of a codeword according to an embodiment of the present application. As shown in FIG14 , the received vector r is grouped according to the second length T2 to obtain multiple sub-codewords, which are marked as {r0, r1…, r n / T2-1 Perform LCH-IFFT on each sub-codeword to obtain vectors {r0, r1…, r n / T2-1 The bitwise sum of each vector yields s(x), which is then multiplied by the error locator polynomial to yield the target polynomial q(x). LCH-FFT is then performed on q(x) to yield q(ω). Based on q(ω), the missing symbol can be determined using the formula shown in Figure 14.

[0159] Furthermore, when the finite field is a finite field constructed using a tower field in the embodiment of FIG. 6 , in this scenario, s′(ω) is a constant 1, so the decoder can determine the at least one message symbol missing from the codeword using the following formula:

[0160] Table 4 Codes corresponding to the decoding algorithm for determining missing message symbols based on a finite field constructed based on a tower field provided in an embodiment of the present application. The specific content of the code can be referred to the above embodiment and will not be repeated here.

[0161] Table 4

[0162] In other embodiments, the decoder can also directly determine the missing message symbols without necessarily determining the missing symbols. In the scenario where the check symbols are also missing, this approach can reduce the decoder's computational load, thereby increasing the decoder's decoding speed.

[0163] In this scenario, the decoder can determine the missing message symbol in the codeword based on the transformation result and the error locator polynomial using the following formula:

[0164] Among them, q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erased points, q [:T2] (ω) is the lower T2 bits of q(ω), and t is the number of shift operations.

[0165] Based on the foregoing, it can be seen that when the finite field is the finite field constructed in the tower field in the embodiment of FIG. 6 , s′(ω) is a constant 1, and the decoder can further determine the at least one message symbol missing from the codeword using the following formula:

[0166] The decoding method in the embodiment of the present application is described below with an example of FIG15. As shown in FIG15, the decoder groups the received codeword, that is, the received vector r, by T2 to obtain multiple sub-codewords {r0, r1..., r n / T2-1}, perform LCH-IFFT on each sub-codeword, and accumulate the results to obtain s(x). Using LCH-FFT fast polynomial multiplication, perform point-to-point multiplication of s(x) and the error locator polynomial π(x). Apply LCH-IFFT to the multiplication result to obtain the target polynomial q(x). Perform LCH-FFT on the target polynomial q(x) to obtain q(ω). Substituting q(ω) into the above formula f(w) can obtain the missing message symbols in the codeword.

[0167] In summary, in the decoding method provided in the embodiment of the present application, the codewords are grouped and IFFT is performed on each sub-codeword in parallel to recover the lost message symbols. Compared with directly performing IFFT on the n-point receiving vector, this can reduce the decoding complexity in high-code rate scenarios, thereby improving the decoding efficiency in high-code rate scenarios.

[0168] The target polynomial is obtained by performing polynomial multiplication of the summed vector and the error location polynomial. Therefore, the highest order of the target polynomial is (2T2-1). Compared with the evaluation of the (n-1)-order polynomial g'(x) at point n shown in Figure 2, the decoding process shown in Figure 11 can greatly improve the efficiency of the LCH-FFT transform at high bit rates, especially extremely high bit rates.

[0169] In addition, in the actual data recovery application scenario, if only the data segment data (ie, the message symbol) needs to be recovered, then in the process of solving q(x), only δ·q [:T2] (ω) instead of q(ω) can more efficiently recover the lost message symbols and save about half of the computing resources in this sub-process.

[0170] In order to further illustrate the technical effect of the decoding method provided in the embodiment of the present application, the decoder performs decoding based on the decoding processes shown in Figures 2 and 11 according to the parameters shown in Table 5.

[0171] Table 5

[0172] The decoder was tested using the decoding process shown in Figure 11 and the decoding process shown in Figure 2 under the parameters shown in Table 5, yielding the comparative results shown in Figure 16. Figure 16 compares the throughput of the two decoding processes. As shown in Figure 16, as the total number of message symbols increases, the throughput of the decoding process shown in Figure 11 gradually improves over that of the decoding process shown in Figure 2.

[0173] In the embodiments of the present application, the encoding method shown in FIG6 and the decoding method shown in FIG11 can be used in combination, or in combination with other encoding and decoding methods. For example, the encoder uses the encoding method shown in FIG6 for encoding, and the decoder uses the decoding method shown in FIG11 for decoding. For another example, the encoder uses the encoding method shown in FIG6 for encoding, and the decoder uses the decoding method shown in FIG2 for decoding. For another example, the encoder uses the encoding method shown in FIG1 for encoding, and the decoder uses the decoding method shown in FIG11 for decoding.

[0174] FIG17 is a schematic diagram of the structure of an encoder provided in an embodiment of the present application. As shown in FIG17 , the encoder 1700 includes:

[0175] The acquisition module 1701 is used to acquire k message symbols, where k is a positive integer. For specific implementation, please refer to step 601 in the embodiment of FIG. 6 .

[0176] The filling module 1702 is used to fill k message symbols with nk zero symbols, where nk is the total number of encoded check symbols and n is a positive integer. For specific implementation, please refer to step 602 in the embodiment of Figure 6.

[0177] The first determination module 1703 is used to determine a target symbol group and a fast Fourier transform (FFT) transformation result based on nk zero symbols and k message symbols, where the target symbol group includes nk zero symbols and at least one message symbol among the k message symbols, and the FFT transformation result is obtained by using other message symbols among the k message symbols except for at least one message symbol, and the length of the target symbol group is the same as the length of the FFT transformation result. For specific implementation methods, please refer to step 603 in the embodiment of Figure 6.

[0178] The second determining module 1704 is configured to perform a principal pivot transform (PPT) between the target symbol group and the FFT transform result to obtain nk check symbols corresponding to the nk zero symbols in the target symbol group. Specific implementation methods can refer to step 604 in the embodiment of FIG. 6 .

[0179] Optionally, nk zero symbols are padded before the first message symbol in the permuted k message symbols;

[0180] The first determination module is used for:

[0181] Grouping the arranged nk zero symbols and k message symbols according to a first length T1 to obtain multiple groups of symbols, and using the first group of symbols as the target symbol group, nk is less than T1, and T1 is a positive integer;

[0182] Performing a transposed Lin Zhonghan Fast Fourier Transform (TLCH-FFT) on the second group of symbols to the last group of symbols to obtain a plurality of transformation results corresponding to the second group of symbols to the last group of symbols;

[0183] The multiple conversion results are summed bit by bit to obtain the FFT transformation result.

[0184] Optionally, the first determining module is configured to:

[0185] If the number of message symbols included in the last group of symbols after grouping is less than T1, zero symbols are padded in the last group of symbols to make the length of the last group of symbols reach T1.

[0186] Optionally, the length of the target symbol group and the length of the FFT transform result are both a first length T1, T1 is a positive integer, and the 1st to nkth symbols in the target symbol group are zero symbols, the n-k+1th to T1th symbols are message symbols, the 1st to nkth symbols in the FFT transform result are known symbols, and the n-k+1th to T1th symbols are unknown symbols;

[0187] The second determination module is used for:

[0188] The encoder takes the target symbol group as the input signal of PPT and the FFT transform result as the output signal of PPT. Based on the relationship between the input signal of PPT and the output signal of PPT, it solves the point values ​​corresponding to the 1st to nkth symbols in the target symbol group, and takes the point values ​​corresponding to the 1st to nkth symbols in the target symbol group as nk check symbols.

[0189] Optionally, the finite field used by the encoder to determine the FFT transform result includes multiple binary extension fields, the multiple binary extension fields are of tower field structure, and a basis of each binary extension field in the multiple binary extension fields is a Cantor basis.

[0190] Optionally, the encoder stores a multiplication table corresponding to a target binary extension range, and the target binary extension range is one of a plurality of binary extension ranges;

[0191] The first determining module is further configured to:

[0192] In determining an FFT transform result, when multiplying the first polynomial and the second polynomial, if a target polynomial in the first polynomial and the second polynomial does not belong to the target binary extended domain, the target polynomial is split, and the target polynomial after the split belongs to the target binary extended domain. The first polynomial and the second polynomial are two polynomials generated in the process of determining the FFT transform result;

[0193] Based on the split target polynomial and the multiplication table, a multiplication result corresponding to the first polynomial and the second polynomial is determined.

[0194] Optionally, the first determining module is further configured to:

[0195] If both the first polynomial and the second polynomial are polynomials in the target binary extension field, a multiplication result corresponding to the first polynomial and the second polynomial is searched from a multiplication table.

[0196] Optionally, the first determining module is further configured to:

[0197] When determining the FFT transform result, when obtaining the rotation factor of the third polynomial, the number of bit shift operations is determined, and the number of bit shift operations is used as the rotation factor of the third polynomial, which is a polynomial generated in the process of determining the FFT transform result.

[0198] In an embodiment of the present application, a number of zero symbols that is consistent with the number of check symbols after encoding is pre-filled in the message symbols, so that these zero symbols can be used as symbols to be solved later, and the solutions corresponding to these zero symbols are solved through the principle pivot transform (PPT), thereby directly obtaining the check symbols. On the one hand, the encoding process can be simplified, and on the other hand, since PPT itself has no constraints on input parameters (input parameters include the total number of codewords and the total number of message symbols), the encoding algorithm provided by the implementation of this application has no restrictions on input parameters. Message symbols with any input parameters can generate legal codewords after being encoded by the encoding method provided in the embodiment of the present application, thereby improving encoding flexibility.

[0199] It should be noted that the encoder provided in the above embodiment is merely an example of the division of the functional modules described above during encoding. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the encoder provided in the above embodiment and the encoding method embodiment are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0200] FIG18 is a schematic diagram of the structure of a decoder provided in an embodiment of the present application. As shown in FIG18 , the decoder 1800 includes:

[0201] Acquisition module 1801 is used to acquire a codeword, where the codeword includes n positions, each of the n positions corresponds to a symbol, k positions of the n positions correspond to k message symbols, and there is a missing message symbol in at least one of the k positions, n and k are both positive integers, and n is greater than k; for the specific implementation method, please refer to step 1101 in the embodiment of Figure 11.

[0202] The grouping module 1802 is configured to group the codewords according to a second length T2 to obtain a plurality of sub-codewords, where T2 is a positive integer. For specific implementation, reference may be made to step 1102 in the embodiment of FIG. 11 .

[0203] The transformation module 1803 is configured to perform inverse fast Fourier transform (IFFT) on the multiple sub-codewords in parallel to obtain multiple vectors corresponding to the multiple sub-codewords. For specific implementation, please refer to step 1103 in the embodiment of FIG. 11 .

[0204] The determination module 1804 is configured to determine at least one missing message symbol in the codeword based on the multiple vectors and the error locator polynomial. Specific implementation methods can refer to step 1104 in the embodiment of FIG11 .

[0205] Optionally, the determination module is configured to:

[0206] Sum multiple vectors bit by bit, and perform polynomial multiplication of the summed vector and the error location polynomial to obtain the target polynomial;

[0207] Performing a fast Fourier transform (FFT) on the target polynomial to obtain a transformation result, where the transformation result includes the point value of the target polynomial at each erased point in the erased point set;

[0208] At least one message symbol missing from the codeword is determined based on the transformation result and the error locator polynomial.

[0209] Optionally, the finite field used by the decoder to determine the transformation result includes a plurality of binary extension fields, the plurality of binary extension fields are of tower field construction, and a basis of each binary extension field in the plurality of binary extension fields is a Cantor basis;

[0210] Determine the module used for:

[0211] The at least one message symbol missing from the codeword is determined by the following formula:

[0212] Among them, q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erased points, q [:T2] (ω) is the lower T2 bits of q(ω), and t is the number of shift operations.

[0213] In the decoding method provided in the embodiment of the present application, the codewords are grouped and IFFT is performed on each sub-codeword in parallel to recover the lost message symbols. Compared with directly performing IFFT on the n-point receiving vector, this can reduce the decoding complexity in high-code rate scenarios, thereby improving the decoding efficiency in high-code rate scenarios.

[0214] It should be noted that the decoder provided in the above embodiment is merely illustrated by the division of the above functional modules during decoding. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. Furthermore, the decoder provided in the above embodiment and the decoding method embodiment are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0215] Figure 19 is a schematic diagram of the structure of a computer device provided in an embodiment of the present application. The encoder or decoder in the aforementioned embodiments can be implemented using the computer device shown in Figure 19. Referring to Figure 19, the computer device includes at least one processor 1901, a communication bus 1902, a memory 1903, and at least one communication interface 1904.

[0216] The processor 1901 may be a general-purpose central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application.

[0217] The communication bus 1902 may include a pathway for transmitting information between the aforementioned components.

[0218] The memory 1903 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including a compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 1903 may exist independently and be connected to the processor 1901 via the communication bus 1902. The memory 1903 may also be integrated with the processor 1901.

[0219] Memory 1903 is used to store program code for executing the solution of the present application, and is controlled by processor 1901 for execution. Processor 1901 is used to execute the program code stored in memory 1903. The program code may include one or more software modules. The encoder and decoder in the aforementioned embodiment can determine data for developing an application through processor 1901 and one or more software modules in the program code in memory 1903.

[0220] The communication interface 1904 uses any transceiver or other device for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), etc.

[0221] In a specific implementation, as an embodiment, a computer device may include multiple processors, such as processor 1901 and processor 1905 shown in FIG19 . Each of these processors may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. The processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0222] In a specific implementation, as an embodiment, the computer device may further include an output device 1906 and an input device 1907. The output device 1906 communicates with the processor 1901 and can display information in a variety of ways. For example, the output device 1906 can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. The input device 1907 communicates with the processor 1901 and can receive user input in a variety of ways. For example, the input device 1907 can be a mouse, a keyboard, a touch screen device, or a sensor device.

[0223] The aforementioned computer device may be a general-purpose computer device or a dedicated computer device. In a specific implementation, the computer device may be a desktop computer, a portable computer, a network server, a personal digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device, or an embedded device. The embodiments of the present application do not limit the type of computer device.

[0224] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital versatile disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).

[0225] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or by a program to instruct the relevant hardware, and the program may be stored in a computer-readable storage medium, which may be a read-only memory, a disk, or an optical disk, etc.

[0226] The above content is not intended to limit the embodiments of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the embodiments of the present application.

Claims

1. A coding method, characterized in that: The method comprises: The encoder obtains k message symbols, where k is a positive integer; The encoder fills nk zero symbols in the k message symbols, where nk is the total number of encoded check symbols and n is a positive integer; The encoder determines a target symbol group and a fast Fourier transform (FFT) result based on the nk zero symbols and the k message symbols, wherein the target symbol group includes the nk zero symbols and at least one message symbol among the k message symbols, the FFT result is obtained by other message symbols among the k message symbols except the at least one message symbol, and the length of the target symbol group is the same as the length of the FFT result; The encoder performs a principal pivot transform (PPT) between the target symbol group and the FFT transform result to obtain nk check symbols respectively corresponding to the nk zero symbols in the target symbol group.

2. The method according to claim 1, characterized in that The nk zero symbols are filled before the first message symbol among the k message symbols after arrangement; The encoder determines a target symbol group and an FFT transformation result based on the nk zero symbols and the k message symbols, including: Grouping the arranged nk zero symbols and the k message symbols according to a first length T1 to obtain multiple groups of symbols, taking the first group of symbols as the target symbol group, wherein nk is less than T1, and T1 is a positive integer; Performing transposition Lin Zhonghan Fast Fourier Transform TLCH-FFT on the second group of symbols to the last group of symbols respectively, to obtain a plurality of transformation results corresponding to the second group of symbols to the last group of symbols respectively; The multiple conversion results are summed bit by bit to obtain the FFT transformation result.

3. The method according to claim 2, characterized in that The step of grouping the arranged nk zero symbols and the k message symbols according to a first length T1 comprises: If the number of message symbols included in the last group of symbols after grouping is less than T1, zero symbols are padded into the last group of symbols to make the length of the last group of symbols reach T1.

4. The method according to any one of claims 1 to 3, characterized in that: The length of the target symbol group and the length of the FFT transform result are both a first length T1, wherein T1 is a positive integer, and the 1st to nkth symbols in the target symbol group are zero symbols, the n-k+1th to T1th symbols are message symbols, the 1st to nkth symbols in the FFT transform result are known symbols, and the n-k+1th to T1th symbols are unknown symbols; The encoder performs PPT between the target symbol group and the FFT transformation result to obtain nk check symbols corresponding to the nk zero symbols in the target symbol group, including: The encoder uses the target symbol group as the input signal of the PPT and the FFT transformation result as the output signal of the PPT. Based on the relationship between the input signal of the PPT and the output signal of the PPT, it solves the point values ​​corresponding to the 1st to the nkth symbols in the target symbol group, and uses the point values ​​corresponding to the 1st to the nkth symbols in the target symbol group as the nk check symbols.

5. The method according to any one of claims 1 to 4, characterized in that: The encoder determines that the finite field used for the FFT transform result includes multiple binary extension fields, the multiple binary extension fields are of tower field structure, and the basis of each binary extension field in the multiple binary extension fields is a Cantor basis.

6. The method according to claim 5, characterized in that The encoder stores a multiplication table corresponding to a target binary extension range, wherein the target binary extension range is one of the plurality of binary extension ranges; The method further comprises: When the encoder determines the FFT transform result, when multiplying the first polynomial and the second polynomial, if there is a target polynomial in the first polynomial and the second polynomial that does not belong to the target binary extended domain, the target polynomial is split, and the split target polynomial belongs to the target binary extended domain, and the first polynomial and the second polynomial are two polynomials generated in the process of determining the FFT transform result; Based on the split target polynomial and the multiplication table, a multiplication result corresponding to the first polynomial and the second polynomial is determined.

7. The method according to claim 6, characterized in that If both the first polynomial and the second polynomial are polynomials in the target binary extension field, the multiplication results corresponding to the first polynomial and the second polynomial are searched from the multiplication table.

8. The method according to any one of claims 5 to 7, characterized in that: The method further comprises: When determining the FFT transformation result, the encoder determines the number of bit shift operations when obtaining the rotation factor of the third polynomial, and uses the number of bit shift operations as the rotation factor of the third polynomial, where the third polynomial is a polynomial generated in the process of determining the FFT transformation result.

9. A decoding method, characterized in that: The method comprises: The decoder obtains a codeword, wherein the codeword includes n positions, each position of the n positions corresponds to a symbol, k positions of the n positions correspond to k message symbols respectively, and there is a message symbol missing in at least one position of the k positions, and n and k are both positive integers, and n is greater than k; The decoder groups the codewords according to a second length T2 to obtain a plurality of sub-codewords, where T2 is a positive integer; The decoder performs inverse fast Fourier transform IFFT on the multiple sub-code words in parallel to obtain multiple vectors corresponding to the multiple sub-code words respectively; The decoder determines at least one message symbol missing from the codeword based on the plurality of vectors and an error locator polynomial.

10. The method according to claim 9, characterized in that The decoder determines at least one message symbol missing from the codeword based on the plurality of vectors and an error locator polynomial, comprising: The decoder sums the multiple vectors bit by bit, and performs polynomial multiplication on the summed vector and the error locator polynomial to obtain a target polynomial; The decoder performs a fast Fourier transform (FFT) on the target polynomial to obtain a transformation result, wherein the transformation result includes a point value of the target polynomial at each erased point in the erased point set; The decoder determines at least one message symbol missing from the codeword based on the transformation result and the error locator polynomial.

11. The method according to claim 10, characterized in that The finite field used by the decoder to determine the transformation result includes a plurality of binary extension fields, the plurality of binary extension fields are of tower field construction, and a basis of each binary extension field in the plurality of binary extension fields is a Cantor basis; The decoder determines, based on the transformation result and the error locator polynomial, at least one message symbol missing from the codeword, including: The decoder determines at least one message symbol missing from the codeword by the following formula: Wherein, q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erasure points, and q [:T2] (ω) is the lower T2 bits of q(ω), and t is the number of shift operations.

12. An encoder, characterized in that: The encoder comprises: An acquisition module, used for acquiring k message symbols, where k is a positive integer; A filling module, used for filling nk zero symbols in the k message symbols, where nk is the total number of encoded check symbols and n is a positive integer; A first determination module is used to determine a target symbol group and a fast Fourier transform (FFT) transformation result based on the nk zero symbols and the k message symbols, wherein the target symbol group includes the nk zero symbols and at least one message symbol among the k message symbols, the FFT transformation result is obtained by other message symbols among the k message symbols except the at least one message symbol, and the length of the target symbol group is the same as the length of the FFT transformation result; The second determination module is used to perform a principal pivot transformation (PPT) between the target symbol group and the FFT transformation result to obtain nk check symbols respectively corresponding to the nk zero symbols in the target symbol group.

13. The encoder according to claim 12, characterized in that The nk zero symbols are filled before the first message symbol among the k message symbols after arrangement; The first determining module is used for: Grouping the arranged nk zero symbols and the k message symbols according to a first length T1 to obtain multiple groups of symbols, taking the first group of symbols as the target symbol group, wherein nk is less than T1, and T1 is a positive integer; Performing transposition Lin Zhonghan Fast Fourier Transform TLCH-FFT on the second group of symbols to the last group of symbols respectively, to obtain a plurality of transformation results corresponding to the second group of symbols to the last group of symbols respectively; The multiple conversion results are summed bit by bit to obtain the FFT transformation result.

14. The encoder according to claim 13, characterized in that The first determining module is used for: If the number of message symbols included in the last group of symbols after grouping is less than T1, zero symbols are padded into the last group of symbols to make the length of the last group of symbols reach T1.

15. The encoder according to any one of claims 12 to 14, characterized in that: The length of the target symbol group and the length of the FFT transform result are both a first length T1, wherein T1 is a positive integer, and the 1st to nkth symbols in the target symbol group are zero symbols, the n-k+1th to T1th symbols are message symbols, the 1st to nkth symbols in the FFT transform result are known symbols, and the n-k+1th to T1th symbols are unknown symbols; The second determining module is used for: The encoder uses the target symbol group as the input signal of the PPT and the FFT transformation result as the output signal of the PPT. Based on the relationship between the input signal of the PPT and the output signal of the PPT, it solves the point values ​​corresponding to the 1st to the nkth symbols in the target symbol group, and uses the point values ​​corresponding to the 1st to the nkth symbols in the target symbol group as the nk check symbols.

16. The encoder according to any one of claims 12 to 15, characterized in that: The encoder determines that the finite field used for the FFT transform result includes multiple binary extension fields, the multiple binary extension fields are of tower field structure, and the basis of each binary extension field in the multiple binary extension fields is a Cantor basis.

17. The encoder according to claim 16, characterized in that The encoder stores a multiplication table corresponding to a target binary extension range, wherein the target binary extension range is one of the plurality of binary extension ranges; The first determining module is further used for: When determining the FFT transformation result, when multiplying the first polynomial and the second polynomial, if there is a target polynomial in the first polynomial and the second polynomial that does not belong to the target binary extended domain, the target polynomial is split, and the split target polynomial belongs to the target binary extended domain, and the first polynomial and the second polynomial are two polynomials generated in the process of determining the FFT transformation result; Based on the split target polynomial and the multiplication table, a multiplication result corresponding to the first polynomial and the second polynomial is determined.

18. The encoder according to claim 17, characterized in that The first determining module is further used for: If both the first polynomial and the second polynomial are polynomials in the target binary extension field, the multiplication results corresponding to the first polynomial and the second polynomial are searched from the multiplication table.

19. The encoder according to any one of claims 16 to 18, characterized in that: The first determining module is further used for: When determining the FFT transformation result, when obtaining the rotation factor of the third polynomial, determine the number of bit shift operations, and use the number of bit shift operations as the rotation factor of the third polynomial, where the third polynomial is a polynomial generated in the process of determining the FFT transformation result.

20. A decoder, characterized in that: The decoder comprises: An acquisition module is used to acquire a codeword, wherein the codeword includes n positions, each of the n positions corresponds to a symbol, and the n positions The k positions in the set correspond to k message symbols respectively, and there is a message symbol missing in at least one position among the k positions, and both n and k are positive integers, and n is greater than k; A grouping module, used for grouping the codeword according to a second length T2 to obtain a plurality of sub-codewords, wherein T2 is a positive integer; A transformation module, configured to perform inverse fast Fourier transform (IFFT) on the multiple sub-code words in parallel to obtain multiple vectors corresponding to the multiple sub-code words respectively; A determination module is configured to determine at least one message symbol missing from the codeword based on the multiple vectors and an error locator polynomial.

21. The decoder according to claim 20, characterized in that The determination module is used for: Summing the multiple vectors bit by bit, and performing polynomial multiplication on the summed vector and the error locator polynomial to obtain a target polynomial; Performing a fast Fourier transform (FFT) on the target polynomial to obtain a transformation result, wherein the transformation result includes a point value of the target polynomial at each erased point in the erased point set; At least one message symbol missing from the codeword is determined based on the transformation result and the error locator polynomial.

22. The decoder according to claim 21, characterized in that The finite field used by the decoder to determine the transformation result includes a plurality of binary extension fields, the plurality of binary extension fields are of tower field construction, and a basis of each binary extension field in the plurality of binary extension fields is a Cantor basis; The determination module is used for: The at least one message symbol missing from the codeword is determined by the following formula: Wherein, q(ω) is the transformation result, Π(ω) indicates the evaluation of the error location polynomial at the point ω, E is the set of erasure points, and q [:T2] (ω) is the lower T2 bits of q(ω), and t is the number of shift operations.

23. An encoder, characterized in that: The encoder includes a memory and a processor; The memory is used to store a program that supports the device to execute the method described in any one of claims 1 to 8, and to store data involved in implementing the method described in any one of claims 1 to 8; The processor is configured to execute the program stored in the memory.

24. A decoder, characterized in that: The decoder includes a memory and a processor; The memory is used to store a program that supports the device to execute the method described in any one of claims 9 to 11, and to store data involved in implementing the method described in any one of claims 9 to 11; The processor is configured to execute the program stored in the memory.

25. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, which, when executed on a computer, enable the computer to execute the method described in any one of claims 1 to 8, or to execute the method described in any one of claims 9 to 11.

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