Display panel and manufacturing method therefor, and display device

Abstract

The embodiments of the present disclosure belong to the technical field of display. Provided are a display panel and a manufacturing method therefor, and a display device. The display panel comprises: a base substrate, a light-emitting functional layer, an electrostatic protection structure and a plurality of inner isolation structures. The base substrate is provided with a display region, a first isolation region and an opening region. The light-emitting functional layer is located on a first surface of the base substrate, a plurality of light-emitting units are arranged in an array in the display region, and first electrodes of the plurality of light-emitting units are connected. The plurality of inner isolation structures are located on the first surface and within the first isolation region, and comprise at least one first isolation structure, the first isolation structure comprising a first isolation ring, which is located on the same layer as the first electrodes and is insulated therefrom. The electrostatic protection structure is located in the first isolation region and located on a side of the plurality of inner isolation structures that is close to the base substrate. The embodiments of the present disclosure can ameliorate a poor display due to the breakdown of the first isolation ring by charge accumulation.

Description

Display panel, manufacturing method thereof, and display device

[0001] This application claims priority to Chinese patent application No. 202310954364.2 filed on July 31, 2023, entitled “Display panel, manufacturing method thereof, and display device”, the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0002] The embodiments of the present disclosure relate to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a display device. Background Art

[0003] Display devices are widely used in people's daily lives, such as mobile phones, monitors, tablet computers, etc. Display panels are an important component of display devices.

[0004] In related art, a display panel includes a base substrate, a light-emitting functional layer, and multiple internal isolation structures. The base substrate has a display area, a first isolation area, and an aperture area. The display area surrounds the aperture area, and the first isolation area is located between the aperture area and the display area. The light-emitting functional layer is located in the display area and on the first surface of the base substrate. The light-emitting functional layer has multiple connected first electrodes. Multiple isolation structures are located in the first isolation area and on the first surface of the base substrate. At least one isolation structure includes a first isolation ring, which is insulated from and co-layered with the first electrode.

[0005] However, the first isolation ring is prone to breakdown due to charge accumulation, thereby causing display defects.

[0006] Summary of the Invention

[0007] The present disclosure provides a display panel, a manufacturing method thereof, and a display device, which can improve display defects caused by breakdown due to charge accumulation at a first isolation ring.

[0008] On the one hand, a display panel is provided, comprising a base substrate, a light-emitting functional layer, an electrostatic protection structure and a plurality of inner isolation structures; the base substrate has a display area, a first isolation area and an opening area, the display area surrounds the opening area, and the first isolation area is located between the opening area and the display area; the light-emitting functional layer is located on the first surface of the base substrate, and the light-emitting functional layer comprises a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the first electrodes of the plurality of light-emitting units are connected; the plurality of inner isolation structures are located in the first isolation area and on the first surface, the plurality of inner isolation structures are all annular and surround the opening area, the plurality of inner isolation structures include at least one first isolation structure, the first isolation structure includes a first isolation ring, the first isolation ring is in the same layer as the first electrode and is insulated; the electrostatic protection structure is located in the first isolation area and on the side of the plurality of inner isolation structures close to the base substrate.

[0009] Optionally, the electrostatic protection structure is an electrostatic shielding structure; and the orthographic projection of the first isolation structure on the first surface is located within the orthographic projection of the electrostatic shielding structure on the first surface.

[0010] Optionally, the electrostatic shielding structure includes an electrostatic shielding layer, or the electrostatic shielding structure includes multiple electrostatic shielding layers stacked in a direction perpendicular to the first surface; the electrostatic shielding layer includes an electrostatic shielding ring; or, the electrostatic shielding layer includes multiple electrostatic shielding rings, and the multiple electrostatic shielding rings are concentric rings and their orthographic projections on the first surface do not overlap with each other.

[0011] Optionally, the electrostatic protection structure is an electrostatic release structure, and the first isolation ring is electrically connected to the electrostatic release structure.

[0012] Optionally, the electrostatic release structure includes one electrostatic release layer or the electrostatic release structure includes multiple electrostatic release layers, and the multiple electrostatic release layers are stacked and interconnected in a direction perpendicular to the first surface; each electrostatic release layer is electrically connected to the voltage signal source.

[0013] Optionally, the display panel further includes a driving circuit layer, and the driving circuit layer is located between the light-emitting functional layer and the base substrate; the electrostatic protection structure is on the same layer as at least one non-insulating layer of the driving circuit layer.

[0014] Optionally, the driving circuit layer includes a plurality of thin film transistors; the plurality of thin film transistors include low-temperature polysilicon thin film transistors and metal oxide thin film transistors, and the non-insulating layer includes at least one of the following: a light-shielding layer, a first gate layer, a second gate layer and a third gate layer; or, the plurality of thin film transistors include low-temperature polysilicon thin film transistors, and the non-insulating layer includes at least one of the following: a first gate layer and a second gate layer.

[0015] Optionally, the first isolation structure also includes a first isolation column and a first insulating structure; the first isolation column has a top surface away from the substrate, a bottom surface close to the substrate, and a first side wall connecting the top surface and the bottom surface, and the first side wall faces the opening area; the first insulating structure includes a first insulating part and a second insulating part connected, the first insulating part is located on the top surface, and the second insulating part is located on the first side wall; the first isolation ring includes a first conductive part and a second conductive part connected in sequence, the first conductive part is located on the surface of the first insulating part away from the substrate, and the second conductive part is located on the surface of the second insulating part facing the opening area.

[0016] Optionally, the first isolation structure also includes a first isolation column and a first insulating structure; the first isolation column has a top surface away from the substrate, a bottom surface close to the substrate, and a first side wall connected between the top surface and the bottom surface, and the first side wall faces the opening area; the first insulating structure includes a first insulating part and a second insulating part connected, the first insulating part is located on the top surface, and the second insulating part is located on the first side wall; the first isolation ring includes a first conductive part and a second conductive part connected in sequence, the first conductive part is located on the surface of the first insulating part away from the substrate, the second conductive part is located on the surface of the second insulating part facing the opening area, and the second conductive part is electrically connected to the electrostatic release structure.

[0017] Optionally, the display panel further includes an isolation dam, which is located between the first isolation area and the opening area, and the isolation dam is located on the first surface; the inner isolation structure closest to the opening area among the multiple inner isolation structures is an edge isolation structure; the edge isolation structure includes an edge isolation column, an edge insulation structure and an edge isolation ring, the edge isolation column has a top surface away from the base substrate, a bottom surface close to the base substrate and a first side wall connecting the top surface and the bottom surface, the first side wall faces the opening area, the edge insulation structure includes a first edge insulation portion and a second edge insulation portion connected to each other, the first edge insulation portion is located on the top surface, the second edge insulation portion is located on the first sidewall, and the second edge insulation portion is connected to the insulation block located on the side of the isolation dam close to the base substrate; the first edge isolation ring includes a first edge conductive portion and a second edge conductive portion connected in sequence, the first edge conductive portion is located on the surface of the first edge insulation portion away from the base substrate, the second edge conductive portion is located on the surface of the second edge insulation portion facing the opening area, and the side of the second edge conductive portion away from the first edge conductive portion is connected to the electrode block located on the side of the isolation dam away from the base substrate.

[0018] Optionally, the base substrate also has a second isolation region, which is located between the first isolation region and the opening region. The display panel also includes multiple external isolation structures, which are located in the second isolation region and on the first surface; the multiple external isolation structures include at least one second isolation structure, and the second isolation structure has the same structure as the first isolation structure.

[0019] Optionally, the base substrate also has a second isolation area, which is located between the first isolation area and the opening area. The display panel also includes a plurality of external isolation structures, which are located in the second isolation area and on the first surface; at least part of the plurality of external isolation structures has an orthographic projection on the first surface that is located within the orthographic projection of the electrostatic protection structure on the first surface.

[0020] Optionally, the plurality of outer isolation structures further include a fourth isolation structure, and a height of the fourth isolation structure is higher than heights of other outer isolation columns except the fourth isolation structure.

[0021] On the other hand, a method for manufacturing a display panel is provided, the method comprising: providing a base substrate, the base substrate having a display area, a first isolation area and an opening area, the display area surrounding the opening area, and the first isolation area being located between the opening area and the display area; forming a light-emitting functional layer, an electrostatic protection structure and a plurality of internal isolation structures on the first surface of the base substrate; wherein the light-emitting functional layer comprises a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the first electrodes of the plurality of light-emitting units are connected, the plurality of internal isolation structures are located in the first isolation area, the plurality of isolation structures are all annular and surround the opening area, the plurality of internal isolation structures include at least one first isolation structure, the first isolation structure includes a first isolation ring, the first isolation ring is in the same layer as the first electrode and is insulated, the electrostatic protection structure is located in the first isolation area, and is located on the side of the plurality of internal isolation structures close to the base substrate.

[0022] On the other hand, a display device is provided, comprising a power supply circuit and any one of the aforementioned display panels, wherein the power supply circuit supplies power to the display panel.

[0023] The beneficial effects brought about by the technical solution provided by the present disclosure include at least: by setting an electrostatic protection structure between the substrate and the first isolation structure, the accumulation of charge at the first isolation ring of the first isolation structure can be suppressed, thereby preventing the first isolation ring from being broken down due to excessive accumulated charge, and avoiding poor display caused by breakdown. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0025] FIG1 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure;

[0026] FIG2 is a schematic diagram of the cross-sectional structure of the display device along line AA in FIG1 ;

[0027] FIG3 is an enlarged structural diagram of part B in FIG1 ;

[0028] FIG4 is a schematic diagram of a cross-sectional structure of a display panel provided by an embodiment of the present disclosure along line CC in FIG3 ;

[0029] FIG5 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure;

[0030] FIG6 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure;

[0031] FIG7 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;

[0032] FIG8 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure;

[0033] FIG9 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;

[0034] FIG10 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;

[0035] FIG11 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;

[0036] FIG12 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present disclosure.

[0037] Legend: 100, display panel 200, housing 300, cover plate 400, circuit board 500, electronic device 103, light-emitting side 104, non-light-emitting side G1-G4, first isolation structure to fourth isolation structure G1*, edge isolation structure 1, display area 2, first isolation area 3, opening area 4, second isolation area 5, isolation dam 6, first isolation column 6*, edge isolation column 7, second isolation column 8, third isolation column 9a, fourth isolation column 9b, fifth isolation column 10, driving circuit layer 11, electrostatic protection structure 111, electrostatic shielding structure 1 111, electrostatic shielding layer 1111a, electrostatic shielding ring 112, electrostatic release structure 1121, electrostatic release layer 12, passivation layer 121, first insulating structure 121*, edge insulating structure 122, second insulating structure 123, third insulating structure 124, fourth insulating structure 1211, first insulating portion 1212, second insulating portion 1211*, first edge insulating portion 1212*, second edge insulating portion 1221, third insulating portion 1222, fourth insulating portion 13, light shielding layer 14, first gate Polar layer 15, second gate layer 16, third gate layer 17, substrate D, first surface 18, buffer layer 19, first active layer 20, light-emitting functional layer 21, first electrode 211, first isolation ring 211*, edge isolation ring 212, second isolation ring 213, first bottom isolation ring 215*, edge bottom isolation ring 216, third isolation ring 217, fourth isolation ring 22, pixel definition layer 23, light-emitting layer 2111, first conductive portion 2112, second conductive portion 2111*, first edge conductive portion 21 12*, second edge conductive portion 2121, third conductive portion 2122, fourth conductive portion 30, first gate insulating layer 31, first insulating layer 32, second gate insulating layer 33, third gate insulating layer 34, interlayer dielectric layer 35, first source and drain electrode layer 36, first planarization layer 37, second source and drain electrode layer 38, second planarization layer 39, second active layer 40, first inorganic encapsulation layer 41, first organic encapsulation layer 42, second inorganic encapsulation layer 43, touch insulating layer 44, touch organic protection layer 45, second organic encapsulation layer DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.

[0039] The terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be the ordinary meanings understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second", "third" and similar words used in the patent application specification and claims of this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one" or "a" do not indicate a quantitative limitation, but rather indicate the presence of at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before "include" or "comprise" cover the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. The directional terms mentioned in the present disclosure, such as "top", "bottom", "up", "down", "left" or "right", etc., are only used to refer to the directions of the drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the embodiments of the present disclosure, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present disclosure.

[0040] An embodiment of the present disclosure provides a display device, which can be any product or component with a display function, such as a laptop computer, a mobile phone, a tablet computer, a television, a monitor, a wearable device, a digital photo frame, a navigator, or the like.

[0041] Figure 1 is a schematic diagram of the structure of a display device provided by an embodiment of the present disclosure. As shown in Figure 1, the display device includes a display panel 100 and a power supply circuit (not shown) that supplies power to the display panel 100. The display panel 100 has a display area 1 and at least one aperture area 3.

[0042] Figure 2 is a schematic cross-sectional view of the display device along line AA in Figure 1. As shown in Figures 1 and 2, the display panel 100 includes a light-emitting side 103 and a non-light-emitting side 104 disposed opposite each other. The display device may also include a housing 200, a cover plate 300, a circuit board 400, and electronic components 500.

[0043] The electronic device 500 is located in the opening area 3. The electronic device 500 can be a camera module, a fingerprint module or other modules that need to receive external light.

[0044] As shown in FIG. 2 , the longitudinal section of the housing 200 may be, for example, U-shaped. The display panel 100 and the circuit board 400 are disposed in the housing 200 , and the cover plate 300 is disposed at the opening of the housing 200 .

[0045] There are many types of display panels 100 , which can be selected according to actual needs.

[0046] Exemplarily, the display panel 100 may be an OLED (Organic Light Emitting Diode) display panel, a QLED (Quantum Dot Light Emitting Diode) display panel, etc., which is not specifically limited in the embodiments of the present disclosure.

[0047] The following description will be made by taking the display panel 100 as an OLED display panel as an example.

[0048] FIG3 is an enlarged structural diagram of portion B in FIG1 . FIG4 is a schematic cross-sectional structural diagram of a display panel provided by an embodiment of the present disclosure along line CC in FIG3 . As shown in FIG3 and FIG4 , the display panel 100 includes a base substrate 17, a light-emitting functional layer 20, an electrostatic protection structure 11, and a plurality of internal isolation structures. The base substrate has a display area 1, a first isolation area 2, and an opening area 3. The display area 1 surrounds the opening area 3, and the first isolation area 2 is located between the opening area 3 and the display area 1. Here, the display area 1 and the opening area 3 of the base substrate 17 correspond to the display area 1 and the opening area 3 of the display panel 100 in FIG1 , respectively.

[0049] In the embodiment of the present disclosure, as shown in FIG4 , the light-emitting functional layer 20 is located on the first surface D of the base substrate 17, and the light-emitting functional layer 20 includes a plurality of light-emitting units, and the plurality of light-emitting units are arranged in an array in the display area 1, and the first electrodes 21 of the plurality of light-emitting units are connected. A plurality of inner isolation structures are located in the first isolation area 2 and on the first surface D. Each inner isolation structure is annular and surrounds the opening area 3. The plurality of inner isolation structures include at least one first isolation structure G1, and the first isolation structure G1 includes a first isolation ring 211. The first isolation ring 211 is in the same layer as the first electrode 21 and is insulated. The electrostatic protection structure 11 is located in the first isolation area 2 and on the side of the plurality of isolation structures close to the base substrate 17. The electrostatic protection structure 11 is used to prevent the first isolation ring 211 from accumulating charge.

[0050] In the embodiments of the present disclosure, the term "same layer" means formed by the same patterning process, or in contact with the same surface of the same film layer, or located on the same side of the same film layer, etc. The term "different layers" means formed by different patterning processes, or in contact with the surfaces of different film layers, or located on different sides of the same film layer, etc.

[0051] In the first isolation area 2, if there is no electrostatic protection structure 11, during the process (such as film application, film tearing, etc.), the first isolation ring 211 near the opening area 3 is prone to charge accumulation, resulting in breakdown at the first isolation ring 211. Here, "breakdown at the first isolation ring 211" refers to the insulation layer (such as the light-emitting layer 23 below) between the first isolation ring 211 and the conductor (such as the first isolation column 6 below) being broken down. The heat energy released at the moment of breakdown may cause the packaging film layer to rupture and be damaged due to the sudden change of thermal expansion and contraction, thereby causing packaging failure. External water and oxygen invade the light-emitting layer in the light-emitting functional layer along the gaps in the packaging film layer, causing the light-emitting layer to emit abnormal light, thereby causing poor display. The poor display may be manifested as uneven display or even black spots. The provision of the electrostatic protection structure 11 can prevent the first isolation ring 211 from accumulating too much charge and causing electrostatic breakdown, thereby avoiding poor display caused by breakdown.

[0052] In the embodiment of the present disclosure, as shown in FIG4 , the electrostatic protection structure 11 is an electrostatic shielding structure 111. The orthographic projection of the first isolation structure G1 on the first surface D is located within the orthographic projection of the electrostatic shielding structure 111 on the first surface D. That is, the electrostatic shielding layer 1111 covers the plurality of first isolation structures G1. The provision of the electrostatic shielding structure 111 can provide electrostatic shielding for the first isolation ring 211, preventing breakdown of the first isolation ring 211 due to excessive charge accumulation.

[0053] Optionally, the electrostatic shielding structure 111 includes a single electrostatic shielding layer 1111 , or the electrostatic shielding structure 111 includes multiple electrostatic shielding layers 1111 stacked in a direction perpendicular to the first surface D. The electrostatic shielding layer 1111 includes an electrostatic shielding ring 1111 a .

[0054] In the embodiment shown in Figure 4, the electrostatic shielding structure 111 includes four electrostatic shielding layers 1111, and each electrostatic shielding layer 1111 includes an electrostatic shielding ring 1111a. The electrostatic shielding ring 1111a is a complete ring structure. The electrostatic shielding ring 1111a surrounds the opening area 3. An electrostatic shielding ring 1111a, that is, a whole electrostatic shielding layer, not only covers the first isolation structure G1, but also covers the area between the two adjacent first isolation structures G1. This full coverage design method has a more comprehensive shielding area, better effect in blocking external static interference, and is more beneficial to the uniformity of the upper film layer (such as the interlayer dielectric layer 34, the first source and drain layer 35, the passivation layer 12, etc. mentioned later) of the film layer where the electrostatic shielding structure 111 is located. Here, "above" refers to the side of the electrostatic shielding structure 111 away from the base substrate 17.

[0055] FIG5 is a schematic diagram of the cross-sectional structure of another display panel provided by an embodiment of the present disclosure. The difference from the embodiment shown in FIG4 is that the structure of the electrostatic shielding layer 1111 is different. As shown in FIG5, the electrostatic shielding layer 1111 includes a plurality of electrostatic shielding rings 1111a, and the orthographic projections of the plurality of electrostatic shielding rings 1111a on each layer of the electrostatic shielding layer 1111 on the first surface D do not overlap with each other, that is, the area of ​​the first isolation region 2 having the first isolation structure G1 is segmented and covered. Optionally, the electrostatic shielding layer 1111 may only cover the first isolation structure G1, as shown in FIG5, and not cover the area between the first isolation structures G1. Optionally, the electrostatic shielding layer 1111 may also cover the first isolation structure G1 and partially cover the area between two adjacent first isolation structures G1, that is, the distance between two adjacent electrostatic shielding rings 1111a is less than the distance between the correspondingly covered adjacent two first isolation structures G1. Segmented coverage can achieve targeted protection purposes; and there is no large area of ​​metal (i.e., circular metal with a large diameter). Large area of ​​metal will bring loading to the exposure and etching processes of other metal traces in the vicinity. The process is complex and may cause other metal traces to fail to achieve the expected line width and line spacing, ultimately leading to poor display. The smaller area of ​​metal in segmented coverage can avoid the above problems as much as possible.

[0056] In the disclosed embodiment, as shown in FIG4 , the display panel 100 further includes a drive circuit layer 10, which is located between the light-emitting functional layer 20 and the base substrate 17. An electrostatic protection structure 11 is provided on the same layer as at least one non-insulating layer of the drive circuit layer 10. This configuration of the electrostatic protection structure 11 on the same layer as the existing structure of the display panel 100 reduces process costs.

[0057] Exemplarily, the driving circuit layer 10 includes a plurality of TFTs (Thin Film Transistors).

[0058] In some examples, the plurality of TFTs include low-temperature polysilicon TFTs and metal oxide TFTs. That is, the driving backplane composed of the driving circuit layer 10 and the base substrate 17 is an LTPO (low-temperature polycrystalline oxide) backplane. For an LTPO backplane, the non-insulating layer includes at least one of the following: a light shielding layer 13, a first gate layer 14, a second gate layer 15, and a third gate layer 16.

[0059] The light shielding layer 13 , the first gate layer 14 , the second gate layer 15 and the third gate layer 16 are all film layers on the side of the first isolation structure 6 away from the first electrode layer 21 , and thus can be used to simultaneously manufacture an electrostatic protection structure.

[0060] For example, in the embodiment shown in FIG. 4 , the four electrostatic shielding layers 1111 are respectively placed on the same layers as the light shielding layer 13 , the first gate layer 14 , the second gate layer 15 and the third gate layer 16 .

[0061] For example, as shown in FIG4 , the LTPO backplane includes a base substrate 17, a light shielding layer 13, a buffer layer 18, a first active layer 19, a first gate insulating layer 30, a first gate layer 14, a first insulating layer 31, a second gate layer 15, a second gate insulating layer 32, a second active layer 39, a third gate insulating layer 33, a third gate layer 16, an interlayer dielectric layer 34, a first source-drain electrode layer 35, a passivation layer 12, a first planarization layer 36, a second source-drain electrode layer 37, and a second planarization layer 38, which are stacked in sequence. The light-emitting functional layer 20 includes a second electrode layer (not shown), a pixel definition layer 22, a light-emitting layer 23, and a first electrode layer 21, which are stacked in sequence on the first surface D of the driving backplane 10. Optionally, the first electrode layer 21 is a cathode layer, and the second electrode layer is an anode layer. The display panel 100 includes a driving backplane 10, a light-emitting functional layer 20, and a first inorganic encapsulation layer 40, a first organic encapsulation layer 41, a second inorganic encapsulation layer 42, a touch layer, a touch insulating layer 43, a touch organic protection layer 44, and a second organic encapsulation layer 45, which are stacked in sequence on the side of the light-emitting functional layer 20 away from the first surface D.

[0062] The touch layer can be a self-capacitive touch structure or a mutual-capacitive touch structure, which is not limited in the present disclosure. The touch layer can be set as needed. When the display panel does not require a touch function, the touch layer is not required.

[0063] In the disclosed embodiment, as shown in FIG4 , the first isolation structure G1 further includes a first isolation column 6 and a first insulating structure 121. The first isolation column 6 has a top surface away from the base substrate 17, a bottom surface close to the base substrate 17, and a first sidewall connecting the top and bottom surfaces, with the first sidewall facing the aperture area 3. The first insulating structure 121 includes a first insulating portion 1211 and a second insulating portion 1212 connected to each other. The first insulating portion 1211 is located on the top surface, and the second insulating portion 1212 is located on the first sidewall. The first isolation ring 211 includes a first conductive portion 2111 and a second conductive portion 2112 connected to each other in sequence. The first conductive portion 2111 is located on the surface of the first insulating portion 1211 away from the base substrate 17, and the second conductive portion 2112 is located on the surface of the second insulating portion 1212 facing the aperture area 3. The first isolation column 6 is annular and relatively high, which can prevent water and oxygen from entering the display area 1 from the aperture area 3.

[0064] Optionally, as shown in FIG4 , the first isolation column 6 is in the same layer as the first source and drain layer 35. The first isolation column 6 has a first sublayer, a second sublayer, and a third sublayer stacked in sequence in a direction away from the base substrate 17. In the direction from the opening area 3 to the display area 1, compared with the first sublayer and the third sublayer, both sides of the second sublayer are retracted, so that the cross-section of the first isolation column 6 is in the shape of an "I". This is so that when the film layer on the side of the first isolation column 6 away from the base substrate 17 is produced, such as the passivation layer 12 and the first electrode layer 21, the two sides of the third sublayer in the I-shaped structure that protrude compared to the second sublayer can naturally separate these film layers, thereby saving process costs.

[0065] Optionally, the first source / drain electrode layer 35 and the second source / drain electrode layer 37 include a molybdenum layer, an aluminum layer, and a molybdenum layer stacked in sequence, and accordingly, the first sublayer and the third sublayer are molybdenum layers, and the second sublayer is an aluminum layer. Alternatively, the first source / drain electrode layer 35 and the second source / drain electrode layer 37 include a multilayer metal film including a titanium layer, an aluminum layer, and a titanium layer stacked in sequence, and accordingly, the first sublayer and the third sublayer are titanium layers, and the second sublayer is an aluminum layer.

[0066] Optionally, the first insulating structure 121 is provided on the same layer as the passivation layer 12. Disposing the first insulating structure 121 between the conductive first isolation pillar 6 and the first isolation ring 211 can prevent electrical connection between the first isolation ring 211 and the first isolation pillar 6. Furthermore, for two adjacent first isolation structures G1, this arrangement can prevent overlapping of the two first isolation rings 211 in the two first isolation structures G1, thereby placing the first isolation rings 211 in a floating state, i.e., a state where no power is applied, so that the electrostatic protection structure 11 can be used to protect the first isolation rings 211.

[0067] In the embodiment of the present disclosure, the base substrate 10 can be any transparent substrate, such as a glass substrate, a quartz substrate, a plastic substrate, other transparent hard substrates or other transparent flexible substrates, which can be a single-layer or multi-layer structure. Taking a multi-layer structure as an example, the base substrate 1 includes a first PI (polyimide) layer, a first protective layer, a second PI (polyimide) layer, and a second protective layer stacked from bottom to top. The two protective layers are used to protect the PI layer to prevent damage to the PI layer by subsequent processes. The second protective layer is also covered with a buffer layer, which can block water oxygen and block alkaline ions.

[0068] For example, the light shielding layer 13 can be made of a metal material, including but not limited to molybdenum, aluminum, titanium, copper, etc. The light shielding layer 13 can reduce the amount of light that the thin film transistor (TFT) receives while also being conductive. The light shielding layer 13 can also be referred to as a BSM (bottom shield metal) layer.

[0069] Exemplarily, the first active layer 19 is made of low-temperature polysilicon material, and the second active layer 39 is made of metal oxide semiconductor materials such as IGZO (Indium Gallium Zinc Oxide).

[0070] Exemplarily, the first gate insulating layer 30 , the first insulating layer 31 , the second gate insulating layer 32 , the third gate insulating layer 33 , the interlayer dielectric layer 34 and the touch insulating layer 43 may be made of silicon oxide, silicon nitride, silicon oxynitride or the like.

[0071] Exemplarily, the first gate layer 14 and the second gate layer 15 are made of metal materials, such as one or more of molybdenum, copper, and aluminum.

[0072] Illustratively, the third gate layer 16 includes a stacked first sub-gate layer and a second sub-gate layer. The first sub-gate layer is made of a transparent conductive material, such as ITO (Indium Tin Oxide); the second sub-gate layer is made of a metal material, which may be a single metal layer or a plurality of metal layers stacked in sequence. The metal layer in the second sub-gate layer may be made of titanium, aluminum, or titanium, among others.

[0073] Exemplarily, the passivation layer 12 may be made of a silicon oxide layer, a silicon nitride layer, or a silicon oxide layer.

[0074] Exemplarily, the first planarization layer 36 and the second planarization layer 38 are made of organic insulating materials, such as resin.

[0075] Exemplarily, the material of the pixel definition layer 22 includes one or more of polyimide, polyphthalimide, polyphthalamide, silicon oxide, silicon nitride, and the like.

[0076] Illustratively, the second electrode layer may be made of a metal material, such as gold, or the second electrode layer may be made of a transparent conductive material, such as ITO (Indium tin oxide).

[0077] For example, the light-emitting layer 23 may include a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), an electron injection layer (EIL), a hole blocking layer (HBL), an electron blocking layer (EBL) and a light-emitting material layer.

[0078] Exemplarily, the first electrode layer 21 is made of a metal material such as magnesium-silver alloy; or made of a transparent conductive material such as ITO.

[0079] For example, the first inorganic encapsulation layer 40 and the second inorganic encapsulation layer 42 are made of silicon nitride, silicon oxide, or silicon oxynitride. The first organic encapsulation layer 41 and the second organic encapsulation layer 45 are made of organic insulating materials, such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), and phenolic resin.

[0080] For example, the touch organic protection layer 44 is made of a heat-curable or light-curable organic material such as acrylates, epoxy resins, etc. The touch organic protection layer 44 may also be referred to as a TOC (Touch Organic Coating) layer.

[0081] In the embodiment of the present disclosure, as shown in FIG4 , the base substrate 17 further includes a second isolation region 4, which is located between the first isolation region 2 and the opening region 3. The display panel 100 also includes a plurality of external isolation structures located in the second isolation region 4 and on the first surface D. The plurality of external isolation structures located in the second isolation region 4 include at least one second isolation structure G2, which has the same structure as the first isolation structure G1. The provision of the second isolation region 4 can further prevent water and oxygen from invading the display area, while also facilitating the manufacture of the opening region 3.

[0082] The second isolation structure G2 includes a second isolation ring 212, a second insulating structure 122, and a second isolation pillar 7. The second isolation ring 212 is layered and insulated from the first electrode 21 and the first isolation ring 211. The second isolation pillar 7 has a top surface away from the base substrate 17, a bottom surface close to the base substrate 17, and a second sidewall connected between the top and bottom surfaces, with the second sidewall facing the opening area 3. The second insulating structure 122 includes a third insulating portion 1221 and a fourth insulating portion 1222 connected together. The third insulating portion 1221 is located on the top surface of the second isolation pillar 7, and the fourth insulating portion 1222 is located on the second sidewall. The second isolation ring 212 includes a third conductive portion 2121 and a fourth conductive portion 2122 connected in sequence. The third conductive portion 2121 is located on the surface of the third insulating portion 1221 away from the base substrate 17, and the fourth conductive portion 2122 is located on the surface of the fourth insulating portion 1222 facing the opening area 3.

[0083] In the embodiment of the present disclosure, as shown in FIG4 , the multiple inner isolation structures in the first isolation region 2 further include a third isolation structure G3. The third isolation structure G3 includes a third insulating structure 123, a third isolation pillar 8, and a third isolation ring 216, arranged sequentially from the substrate 17 to the substrate 17. The third isolation ring 216 is in the same layer as and insulated from the first electrode 21 and the first isolation ring 211. The third isolation pillar 8 is in the same layer as the second source and drain layer 37. The third isolation structure G3 also prevents the ingress of water and oxygen.

[0084] It should be noted that, in other embodiments, the first isolation region 2 may not include the third isolation structure G3 , but all inner isolation structures are the first isolation structures 6 .

[0085] In addition, it should be noted that, in other embodiments, the structure of the second isolation structure G2 may also be the same as the structure of the third isolation structure G3.

[0086] In the disclosed embodiment, as shown in FIG4 , the multiple external isolation structures in the second isolation region 4 also include a fourth isolation structure G4. The fourth isolation structure G4 is taller than the other external isolation pillars in the second isolation region 4. The fourth isolation structure G4 is taller than the other external isolation structures, effectively preventing moisture and oxygen from entering the display area. Therefore, the fourth isolation structure G4 is typically positioned in the second isolation region 4 near the opening region 3.

[0087] Illustratively, the fourth isolation structure G4 includes a fourth insulating structure 124, a fourth isolation pillar 9a, a fifth isolation pillar 9b, and a fourth isolation ring 217, arranged sequentially from the base substrate 17 to the base substrate 17. The fourth isolation ring 217 is co-layered with and insulated from the first electrode 21 and the first isolation ring 211. The fourth isolation structure G4 comprises two isolation pillars, making it taller than other external isolation structures and better preventing moisture and oxygen from entering the display area. Optionally, the fourth isolation pillar 9a is co-layered with the first source / drain electrode layer 35, and the fifth isolation pillar 9b is co-layered with the second source / drain electrode layer 37. Optionally, before fabricating the aperture region 3, the area corresponding to the aperture region 3 is a solid structure having multiple annular isolation structures, with the second isolation region 4 connected to the solid structure. The distance between the isolation structure closest to the solid structure in the second isolation region 4 and the isolation structure closest to the second isolation region 4 in the solid structure can be designed to be larger, for example, larger than the distance between two adjacent isolation structures in the second isolation region, to facilitate segmentation between the two isolation structures to form the aperture region 3.

[0088] 4 , the ESD protection structure 11 may also cover the outer isolation pillars in the second isolation region 4. That is, the orthographic projection of the outer isolation pillars on the first surface D is also within the orthographic projection of the ESD protection structure 11 on the first surface D.

[0089] Optionally, the electrostatic protection structure in the second isolation region 4 is integrated with the electrostatic protection structure in the first isolation region 2. For example, in FIG4, each electrostatic shielding ring 1111a covers both the first isolation region 2 and the second isolation region 4.

[0090] Alternatively, the electrostatic protection structure in the second isolation region 4 and the electrostatic protection structure in the first isolation region 2 may also be provided in sections. For example, in FIG5 , each electrostatic shielding layer 1111 includes a plurality of electrostatic shielding rings 1111 a, and each electrostatic shielding ring 1111 a corresponds to one isolation structure.

[0091] Optionally, the display panel 100 further includes an isolation dam 5 , which is located between the first isolation area 2 and the second isolation area 4 , and is located on the first surface D. The isolation dam 5 can further prevent water and oxygen from entering the display area and causing poor display.

[0092] In the embodiment shown in FIG4 , the distance between two adjacent isolation structures in the first isolation region 2 is smaller than the distance between two adjacent isolation structures in the second isolation region 4. The radial dimension of the isolation ring is approximately 500 μm larger than the radial dimension of the isolation pillar. In other possible embodiments, the distance between two adjacent isolation structures in the first isolation region 2 is smaller than the distance between two adjacent isolation structures in the second isolation region 4. For example, the spacing between two adjacent isolation structures in the first isolation region 2 is approximately 7.5 μm, while the spacing between two adjacent isolation structures in the second isolation region 4 is approximately 9.0 μm.

[0093] FIG6 is a schematic diagram of the cross-sectional structure of another display panel provided by an embodiment of the present disclosure. Compared with the embodiment shown in FIG4 , the difference is that the structure of the electrostatic protection structure 11 is different. In the embodiment shown in FIG6 , each electrostatic shielding layer 111 has a plurality of electrostatic shielding rings 1111a, which continuously cover the plurality of first isolation structures G1 located in the first isolation region 2 and discontinuously cover the plurality of isolation structures located in the second isolation region 4. It not only focuses on protecting the first isolation ring 211 in the first isolation region 6 that is easily penetrated, but also protects the second isolation ring 212 in the second isolation region 4 while saving costs as much as possible.

[0094] Figures 7 and 8 are schematic cross-sectional views of another display panel provided by an embodiment of the present disclosure. The display panels in Figures 7 and 8 use an LTPS backplane, that is, in Figures 7 and 8, the multiple TFTs included in the driving circuit layer 10 are low-temperature polysilicon TFTs. For the LTPS backplane, the non-insulating layer includes at least one of the following: a first gate layer 14 and a second gate layer 15. The electrostatic protection structure 11 is in the same layer as at least one non-insulating layer. The first gate layer 14 and the second gate layer 15 are both film layers on the side of the first isolation structure 6 away from the first electrode layer 21, and therefore can be used to simultaneously manufacture the electrostatic protection structure.

[0095] Exemplarily, the LTPS backplane includes a base substrate 17, a first gate layer 14, a buffer layer 18, a first active layer 19, a first gate insulating layer 30, a second gate layer 15, an interlayer dielectric layer 34, a first source and drain layer 35, a passivation layer 12, and a first planarization layer 36 stacked in sequence. The light-emitting functional layer 20 includes a second electrode layer, a pixel definition layer 22, a light-emitting layer 23, and a first electrode layer 21 stacked in sequence on the first surface D of the driving backplane 10. The display panel 100 includes a driving backplane 10, a light-emitting functional layer 20, and a first inorganic encapsulation layer 40, a first organic encapsulation layer 41, a second inorganic encapsulation layer 42, a touch insulating layer 43, a second organic encapsulation layer 44, and a touch layer 45 stacked in sequence on the side of the light-emitting functional layer 20 away from the first surface D.

[0096] Exemplarily, the first active layer 19 is made of polysilicon material.

[0097] Exemplarily, the first gate layer 14 is made of a metal material, such as one or more of molybdenum, copper, and aluminum.

[0098] Optionally, the first gate layer 14 and the second gate layer 15 may also be located on a side of the first active layer away from the base substrate.

[0099] In the embodiments shown in FIG. 7 and FIG. 8 , the materials for making other layers refer to the embodiment shown in FIG. 4 above, and will not be described in detail here.

[0100] In the embodiment shown in Figure 7, the electrostatic protection structure 11 includes two electrostatic shielding layers 111, each electrostatic shielding layer 111 is on the same layer as the first gate layer 14 and the second gate layer 15, and each electrostatic shielding layer 111 includes an electrostatic shielding ring 1111a, which fully covers the multiple isolation structures of the first isolation area 2 and the second isolation area 4.

[0101] In the embodiment shown in Figure 8, the electrostatic protection structure 11 includes two electrostatic shielding layers 111, which are respectively co-layered with the first gate layer 14 and the second gate layer 15, and each electrostatic shielding layer 111 includes multiple electrostatic shielding rings 1111a. The electrostatic shielding layer 111 fully covers the multiple first isolation structures 6 in the first isolation region 2 (i.e., the electrostatic shielding layer 1111 in the first isolation region 2 includes only one electrostatic shielding ring 1111a), and provides segmented coverage for the multiple isolation structures in the second isolation region 4 (i.e., the electrostatic shielding layer 1111 in the second isolation region 4 includes multiple concentrically arranged electrostatic shielding rings 1111a).

[0102] Figure 9 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure. Compared to the embodiment shown in Figure 4 , the embodiment shown in Figure 9 differs in that the electrostatic protection structure 11 is an electrostatic discharge structure 112, and the first isolation ring 211 is electrically connected to the electrostatic discharge structure 112. The electrical connection between the first isolation ring 211 and the electrostatic discharge structure 112 discharges static electricity, thereby preventing breakdown at the first isolation ring 211.

[0103] Exemplarily, the electrostatic release structure 112 includes a single electrostatic release layer 1121, or the electrostatic release structure 112 includes multiple electrostatic release layers 1121, which are stacked and interconnected in a direction perpendicular to the first surface D. The number of electrostatic release layers 1121 can be designed as needed, and excess charge on the first isolation ring 211 can be released to the signal source through the electrostatic release layer 1121. The electrostatic release layer 1121 is a complete ring structure.

[0104] Each electrostatic release layer 1121 is electrically connected to a voltage signal source. For example, the electrostatic release structure 112 can be electrically connected to the voltage signal source through a signal line in the display area.

[0105] Optionally, the voltage signal source is configured to provide a first voltage signal VDD or a second voltage signal VSS, wherein the first voltage signal VDD is greater than the second voltage signal VSS. Optionally, the light-emitting unit includes an anode and a cathode, the first voltage signal VDD is configured to be input to the anode, the second voltage signal VSS is configured to be input to the cathode, and the voltage difference between the first voltage signal and the second voltage signal is configured to drive the light-emitting unit to emit light.

[0106] Illustratively, the orthographic projection of the first isolation structure G1 on the first surface D is located within the orthographic projection of the electrostatic release layer 1121 on the first surface D. The electrostatic release layer 1121 is not only electrically connected to the first isolation ring 211, but also conducts away excess charge on the first isolation ring 211, thereby protecting the first isolation ring 211. The electrostatic release layer 112 also covers the conductive first isolation pillar 6, thereby preventing excessive charge from accumulating on the first isolation pillar 6 and protecting the first isolation pillar 6.

[0107] Exemplarily, as shown in FIG9 , the electrostatic release structure 112 includes four electrostatic release layers 1121 , and the electrostatic release layer 1121 farthest from the first surface D is connected to the other electrostatic release layers 1121 through vias.

[0108] In this embodiment, the orthographic projection of the electrostatic release layer 1121 farthest from the first surface D on the first surface includes the orthographic projections of the other electrostatic release layers 1121 on the first surface D. Furthermore, along the direction from the isolation pillars of the first isolation region 2 to the base substrate 17, of two adjacent electrostatic release layers 1121, the orthographic projection of the electrostatic release layer 1121 farther from the base substrate 17 on the first surface D is within the orthographic projection of the electrostatic release layer 1121 closer to the base substrate 17 on the first surface D. In other words, the electrostatic release layers 1121 in different layers have different areas, facilitating the provision of vias to electrically connect different electrostatic release layers 1121, and the vias on different layers that connect to other layers are staggered.

[0109] In the disclosed embodiment, as shown in FIG9 , the display panel 100 further includes a first bottom isolation ring 213. The first bottom isolation ring 213 is located between two adjacent first isolation structures G1 and is connected to the second conductive portion 2112 of the first isolation structure G1 proximate to the display area 1. At least a portion of the orthographic projection of the first bottom isolation ring 213 on the second surface is located on a side of the orthographic projection of the first isolation ring 211 on the second surface proximate to the base substrate 17, and the second surface is perpendicular to the first surface. The distance between the first bottom isolation ring 213 and the underlying electrostatic release layer 1121 is closer than the distance between the first isolation ring 211 and the underlying electrostatic release layer 1121, thereby facilitating electrical connection between the first isolation ring 211 of the first isolation structure G1 and the electrostatic release structure 112 via the first bottom isolation ring 213.

[0110] In some examples, the touch insulating layer 43 has a plurality of annular grooves that penetrate the touch insulating layer 43 . The first bottom isolation ring 213 is located in the corresponding annular grooves, thereby connecting to the electrostatic release structure 112 .

[0111] Optionally, as shown in FIG. 9 , the second isolation region 4 does not have a structure similar to the first bottom isolation ring 213 .

[0112] 9 , the display panel 100 further includes an isolation dam 5 located between the first isolation region 2 and the second isolation region 4 and located on the first surface. The isolation dam 5 can further prevent water and oxygen from entering the display area and causing poor display.

[0113] Exemplarily, the edge isolation structure G1* is located closest to the opening region 3 among the multiple inner isolation structures located in the first isolation region 2. The edge isolation structure G1* includes an edge isolation column 6*, an edge insulating structure 121*, and an edge isolation ring 211*. The edge isolation column 6* has a top surface away from the base substrate 17, a bottom surface close to the base substrate 17, and a first sidewall connecting the top and bottom surfaces, with the first sidewall facing the opening region 3. The edge insulating structure 121* includes a first edge insulating portion 1211* and a second edge insulating portion 1212* connected to each other. The first edge insulating portion 1211* is located on the top surface, and the second edge insulating portion 1212* is located on the first sidewall. The second edge insulating portion 1212* is connected to an insulating block located on the side of the isolation dam 5 close to the base substrate 17. The edge isolation ring 211* includes a first edge conductive part 2111* and a second edge conductive part 2112* connected in sequence. The first edge conductive part 2111* is located on the surface of the first edge insulating part 1211* away from the substrate 17, and the second edge conductive part 2112* is located on the surface of the second edge insulating part 1212* facing the opening area 3. The side of the second edge conductive part 2112* away from the first edge conductive part 2111* is connected to the electrode block located on the side of the isolation dam 5 away from the substrate 17.

[0114] The display panel 100 also includes an edge bottom isolation ring 215*, which is located on the side of the edge isolation structure near the opening area 3. The edge bottom isolation ring 215* is connected to the second conductive portion 2112* of the edge isolation structure G1* and extends toward the opening area 3*. The orthographic projection of the edge bottom isolation ring 215* on the second surface lies within the orthographic projection of the first edge isolation ring 211* of the edge isolation structure G1* on the second surface. Compared to the first bottom isolation ring 213, the plane of the edge bottom isolation ring 215* can be parallel to the first surface D. In the direction from the opening area 3 toward the display area 1, the size of the edge bottom isolation ring 215* can be smaller than that of the first bottom isolation ring 213. This design of the edge bottom isolation ring 215* can reduce the distance between the edge isolation structure G1* and the isolation dam 5, achieving a narrow bezel effect.

[0115] Compared with the embodiment shown in Figure 9, in the embodiment shown in Figure 10, the electrostatic protection structure 11 includes four layers of electrostatic release layers 112, and the four layers of electrostatic release layers 112 simultaneously cover multiple internal isolation structures in the first isolation area 2 and multiple external isolation structures in the second isolation area 4.

[0116] In the embodiment shown in FIG. 11 , the driving backplane is an LTPS backplane, and the electrostatic protection structure 11 includes two electrostatic release layers 112 .

[0117] Optionally, the display panel 100 may include both the electrostatic shielding layer 111 and the electrostatic release layer 112 . For example, the electrostatic release layer 112 covers the first isolation region 2 , and the electrostatic shielding layer 111 fully covers or partially covers the second isolation region 4 .

[0118] Optionally, the number of electrostatic release layers in the first isolation region 2 and the number of electrostatic shielding layers in the second isolation region 4 may be the same or different.

[0119] The present disclosure also provides a method for manufacturing a display panel. FIG12 is a flow chart of a method for manufacturing a display panel provided by the present disclosure. As shown in FIG12 , the manufacturing method includes:

[0120] In step S1 , a base substrate is provided.

[0121] The base substrate has a display area, a first isolation area and an opening area, the display area surrounds the opening area, and the first isolation area is located between the opening area and the display area.

[0122] In step S2, an electrostatic protection structure, a light-emitting functional layer and a plurality of inner isolation structures are formed on the first surface of the base substrate.

[0123] Among them, the light-emitting functional layer includes multiple light-emitting units, the multiple light-emitting unit arrays are arranged in the display area, and the first electrodes of the multiple light-emitting units are connected, multiple internal isolation structures are located in the first isolation area, the multiple isolation structures are all ring-shaped and surround the opening area, the multiple internal isolation structures include at least one first isolation structure, the first isolation structure includes a first isolation ring, the first isolation ring is in the same layer as the first electrode and is insulated, the electrostatic protection structure is located in the first isolation area, and is located on the side of the multiple internal isolation structures close to the substrate, the electrostatic protection structure is used to prevent the first isolation ring from accumulating charge.

[0124] The following is an exemplary description of step S2 using the structure shown in FIG4 as an example. For example, step S2 may include:

[0125] In the first step, a light-shielding metal layer is deposited on the substrate, and then a photoresist structure is obtained through processes such as photoresist coating, exposure, and development. The light-shielding metal layer is etched using the photoresist structure as a mask to obtain a light-shielding pattern layer. The light-shielding pattern layer includes a light-shielding layer located in the display area and an electrostatic shielding layer located in the first isolation area and the second isolation area.

[0126] The second step is to form a buffer layer on the light-shielding pattern layer, for example, by deposition. Then, the first active layer is formed on the buffer layer. For example, an initial first active layer can be deposited on the buffer layer, and a photoresist structure can be obtained through processes such as photoresist coating, exposure, and development. The initial first active layer is then etched using the photoresist structure as a mask to form the first active layer.

[0127] In the third step, an initial first gate insulating layer and an initial first gate layer are sequentially formed on the first active layer by, for example, deposition. The initial first gate insulating layer covers the first active layer. A photoresist structure is formed on the initial first gate layer by processes such as photoresist coating, exposure, and development. The initial first gate layer is then etched using the photoresist structure as a mask to form a first gate pattern layer. The first gate pattern layer includes a first gate layer located in the first isolation region and an electrostatic shielding layer located in the first isolation region and the second isolation region. Optionally, the portion of the first active layer not covered by the first gate layer is conductorized to ensure good ohmic contact between the first active layer and the subsequently formed first source and drain layer.

[0128] Step 4: An initial first insulating layer and an initial second gate layer are sequentially formed on the first gate pattern layer, for example, by deposition. A photoresist structure is formed on the initial second gate layer through processes such as photoresist coating, exposure, and development. The initial second gate layer is then etched using the photoresist structure as a mask to form a second gate pattern layer. The second gate pattern layer includes the second gate layer located in the first isolation region and an electrostatic shielding layer located in both the first and second isolation regions.

[0129] Step 5: Form an initial second gate insulating layer and an initial second active layer on the second gate pattern layer in sequence, for example, by deposition, and then obtain a photoresist structure through processes such as photoresist coating, exposure, and development. Use the photoresist structure as a mask to etch the initial second active layer to obtain a second active layer.

[0130] Step 6: An initial third gate insulating layer and an initial third gate layer are sequentially formed on the second active layer, for example, by deposition. The initial third gate insulating layer covers the second active layer. A photoresist structure is formed on the initial third gate layer through processes such as photoresist coating, exposure, and development. The initial third gate layer is then etched using the photoresist structure as a mask to form a third gate pattern layer. The third gate pattern layer includes a third gate layer located in the first isolation region and an electrostatic shielding layer located in the first isolation region and the second isolation region. Optionally, the portion of the second active layer not covered by the third gate layer is conductorized to ensure good ohmic contact between the second active layer and the subsequently formed second source and drain layer.

[0131] Step 7: Form an initial interlayer dielectric layer on the third gate layer, for example, by deposition. Through a series of processes including photoresist coating, exposure, etching, and stripping, multiple vias are formed to expose the light shielding layer, and a first gate insulating layer is obtained from the initial first gate insulating layer. Further, through a series of processes including photoresist coating, exposure, etching, and stripping, multiple vias are formed to expose the first active layer, and a first insulating layer is obtained from the initial first insulating layer, and a second gate insulating layer is obtained from the initial second gate insulating layer. Simultaneously, an interlayer dielectric layer is obtained.

[0132] Step 8. In the via holes of the exposed light-shielding layer and the first active layer obtained by etching in the seventh step, a first source-drain pattern layer is formed by a series of processes such as deposition, photoresist coating, exposure, etching, and stripping. The first source-drain pattern layer includes a first source-drain layer located in the display area, a first isolation column located in the first isolation area, and a second isolation column located in the second isolation area.

[0133] Step 9: Form an initial passivation layer and an initial first planarization layer on the first source and drain pattern layer, for example, by deposition. A series of processes, including photoresist coating, exposure, etching, and stripping, form multiple vias exposing the second active layer. Simultaneously, a third gate insulation layer is obtained from the initial third gate insulation layer. A passivation layer in the display area, a first insulation structure in the first isolation area, and a second insulation structure in the second isolation area are obtained from the initial passivation layer. Finally, a first planarization layer is obtained from the initial first planarization layer.

[0134] Step 10. In the via hole exposing the second active layer obtained by etching in the ninth step, a second source-drain pattern layer is formed by a series of processes such as deposition, photoresist coating, exposure, etching, and stripping. The second source-drain pattern layer includes a second source-drain layer located in the display area, and a portion of the isolation structure located in the first isolation area and the second isolation area except the first isolation structure and the second isolation structure.

[0135] Step 11: forming a second planarization layer on the second source and drain pattern layer by, for example, deposition.

[0136] The materials of each layer are as described in the above embodiments and will not be described again here.

[0137] The above are merely optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: It comprises a substrate (17), a light-emitting functional layer (20), an electrostatic protection structure (11) and a plurality of internal isolation structures; The substrate has a display area (1), a first isolation area (2) and an opening area (3), the display area (1) surrounds the opening area (3), and the first isolation area (2) is located between the opening area (3) and the display area (1); The light-emitting functional layer (20) is located on the first surface of the base substrate (17), and the light-emitting functional layer (20) comprises a plurality of light-emitting units, the plurality of light-emitting units are arranged in an array in the display area (1), and the first electrodes (21) of the plurality of light-emitting units are connected; The multiple inner isolation structures are located in the first isolation area (2) and on the first surface, the multiple inner isolation structures are all ring-shaped and surround the opening area (3), the multiple inner isolation structures include at least one first isolation structure, the first isolation structure includes a first isolation ring (211), and the first isolation ring (211) and the first electrode (21) are in the same layer and insulated; The electrostatic protection structure (11) is at least located in the first isolation area (2), and is located on a side of the plurality of inner isolation structures close to the substrate (17).

2. The display panel according to claim 1, characterized in that: The electrostatic protection structure (11) is an electrostatic shielding structure (111); The orthographic projection of the first isolation structure on the first surface is located within the orthographic projection of the electrostatic shielding structure (111) on the first surface.

3. The display panel according to claim 2, characterized in that: The electrostatic shielding structure (111) includes a single electrostatic shielding layer (1111), or the electrostatic shielding structure (111) includes multiple electrostatic shielding layers (1111) stacked in a direction perpendicular to the first surface; The electrostatic shielding layer (1111) includes an electrostatic shielding ring (1111a); or, The electrostatic shielding layer (1111) comprises a plurality of electrostatic shielding rings (1111a), and the plurality of electrostatic shielding rings (1111a) are concentric rings and their orthographic projections on the first surface do not overlap with each other.

4. The display panel according to claim 1, characterized in that: The electrostatic protection structure (11) is an electrostatic release structure (112), and the first isolation ring (211) is electrically connected to the electrostatic release structure (112).

5. The display panel according to claim 4, characterized in that: The electrostatic release structure (112) includes one electrostatic release layer or the electrostatic release structure (112) includes multiple electrostatic release layers (1121), and the multiple electrostatic release layers (1121) are stacked and interconnected along a direction perpendicular to the first surface; Each of the electrostatic release layers (1121) is electrically connected to a voltage signal source.

6. The display panel according to any one of claims 1 to 5, characterized in that: The display panel (100) further comprises a driving circuit layer (10), wherein the driving circuit layer (10) is located between the light-emitting functional layer (20) and the base substrate (17); The electrostatic protection structure (112) is located on the same layer as at least one non-insulating layer of the driving circuit layer (10).

7. The display panel according to claim 6, characterized in that: The driving circuit layer (10) comprises a plurality of thin film transistors; The plurality of thin film transistors include low temperature polysilicon thin film transistors and metal oxide thin film transistors, and the non-insulating layer includes at least one of the following: a light shielding layer (13), a first gate layer (14), a second gate layer (15) and a third gate layer (16); or, The plurality of thin film transistors include low temperature polysilicon thin film transistors, and the non-insulating layer includes at least one of the following: a first gate layer (14) and a second gate layer (15).

8. The display panel according to claim 2, characterized in that: The first isolation structure also includes a first isolation column (6) and a first insulating structure (121); The first isolation column (6) has a top surface away from the base substrate (17), a bottom surface close to the base substrate (17), and a first side wall connecting the top surface and the bottom surface, and the first side wall faces the opening area (3); The first insulating structure (121) comprises a first insulating portion (1211) and a second insulating portion (1212) connected to each other, the first insulating portion (1211) being located on the top surface, and the second insulating portion (1212) being located on the first side wall; The first isolation ring (211) comprises a first conductive portion (2111) and a second conductive portion (2111) connected in sequence. Part (2112), the first conductive part (2111) is located on the surface of the first insulating part (1211) away from the substrate (17), and the second conductive part (2112) is located on the surface of the second insulating part (1212) facing the opening area (3).

9. The display panel according to claim 4, characterized in that: The first isolation structure also includes a first isolation column (6) and a first insulating structure (121); The first isolation column (6) has a top surface away from the base substrate (17), a bottom surface close to the base substrate (17), and a first side wall connected between the top surface and the bottom surface, and the first side wall faces the opening area (3); The first insulating structure (121) comprises a first insulating portion (1211) and a second insulating portion (1212) connected to each other, the first insulating portion (1211) being located on the top surface, and the second insulating portion (1212) being located on the first side wall; The first isolation ring (211) comprises a first conductive part (2111) and a second conductive part (2112) which are connected in sequence, wherein the first conductive part (2111) is located on a surface of the first insulating part (1211) away from the substrate (17), and the second conductive part (2112) is located on a surface of the second insulating part (1212) facing the opening area (3), and the second conductive part (2112) is electrically connected to the electrostatic release structure (112).

10. The display panel according to claim 8 or 9, characterized in that: The display panel (100) further comprises an isolation dam (5), wherein the isolation dam (5) is located between the first isolation area (2) and the opening area (3), and the isolation dam (5) is located on the first surface; The inner isolation structure closest to the opening area (3) among the plurality of inner isolation structures is an edge isolation structure; The edge isolation structure comprises an edge isolation column, an edge insulation structure and an edge isolation ring, the edge isolation column having a top surface away from the substrate (17), a bottom surface close to the substrate (17) and a first side wall connecting the top surface and the bottom surface, the first side wall facing the opening area (3), the edge insulation structure comprising a first edge insulation part and a second edge insulation part connected to each other, the first edge insulation part being located on the top surface, the second edge insulation part being located on the first side wall, and the second edge insulation part being connected to an insulation block located on a side of the isolation dam (5) close to the substrate (17); The edge isolation ring comprises a first edge conductive portion and a second edge conductive portion connected in sequence, The first edge conductive portion is located on a surface of the first edge insulating portion away from the substrate (17), the second edge conductive portion is located on a surface of the second edge insulating portion facing the opening area (3), and a side of the second edge conductive portion away from the first edge conductive portion is connected to an electrode block located on a side of the isolation dam (5) away from the substrate (13).

11. The display panel according to claim 8 or 9, characterized in that: The base substrate (17) further comprises a second isolation region (4), the second isolation region (4) being located between the first isolation region (2) and the opening region (3), and the display panel (100) further comprises a plurality of external isolation structures, the plurality of external isolation structures being located in the second isolation region (4) and on the first surface; The plurality of outer isolation structures include at least one second isolation structure, and the second isolation structure has the same structure as the first isolation structure.

12. The display panel according to any one of claims 1 to 5 and claims 7 to 9, characterized in that: The base substrate (17) further comprises a second isolation region (4), the second isolation region (4) being located between the first isolation region (2) and the opening region (3), and the display panel (100) further comprises a plurality of external isolation structures, the plurality of external isolation structures being located in the second isolation region (4) and on the first surface; The orthographic projections of at least part of the plurality of external isolation structures on the first surface are located within the orthographic projection of the electrostatic protection structure (11) on the first surface.

13. The display panel according to claim 12, characterized in that: The plurality of outer isolation structures further include a fourth isolation structure, the height of the fourth isolation structure being higher than heights of other outer isolation columns except the fourth isolation structure.

14. A method for manufacturing a display panel, characterized in that: The method comprises: Providing a base substrate, the base substrate having a display area, a first isolation area and an opening area, the display area surrounds the opening area, and the first isolation area is located between the opening area and the display area; Forming a light-emitting functional layer, an electrostatic protection structure and a plurality of inner isolation structures on the first surface of the substrate; The light-emitting functional layer includes a plurality of light-emitting units, the plurality of light-emitting units are arranged in an array in the display area, the first electrodes of the plurality of light-emitting units are connected, and the plurality of internal isolation structures are located In the first isolation area, the multiple isolation structures are all ring-shaped and surround the opening area, the multiple inner isolation structures include at least one first isolation structure, the first isolation structure includes a first isolation ring, the first isolation ring is on the same layer as the first electrode and is insulated, and the electrostatic protection structure is located in the first isolation area and is located on the side of the multiple inner isolation structures close to the substrate.

15. A display device, characterized in that: The display device comprises a power supply circuit and a display panel (100) according to any one of claims 1 to 13, wherein the power supply circuit supplies power to the display panel (100).

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