Display device and electronic apparatus

Abstract

[Problem] Variation in high-luminance output and luminance is to be suppressed. [Solution] This display device comprises: first, second, third, fourth, and fifth transistors; and a light-emitting element. The first transistor has: a first end connected to a data line; and a gate connected to a write scanning line. The second transistor has: a first end connected to a first power source line; and a gate connected to a light-emission control line. The third transistor has: a first end connected to a second end of the second transistor; and a gate connected to a second end of the first transistor. The fourth transistor has: a first end connected to a second end of the third transistor; a second end connected to a second power source line; and a gate connected to an initialization control line. The fifth transistor has: a first end connected to the second end of the third transistor; and a gate connected to the light-emission control line. The light-emitting element has: a first end connected to a second end of the fifth transistor; and a second end connected to a third power source line.

Description

Display devices and electronic devices

[0001] The present disclosure relates to a display device and an electronic device.

[0002] Display devices that output images and videos are expected to provide outputs that are easy to see in a variety of situations. One such output is high brightness. High brightness can be achieved by injecting a large current into the light-emitting element. When a small current flows through the light-emitting element, the transistor that operates as the current source in the pixel drive circuit is driven in the subthreshold region, where the gate-source voltage is small. Furthermore, when a signal voltage is written, the current source transistor is cut off due to the substrate bias effect. On the other hand, in order to pass a large current, it is necessary to increase the gate-source voltage when writing the signal voltage.

[0003] However, with this configuration, the current source transistor may not be cut off at the timing when the signal voltage is written, causing the source potential to change, making it impossible to drive with accurate variation correction.As a result, when attempting to output high brightness, using the current drive circuit may not be able to properly correct brightness variations.

[0004] Japanese Patent Application Laid-Open No. 2012-014136

[0005] Therefore, one of the non-limiting problems to be solved by the embodiments of the present disclosure is to provide a display that emits high-brightness light with reduced brightness variation. The problem to be solved by the embodiments of the present disclosure can also be, as some further non-limiting examples, a problem corresponding to the effects described in the embodiments. In other words, a problem corresponding to at least one of the effects described in the description of the embodiments of the present disclosure can be the problem to be solved by the present disclosure.

[0006] According to one embodiment, the display device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a light-emitting element. The first transistor has a first terminal connected to a data line and a gate connected to a write scanning line. The second transistor has a first terminal connected to a first power supply line and a gate connected to a light-emitting control line. The third transistor has a first terminal connected to a second terminal of the second transistor and a gate connected to the second terminal of the first transistor. The fourth transistor has a first terminal connected to the second terminal of the third transistor, a second terminal connected to a second power supply line, and a gate connected to an initialization control line. The fifth transistor has a first terminal connected to the second terminal of the third transistor and a gate connected to the light-emitting control line. The light-emitting element has a first terminal connected to the second terminal of the fifth transistor and a second terminal connected to a third power supply line.

[0007] The second transistor, the third transistor, and the fifth transistor may be p-type metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0008] The light emitting element may be a light emitting diode (LED), in which case the first end of the light emitting element is an anode and the second end of the light emitting element is a cathode.

[0009] The first transistor and the fourth transistor may be p-type MOSFETs.

[0010] The first transistor and the fourth transistor may be n-type MOSFETs.

[0011] The p-type MOSFET may be a MOSFET formed on a semiconductor substrate, and the n-type MOSFET may be a MOSFET formed on a wiring layer.

[0012] At least one of the n-type MOSFETs may be formed of a TFT (Thin Film Transistor).

[0013] The power supply may further include a first capacitor connected between a first end of the third transistor and a gate of the third transistor, and a second capacitor connected between the first power supply line and the first capacitor.

[0014] The third transistor may have a body terminal connected to the same potential as the potential of the first signal line.

[0015] The third transistor may have a threshold voltage that varies depending on a potential difference between a potential at a first terminal and a potential applied to a body terminal.

[0016] A second terminal of the third transistor, a first terminal of the fourth transistor, and a first terminal of the fifth transistor may be connected by a diffusion layer.

[0017] The gate of the second transistor and the gate of the fifth transistor may be connected within the light-emitting pixel.

[0018] The gate of the second transistor and the gate of the fifth transistor may be connected outside the light-emitting pixel.

[0019] According to one embodiment, a display device includes a light-emitting element, a fourth transistor, and a fifth transistor. The fourth transistor is connected in parallel with the light-emitting element and initializes the potential of the anode of the light-emitting element. One end of the fifth transistor is connected to one end of the fourth transistor and the other end is connected to one end of the light-emitting element. A signal based on the light emission intensity is applied to one end of the fourth transistor and one end of the fifth transistor.

[0020] According to one embodiment, an electronic device includes any one of the display devices described above as a display unit.

[0021] 1 is a diagram schematically illustrating a light-emitting unit of a display device according to an embodiment. A circuit diagram illustrating an example of a pixel according to an embodiment. A timing chart of signals supplied to a pixel according to an embodiment. A circuit diagram illustrating an example of a pixel according to an embodiment. A cross-sectional view illustrating an example of a pixel circuit according to an embodiment. A timing chart of signals supplied to a pixel according to an embodiment. A circuit diagram illustrating an example of a pixel according to an embodiment. A timing chart of signals supplied to a pixel according to an embodiment. A plan view illustrating an example of a pixel transistor according to an embodiment. A diagram schematically illustrating a light-emitting unit of a display device according to an embodiment. A cross-sectional view illustrating an example of a pixel circuit according to an embodiment. A front view illustrating an example of the exterior of a digital still camera. A rear view illustrating an example of the exterior of a digital still camera. A perspective view illustrating an example of the exterior of a head-mounted display. A perspective view illustrating an example of the exterior of a television device. An exterior view illustrating an example of a head-mounted display. An exterior view illustrating an example of a smartphone. An exterior view illustrating an example of an image display device in a vehicle. An exterior view illustrating an example of an image display device in a vehicle.

[0022] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. The drawings are used for explanation purposes, and the shape, size, and size ratio of each component in an actual device do not necessarily have to be the same as those shown in the drawings. Furthermore, since the drawings are simplified, components necessary for implementation other than those shown in the drawings are also assumed to be appropriately provided.

[0023] First Embodiment Fig. 1 is a diagram schematically illustrating a light-emitting section of a display device according to one embodiment. Fig. 1 is a simplified diagram illustrating the light-emitting section, which is the display area of ​​the display device 1, and peripheral circuits. The display section of the display device 1 includes, for example, pixels 10, a gate driver 12, and a source driver 14.

[0024] The pixels 10 are arranged in a two-dimensional array in the display section of the display device 1 to form a pixel array, and the pixels 10 corresponding to each position emit light of an appropriate intensity to form an image or video on the display device 1. Although not shown for simplicity, the pixels 10 can emit light corresponding to multiple colors. As a non-limiting example, the light-emitting elements provided in the pixels 10 can emit light in multiple bands and emit light of various colors and intensities in relation to adjacent light-emitting elements.

[0025] The pixel 10 is connected to a light emission control line DS, a write scan line WS, an initialization control line AZ, and a data line SIG.

[0026] The gate driver 12 causes the light emitting element of the pixel 10 to emit light at the appropriate timing by appropriately driving the drive circuit provided in the pixel 10. The gate driver 12 outputs signals to the pixel 10 via the light emission control line DS, the write scanning line WS, and the initialization control line AZ to drive the appropriate circuit elements at the appropriate timing.

[0027] The source driver 14 is a driver that supplies signals indicating the intensity at which each pixel 10 emits light. The source driver 14 outputs signals indicating brightness information to the pixels 10 via data lines SIG. The pixels 10 have light-emitting elements that emit light at appropriate timing in response to signals supplied by the gate driver 12 based on the signals supplied from the source driver 14.

[0028] The data line SIG is a signal line for supplying the intensity at which the light emitting element in each pixel 10 emits light from the source driver 14 .

[0029] The write scan line WS is a signal line that supplies a signal that controls charging of the data supplied via the data line SIG within the pixel 10 at an appropriate timing.

[0030] The light emission control line DS is a signal line that supplies a signal that controls light emission to the pixel 10. At the timing of the signal supplied from the light emission control line DS, a signal for driving the light emitting element is supplied with an intensity that depends on the data line SIG charged by the write scan line WS, and the light emitting element emits light at an appropriate brightness.

[0031] The initialization control line AZ supplies a signal for controlling the setting of the signal stored in the light emitting element to an initial value when the light emitting element is turned off or when the light emitting element is to be turned off.

[0032] The gate driver 12 and the source driver 14 supply appropriate control signals or data signals to the pixels 10 at appropriate timings for the respective signal lines, thereby enabling display based on image signals and video signals.

[0033] FIG. 2 is a schematic diagram illustrating a circuit of a pixel 10 according to an embodiment. The pixel 10 includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a first capacitor C1, a second capacitor C2, and a light-emitting element L. The pixel 10 receives signals for driving the respective transistors from a light-emission control line DS, a write scan line WS, and an initialization control line AZ. The pixel 10 receives data for controlling the intensity of light emitted by the light-emitting element L from a data line SIG. The pixel 10 receives power supply voltages Elvdd and Elvss from a first power supply line ELVDD and a second power supply line ELVSS, respectively. The power supply voltage Elvdd is a positive power supply voltage, and the power supply voltage Elvss is a negative power supply voltage, which may be ground potential. In addition, a power supply voltage Vss is supplied from the third power supply line VSS. This power supply voltage Vss is a negative power supply voltage for causing the light emitting element to emit light, and may be the same value as the power supply voltage Elvss, may be a different value, or may be a ground voltage.

[0034] In the following, terminals other than the gates on the left or upper side of the drawing will be referred to as the first end, and terminals other than the gates on the right or lower side will be referred to as the second end, but these are terminal names given for convenience and do not limit the contents of this disclosure.

[0035] The first transistor T1 is, for example, a p-type MOSFET, with a first terminal (source) connected to the data line SIG, a second terminal (drain) connected to the gate of the third transistor T3, and a gate connected to the write scan line WS. When a signal to turn on the first transistor T1 is supplied from the write scan line WS, the first transistor T1 passes a current based on the signal flowing on the data line SIG to the gate of the third transistor T3.

[0036] The second transistor T2 is, for example, a p-type MOSFET, with a first terminal (source) connected to the first power supply line ELVDD, a second terminal (drain) connected to the first terminal of the third transistor T3, and a gate connected to the light-emitting control line DS. When a signal to turn on the second transistor T2 is supplied from the light-emitting control line DS, the second transistor T2 passes a current based on the power supply voltage Elvdd to the first terminal of the third transistor T3.

[0037] The third transistor T3 is, for example, a p-type MOSFET, and has a first terminal (source) connected to the second terminal of the second transistor T2, a second terminal (drain) connected to the first terminal of the fourth transistor T4 and the first terminal of the fifth transistor T5, and a gate connected to the second terminal of the first transistor T1. When a voltage corresponding to the power supply voltage Elvdd is applied to a first terminal of the third transistor T3 via the second transistor T2, the third transistor T3 passes a current corresponding to the data on the data line SIG applied to its gate via the first transistor T1.

[0038] The fourth transistor T4 is, for example, a p-type MOSFET, and has a first terminal (source) connected to the second terminal of the third transistor T3, a second terminal (drain) connected to the second power supply line ELVSS, and a gate connected to the initialization control line AZ. When a signal to turn on the fourth transistor T4 is supplied from the initialization control line AZ, the fourth transistor T4 initializes the potential between the third transistor T3 and the fifth transistor T5.

[0039] The fifth transistor T5 is, for example, a p-type MOSFET, with a first terminal (source) connected to the second terminal of the third transistor T3, a second terminal (drain) connected to the first terminal of the light-emitting element L, and a gate connected to the light-emitting control line DS. The fifth transistor T5 turns on at the same time as the second transistor T2 turns on, thereby allowing a current based on the data on the data line SIG to flow appropriately to the light-emitting element L. As shown in this figure, the gate of the fifth transistor T5 can be configured to be connected to the gate of the second transistor T2 within the pixel 10.

[0040] The light-emitting element L is, for example, an LED, and has a first terminal (anode) connected to the second terminal of the fifth transistor T5 and a second terminal (cathode) connected to the third power supply line VSS. The light-emitting element L emits light according to the strength of the current input from the first terminal.

[0041] The first capacitor C1 has a first terminal connected to the first terminal of the third transistor T3 (the second terminal of the second transistor T2) and a second terminal connected to the gate of the third transistor T3 (the second terminal of the first transistor T1). The second capacitor C2 has a first terminal connected to the first power supply line ELVDD and a second terminal connected to the first terminal of the first capacitor C1. The first capacitor C1 holds the potential difference between the gate and source of the third transistor T3, and the second capacitor C2 holds the potential difference between the source and drain of the second transistor T2.

[0042] 3 is a timing chart of signals supplied to a pixel 10 in the period of a signal output by a gate driver 12 according to an embodiment. From the top, the diagram shows the drive signals supplied from the write scan line WS, the light emission control line DS, and the initialization control line AZ, and the data signal supplied from the data line SIG for the pixel 10.

[0043] First, a signal to turn on the second transistor T2 and the fifth transistor T5 is supplied from the light-emitting control line DS, a signal to turn on the fourth transistor T4 is supplied from the initialization control line AZ, and a signal to turn on the first transistor T1 is supplied from the write scan line WS at the timing when offset data is applied to the data line SIG. When the first transistor T1 turns on, a voltage for initialization is applied to the gate of the third transistor T3, turning the third transistor T3 on. When the third transistor T3 turns on, the potential of the anode of the light-emitting element L is initialized via the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5.

[0044] A signal that turns on the first transistor T1 is supplied to the write scan line WS for an appropriate period of time, after which the first transistor T1 is turned off. With the first transistor T1 in the off state, the supply from the light-emitting control line DS transitions to a signal that turns off the second transistor T2 and the fifth transistor T5. At this timing, the third transistor T3 and the fourth transistor T4 are turned on, and the first transistor T1, the second transistor T2, and the fifth transistor T5 are turned off. With the third transistor T3 and the fourth transistor T4 turned on, the junction of the first capacitor C1 and the second capacitor C2 is connected to the power supply voltage Elvss, and the first capacitor C1 and the second capacitor C2 self-discharge.

[0045] During this discharge period or after the discharge is completed, a data signal is supplied from the data line SIG. At this timing, the first transistor T1 is off, so the data signal is not transmitted to the third transistor T3.

[0046] After the signal supplied from the initialization control line AZ switches from a signal that turns on the fourth transistor T4 to a signal that turns it off, a signal that turns on the first transistor T1 is supplied from the write scan line WS. At this timing, the data signal applied from the data line SIG is written to the second capacitor C2, forming the gate potential of the third transistor T3. During this period, the fifth transistor T5 is off, preventing discharge through the light-emitting element L, i.e., preventing a drop in the source potential of the third transistor T3.

[0047] In particular, when a data signal Vsig that is very low compared to the offset voltage Vofs is input as a data signal from the data line SIG to the light-emitting element L, if the fifth transistor T5 is not present, the potential difference between the junction node of the first capacitor C1 and the second capacitor C2 and the gate of the third transistor T3 will be high, and when the third transistor T3 is turned on, current will flow to the power supply voltage Vss via the third transistor T3 and the light-emitting element L, lowering the source potential of the third transistor T3 and making it impossible to ensure a potential for emitting light with an appropriate intensity. By providing the fifth transistor T5 and turning it off at this timing, it is possible to prevent the source potential of the third transistor T3 from lowering when writing a data signal in the case of outputting a large current.

[0048] Then, after the writing to the capacitor is completed and the signal supplied from the write scanning line WS switches to a signal that turns off the first transistor T1, a signal that turns on the second transistor T2 and the fifth transistor T5 is supplied from the light-emitting control line DS, allowing a large current based on the potential difference between the gate and source of the third transistor T3 to flow through the light-emitting element L.

[0049] As described above, according to this embodiment, when high-brightness light is emitted, the fifth transistor T5 suppresses the current flowing out of the light-emitting element L, thereby appropriately maintaining the source potential of the third transistor T3 and causing the light-emitting element L to emit light at an appropriate intensity. For example, even in the saturation region of the third transistor T3, it is possible to cause the light-emitting element L to emit light at an appropriate intensity input from the data line SIG, thereby correcting variations. Furthermore, because the signal line connected to the gate of the added fifth transistor T5 can be shared with the signal line connected to the gate of the second transistor T2, the above-mentioned effects can be achieved without adding any peripheral circuitry.

[0050] Briefly, the display device 1 can be configured to include a light-emitting element L, a fourth transistor T4 connected in parallel with the light-emitting element L, and a fifth transistor T5 having one end connected to one end of the fourth transistor T4 and the other end connected to one end of the light-emitting element L.

[0051] Second Embodiment In the first embodiment, all of the transistors that drive the pixel circuits are p-type, but some of the MOSFETs may be n-type. In this embodiment, a non-limiting example configuration including n-type MOSFETs will be described.

[0052] 4 is a circuit diagram showing an example of a pixel according to an embodiment. Unlike the first embodiment, the first transistor T1 and the fourth transistor T4 are configured as n-type MOSFETs.

[0053] Figure 5 is a diagram showing an example of a cross section of a semiconductor substrate on which the circuit of Figure 4 is formed. By configuring the polarities of the transistors as shown in Figure 4, the second transistor T2, the third transistor T3, and the fifth transistor T5 can be formed on a silicon substrate while sharing a well region, and the first transistor T1 and the fourth transistor T4 can be formed on a wiring layer that is not on the substrate. The first transistor T1 and the fourth transistor T4 can also be formed using TFTs, for example.

[0054] That is, by using n-type MOSFETs formed of TFTs as the first transistor T1 and the fourth transistor T4, it is possible to reduce the layout area while retaining the function of maintaining the potential difference between the gate and source of the third transistor T3 by turning off the fifth transistor T5 at the timing of writing data, as in the above-described embodiment.

[0055] 6 is a timing chart of signals supplied to the pixel 10 according to this embodiment. Compared to FIG. 3, the signals controlling the on / off of the first transistor T1 and the fourth transistor T4, which have been changed to n-type MOSFETs, are reversed, but the other signals remain unchanged. This timing chart allows for the same operation as in the first embodiment.

[0056] As described above, it is possible to reduce the layout area while achieving the same effects as the above-described embodiment. In addition, a source-grounded structure can be achieved in which the second terminal (source) of the fourth transistor T4 is grounded, which also provides the effect of increasing contrast.

[0057] Third Embodiment In each of the above-described embodiments, the body terminal of the third transistor T3 may be connected to the first power supply line ELVDD, or the power supply voltage Elvdd may be applied to the body terminal.

[0058] 7 is a circuit diagram showing a non-limiting example of the configuration of a pixel 10 according to this embodiment. As shown in this figure, the body terminal of the third transistor T3 may be connected to the first power supply line ELVDD. By connecting in this manner, the threshold voltage of the third transistor T3 can be controlled by controlling the potential difference between the gate and source of the third transistor T3 through control of the substrate potential.

[0059] By connecting in this manner, the third transistor T3 can change the threshold voltage according to the potential difference between the source potential and the body potential.

[0060] 8 is a timing chart of signals supplied to the pixel 10 according to this embodiment and the source and gate potentials of the third transistor T3. The operation is essentially the same as in the first embodiment, except that the discharge operation increases the threshold voltage of the third transistor T3 due to the substrate bias effect before writing the data signal. This allows the third transistor T3 to be properly cut off.

[0061] As described above, by setting the voltage applied to the body terminal of the third transistor T3 to the power supply voltage Elvdd, it is possible to change the threshold voltage and achieve a more appropriate cutoff.

[0062] Fourth Embodiment In the above-described embodiments, explanations were given using circuit diagrams or cross-sectional views, but in this embodiment, an example of a plan view will be explained.

[0063] 9 is a plan view showing an example of the arrangement of transistors in a pixel 10 according to one embodiment. In each transistor, S represents the source, D represents the drain, and G represents the gate.

[0064] The configuration of the pixel circuit is similar to that shown in Fig. 2. The second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 can share source-drain regions, i.e., these transistors can be appropriately connected in the same diffusion layer.

[0065] In particular, the drain of the third transistor T3 and the sources of the fourth transistor T4 and the fifth transistor T5 can be connected to the same diffusion layer, and the drain of the second transistor T2 and the source of the third transistor T3 can be connected to the same diffusion layer.

[0066] By connecting in this manner, it is possible to omit the wiring that connects the transistors within the pixel 10, and it is possible to realize a finer pixel layout.

[0067] Fifth Embodiment In the above-described embodiments, the gate of the second transistor T2 and the gate of the fifth transistor T5 are connected within the pixel 10, but a different configuration is also possible depending on the circuit layout.

[0068] 10 is a diagram showing an example of a display section (light-emitting section) of the display device 1 according to this embodiment. As shown in this figure, the light-emitting control line DS can be arranged as two light-emitting control lines DS1 and DS2 outside the pixel 10. Note that in the drawing, the light-emitting control lines DS1 and DS2 are connected at both ends of the row, but this is not limiting, and they may be connected at only one end, or may be connected at other locations as well, or may be connected only at other locations.

[0069] Fig. 11 is a circuit diagram showing the inside of pixel 10 in the case of the wiring of Fig. 10. As shown in this figure, it is also possible to configure the light-emitting control line DS1 to be connected to the gate of the second transistor T2, and the light-emitting control line DS2 to be connected to the gate of the fifth transistor T5.

[0070] In this way, it is possible to achieve the same effect while adopting a different wiring configuration, which makes it possible to reduce wiring resources within the pixel 10.

[0071] Hereinafter, some non-limiting examples of display devices for images, videos, etc., including light-emitting elements controlled according to this embodiment will be described. These display devices can be mounted in various electronic devices.

[0072] 12A and 12B show an example of the appearance of a digital still camera 310. This digital still camera 310 is an interchangeable lens single-lens reflex type, and has an interchangeable taking lens unit (interchangeable lens) 312 located approximately in the center of the front of a camera main body 311, and a grip part 313 on the left side of the front for the photographer to hold.

[0073] A monitor 314 is provided at a position shifted to the left from the center on the back of the camera body 311. An electronic viewfinder (eyepiece window) 315 is provided above the monitor 314. By looking through the electronic viewfinder 316, the photographer can visually confirm the optical image of the subject guided by the photographing lens unit 312 and determine the composition. The display device 2 according to any of the above-described embodiments and their modifications can be used as the electronic viewfinder 315.

[0074] 13 shows an example of the appearance of a head-mounted display 320. The head-mounted display 320 has, for example, ear hooks 322 on both sides of a glasses-type display unit 321 for wearing on the user's head. The display unit 321 can be the display device 2 according to any of the above-described embodiments and modifications thereof.

[0075] The head-mounted display 320 may employ a birdbath type display.

[0076] 14 shows an example of the appearance of a television device 330. This television device 330 has, for example, an image display screen unit 331 including a front panel 332 and a filter glass 333, and this image display screen unit 331 is configured by the display device 2 according to any one of the above-described embodiments and modifications thereof.

[0077] Specific Example 4 FIG. 15 is an external view showing another example of a head-mounted display according to a specific example of an electronic device of the present disclosure.

[0078] The head mounted display 340 is configured as a see-through head mounted display having a main body 341, an arm 342, and a lens barrel 343. The main body 341 is connected to the arm 342 and glasses 344. Specifically, an end of the long side of the main body 341 is attached to the arm 342. One side of the main body 341 is attached to the glasses 344 via a connecting member (not shown). The main body 341 may also be worn directly on the head of the human body.

[0079] The main body 341 incorporates a control board and a display unit for controlling the operation of the head-mounted display 340. The arm 342 supports the lens barrel 343 relative to the main body 341 by connecting the main body 341 and the lens barrel 343. Specifically, the arm 342 is coupled to an end of the main body 341 and an end of the lens barrel 343, thereby fixing the lens barrel 343 to the main body 341. The arm 342 also incorporates a signal line for communicating data related to images provided from the main body 341 to the lens barrel 343.

[0080] The lens barrel 343 projects image light provided from the main body 341 via the arm 342 through the lenses 345 of the glasses 344 toward the eyes of the user wearing the head-mounted display 340 .

[0081] Specific Example 5 FIG. 16 shows an example of the appearance of a smartphone according to a specific example of an electronic device of the present disclosure. The display device 2 according to the present disclosure can be applied to a display unit included in an electronic device such as a smartphone. Specifically, as shown in FIG. 13, a smartphone 350 has a display unit 351 that displays various information, an operation unit including buttons that accept operation inputs from a user, and the like. The display unit 351 can be the display device 2 according to this embodiment.

[0082] Specific Example 6: FIGS. 17A and 17B show an example in which the display device of the present disclosure is applied to a vehicle. The display device 2 and electronic device according to the present disclosure can be used for a variety of purposes. FIGS. 14A and 14B are diagrams showing the internal configuration of a vehicle 360, which is an application example of an electronic device equipped with the display device 2 according to the present disclosure. FIG. 14A is a diagram showing the interior of the vehicle 360 ​​from the rear to the front, and FIG. 14B is a diagram showing the interior of the vehicle 360 ​​from diagonally rear to diagonally forward.

[0083] The vehicle 360 ​​of FIGS. 17A and 17B has a center display 361, a console display 362, a head-up display 363, a digital rearview mirror 364, a steering wheel display 365, and a rear entertainment display 366.

[0084] The center display 361 is disposed on the dashboard 367 in a position facing the driver's seat 368 and the passenger's seat 369. FIG. 17 shows an example of a horizontally elongated center display 361 extending from the driver's seat 368 side to the passenger's seat 369 side, but the screen size and location of the center display 361 are arbitrary. The center display 361 can display information detected by various sensors. As a specific example, the center display 361 can display an image captured by an image sensor, a distance image to obstacles in front of or on the side of the vehicle measured by a ToF sensor, and the body temperature of a passenger detected by an infrared sensor. The center display 361 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information.

[0085] The safety-related information includes information such as detection of drowsiness, distraction, child mischief, whether a seatbelt is being worn, and whether a passenger has been abandoned. For example, this information is detected by a sensor placed on the back side of the center display 361. The operation-related information is obtained by detecting gestures related to passenger operations using a sensor. The detected gestures may include operations of various equipment within the vehicle 360. For example, operations of the air conditioning system, navigation system, AV system, lighting system, etc. are detected. The life log includes life logs of all passengers, for example, a record of each passenger's behavior while on board. By acquiring and saving the life log, the condition of the passenger at the time of the accident can be confirmed. The health-related information is obtained by detecting the passenger's body temperature using a temperature sensor and inferring the passenger's health condition based on the detected body temperature. Alternatively, an image sensor may be used to capture an image of the passenger's face and infer the passenger's health condition from the facial expression in the image. Furthermore, the system may conduct an automated voice conversation with the occupant and estimate the occupant's health condition based on the occupant's responses. The authentication / identification-related information includes a keyless entry function that uses a sensor to perform facial recognition, and a function that automatically adjusts seat height and position using facial recognition. The entertainment-related information includes a function that uses a sensor to detect operation information of an AV device by the occupant, and a function that recognizes the occupant's face using a sensor and provides content appropriate for the occupant via the AV device.

[0086] Console display 362 can be used to display, for example, life log information. Console display 362 is disposed near a shift lever 371 on a center console 370 between a driver's seat 368 and a passenger seat 369. Information detected by various sensors can also be displayed on console display 362. Furthermore, console display 362 may display an image of the vehicle's surroundings captured by an image sensor, or an image showing the distance to an obstacle around the vehicle.

[0087] The head-up display 363 is virtually displayed behind a windshield 372 in front of the driver's seat 368. The head-up display 363 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. Because the head-up display 363 is often virtually located in front of the driver's seat 368, it is suitable for displaying information directly related to the operation of the vehicle 360, such as the speed of the vehicle 360 ​​and the remaining fuel (battery) level.

[0088] The digital rearview mirror 364 can not only display the rear of the vehicle 360, but also the status of passengers in the rear seats. Therefore, by placing a sensor on the back side of the digital rearview mirror 364, it can be used to display life log information, for example.

[0089] The steering wheel display 365 is disposed near the center of the steering wheel 373 of the vehicle 360. The steering wheel display 365 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, because the steering wheel display 365 is located near the driver's hands, it is suitable for displaying life log information such as the driver's body temperature, and for displaying information related to the operation of AV equipment, air conditioning equipment, etc.

[0090] The rear entertainment display 366 is attached to the back of the driver's seat 368 and the passenger seat 369, and is intended for viewing by rear seat passengers. The rear entertainment display 366 can be used to display, for example, at least one of safety management information, operation-related information, life log health-related information, authentication / identification-related information, and entertainment-related information. In particular, the rear entertainment display 366 may display the results of measurements such as the body temperature of rear seat passengers measured by a temperature sensor.

[0091] As described above, by arranging a sensor on the back side of the display device 2, the distance to surrounding objects can be measured. Optical distance measurement methods can be broadly divided into passive and active types. Passive methods measure distance by receiving light from an object without projecting light from the sensor onto the object. Passive methods include the lens focusing method, the stereo method, and the monocular vision method. Active methods measure distance by projecting light onto an object and receiving the light reflected from the object with a sensor. Active methods include the optical radar method, the active stereo method, the photometric stereo method, the moiré pedometry method, and the interferometry method. The display device 2 according to the present disclosure can be applied to any of these distance measurement methods. By using a sensor arranged on the front side of the display device 2 according to the present disclosure, the above-mentioned passive or active distance measurement can be performed.

[0092] The above-described embodiment may be modified as follows.

[0093] (1) A display device comprising: a first transistor having a first terminal connected to a data line and a gate connected to a write scanning line; a second transistor having a first terminal connected to a first power supply line and a gate connected to a light-emitting control line; a third transistor having a first terminal connected to a second terminal of the second transistor and a gate connected to the second terminal of the first transistor; a fourth transistor having a first terminal connected to the second terminal of the third transistor, a second terminal connected to a second power supply line, and a gate connected to an initialization control line; a fifth transistor having a first terminal connected to the second terminal of the third transistor and a gate connected to the light-emitting control line; and a light-emitting element having a first terminal connected to the second terminal of the fifth transistor and a second terminal connected to a third power supply line.

[0094] (2) The display device according to (1), wherein the second transistor, the third transistor, and the fifth transistor are p-type MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors).

[0095] (3) The display device according to (1), wherein the light-emitting element is an LED (Light Emitting Diode), a first terminal of the light-emitting element is an anode, and a second terminal of the light-emitting element is a cathode.

[0096] (4) The display device according to (2) or (3), wherein the first transistor and the fourth transistor are p-type MOSFETs.

[0097] (5) The display device according to (2) or (3), wherein the first transistor and the fourth transistor are n-type MOSFETs.

[0098] (6) The display device according to (5), wherein the p-type MOSFET is a MOSFET formed on a semiconductor substrate, and the n-type MOSFET is a MOSFET formed on a wiring layer.

[0099] (7) The display device according to (6), wherein at least one of the n-type MOSFETs is formed by a TFT (Thin Film Transistor).

[0100] (8) The display device according to any one of (1) to (7), further comprising: a first capacitor connected between a first terminal of the third transistor and a gate of the third transistor; and a second capacitor connected between the first power supply line and the first capacitor.

[0101] (9) The display device according to any one of (1) to (8), wherein the third transistor has a body terminal connected to the same potential as the potential of the first power supply line.

[0102] (10) The display device according to (9), wherein the threshold voltage of the third transistor changes depending on the potential difference between the potential at the first end and the potential applied to the body terminal.

[0103] (11) The display device according to any one of (1) to (10), wherein a second terminal of the third transistor, a first terminal of the fourth transistor, and a first terminal of the fifth transistor are connected by a diffusion layer.

[0104] (12) The display device according to any one of (1) to (11), wherein the gate of the second transistor and the gate of the fifth transistor are connected within a light-emitting pixel.

[0105] (13) The display device according to any one of (1) to (11), wherein the gate of the second transistor and the gate of the fifth transistor are connected outside a light-emitting pixel.

[0106] (14) A display device comprising: a light-emitting element; a fourth transistor connected in parallel with the light-emitting element and initializing an anode potential of the light-emitting element; and a fifth transistor having one end connected to one end of the fourth transistor and the other end connected to one end of the light-emitting element, wherein a signal based on the emission intensity is applied to one end of the fourth transistor and one end of the fifth transistor.

[0107] (15) An electronic device having a display unit, comprising: a first transistor having a first terminal connected to a data line and a gate connected to a write scanning line; a second transistor having a first terminal connected to a first power supply line and a gate connected to a light-emitting control line; a third transistor having a first terminal connected to a second terminal of the second transistor and a gate connected to the second terminal of the first transistor; a fourth transistor having a first terminal connected to the second terminal of the third transistor, a second terminal connected to a second power supply line, and a gate connected to an initialization control line; a fifth transistor having a first terminal connected to the second terminal of the third transistor and a gate connected to the light-emitting control line; and a light-emitting element having a first terminal connected to the second terminal of the fifth transistor and a second terminal connected to the third power supply line.

[0108] The aspects of the present disclosure are not limited to the above-described embodiments and include various conceivable modifications, and the effects of the present disclosure are not limited to the above-described contents. The components in each embodiment may be appropriately combined and applied. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and intent of the present disclosure, which is derived from the content defined in the claims and their equivalents.

[0109] 1: display device, 10: pixel, T1: first transistor, T2: second transistor, T3: third transistor, T4: fourth transistor, T5: fifth transistor, C1: first capacitor, C2: second capacitor, L: light emitting element, ELVDD: first power supply line, ELVSS: second power supply line, VSS: third power supply line, 12: gate driver, 14: source driver, DS, DS1, DS2: light emitting control lines, WS: write scanning lines, AZ: initialization control line, SIG: data line

Claims

1. A display device comprising: a first transistor having a first terminal connected to a data line and a gate connected to a write scanning line; a second transistor having a first terminal connected to a first power supply line and a gate connected to a light emission control line; a third transistor having a first terminal connected to a second terminal of the second transistor and a gate connected to the second terminal of the first transistor; a fourth transistor having a first terminal connected to the second terminal of the third transistor, a second terminal connected to a second power supply line and a gate connected to an initialization control line; a fifth transistor having a first terminal connected to the second terminal of the third transistor and a gate connected to the light emission control line; and a light emitting element having a first terminal connected to the second terminal of the fifth transistor and a second terminal connected to a third power supply line.

2. The display device according to claim 1, wherein the second transistor, the third transistor and the fifth transistor are p-type MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors).

3. The display device according to claim 1, wherein the light-emitting element is an LED (Light Emitting Diode), a first end of the light-emitting element is an anode, and a second end of the light-emitting element is a cathode.

4. The display device according to claim 2, wherein the first transistor and the fourth transistor are p-type MOSFETs.

5. The display device according to claim 2, wherein the first transistor and the fourth transistor are n-type MOSFETs.

6. The display device according to claim 5, wherein the p-type MOSFET is a MOSFET formed on a semiconductor substrate, and the n-type MOSFET is a MOSFET formed on a wiring layer.

7. The display device according to claim 6, wherein at least one of the n-type MOSFETs is formed of a TFT (Thin Film Transistor).

8. The display device of claim 1, further comprising: a first capacitor connected between a first end of the third transistor and a gate of the third transistor; and a second capacitor connected between the first power supply line and the first capacitor.

9. The display device according to claim 1, wherein the third transistor has a body terminal connected to the same potential as the potential of the first power supply line.

10. The display device according to claim 9, wherein the third transistor has a threshold voltage that changes depending on a potential difference between a potential at the first end and a potential applied to a body terminal.

11. The display device according to claim 1, wherein a second terminal of the third transistor, a first terminal of the fourth transistor, and a first terminal of the fifth transistor are connected by a diffusion layer.

12. The display device according to claim 1, wherein the gate of the second transistor and the gate of the fifth transistor are connected within a light-emitting pixel.

13. The display device according to claim 1, wherein the gate of the second transistor and the gate of the fifth transistor are connected outside a light emitting pixel.

14. A display device comprising: a light-emitting element; a fourth transistor connected in parallel to the light-emitting element and initializing an anode potential of the light-emitting element; and a fifth transistor having one end connected to one end of the fourth transistor and the other end connected to one end of the light-emitting element, wherein a signal based on light emission intensity is applied to one end of the fourth transistor and one end of the fifth transistor.

15. An electronic device having a display unit, comprising: a first transistor having a first terminal connected to a data line and a gate connected to a write scanning line; a second transistor having a first terminal connected to a first power supply line and a gate connected to a light-emitting control line; a third transistor having a first terminal connected to a second terminal of the second transistor and a gate connected to the second terminal of the first transistor; a fourth transistor having a first terminal connected to the second terminal of the third transistor, a second terminal connected to a second power supply line and a gate connected to an initialization control line; a fifth transistor having a first terminal connected to the second terminal of the third transistor and a gate connected to the light-emitting control line; and a light-emitting element having a first terminal connected to the second terminal of the fifth transistor and a second terminal connected to a third power supply line.

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