Solar cell and manufacturing method therefor, and photovoltaic module and photovoltaic system

Abstract

A solar cell comprises a substrate, a first passivated contact layer and a second passivated contact layer, a first passivation film layer and a first dielectric layer, and a first electrode. The first passivation film layer is stacked on the first passivated contact layer, in an insulating isolation groove and on the second passivated contact layer; a first through groove is formed in an area, which corresponds to each first polycrystalline silicon doped conductive layer, of the first passivation film layer; one end of the first electrode passes through the first through groove to be in ohmic contact with the first passivated contact layer; and the first dielectric layer covers the first passivation film layer and covers first areas on the first passivated contact layer, wherein the first areas are areas that are located in a surface, which is exposed from the first through groove, of the first passivated contact layer, and are located between side walls of the first through groove and the first electrode.

Description

Solar cell and manufacturing method thereof, photovoltaic module and photovoltaic system

[0001] Related applications

[0002] This application claims priority to Chinese patent application No. 202311100519.2, filed on August 30, 2023, entitled “Solar cells and methods for manufacturing the same, photovoltaic modules and photovoltaic systems,” the entire text of which is hereby incorporated by reference. Technical Field

[0003] The present application relates to the technical field of solar cells, and in particular to a solar cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic system. Background Art

[0004] Interdigitated back contact (IBC) solar cells emerged in the 1970s. They utilize localized phosphorus and boron diffusion on the back of the cell, forming interdigitated P and N regions. With both the positive and negative electrodes on the back of the cell, there's no metal shielding on the front, significantly improving the cell's optical absorption. Tunnel oxide passivated contact (TOPCon) solar cells, a new type of silicon solar cell proposed by the Fraunhofer Institute in Germany in 2013, utilize a tunnel oxide layer superimposed on a doped polysilicon layer to form a passivated contact structure, effectively reducing the recombination rate between the silicon wafer surface and the metal contact. Currently, new tunnel back contact (TBC) solar cells that combine TOPCon and IBC technologies are gaining popularity. After forming the aluminum oxide passivation layer and silicon nitride anti-reflection layer on the back of a TBC cell, grooves are typically created using a laser. Electrode paste is then printed into these grooves, and the electrodes are then sintered to form the electrodes.

[0005] Summary of the Invention

[0006] Based on this, it is necessary to provide a solar cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic system.

[0007] A solar cell comprises a substrate, a first passivation contact layer and a second passivation contact layer, a first passivation film layer and a first dielectric layer, and a first electrode;

[0008] A first passivation contact layer and a second passivation contact layer are spaced apart from each other and are disposed on the first surface of the substrate, the first passivation contact layer comprising a first polysilicon-doped conductive layer, the second passivation contact layer comprising a second polysilicon-doped conductive layer, the second polysilicon-doped conductive layer having a doping concentration greater than that of the first polysilicon-doped conductive layer and a doping type opposite to that of the first polysilicon-doped conductive layer; an insulating isolation trench is constructed between the first passivation contact layer and the second passivation contact layer;

[0009] A first passivation film layer is stacked on the first passivation contact layer, within the insulating isolation trench, and on the second passivation contact layer. A first through-trench is formed in the first passivation film layer in a region corresponding to the first polysilicon-doped conductive layer. One end of the first electrode passes through the first through-trench to establish ohmic contact with the first passivation contact layer.

[0010] The first dielectric layer covers the first passivation film layer and covers the first region on the first passivation contact layer;

[0011] The first region is a region on the surface of the first passivation contact layer exposed from the first through-groove, located between the sidewall of the first through-groove and the first electrode.

[0012] In one embodiment, the end of the first electrode passing through the first through-trench is in ohmic contact with the first polysilicon doped conductive layer.

[0013] In one embodiment, the solar cell includes a plurality of the first passivation contact layers and a plurality of the second passivation contact layers, the plurality of first passivation contact layers and the plurality of second passivation contact layers are spaced apart from each other and alternately arranged on the first surface of the substrate, and a first through groove is provided in the region of the first passivation film layer corresponding to each first polysilicon-doped conductive layer.

[0014] In one embodiment, an insulating isolation trench is formed between at least one adjacent first passivation contact layer and second passivation contact layer.

[0015] In one embodiment, an insulating isolation trench A is formed between each adjacent first passivation contact layer and second passivation contact layer.

[0016] In one embodiment, a difference ΔH between a width of the first through-trench along the first direction and a width of the first electrode along the first direction satisfies:

[0017] 15μm≤ΔH≤25μm;

[0018] The first direction is an alternating arrangement direction of the first passivation contact layer and the second passivation contact layer, and the first direction is parallel to the first surface.

[0019] In one embodiment, the first through-groove is arranged extending along the second direction;

[0020] The second direction is an extension direction of the first electrode, and the second direction is parallel to the first surface.

[0021] In one embodiment, a portion of the first dielectric layer located within the first through-groove is provided with a through-groove for receiving a first electrode, and an end of the first electrode facing the substrate is located in the first electrode receiving groove and contacts two sidewalls of the first electrode receiving groove along the first direction;

[0022] The first direction is an alternating arrangement direction of the first passivation contact layer and the second passivation contact layer, and the first direction is parallel to the first surface.

[0023] In one embodiment, the thickness of the first dielectric layer is 50 nm-120 nm.

[0024] In one embodiment, the thickness of the first passivation film layer is 5 nm-12 nm.

[0025] In one embodiment, the solar cell further includes a second electrode, which penetrates the first dielectric layer and the first passivation film layer and is in ohmic contact with the second passivation contact layer.

[0026] In one embodiment, the second electrode is in ohmic contact with the second polysilicon doped conductive layer.

[0027] In one embodiment, the first passivation contact layer further includes a first transparent conductive oxide layer, which is disposed on a side of the first polysilicon-doped conductive layer facing away from the substrate, and the first electrode is in ohmic contact with the first transparent conductive oxide layer.

[0028] In one embodiment, the second passivation contact layer further includes a second transparent conductive oxide layer, which is disposed on a side of the second polysilicon-doped conductive layer facing away from the substrate, and the second electrode is in ohmic contact with the second transparent conductive oxide layer.

[0029] In one embodiment, the first transparent conductive oxide layer is located between the first polysilicon doped conductive layer and the first passivation film layer; and the second transparent conductive oxide layer is located between the second polysilicon doped conductive layer and the first passivation film layer.

[0030] In one embodiment, the first region is located on a surface of the first transparent conductive oxide layer facing away from the substrate.

[0031] In one embodiment, the thickness of the first transparent conductive oxide layer is 30 nm-150 nm.

[0032] In one embodiment, the substrate includes a second surface disposed opposite the first surface;

[0033] The solar cell further includes a second passivation film layer and a second dielectric layer sequentially stacked on the second surface of the substrate.

[0034] In one embodiment, the thickness of the second dielectric layer is 180 nm-220 nm.

[0035] In one embodiment, the thickness of the second passivation film layer is 11 nm-15 nm.

[0036] A solar cell comprises a substrate, a passivation contact layer, a passivation film layer, a dielectric layer, and an electrode;

[0037] The passivation contact layer is disposed on a surface of the substrate;

[0038] The passivation film layer is stacked on the first passivation contact layer, the passivation film layer is provided with a through groove, and one end of the electrode passes through the through groove to make ohmic contact with the passivation contact layer;

[0039] The dielectric layer covers the passivation film layer and the first region of the passivation contact layer;

[0040] The first region is a region on the surface of the passivation contact layer exposed from the through-groove, located between the sidewall of the through-groove and the electrode.

[0041] A method for manufacturing a solar cell, comprising:

[0042] A substrate is provided, comprising a base, a first passivation contact layer, and a second passivation contact layer, wherein the first passivation contact layer and the second passivation contact layer are spaced apart from each other and disposed on a first surface of the base, the first passivation contact layer comprising a first polysilicon-doped conductive layer, the second passivation contact layer comprising a second polysilicon-doped conductive layer, the second polysilicon-doped conductive layer having a doping concentration greater than that of the first polysilicon-doped conductive layer and a doping type opposite to that of the first polysilicon-doped conductive layer; and an insulating isolation trench is constructed between the first passivation contact layer and the second passivation contact layer;

[0043] forming a first passivation film layer on the first passivation contact layer, in the insulating isolation trench, and on the second passivation contact layer, and opening a first through-groove in a region of the first passivation film layer corresponding to the first polysilicon-doped conductive layer;

[0044] forming a first dielectric layer on the first passivation film layer so that the first dielectric layer covers the first passivation film layer and covers the surface of the first passivation contact layer exposed from the first through-groove;

[0045] A first electrode is formed on a portion of the first dielectric layer located in the first through-groove, and the first electrode penetrates the first dielectric layer to make ohmic contact with the first passivation contact layer.

[0046] In one embodiment, the step of forming a first through-groove in a region of the first passivation film layer corresponding to the first polysilicon-doped conductive layer specifically includes:

[0047] A first through-groove is formed on the first passivation film layer by using a photolithography process.

[0048] In one embodiment, before the step of forming a first passivation film layer on the first passivation contact layer, in the insulating isolation trench, and on the second passivation contact layer, the method for manufacturing a solar cell further includes:

[0049] A textured structure and a second passivation film layer are formed on a second surface of the base of the substrate, and the second surface is arranged opposite to the first surface.

[0050] In one embodiment, the step of forming a first dielectric layer on the first passivation film specifically includes:

[0051] A second dielectric layer is formed on the second passivation film layer, a first dielectric layer is formed on the first passivation film layer, and the first dielectric layer is deposited and covers the first through-groove.

[0052] In one embodiment, after the step of forming the first passivation film layer and the second passivation film layer, and before the step of opening a first through groove in the area of ​​the first passivation film layer corresponding to the first polysilicon-doped conductive layer, the step also includes: annealing the first passivation film layer and the second passivation film layer to activate the first passivation film layer and the second passivation film layer.

[0053] In one embodiment, after forming the textured structure and before forming the second passivation film layer and the first passivation film layer, the method further includes:

[0054] A first transparent conductive oxide layer is formed on the first polysilicon-doped conductive layer, and a second transparent conductive oxide layer is formed on the second polysilicon-doped conductive layer.

[0055] In one embodiment, after the step of forming the first electrode, the method further includes:

[0056] A second electrode receiving groove is provided in the first dielectric layer and the first passivation film layer in the region corresponding to the second polysilicon doped conductive layer, a second electrode is formed in the second electrode receiving groove, and the second electrode is in contact with the second transparent conductive oxide layer.

[0057] In one embodiment, the outermost film layer of the first passivation contact layer facing away from the substrate is a first polysilicon doped conductive layer;

[0058] The step of forming a first electrode on a portion of the first dielectric layer located in the first through-groove and making the first electrode penetrate the first dielectric layer and make ohmic contact with the first passivation contact layer comprises:

[0059] A first paste is printed on a portion of the first dielectric layer located in the first through-groove and sintered, so that the first paste penetrates the first dielectric layer and contacts the first polysilicon-doped conductive layer.

[0060] A photovoltaic assembly includes at least one cell string, wherein the cell string includes at least two of the above-mentioned solar cells.

[0061] A photovoltaic system includes the above-mentioned photovoltaic assembly.

[0062] Dielectric layerDielectric layer BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0064] FIG1 is a schematic structural diagram of an embodiment of a solar cell provided in this application.

[0065] FIG2 is a schematic structural diagram of another embodiment of a solar cell provided in the present application.

[0066] FIG3 is a schematic flow chart of an embodiment of a method for manufacturing a solar cell provided in the present application.

[0067] FIG4 is a schematic structural diagram of a substrate formed in one embodiment of a method for manufacturing a solar cell provided in the present application.

[0068] FIG5 is a schematic structural diagram of forming a first through-groove in one embodiment of a method for manufacturing a solar cell provided in the present application.

[0069] FIG6 is a schematic structural diagram of a solar cell formed in one embodiment of the method for manufacturing a solar cell provided in the present application.

[0070] FIG7 is a partial enlarged view of FIG1 .

[0071] FIG8 is a partial enlarged view of FIG2 .

[0072] FIG9 is a schematic structural diagram of another embodiment of a solar cell provided in the present application.

[0073] Explanation of the accompanying drawings: 100, solar cell; 101, substrate; 102, substrate; 10, first passivation contact layer; 11, first tunneling oxide layer; 12, first polysilicon-doped conductive layer; 20, second passivation contact layer; 21, second tunneling oxide layer; 22, second polysilicon-doped conductive layer; 30, first passivation film layer; 31, first through-groove; 40, first dielectric layer; 41, first electrode accommodating groove; 42, second electrode accommodating groove; 50, first electrode; 60, second electrode; 70, first transparent conductive oxide layer; 80, second transparent conductive oxide layer; 90, second passivation film layer; 91, second dielectric layer; 92, velvet structure; A, insulating isolation groove; F, first surface; S, second surface; D, first direction; E, first region. DETAILED DESCRIPTION

[0074] To make the above-mentioned objects, features, and advantages of the present application more clearly understood, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings. The following description sets forth many specific details to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar improvements without violating the scope of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0075] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0076] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of such features. Throughout the description of this application, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0077] In this application, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two elements or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0078] In this application, unless otherwise expressly specified or limited, when a first feature is "above" or "below" a second feature, it may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Furthermore, when a first feature is "above," "above," or "above" a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is "below," "below," or "below" a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0079] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only implementation methods.

[0080] The solar cell and its manufacturing method, photovoltaic module and photovoltaic system according to the embodiment of the present application are described below with reference to the accompanying drawings.

[0081] 1 , a solar cell 100 provided in an embodiment of the present application includes a substrate 101 , a first passivation contact layer 10 and a second passivation contact layer 20 , a first passivation film layer 30 and a first dielectric layer 40 , and a first electrode 50 .

[0082] The first passivation contact layer 10 and the second passivation contact layer 20 are spaced apart from each other and disposed on the first surface F of the substrate 101. The first passivation contact layer 10 includes a first polysilicon-doped conductive layer 12, and the second passivation contact layer 20 includes a second polysilicon-doped conductive layer 22. The doping concentration of the second polysilicon-doped conductive layer 22 is greater than the doping concentration of the first polysilicon-doped conductive layer 12, and the doping type of the second polysilicon-doped conductive layer 22 is opposite to that of the first polysilicon-doped conductive layer 12. An insulating isolation trench A is formed between the first passivation contact layer 10 and the second passivation contact layer 20.

[0083] The first passivation film layer 30 is stacked on the first passivation contact layer 10, the insulating isolation groove A and the second passivation contact layer 20. The first passivation film layer 30 is provided with a first through groove 31 in the area corresponding to the first polysilicon-doped conductive layer 12. One end of the first electrode 50 passes through the first through groove 31 and is in ohmic contact with the first passivation contact layer 10.

[0084] Please refer to Figure 7 as well. The first dielectric layer 40 covers the first passivation film layer 30 and covers the first region E on the first passivation contact layer 10, wherein the first region E is the surface of the first passivation contact layer 10 exposed from the first through-groove 31, and is located between the sidewall of the first through-groove 31 and the first electrode 50, as shown by the dotted line in Figure 1.

[0085] During the manufacturing process of related technologies, in order to increase the contact between the electrode paste and the polysilicon doped conductive layer and reduce the contact resistance, grooves are often opened on the passivation film layer on the back of the solar cell, and the electrode paste is printed in the grooves to form electrodes. However, since the electrode paste may not be able to fill the opened grooves, the polysilicon doped conductive layer is partially exposed, the passivation effect is poor, the recombination loss is increased, and the efficiency of the solar cell is reduced.

[0086] In the embodiment of the present application, the first dielectric layer 40 covers the first area E on the first passivation contact layer 10, wherein the first area E is the area of ​​the surface of the first passivation contact layer 10 exposed from the first through-groove 31, located between the sidewall of the first through-groove 31 and the first electrode 50. In this way, the surface of the first passivation contact layer 10 exposed from the first through-groove 31, except for the area in contact with the first electrode 50, is completely covered by the first dielectric layer 40. There is no direct exposure in the first passivation contact layer 10, which makes the passivation effect better, reduces the recombination loss, and improves the efficiency of the solar cell 100.

[0087] In some embodiments, the first polysilicon-doped conductive layer 12 may be a polysilicon layer doped with a P-type element, and the second polysilicon-doped conductive layer 22 may be a polysilicon layer doped with an N-type element.

[0088] The first passivation film layer 30 can be a passivation film layer such as aluminum oxide. The first dielectric layer 40 can be an antireflection layer. The first dielectric layer 40 can be a passivation film layer such as silicon nitride. Both the first passivation film layer 30 and the first dielectric layer 40 can be single-layer or multi-layer films.

[0089] Referring to FIG. 9 , in some embodiments, the solar cell 100 includes a plurality of first passivation contact layers 10 and a plurality of second passivation contact layers 20. The plurality of first passivation contact layers 10 and the plurality of second passivation contact layers 20 are spaced apart from each other and alternately arranged on the first surface F of the substrate 101. For example, they may be alternately arranged along a direction parallel to the first surface F. The first passivation film layer 30 may have first through-trench 31 defined in regions corresponding to the first polysilicon-doped conductive layers 12. The solar cell 100 includes a plurality of first electrodes 50. One end of each first electrode 50 passes through a corresponding first through-trench 31 to establish ohmic contact with a corresponding first passivation contact layer 10.

[0090] In some embodiments, each first passivation contact layer 10 may further include a first tunneling oxide layer 11, and each second passivation contact layer 20 may further include a second tunneling oxide layer 21. The first tunneling oxide layer 11 and the first polysilicon-doped conductive layer 12 are sequentially stacked on the first surface F, and the second tunneling oxide layer 21 and the second polysilicon-doped conductive layer 22 are sequentially stacked on the first surface F.

[0091] In some embodiments, an insulating isolation trench A is formed between at least one adjacent first passivation contact layer 10 and second passivation contact layer 20 .

[0092] In some embodiments, an insulating isolation trench A is formed between each adjacent first passivation contact layer 10 and second passivation contact layer 20 .

[0093] Specifically, adjacent first passivation contact layers 10 and second passivation contact layers 20 are spaced apart from each other, thereby forming an insulating isolation trench A. The insulating isolation trench A insulates and isolates adjacent first passivation contact layers 10 and second passivation contact layers 20 .

[0094] In some embodiments, the thickness of the first passivation contact layer 10 is greater than the thickness of the second passivation contact layer 20. In some embodiments, the thickness of the first polysilicon-doped conductive layer 12 is greater than the thickness of the second polysilicon-doped conductive layer 22.

[0095] Referring to FIG. 1 and FIG. 7 , in some embodiments, the outermost layer of the first passivation contact layer 10 facing away from the substrate 101 is the first polysilicon-doped conductive layer 12. Therefore, the surface of the first passivation contact layer 10 exposed from the first through-trench 31 is also the surface of the first polysilicon-doped conductive layer 12 exposed from the first through-trench 31. Specifically, it refers to the region of the surface of the first polysilicon-doped conductive layer 12 facing away from the substrate 101 corresponding to the first through-trench 31. Within this region, the region between the sidewall of the first through-trench 31 and the first electrode 50 is the first region E. In these embodiments, the first electrode 50 passes through one end of the first through-trench 31 and forms ohmic contact with the first polysilicon-doped conductive layer 12.

[0096] The first dielectric layer 40 covers the first region E on the first polysilicon-doped conductive layer 12 . The first dielectric layer 40 may be directly stacked on the first region E on the surface of the first passivation contact layer 10 and completely cover the first region E. The first dielectric layer 40 may completely cover and protect the portion of the surface of the first passivation contact layer 10 that may be exposed through the first through-groove 31 .

[0097] In this application, for ease of description, the two opposing surfaces of the substrate 101 are defined as a first surface F and a second surface S, respectively. One of the first surface F and the second surface S may be the front surface (e.g., the light-receiving surface), and the other may be the back surface (e.g., the backlight surface). In some embodiments, the first surface F is the back surface (e.g., the backlight surface).

[0098] In this application, for the sake of convenience, the alternating arrangement direction of the first passivation contact layer 10 and the second passivation contact layer 20 is defined as the first direction D, and the extension direction of the first electrode 50 is defined as the second direction. In some embodiments, the first direction D and the second direction are perpendicular to each other and are both parallel to the first surface F.

[0099] In some embodiments, the first through-grooves 31 may extend along the second direction, which is the same as the extending direction (eg, the length direction) of the first electrode 50 .

[0100] Furthermore, the width of the first through-groove 31 along the first direction D is greater than the width of the first electrode 50 in the first direction. In some embodiments, the difference ΔH between the width of the first through-groove 31 along the first direction D and the width of the first electrode 50 along the first direction satisfies 15μm≤ΔH≤25μm. Optionally, ΔH can be 20μm. When the first through-groove 31 is grooved, it is necessary to make the position of the first through-groove 31 correspond to the area where the first electrode 50 is to be printed. Setting the width of the first through-groove 31 wider than the width of the first electrode 50 can avoid the first electrode 50 from being unable to be printed at the predetermined position due to the groove opening error. Furthermore, setting the first through-groove 31 to be wider also facilitates alignment with the first through-groove 31 when printing the slurry of the first electrode 50, so as to facilitate printing the slurry of the first electrode 50 into the first through-groove 31.

[0101] Furthermore, a first electrode receiving groove 41 is provided through the portion of the first dielectric layer 40 located within the first through-groove 31. The end of the first electrode 50 facing the substrate 101 is located in the first electrode receiving groove 41 and is in close contact with two sidewalls of the first electrode receiving groove 41 along the first direction D. This prevents the formation of a gap between the first dielectric layer 40 and the first electrode 50, exposing the first polysilicon-doped conductive layer 12.

[0102] In some embodiments, the thickness of the first dielectric layer 40 is 50 nm to 120 nm, and optionally, the thickness of the first dielectric layer 40 can be 100 nm. In some embodiments, the thickness of the first passivation film layer 30 is 5 nm to 12 nm, and optionally, the thickness of the first passivation film layer 30 can be 10 nm.

[0103] In an embodiment of the present application, the solar cell 100 may further include one or more second electrodes 60, which penetrate the first dielectric layer 40 and the first passivation film layer 30 and make ohmic contact with the corresponding second passivation contact layer 20. In some embodiments, the second electrode 60 makes ohmic contact with the corresponding second polysilicon doped conductive layer 22.

[0104] Furthermore, the solar cell 100 may further include a second passivation film layer 90 and a second dielectric layer 91 sequentially stacked on the second surface S of the substrate 101 .

[0105] The thickness of the second dielectric layer 91 may be 180 nm-220 nm. Optionally, the thickness of the second dielectric layer 91 may be 200 nm.

[0106] The thickness of the second passivation film layer 90 may be 11 nm-15 nm. Optionally, the thickness of the second passivation film layer 90 may be 13 nm.

[0107] As previously described, the first tunneling oxide layer 11 is stacked and arranged between the first surface F of the substrate 101 and the first polysilicon-doped conductive layer 12. The second tunneling oxide layer 21 is stacked and arranged between the first surface F of the substrate 101 and the second polysilicon-doped conductive layer 22. The first polysilicon-doped conductive layer 12 may be the film layer farthest from the substrate 101 in the first passivation contact layer 10, and the second polysilicon-doped conductive layer 22 may be the film layer farthest from the substrate 101 in the second passivation contact layer 20.

[0108] 2 , in some other embodiments, based on the aforementioned embodiments, the first passivation contact layer 10 further includes a first transparent conductive oxide layer 70 . The first transparent conductive oxide layer 70 is disposed on a side of the first polysilicon-doped conductive layer 12 facing away from the substrate 101 . The first electrode 50 passes through one end of the first through-groove 31 and is in ohmic contact with the first transparent conductive oxide layer 70 .

[0109] In some embodiments, the second passivation contact layer 20 further includes a second transparent conductive oxide layer 80 . The second transparent conductive oxide layer 80 is disposed on a side of the second polysilicon-doped conductive layer 22 facing away from the substrate 101 . The second electrode 60 makes ohmic contact with the second transparent conductive oxide layer 80 .

[0110] By providing the first transparent conductive oxide layer 70 and / or the second transparent conductive oxide layer 80 with good lateral conductivity, while satisfying passivation requirements, the layers also exhibit high charge carrier mobility and low carrier density. This reduces the contact resistance between the first polysilicon-doped conductive layer 12 and the first electrode 50, and / or the contact resistance between the second polysilicon-doped conductive layer 22 and the second electrode 60, thereby improving the efficiency of the solar cell 100. Furthermore, the first transparent conductive oxide layer 70 and / or the second transparent conductive oxide layer 80 also exhibit ideal anti-light reflection properties, and thus do not affect the normal efficiency of the solar cell 100.

[0111] Furthermore, the first transparent conductive oxide layer 70 and / or the second transparent conductive oxide layer 80 allow the H element in the first dielectric layer 40 to enter the first polysilicon-doped conductive layer 12 and / or the second polysilicon-doped conductive layer 22. After sintering, the H element carried in the first dielectric layer 40 can diffuse into the substrate 101 during the sintering process, thereby passivating the silicon crystal defects in the substrate 101.

[0112] In addition, due to the provision of the first transparent conductive oxide layer 70 and / or the second transparent conductive oxide layer 80, the thickness of the first polysilicon doped conductive layer 12 and / or the second polysilicon doped conductive layer 22 can be set to be thinner, so that they have a higher sheet resistance.

[0113] The first transparent conductive oxide layer 70 is located between the first polysilicon-doped conductive layer 12 and the first passivation film layer 30. The second transparent conductive oxide layer 80 is located between the second polysilicon-doped conductive layer 22 and the first passivation film layer 30. Referring to FIG8 , the first region E on the surface of the first passivation contact layer 10 is located on the surface of the first transparent conductive oxide layer 70 facing away from the substrate 101. The outermost layer of the first passivation contact layer 10 facing away from the substrate 101 is the first transparent conductive oxide layer 70. Therefore, the surface of the first passivation contact layer 10 exposed from the first through-trench 31 is also the surface of the first transparent conductive oxide layer 70 exposed from the first through-trench 31. Specifically, this refers to the region of the surface of the first transparent conductive oxide layer 70 facing away from the substrate 101 corresponding to the first through-trench 31. Within this region, the region located between the sidewall of the first through-trench 31 and the first electrode 50 is the first region E.

[0114] In some embodiments, the thickness of the first transparent conductive oxide layer 70 is 30 nm to 150 nm. This configuration can reduce the contact resistance without affecting the passivation performance of the battery.

[0115] The present application also provides a method for manufacturing a solar cell, which can be used to manufacture the solar cell 100 of the above embodiment.

[0116] 3 to 6 , the method for manufacturing a solar cell includes steps S10 to S40 .

[0117] S10. Provide a substrate 102. Substrate 102 includes a base 101, a first passivation contact layer 10, and a second passivation contact layer 20. The first passivation contact layer 10 and the second passivation contact layer 20 are spaced apart from each other and disposed on a first surface F of the base 101. The first passivation contact layer 10 includes a first polysilicon-doped conductive layer 12. The second passivation contact layer 20 includes a second polysilicon-doped conductive layer 22. The second polysilicon-doped conductive layer 22 has a greater doping concentration than the first polysilicon-doped conductive layer 12 and a doping type opposite to that of the first polysilicon-doped conductive layer 12. An insulating isolation trench A is formed between the first passivation contact layer 10 and the second passivation contact layer 20.

[0118] S20 , forming a first passivation film layer 30 on the first passivation contact layer 10 , in the insulating isolation trench A, and on the second passivation contact layer 20 , and opening a first through trench 31 in a region of the first passivation film layer 30 corresponding to the first polysilicon-doped conductive layer 12 .

[0119] S30 , forming a first dielectric layer 40 on the first passivation film layer 30 , so that the first dielectric layer 40 covers the first passivation film layer 30 and the surface of the first passivation contact layer 10 exposed from the first through groove 31 .

[0120] S40 , forming a first electrode 50 on a portion of the first dielectric layer 40 located in the first through-groove 31 , so that the first electrode 50 penetrates the first dielectric layer 40 and makes ohmic contact with the first passivation contact layer 10 .

[0121] In the embodiment of the present application, a first dielectric layer 40 is formed on the first passivation film layer 30 so that the first dielectric layer 40 covers the surface of the first passivation contact layer 10 exposed from the first through-groove 31, and a first electrode 50 is formed on the portion of the first dielectric layer 40 located within the first through-groove 31. In this way, the surface of the first passivation contact layer 10 exposed from the first through-groove 31, except for the area in contact with the first electrode 50, is completely covered by the first dielectric layer 40. The surface of the first passivation contact layer 10 facing away from the substrate 101 is not directly exposed, thereby achieving a better passivation effect, reducing recombination losses, and improving the efficiency of the solar cell 100.

[0122] In some embodiments, the substrate 102 includes a plurality of first passivation contact layers 10 and a plurality of second passivation contact layers 20. The plurality of first passivation contact layers 10 and the plurality of second passivation contact layers 20 are spaced apart from each other and alternately arranged on the first surface F of the substrate 101. First through-trench 31 can be defined in regions of the first passivation film 30 corresponding to each first polysilicon-doped conductive layer 12. In other words, each first polysilicon-doped conductive layer 12 has a corresponding first through-trench 31, so that a portion of the first passivation contact layer 10 corresponding to each first polysilicon-doped conductive layer 12 is exposed through the first through-trench 31, thereby facilitating ohmic contact with the plurality of first electrodes 50.

[0123] The first dielectric layer 40 covers the surface of the first passivation contact layer 10 exposed from the first through-trench 31 , which may mean that the surface of the first passivation contact layer 10 exposed from the first through-trench 31 is completely covered by the first dielectric layer 40 .

[0124] The first electrode 50 may be formed by printing a metal paste of the first electrode 50 on the first dielectric layer 40 and then sintering the paste. Of course, the present application is not limited thereto, and the first electrode 50 may also be formed by other methods.

[0125] In step S20, the step of forming a first through-groove 31 in a region of the first passivation film layer 30 corresponding to the first polysilicon-doped conductive layer 12 specifically includes:

[0126] A first through-groove 31 is etched into the first passivation film layer 30 using a photolithography process. The width of the first through-groove 31 along the first direction can be, for example, 30 μm. Forming the first through-groove 31 using a photolithography process provides high positioning accuracy, facilitating the accurate formation of the first electrode 50 at the predetermined location. The photolithography method ensures patterning accuracy while preventing the organic solvent used to clean the photoresist from reacting with the first passivation film layer 30 in the remaining areas, thereby fully ensuring the passivation performance of the first passivation film layer 30 in the non-photolithography areas.

[0127] In the above substrate 102, the second surface S of the base 101 may be formed with a velvet structure 92, and the second passivation film layer 90 may be formed on the velvet structure 92. Alternatively, in the above substrate 102, the second surface S of the base 101 may be exposed without any film layer formed thereon.

[0128] In the substrate 102 , when no film layer is formed on the second surface S of the base 101 , the second passivation film layer 90 may be formed on the second surface S before forming the first passivation film layer 30 .

[0129] In some embodiments, in step S20, before the step of forming the first passivation film layer 30 on the first passivation contact layer 10, in the insulating isolation trench A, and on the second passivation contact layer 20, the method for manufacturing a solar cell further includes:

[0130] A textured structure 92 and a second passivation film layer 90 are formed on the second surface S of the substrate 101 .

[0131] In some embodiments, in step S30, the step of forming the first dielectric layer 40 on the first passivation film layer 30 specifically includes:

[0132] A second dielectric layer 91 is formed on the second passivation film layer 90, and a first dielectric layer 40 is formed on the first passivation film layer 30. The first dielectric layer 40 is deposited to cover the first through-trench 31. Both the first dielectric layer 40 and the second dielectric layer 91 may be anti-reflection layers. The first dielectric layer 40 may be, for example, silicon nitride, and the second dielectric layer 91 may include, for example, silicon nitride and silicon dioxide. Furthermore, the first dielectric layer 40 may partially cover the sidewalls of the first through-trench 31.

[0133] In some embodiments, after the step of forming the first passivation film layer 30 and the second passivation film layer 90, before the step of opening the first through groove 31 in the area of ​​the first passivation film layer 30 corresponding to the first polysilicon-doped conductive layer 12, it also includes: annealing the first passivation film layer 30 and the second passivation film layer 90 to activate the first passivation film layer 30 and the second passivation film layer 90, and remove the hydrogen elements included in the first passivation film layer 30 and the second passivation film layer 90.

[0134] In some embodiments, after forming the texture structure 92 and before forming the second passivation film layer 90 and the first passivation film layer 30 , the method further includes:

[0135] A first transparent conductive oxide layer 70 is formed on the first polysilicon-doped conductive layer 12, and a second transparent conductive oxide layer 90 is formed on the second polysilicon-doped conductive layer 22. The first transparent conductive oxide layer 70 is formed on a side of the first polysilicon-doped conductive layer 12 facing away from the substrate 101, and the second transparent conductive oxide layer 90 is formed on a side of the second polysilicon-doped conductive layer 22 facing away from the substrate 101.

[0136] The first transparent conductive oxide layer 70 and the second transparent conductive oxide layer 90 can be formed by using a mask (eg, a hard mask). The material of the first transparent conductive oxide layer 70 and the second transparent conductive oxide layer 90 can be, for example, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), or the like.

[0137] In some embodiments, step S40, for example, after the step of forming the first electrode 50, further includes:

[0138] A second electrode receiving groove 42 is provided through the first dielectric layer 40 and the first passivation film layer 30 in the region corresponding to the second polysilicon-doped conductive layer 22 , and a second electrode 60 is formed in the second electrode receiving groove 42 , and the second electrode 60 is in contact with the second transparent conductive oxide layer 80 .

[0139] 1 , in some embodiments, the outermost layer of the first passivation contact layer 10 facing away from the substrate 101 is the first polysilicon-doped conductive layer 12. In these embodiments, the steps of forming the first electrode 50 on the portion of the first dielectric layer 40 located within the first through-trench 31 and allowing the first electrode 50 to penetrate the first dielectric layer 40 and establish ohmic contact with the first passivation contact layer 10 include:

[0140] A first paste is printed on a portion of the first dielectric layer 40 located within the first through groove 31 and sintered so that the first paste penetrates the first dielectric layer 40 and contacts the first polysilicon-doped conductive layer 12 , thereby forming an ohmic contact between the formed first electrode 50 and the first polysilicon-doped conductive layer 12 .

[0141] In some embodiments, the step of providing the substrate 102 includes:

[0142] A tunneling material layer, an amorphous silicon material layer, a borosilicate glass (BSG) film layer, and a mask layer are sequentially stacked on the first surface F of the substrate 101;

[0143] The borosilicate glass (BSG) film layer and the mask layer on the first surface F are partially removed, so that the remaining borosilicate glass (BSG) film layer and the mask layer only cover the first arrangement area of ​​the amorphous silicon material layer, and the first arrangement area corresponds to the arrangement area of ​​the first polysilicon doped conductive layer 12 of the solar cell 100;

[0144] The first arrangement area in the amorphous silicon material layer is formed into a first polysilicon doped conductive layer 12 by the remaining borosilicate glass (BSG) film layer. For example, the boron element in the borosilicate glass (BSG) film layer can be driven into the amorphous silicon material layer under high temperature conditions to form a P-type first polysilicon doped conductive layer 12.

[0145] forming a phosphosilicate glass (PSG) film layer on the first surface F, covering a second arrangement region of the amorphous silicon material layer, the second arrangement region corresponding to a location of the second polysilicon doped conductive layer 22 of the solar cell 100;

[0146] The second arrangement area in the amorphous silicon material layer is formed into a second polysilicon doped conductive layer 22 through a phosphosilicate glass (PSG) film layer. For example, the phosphorus element in the phosphosilicate glass (PSG) film layer can be pushed into the amorphous silicon material layer under high temperature conditions to form an N-type second polysilicon doped conductive layer 22; and

[0147] An insulating isolation trench A is formed between the adjacent first polysilicon doped conductive layer 12 and the second polysilicon doped conductive layer 22 , such that the insulating isolation trench A extends to the first surface F of the substrate 101 .

[0148] By controlling the concentration of boron and phosphorus in the borosilicate glass (BSG) film layer and the phosphosilicate glass (PSG) film layer and / or the temperature of heat treatment, the doping concentration in the first polysilicon doped conductive layer 12 can be lower and the doping concentration in the second polysilicon doped conductive layer 22 can be higher.

[0149] The following is a specific example to illustrate the method for manufacturing a solar cell according to an embodiment of the present application. The method includes:

[0150] Step 1: Select an N-type silicon substrate as the base 101 and perform double-sided polishing to remove the damaged layer. Place the base 101 in the reaction chamber of a low-pressure chemical vapor deposition (LPCVD) device, and sequentially form a tunneling material layer and an intrinsic amorphous silicon material layer on the first surface F of the base 101.

[0151] Step 2: Prepare a borosilicate glass (BSG) film layer and a mask layer (such as silicon dioxide) on the surface of the intrinsic amorphous silicon material layer facing away from the substrate 101 (the first surface F) in an APCVD device.

[0152] Step 3: Use a green picosecond laser to partially remove the borosilicate glass (BSG) film layer and the mask layer on the first surface F, so that the remaining borosilicate glass (BSG) film layer and the mask layer only cover the first arrangement area of ​​the amorphous silicon material layer, corresponding to the setting area of ​​the first polycrystalline silicon doped conductive layer 12 in the solar cell 100, that is, the remaining borosilicate glass (BSG) film layer and the mask layer correspond to the P-type doped area (that is, the area corresponding to the first polycrystalline silicon doped conductive layer 12).

[0153] Step 4: Clean the semi-finished product obtained in step 3 and place it in a diffusion furnace. Under high temperature conditions, the boron element in the borosilicate glass (BSG) film layer is pushed into the amorphous silicon material layer to form a P-type first polysilicon doped conductive layer 12.

[0154] Step 5: Depositing a film layer (such as a phosphosilicate glass film layer) containing an N-type dopant element (such as phosphorus) on the amorphous silicon material layer exposed to the outside.

[0155] Step 6: driving N-type doping elements into the amorphous silicon material layer under high temperature conditions to form an N-type second polysilicon doped conductive layer 22 .

[0156] Step 7: Use a green picosecond laser to open an insulating isolation trench A (i.e., a non-diffusion region) between the adjacent first polysilicon-doped conductive layer 12 and the second polysilicon-doped conductive layer 22, so that the insulating isolation trench A extends to the first surface F of the substrate 101, thereby forming a first tunneling oxide layer 11 and a second tunneling oxide layer 21.

[0157] Step 8: The semi-finished product obtained in step 7 is passed through a chain cleaning machine to remove the oxide layers such as the amorphous silicon material layer, the phosphorus silicon glass PSG film layer on one side and the side of the second surface S of the substrate 101, and then enters a slot machine for cleaning and texturing to form a velvet structure 92 on the second surface S of the substrate 101. Of course, the laser damage in the insulating isolation groove A is also removed at the same time to form the structure shown in Figure 4.

[0158] Step nine: depositing a second passivation film layer 90 and a first passivation film layer 30 on the second surface S side and the first surface F side of the substrate 101 in sequence. The first passivation film layer 30 and the second passivation film layer 90 may both be aluminum oxide, with thicknesses of 10 nm and 13 nm, respectively, and performing an annealing process to activate the first passivation film layer 30 and the second passivation film layer 90.

[0159] Step 10: Using a photolithography process, first through-grooves 31 are formed in the first passivation layer 30 in regions corresponding to the first polysilicon-doped conductive layers 12 . The width of the first through-grooves 31 is approximately 30 μm, as shown in FIG5 .

[0160] Step 11: A first dielectric layer 40 and a second dielectric layer 91 are deposited on the first surface F and second surface S of the semi-finished product obtained in Step 10, respectively. The first dielectric layer 40 also covers the surface of the first polysilicon-doped conductive layer 12 exposed from the first through-groove 31. Silver paste is printed on the first dielectric layer 40 at locations corresponding to the first through-groove 31 and the second polysilicon-doped conductive layer 22, respectively, and sintered to form a first electrode 50 and a second electrode 60. The first electrode 50 penetrates the first dielectric layer 40 and makes ohmic contact with the first polysilicon-doped conductive layer 12. The second electrode 60 penetrates the first dielectric layer 40 and the first passivation film layer 30 and makes ohmic contact with the second polysilicon-doped conductive layer 22, ultimately forming the solar cell 100 shown in FIG6 . The first dielectric layer 40 can be, for example, silicon nitride with a thickness of 100 nm. The second dielectric layer 91 can be, for example, a laminated film of silicon nitride and silicon oxide, with the thicknesses of silicon nitride and silicon oxide in the second dielectric layer 91 being 60 nm and 140 nm, respectively.

[0161] Of course, in other embodiments, between step eight and step nine, the steps of forming a first transparent conductive oxide layer 70 on the first polysilicon-doped conductive layer 12 and forming a second transparent conductive oxide layer 80 on the second polysilicon-doped conductive layer 22 are further included.

[0162] A third aspect of the embodiments of the present application further provides a photovoltaic assembly (not shown).

[0163] The photovoltaic module includes at least one cell string, and the cell string includes at least two solar cells 100 as described in the first and / or second embodiments. The solar cells 100 can be connected together by serial welding.

[0164] A fourth aspect of the embodiments of the present application further provides a photovoltaic assembly (not shown).

[0165] The photovoltaic system includes the photovoltaic components mentioned above. The photovoltaic system can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water surface power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it is understandable that the application scenarios of the photovoltaic system are not limited to this, that is, the photovoltaic system can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array can be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter to be converted into the alternating current required by the mains power grid and then connected to the mains power network to achieve solar power supply.

[0166] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0167] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A solar cell, characterized in that: It includes a substrate, a first passivation contact layer and a second passivation contact layer, a first passivation film layer and a first dielectric layer, and a first electrode; The first passivation contact layer and the second passivation contact layer are alternately arranged on the first surface of the substrate, the first passivation contact layer includes a first polysilicon doped conductive layer, the second passivation contact layer includes a second polysilicon doped conductive layer, the doping concentration of the second polysilicon doped conductive layer is greater than that of the first polysilicon doped conductive layer, and the doping type of the second polysilicon doped conductive layer is opposite to that of the first polysilicon doped conductive layer; an insulating isolation groove is constructed between each adjacent first passivation contact layer and the second passivation contact layer; A first passivation film layer is stacked on the first passivation contact layer, the insulating isolation groove and the second passivation contact layer, and a first through groove is formed in each region of the first passivation film layer corresponding to each of the first polysilicon-doped conductive layers, and one end of the first electrode passes through the first through groove to make ohmic contact with the first passivation contact layer; The first dielectric layer covers the first passivation film layer and covers the first region on the first passivation contact layer; The first region is a region on the surface of the first passivation contact layer exposed from the first through-groove and located between the sidewall of the first through-groove and the first electrode.

2. The solar cell according to claim 1, characterized in that The end of the first electrode passing through the first through-groove is in ohmic contact with the first polysilicon-doped conductive layer.

3. The solar cell according to claim 1, characterized in that A difference ΔH between a width of the first through groove along the first direction and a width of the first electrode in the first direction satisfies: 15 μm≤ΔH≤25 μm; The first direction is an alternating arrangement direction of the first passivation contact layer and the second passivation contact layer, and the first direction is parallel to the first surface.

4. The solar cell according to claim 1, characterized in that The first through groove is arranged to extend along the second direction; The second direction is an extension direction of the first electrode, and the second direction is parallel to the first surface.

5. The solar cell according to claim 1, characterized in that: A first electrode accommodating groove is provided in a portion of the first dielectric layer located in the first through groove, and one end of the first electrode facing the substrate is located in the first electrode accommodating groove and contacts with two side walls of the first electrode accommodating groove along a first direction; The first direction is an alternating arrangement direction of the first passivation contact layer and the second passivation contact layer, and the first direction is parallel to the first surface.

6. The solar cell according to any one of claims 1 to 5, characterized in that: The thickness of the first dielectric layer is 50nm-120nm; and / or The thickness of the first passivation film layer is 5nm-12nm.

7. The solar cell according to any one of claims 1 to 6, characterized in that: The solar cell further includes a second electrode, which penetrates through the first dielectric layer and the first passivation film layer and contacts the second passivation layer.

8. The solar cell according to claim 7, characterized in that: The second electrode is in ohmic contact with the second polysilicon doped conductive layer.

9. The solar cell according to claim 7, characterized in that: The second passivation contact layer further includes a second transparent conductive oxide layer, which is disposed on a side of the second polysilicon-doped conductive layer away from the substrate, and the second electrode is in ohmic contact with the second transparent conductive oxide layer.

10. The solar cell according to any one of claims 1 to 9, characterized in that: The first passivation contact layer further includes a first transparent conductive oxide layer, which is disposed on a side of the first polysilicon-doped conductive layer away from the substrate, and the first electrode is in ohmic contact with the first transparent conductive oxide layer.

11. The solar cell according to claim 10, characterized in that The thickness of the first transparent conductive oxide layer is 30 nm-150 nm.

12. The solar cell according to any one of claims 1 to 11, characterized in that: The substrate includes a second surface disposed opposite to the first surface; The solar cell further comprises a second passivation film layer and a second dielectric layer sequentially stacked on the second surface of the substrate; Optionally, the thickness of the second dielectric layer is 180nm-220nm; Optionally, the thickness of the second passivation film layer is 11nm-15nm.

13. A solar cell comprising a substrate, a first passivation contact layer and a second passivation contact layer, a first passivation film layer and a first dielectric layer, and a first electrode; The first passivation contact layer and the second passivation contact layer are spaced apart from each other and are disposed on the first surface of the substrate, the first passivation contact layer includes a first polysilicon doped conductive layer, the second passivation contact layer includes a second polysilicon doped conductive layer, the doping concentration of the second polysilicon doped conductive layer is greater than that of the first polysilicon doped conductive layer, and the doping type of the second polysilicon doped conductive layer is opposite to that of the first polysilicon doped conductive layer; an insulating isolation groove is constructed between the first passivation contact layer and the second passivation contact layer; A first passivation film layer is stacked on the first passivation contact layer, the insulating isolation groove and the second passivation contact layer, a first through groove is opened in the region of the first passivation film layer corresponding to the first polysilicon doped conductive layer, and one end of the first electrode passes through the first through groove to make ohmic contact with the first passivation contact layer; The first dielectric layer covers the first passivation film layer and covers the first region on the first passivation contact layer; in, The first region is a region of the surface of the first passivation contact layer exposed from the first through-groove and located between the sidewall of the first through-groove and the first electrode.

14. A solar cell comprising a substrate, a passivation contact layer, a passivation film layer, a dielectric layer, and an electrode; The passivation contact layer is disposed on a surface of the substrate; The passivation film layer is stacked on the first passivation contact layer, the passivation film layer is provided with a through groove, and one end of the electrode passes through the through groove to make ohmic contact with the passivation contact layer; The dielectric layer covers the passivation film layer and covers the first region of the passivation contact layer; in, The first region is a region of the surface of the passivation contact layer exposed from the through-trench and located between the sidewall of the through-trench and the electrode.

15. A method for manufacturing a solar cell, characterized in that: include: A substrate is provided, the substrate comprising a base, a first passivation contact layer and a second passivation contact layer, the first passivation contact layer and the second passivation contact layer are alternately arranged on a first surface of the base, the first passivation contact layer comprises a first polysilicon doped conductive layer, the second passivation contact layer comprises a second polysilicon doped conductive layer, the doping concentration of the second polysilicon doped conductive layer is greater than that of the first polysilicon doped conductive layer, and the doping type of the second polysilicon doped conductive layer is opposite to that of the first polysilicon doped conductive layer; an insulating isolation groove is constructed between each adjacent first passivation contact layer and the second passivation contact layer; forming a first passivation film layer on the first passivation contact layer, in the insulating isolation groove and on the second passivation contact layer, and opening first through grooves in regions of the first passivation film layer corresponding to the first polysilicon-doped conductive layers; forming a first dielectric layer on the first passivation film layer, so that the first dielectric layer covers the first passivation film layer and covers the surface of the first passivation contact layer exposed from the first through groove; A first electrode is formed on a portion of the first dielectric layer located in the first through-groove, and the first electrode penetrates the first dielectric layer to make ohmic contact with the first passivation contact layer.

16. The method for manufacturing a solar cell according to claim 15, characterized in that: The step of forming first through grooves in regions of the first passivation film layer corresponding to each of the first polysilicon-doped conductive layers specifically includes: The first through groove is opened on the first passivation film layer by using a photolithography process.

17. The method for manufacturing a solar cell according to claim 15 or 16, characterized in that: Before the step of forming a first passivation film layer on the first passivation contact layer, in the insulating isolation groove and on the second passivation contact layer, the method further includes: A textured structure and a second passivation film layer are formed on a second surface of the base of the substrate, and the second surface is arranged opposite to the first surface.

18. The method for manufacturing a solar cell according to claim 17, characterized in that: The step of forming a first dielectric layer on the first passivation film specifically includes: A second dielectric layer is formed on the second passivation film layer, a first dielectric layer is formed on the first passivation film layer, and the first dielectric layer is deposited and covers the first through-groove.

19. The method for manufacturing a solar cell according to claim 17 or 18, characterized in that: After the step of forming the first passivation film layer and the second passivation film layer, before the step of opening a first through groove in the region of the first passivation film layer corresponding to each of the first polysilicon-doped conductive layers, the step also includes: annealing the first passivation film layer and the second passivation film layer to activate the first passivation film layer and the second passivation film layer.

20. The method for manufacturing a solar cell according to any one of claims 17 to 19, characterized in that: After forming the suede structure and before forming the second passivation film layer and the first passivation film layer, the method further includes: A first transparent conductive oxide layer is formed on the first polysilicon doped conductive layer, and a second transparent conductive oxide layer is formed on the second polysilicon doped conductive layer.

21. The method for manufacturing a solar cell according to claim 20, characterized in that: After the step of forming the first electrode, the method further comprises: A second electrode receiving groove is provided in the first dielectric layer and the first passivation film layer in the region corresponding to the second polysilicon doped conductive layer, a second electrode is formed in the second electrode receiving groove, and the second electrode is in ohmic contact with the second transparent conductive oxide layer.

22. The method for manufacturing a solar cell according to any one of claims 15 to 21, characterized in that: The outermost film layer of the first passivation contact layer away from the substrate is the first polysilicon doped conductive layer; The step of forming a first electrode on a portion of the first dielectric layer located in the first through groove, and making the first electrode penetrate the first dielectric layer and make ohmic contact with the first passivation contact layer comprises: A first paste is printed on a portion of the first dielectric layer located in the first through-groove, and sintered, so that the first paste penetrates the first dielectric layer and contacts the first polysilicon-doped conductive layer.

23. A photovoltaic module, characterized in that: The method comprises at least one battery string, wherein the battery string comprises at least two solar cells according to any one of claims 1 to 14.

24. A photovoltaic system, characterized in that: Comprising the photovoltaic module as shown in claim 23.

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