Driving stage circuit for driving capacitive load, and driving circuit

Abstract

The present application discloses a driving stage circuit for driving a capacitive load, and a driving circuit. The driving stage circuit comprises a push-pull amplification module and a feedback amplifier. The push-pull amplification module comprises a first transistor having a first conductivity type and a second transistor having a second conductivity type connected in series between a first voltage terminal and an output node. The second transistor is configured to transfer energy from the first voltage terminal to a capacitive load in a first working interval of a working cycle. The first transistor is configured to transfer energy from the capacitive load to the first voltage terminal during a first phase in a second working interval of the working cycle. The feedback amplifier is configured to control, by using an input signal as a reference feedback, the first transistor and the second transistor, so that a waveform of an output signal provided to the capacitive load corresponds to a waveform of the input signal. Therefore, the system stability, the linearity, and the signal quality can be taken into account while the energy utilization efficiency is improved, the distortion and noise interference are reduced, and the overall performance of the circuit is improved.

Description

Driver stage circuit and driver circuit for driving capacitive load

[0001] This application claims priority to a Chinese invention application filed on September 11, 2023, with application number 2023111679208 and titled “Driver stage circuit and drive circuit for driving capacitive loads,” and incorporates the entire specification, claims, drawings, and abstract of the aforementioned Chinese invention application into this application by reference. Technical Field

[0002] The present invention relates to the technical field of capacitive load driving, and more particularly, to a driving stage circuit and a driving circuit for driving a capacitive load. Background Art

[0003] Piezoelectric elements are functional ceramic materials that can convert mechanical energy into electrical energy and vice versa. Due to their piezoelectric properties, they are widely used in various electronic devices. For example, a piezoelectric transducer can be thought of as a large capacitor constructed from a piezoelectric element formed by a piezoelectric material sandwiched between two electrodes. Under the influence of an applied electric field, the piezoelectric material can act as both a dielectric between the electrodes and a charging actuator. Therefore, piezoelectric transducers are increasingly seen as a viable alternative to transducers such as speakers and resonant actuators. Due to their advantages such as ultra-thinness, ultra-lightness, durability, and easy installation, piezoelectric transducers are widely used in devices such as mobile phones, laptops, and tablets to provide audio and / or tactile output.

[0004] Due to the capacitive nature of thin-film piezoelectric transducers, these transducers present a highly capacitive load to the amplifier. However, conventional driver circuits (such as Class AB, D, G, and H amplifiers) assume that the load (a coil made of very thin wire) is primarily resistive with some inductive characteristics. Consequently, these amplifiers are inefficient when driving highly capacitive loads such as piezoelectric transducers. Furthermore, due to the capacitive nature of the load, the current is approximately 90° out of phase with the drive voltage. As a result, the piezoelectric transducer does not actually consume much power during the charging phase; most of the energy drawn by the transducer is stored in the load's capacitance. However, during the discharge phase, when the voltage across the transducer drops, conventional Class AB, D, G, and H amplifiers simply waste energy by discharging it from the load's capacitance to ground or the negative power supply.

[0005] Figure 1 shows a schematic diagram of a prior art circuit for driving a capacitive load. As shown in Figure 1, prior art circuit 100 uses a power conversion circuit 110 to control energy transfer between two sources. Power conversion circuit 110 is composed of chopper switches K1 and K2 and an inductor L1. This circuit 100 only requires that the voltage on the voltage source SRC_A side be higher than the voltage on the voltage source SRC_B side, and does not restrict the direction of current flow. By alternating the switching on and off of chopper switches K1 and K2, the direction of current flow, and thus the direction of energy transfer, can be changed. Both SRC_A and SRC_B in Figure 1 can be the capacitive energy storage components of a capacitive load. For example, in the case of SRC_A being a capacitive load and SRC_B being a power source, resistor R2 represents the internal resistance of the power source. Power conversion circuit 110 boosts the voltage on SRC_B to drive the capacitive load on SRC_A. When the capacitive energy storage on the SRC_A side accounts for a high proportion of the effective load consumption and the voltage on SRC_A is high, the charge on the capacitive energy storage can be pumped back to the power supply via power conversion circuit 110, improving circuit efficiency. While circuit 100 in Figure 1 can improve circuit efficiency when driving capacitive loads, the voltage and current on both sides of circuit 100 experience severe fluctuations, particularly on the SRC_A side, where the voltage and current are completely pulsed. Consequently, this circuit 100 suffers from poor signal quality when driving piezoelectric speakers and cannot effectively adjust the signal amplitude when it is too low.

[0006] FIG2 shows another circuit schematic diagram of a prior art circuit for driving a capacitive load. As shown in FIG2 , the prior art circuit 200 improves the continuity of the driving signal by adding energy storage capacitors C1 and C2 at both ends of a power conversion circuit 210. However, for some applications, a more powerful method is still needed to improve the driving signal. Summary of the Invention

[0007] In view of the above problems, the purpose of this application is to provide a driving stage circuit and a driving circuit for driving a capacitive load, which can recover the energy in the capacitive load to the power supply during the driving process to realize energy reuse, and improve the signal quality through negative feedback control during the energy recovery process, thereby improving the energy utilization efficiency while taking into account the overall performance of the circuit.

[0008] According to one aspect of the present invention, a driving stage circuit for driving a capacitive load is provided, comprising: an output node for connecting to the capacitive load; a push-pull amplification module, comprising a first transistor with a first conductivity type and a second transistor with a second conductivity type connected in series between a first voltage terminal and the output node, the second transistor being used to transfer energy from the first voltage terminal to the capacitive load in a first working interval of a working cycle, and the first transistor being used to transfer energy from the capacitive load to the first voltage terminal in a first stage of a second working interval of the working cycle; and a feedback amplifier having an inverting input terminal connected to the output node, a non-phase input terminal for receiving an input signal, and a first output terminal, the first output terminal being used to output a first control signal applied to the control terminals of the first transistor and the second transistor, wherein the feedback amplifier is used to feedback-control the first transistor and the second transistor with the input signal as a reference, so that the waveform of the output signal provided to the capacitive load corresponds to the waveform of the input signal.

[0009] Optionally, the push-pull amplification module also includes: a third transistor with the first conductivity type connected between the output node and the ground, the third transistor being used to transfer energy from the capacitive load to the ground in the second stage in the second working interval, wherein the feedback amplifier also has a second output terminal, the second output terminal is used to output a second control signal applied to the control terminal of the third transistor, and the first control signal and the second control signal are complementary signals to each other.

[0010] Optionally, the capacitive load includes a piezoelectric actuator or an acoustic transducer, wherein the first voltage end further includes an energy storage element, wherein the energy storage element is an energy storage capacitor.

[0011] Optionally, the driving stage circuit also includes: a buffer connected between the first output terminal of the feedback amplifier and the control terminals of the first transistor and the second transistor; and a voltage selection module for selecting the larger voltage between the first voltage and the output signal to power the buffer, wherein the voltage selection module includes: a first diode, the anode of the first diode is connected to the first voltage terminal, and the cathode of the first diode is connected to the power supply terminal of the buffer; and a second diode, the anode of the second diode is connected to the output node, and the cathode of the second diode is connected to the power supply terminal of the buffer.

[0012] Optionally, the feedback amplifier is used to control the first transistor and the third transistor to be cut off in the first working interval, and to control the state of the second transistor so that the output signal corresponds to the first interval of the input signal, and to control the second transistor to be cut off in the second working interval, and to control the state of the first transistor or the third transistor so that the output signal corresponds to the second interval of the input signal.

[0013] Optionally, the first interval is an interval in which the input signal increases from a minimum value to a maximum value, and the second interval is a falling portion of the input signal within the period.

[0014] Optionally, the first stage of the second working interval is a stage in which the first voltage is less than the voltage of the output signal minus a second threshold, and the second stage is a stage in which the first voltage is greater than the voltage of the output signal minus the second threshold, wherein the second threshold is the body diode voltage drop of the transistor.

[0015] Optionally, the waveform of the input signal is a sine wave with a voltage value not less than zero, wherein the first conductivity type is N-type and the second conductivity type is P-type.

[0016] According to another aspect of the present invention, a driving circuit for driving a capacitive load is provided, comprising: a power conversion circuit for receiving a power supply voltage provided by a voltage source and converting the power supply voltage into a first voltage, wherein the voltage source has energy storage capability; and the above-mentioned driving stage circuit for receiving the first voltage and generating an output signal provided to the capacitive load with an input signal as a reference, wherein the output signal corresponds to the waveform of the input signal.

[0017] Optionally, the power conversion circuit can operate bidirectionally, and the power conversion circuit includes a dual-switch buck-boost converter, a switched tapped inductor buck-boost converter, or a switched flyback buck-boost converter.

[0018] In summary, the driving stage circuit for driving a capacitive load provided by the present invention includes a push-pull amplification module and a feedback amplifier. The push-pull amplification module includes an NMOS transistor and a PMOS transistor connected in series between a first voltage terminal and an output node. The PMOS transistor is used to transfer energy from the first voltage terminal to the capacitive load in a first working interval of a working cycle, and the NMOS transistor is used to transfer energy from the capacitive load to the first voltage terminal in part of the second working interval of the working cycle. The feedback amplifier is used to feedback control the NMOS transistor and the PMOS transistor with an input signal as a reference, so that the waveform of the output signal provided to the capacitive load corresponds to the waveform of the input signal.

[0019] The driver stage circuit of the present invention can realize energy recovery and reuse in the process of driving a capacitive load, thereby improving energy utilization efficiency. In addition, the driver circuit of the present invention can also correct the nonlinear distortion of the circuit through negative feedback control during the energy recovery process, so that the output signal is closer to the shape and amplitude of the input signal, thereby improving the quality of the output signal. Therefore, the driver stage circuit and the driver circuit provided by the present invention can take into account the stability, linearity and signal quality of the system while improving energy utilization efficiency, reduce distortion and noise interference, and improve the overall performance of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0021] FIG1 shows a schematic diagram of a circuit for driving a capacitive load in the prior art.

[0022] FIG2 shows a schematic diagram of another circuit for driving a capacitive load in the prior art.

[0023] FIG3 shows another circuit schematic diagram for driving a capacitive load.

[0024] FIG4 shows a schematic diagram of the internal circuit of the amplifier 320 in FIG3 .

[0025] FIG. 5 is a schematic diagram showing a waveform of a sound having multiple harmonics.

[0026] FIG6 shows a schematic diagram of a circuit for driving a capacitive load according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present invention. However, the present invention may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present invention.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0029] It should be understood that in the following description, when an element or circuit is said to be "coupled to" another element or an element / circuit is said to be "coupled between" two nodes, it can be directly coupled or connected to the other element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly coupled to" another element, it means that there are no intermediate elements between the two.

[0030] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

[0031] Figure 3 shows another circuit diagram for driving a capacitive load. As shown in Figure 3, using SRC_B as the power source and SRC_A as the load, power conversion circuit 310 boosts the input voltage of SRC_B to generate voltage SRC_BST. Voltage SRC_BST is then supplied to the power supply terminal of amplifier 320, which improves the continuity of the drive signal.

[0032] Figure 4 shows a schematic diagram of the internal circuit of amplifier 320 in Figure 3. As shown in Figure 4, amplifier 320 includes a push-pull circuit consisting of transistors Q2 and Q3, a feedback amplifier A1, and a buffer B1. Transistors Q2 and Q3 are sequentially connected between a voltage SRC_BST and ground, with their common node serving as an output connected to a capacitive load on the SRC_A side. Feedback amplifier A1 has an inverting input connected to the output node of transistors Q2 and Q3, a non-inverting input connected to an input signal IN, a non-inverting output connected to the control terminal of transistor Q3, and an inverting output connected to the control terminal of transistor Q2 via buffer B1. The power supply terminal of buffer B1 is connected to voltage SRC_BST. In this embodiment, transistor Q2 is an NMOS transistor and transistor Q3 is a PMOS transistor. Transistor Q2 pulls up the output, while transistor Q3 pulls down the output. When pulling the output signal up, if the amplitude of voltage SRC_BST rises according to the output requirements so that the voltage difference across transistor Q2 just meets its operating requirements, transistor Q2's conduction losses are minimized. The output signal is controlled by feedback amplifier A1, ensuring that signal distortion and interference are well controlled. When pulling the output signal down, if voltage SRC_BST remains higher than the output signal, and transistor Q3 performs the pull-down operation, the energy storage voltage on the capacitive load is fully shared by the active load R1 and the static power consumption of transistor Q3. If voltage SRC_BST is lower than the voltage at SRC_A, the portion of the energy stored, minus the power consumption of active load R1, can be withdrawn back to the power supply through transistor Q2's body diode. When the capacitive energy storage is high relative to the active load power consumption and the voltage at SRC_A is high, this charge withdrawal back to the power supply improves circuit efficiency.

[0033] FIG5 is a schematic diagram of a waveform of a sound with multiple harmonics. As shown in FIG5 , a large number of back-channels are present in the actual sound waveform. These back-channels are caused by local pull-downs at higher voltages. Since the voltage on the capacitive load remains at a high voltage during the pull-down, if this energy is not withdrawn back to the power supply side but released to ground by transistor Q3, the circuit will suffer significant energy loss.

[0034] Continuing with Figure 4 , in conventional amplifier 320 , when the output signal is pulled up, transistor Q2 is an inverter operating in Class-A mode. Considering that the inverted output of feedback amplifier A1 controls the gate voltage of transistor Q2 via buffer B1, after two inversions, the output signal controlled by transistor Q2 is actually in phase with the input signal. Furthermore, the output signal is connected to the inverting input of feedback amplifier A1, forming a negative feedback amplifier. Therefore, during the pull-up phase of the output signal, amplifier 320 can use transistor Q2 to provide negative feedback regulation on the output signal. However, during the pull-down phase, the output of buffer B1 remains at voltage SRC_BST, and the charge on the capacitive load side can only be drawn back to the power supply side via the body diode of transistor Q2. Therefore, feedback amplifier A1 cannot implement negative feedback regulation via transistor Q2.

[0035] Therefore, in the driving circuit shown in FIG3 , it is not possible to simultaneously improve efficiency and ensure signal quality when the driving signal is pulled down, and an improvement is needed.

[0036] 6 shows a schematic structural diagram of a driving circuit 400 according to an embodiment of the present invention. The driving circuit 400 is coupled between a voltage source 401 and a load 402, and receives an input signal IN to drive the load 402 according to the input signal IN.

[0037] Voltage source 401 may have energy storage capabilities. For example, voltage source 401 may include a battery (which may or may not be a rechargeable battery) or a DC power source, such as a power conversion circuit. In one embodiment, voltage source 401 (such as a power conversion circuit) may include a capacitor or have capacitive properties.

[0038] In one embodiment, load 402 may include a speaker, or equivalently, a sound-generating device or an acoustic transducer. In this case, input signal IN may be an audio signal. In one embodiment, the speaker within load 402 may include a piezoelectrically actuated speaker. Specifically, driver circuit 400 may be connected to a piezoelectric actuator of the piezoelectrically actuated speaker. The piezoelectric actuator within load 402 may include a piezoelectric layer sandwiched between a first / top electrode and a second / bottom electrode. Furthermore, driver circuit 400 may be connected to electrodes of the piezoelectric actuator. Note that significant capacitance exists between the first / top electrode and the second / bottom electrode.

[0039] Specifically, the driving circuit 400 includes a power conversion circuit 410 and a driving stage circuit 420. The power conversion circuit 410 is configured to generate a first voltage V with a smooth waveform according to a power supply voltage VCC provided by a voltage source 401. S and the first voltage V S The first voltage Vs is stored in the energy storage capacitor of the power conversion circuit 410. The driving stage circuit 420 is used to receive the first voltage Vs and generate an output signal OUT provided to the load 402 with reference to the input signal IN. The output signal OUT has a waveform corresponding to the input signal IN.

[0040] For example, the driving stage circuit 420 is used to generate a voltage V in a first working interval of a working cycle. S A charging current is generated for the load 402 so that the output signal provided to the load 402 corresponds to the first interval of the input signal IN; at the same time, a current is drawn from the load 402 during the second operating interval of a working cycle so that the output signal corresponds to the second interval of the input signal IN. In this regard, the energy stored in the capacitance within the load 402 during the first operating interval can be recovered and returned to the capacitance within the voltage source 401 during the second operating interval, thereby reducing the total energy consumption and improving the circuit efficiency. In this embodiment, the power conversion circuit 410 and the driver stage circuit 420 operate independently and do not interfere with each other. After stabilization, the voltage on the energy storage capacitor (not shown) in the power conversion circuit 410 is the first voltage Vs.

[0041] In an exemplary embodiment, the power conversion circuit 410 is configured as a power stage circuit with a boost function.

[0042] In an exemplary embodiment, the driver stage circuit 420 is configured as an amplifier circuit with a push-pull output, comprising two amplifiers with complementary outputs. One amplifier is configured to pull up the output signal in the first operating range, and the other amplifier is configured to pull down the output signal in the second operating range. By combining the outputs of the two amplifiers, non-inverting amplification of the input signal IN is ultimately achieved, resulting in an output signal consistent with the input signal IN being obtained on the load 402. The driver stage circuit 420 of this embodiment also has a high current output capability, enabling it to drive large loads such as various capacitive loads.

[0043] In an exemplary embodiment, the first interval is a time interval corresponding to the upswing portion of the input signal IN as it increases from a minimum value to a maximum value, and the second interval is a time interval corresponding to the downswing portion of the input signal IN within the cycle. Furthermore, the waveform of the input signal IN is a harmonic signal represented by a sine wave. For example, the input signal IN can be a harmonic signal with a value not less than zero (a waveform obtained by introducing additional harmonic components into a standard sine wave and shifting them upward so that the minimum amplitude is equal to or greater than 0). In other embodiments, the waveform of the input signal IN is a full-wave rectified waveform, or can be in other forms, as long as the value of the input signal IN is not less than zero. For ease of description, the subsequent embodiments of the present invention take the waveform of the input signal IN as a harmonic signal with a value not less than zero as an example, but the present invention is not limited to this.

[0044] In this embodiment, the power conversion circuit 410 is a bidirectional power conversion circuit. It will be understood that when the bidirectional power conversion circuit 410 is used to drive a capacitive load, the bidirectional power conversion circuit 410 is allowed to transmit power in two directions: from the voltage source 401 to the load 402, and from the load 402 to the voltage source 401.

[0045] In this embodiment, the topology of the power conversion circuit 410 can be implemented using topologies such as a dual-switch buck-boost converter, a switch-tapped inductor buck-boost converter, and a switch flyback buck-boost converter. The present invention does not impose any restrictions on this. By controlling the alternating on / off of the two switches in the converter, the current direction is changed, that is, the direction of energy transfer is changed.

[0046] FIG7 shows a circuit diagram of a driving circuit 400 according to an embodiment of the present invention. As shown in FIG7 , the power conversion circuit 410 includes an inductor L1 connected to a voltage source 401, and is coupled to the inductor L1 and a first voltage V SThe first switch K1 is coupled between the output terminal of the inductor L1 and the ground terminal, and the second switch K2 is coupled to the first voltage V S The energy storage capacitor C1 is connected between the output terminal and the ground terminal. The gates of the transistors in the first switch K1 and the second switch K2 are coupled to a pulse width modulation controller (not shown in the figure).

[0047] The first switch K1 and the second switch K2 can be of the same type, which is the most practical option for integrated circuit (IC) implementation. Embodiments with hybrid switches are also possible. The first switch K1 and the second switch K2 can be, for example, GaN or MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), among other possible switches.

[0048] The driver stage circuit 420 includes a push-pull amplification module 421, a voltage selection module 422, a feedback amplifier A1, and a buffer B1. The push-pull amplification module 421 is configured to receive the first voltage Vs during a first operating interval of a working cycle to charge the load 402, such that the output signal OUT provided to the load 402 corresponds to the first interval of the input signal IN. The push-pull amplification module 421 is configured to draw current from the load 402 during a second operating interval of the working cycle, such that the output signal OUT corresponds to the second interval of the input signal IN.

[0049] Furthermore, the push-pull amplifier module 421 includes an NMOS transistor Q1, a PMOS transistor Q2, and an NMOS transistor Q3 connected in series between the first voltage Vs and ground. The gates of the NMOS transistor Q1 and the PMOS transistor Q2 are connected to each other, and the PMOS transistor Q2 and the NMOS transistor Q3 are connected in a push-pull amplifier configuration. Their drains are connected to an output node OUT for connection to the load 402. Transistor Q2 is configured to charge the load 402 according to the first voltage Vs during the first operating interval, thereby pulling up the output node OUT. Transistor Q3 is configured to provide a discharge path from the load 402 to ground during a portion of the second operating interval, thereby pulling down the output node OUT. For example, the portion of the phase corresponds to a phase in which the first voltage Vs is greater than the voltage of the output signal OUT minus a second threshold, where the second threshold is the body diode voltage drop of the transistor.

[0050] Furthermore, the transistor Q1 is configured to provide a discharge path for the load 402 to the first voltage terminal Vs during another phase of the second operating interval, thereby allowing the output node OUT to be pulled down while simultaneously recovering energy stored in the load 402 to the voltage source 401, thereby improving the energy utilization efficiency of the circuit. For example, the another phase may be a phase in which the first voltage Vs is less than the voltage of the output signal OUT minus the second threshold, where the second threshold is the body diode voltage drop of the transistor.

[0051] Furthermore, the feedback amplifier A1 is used to modulate transistors Q1 to Q3 using the input signal IN as a reference during the pull-up and pull-down processes of the output node OUT, so that distortion and interference of the output signal can be well controlled, providing high linearity. For example, the feedback amplifier A1 has an inverting input connected to the output node OUT, a non-inverting input for receiving the input signal IN, a non-inverting output connected to the gate of transistor Q3 to provide a control signal NG to the gate of transistor Q3, and an inverting output connected to the gates of transistors Q1 and Q2 to provide a control signal PG to the gates of transistors Q1 and Q2. For example, the control signals NG and PG are complementary signals. Furthermore, the control signal NG varies in phase with the input signal IN, and the control signal PG varies in phase opposite to the input signal IN.

[0052] Buffer B1 is connected between the inverting output terminal of feedback amplifier A1 and the gates of transistors Q1 and Q2 to provide stronger driving capability at the gates of transistors Q1 and Q2, ensuring that the output of feedback amplifier A1 can effectively drive transistors Q1 and Q2.

[0053] The voltage selection module 422 is configured to select a higher voltage between the first voltage Vs and the output signal OUT to drive and power the buffer B1, thereby enabling the output of the buffer B1 to be pulled up to a higher voltage level. Furthermore, the voltage selection module 422 includes diodes D3 and D4. The anode of the diode D3 is connected to the first voltage Vs, and the cathode of the diode D3 is connected to the power supply terminal of the buffer B1. The anode of the diode D4 is connected to the output node OUT, and the cathode of the diode D4 is connected to the power supply terminal of the buffer B1.

[0054] Furthermore, at the beginning of the first operating interval (i.e., the rising phase of the signal), the control signal NG output by the feedback amplifier A1 is at a low level, thus turning off transistor Q3. Furthermore, the control signal PG output by the inverting output terminal of the feedback amplifier A1 is at a high level, thus turning on the output of the buffer B1. Furthermore, since the supply voltage of the buffer B1 is equal to the first voltage Vs (which is greater than the output signal OUT), the output of the buffer B1 does not exceed the first voltage Vs. Consequently, the gate-source voltage VGS of the transistor Q1 does not reach the turn-on threshold, preventing it from turning on. Consequently, the transistor Q1 is turned off. At this point, the first voltage Vs charges the load 402 via the body diode D1 of the transistor Q1 and the conduction channel of the transistor Q2. At this time, transistor Q2 is an inverter operating in the Class-A state. The Class-A inverter amplifies the entire amplitude range of the input signal IN to the output node OUT by operating transistor Q2 in the amplification region within the first operating range, providing higher linearity, so that the output signal OUT corresponds to the first range of the input signal IN.

[0055] During the second operating range (i.e., the falling phase of the signal), feedback amplifier A1 controls transistor Q2 to be cut off and controls transistors Q1 and / or Q3 to operate in the amplification region to pull down output node OUT, thereby causing output signal OUT to correspond to the second range of input signal IN. Furthermore, during the second operating range for pulling down output node OUT, transistors Q1 and Q3 provide two discharge paths based on the magnitude relationship between first voltage Vs and the voltage at output node OUT. For example, when the first voltage Vs is greater than the voltage at the output node OUT minus the second threshold value, the conductivity of the transistor Q3 is enhanced in the second working interval, and the load 402 discharges to the ground through the discharge path provided by the channel of the transistor Q3 to pull down the output node OUT; when the first voltage Vs is less than the voltage at the output node OUT, the conductivity of the transistor Q1 is enhanced in the second working interval, and the load 402 discharges to the first voltage terminal Vs1 through the body diode D2 of the transistor Q2 and the channel of the transistor Q1, which can also pull down the output node OUT, and can also recover the energy in the load 402 to the voltage source 401 through the power conversion circuit 410.

[0056] In summary, the driver stage circuit for driving a capacitive load provided by the present invention includes a push-pull amplifier module and a feedback amplifier, the push-pull amplifier module includes an NMOS transistor Q1 and a PMOS transistor Q2 connected in series between a first voltage terminal and an output node, the PMOS transistor Q2 is used to transfer energy from the first voltage terminal to the capacitive load in a first working interval of a working cycle, and the NMOS transistor Q1 is used to transfer energy from the capacitive load to the first voltage terminal in a partial stage of the second working interval of the working cycle, and the feedback amplifier is used to feedback control the NMOS transistor Q1 and the PMOS transistor Q2 with an input signal as a reference so that the waveform of the output signal provided to the capacitive load corresponds to the waveform of the input signal. The driver stage circuit of the present invention can realize energy recovery and reuse in the process of driving the capacitive load, thereby improving energy utilization efficiency. In addition, the driver circuit of the present invention can also correct the nonlinear distortion of the circuit through negative feedback control during the energy recovery process, so that the output signal is closer to the shape and amplitude of the input signal, thereby improving the quality of the output signal. Therefore, the driver stage circuit and the driver circuit provided by the present invention can take into account the stability, linearity and signal quality of the system while improving energy utilization efficiency, reduce distortion and noise interference, and improve the overall performance of the circuit.

[0057] It should be noted that, in the description of the present invention, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or apparatus comprising the element.

[0058] Finally, it should be noted that the above embodiments are merely examples for the purpose of illustrating the present invention and are not intended to limit the embodiments. Those skilled in the art will readily appreciate that other variations or modifications based on the above description are possible. It is not necessary and impossible to provide an exhaustive list of all embodiments. However, obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. A driving stage circuit for driving a capacitive load, comprising: An output node, used for connecting to the capacitive load; A push-pull amplification module, comprising a first transistor with a first conductivity type and a second transistor with a second conductivity type connected in series between a first voltage terminal and the output node, wherein the second transistor is used to transfer energy from the first voltage terminal to the capacitive load in a first working interval of a working cycle, and the first transistor is used to transfer energy from the capacitive load to the first voltage terminal in a first stage in a second working interval of the working cycle; as well as a feedback amplifier having an inverting input terminal connected to the output node, a non-inverting input terminal for receiving an input signal, and a first output terminal, wherein the first output terminal is used to output a first control signal applied to the control terminals of the first transistor and the second transistor, The feedback amplifier is used to feedback-control the first transistor and the second transistor with reference to the input signal, so that the waveform of the output signal provided to the capacitive load corresponds to the waveform of the input signal.

2. The driving stage circuit according to claim 1, wherein: The push-pull amplification module also includes: a third transistor of the first conductivity type connected between the output node and ground, the third transistor being used to transfer energy from the capacitive load to ground in a second phase in the second operating interval, The feedback amplifier further has a second output terminal, and the second output terminal is used to output a second control signal applied to the control terminal of the third transistor, and the first control signal and the second control signal are complementary signals to each other.

3. The driving stage circuit according to claim 1, wherein: The capacitive load includes a piezoelectric actuator or an acoustic transducer, Wherein, the first voltage end also includes an energy storage element, wherein the energy storage element is an energy storage capacitor.

4. The driving stage circuit according to claim 1, wherein: Also includes: a buffer connected between the first output terminal of the feedback amplifier and the control terminals of the first transistor and the second transistor; as well as a voltage selection module, configured to select a larger voltage between the first voltage and the output signal to power the buffer, Wherein, the voltage selection module comprises: a first diode, wherein an anode of the first diode is connected to the first voltage terminal, and a cathode of the first diode is connected to a power supply terminal of the buffer; and A second diode, wherein an anode of the second diode is connected to the output node, and a cathode of the second diode is connected to the power supply terminal of the buffer.

5. The driving stage circuit according to claim 2, wherein: The feedback amplifier is used to control the first transistor and the third transistor to be turned off in the first working interval, and to control the state of the second transistor, so that the output signal corresponds to the first interval of the input signal, and In the second working interval, the second transistor is controlled to be cut off, and the state of the first transistor or the third transistor is controlled so that the output signal corresponds to the second interval of the input signal.

6. The driving stage circuit according to claim 5, wherein: The first interval is an interval in which the input signal increases from a minimum value to a maximum value, and the second interval is a falling portion of the input signal in the period.

7. The driving stage circuit according to claim 2, wherein: The first stage of the second working interval is a stage in which the first voltage is less than the voltage of the output signal minus the second threshold, and the second stage is a stage in which the first voltage is greater than the voltage of the output signal minus the second threshold, wherein the second threshold is the body diode voltage drop of the transistor.

8. The driving stage circuit according to any one of claims 1 to 7, wherein: The waveform of the input signal is a sine wave with a voltage value not less than zero. The first conductivity type is N-type, and the second conductivity type is P-type.

9. A driving circuit for driving a capacitive load, comprising: A power conversion circuit, configured to receive a power supply voltage provided by a voltage source and convert the power supply voltage into a first voltage, wherein the voltage source has an energy storage capability; as well as The driving stage circuit according to any one of claims 1 to 8 is used to receive the first voltage and generate an output signal provided to the capacitive load with the input signal as a reference, wherein the output signal corresponds to the waveform of the input signal.

10. The driving circuit according to claim 9, wherein: The power conversion circuit can operate bidirectionally. The power conversion circuit includes a dual-switch buck-boost converter, a switched tapped inductor buck-boost converter, or a switched flyback buck-boost converter.

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