Electronic assembly, electronic device, and manufacturing method for electronic assembly

Abstract

The present application provides an electronic assembly, an electronic device, and a manufacturing method for an electronic assembly. The electronic device comprises a first device, a second device, and at least two leads, the first device comprises a first pad, and the second device comprises a second pad. The at least two leads comprise a first lead and a second lead, the first lead is soldered between the first pad and the second pad, and the second lead is also soldered between the first pad and the second pad. The first lead and the second lead are connected in parallel, so that parasitic inductance caused by a lead is reduced, the operation bandwidth of the electronic assembly is increased, the signal transmission rate of the electronic assembly is improved, and the electronic assembly has good performance. A solder joint between the first lead and the first pad and a solder joint between the second lead and the first pad are stacked. Thus, the size of the first pad can be designed to be small, which is conducive to increasing the pad density of the first device and the signal transmission line density of the first device.

Description

Electronic component, electronic equipment and method for preparing electronic component

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on September 28, 2023, with application number 202311284163.2 and application name "An electronic component, an electronic device and a method for preparing an electronic component", the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the technical field of electronic equipment, and in particular to an electronic component, an electronic device, and a method for preparing the electronic component. Background Art

[0004] In the semiconductor field, many chips and substrates are packaged to form chip modules, which are then used in electronic devices. During the chip packaging process, wire bonding is used to connect the chips to each other and to the substrate. Specifically, wire bonding is a process used in the chip packaging industry that typically uses thin metal wires to connect chips to each other or to the substrate, allowing signals to be transmitted through the metal wires.

[0005] As communication rates increase, high-frequency signals are prone to generating parasitic inductance at the leads, affecting their quality. In optoelectronic packaging, parasitic inductance can reduce the operating bandwidth of driver chips and semiconductor lasers, thereby affecting the performance of optoelectronic devices.

[0006] Traditional solutions to the problem of parasitic inductance include increasing the lead diameter, reducing the lead length, and connecting multiple leads in parallel. However, these solutions also bring limitations. For example, increasing the lead diameter will lead to an increase in the wire bonding process parameters, and the requirements for the pads and substrate layer materials will also increase simultaneously. Connecting multiple leads in parallel will inevitably increase the required lead pad area, resulting in an increase in the overall size of the device, which does not meet the requirements of miniaturization.

[0007] Summary of the Invention

[0008] The present application provides an electronic component, an electronic device, and a method for manufacturing an electronic component, which reduces parasitic inductance caused by leads, improves the operating bandwidth of the electronic component, reduces pad size, increases pad density of a first device, and increases the number of signals transmitted by the first device.

[0009] In a first aspect, the present application provides an electronic component. The electronic device includes a first device, a second device, and at least two leads. The first device includes a first pad, and the second device includes a second pad. The leads are soldered between the first pad and the second pad to electrically connect the first and second devices. Specifically, the at least two leads include a first lead and a second lead. The first lead is soldered between the first pad and the second pad, and the second lead is also soldered between the first pad and the second pad. The first lead and the second lead are connected in parallel, thereby reducing parasitic inductance introduced by the leads, increasing the operating bandwidth of the electronic component, improving the signal transmission rate of the electronic component, and thus achieving better performance of the electronic component. In this solution, the lead diameter can be designed to be relatively small, thereby reducing the risk of damage to the first pad. The solder joint between the first lead and the first pad and the solder joint between the second lead and the first pad are stacked. In this solution, the size of the first pad can be designed to be relatively small, which helps increase the density of the pads of the first device, increase the number of signals transmitted by the first device, and increase the density of signal transmission lines of the first device.

[0010] In a further technical solution, the solder joints between the first lead and the second pad and the solder joints between the second lead and the second pad are stacked. In this solution, the size of the second pad can be designed to be smaller, and the density of the pads provided on the second device can be higher, which is beneficial for increasing the number of signals transmitted by the second device and increasing the density of the signal transmission lines of the second device.

[0011] In another technical solution, the solder joints between the first lead and the second pad and the solder joints between the second lead and the second pad are arranged side by side on the surface of the second pad. The solder joints between at least two leads and the second pad are arranged in a row on the surface of the second pad. This solution facilitates simplifying the wire bonding process between the first device and the second device.

[0012] Specifically, the lead wire includes a linear body and a solder ball. The solder ball and the linear body are integrally formed, and the solder ball is located at one end of the linear body. One end of the lead wire with the solder ball serves as a first bonding point, and the other end serves as a second bonding point. Using this metal lead wire for wire bonding helps improve bonding strength.

[0013] When using the aforementioned leads having solder balls and linear bodies to solder a first device to a second device, the leads can be arranged in a variety of ways. For example, in one specific technical solution, the first bonding point of the first lead is soldered to the first pad, and the first bonding point of the second lead is soldered to the first pad. Of two adjacent leads, the first bonding point of one lead is soldered to the first pad, and the first bonding point of the other lead is soldered to the first pad.

[0014] In another specific technical solution, of two adjacent leads, the first bonding point of one lead is welded to the first pad, and the second bonding point is welded to the second pad; the second bonding point of the other lead is welded to the first pad, and the first bonding point is welded to the second pad. The first bonding points of multiple leads are stacked on the first pad, and the second bonding points of multiple leads are welded to the second pad.

[0015] In order to improve the reliability of the connection between the first device and the second device. When the second bonding point is directly welded to the first pad, there is a welding bump between the second bonding point and the first pad. When the second bonding point is directly welded to the second pad, there is a welding bump between the second bonding point and the second pad. In short, the second bonding point of the lead is the end of the linear body away from the solder ball, which is small in size. Direct welding to the pad can easily cause damage to the pad. In the technical solution of the present application, the second bonding point is welded to the pad via the welding bump, which is conducive to improving the reliability of the welding between the second bonding point of the lead and the pad.

[0016] When forming the lead, the linear body is tilted toward the first pad within a predetermined length on the side where it connects to the solder ball. This allows the lead to be relatively flat above the solder ball, facilitating stacking and soldering of other leads above the first bonding point without causing them to tilt. This improves the reliability of soldering between adjacent leads and reduces the risk of short circuits when stacking.

[0017] In addition, the arc height of the linear body of the lead is less than or equal to 50 μm. The lower arc height of the lead and the smaller parasitic inductance are also beneficial for improving the operating bandwidth of the electronic component, improving the signal transmission rate of the electronic component, and thus making the electronic component have better performance. In addition, this solution makes the lead relatively flat near the second bonding point, which facilitates the stacking and welding of other leads above the second bonding point of the lead, and is less likely to cause skew. This is beneficial for improving the reliability of welding between adjacent leads and is less likely to cause short circuits when stacking wires.

[0018] In the optional technical solutions, there are multiple options for the types of the first device and the second device in the electronic component. In one technical solution, the above-mentioned first device is a photodetector and the second device is a transimpedance amplifier; or, the above-mentioned first device is a driver and the second device is a modulator; or, the first device is a transimpedance amplifier and the second device is an optical chip; or, the first device is a chip and the second device is a substrate.

[0019] In a second aspect, the present application provides an electronic device. The electronic device includes a circuit board, an electronic device, and the electronic assembly provided in the first aspect above. The electronic device is electrically connected to the electronic assembly, and the electronic device and the electronic assembly are disposed on the circuit board. The electronic assembly has a wide bandwidth and good performance, thereby improving the performance of the electronic device.

[0020] In a third aspect, the present application further provides a method for preparing an electronic device, wherein the electronic component prepared by the method includes a first device, a second device, a first lead, and a second lead, wherein the first device includes a first solder pad, and the second device includes a second solder pad. The above-mentioned preparation method specifically includes:

[0021] One end of the first lead is welded to the first pad to form a first solder joint, and the other end is welded to the second pad to form a second solder joint; one end of the second lead is welded to the first solder joint, and the other end is welded to the second solder joint; the first lead and the second lead are connected in parallel. This preparation method is used to reduce the parasitic inductance caused by the lead, improve the operating bandwidth of the electronic component, improve the signal transmission rate of the electronic component, etc., so that the electronic component has better performance. In this solution, the diameter of the lead can be designed to be smaller, thereby reducing the risk of damage to the first pad. There is a solder joint between a lead and the first pad, and the above-mentioned solder joints of at least two leads are stacked. In this solution, the size of the first pad can be designed to be smaller, which is conducive to increasing the density of the pads of the first device, increasing the number of signals transmitted by the first device, and increasing the density of the signal transmission lines of the first device.

[0022] In a fourth aspect, the present application further provides a method for preparing an electronic component. The electronic component prepared by the preparation method includes a first device, a second device, a first lead and a second lead, the first device includes a first solder pad, and the second device includes a second solder pad. The above preparation method specifically includes:

[0023] One end of the first lead is soldered to the first pad to form a first solder joint, and the other end is soldered to the second pad to form a second solder joint. One end of the second lead is soldered to the first solder joint, and the other end is soldered to the second pad to form a third solder joint. The second and third solder joints are arranged side by side on the surface of the second pad. The first lead and the second lead are connected in parallel. This reduces the parasitic inductance of the leads and simplifies the bonding process. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] FIG1 is a schematic structural diagram of an electronic component according to an embodiment of the present application;

[0025] FIG2 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

[0026] FIG3 is a comparison diagram of an eye diagram of an electronic device;

[0027] FIG4 is a comparison diagram of a working state of an electronic component;

[0028] FIG5 is a schematic structural diagram of an electronic component in an embodiment of the present application;

[0029] FIG6 is a schematic diagram of a top view of an electronic component in an embodiment of the present application;

[0030] FIG7 is a schematic diagram of a top view of an electronic component in an embodiment of the present application;

[0031] FIG8 is a schematic structural diagram of an electronic component in an embodiment of the present application;

[0032] FIG9 is a schematic structural diagram of a lead wire in an embodiment of the present application;

[0033] FIG10 is a schematic diagram of a preparation process of an electronic component according to an embodiment of the present application;

[0034] FIG11 is a schematic diagram of a preparation process of an electronic component according to an embodiment of the present application;

[0035] FIG12 is a schematic diagram of a preparation process of an electronic component according to an embodiment of the present application;

[0036] FIG13 is a schematic diagram of a preparation process of an electronic component in an embodiment of the present application.

[0037] Figure numerals: 1-first device; 11-first solder pad; 2-second device; 21-second solder pad; 3-lead; 31-linear body; 32-solder ball; 33-first lead; 34-second lead; 4-solder bump; 41-first solder bump; 42-second solder bump; 01-first solder joint; 02-second solder joint; 03-third solder joint. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solutions and advantages of this application clearer, this application will be further described in detail below with reference to the accompanying drawings.

[0039] The terms used in the following embodiments are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the specification and appended claims of this application, the singular expressions "a", "an", "said", "above", "the", and "this" are intended to also include expressions such as "one or more", unless the context clearly indicates otherwise.

[0040] References in this specification to "one embodiment" or "a specific embodiment" mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. The terms "including," "comprising," "having," and their variations all mean "including but not limited to," unless otherwise specifically stated.

[0041] To facilitate understanding of the electronic components, electronic devices, and methods for preparing electronic components provided in the embodiments of the present application, the application scenarios thereof are first introduced below.

[0042] The electronic devices in the embodiments of the present application can be electronic devices such as communication devices (such as routers), computing devices (such as servers), network devices (such as switches), or storage devices (such as storage arrays), or can also be electronic devices such as optical modules, vehicle-mounted devices, or terminal devices. The present application does not limit the specific type of electronic device. As long as the electronic device includes electronic components connected using a wire bonding process, the technical solutions provided in the present application can be used.

[0043] In a specific embodiment, the electronic device includes a circuit board, an electronic device, and an electronic assembly. The electronic device and the electronic assembly are electrically connected and disposed on the circuit board to implement the functions of the electronic device. The electronic assembly includes a first device and a second device, which are connected via a wire bonding process.

[0044] The types of the first device and the second device included in the electronic assembly provided in the present application have a variety of options and combinations. For example, in one embodiment, the above-mentioned first device is a photodetector, and the second device is a transimpedance amplifier, and the above-mentioned photodetector and the transimpedance amplifier are connected by wires through a wire bonding process. Alternatively, in one embodiment, the above-mentioned first device is a driver, and the second device is a modulator, and the above-mentioned driver and modulator are connected by wires through a wire bonding process. Alternatively, in one embodiment, the above-mentioned first device is a transimpedance amplifier, and the second device is an electrical chip (ODSP), and the above-mentioned transimpedance amplifier and the electrical chip are connected by wires through a wire bonding process. In the above-mentioned specific embodiments, the first device and the second device are both chip-type devices. In other embodiments, the above-mentioned first device is an optical chip and the second device is a substrate, or the above-mentioned first device is an electrical chip and the second device is a substrate. In short, the above-mentioned chip and substrate are connected by wires through a wire bonding process, that is, the first device and the second device in the embodiment of the present application can also be a chip and a substrate, respectively, and the chip and the substrate can be connected using the above-mentioned wire bonding scheme.

[0045] FIG1 is a schematic structural diagram of an electronic assembly according to an embodiment of the present application. As shown in FIG1 , in one embodiment, the electronic assembly includes a first device 1, a second device 2, and at least two leads 3. The first device 1 includes a first pad 11, and the second device 2 includes a second pad 21. The leads 3 are soldered between the first pad 11 and the second pad 21. Specifically, the leads 3 include a first lead 33 and a second lead 34. The first lead 33 is soldered between the first pad 11 and the second pad 21, and the second lead 34 is also soldered between the first pad 11 and the second pad 21. One end of the lead 3 is soldered to the first pad 11, and the other end is soldered to the second pad 21 to achieve an electrical connection between the first device 1 and the second device 2, for example, to enable signal transmission between the first device 1 and the second device 2. The at least two leads 3 are connected in parallel to reduce parasitic inductance caused by the leads 3, increase the operating bandwidth of the electronic assembly, and improve the signal transmission rate of the electronic assembly, thereby improving the performance of the electronic assembly. In this solution, the diameter of the lead 3 can be designed to be smaller, thereby reducing the risk of damage to the first pad 11. Furthermore, the solder joints between at least two leads 3 and the first pad 11 are stacked in sequence. Specifically, the solder joint between the first lead 33 and the first pad 11 and the solder joint between the second lead 34 and the first pad 11 are stacked. The solder joint between the above-mentioned lead 3 and the first pad 11 does not refer to the solder joint generated by directly welding the lead 3 to the first pad 11, but the solder joint at one end of the lead 3 used for welding to the first pad 11. In this solution, the size of the first pad 11 can be designed to be smaller, which is conducive to increasing the density of the pads of the first device 1, increasing the number of signals transmitted by the first device 1, and increasing the density of the signal transmission lines of the first device 1.

[0046] Please continue to refer to Figure 1. In one embodiment, on one side of the second pad 21, the solder joints between at least two leads 3 and the second pad 21 are also stacked in sequence, so that the at least two leads 3 are arranged in sequence in a direction perpendicular to the surface of the first pad 11. There is a solder joint between one lead 3 and the second pad 21, and the solder joints of at least two leads 3 are stacked. Specifically, the solder joint between the first lead 33 and the second pad 21 is the solder joint between the second lead 34 and the second pad 21. The solder joint between the lead 3 and the second pad 21 does not refer to the solder joint generated by directly welding the lead 3 to the second pad 21, but rather the solder joint at one end of the lead 3 used to be welded to the second pad 21. The size of the second pad 21 can be designed to be smaller, and the density of the pads set on the second device 2 can be higher, which is beneficial to increase the number of signals transmitted by the second device 2 and increase the density of the signal transmission lines of the second device 2.

[0047] FIG2 is a structural diagram of an electronic device in an embodiment of the present application. As shown in FIG2 , taking the electronic device as an optical module as an example, the optical module includes a digital signal processor, a transimpedance amplifier, a photodetector, a driver and a modulator, wherein the photodetector, the transimpedance amplifier and the digital signal processor are connected in sequence, and the digital signal processor, the driver group and the modulator are connected in sequence. The photodetector and the transimpedance amplifier are respectively used as the first device and the second device, and are connected by leads using the above scheme. In addition, the driver group and the modulator can also be used as the first device and the second device, and are connected by leads using the above scheme. FIG3 is an eye diagram comparison diagram of an electronic device. As shown in FIG3 , the eye diagram of the optical module in the prior art is shown in the left figure, and the eye diagram provided by the embodiment of the present application is shown in the right figure. It can be seen that the technical solution of the present application has a more obvious improvement in the eye diagram.

[0048] Figure 4 is a comparison diagram of the working states of electronic components. As shown in Figure 4, the dotted line in the figure is a schematic diagram of the working state of the electronic component in the prior art, and the solid line is a schematic diagram of the working state of the electronic component in the embodiment of the present application. It can be seen that the cutoff frequency of the electronic component is increased from 80 GHz to 120 GHz, and the working bandwidth is significantly improved.

[0049] FIG5 is a schematic diagram of the structure of an electronic component in an embodiment of the present application, and FIG6 is a schematic diagram of the structure of an electronic component from above in an embodiment of the present application. As shown in FIG5 and FIG6 , in one embodiment, on one side of the first pad 11, the solder joints between at least two of the above-mentioned leads 3 and the first pad 11 are stacked in sequence. On one side of the second pad 21, the solder joints between at least two of the above-mentioned leads 3 and the second pad 21 are lined up on the surface of the second pad 21. That is, the solder joints between the first lead 33 and the first pad 11 and the solder joints between the second lead 34 and the first pad 11 are stacked, while the solder joints between the first lead 33 and the second pad 21 and the solder joints between the second lead 34 and the second pad 21 are side by side. In some application scenarios, if the size of the second pad 21 is large, this solution can also be adopted to simplify the wire bonding process of the first device 1 and the second device 2.

[0050] As shown in Figure 6, in a specific embodiment, the direction in which the solder points between the at least two leads 3 and the second pad 21 are arranged in a line on the surface of the second pad 21 is basically consistent with the extension direction of the lead 3, or in other words, the direction in which the solder points between the at least two leads 3 and the second pad 21 are arranged in a line on the surface of the second pad 21 is consistent with the arrangement direction of the first device 1 and the second device 2, so that the leads 3 remain arranged in a direction perpendicular to the surface of the first pad 11.

[0051] FIG7 is a schematic diagram of a top view of an electronic component in an embodiment of the present application. As shown in FIG7 , in another embodiment, the direction in which the solder joints between the at least two leads 3 and the second pad 21 are arranged in a line on the surface of the second pad 21 forms a certain angle with the arrangement direction of the first device 1 and the second device 2. In one possible embodiment, the certain angle may be 90°. In other embodiments, the certain angle may also be 30°, 35°, 38°, 40°, 42°, 45°, 50°, 55°, 60°, 65°, 68°, 70°, 73°, 75°, 80°, or 85°, etc. In short, wire bonding can be performed according to the actual structure or layout of the product.

[0052] Referring to Figures 1 and 5 , the lead 3 in this application includes a linear body 31 and a solder ball 32. The solder ball 32 and the linear body 31 are integrally formed, and the solder ball 32 is located at one end of the linear body 31. Specifically, the linear body 31 can be generated by stretching a spherical metal ball to form a metal lead. The lead 3 has one end with the solder ball 32 as a first bonding point, and the other wedge-shaped end as a second bonding point. Specifically, the second bonding point is located at the end of the linear body 31 away from the solder ball 32.

[0053] Please refer to Figure 1. In one embodiment, when the above-mentioned lead 3 is used to connect the first pad 11 and the second pad 21, of the two adjacent leads 3, the first bonding point of one lead 3 is welded to the first pad 11, and the second bonding point is welded to the second pad 21. The second bonding point of the other lead 3 is welded to the first pad 11, and the first bonding point is connected to the second pad 21. For example, the first bonding point of the first lead 33 is welded to the first pad 11, and the second bonding point is welded to the second pad 21; the first bonding point of the second lead 34 is welded to the first pad 11, and the second bonding point is welded to the second pad 21. In this embodiment, in the same pad, the first bonding points and second bonding points of multiple leads 3 are welded alternately in sequence.

[0054] FIG8 is a schematic diagram of the structure of an electronic assembly according to an embodiment of the present application. As shown in FIG8 , in one embodiment, of two adjacent leads, the first bonding point of one lead 3 is welded to the first pad 11, and the second bonding point is welded to the second pad 21. The first bonding point of the other lead 3 is also welded to the first pad 11, and the second bonding point is welded to the second pad 21. The first bonding points of multiple leads are stacked on the first pad 11, and the second bonding points of multiple leads 3 are welded to the second pad 21.

[0055] Because the second bonding point is relatively small, when the second bonding point of the lead 3 is directly bonded to the first pad 11, a solder bump is provided between the second bonding point of the lead 3 and the first pad 11. The solder bump is used to bond the second bonding point to the first pad 11, thereby improving the reliability of the bonding between the second bonding point and the first pad 11. Alternatively, the second bonding point of the lead 3 can be bonded to the first pad 11 via the solder ball 32 of an adjacent lead 3. In short, there is some connection between the second bonding point of any lead 3 and the first pad 11, rather than being directly bonded to the first pad 11.

[0056] Similarly, when the second bonding point of the lead 3 is directly soldered to the second pad 21, a solder bump is provided between the second bonding point of the lead 3 and the second pad 21. The solder bump is soldered to the second pad 21 via the solder bump, thereby improving the reliability of the soldering between the second bonding point and the second pad 21. Alternatively, the second bonding point of the lead 3 can also be soldered to the second pad 21 via the solder ball 32 of the adjacent lead 3. In short, there is a certain connection between the second bonding point of any lead 3 and the second pad 21, rather than being directly soldered to the first pad 11.

[0057] FIG9 is a schematic diagram of the structure of a lead in an embodiment of the present application. As shown in FIG9 , in one embodiment, the solder ball 32 of the lead 3 is welded to the first pad 11. Within a preset length on one side where the linear body 31 is connected to the solder ball 32, the linear body 31 is tilted toward the first pad 11. Specifically, when forming the lead 3, the welding head of the wire bonding machine moves in multiple steps to form the tilted structure of the linear body 31, so that the lead 3 is relatively flat above the solder ball 32, making it easier to stack and weld other leads 3 above the first bonding point of the lead 3 without causing skew. This improves the reliability of welding between adjacent leads 3 and reduces the risk of short circuits when stacking.

[0058] Please continue to refer to Figure 9. In a specific embodiment, the arc height h of the linear body 31 of the above-mentioned lead 3 is less than or equal to 50μm. In this solution, the arc height of the lead 3 is low and the parasitic inductance is small. This solution is also conducive to improving the operating bandwidth of the electronic component, improving the signal transmission rate of the electronic component, etc., so that the electronic component has better performance. In addition, this solution makes the lead 3 relatively flat near the second bonding point, which facilitates the stacking and welding of other leads 3 above the second bonding point of the lead 3, and is less likely to be skewed. It is conducive to improving the reliability of welding between adjacent leads 3, and short circuits are less likely to occur when stacking wires.

[0059] Based on the same inventive concept, the present application also provides a method for preparing an electronic component. The electronic component prepared by the preparation method includes a first device 1, a second device 2, a first lead 33 and a second lead 34, wherein the first device 1 includes a first solder pad 11 and the second device 2 includes a second solder pad 21. Specifically, the electronic component prepared by the preparation method is the electronic component shown in the above embodiment. Figure 10 is a schematic diagram of a preparation process of an electronic component in an embodiment of the present application. As shown in Figure 10, the above preparation method specifically includes:

[0060] One end of the first lead 33 is welded to the first pad 11 to form a first welding point 01, and the other end is welded to the second pad 21 to form a second welding point 02;

[0061] Solder one end of the second lead wire 34 to the first soldering point 01 and the other end to the second soldering point 02;

[0062] The first lead 33 and the second lead 34 are connected in parallel.

[0063] In the electronic component prepared by this scheme, the two leads 3 are connected in parallel to reduce the parasitic inductance caused by the leads 3, improve the operating bandwidth of the electronic component, improve the signal transmission rate of the electronic component, etc., so that the electronic component has better performance. In this scheme, the diameter of the lead 3 can be designed to be smaller, thereby reducing the risk of damage to the first pad 11. Furthermore, the two leads 3 are stacked in sequence at the solder joints of the first pad 11 and at the solder joints of the second pad 21. The size of the first pad 11 and the second pad 21 can be designed to be smaller, which is conducive to increasing the density of the pads of the first device 1 and the density of the pads of the second device 2, increasing the number of signals transmitted by the first device 1 and the second device 2, and increasing the density of the signal transmission lines of the first device 1 and the second device 2.

[0064] In one embodiment, the lead 3 includes the linear body 31 and the sphere. The solder ball 32 of the first lead 33 is soldered to the first solder pad 11, and the end of the linear body 31 away from the solder ball 32 is soldered to the second solder pad 21. FIG11 is a schematic diagram of a manufacturing process of an electronic component according to an embodiment of the present application. As shown in FIG11, one end of the first lead 33 is soldered to the first solder pad 11 to form a first solder joint 01, and the other end is soldered to the second solder pad 21 to form a second solder joint 02. The process also includes:

[0065] A solder bump is soldered to the second pad 21 .

[0066] One end of the first lead 33 is welded to the first solder pad 11 to form a first solder point 01, and the other end is welded to the second solder pad 21 to form a second solder point 02. Specifically, the end of the first lead 33 having the solder ball 32 is welded to the first solder pad 11 to form the first solder point 01, and the end of the linear body 31 of the first lead 33 away from the solder ball 32 is welded to the solder bump of the second solder pad 21 to form the second solder point 02, so as to improve the reliability of the welding between the linear body 31 and the second solder pad 21.

[0067] In another embodiment, the lead 3 includes the linear body 31 and the sphere. The solder ball 32 of the first lead 33 is soldered to the second pad 21, and the end of the linear body 31 away from the solder ball 32 is soldered to the first pad 11. Similarly, one end of the first lead 33 is soldered to the first pad 11 to form a first solder joint 01, and the other end is soldered to the second pad 21 to form a second solder joint 02. The above also includes:

[0068] A solder bump is soldered to the first pad 11 .

[0069] One end of the first lead 33 is welded to the first solder pad 11 to form a first solder point 01, and the other end is welded to the second solder pad 21 to form a second solder point 02. Specifically, the process includes: welding the end of the linear body 31 of the first lead 33 away from the solder ball 32 to the solder bump of the first solder pad 11 to form the first solder point 01, and welding the end of the first lead 33 with the solder ball 32 to the second solder pad 21 to form the second solder point 02, so as to improve the reliability of the welding between the linear body 31 and the first solder pad 11.

[0070] Based on the same inventive concept, the present application also provides a method for preparing an electronic component. The electronic component prepared by the preparation method includes a first device 1, a second device 2, a first lead 33 and a second lead 34, wherein the first device 1 includes a first solder pad 11 and the second device 2 includes a second solder pad 21. Specifically, the electronic component prepared by the preparation method is the electronic component shown in the above embodiment. Figure 12 is a schematic diagram of a preparation process of an electronic component in an embodiment of the present application. As shown in Figure 12, the above preparation method specifically includes:

[0071] One end of the first lead 33 is welded to the first pad 11 to form a first welding point 01, and the other end is welded to the second pad 21 to form a second welding point 02;

[0072] One end of the second lead 34 is welded to the first welding point 01, and the other end is welded to the second welding pad 21 to form the third welding point 03. The second welding point 02 and the third welding point 03 are arranged side by side on the surface of the second welding pad 21.

[0073] The first lead 33 and the second lead 34 are connected in parallel.

[0074] Specifically, the second solder joint 02 and the third solder joint 03 are arranged side by side. In some application scenarios, if the size of the second solder pad 21 is large, this solution can also be adopted to simplify the wire bonding process of the first device 1 and the second device 2.

[0075] In one embodiment, the lead 3 includes the linear body 31 and the sphere. The solder ball 32 of the first lead 33 is soldered to the first pad 11, and the end of the linear body 31 away from the solder ball 32 is soldered to the second pad 21. FIG13 is a schematic diagram of a manufacturing process for an electronic component according to an embodiment of the present application. As shown in FIG13, one end of the first lead 33 is soldered to the first pad 11 to form a first solder joint 01, and the other end is soldered to the second pad 21 to form a second solder joint 02. The process also includes:

[0076] A first solder bump 41 and a second solder bump 42 are soldered to the second solder pad 21 , and the first solder bump 41 and the second solder bump 42 are arranged side by side.

[0077] One end of the first lead 33 is welded to the first solder pad 11 to form a first solder point 01, and the other end is welded to the second solder pad 21 to form a second solder point 02. Specifically, the process includes: welding one end of the first lead 33 having the solder ball 32 to the first solder pad 11 to form the first solder point 01, and welding one end of the linear body 31 of the first lead 33 away from the solder ball 32 to the first solder bump 41 of the second solder pad 21 to form the second solder point 02, so as to improve the reliability of the welding between the linear body 31 and the second solder pad 21.

[0078] One end of the second lead 34 is welded to the first welding point 01 , and the other end is welded to the second welding pad 21 to form the third welding point 03 , specifically including: one end of the second lead 34 is welded to the first welding point 01 , and the other end is welded to the second welding bump 42 of the second welding pad 21 to form the third welding point 03 .

[0079] In another embodiment, the lead 3 includes the linear body 31 and the sphere. The solder ball 32 of the first lead 33 is soldered to the second pad 21, and the end of the linear body 31 away from the solder ball 32 is soldered to the first pad 11. Similarly, one end of the first lead 33 is soldered to the first pad 11 to form a first solder joint 01, and the other end is soldered to the second pad 21 to form a second solder joint 02. The above also includes:

[0080] A third solder bump is soldered to the first solder pad 11 .

[0081] One end of the first lead 33 is welded to the first solder pad 11 to form a first solder point 01, and the other end is welded to the second solder pad 21 to form a second solder point 02. Specifically, the process includes: welding the end of the linear body 31 of the first lead 33 away from the solder ball 32 to the solder bump of the first solder pad 11 to form the first solder point 01, and welding the end of the first lead 33 with the solder ball 32 to the second solder pad 21 to form the second solder point 02, so as to improve the reliability of the welding between the linear body 31 and the first solder pad 11.

[0082] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An electronic component, characterized in that: The device comprises a first device, a second device and at least two leads, wherein the first device comprises a first pad, the second device comprises a second pad, and the at least two leads comprise a first lead and a second lead; The first lead is welded between the first pad and the second pad, the second lead is also welded between the first pad and the second pad, and the first lead and the second lead are connected in parallel; A solder joint between the first lead and the first pad and a solder joint between the second lead and the first pad are stacked.

2. The electronic component according to claim 1, wherein: A solder joint between the first lead and the second pad and a solder joint between the second lead and the second pad are stacked.

3. The electronic component according to claim 1, wherein: A welding point between the first lead and the second pad and a welding point between the second lead and the second pad are arranged side by side on a surface of the second pad.

4. The electronic component according to any one of claims 1 to 3, characterized in that: The lead wire comprises a linear body and a solder ball, wherein the solder ball and the linear body are an integrally formed structure, and the solder ball is located at one end of the linear body, and the lead wire has one end of the solder ball as a first bonding point and the other end as a second bonding point.

5. The electronic component according to claim 4, characterized in that The first bonding point of the first lead is welded to the first pad, and the first bonding point of the second lead is welded to the first pad.

6. The electronic component according to claim 4, wherein: The first bonding point of the first lead is welded to the first pad, and the second bonding point of the second lead is welded to the first pad.

7. The electronic component according to any one of claims 4 to 6, characterized in that: When the second bonding point is directly welded to the first pad, a welding bump is provided between the second bonding point and the first pad; when the second bonding point is directly welded to the second pad, a welding bump is provided between the second bonding point and the second pad.

8. The electronic component according to any one of claims 4 to 7, characterized in that: Within a preset length of one side of the linear body connected to the solder ball, the linear body is inclined toward the first solder pad.

9. The electronic component according to any one of claims 4 to 8, characterized in that: The arc height of the linear body is less than or equal to 50 um.

10. The electronic component according to any one of claims 1 to 9, characterized in that: The first device is a photodetector, and the second device is a transimpedance amplifier; Alternatively, the first device is a driver and the second device is a modulator; Alternatively, the first device is a transimpedance amplifier, and the second device is an electronic chip; Alternatively, the first device is an optical chip, and the second device is a substrate.

11. An electronic device, characterized in that: It comprises a circuit board, an electronic device and the electronic component according to any one of claims 1 to 10, wherein the electronic device is electrically connected to the electronic component, and the electronic device and the electronic component are arranged on the circuit board.

12. A method for preparing an electronic component, characterized in that: The electronic component comprises a first device, a second device, a first lead and a second lead, the first device comprises a first pad, and the second device comprises a second pad; the preparation method comprises: Welding one end of the first lead to the first pad to form a first welding point, and welding the other end to the second pad to form a second welding point; Welding one end of the second lead to the first welding point, and the other end to the second welding point; The first lead and the second lead are connected in parallel.

13. A method for preparing an electronic component, characterized in that: The electronic component comprises a first device, a second device, a first lead and a second lead, the first device comprises a first pad, and the second device comprises a second pad; the preparation method comprises: Welding one end of the first lead to the first pad to form a first welding point, and welding the other end to the second pad to form a second welding point; Welding one end of the second lead to the first welding point, and welding the other end to the second pad to form a third welding point, wherein the second welding point and the third welding point are arranged side by side on the surface of the second pad; The first lead and the second lead are connected in parallel.

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