On-chip optical circuit switching network device, semiconductor apparatus, and manufacturing method therefor

Abstract

The present invention provides an on-chip optical circuit switching network device, a semiconductor apparatus, and a manufacturing method therefor. The on-chip optical circuit switching network device comprises: a photonic chip having at least two optically interconnected photonic integrated circuit sub-chips formed therein; and at least two optical switching control analog electronic chips respectively arranged on the at least two photonic integrated circuit sub-chips. Each photonic integrated circuit sub-chip is provided therein with at least one on-chip optical switch, at least two communication nodes suitable for communicating with an external apparatus, and a plurality of first-type optical waveguides used for connecting the on-chip optical switch to the communication nodes. On the photonic chip, communication between any two of the communication nodes is implemented by means of the at least one on-chip optical switch. According to the implementation of the present invention, the use of a plurality of on-chip optical switches enables a series of digital electronic chips to process information in parallel at the same time, such that the requirements of artificial intelligence algorithms for computing capabilities and bandwidth can be better met.

Description

On-chip all-optical switching network equipment, semiconductor device and manufacturing method thereof

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit and priority of Chinese patent application No. 202311287540.8, filed on September 28, 2023, entitled “On-chip all-optical switching network equipment, semiconductor device and manufacturing method thereof,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to the field of semiconductor technology, and more particularly to an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof. Background Art

[0004] Very large-scale integrated circuit (VLSI) technology has become a pillar supporting the development and evolution of an information society. The various chips widely used in information systems often rely on upgrades in chip manufacturing processes to achieve performance improvements and optimize power consumption. However, as chip manufacturing processes gradually approach physical limits, the pace of Moore's Law is slowing, and the cost of manufacturing large chips using advanced processes is increasing.

[0005] The rapid development of new AI applications, such as the recently emerging ChatGPT and AI-generated content (AIGC), is placing increasing demands on computing systems for computing power. Furthermore, as chip size increases, the time and energy costs associated with data transfer also increase.

[0006] Traditional information interconnection is mainly achieved through electronic conduction through copper media, and the speed and distance of electronic information transmission are limited by the resistance and capacitance time constant and electrical loss, resulting in a significant increase in the cross-section of the required copper wire as the transmission speed and transmission distance increase. In addition, the signal crosstalk between electronic information transmission channels restricts the energy consumption and bandwidth density of the interconnection. The power consumption and bandwidth density issues of electrical interconnection between chips limit the development of higher-performance chip systems. Traditional electrical interconnection interfaces are sensitive to interconnection distances, which limits the interconnection architecture between digital electronic chips. For point-to-point interconnection networks, each SerDes interface (SerDes is the abbreviation of SERializer / DESerializer) needs to access a specific single XPU (the XPU refers to a processing unit used in artificial intelligence computing systems), which reduces the bandwidth between each pair of XPUs.

[0007] Summary of the Invention

[0008] In view of the above-mentioned defects in electronic information transmission, the present invention provides an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof.

[0009] According to a first aspect of the present invention, an embodiment of the present invention provides an on-chip all-optical switching network device, comprising:

[0010] a photonic chip having at least two photonic integrated circuit sub-chips formed therein, adjacent photonic integrated circuit sub-chips being optically interconnected with each other; and

[0011] At least two optical switching control analog electrical chips, respectively disposed on the at least two photonic integrated circuit sub-chips;

[0012] Each of the photonic integrated circuit sub-chips comprises: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electronic chip are arranged in a one-to-one correspondence; on the photonic chip, communication between any two communication nodes is achieved via at least one on-chip optical switch.

[0013] Wherein, on the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

[0014] In some embodiments of the present invention, each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units. The at least two electro-optical conversion units are optically connected to at least two on-chip optical switches via a first type of optical waveguide, and the at least two photoelectric conversion units are optically connected to output ports of at least two on-chip optical switches via another first type of optical waveguide.

[0015] In some embodiments of the present invention, the number of electro-optical conversion units and photoelectric conversion units of each communication node is equal to the total number of on-chip optical switches on the photonic chip.

[0016] In some embodiments of the present invention, each of the on-chip optical switches has multiple input ports and multiple output ports. The number of input ports of each on-chip optical switch is equal to the total number of communication nodes on the photonic chip, and the number of output ports of each on-chip optical switch is equal to the total number of communication nodes provided on the photonic chip.

[0017] In some embodiments of the present invention, the multiple input ports of each of the on-chip optical switches are optically connected to at least one electro-optical conversion unit in each of the communication nodes through a plurality of different first-type optical waveguides; the multiple output ports of each of the on-chip optical switches are optically connected to at least one optoelectronic conversion unit in each of the communication nodes through another plurality of different first-type optical waveguides.

[0018] In some embodiments of the present invention, the on-chip optical switching network is configured such that an optical path connecting any two communication nodes includes at least one on-chip optical switch.

[0019] In some embodiments of the present invention, the electro-optical conversion unit includes a modulator; and / or the photoelectric conversion unit includes a detector. In some embodiments of the present invention, the at least two electro-optical conversion units include a modulator array composed of the modulators; and / or the at least two photoelectric conversion units include a detector array composed of the detectors.

[0020] In some embodiments of the present invention, in the communication node, the modulator and the detector are arranged side by side or alternately.

[0021] In some embodiments of the present invention, the modulator comprises a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. In some embodiments of the present invention, the detector comprises a microring detector or a photodiode.

[0022] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips further comprises: an optical input coupler and an optical power splitter.

[0023] In the photonic chip, an optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and

[0024] The optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip through another first-type optical waveguide and is configured to split the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

[0025] In some embodiments of the present invention, the optical input coupler comprises a grating coupler or an end face coupler.

[0026] In some embodiments of the present invention, in the photonic chip, the first type optical waveguides of two adjacent photonic integrated circuit sub-chips are optically interconnected.

[0027] In some embodiments of the present invention, the optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are constructed as a structure in which the waveguide cross-section gradually increases from one photonic integrated circuit sub-chip toward the other photonic integrated circuit sub-chip, so as to facilitate the alignment of the optical waveguides of the two photonic integrated circuit sub-chips at the junction.

[0028] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips further comprises a second type of optical waveguide located on a different layer from the first type of optical waveguide; wherein one or more of the on-chip optical switch, electro-optical conversion unit, optoelectronic conversion unit, optical input coupler, and optical power splitter are optically connected to the corresponding first type of optical waveguide via different second type of optical waveguides; the second type of optical waveguide is optically connected to the first type of optical waveguide via an evanescent wave coupler. In some embodiments of the present invention, the first type of optical waveguide comprises a silicon nitride waveguide. In some embodiments of the present invention, the second type of optical waveguide comprises a silicon waveguide.

[0029] In some embodiments of the present invention, the on-chip optical switch is a silicon photonic switch comprising multiple optical switching units. The optical switching control analog electronic chip is configured to control the multiple optical switching units to orchestrate and switch data transmitted within the on-chip optical switching network. In some embodiments of the present invention, the on-chip optical switch is co-located with the communication nodes. In some embodiments of the present invention, the optical switching units have Mach-Zehnder interferometer structures.

[0030] In some embodiments of the present invention, the photonic integrated circuit sub-chip is manufactured by exposure using a full mask.

[0031] According to a second aspect of the present invention, an embodiment of the present invention provides a semiconductor device comprising:

[0032] The on-chip all-optical switching network device according to any one embodiment of the first aspect of the present invention;

[0033] a plurality of analog electrical chips connected to the on-chip all-optical switching network device and configured so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0034] A plurality of digital electronic chips, each of which is electrically connected to a corresponding analog electronic chip, so that any two of the plurality of digital electronic chips can communicate with each other via at least two of the analog electronic chips and the at least one on-chip optical switch.

[0035] In some embodiments of the present invention, the information transmission path connecting any two analog electronic chips includes at least one on-chip optical switch.

[0036] In some embodiments of the present invention, an information transmission path connecting any two digital electronic chips includes at least one optical path, and the optical path includes at least one on-chip optical switch.

[0037] In some embodiments of the present invention, the semiconductor device further comprises a substrate. The photonic chip is mounted on the substrate; the multiple analog electronic chips are respectively mounted on corresponding photonic integrated circuit sub-chips on the photonic chip; and the digital electronic chips corresponding to each analog electronic chip are respectively mounted on the substrate.

[0038] In some embodiments of the present invention, on the photonic integrated circuit sub-chip, the analog electronic chip is arranged in a one-to-one correspondence with the communication node and is located above the communication node.

[0039] According to a third aspect of the present invention, an embodiment of the present invention provides a method for manufacturing the on-chip all-optical switching network device according to the first aspect of the present invention, comprising:

[0040] providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, adjacent photonic integrated circuit sub-chips being optically interconnected with each other; and

[0041] Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips;

[0042] Each of the photonic integrated circuit sub-chips comprises: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch is arranged in a one-to-one correspondence with the optical switching control analog electronic chip;

[0043] Wherein, on the photonic integrated circuit sub-chip, communication is achieved between any two communication nodes via at least one on-chip optical switch.

[0044] In some embodiments of the present invention, the photonic integrated circuit sub-chip is manufactured by exposure using a full mask.

[0045] According to a fourth aspect of the present invention, an embodiment of the present invention provides a method for manufacturing the semiconductor device according to the second aspect of the present invention, comprising:

[0046] Provide an on-chip all-optical switching network device according to the first aspect of the present invention;

[0047] Providing a plurality of analog electrical chips, connecting the plurality of analog electrical chips to the on-chip all-optical switching network device and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0048] A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

[0049] In some embodiments of the present invention, the method of manufacturing the semiconductor device further includes:

[0050] providing a substrate;

[0051] Mounting the photonic chip on the substrate;

[0052] The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chip corresponding to each analog electrical chip is mounted on the substrate.

[0053] The application of the present invention has the following effects and advantages:

[0054] In some embodiments of the present invention, multiple photonic integrated circuit sub-chips, fabricated using a full-mask reticle for exposure, are spliced ​​together via waveguides to form a photonic chip. Using this photonic chip as an interposer to connect electronic chips can address the power consumption and bandwidth density bottlenecks of inter-chip interconnects. In this photonic chip, the on-chip optical switch can be horizontally expanded. This scalability enables any number of digital electronic chips to simultaneously process information in parallel, thereby better meeting the computing power and bandwidth requirements of artificial intelligence algorithms.

[0055] In some embodiments of the present invention, the analog electronic chip and the digital electronic chip are separated on two different chips. This not only optimizes the performance of each chip in different process steps, but also solves the problem of slow iteration cycle of analog electronic chip products, and further improves the yield of the overall system.

[0056] In some embodiments of the present invention, the on-chip optical switching network reuses multiple analog and digital electronic chips, interconnected by fully masked photonic chips. With the exception of the silicon nitride exposure mask connecting the optical coupler for the input laser to the communication node, the exposure mask for all other components on the photonic integrated circuit sub-chip is identical, saving chip tape-out costs. While improving system energy efficiency, it also overcomes the limitations of chip mask size, effectively increasing the overall area of ​​the digital electronic chip and boosting the system's total computing throughput.

[0057] In addition, traditional computing systems need to be fully connected using PCB traces through long-distance SerDes. Compared with traditional solutions, the on-chip optical switching network of the present invention can enable computing chips (i.e., digital electronic chips) to be interconnected using ultra-short-distance SerDes or parallel interfaces, reducing interconnection power consumption. In addition, the use of an on-chip optical switching network can make the interconnection between chips no longer static, but reconfigurable on site. This can bring many benefits, for example, the topology can be changed according to the specific machine learning model. From the perspective of topology, the requirements of different machine learning models for data flow can be roughly divided into three categories, namely: data parallelism, each chip loads the entire model, and different chips process different data in the data set; model parallelism, some layers in the model are particularly large, so each chip is only responsible for a part of the calculation in such a large layer; and pipeline parallelism, different layers in the model are handed over to different chips for calculation, and different data flows correspond to different computing interconnection topologies. This invention uses reconfigurable optical interconnects, enabling rapid switching between different inter-chip interconnect topologies. This effectively improves bandwidth utilization and enhances the scalability of AI chips, enabling multiple chips to efficiently and reliably collaborate to accelerate large models. Furthermore, the entire on-chip optical switch consumes only a few hundred milliwatts, several orders of magnitude lower than electrical switches.

[0058] Furthermore, commercial silicon photonic switches often face issues with fiber coupling and polarization dependence. However, the present invention utilizes an optical switch directly on-chip (i.e., an on-chip optical switch), thus circumventing these issues. Traditional optical switches typically use optical fiber as input and output interfaces, with the spacing between arrayed optical fibers typically being 250 μm or 127 μm. For optical switches with dozens of input and output optical ports, this not only consumes a significant amount of chip area but also reduces the fiber-to-chip coupling yield, exacerbating the optical coupling loss problem. The present invention overcomes this optical coupling loss problem by utilizing an optical switch directly on-chip. Furthermore, because conventional sub-micron silicon-on-insulator waveguides exhibit strong birefringence, the effective refractive index differs significantly between transverse electric and transverse magnetic polarizations. Consequently, couplers and phase shifters based on these waveguides also exhibit polarization dependence. For optical switches with fiber input and output, reducing device polarization dependence has always been a challenge in silicon-based optical switch design. However, the present invention utilizes an optical switch directly on-chip, with fixed waveguide input and output polarizations, cleverly avoiding the polarization dependence challenges of silicon photonic switches and providing improved waveguide input and output stability. The on-chip optical switch is compatible with the silicon photonic process of the photonic chip, which simplifies the process flow and saves costs.

[0059] The various aspects, features, advantages, etc. of the present invention will be described in detail below in conjunction with the accompanying drawings. According to the following detailed description in conjunction with the accompanying drawings, the above aspects, features, advantages, etc. of the present invention will become more apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] FIG1 is a schematic diagram showing a planar layout of an on-chip all-optical switching network device according to an embodiment of the present invention.

[0061] 2 is a schematic diagram illustrating a spliced ​​coupler interconnecting optical waveguides of adjacent photonic integrated circuit sub-chips of FIG. 1 .

[0062] 3 is a schematic diagram illustrating an evanescent wave coupler interconnecting optical waveguides of different layers in the photonic integrated circuit sub-chip of FIG. 1 .

[0063] FIG4 is a schematic diagram showing an on-chip optical switch composed of a plurality of optical switching units.

[0064] FIG. 5 is a schematic diagram illustrating the structure of the optical switching unit in FIG. 4 .

[0065] FIG. 6 is a schematic diagram illustrating a connection topology structure between four communication nodes on the on-chip all-optical switching network device of FIG. 1 .

[0066] FIG. 7 is a schematic diagram illustrating a planar layout of a semiconductor device according to an embodiment of the present invention.

[0067] FIG. 8 is a schematic diagram illustrating a packaging structure of the semiconductor device of FIG. 7 .

[0068] FIG. 9 is a schematic diagram showing a planar layout of a semiconductor device according to another embodiment of the present invention.

[0069] FIG. 10 is a schematic diagram showing a planar layout of a semiconductor device according to yet another embodiment of the present invention. DETAILED DESCRIPTION

[0070] Exemplary embodiments will be described in more detail below with reference to the accompanying drawings. Certain terms may be used in the description for reference purposes only and are not intended to limit the scope of protection. For example, terms such as "top," "bottom," "upper," "lower," "above," and "below" may be used to refer to directions in the accompanying drawings to which reference is made. Terms such as "front," "back," "rear," "side," "outside," and "inside" may be used to describe the orientation and / or position of parts of a component within a consistent but arbitrary reference frame, which can be clearly understood by reference to the text describing the component in question and the associated drawings. Unless the context clearly indicates, "first," "second," and other similar numerical terms do not imply a sequence or order.

[0071] It should be understood that when an element or feature is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on, connected to, or coupled to the other element or feature, or one or more intervening elements or features may be present. Additionally, it should be further understood that when an element or feature is referred to as being "between" two elements or features, it can be the only element or feature between the two elements or features, or one or more intervening elements or features may also be present.

[0072] The terms used herein are for the purpose of describing specific embodiments, but are not intended to limit the present invention. Such terms may include the words specifically mentioned herein, their derivative words and words of similar meanings. As used herein, the singular "one" and "a kind of" are intended to also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprise", "include" and "have" specify the existence of stated features, integral bodies, steps, operations, elements and / or parts in this article, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or their sets. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of ... " modify the entire list of elements when they are before a list of elements, rather than modifying the separate elements of the list.

[0073] As used herein, "substantially," "about," and similar terms are used as terms of approximation rather than as terms of degree, and are intended to take into account the inherent variations in measured or calculated values ​​that one of ordinary skill in the art will recognize. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively.

[0074] Figure 1 illustrates an exemplary embodiment of an on-chip all-optical switching network device according to the present invention. In this exemplary embodiment, the on-chip all-optical switching network device comprises a photonic chip 100, which includes a photonic integrated circuit (PIC) sub-chip 110 and a photonic integrated circuit (PIC) sub-chip 120 optically interconnected with each other. In some embodiments of the present invention, a full mask reticle is used to expose the photonic chip 100 to form the PIC sub-chips within the photonic chip, and two adjacent PIC sub-chips are optically interconnected. Each PIC sub-chip comprises a plurality of first-type optical waveguides 401 and an on-chip optical switch 202.

[0075] In an exemplary embodiment, the optical waveguides at the junction or interface 403 of adjacent photonic integrated circuit sub-chips 110 and 120 are optically connected via a spliced ​​coupler. The structure of the spliced ​​coupler is shown in FIG2 . For example, the first-type optical waveguides 401 on both sides of the interface 403 are configured to have a structure with a waveguide cross-section that gradually increases from one photonic integrated circuit sub-chip toward the other (e.g., a trumpet-shaped or tapered shape). This increases the coupling surface, increases the alignment tolerance of adjacent first-type optical waveguides 401 at the interface of the photonic integrated circuit sub-chips, and improves the coupling efficiency. The first-type optical waveguides 401 include waveguides connecting the communication nodes described below with the on-chip optical switch 202, and waveguides connecting the optical input coupler 405 described below with the optical power splitter 404.

[0076] In an exemplary embodiment, as shown in FIG1 , two communication nodes are provided on each of the photonic integrated circuit sub-chips, thereby providing four communication nodes on the photonic chip 100, namely, node 0, node 1, node 2, and node 3. The communication nodes are respectively configured to communicate with an external device (e.g., the analog electronic chip 102 described later). On the photonic chip, node 0, node 1, node 2, and node 3 are optically interconnected via a plurality of first-type optical waveguides 401 and any one of the on-chip optical switches 202. In addition, the on-chip all-optical switching network device further includes an optical switching control analog electronic chip (see 103 in FIG7 and FIG8 ) on each of the photonic integrated circuit sub-chips. As shown in FIG7 and FIG8 , on the photonic chip 100, the optical switching control analog electronic chip 103 is located above the on-chip optical switch 202 to facilitate control of the on-chip optical switch.

[0077] In some embodiments of the present invention, each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units. The number of electro-optical conversion units and photoelectric conversion units of each communication node is equal to the total number of on-chip optical switches in the photonic chip. Each of the on-chip optical switches has multiple input ports and multiple output ports. The number of input ports of each on-chip optical switch is equal to the total number of communication nodes on the photonic chip, and the number of output ports of each on-chip optical switch is equal to the number of communication nodes provided on the photonic chip. Thus, each communication node can exchange information with each on-chip optical switch.

[0078] In an exemplary embodiment, the electro-optical conversion unit includes a modulator 200, and the photoelectric conversion unit includes a detector 201. Two modulators 200 constitute a modulator array, and two detectors 201 constitute a detector array, and the modulators 200 and detectors 201 are arranged in parallel. In an optional embodiment of the present invention, the modulators and detectors may be arranged in an alternating arrangement. In some embodiments of the present invention, the modulator 200 comprises a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. In some embodiments of the present invention, the detector 201 comprises a microring detector or a photodiode.

[0079] In an exemplary embodiment, two modulators 200 are optically connected to the input ports of the on-chip optical switch in the photonic integrated circuit sub-chips 110 and 120, respectively, via two first-type optical waveguides 401. Two detectors 201 are optically connected to the output ports of the on-chip optical switch in the photonic integrated circuit sub-chips 110 and 120, respectively, via two other first-type optical waveguides 401. In an exemplary embodiment, the modulators and detectors are optically connected to the corresponding first-type optical waveguides 401 via different second-type optical waveguides 400. In the photonic integrated circuit sub-chip (or photonic chip), the second-type optical waveguides 400 and the first-type optical waveguides 401 are located on different layers. To achieve optical connection between the waveguides located on different layers, as shown in FIG3 , an evanescent wave coupler 402 is formed between the second-type optical waveguide 400 and the first-type optical waveguide 401. This evanescent wave coupler 402 optically connects the second-type optical waveguide 400 to the first-type optical waveguide 401. In an exemplary embodiment, the input and output ports of the on-chip optical switch are connected to the corresponding first-type optical waveguides through other corresponding second-type optical waveguides.

[0080] In an exemplary embodiment, as shown in Figure 1 , each on-chip optical switch 202 has four input ports and four output ports. The four input ports of each on-chip optical switch 202 are connected to a modulator 200 at node 0, a modulator 200 at node 1, a modulator 200 at node 2, and a modulator 200 at node 3, respectively, via four first optical waveguides 401. The four output ports of each on-chip optical switch 202 are connected to a detector 201 at node 0, a detector 201 at node 1, a detector 201 at node 2, and a detector 201 at node 3, respectively, via another four first optical waveguides 401.

[0081] The on-chip optical switch 202 includes multiple optical switching units. In an exemplary embodiment, as shown in FIG4 , the on-chip optical switch 202 is a 4x4 on-chip optical switch, which is composed of 16 optical switching units 406 arranged in a 4x4 matrix format. By controlling the signal output port of each switching unit, any combination of paths between the four-channel input and four-channel output shown in FIG4 can be achieved, and the insertion loss on each path is independent of the path. In an exemplary embodiment, as shown in FIG5 , the optical switching unit 406 has a Mach-Zehnder interferometer structure, consisting of an electro-optical or thermo-optical phase shifter 407 and a 2x2 beam splitter 408. The optical switching control analog electronic chip 103 described later is configured to control the upper and lower electro-optical or thermo-optical phase shifters 407 to change the amplitude and thereby change the output port position, thereby arranging and switching data transmitted in the on-chip optical switching network.

[0082] Thus, the connection topology formed between the four communication nodes on the on-chip all-optical switching network device via each on-chip optical switch 202 is shown in Figure 6 , where each communication node is optically interconnected with four communication nodes, including itself, via any one of the optical switching networks 601. The central optical switching network 601 can reconfigure the optical path, changing the paths connecting inputs and outputs in real time. As shown in Figure 6 , for example, information sent by node 0 can be transmitted to nodes 0, 1, 2, and 3 respectively via optical switching network 601.

[0083] In an exemplary embodiment, as shown in FIG1 , each of the photonic integrated circuit sub-chips of the photonic chip 100 further includes an optical input coupler 405 and an optical power splitter 404. The optical input coupler 405 and the optical power splitter 404 of one of the photonic integrated circuit sub-chips (e.g., the first photonic integrated circuit sub-chip or the second photonic integrated circuit sub-chip) are connected via a first-type optical waveguide 401 and are configured to couple light from an off-chip light source into the photonic chip 100. The optical power splitter 404 is configured to split the light from the optical input coupler 405 into a plurality of optical outputs, wherein each of the plurality of optical outputs has substantially the same power. The plurality of optical outputs are transmitted to the modulators 200 via a plurality of second-type optical waveguides 400. As shown in Figure 1, light inputted by an optical input coupler 405 on a first photonic integrated circuit sub-chip passes through a first-type optical waveguide 401, a second-type optical waveguide 400, or is further separated by an optical power splitter 404 and then transmitted via the second-type optical waveguide 400 to modulators 200 on two photonic integrated circuit sub-chips. The first-type optical waveguide 401 connecting the optical input coupler 405 and the optical power splitter 404 can be connected to a second-type optical waveguide 400 for light input via an evanescent wave coupler, and the second-type optical waveguide 400 for light input is connected to the modulator 200. In some embodiments of the present invention, the first-type optical waveguide 401 comprises a silicon nitride waveguide. In some embodiments of the present invention, the second-type optical waveguide 400 comprises a silicon waveguide.

[0084] In some embodiments of the present invention, the optical input coupler, optical power splitter, modulator, detector, on-chip optical switch, and second-type optical waveguide are arranged on the same layer, and the output end of the optical input coupler, the input and output ends of the optical power splitter, the input and output ends of the modulator, the input end of the detector, and the input and output ends of the on-chip optical switch are each connected to the corresponding first-type optical waveguide 401 through a different second-type optical waveguide 400, wherein the second-type optical waveguide 400 is connected to the corresponding first-type optical waveguide 401 through an evanescent wave coupler.

[0085] In some embodiments of the present invention, the optical input coupler 405 includes a grating coupler or an end face coupler. The optical power splitter 404 includes a beam splitter.

[0086] As can be seen from the foregoing, in this embodiment of the present invention, multiple photonic integrated circuit (IC) sub-chips, fabricated using full-mask reticle exposure, are spliced ​​together via waveguides to form a photonic chip. This photonic chip then serves as an interposer for connecting electronic chips, thereby resolving the power consumption and bandwidth density bottlenecks of inter-chip interconnects. Except for the different exposure reticles for the first type of optical waveguide connecting optical input coupler 405 and optical power splitter 404, the exposure reticles for all other components on the IC sub-chip are identical, thus reducing chip tape-out costs.

[0087] Applying the on-chip all-optical switching network device of the embodiment of the present invention to an artificial intelligence chip can achieve advantages such as achieving higher system energy efficiency. The following examples illustrate the application of the on-chip all-optical switching network device of the present invention.

[0088] Figures 7 and 8 illustrate a semiconductor device, which is an example application of an on-chip all-optical switching network device. The on-chip all-optical switching network device is the on-chip all-optical switching network device described in any of the aforementioned embodiments, and therefore, the following description references the preceding figures and reference numerals. In an exemplary embodiment, the semiconductor device includes multiple digital electrical chips and multiple analog electrical chips connected to the on-chip all-optical switching network device described in any of the aforementioned embodiments, wherein each digital electrical chip is electrically connected to a corresponding analog electrical chip. In an exemplary embodiment, as shown in Figure 7, four analog electrical chips 102 are configured such that any two analog electrical chips can communicate with each other via the on-chip optical switching network on the photonic chip 100, thereby enabling any two of the multiple digital electrical chips to communicate with each other via at least two of the analog electrical chips and the on-chip optical switching network. The information transmission path connecting any two analog electrical chips 102 includes at least one on-chip optical switch 202. In other words, any two analog electrical chips can communicate with each other via one on-chip optical switch 202 or multiple on-chip optical switches 202. The information transmission path connecting any two digital electronic chips 101 includes at least one optical path, and the optical path includes at least one on-chip optical switch 202 . In other words, any two digital electronic chips can communicate through at least one on-chip optical switch 202 .

[0089] In an exemplary embodiment, the semiconductor device includes a substrate 104. The photonic chip 100 is mounted on the substrate 104. The photonic chip 100 has the photonic integrated circuit sub-chip described in any one of the above embodiments, that is, the above-mentioned on-chip optical switching network is formed on the photonic chip 100. Four analog electrical chips 102 are respectively mounted at the communication nodes on the photonic chip 100, that is, as shown in Figure 7, the analog electrical chip 102 is mounted above the position of the modulator or modulator array and the detector or detector array, and is communicatively connected with the modulator and the detector. Four digital electrical chips 101 are around the photonic chip 100 and mounted on the substrate 104. A digital electrical chip 101 is mounted on the substrate near each analog electrical chip 102, and the digital electrical chip 101 and the corresponding analog electrical chip 102 can be interconnected through an ultra-short distance SerDes interface or a parallel interface.

[0090] The following describes information transmission within a semiconductor device with reference to Figures 1 to 8. Light generated by a laser module 300 is coupled into the photonic chip 100 via an optical fiber array 301 and an optical input coupler 405. The light is then transmitted to the modulator 200 via a first type of optical waveguide 409 (or further via an optical power splitter 404) and a second type of optical waveguide 400 connected to the modulator 200.

[0091] The low-speed parallel signal (i.e., digital information) of the digital electronic chip 101 at the transmitting end is converted into a high-speed serial signal via a SerDes interface or a parallel interface, and is transmitted to the corresponding analog electronic chip 102 through the wiring structure (e.g., metal traces) on the substrate 104 and the silicon through-via 501 of the photonic chip 100. The analog electronic chip 102 generates an electrical signal for modulating light based on the received high-speed serial signal. The modulator 200 modulates the input light based on the electrical signal of the analog electronic chip to obtain a modulated optical signal, thereby loading the information carried by the electrical signal into the modulated optical signal. The modulated optical signal modulated by the modulator 200 is transmitted to the input port of the corresponding on-chip optical switch 202 via the second type optical waveguide 400 and the first type optical waveguide 401. The on-chip optical switch 202 determines the output port and reconstructs the optical path under the control of the optical switching control analog electronic chip 103. The modulated optical signal is output from the determined output port of the on-chip optical switch 202 and transmitted to the detector 201 at the receiving end via a first-type optical waveguide 401 and a second-type optical waveguide 400 optically connected to the output port. In some embodiments of the present invention, the first-type optical waveguide 401 is a silicon nitride waveguide, the on-chip switch 202 is a silicon photonic switch, and the input and output ports of the on-chip optical switch 202 are silicon waveguides (i.e., the second-type optical waveguide 400). Therefore, the first-type optical waveguide 401 is connected to the input and output ports of the on-chip optical switch 202 via an evanescent wave coupler. The on-chip optical switch 202 is formed during the fabrication of the photonic integrated circuit sub-chip, is compatible with other silicon photonic processes, and is simple to manufacture.

[0092] The detector 201 converts the received modulated optical signal into an analog electrical signal through photoelectric conversion and transmits it to the analog electrical chip 102 at the corresponding receiving end. The analog electrical chip 102 at the receiving end processes the received electrical signal and transmits it to the SerDes interface or serial interface on the corresponding digital electrical chip 101 at the receiving end through the through-silicon via 501 of the photonic chip 100 and the wiring structure (e.g., metal traces) on the substrate 104. The SerDes interface or parallel interface converts the serial signal into a parallel signal, thereby enabling communication between the digital electrical chip at the transmitting end and the digital electrical chip at the receiving end.

[0093] In some embodiments of the present invention, four digital electronic chips 101 can be configured to transmit, receive and process data in parallel via two on-chip optical switches 202 . Therefore, compared with the prior art, the system bandwidth of the semiconductor device using the present invention can be significantly improved.

[0094] In the implementation examples shown in Figures 1-8, the first digital electronic chip can communicate with the second digital electronic chip through one of the on-chip optical switches, and the first digital electronic chip can also communicate with the second digital electronic chip through two on-chip switches at the same time. The first digital electronic chip can also communicate with the second digital electronic chip through one of the on-chip optical switches and communicate with the third digital electronic chip through another on-chip optical switch at the same time.

[0095] According to the above embodiments, the present invention uses a photonic chip 100 formed by splicing multiple full-mask-sized photonic integrated circuit sub-chips through waveguides as an intermediary layer to integrate a series of analog electronic chips 102. The analog electronic chip 102 and the series of digital electronic chips 101 surrounding the photonic chip 100 are connected via a SerDes interface or a parallel interface. By loading (e.g., modulating) the information on different analog electronic chips onto optical signals, and then allowing the optical signals to shuttle at high speed in the on-chip all-optical switching network of the photonic chip 100, the central on-chip optical switch performs data arrangement and exchange, completing the information interconnection between different analog electronic chips. As a result, different digital electronic chips can form an organic whole through electro-optical conversion, optoelectronic conversion, and optical interconnection. In some embodiments, by integrating a series of modulator arrays and detector arrays below different analog electronic chips, large amounts of information can be transmitted between chips without being limited by power consumption and bandwidth density. By cleverly arranging the positions of the modulators or modulator arrays, detectors or detector arrays, on-chip optical switches, and corresponding analog electronic chips, the effective bandwidth of the digital electronic chips can be increased, thereby improving the system computing utilization.

[0096] It should be noted that the present invention does not limit the number of photonic integrated circuit sub-chips with on-chip optical switches on the photonic chip 100. The photonic integrated circuit sub-chip (on-chip optical switch) of the above exemplary embodiment can be expanded according to application requirements to achieve communication between more digital electronic chips, thereby improving system bandwidth and computing power. As shown in Figure 9, in a semiconductor device according to another embodiment of the present invention, three photonic integrated circuit sub-chips are formed on the photonic chip 100. The three photonic integrated circuit sub-chips are arranged side by side in sequence. Each photonic integrated circuit sub-chip is provided with a 6x6 on-chip optical switch 203 and two analog electronic chips 102. The 6×6 on-chip optical switch is composed of 36 optical switching units arranged in a 6×6 matrix format. By controlling the signal output port of each switching unit, any combination of paths between six-channel input and six-channel output can be achieved, and the insertion loss on each path is independent of the path. Thus, the photonic chip 100 is provided with six analog electronic chips 102, three 6x6 on-chip optical switches 203, and their optical switching control analog electronic chips 103. Corresponding to the analog electronic chips 102, six photonic transceiver devices (TX / RX) 105 are formed in the photonic chip 100, and six digital electronic chips 101 are provided on the substrate 104 outside the photonic chip 100. In some embodiments, the photonic transceiver devices (TX / RX) 105 include modulators or modulator arrays, and detectors or detector arrays. For example, the photonic transmitter (TX) includes a modulator or a modulator array, and the photonic receiver (RX) includes a detector or a detector array. Although not shown, it should be understood that the optical waveguide wiring in the photonic chip 100 is similar to that described in the previously described embodiment. Specifically, the six input ports of each 6x6 on-chip optical switch 203 are optically connected to the photon transmitters of the six photon transceiver devices via six first-type optical waveguides, and the six output ports are optically connected to the photon receivers of the six photon transceiver devices via another six first-type optical waveguides. Thus, the six digital electronic chips 101 of the semiconductor device of this embodiment can communicate with each other through the on-chip optical switching network formed by any of the 6x6 on-chip optical switches 203. Because the six digital electronic chips 101 can be configured to transmit, receive, and process data in parallel, the system bandwidth and computing power of the semiconductor device of the present invention can be greatly improved.

[0097] As shown in FIG10 , in a semiconductor device according to another embodiment of the present invention, four photonic integrated circuit sub-chips are arranged side by side on a photonic chip 100. Each photonic integrated circuit sub-chip is provided with an 8x8 on-chip optical switch 204 and two analog electronic chips 102, thereby providing eight digital electronic chips 101 on a substrate 104 outside the photonic chip 100. Otherwise, the structure of the semiconductor device shown in FIG10 is similar to the corresponding structure shown in FIG8 . In the semiconductor device shown in FIG10 , the eight digital electronic chips 101 can communicate with each other through the on-chip optical switching network formed by any of the 8x8 on-chip optical switches 204. The 8x8 on-chip optical switch is composed of 64 optical switching units arranged in an 8x8 matrix format. By controlling the signal output ports of each switching unit, any combination of eight-channel input and eight-channel output paths can be achieved, and the insertion loss on each path is independent of the path. It should be understood that the present invention is not limited to this. Depending on the scale of the optoelectronic computing system, a photonic chip formed with more photonic integrated circuit sub-chips having on-chip optical switches can be used to achieve communication between more digital electronic chips. Through the horizontal expansion of on-chip optical switches (for example, two or more on-chip optical switches can be set on each photonic integrated circuit sub-chip), a series of digital electronic chips can simultaneously process information in parallel, which can better meet the computing power and bandwidth requirements of artificial intelligence algorithms. Compared with existing artificial intelligence computing systems, optoelectronic computing systems using the on-chip all-optical switching network equipment or semiconductor devices of the present invention can integrate more computing chips and storage chips, and the use of optical interconnection can ensure organic information interconnection between them, thereby providing a higher system energy efficiency ratio.

[0098] In addition, an embodiment of the present invention provides a method for manufacturing the on-chip all-optical switching network device described in any one of the above embodiments, comprising:

[0099] providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, adjacent photonic integrated circuit sub-chips being optically interconnected with each other; and

[0100] Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips;

[0101] Each of the photonic integrated circuit sub-chips comprises: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch is arranged in a one-to-one correspondence with the optical switching control analog electronic chip; and communication between any two communication nodes is achieved via at least one on-chip optical switch;

[0102] Wherein, on the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

[0103] In some embodiments of the present invention, the photonic integrated circuit sub-chip is made by exposure using a full mask mask. The structures of the photonic chip and the photonic integrated circuit sub-chip are as described above and will not be repeated here.

[0104] In addition, an embodiment of the present invention provides a method for manufacturing the semiconductor device according to any one of the above embodiments, comprising:

[0105] Provide an on-chip all-optical switching network device as described in any one of the above embodiments. The structure of the on-chip all-optical switching network device is as described above and will not be repeated here.

[0106] Providing a plurality of analog electrical chips, and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0107] A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

[0108] In some embodiments of the present invention, the method of manufacturing the semiconductor device further includes:

[0109] providing a substrate;

[0110] Mounting the photonic chip on the substrate;

[0111] The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chip corresponding to each analog electrical chip is mounted on the substrate.

[0112] In some embodiments of the present invention, analog electronic chips and digital electronic chips are provided separately, which can not only optimize the performance of each chip in different process steps, but also solve the problem of slow iteration cycle of analog electronic chip products, and further improve the yield of the overall system.

[0113] In some embodiments of the present invention, an on-chip optical switching network is formed in a photonic chip by splicing full-mask photonic integrated circuit sub-chips. Except for the silicon nitride exposure mask connecting the optical coupler of the input laser and the communication node, the exposure masks of other components on the photonic integrated circuit sub-chip are exactly the same, saving chip tape-out costs.

[0114] Those skilled in the art should understand that what is disclosed above is merely an embodiment of the present invention, and certainly cannot be used to limit the scope of rights requested for patent protection in this application. Equivalent changes made based on the embodiment of the present invention are still within the scope covered by the claims of this application.

[0115] For example, in an optional embodiment of the present invention, the photonic chip is attached to an interposer, which is mounted on a substrate. The interposer can be made of materials such as silicon, glass, and ceramics, and mainly plays a supporting role to ensure that the photonic chip is not prone to warping and fragmentation. In an optional embodiment of the present invention, a photonic chip including a photonic integrated circuit sub-chip can be arranged on the upper surface of the interposer, and the digital electronic chip can be arranged on the lower surface of the interposer. In an optional embodiment, the analog electronic chip can also be arranged on the substrate and connected to the photonic integrated circuit sub-chip through metal traces. Those skilled in the art should understand that these variations also fall within the scope of protection of this application.

Claims

1. An on-chip all-optical switching network device, characterized in that: include: a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; as well as At least two optical switching control analog electrical chips, respectively arranged on the at least two photonic integrated circuit sub-chips; Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; On the photonic chip, any two communication nodes communicate with each other via at least one on-chip optical switch.

2. The device according to claim 1, characterized in that On the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

3. The device according to claim 1, characterized in that Each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units; The at least two electro-optical conversion units are optically connected to the at least two on-chip optical switches via the first type of optical waveguides respectively; The at least two photoelectric conversion units are optically connected to output ports of the at least two on-chip optical switches via another of the first-type optical waveguides, respectively.

4. The device according to claim 3, characterized in that The number of electro-optical conversion units and photoelectric conversion units of each communication node is equal to the total number of the on-chip optical switches on the photonic chip.

5. The device according to claim 3, characterized in that Each of the on-chip optical switches has a plurality of input ports and a plurality of output ports; The number of the input ports of each on-chip optical switch is equal to the number of the output ports, which are equal to the total number of communication nodes on the photonic chip.

6. The device according to claim 5, characterized in that The multiple input ports of each of the on-chip optical switches are optically connected to at least one electro-optical conversion unit in each of the communication nodes through a plurality of different first-type optical waveguides; The multiple output ports of each of the on-chip optical switches are optically connected to at least one optoelectronic conversion unit in each of the communication nodes through another plurality of different first-type optical waveguides.

7. The device according to claim 3, characterized in that The electro-optical conversion unit includes a modulator; and / or the photoelectric conversion unit includes a detector.

8. The device according to claim 7, characterized in that The at least two electro-optical conversion units include a modulator array composed of the modulators; and / or The at least two photoelectric conversion units include a detector array composed of the detectors.

9. The device according to claim 8, characterized in that In the communication node, the modulator and the detector are arranged side by side or alternately.

10. The device according to claim 7, characterized in that The modulator includes a micro-ring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator.

11. The device according to claim 7, characterized in that The detector comprises a micro-ring detector or a photodiode.

12. The device according to claim 7, characterized in that Each of the photonic integrated circuit sub-chips also has: an optical input coupler and an optical power separator, wherein: In the photonic chip, an optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and The optical power separator is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip through another first-type optical waveguide and is configured to separate the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

13. The device according to claim 12, characterized in that In the photonic chip, the first type optical waveguides of two adjacent photonic integrated circuit sub-chips are optically interconnected.

14. The device according to claim 13, characterized in that The first type of optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are constructed as a structure in which the waveguide cross section gradually increases from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip.

15. The device according to claim 12, characterized in that Each of the photonic integrated circuit sub-chips also has a second type of optical waveguide located at a different layer from the first type of optical waveguide; wherein one or more of the on-chip optical switch, the electro-optical conversion unit, the optoelectronic conversion unit, the optical input coupler, and the optical power splitter are optically connected to the corresponding first-type optical waveguide through different second-type optical waveguides; The second type optical waveguide is optically connected to the first type optical waveguide via an evanescent wave coupler.

16. The device according to claim 15, characterized in that The first type optical waveguide includes a silicon nitride waveguide; and the second type optical waveguide includes a silicon waveguide.

17. The device according to claim 1, characterized in that The on-chip optical switch is a silicon optical switch, comprising a plurality of optical switching units; The optical switching control analog electrical chip is configured to control the multiple optical switching units to arrange and switch data transmitted in the on-chip optical switching network.

18. The device according to claim 17, characterized in that The optical switching unit has a Mach-Zehnder interferometer structure.

19. The device according to claim 17, characterized in that The on-chip optical switch is arranged at the same layer as the communication node.

20. The device according to any one of claims 1 to 19, characterized in that The photonic integrated circuit sub-chip is manufactured by exposure using a full-mask mask.

21. A semiconductor device comprising: The on-chip all-optical switching network device according to any one of claims 1 to 20; A plurality of analog electrical chips connected to the on-chip all-optical switching network device and configured so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; as well as A plurality of digital electrical chips, each of which is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

22. The semiconductor device according to claim 21, wherein: Also includes a substrate, Wherein, the photonic chip is mounted on the substrate, The plurality of analog electrical chips are respectively mounted on corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are respectively mounted on the substrate.

23. The semiconductor device according to claim 22, wherein: On the photonic integrated circuit sub-chip, the analog electrical chip is arranged in a one-to-one correspondence with the communication node and is located above the communication node.

24. A method for manufacturing the on-chip all-optical switching network device according to any one of claims 1 to 20, comprising: providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; as well as Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips; Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; Among them, on the photonic integrated circuit sub-chip, any two communication nodes communicate with each other via at least one on-chip optical switch.

25. A method for manufacturing the semiconductor device according to any one of claims 21 to 23, comprising: Provide an on-chip all-optical switching network device as described in any one of claims 1 to 20; Providing a plurality of analog electrical chips, connecting the plurality of analog electrical chips to the on-chip all-optical switching network device and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; as well as A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

26. The method according to claim 25, characterized in that Also includes: providing a substrate; Mounting the photonic chip on the substrate; The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are mounted on the substrate, respectively.

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