Resource pooling system and resource pooling method

Abstract

Provided is a resource pooling system. The resource pooling system comprises: a plurality of resource pools, wherein each resource pool comprises a plurality of resource modules for processing data or a plurality of resource modules for storing data, each resource module comprises an electronic integrated circuit chip having a PCIe physical interface, and at least one optical module, the PCIe physical interface of the electronic integrated circuit chip and an electrical port of the at least one optical module are electrically interconnected, and an optical port of the at least one optical module serves as an optical port of the resource module; and a switch, which has an optical port interconnected with the optical port of each resource module in the plurality of resource pools, wherein the switch is configured to select at least some resource modules from the plurality of resource pools and transmit signals to the at least some resource modules, the at least one optical module converts a first electrical signal from the PCIe physical interface of the electronic integrated circuit chip into a first optical signal and provides the first optical signal to the switch, and the at least one optical module converts a second optical signal from the switch into a second electrical signal and provides the second electrical signal to the corresponding electronic integrated circuit chip by means of the PCIe physical interface.

Description

Resource pooling system and resource pooling method

[0001] This application claims priority to Chinese Patent Application No. 202311281964.3 filed on September 28, 2023. The contents of the above-mentioned Chinese patent application disclosure are hereby incorporated by reference in their entirety as a part of this application. Technical Field

[0002] The present disclosure relates to the fields of communications and computing, and in particular to a resource pooling system and a resource pooling method. Background Art

[0003] With the rapid development of artificial intelligence (AI) technology, the architectural innovations and computing power improvements of individual computing nodes in existing computing systems are unable to meet the growing demand for large-scale computing power. Data centers typically require tens of thousands of computing devices, but simply stacking and combining multiple computing nodes often leads to network congestion. Furthermore, the configuration of resources such as CPUs, GPUs, and memory within data center servers is relatively fixed, while different computing tasks have varying resource requirements. As a result, once data center hardware configurations are fixed, computing power cannot be flexibly scheduled, resulting in relatively low utilization rates most of the time. A better approach is to consolidate resources and, through refined management, allocate them to computing tasks in a flexible and efficient manner. This approach is often referred to as resource pooling.

[0004] However, current data center infrastructure designs struggle to support high-performance resource pooling. Because the physical distances between large-scale distributed computing devices are relatively large, data center cabinets typically use Ethernet-based data communication.

[0005] In the basic architecture of Ethernet-based data communication, the PCIe electrical signal output by the computing chip of a computing device needs to pass through an Ethernet card for conversion at the physical layer and protocol layer, thereby converting the PCIe electrical signal into an Ethernet electrical signal. The Ethernet electrical signal is then provided to an Ethernet optical module for electrical-to-optical conversion. The Ethernet optical signal output by the Ethernet optical module can be further provided to an Ethernet optical switch or optical switch. Vice versa, for example, the Ethernet optical signal from the Ethernet optical switch or optical switch can be provided to an Ethernet optical module for electrical-to-electrical conversion. The Ethernet electrical signal obtained from the Ethernet optical module can further undergo protocol conversion via an Ethernet card to obtain a PCIe electrical signal. This PCIe electrical signal can then be received by the computing chip of another computing device. In this way, data exchange between different computing devices can be achieved.

[0006] In the above architecture, for example, the signal output / input by the computing chip is a high-speed serial electrical signal based on the PCIe physical layer (for example, a 16-channel electrical signal, such as a 16×32G NRZ or 16×64G PAM4 format electrical signal), which needs to be converted through the Ethernet card at the physical layer and protocol layer to be converted with an Ethernet-based electrical signal (for example, a 4-channel electrical signal, such as a 4×112G PAM4 electrical signal).

[0007] Under this architecture, the transmission rate of each Ethernet signal channel (for example, 112G) is limited by the bandwidth of Ethernet data exchange and high communication latency, making it difficult for data centers to achieve near-linear large-scale computing capacity expansion. This system has significant room for improvement. Implementing a distributed computing network requires efficient data parallelization and synchronization mechanisms.

[0008] Summary of the Invention

[0009] The present disclosure is made in view of the above problems. On the one hand, the present disclosure provides a resource pooling system, comprising: a plurality of resource pools, wherein each resource pool includes a plurality of resource modules for processing data or a plurality of resource modules for storing data, each resource module includes an electronic integrated circuit chip with a PCIe physical interface and at least one optical module, and the PCIe physical interface of the electronic integrated circuit chip and the electrical port of the at least one optical module are electrically interconnected, and the optical port of the at least one optical module serves as the optical port of the resource module; and a switch having an optical port interconnected with the optical ports of each resource module in the plurality of resource pools, the switch being configured to select at least some resource modules from the plurality of resource pools and transmit signals with the at least some resource modules. The at least one optical module converts a first electrical signal from the PCIe physical interface of the electronic integrated circuit chip into a first optical signal and provides it to the switch, and the at least one optical module converts a second optical signal from the switch into a second electrical signal and provides it to the corresponding electronic integrated circuit chip through the PCIe physical interface.

[0010] In some embodiments, the multiple resource pools include: a central processing resource pool, including multiple central processing modules, serving as the multiple resource modules for processing data, each central processing module including a CPU chip, serving as the electronic integrated circuit chip having a PCIe physical interface; and a volatile storage resource pool, including multiple volatile storage modules, serving as the multiple resource modules for storing data, each volatile storage module including a volatile storage control chip, serving as the electronic integrated circuit chip having a PCIe physical interface, and each volatile storage module also including a volatile storage unit.

[0011] In some embodiments, the multiple resource pools also include: an artificial intelligence computing resource pool, including multiple artificial intelligence computing modules, as the multiple resource modules for processing data, each artificial intelligence computing module including an artificial intelligence computing chip, as the electronic integrated circuit chip with a PCIe physical interface.

[0012] In some embodiments, the multiple resource pools also include: a non-volatile storage resource pool, including multiple non-volatile storage modules as the multiple resource modules for storing data, each non-volatile storage module includes a non-volatile storage control chip as the electronic integrated circuit chip with a PCIe physical interface, and each non-volatile storage module also includes a non-volatile storage unit.

[0013] In some embodiments, the artificial intelligence computing chip includes one or more of a graphics processing unit (GPU), a neural network processor (NPU), a tensor processing unit (TPU), an intelligent processing unit (IPU), and a deep learning processor (DPU).

[0014] In some embodiments, the switch is an electrical switch comprising a switch chip and a plurality of optical modules. The switch chip has a plurality of PCIe physical interfaces, and the plurality of PCIe physical interfaces of the switch chip and the electrical ports of the plurality of optical modules are electrically interconnected. The optical ports of the plurality of optical modules serve as the optical ports of the electrical switch. The electrical switch selects at least some of the resource modules from the plurality of resource pools for link connection by switching conductive paths in the switch chip, and the electrical switch transmits electrical signals within the switch to transmit signals between at least some of the resource modules.

[0015] In some embodiments, the electrical switch transmits signals between at least some of the resource modules by performing the following operations: causing a first optical module among the multiple optical modules to convert the first optical signal from the first resource module into a third electrical signal and provide the signal to the switch chip; causing the switch chip to transmit the third electrical signal to a second optical module among the multiple optical modules through the conductive path; causing the second optical module to convert the third electrical signal into a second optical signal and provide the signal to a second resource module.

[0016] In some embodiments, the first optical module and the second optical module are the same optical module, and the second optical signal and the first optical signal are the same optical signal.

[0017] In some embodiments, the first optical module and the optical module in the first resource module are the same optical module; and the third electrical signal and the first electrical signal are the same electrical signal.

[0018] In some embodiments, the switch is an optical switch, which selects at least some of the resource modules from the plurality of resource pools for link connection by reconstructing optical paths, and wherein the optical switch transmits optical signals internally to transmit signals between at least some of the resource modules.

[0019] In some embodiments, each optical module of the at least one optical module includes: a control signal conversion channel for performing photoelectric conversion or electro-optical conversion on the PCIe sideband control signal; and a data signal conversion channel for performing photoelectric conversion or electro-optical conversion on the PCIe data signal, wherein the signal transmitted between the at least part of the resource modules includes the PCIe sideband control signal and the PCIe data signal.

[0020] In some embodiments, the first electrical signal and the second electrical signal are PCIe electrical signals based on a PCIe physical layer and a PCIe protocol layer, or PCIe / CXL electrical signals based on a PCIe physical layer and a CXL protocol layer.

[0021] In some embodiments, the third electrical signal is a PCIe electrical signal based on a PCIe physical layer and a PCIe protocol layer, or a PCIe / CXL electrical signal based on a PCIe physical layer and a CXL protocol layer.

[0022] Another aspect of the present disclosure provides a method for performing resource pooling based on the aforementioned resource pooling system. The method comprises: selecting, by the switch, at least some of the resource modules from the plurality of resource pools for link connection; transmitting, by the switch, PCIe sideband control signals between the resource modules; and transmitting, by the switch, PCIe data signals between the resource modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG1 shows a schematic diagram of a resource pooling system according to an embodiment of the present disclosure.

[0024] 2A-2D are schematic diagrams showing examples of various resource modules in a resource pooling system according to an embodiment of the present disclosure.

[0025] FIG3 shows a cross-sectional view of a packaged form of a resource module in a resource pooling system according to an embodiment of the present disclosure.

[0026] FIG4 shows a schematic diagram of an optical module in a resource pooling system according to an embodiment of the present disclosure.

[0027] 5A-5B are schematic diagrams illustrating examples of optical modules in a resource pooling system according to an embodiment of the present disclosure.

[0028] FIG6 is a schematic diagram showing an example of an optical module in a resource pooling system according to an embodiment of the present disclosure.

[0029] FIG7 shows a schematic diagram of an example of a resource pooling system using an electrical switch according to an embodiment of the present disclosure.

[0030] FIG8 shows a schematic diagram of an example of an electrical switch in a resource pooling system according to an embodiment of the present disclosure.

[0031] FIG9 shows a schematic diagram of an example of a resource pooling system using an optical switch according to an embodiment of the present disclosure.

[0032] FIG10 shows a flowchart of a resource pooling method according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although some embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure should not be construed as being limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0034] It should be noted that the various parts or components described in the various embodiments of the present disclosure are merely illustrative. In some cases, some of the parts or components may be omitted, or replaced with other parts or components with the same or similar functions, or additional parts or components may be added.

[0035] In addition, the various components or assemblies described in the various embodiments of the present disclosure as being separated or combined with each other are merely for convenience of description and do not imply that they are physically separated or combined with each other, nor do they imply that such separation or combination is required. Those skilled in the art may arbitrarily separate or combine the various components or assemblies according to actual needs.

[0036] Without departing from the inventive concept of the present disclosure, any modifications or combinations described above fall within the protection scope of the present disclosure.

[0037] PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. Originally named "3GIO," it was proposed by Intel in 2001. PCIe is a full-duplex bus that uses high-speed serial transmission and supports higher frequencies. Furthermore, PCIe utilizes high-speed serial point-to-point transmission, with high bandwidth. Connected devices are allocated dedicated channel bandwidth, rather than sharing bus bandwidth like the PCI bus.

[0038] PCIe has several specifications, including PCIe x1, PCIe x4, PCIe x8, PCIe x16, and PCIe x32. The number after the x represents the number of lanes within the PCIe slot. PCIe slots are backward compatible. For example, a PCIe x16 slot can accept x8, x4, or x1 cards. The final operating mode is determined by the PCIe card. For example, if a PCIe x4 card is inserted into a PCIe x16 slot, it will ultimately operate in PCIe x4 mode.

[0039] PCIe has released multiple versions, including PCIe 1.0, PCIe 2.0, PCIe 3.0, PCIe 4.0, PCIe 5.0, and PCIe 6.0. These versions are backward compatible, meaning any PCIe card and motherboard can operate at the lowest version. For example, if you insert a PCIe 3.0 card into a PCIe 2.0 slot, it will ultimately run at PCIe 2.0.

[0040] As mentioned above, in Ethernet-based data communications, high-speed serial electrical signals based on the PCIe physical layer that are input into or output from a computing chip need to pass through an Ethernet card for conversion between the physical layer and the protocol layer, thereby causing communication delays and limiting transmission bandwidth.

[0041] To solve the above problems, the present disclosure proposes a resource pooling solution that directly transmits PCIe high-speed signals without Ethernet protocol conversion, so as to reduce communication delays during resource scheduling and data communication.

[0042] FIG1 shows a schematic diagram of a resource pooling system 1000 according to an embodiment of the present disclosure.

[0043] As shown in FIG. 1 , the resource pooling system 1000 includes multiple resource pools (eg, resource pools 1 , 2 , 3 , and 4 ) and a switch 604 .

[0044] In this disclosure, the term "resource pool" refers to the collection of all available resources in a system. It may also be referred to as a "resource cluster" or "resource group." These resources can be computing resources, storage resources, or other types of resources. Typically, the resources aggregated in a particular "resource pool" are of the same type.

[0045] For example, resource pools 1, 2, 3, and 4 shown in FIG1 may represent four resource pools with different resource types.

[0046] Each resource pool typically includes multiple resource modules. For example, as shown in Figure 1, resource pool 1 includes multiple resource modules 1100, resource pool 2 includes multiple resource modules 1200, resource pool 3 includes multiple resource modules 1300, and resource pool 4 includes multiple resource modules 1400. The multiple resource modules in each resource pool can be multiple resource modules for processing data or multiple resource modules for storing data.

[0047] Although corresponding resource modules (eg, resource modules 1100 , 1200 , 1300 , and 1400 ) in different resource pools generally have different resource types, they share some commonalities in terms of data transmission.

[0048] In the present disclosure, each resource module in each resource pool includes an electronic integrated circuit chip with a PCIe physical interface and at least one optical module, and the optical ports (i.e., optical input port and optical output port) of the at least one optical module are used as the optical ports of the resource module. The optical ports of each resource module are connected to the optical ports of the switch, so that signals can be transmitted between the resource module and the switch via optical interconnection.

[0049] For example, as shown in Figure 1, the resource module 1100 in resource pool 1 includes an electronic integrated circuit chip 600 and an optical module 100, the resource module 1200 in resource pool 2 includes an electronic integrated circuit chip 601 and an optical module 100, the resource module 1300 in resource pool 3 includes an electronic integrated circuit chip 602 and an optical module 100, and the resource module 1400 in resource pool 4 includes an electronic integrated circuit chip 603 and an optical module 100.

[0050] Although the electronic integrated circuit chips 600, 601, 602, and 603 may be functionally of different types, the electronic integrated circuit chips 600, 601, 602, and 603 are all electronic integrated circuit chips having a PCIe physical interface, and the PCIe physical interfaces of the electronic integrated circuit chips 600, 601, 602, and 603 are electrically interconnected with the electrical ports of at least one optical module 100.

[0051] Such a configuration enables at least one optical module 100 to convert electrical signals from the PCIe physical interface of the electronic integrated circuit chip 600, 601, 602, or 603 into optical signals, and to provide the optical signals to the switch 604. Similarly, at least one optical module 100 can convert optical signals from the switch 604 into electrical signals, and to provide the electrical signals to the corresponding electronic integrated circuit chip 600, 601, 602, or 603 through the PCIe physical interface.

[0052] Switch 604 has multiple optical ports (not shown) interconnected with the optical ports of various resource modules in the multiple resource pools (as indicated by black arrows). Furthermore, switch 604 is configured to select at least some of the resource modules from the multiple resource pools and transmit signals to at least some of the resource modules, thereby enabling point-to-point communication between different resource modules.

[0053] It should be noted that, for simplicity of description, FIG1 shows only one electronic integrated circuit chip and one optical module for each module (e.g., resource modules 1100, 1200, 1300, or 1400), but this is merely illustrative and not restrictive. In practice, each resource module may include more than one electronic integrated circuit chip or more than one optical module, and the relationship between electronic integrated circuit chips and optical modules is not limited to a one-to-one relationship. For example, in some embodiments, one electronic integrated circuit chip may be interconnected with multiple optical modules, or multiple electronic integrated circuit chips may be interconnected with multiple optical modules.

[0054] The following will describe embodiments of various resource modules in the resource pooling system of FIG. 1 with reference to FIG. 2A to FIG. 2D .

[0055] For example, in some embodiments, the resource pooling system shown in FIG1 may include a central processing resource pool composed of central processing modules 2100 as shown in FIG2A to interpret instructions and process data. Furthermore, the resource pooling system shown in FIG1 may also include a volatile storage resource pool composed of volatile storage modules 2200 as shown in FIG2B to perform processing and storage operations (e.g., data caching).

[0056] For example, as shown in FIG2A , the central processing module 2100 may include a CPU chip 301, on which a PCIe physical interface 302 is arranged for electrically interconnecting with the electrical port of the optical module 100. In this case, the CPU chip 301 included in the central processing module 2100 is a specific example of the electronic integrated circuit chip 600, 601, 602, or 603 shown in FIG1 .

[0057] In the central processing module 2100 of FIG2A , since the PCIe physical interface 302 on the CPU chip 301 is connected to the electrical input and output ports of the optical module 100, the PCIe high-speed electrical signals and PCIe sideband low-speed electrical signals from the PCIe physical interface 302 of the CPU chip 301 can be converted into optical signals through the optical module 100. Specifically, the PCIe physical interface 302 of the CPU chip 301 is used to convert the electrical signals generated within the CPU chip 301 into PCIe electrical signals (e.g., the high-speed electrical signals and sideband low-speed electrical signals shown in the figure). The PCIe electrical signals are transmitted to the driver in the optical module 100, thereby directly loading the PCIe electrical signals into optical waves through the driver to form optical signals.

[0058] Alternatively, in the reverse direction, the CPU chip 301 can receive a PCIe electrical signal from the optical module 100 through the PCIe physical interface 302. The PCIe electrical signal is obtained by the optical module 100 receiving an optical signal from an external device (for example, the switch 604 shown in Figure 1) through the optical fiber 200 and then performing photoelectric conversion on the optical signal.

[0059] In some embodiments, the CPU chip 301 is packaged in a packaging substrate 400 , and the packaged CPU chip 301 and at least one optical module 100 are arranged in a PCB board 500 .

[0060] In this arrangement, by placing the CPU chip 301 and the optical module 100 on the same PCB board, the CPU chip 301 can be placed as close to the optical module 100 as possible, thereby reducing the length of the PCB wiring between the CPU chip 301 and the optical module 100, which is beneficial to improving signal integrity and reducing transmission delay.

[0061] Turning now to FIG. 2B , illustrated therein is an example of volatile storage modules 2200 that constitute a volatile storage resource pool.

[0062] As multiple resource modules for temporarily storing data, volatile storage module 2200 includes a volatile storage control chip 304 and at least one optical module 100. A PCIe physical interface 302 is provided on volatile storage control chip 304 for electrically interconnecting with the electrical port of optical module 100. In this case, volatile storage control chip 304 included in volatile storage module 2200 is a specific example of an electronic integrated circuit chip 600, 601, 602, or 603 as shown in FIG. 1 .

[0063] In the volatile memory module 2200 shown in FIG2B , because the PCIe physical interface 302 on the volatile memory control chip 304 is connected to the electrical input and output ports of the optical module 100, the PCIe high-speed electrical signals and PCIe sideband low-speed electrical signals from the PCIe physical interface 302 of the volatile memory control chip 304 can be converted into optical signals through the optical module 100. The PCIe physical interface 302 is used to convert the electrical signals generated within the volatile memory control chip 304 into PCIe electrical signals (e.g., the high-speed electrical signals and sideband low-speed electrical signals shown in the figure). The PCIe electrical signals are then transmitted to the driver in the optical module 100, thereby directly loading the PCIe electrical signals into optical waves through the driver to form optical signals.

[0064] Alternatively, in the reverse direction, the volatile storage control chip 304 can receive a PCIe electrical signal from the optical module 100 through the PCIe physical interface 302. The PCIe electrical signal is obtained by the optical module 100 receiving an optical signal from an external device (for example, the switch 604 shown in Figure 1) through the optical fiber 200 and then performing photoelectric conversion on the optical signal.

[0065] In addition, as shown in Figure 2B, the volatile storage module 2200 also includes a series of volatile storage units 306, which are connected to the volatile storage control chip 304 through an interface 305 (for example, a DDR interface, a "double data rate" interface) on the volatile storage control chip 304, so that the volatile storage control chip 304 can access the volatile storage units 306.

[0066] The volatile storage unit 306 may be, for example, a dual in-line (DIMM) memory module. For example, the DIMM memory module may be provided on the PCB 500 via a slot and connected to the interface 305 via traces in the PCB 500. In some embodiments, the DIMM memory module may be a DRAM.

[0067] In some embodiments, the volatile memory control chip 304 is packaged in a packaging substrate 400 , and the packaged volatile memory control chip 304 , at least one optical module 100 , and a series of volatile memory units 306 are arranged in a PCB board 500 .

[0068] In this arrangement, by placing the volatile storage control chip 304 and the optical module 100 on the same PCB board, the volatile storage control chip 304 can be placed as close to the optical module 100 as possible, thereby reducing the length of the PCB wiring between the volatile storage control chip 304 and the optical module 100, which is beneficial to improving signal integrity and reducing transmission delay.

[0069] The above describes an example of resource modules in the basic resource pool in the resource pooling system shown in FIG. 1 in conjunction with the examples in FIG. 2A-2B .

[0070] Optionally, in order to meet the requirements of different computing tasks, the resource pooling system proposed in the present disclosure may also include other resource pools composed of other resource modules, such as an artificial intelligence computing resource pool or a non-volatile storage resource pool.

[0071] In some embodiments, for example, when the system needs to process a large number of artificial intelligence tasks, in order to speed up the processing speed of the system, it is necessary to configure an artificial intelligence computing resource pool composed of artificial intelligence computing modules 2300 as shown in Figure 2C.

[0072] For example, as shown in FIG2C , artificial intelligence computing module 2300 may include an artificial intelligence computing chip 303 and at least one optical module 100. A PCIe physical interface 302 is provided on artificial intelligence computing chip 303 for electrically interconnecting with the electrical port of optical module 100. In this case, artificial intelligence computing chip 303 included in artificial intelligence computing module 2300 is a specific example of electronic integrated circuit chip 600, 601, 602, or 603 as shown in FIG1 .

[0073] In the artificial intelligence computing module 2300 of FIG2C , since the PCIe physical interface 302 on the artificial intelligence computing chip 303 is connected to the electrical input and output ports of the optical module 100, the PCIe high-speed electrical signals and PCIe sideband low-speed electrical signals from the PCIe physical interface 302 of the artificial intelligence computing chip 303 can be converted into optical signals through the optical module 100. The PCIe physical interface 302 is used to convert the electrical signals generated within the artificial intelligence computing chip 303 into PCIe electrical signals (e.g., the high-speed electrical signals and sideband low-speed electrical signals shown in the figure), and transmit the PCIe electrical signals to the driver in the optical module 100, thereby directly loading the PCIe electrical signals into light waves through the driver to form optical signals.

[0074] Alternatively, in the reverse direction, the artificial intelligence computing chip 303 can receive a PCIe electrical signal from the optical module 100 through the PCIe physical interface 302. The PCIe electrical signal is obtained by the optical module 100 receiving an optical signal from an external device (for example, the switch 604 shown in Figure 1) through the optical fiber 200 and then performing photoelectric conversion on the optical signal.

[0075] In some embodiments, the artificial intelligence computing chip 303 is packaged in a packaging substrate 400 , and the packaged artificial intelligence computing chip 303 and at least one optical module 100 are arranged in a PCB board 500 .

[0076] In this arrangement, by arranging the artificial intelligence computing chip 303 and the optical module 100 on the same PCB board, the artificial intelligence computing chip 303 can be arranged as close to the optical module 100 as possible, thereby reducing the length of the PCB wiring between the artificial intelligence computing chip 303 and the optical module 100, which is beneficial to improving signal integrity and reducing transmission delay.

[0077] The artificial intelligence computing chip 303 shown in Figure 2C can also be called XPU or artificial intelligence accelerator, etc., or it can be various AI training chips, including one or more of a graphics processing unit (GPU), a neural network processing unit (NPU), a tensor processing unit (TPU), an intelligent processing unit (IPU), and a deep learning processing unit (DPU).

[0078] In some computing scenarios with high storage requirements, additional non-volatile storage resource pools may be configured for the resource pooling system shown in Figure 1. Figure 2D shows an example of non-volatile storage modules 2400 constituting a non-volatile storage resource pool.

[0079] As a resource module for long-term data storage, non-volatile storage module 2400 includes a non-volatile storage control chip 307 and at least one optical module 100. A PCIe physical interface 302 is provided on non-volatile storage control chip 307 for electrically interconnecting with the electrical port of optical module 100. In this case, non-volatile storage control chip 307 included in non-volatile storage module 2400 is a specific example of an electronic integrated circuit chip 600, 601, 602, or 603 as shown in FIG. 1 .

[0080] In the non-volatile storage module 2400 of FIG2D , because the PCIe physical interface 302 on the non-volatile storage control chip 307 is connected to the electrical input and output ports of the optical module 100, the PCIe high-speed electrical signals and PCIe sideband low-speed electrical signals from the PCIe physical interface 302 of the non-volatile storage control chip 307 can be converted into optical signals by the optical module 100. The PCIe physical interface 302 is used to convert the electrical signals generated within the non-volatile storage control chip 307 into PCIe electrical signals (e.g., the high-speed electrical signals and sideband low-speed electrical signals shown in the figure), and transmit the PCIe electrical signals to the driver in the optical module 100, thereby directly loading the PCIe electrical signals into optical waves through the driver to form optical signals.

[0081] Alternatively, in the reverse direction, the non-volatile storage control chip 307 can receive a PCIe electrical signal from the optical module 100 through the PCIe physical interface 302. The PCIe electrical signal is obtained by the optical module 100 receiving an optical signal from an external device (for example, the switch 604 shown in Figure 1) through the optical fiber 200 and then performing photoelectric conversion on the optical signal.

[0082] In addition, as shown in FIG2D , the non-volatile storage module 2400 further includes a series of non-volatile storage units 309 (e.g., flash memory units). The non-volatile storage units 309 are connected to the non-volatile storage control chip 307 via an interface 308 (e.g., a flash memory interface) on the non-volatile storage control chip 307, allowing the non-volatile storage control chip 307 to access the non-volatile storage units 309.

[0083] In some embodiments, the nonvolatile memory control chip 307 is packaged in a packaging substrate 400 , and the packaged nonvolatile memory control chip 307 , at least one optical module 100 , and a series of nonvolatile memory units 309 are arranged in a PCB board 500 .

[0084] In this arrangement, by placing the non-volatile storage control chip 307 and the optical module 100 on the same PCB board, the non-volatile storage control chip 307 can be placed as close to the optical module 100 as possible, thereby reducing the length of the PCB wiring between the non-volatile storage control chip 307 and the optical module 100, which is beneficial to improving signal integrity and reducing transmission delay.

[0085] The above describes embodiments of resource modules in various resource pools that can be deployed in the resource pooling system proposed in the present disclosure. It should be noted that the various resource modules described above with respect to Figures 2A-2D are merely exemplary and non-exhaustive. Resource pools composed of various other types of resource modules can also be deployed in the resource pooling system shown in Figure 1 for scheduling by switch 604.

[0086] In addition, it should be noted that, although the resource modules in each resource pool described in the above embodiments have the same resource type, they do not need to have completely identical configurations.

[0087] For example, assuming there are eight central processing modules 2100 in the aforementioned central processing resource pool, these eight central processing modules, while having similar functions, do not necessarily need to have identical resource configurations. For example, the first central processing module 2100 may have one CPU chip 301 and one optical module 100, the second central processing module 2100 may have two CPU chips 301 and two optical modules 100, and the third central processing module 2100 may have four CPU chips 301 and eight optical modules 100, and so on.

[0088] Similarly, each resource module in each volatile storage resource pool, non-volatile storage resource pool, or artificial intelligence computing resource pool may also have different resource configurations.

[0089] Optionally, for each resource pool, each resource module therein may have completely identical configurations, or some resource modules therein may have the same configuration, and the remaining resource modules may have different configurations. Any configuration is possible.

[0090] In the above descriptions of the various resource module embodiments in conjunction with Figures 2A-2D , reference was made to the layout of the electronic integrated circuit chips (e.g., CPU chip 301, volatile memory control chip 304, artificial intelligence computing chip 303, or non-volatile memory control chip 307) in each resource module and the optical module 100 being co-located on a PCB. Figure 3 illustrates a cross-sectional view of the packaging of a resource module in a resource pooling system according to an embodiment of the present disclosure.

[0091] In FIG3 , the functional chip 300 may represent any one of the aforementioned CPU chip 301, volatile memory control chip 304, artificial intelligence computing chip 303, or non-volatile memory control chip 307. In FIG3 , the functional electronic integrated circuit chip 300 having the PCIe physical interface 302 is packaged on a packaging substrate 400 and is disposed as a whole on a PCB 500. The optical module 100 is also disposed on the PCB 500.

[0092] The PCIe high-speed electrical signals and PCIe sideband low-speed electrical signals on the functional electronic integrated circuit chip 300 are transmitted to the edge of the onboard optical module 100 through the package substrate traces and the PCB traces 308, and then undergo electrical-to-optical conversion through the components in the optical module 100, and then transmitted via the optical fiber 200.

[0093] In addition, the functional chip 300 can also receive PCIe electrical signals from the optical module 100 through the PCIe physical interface 302. The PCIe electrical signal is obtained by the optical module 100 receiving an optical signal from an external device (for example, the switch 604 shown in Figure 1) through the optical fiber 200 and then performing photoelectric conversion on the optical signal.

[0094] Since the PCB trace 308 can be made as short as possible and has low loss, the layout of the onboard optical module is conducive to ensuring that the optical transmission system has a good signal-to-noise ratio to meet the requirements of the PCIe protocol.

[0095] It should be noted that Figure 3 only shows a schematic arrangement of the functional chip 300 (for example, the CPU chip 301, the volatile storage control chip 304, the artificial intelligence computing chip 303 or the non-volatile storage control chip 307 as described above) and the optical module 100, and is not intended to limit the present disclosure.

[0096] Alternatively, other arrangements between the function chip 300 and the optical module 100 are also possible. For example, the function chip 300 and the optical module 100 can be co-packaged on the substrate 400, or the optical module 100 can be pluggably arranged at the edge of the PCB board 500 and then connected to the function chip via PCB traces or overhead cables.

[0097] Furthermore, it should be noted that FIG3 is merely intended to illustrate the layout and connections between the functional chip 300 and the optical module 100. It does not show the interface 305 and volatile storage unit 306 on the volatile storage control chip 304 shown in FIG2B , nor does it show the interface 308 and non-volatile storage unit 309 on the non-volatile storage control chip 307 shown in FIG2D . These components may be arranged on the PCB 500 in any suitable manner.

[0098] In order to more comprehensively and fully illustrate the present disclosure, specific details of the optical module 100 involved in the aforementioned embodiments of the present disclosure will be introduced below with reference to Figures 4 to 6 .

[0099] Embodiments of the present disclosure provide an optical module that can be directly driven by an input PCIe electrical signal and can directly output a PCIe electrical signal.

[0100] In some embodiments, the above-mentioned input PCIe electrical signal can be a PCIe electrical signal output from a PCIe standard physical interface, and the above-mentioned output PCIe electrical signal can be directly fed to the PCIe standard physical interface and can be reversely converted by the PCIe standard physical interface.

[0101] For simplicity, in the following text, this optical module that is directly driven by a PCIe electrical signal and can directly output a PCIe electrical signal is referred to as a PCIe optical module.

[0102] It should be noted that, as used herein, the term "PCIe electrical signal" refers to an electrical signal that complies with the PCIe bus standard. For example, a PCIe electrical signal may be an electrical signal obtained by performing protocol conversion on the physical layer of a PCIe interface on an external electronic integrated circuit chip. Furthermore, for example, a "PCIe electrical signal" may include high-speed differential electrical signals and sideband low-speed electrical signals directly output from the PCIe physical interface of an external electronic integrated circuit chip.

[0103] Depending on the data transmission rate and modulation mode adopted by the system, the "PCIe electrical signal" may include, for example, a 32G high-speed differential electrical signal in NRZ format, or a 64G high-speed differential electrical signal in PAM4 format.

[0104] Various embodiments of the PCIe optical module will be described below with reference to the accompanying drawings.

[0105] FIG4 is a schematic diagram showing the overall configuration of the optical module 100 according to an embodiment of the present disclosure.

[0106] As shown in FIG. 4 , the optical module 100 functionally includes an electrical input / output interface EI / O, an optical input / output interface OI / O, a light emitting unit 700 , a light receiving unit 800 , and a control unit 900 .

[0107] The optical transmission unit 700 may also be called a TX unit, and is used to convert the input electrical signal 110 received from the electrical input / output interface EI / O into an output optical signal 120 , ie, perform electrical-to-optical conversion (also called EO conversion).

[0108] The optical receiving unit 800 may also be referred to as an RX unit, and is configured to convert an input optical signal 210 received from the optical input / output interface OI / O into an output electrical signal 220 , ie, perform optical-to-electrical conversion (also referred to as OE conversion).

[0109] The control unit 900 may be any type of controller or microcontroller, configured to control the optical emitting unit 700 to perform EO conversion of the input electrical signal 110 to the output optical signal 120. Similarly, the control unit 900 may also control the optical receiving unit 800 to perform OE conversion of the input optical signal 210 to the output electrical signal 220.

[0110] As mentioned above, the optical module proposed in the present disclosure can be directly driven by PCIe electrical signals and can directly output PCIe electrical signals. This is primarily achieved by configuring the aforementioned electrical input and output interface to directly connect to the PCIe interface in the output port of a functional electronic integrated circuit chip, and directly transmit the received signal to the driver in the optical transmission unit 700 of the optical module. In other words, the optical module receives the signal from the PCIe interface in the output port of the functional electronic integrated circuit chip and transmits it directly to the driver of the optical module without undergoing protocol conversion or other processing.

[0111] That is, the input electrical signal 110 and the output electrical signal 220 shown in FIG. 1 are both PCIe electrical signals.

[0112] In this way, compared with the Ethernet optical module, the PCIe optical module proposed in the present disclosure does not require a retimer, and does not require an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC) to perform analog-to-digital / or digital-to-analog conversion on high-speed electrical signals, making the PCIe optical module completely transparent to the digital logic protocol and reducing system latency.

[0113] In some embodiments, in the EO conversion direction, the input electrical signal 110 can be an electrical signal from an external device, such as an external computing device, storage device, communication device, etc. In addition, the electrical signal 220 output from the optical module 100 can be provided to the same external device.

[0114] For example, the external device may be a device having a PCIe physical interface and capable of receiving or sending PCIe electrical signals. In this case, the input electrical signal as described above may be input into the electrical input / output interface EI / O of the optical module 100 via the PCIe physical interface of the external device, thereby performing EO conversion.

[0115] In the embodiments of the present disclosure, the external device may refer to various electronic integrated circuit chips as described above, for example, the CPU chip 301, the volatile memory control chip 304, the artificial intelligence computing chip 303, or the non-volatile memory control chip 307 as described above. In addition, the external device may also refer to the switch chip 310 mentioned later with respect to FIG.

[0116] In this case, for example, if the electrical signal output by the PCIe physical interface of the external device is a PCIe electrical signal carrying "information A," then when the optical module 100 receives the PCIe electrical signal carrying "information A," the optical emitting unit 700 in the optical module 100, under the control of the control unit 900, converts the PCIe electrical signal into a corresponding optical signal, which also carries the same "information A." This information is carried by light modulation in the optical emitting unit 700. The specific implementation of light modulation will be described in detail later.

[0117] Therefore, converting the received input electrical signal 110 into the output optical signal 120 as described above actually means loading the information carried by the input electrical signal 110 onto the output optical signal 120 in a modulated manner.

[0118] Accordingly, in the direction of OE conversion, the input optical signal 210 may also be an optical signal from an external device. In addition, the optical signal 120 output from the optical module 100 may also be provided to the same external device.

[0119] For example, the external device can provide the input optical signal 210 to the optical module 100 via an optical fiber. The input optical signal 210 can carry specific information (e.g., "information B"). In other words, the input optical signal 210 can carry "information B" using a certain modulation technique. The optical receiving unit 800 in the optical module 100 performs OE conversion on the optical signal carrying "information B" to obtain an electrical signal carrying the same "information B." This output electrical signal can then be provided to external computing devices, storage devices, communication devices, etc., as described above.

[0120] The PCIe interface described above (e.g., a PCIe interface in an output port of an electronic integrated circuit chip) may include PCIe interfaces that conform to various versions, including but not limited to PCIe 1.0, PCIe 2.0, PCIe 3.0, PCIe 4.0, PCIe 5.0, and PCIe 6.0. Similarly, under the corresponding version, the PCIe interface of the optical module 100 described above may also conform to any of various specifications, including but not limited to PCIe x1, PCIe x4, PCIe x8, PCIe x16, and PCIe x32.

[0121] Therefore, the PCIe electrical signal described above may be any one of the electrical signals conforming to the various PCIe versions and various specifications described above.

[0122] By providing a PCIe optical module as described above that is directly driven by PCIe electrical signals and can directly output PCIe electrical signals, such a PCIe optical module can be used to more simply interconnect computing devices when building an optical network, thereby avoiding the conversion of the physical layer and protocol layer from PCIe to Ethernet.

[0123] Furthermore, because the PCIe optical module proposed in this disclosure directly receives and outputs PCIe electrical signals, further digital-to-analog and analog-to-digital conversion operations before and after conversion are eliminated within the optical module. In other words, the PCIe optical module proposed in this disclosure can be free of traditional DAC and ADC components, enabling faster optical-to-electrical and electro-optical conversions, further reducing data transmission latency.

[0124] Therefore, the PCIe optical module proposed in the present disclosure can not only solve the bandwidth limitation and high latency problems in Ethernet solutions, but also simplify hardware design.

[0125] Optionally, an electrical signal based on the CXL protocol may be used in the PCIe optical module described above to further reduce data transmission delay.

[0126] The CXL (also known as "High-Speed ​​Computing Link") protocol is an emerging technology specification developed by the open industry standards organization of the CXL Alliance, which can support data center acceleration. Since CXL is based on the PCIe protocol (PCIE 5.0) and is fully compatible with PCIe standard slots, it can enable the device's memory or cache to be quickly accessed globally by all devices that support the CXL protocol. Therefore, the CXL protocol can be used to quickly access the device through the PCIe standard interface, resulting in higher data access efficiency and lower local data access latency. In this article, the electrical signal based on the physical layer of the PCIe standard interface (such as PCIe 5.0) and using the CXL protocol can also be referred to as PCIe / CXL electrical signal.

[0127] In some embodiments, the input and output electrical signals described above can be PCIe / CXL electrical signals based on the physical layer of the PCIe interface and the CXL protocol layer. Transmitting CXL protocol-based electrical signals over a standard PCIe interface facilitates further acceleration of data access and data exchange.

[0128] Fig. 5A shows a structural diagram of an example of an optical module 100 according to an embodiment of the present disclosure. It should be noted that the optical module 100 shown in Fig. 5A can be regarded as a more detailed embodiment of the optical module 100 shown in Fig. 5A.

[0129] For example, the light emitting unit 700 shown in FIG4 may include a light emitter 701A and a driver 702 as shown in FIG5A . The driver 702 is configured to drive the light emitter 701A to emit a light signal as the output light signal 120 .

[0130] In addition, the light receiving unit 800 shown in FIG4 may include a light detector 801 and an amplifier 802 as shown in FIG5A . The light detector 801 may convert the detected input light signal 210 into an electrical signal, and the amplifier 802 may further amplify the converted electrical signal and then output the amplified electrical signal as the output electrical signal 220.

[0131] The optical transmitter 701A shown in FIG. 5A may be a “directly modulated” optical transmitter, such as a directly modulated vertical surface cavity laser (VCSEL) or a distributed feedback (DFB) laser.

[0132] The so-called "direct modulation" means that the control unit 900 can control the electrical signal provided by the driver 702 to the optical transmitter 701A according to the input electrical signal 110, thereby controlling the intensity of the optical signal emitted by the optical transmitter 701A, without using other modulators to load or modulate the information in the electrical signal into the emitted optical signal.

[0133] For example, the control unit 900 can directly control the magnitude of the current provided by the driver 702 according to the amplitude of the logic levels "1" and "0" of the input electrical signal 110, so that the intensity of the light emitted by the light emitter 701A can be linearly or substantially linearly related to the amplitude of the input current.

[0134] Optionally, the optical transmitter in the optical module of the present disclosure may also be an "externally modulated" optical transmitter. As the name implies, an "externally modulated" optical transmitter is one that cannot modulate light itself but relies on external equipment to modulate light.

[0135] Figure 5B shows another example of the structure of the optical module 100 according to an embodiment of the present disclosure. In Figure 5B , the optical transmitter 701B is, for example, an externally modulated laser, and the optical transmission unit 700 shown in Figure 4 needs to additionally include a modulator 703 in addition to the driver 702 and the optical transmitter 701B.

[0136] In this case, light emitter 701B is in a stable light-emitting state and emits light of consistent intensity. The light emitted by light emitter 701B is provided to modulator 703. Control unit 900 can control the electrical signal input to modulator 703 via driver 702, thereby modulating the amplitude, phase, and other characteristics of the light received from light emitter 701B. This modulates the information carried in input electrical signal 110 onto the light to form output optical signal 120.

[0137] Typical examples of the modulator 703 include integrated photonic modulators based on silicon, indium phosphide, thin-film lithium niobate or polymer, and the structure may be a micro-ring modulator, a Mach-Zehnder modulator or an electro-absorption modulator.

[0138] For example, in the case where the modulator 703 is an electro-absorption modulator, the control unit 900 can control the switch of the modulator 703 through the driver 702 to make it absorb or not absorb light, thereby absorbing the light emitted by the light emitter 701B (for example, corresponding to the output logic "0"), or not absorbing the light emitted by the light emitter 701B (for example, corresponding to the output logic "1"). In this way, the intensity and phase of the final output light can be controlled, so that information can be modulated or loaded onto the output optical signal 120.

[0139] It should be noted that the modulation formats of the logic levels "1" and "0" of the input electrical signal 110 mentioned above are merely exemplary and not limiting. In practice, the input electrical signal 110 may have any suitable modulation format.

[0140] In addition, the driver 702 , the photodetector 801 , and the amplifier 802 shown in FIG. 5A-5B may be implemented using any suitable components in the art.

[0141] For example, the driver 702 can be implemented by a circuit composed of various electronic components such as transistors, resistors, and capacitors. For example, the light detector 801 can be various types of photodiodes with various sensitivities, such as a photomultiplier tube (PMT), an avalanche photodiode (APD), a silicon photomultiplier tube (SiPM), etc. Furthermore, the amplifier 802 can be a traditional transimpedance amplifier (TIA) or various types of amplifiers based on similar or other principles, which will not be elaborated on here.

[0142] Various embodiments of the internal structure of the PCIe optical module are described above mainly with reference to FIG. 5A-5B . The input signal and output signal of the PCIe optical module will be described in detail below.

[0143] In the field of optical transmission, the signals transmitted in the system can be roughly divided into two categories according to their functions: one is data signal and the other is control signal.

[0144] A data signal is a signal that carries the target information to be transmitted. It can be either an electrical signal or an optical signal. For example, an electrical signal can represent data information through its amplitude and timing, while an optical signal can represent data information through characteristics such as the intensity, phase, and frequency of the modulated light. Because data signals contain large amounts of information and change rapidly, they generally require high-speed differential signaling for transmission.

[0145] A control signal generally refers to a signal that carries control information or system information. It can be either an electrical signal or an optical signal. Compared to data signals, control signals carry less information and change more slowly in the time domain. Therefore, low-speed sideband signals can be used to transmit control signals.

[0146] The input and output signals discussed above with respect to Figures 5A and 5B in this disclosure include data signals, ie, signals carrying target information data to be transmitted. Figure 6 shows a schematic diagram of various signals in the optical module 100 according to an embodiment of the present disclosure.

[0147] For example, as shown in FIG6 , the input electrical signal input into the optical module 100 may include a first data electrical signal 110 - 1 , and the first data electrical signal 110 - 1 may be an electrical signal having multiple channels.

[0148] In this case, the optical transmission unit 700 needs to include a corresponding plurality of transmission channels for converting the first data electrical signal 110 - 1 into a first data optical signal 120 - 1 , wherein the first data optical signal 120 - 1 also has a corresponding plurality of channels.

[0149] For example, if the first data electrical signal 110-1 has eight channels, the optical transmission unit 700 also needs to include eight transmission channels to support EO conversion of the electrical signal in each channel of the first data electrical signal 110-1. After EO conversion, the first data optical signal 120-1 also has eight channels of optical output.

[0150] For example, if the first data electrical signal 110-1 has 32 channels, the optical transmission unit 700 also needs to include 32 transmission channels to support EO conversion of the electrical signal in each channel of the first data electrical signal 110-1. After EO conversion, the first data optical signal 120-1 also has 32 channels of optical output.

[0151] It should be noted that the optical emission unit 700 includes multiple emission channels, which means that for the electrical signal of each channel in the first data electrical signal 110 - 1 , a corresponding driver + optical emitter needs to be arranged to perform EO conversion on the electrical signal of the channel.

[0152] For example, if the first data electrical signal 110 - 1 has 8 channels, 8 sets of drivers + optical transmitters are required to drive the 8 channels. If the first data electrical signal 110 - 1 has 16 channels, 16 sets of drivers + optical transmitters are required to drive the 8 channels, and so on.

[0153] In some examples, the optical transmitters in each driver+optical transmitter group can be any of the directly modulated optical transmitters and externally modulated optical transmitters described above. Furthermore, when the optical transmitters in each driver+optical transmitter group are externally modulated optical transmitters, each transmission channel also needs to include a corresponding modulator. For example, the modulator can be one of the various modulators described above with respect to FIG. 5B .

[0154] Preferably, when the first data electrical signal 110 - 1 has multiple channels, the multiple transmission channels in the optical transmission unit 700 can be configured with the same driver + optical transmitter group, or driver + optical transmitter + modulator group, thereby simplifying the design and control of the PCIe optical module.

[0155] For example, when the first data electrical signal 110-1 has eight channels, each of the eight transmission channels in the optical transmission unit 700 has the same configuration. For example, each transmission channel may include the same driver and the same combination of directly modulated optical transmitters, or each transmission channel may include the same combination of the same driver, the same externally modulated optical transmitter, and the same modulator.

[0156] However, any other arrangements also fall within the scope of the present disclosure. For example, if the first data electrical signal 110-1 has eight channels, a driver + VCSEL direct modulation laser combination can be configured for channel 1, a driver + DFB direct modulation laser combination can be configured for channel 2, and a driver + external modulation laser + electro-absorption modulator combination can be configured for channels 3 to 8.

[0157] The same is true in the optical receiving direction. For example, as shown in FIG6 , the input optical signal input to the optical module 100 may include a second data optical signal 210 - 1 , which may be an optical signal having multiple channels. The optical receiving unit 800 also correspondingly includes multiple receiving channels for converting the second data optical signal 210 - 1 into a second data electrical signal 220 - 1 having multiple channels.

[0158] For example, if the second data optical signal 210-1 has eight channels, the optical receiving unit 800 also needs to include eight receiving channels to support OE conversion of the optical signal in each channel of the second data optical signal 210-1. After OE conversion, the second data electrical signal 220-1 also has eight channels of electrical output.

[0159] For example, if the second data optical signal 210-1 has 32 channels, the optical receiving unit 800 also needs to include 32 receiving channels to support OE conversion of the optical signal in each channel of the second data optical signal 210-1. After OE conversion, the second data electrical signal 220-1 also has 32 channels of electrical output.

[0160] It should be noted that the optical receiving unit 800 includes multiple receiving channels, which means that for the optical signal of each channel in the second data optical signal 210 - 1 , a corresponding optical detector+amplifier needs to be arranged to perform OE conversion on the electrical signal of the channel.

[0161] For example, if the second data optical signal 210-1 has 8 channels, 8 sets of optical detectors + amplifiers are required to receive the 8 optical signals. If the second data optical signal 210-1 has 16 channels, 16 sets of optical detectors + amplifiers are required to receive the 16 optical signals, and so on.

[0162] In some examples, the optical receiver and amplifier in each optical detector+amplifier set can be any one of the photodiodes and transimpedance amplifiers described above.

[0163] Preferably, when the second data optical signal 210 - 1 has multiple channels, the multiple receiving channels in the optical receiving unit 800 may be configured with the same optical detector+amplifier group.

[0164] For example, when the second data optical signal 210 - 1 has 8 channels, each of the 8 receiving channels in the optical receiving unit 800 may have the same configuration, such as each receiving channel may include the same combination of a photodiode and a transimpedance amplifier.

[0165] However, different arrangements for each receiving channel are also within the scope of the present disclosure.

[0166] The above example of the input and output of the PCIe optical module including multiple channels is shown in FIG6 . It should be understood that in actual applications, the input and output of the PCIe optical module may also include a single channel.

[0167] In addition, the number of channels of the data signal in the EO direction may be equal to the number of channels of the data signal in the OE direction. Alternatively, the number of channels of the data signal in the EO direction may not be equal to the number of channels of the data signal in the OE direction.

[0168] In addition, it should be noted that the ordinal numbers such as "first" and "second" mentioned above in this disclosure are only for distinguishing some terms or components, and are not intended to limit the primary and secondary relationships of these terms or components, nor are they intended to limit the time order of these terms or components when performing operations.

[0169] For example, in the above embodiment, “first” is used to distinguish each signal in the EO conversion direction, and “second” is used to distinguish each signal in the OE conversion direction.

[0170] For example, the first data electrical signal and the first data optical signal described above represent electrical signals and optical signals in the EO conversion direction, respectively, and the second data electrical signal and the second data optical signal represent electrical signals and optical signals in the OE conversion direction, respectively.

[0171] For clarity, each embodiment described later will also follow this rule, that is, "first" is used to define each signal in the EO conversion direction, and "second" is used to define each signal in the OE conversion direction.

[0172] Typically, the multiple channels of the first and second data electrical signals (110-1 and 220-1) described above correspond to different numbers of high-speed differential channels in different PCIe specifications. For example, they may correspond to different numbers of differential channels in the aforementioned PCIe x1, PCIe x4, PCIe x8, PCIe x16, PCIe x32 specifications.

[0173] For example, the 16-channel first data electrical signal 110 - 1 may represent an electrical signal of a 16x 32G high-speed differential channel in NRZ format, or an electrical signal of a 16x 64G high-speed differential channel in PAM4 format.

[0174] The first and second data electrical signals ( 110 - 1 and 220 - 1 ), and the first and second data optical signals ( 120 - 1 and 210 - 1 ) discussed above refer to data signals carrying target data information.

[0175] In some embodiments, in addition to the data signals of the multiple channels, the input and output signals of the optical module may further include additional control signals, for example, the control signals indicated by the black bold arrows in FIG6 .

[0176] As shown in FIG. 6 , for example, the input electrical signal of the optical module 100 may further include a first control electrical signal 110 - 2 input to the EI / O.

[0177] For example, the first control electrical signal 110 - 2 may carry first control information, and the optical transmission unit 700 may convert the first control electrical signal 110 - 2 into a first control optical signal 120 - 2 carrying the first control information.

[0178] In addition, similarly, the input optical signal of the optical module 100 may further include a second control optical signal 210 - 2 .

[0179] For example, the second control optical signal 210 - 2 may carry second control information, and the optical receiving unit 800 may convert the second control optical signal 210 - 2 into a second control electrical signal 220 - 2 carrying the second control information.

[0180] Similar to the principles described above regarding the first data electrical signal and the second data electrical signal (110-1 and 220-1), and the first data optical signal and the second data optical signal (120-1 and 210-1), for the first control electrical signal 110-2, a special driver + optical emitter combination needs to be set in the optical emission unit 700 to perform EO conversion of the first control electrical signal 110-2, thereby outputting the first control optical signal 120-2.

[0181] Similarly, for the second control optical signal 210 - 2 , a dedicated optical detector+amplifier combination needs to be provided in the optical receiving unit 800 for performing OE conversion of the second control optical signal 210 - 2 , thereby outputting a second control electrical signal 220 - 2 .

[0182] 6 is similar to that of FIG4 . The optical module 700 and the optical receiving unit 800 in FIG6 can have any configuration as described above with respect to FIG5A-5B , and will not be described in detail here.

[0183] It should be noted that although the first control electrical signal 110-2, the first control optical signal 120-2, the second control optical signal 210-2, and the second control electrical signal 220-2 are described above as a single channel, this is merely for simplification of the description. In other embodiments, the above control signals may also have multiple channels, for example, two, three, or more channels, to achieve EO / OE conversion of more control signals.

[0184] In the case where the above-mentioned control signal has multiple channels, each channel also needs to be arranged with a dedicated transmission channel or receiving channel. The configuration of the transmission channel or receiving channel discussed above for the data signal is also applicable to the control signal and will not be repeated here.

[0185] In some embodiments, the above data signals may be PCIe high-speed electrical signals as described in Figures 2A-2D regarding each resource module in the resource pooling system, and the above control signals may be PCIe sideband low-speed electrical signals as described in Figures 2A-2D regarding each resource module in the resource pooling system.

[0186] For example, the first control electrical signal 110-2 may be a PCIe sideband low-speed control electrical signal, and the first control optical signal 120-2 after EO conversion may be a corresponding sideband low-speed control optical signal. The second control optical signal 210-2 may also be a sideband low-speed control optical signal, and the second control electrical signal 220-2 output after OE conversion may also be a PCIe sideband low-speed control electrical signal.

[0187] Various embodiments of PCIe optical modules have been described above. As mentioned above, by providing a PCIe optical module that is directly driven by PCIe electrical signals and can directly output PCIe electrical signals, such a PCIe optical module can be used to more simply interconnect resource modules when constructing a resource pooling system as described in the present disclosure, thereby avoiding the conversion of the physical layer and protocol layer from PCIe to Ethernet.

[0188] In addition, since the PCIe optical module proposed in the present disclosure directly receives PCIe electrical signals and directly outputs PCIe electrical signals, the further digital-to-analog conversion and analog-to-digital conversion operations before and after the conversion are eliminated inside the optical module, thereby enabling optical-to-electrical and electro-optical conversion to be performed more quickly, which can help to further reduce the delay in data transmission.

[0189] Various embodiments of the switch 604 in the resource pooling system 1000 shown in FIG. 1 will be described below with reference to FIG. 7 to FIG. 9 .

[0190] Figure 7 shows a schematic diagram of an example of a resource pooling system including an electrical switch according to an embodiment of the present disclosure. Figure 9 shows a schematic diagram of a resource pooling system including an optical switch according to an embodiment of the present disclosure.

[0191] As shown in FIG. 7 , the switch in the resource pooling system of the present disclosure may be an electrical switch 606 including a switch chip 310 and a plurality of optical modules 100 .

[0192] FIG8 illustrates an example of a specific configuration of the electrical switch 606 in FIG7 . As shown in FIG8 , in the electrical switch 606 , the switch chip 310 has multiple PCIe physical interfaces 302 , and the multiple PCIe physical interfaces 302 of the switch chip 310 are electrically interconnected with the electrical ports of the multiple optical modules 100 . In this case, the optical ports of the multiple optical modules (e.g., ports corresponding to the optical fibers 200 ) serve as the optical ports of the electrical switch 606 .

[0193] In a configuration where the resource pooling system includes the electrical switch 606 as shown in FIG8 , the electrical switch 606 can select at least some resource modules from, for example, a plurality of resource pools (e.g., resource pools 1-4) as shown in FIG7 for link connection by switching conductive paths in the switch chip 310. After the link connection is established, the electrical switch 606 transmits electrical signals within the switch 606 to transmit signals between at least some of the resource modules.

[0194] Specifically, for example, the electrical switch 606 shown in FIG. 7 or FIG. 8 may transmit signals between at least some resource modules by performing the following operations.

[0195] For example, returning to Figure 7, if the resource module 2100 (e.g., central processing module) in resource pool 1 wants to communicate data with the resource module 2400 (e.g., non-volatile storage module) in resource pool 4 (e.g., perform storage / write operations on data A), the switch control chip (not shown) can be used to enable the electrical switch 606 to switch the conductive path in the switch chip 310, so that the conductive path inside the switch chip 310 enables the resource module 2100 in resource pool 1 and the resource module 2400 in resource pool 4 to communicate with each other.

[0196] Data A in the resource module 2100 is first transmitted from the PCIe physical interface of the electronic integrated circuit chip 600 (e.g., a CPU chip) to the optical module 100 in the resource module 2100. The optical module 100 then performs electrical-to-optical conversion on the data A, converting the data A in the form of an electrical signal into an optical signal.

[0197] Then, the converted data A in optical signal form is fed to the corresponding optical module 100 of the electrical switch 606 through the optical fiber. The corresponding optical module 100 of the electrical switch 606 performs optical-to-electrical conversion on the data A in optical signal form to convert the data A in optical signal form into data A in electrical signal form.

[0198] Next, the data A in the form of an electrical signal is transmitted to the optical module 100 in the electrical switch 606 corresponding to the resource module 2400 through the previously established conductive path, and then the data A in the form of an electrical signal is converted from electrical to optical by the optical module 100 to obtain the data A in the form of an optical signal.

[0199] Next, data A in the form of an optical signal is provided to the corresponding optical module 100 in the resource module 2400 through the optical fiber for optical-to-electrical conversion, and the converted data A in the form of an electrical signal is provided to the electronic integrated circuit chip 603 in the resource module 2400 (for example, a non-volatile storage control unit) through the PCIe physical interface of the electronic integrated circuit chip 603 in the resource module 2400.

[0200] The resource module 2400 may then store the data A in the form of an electrical signal into a corresponding non-volatile storage unit (eg, the non-volatile storage unit 309 as shown in FIG. 2D ), thereby completing the storage operation of the data A.

[0201] The above example illustrates the transmission of data A between resource module 2100 in resource pool 1 and resource module 2400 in resource pool 4. It should be noted that the reverse operation is similar. For example, if resource module 2100 is a central processing resource module and resource module 2400 is a non-volatile memory module, resource module 2100 can also read data from resource module 2400. In this case, for example, data B can be transmitted from resource module 2400 to resource module 2100 in a similar manner. The optical-to-electrical / electrical-to-optical conversion process is similar to that described above and will not be further described here.

[0202] The above describes an example of signal transmission between different resource modules by taking data storage / data reading operations as an example, which is merely exemplary.

[0203] In practice, signals can be transmitted between any two resource modules in any two resource pools, depending on specific needs. For example, a central processing resource module in a central processing resource pool can communicate with a volatile storage module in a volatile storage resource pool to utilize the non-volatile storage module as memory. For example, a central processing resource module in a central processing resource pool can communicate with an artificial intelligence computing module in an artificial intelligence computing resource pool to assist central processing operations, thereby accelerating large-scale computing.

[0204] In addition, the AI ​​computing modules in the AI ​​computing resource pool can also communicate separately with the volatile storage modules in the volatile storage resource pool to use the volatile storage modules as memory for AI computing. Optionally, the AI ​​computing modules in the AI ​​computing resource pool can also communicate separately with the non-volatile storage modules in the non-volatile storage resource pool to perform non-volatile storage of data.

[0205] In addition, the above communication of data A and data B is all transmitted via PCIe high-speed electrical signals. In some cases, PCIe sideband low-speed signals can also be transmitted between resource modules in different resource pools.

[0206] For example, before writing data A, resource module 2100 in resource pool 1 may first transmit a write control signal to resource module 2400 in resource pool 4 via a PCIe sideband low-speed signal, and then resource module 2100 performs the transmission and write operations of data A. For example, before reading data B, resource module 2100 in resource pool 1 may first transmit a read control signal to resource module 2400 in resource pool 4 via a PCIe sideband low-speed signal, and then resource module 2400 performs the read and transmission operations of data B.

[0207] The process of transmitting PCIe sideband low-speed signals between different resource modules in different resource pools is similar to the process of transmitting data A based on the above PCIe high-speed signal. It also undergoes two electrical-to-optical conversions and two optical-to-electrical conversions, which will not be repeated here.

[0208] 8 are similar to the optical modules 100 previously described with respect to resource modules in resource pools. For example, the electrical switch 606 shown in FIG8 can be configured using any of the optical modules described with respect to FIG4-6.

[0209] In addition, a packaging structure similar to that shown in FIG3 can also be used between the switch chip 310 and the optical module 100 shown in FIG7 . For example, the switch chip 310 having the PCIe physical interface 302 is packaged on a packaging substrate 400 and arranged as a whole on a PCB board 500 , and the optical module 100 is also arranged on the PCB board 500 .

[0210] In some embodiments, the plurality of optical modules 100 shown in FIG8 may be identical optical modules. In this case, for example, in the previous example, without taking into account loss or signal micro-deformation, the optical signal data A received from the resource module 2100 and the optical signal data A transmitted from the electrical switch 606 to the resource module 2400 may be the same optical signal.

[0211] Optionally, all optical modules 100 in each resource pool may be identical optical modules and may be identical to the optical modules 100 in the electrical switch 606. In this case, without taking into account losses or slight signal distortion, the electrical signals in each electronic integrated circuit chip and the corresponding electrical signals in the electrical switch 606 may also be identical, and the optical signals input or output by each resource module and the corresponding optical signals input or output by the electrical switch 606 may also be identical.

[0212] The above description, in conjunction with Figures 7 and 8 , describes an example of using an electrical switch 606 in a resource pooling system. When the electrical switch 606 is used in a resource pooling system, since the link connection method within the electrical switch 606 does not need to be changed, nor does the topology of the resource pooling system need to be altered, only the conductive direction of the link needs to be controlled to achieve different configurations between different resources. Therefore, the delay in changing the data flow direction (i.e., changing the conductive path within the electrical switch 606) can be reduced to nanoseconds, enabling near-real-time resource scheduling and configuration.

[0213] Based on the above advantages, it is very advantageous to perform fine-grained and small-flow signal transmission in the resource pooling system using the electrical switch 606, so that the flow direction of data packets can be frequently changed with extremely low latency, thereby achieving rapid data transmission.

[0214] In some other embodiments, an all-optical switch may also be used in the resource pooling system described in the present disclosure. Figure 9 shows a schematic diagram of a resource pooling system including an optical switch 605 according to an embodiment of the present disclosure.

[0215] When using optical switch 605, signal transmission between resource modules in different resource pools is achieved by transmitting optical signals. For example, optical switch 605 reconstructs optical paths to select at least some resource modules from the multiple resource pools (e.g., resource pools 1-4) shown in FIG9 for link connection. Optical switch 605 then transmits optical signals internally to transmit signals between at least some of the resource modules.

[0216] The optical switch 605 can rearrange the optical path switching bandwidth transmission path therein to achieve fully reconfigurable interconnection between resource modules of each resource pool.

[0217] For example, the optical switch 605 can control the optical path based on different physical principles, including piezoelectric, micro-electromechanical, electro-optical, etc. The optical switch 605 can be composed of a series of free-space optical components or a series of integrated optical components.

[0218] Specifically, for example, the optical switch shown in FIG. 9 may transmit signals between at least some resource modules by performing the following operations.

[0219] For example, if the resource module 2100 (e.g., a central processing module) in resource pool 1 wants to communicate with the resource module 2400 (e.g., a non-volatile storage module) in resource pool 4 (e.g., perform storage / write operations on data A), the optical switch 605 can re-arrange the internal optical path so that the optical switch 605 can provide optical path links for the resource module 2100 in resource pool 1 and the resource module 2400 in resource pool 4.

[0220] Data A in the resource module 2100 is first transmitted from the PCIe physical interface of the electronic integrated circuit chip 600 (e.g., a CPU chip) to the optical module 100 in the resource module 2100. The optical module 100 then performs electrical-to-optical conversion on the data A, converting the data A in the form of an electrical signal into an optical signal.

[0221] Next, the converted data A in the form of an optical signal is fed via an optical fiber to the corresponding optical port of the optical switch 605. The optical switch 605, via a pre-arranged optical link, provides the data A in the form of an optical signal to the corresponding optical module 100 in the resource module 2400 via the optical fiber for optical-to-electrical conversion. The converted data A in the form of an electrical signal is then provided to the electronic integrated circuit chip 603 (e.g., a non-volatile storage control unit) in the resource module 2400 via the PCIe physical interface of the chip.

[0222] The resource module 2400 may then store the data A in the form of an electrical signal into a corresponding non-volatile storage unit (eg, the non-volatile storage unit 309 as shown in FIG. 2D ), thereby completing the storage operation of the data A.

[0223] The above example illustrates the transmission of data A between resource module 2100 in resource pool 1 and resource module 2400 in resource pool 4. It should be noted that the reverse operation is similar. For example, if resource module 2100 is a central processing resource module and resource module 2400 is a non-volatile memory module, resource module 2100 can also read data from the resource module. In this case, for example, data B can be transmitted from resource module 2400 to resource module 2100 in a similar manner. The optical-to-electrical / electrical-to-optical conversion process is similar to that described above and will not be further described here.

[0224] Furthermore, depending on specific needs, signals can be transmitted between any two resource modules in any two resource pools. In some cases, sideband low-speed signals can also be transmitted between resource modules in different resource pools. This is similar to the examples described in Figures 7 to 8 and will not be repeated here.

[0225] The above description, combined with FIG9 , describes an example of using an optical switch 605 in a resource pooling system. During signal transmission, optical switch 605 completes signal transmission without optical-to-electrical or electrical-to-optical conversion. Compared to the previously described electrical switching, all-optical switching eliminates the energy consumption and delay of optical-to-electrical or electrical-to-optical conversion and is unaffected by the data modulation rate and modulation format, thereby enabling more flexible data transmission.

[0226] In addition, since the optical switch usually generates millisecond-level delays in the process of optical path arrangement when reconstructing the resource pool, this configuration can preferably be applied to situations where frequent topology changes are not required.

[0227] For example, in scenarios where the topology is fixed and a large amount of data transmission is required, a resource pooling system using optical switches will have obvious advantages. It can transmit huge amounts of data with low latency, such as for neural network training and other operations.

[0228] Various embodiments of the resource pooling system proposed in the present disclosure have been described above in conjunction with Figures 1 to 9. Because electronic integrated circuit chips with PCIe physical interfaces and optical modules directly driven by PCIe electrical signals are employed in each resource module of each resource pool, the resource pooling system described in the present disclosure allows for simpler interconnection between resource modules, thereby avoiding the conversion of the physical and protocol layers from PCIe to Ethernet, thereby reducing signal transmission delays and enabling faster resource pooling operations.

[0229] Based on the resource pooling system described above, the present disclosure further provides a method for performing resource pooling. FIG10 shows a flow chart of the resource pooling method according to an embodiment of the present disclosure.

[0230] As shown in FIG10 , the proposed resource pooling method includes: step 1010, selecting at least some resource modules from a plurality of resource pools for link connection through the switch; step 1020, transmitting PCIe sideband control signals between some resource modules through the switch; and step 1030, transmitting PCIe data signals between some resource modules through the switch.

[0231] The link connection in step 1010 can be implemented using a switch as described above with respect to any of the embodiments in Figures 7 to 9 . For example, the conductive paths in the switch chip 310 of the electrical switch 606 in Figures 7-8 can be configured to select at least some resource modules from a plurality of resource pools for link connection. Alternatively, the link connection between at least some resource modules can be achieved by rearranging optical paths using the optical switch shown in Figure 9 .

[0232] The PCIe sideband control signal in step 1020 may be various control signals, such as a read / write control signal, a handshake signal, an acknowledgement signal, etc. The transmission method of the PCIe sideband control signal is similar to the signal transmission method described in conjunction with any of the embodiments in FIG. 7 to FIG. 9 .

[0233] In addition, the PCIe data signal in step 1030 can be various high-speed data signals, such as high-speed data signals for reading / writing storage units, various high-speed data signals for interaction between the CPU and artificial intelligence computing chips, etc.

[0234] The various operations and steps involved in the resource pooling system described above with respect to FIG. 1 to FIG. 9 are also applicable to the method described with respect to FIG. 10 , unless otherwise specified or obviously inappropriate.

[0235] The above describes various embodiments of the resource pooling system and resource pooling method in the embodiments of the present disclosure. It should be noted that the various components or assemblies described in the various embodiments of the present disclosure are merely illustrative. In some cases, some of these components or assemblies may be omitted, replaced with other components or assemblies having the same or similar functions, or additional components or assemblies may be added.

[0236] In addition, the various components or assemblies described in the various embodiments of the present disclosure as being separated or combined with each other are merely for convenience of description and do not imply that they are physically separated or combined with each other, nor do they imply that such separation or combination is required. Those skilled in the art may arbitrarily separate or combine the various components or assemblies according to actual needs.

[0237] In the above description, the embodiments of the present disclosure have been described in conjunction with the accompanying drawings. It should be understood that the above embodiments are merely illustrative, and those skilled in the art should understand that the combination of the constituent elements and processes of the present embodiment can be modified in various ways, and such modifications also fall within the scope of the present disclosure.

Claims

1. A resource pooling system, comprising: A plurality of resource pools, wherein each resource pool comprises a plurality of resource modules for processing data or a plurality of resource modules for storing data, each resource module comprises an electronic integrated circuit chip having a PCIe physical interface and at least one optical module, and the PCIe physical interface of the electronic integrated circuit chip and the electrical port of the at least one optical module are electrically interconnected, and the optical port of the at least one optical module serves as the optical port of the resource module; as well as a switch having optical ports interconnected with optical ports of respective resource modules in the plurality of resource pools, the switch being configured to select at least some of the resource modules from the plurality of resource pools and transmit signals with the at least some of the resource modules, wherein the at least one optical module converts a first electrical signal from a PCIe physical interface of the electronic integrated circuit chip into a first optical signal and provides the first optical signal to the switch, and The at least one optical module converts the second optical signal from the switch into a second electrical signal, and provides the second electrical signal to the corresponding electronic integrated circuit chip through the PCIe physical interface.

2. The resource pooling system according to claim 1, wherein: The multiple resource pools include: A central processing resource pool, comprising a plurality of central processing modules as the plurality of resource modules for processing data, each central processing module comprising a CPU chip as the electronic integrated circuit chip with a PCIe physical interface; and The volatile storage resource pool includes multiple volatile storage modules as the multiple resource modules for storing data. Each volatile storage module includes a volatile storage control chip as the electronic integrated circuit chip with a PCIe physical interface. Each volatile storage module also includes a volatile storage unit.

3. The resource pooling system according to claim 2, wherein: The multiple resource pools also include: The artificial intelligence computing resource pool includes multiple artificial intelligence computing modules as the multiple resource modules for processing data, and each artificial intelligence computing module includes an artificial intelligence computing chip as the electronic integrated circuit chip with a PCIe physical interface.

4. The resource pooling system according to claim 2 or 3, wherein: The multiple resource pools also include: The non-volatile storage resource pool includes multiple non-volatile storage modules as the multiple resource modules for storing data, each non-volatile storage module includes a non-volatile storage control chip as the electronic integrated circuit chip with a PCIe physical interface, and each non-volatile storage module also includes a non-volatile storage unit.

5. The resource pooling system according to claim 3, The artificial intelligence computing chip includes one or more of a graphics processing unit (GPU), a neural network processing unit (NPU), a tensor processing unit (TPU), an intelligent processing unit (IPU), and a deep learning processing unit (DPU).

6. The resource pooling system according to claim 1, wherein the switch is an electrical switch including a switch chip and a plurality of optical modules, The switch chip has multiple PCIe physical interfaces. The multiple PCIe physical interfaces of the switch chip and the electrical ports of the multiple optical modules are electrically interconnected, respectively. The optical ports of the plurality of optical modules serve as the optical ports of the electrical switch, The electrical switch selects at least part of the resource modules from the plurality of resource pools for link connection by switching the conductive paths in the switch chip, and The electrical switch transmits electrical signals within the electrical switch to transmit signals between at least some of the resource modules.

7. The resource pooling system of claim 6, wherein the electrical switch transmits signals between the at least some resource modules by performing the following operations: enabling a first optical module among the plurality of optical modules to convert the first optical signal from the first resource module into a third electrical signal and provide the third electrical signal to the switch chip, enabling the switch chip to transmit the third electrical signal to a second optical module among the plurality of optical modules through the conductive path, The second optical module is enabled to convert the third electrical signal into the second optical signal and provide the second optical signal to the second resource module.

8. The resource pooling system according to claim 7, wherein: The first optical module and the second optical module are the same optical module, and The second optical signal and the first optical signal are the same optical signal.

9. The resource pooling system according to claim 8, wherein: The first optical module and the optical module in the first resource module are the same optical module; and The third electrical signal and the first electrical signal are the same electrical signal.

10. The resource pooling system according to claim 1, wherein the switch is an optical switch, The optical switch selects at least part of the resource modules from the plurality of resource pools for link connection by reconstructing the optical path, and The optical switch transmits optical signals therein to transmit signals between at least some of the resource modules.

11. The resource pooling system according to claim 1, wherein each of the at least one optical module comprises: A control signal conversion channel is used to perform photoelectric conversion or electro-optical conversion on the PCIe sideband control signal; as well as Data signal conversion channel, used for photoelectric conversion or electro-optical conversion of PCIe data signals. The signal transmitted between at least part of the resource modules includes the PCIe sideband control signal and the PCIe data signal.

12. The resource pooling system according to claim 1, wherein: The first electrical signal and the second electrical signal are PCIe electrical signals based on a PCIe physical layer and a PCIe protocol layer or PCIe / CXL electrical signals based on a PCIe physical layer and a CXL protocol layer.

13. The resource pooling system according to claim 7, wherein: The third electrical signal is a PCIe electrical signal based on a PCIe physical layer and a PCIe protocol layer or a PCIe / CXL electrical signal based on a PCIe physical layer and a CXL protocol layer.

14. A method for performing resource pooling based on the resource pooling system according to any one of claims 1 to 13, comprising: Selecting, by the switch, at least part of the resource modules from the plurality of resource pools for link connection; Transmitting a PCIe sideband control signal between the partial resource modules through the switch; as well as The PCIe data signal is transmitted between the partial resource modules through the switch.

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