Light detection device and electronic device

Abstract

The present invention provides a light detection device comprising: a first substrate that has a pixel area which is composed of a plurality of photoelectric conversion elements; a second substrate that is provided on the first substrate and that has a readout circuit which reads out charges generated by the photoelectric conversion elements; and a third substrate that is provided on the second substrate and that has a control circuit which controls the photoelectric conversion elements and the readout circuit, wherein, in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along a row direction and a column direction, and a first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate not overlapping with the pixel area.

Description

Photodetector and electronic equipment

[0001] The present disclosure relates to photodetection devices and electronic devices.

[0002] In recent years, imaging devices having a stacked structure of three substrates have been proposed in order to further reduce the size of imaging devices (photodetection devices). An example of such a device is the imaging device disclosed in Patent Document 1 listed below. The technology disclosed in Patent Document 1 achieves miniaturization of the imaging device by stacking a substrate on which a plurality of pixels are provided, a substrate on which a plurality of pixel transistors for driving each pixel are provided, and a substrate on which a logic circuit for controlling the pixel transistors is provided.

[0003] International Publication No. 2019 / 131965

[0004] In imaging devices (photodetector devices) with the above-mentioned stacked structure, new issues have arisen due to the stacked structure for miniaturization, such as the generation of an electric field between the stacked substrates, which adversely affects circuit operation, and there being a limit to how much the area of ​​the pixel transistors can be increased to reduce noise. Furthermore, because these issues have not been thoroughly addressed until now, there have been limits to how much the performance of imaging devices can be improved.

[0005] Therefore, the present disclosure proposes a technique that can further improve the performance of a photodetector having a stacked structure and an electronic device incorporating the photodetector.

[0006] According to the present disclosure, there is provided a photodetection device comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.

[0007] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a photodetector, the photodetector comprising: a first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.

[0008] 1. An explanatory diagram showing an example of the planar configuration of an imaging device according to a comparative example. FIG. 1 is an explanatory diagram (part 1) showing an example of the pixel and readout circuit of FIG. 1. FIG. 2 is an explanatory diagram (part 2) showing an example of the pixel and readout circuit of FIG. 1. An explanatory diagram explaining the background leading to the embodiment of the present disclosure. FIG. 1 is a plan view (part 1) of an imaging device according to a first embodiment of the present disclosure. A cross-sectional view of the imaging device taken along line A-A' shown in FIG. 4. A cross-sectional view of the imaging device taken along line B-B' shown in FIG. 4. A cross-sectional view of the imaging device taken along line C-C' shown in FIG. 4. A process cross-sectional view (part 1) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. A process cross-sectional view (part 2) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. A process cross-sectional view (part 3) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. A process cross-sectional view (part 4) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. A process cross-sectional view (part 5) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. A process cross-sectional view (part 6) explaining a method for manufacturing an imaging device according to the first embodiment of the present disclosure. An explanatory diagram explaining the background of a second embodiment of the present disclosure. FIG. 2 is a plan view (part 2) of an imaging device according to a first embodiment of the present disclosure. FIG. 3 is a plan view of a main portion of a wiring layer according to a second embodiment of the present disclosure. FIG. 4 is a plan view (part 1) of a main portion of an imaging device according to a second embodiment of the present disclosure. FIG. 5 is a plan view (part 2) of a main portion of an imaging device according to a second embodiment of the present disclosure. FIG. 6 is a cross-sectional view of an imaging device according to a second embodiment of the present disclosure. FIG. 7 is an explanatory view (part 1) for explaining a second embodiment of the present disclosure. FIG. 8 is an explanatory view (part 2) for explaining a second embodiment of the present disclosure. FIG. 9 is a cross-sectional view of an imaging device according to a third embodiment of the present disclosure. FIG. 10 is a process cross-sectional view (part 1) for explaining a method for manufacturing an imaging device according to a third embodiment of the present disclosure. FIG. 11 is a process cross-sectional view (part 2) for explaining a method for manufacturing an imaging device according to a third embodiment of the present disclosure. FIG. 12 is a process cross-sectional view (part 3) for explaining a method for manufacturing an imaging device according to a third embodiment of the present disclosure. FIG. 13 is an explanatory view for explaining a fourth embodiment of the present disclosure. FIG. 14 is a plan view of an imaging device according to a fourth embodiment of the present disclosure. FIG. 15 is a plan view of a main portion of an imaging device according to a fourth embodiment of the present disclosure. FIG. 16 is a process cross-sectional view (part 1) for explaining a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure.10A to 10C are process cross-sectional views (part 2) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 11B are process cross-sectional views (part 3) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 12C are process cross-sectional views (part 4) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 13A are process cross-sectional views (part 5) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 14B are process cross-sectional views (part 6) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 15A are process cross-sectional views (part 7) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 16B are process cross-sectional views (part 8) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 17A are process cross-sectional views (part 9) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 18A are process cross-sectional views (part 10) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure. FIG. 19A are process cross-sectional views (part 11) illustrating a method for manufacturing an imaging device according to a fourth embodiment of the present disclosure.

[0009] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0010] The drawings referred to in the following description are for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0011] Furthermore, in the following description, "electrically connected" means connecting a plurality of elements directly or indirectly via another element.

[0012] In the following description, "sharing" means that different elements (such as pixels) share one other element (such as a floating diffusion).

[0013] Furthermore, in the following explanation, an example is given in which the technology proposed in this disclosure is applied to an imaging device, but the technology proposed in this disclosure is not limited to application to imaging devices, and can be applied, for example, to a light detection device including an imaging device.

[0014] The description will be given in the following order: 1. Schematic configuration of an imaging device 2. Background that led the inventor to create the embodiments according to the present disclosure 3. First embodiment 3.1 Detailed configuration 3.2 Manufacturing method 4. Second embodiment 5. Third embodiment 5.1 Detailed configuration 5.2 Manufacturing method 6. Fourth embodiment 6.1 Detailed configuration 6.2 Manufacturing method 7. Summary 8. Application examples 8.1 Application example to electronic devices 8.2 Application example to an endoscopic surgery system 8.3 Application example to a moving body 9. Supplementary information

[0015] <<1. Schematic Configuration of Imaging Device>> First, before describing the details of the embodiments of the present disclosure, a schematic configuration of an imaging device 1 according to a comparative example will be described as an example of a light detection device with reference to Fig. 1, 2A, and 2B. Fig. 1 is an explanatory diagram showing an example of the planar configuration of the imaging device 1 according to the comparative example. Here, the comparative example refers to an imaging device that the inventors had studied extensively before developing the embodiments of the present disclosure.

[0016] 1, the imaging device 1 has three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). In detail, the imaging device 1 has a three-dimensional structure formed by bonding together the three substrates (the first substrate 10, the second substrate 20, and the third substrate 30), and the first substrate 10, the second substrate 20, and the third substrate 30 are stacked in this order.

[0017] The first substrate 10 has a plurality of pixels 12 that perform photoelectric conversion on a semiconductor substrate 11. The plurality of pixels 12 are arranged in a matrix within a pixel region 13 on the first substrate 10. Hereinafter, the region in which the plurality of pixels 12 are arranged in a matrix will be referred to as a pixel area (not shown).

[0018] The second substrate 20 has, on a semiconductor substrate 21, a readout circuit 22 including a plurality of pixel transistors that read out pixel signals based on the charges output from the pixels 12. The second substrate 20 has a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction.

[0019] The third substrate 30 has a logic circuit 32 on a semiconductor substrate 31 that processes pixel signals and controls the pixels 12 and the readout circuit 22. The logic circuit 32 has, for example, a vertical drive circuit 33, a column signal processing circuit 34, a horizontal drive circuit 35, and a system control circuit 36. The logic circuit 32 (specifically, the horizontal drive circuit 35) outputs an output voltage Vout for each pixel 12 to the outside. In the logic circuit 32, for example, cobalt silicide (CoSi ２ Alternatively, a low resistance region may be formed from silicide formed using a salicide (Self Aligned Silicide) process, such as nickel silicide (NiSi).

[0020] The vertical drive circuit 33, for example, sequentially selects a plurality of pixels 12 row by row. The column signal processing circuit 34, for example, performs analog-to-digital (AD) conversion processing and correlated double sampling (CDS) processing on pixel signals output from each pixel 12 in the row selected by the vertical drive circuit 33. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each pixel 12. The horizontal drive circuit 35, for example, sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The system control circuit 36, for example, controls the driving of each block (the vertical drive circuit 33, the column signal processing circuit 34, and the horizontal drive circuit 35) in the logic circuit 32.

[0021] 2A and 2B show an example of a pixel 12 and a readout circuit 22. In Figures 2A and 32b, four pixels 12 share one readout circuit 22.

[0022] As shown in FIG. 2A , each pixel 12 has common components. Each pixel 12 includes, for example, a photodiode 101, a transfer transistor 102 electrically connected to the photodiode 101, and a floating diffusion 103 that temporarily stores charge output from the photodiode 101 via the transfer transistor 102. The photodiode 101 is a photoelectric conversion element that performs photoelectric conversion to generate charge corresponding to the amount of received light. Specifically, the photodiode 101 performs photoelectric conversion using, for example, visible light to generate charge. The cathode of the photodiode 101 is electrically connected to the source of the transfer transistor 102, and the anode of the photodiode 101 is electrically connected to a reference potential line (e.g., ground or a power supply line). The drain of the transfer transistor 102 is electrically connected to the floating diffusion 103, and the gate of the transfer transistor 102 is electrically connected to a pixel drive line 23. 2A , the four pixels 12 share one floating diffusion 103 and are electrically connected to the input terminal of a common readout circuit 22.

[0023] The readout circuit 22 includes pixel transistors such as a reset transistor 201, an amplification transistor 202, and a selection transistor 203. The source of the reset transistor 201 (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion 103, and the drain of the reset transistor 201 is electrically connected to the power supply line VDD and the drain of the amplification transistor 202. The gate of the reset transistor 201 is electrically connected to a pixel drive line 23 (see FIG. 1). The source of the amplification transistor 202 is electrically connected to the drain of the selection transistor 203, and the gate of the amplification transistor 202 is electrically connected to the source of the reset transistor 201. The source of the selection transistor 203 (the output terminal of the readout circuit 22) is electrically connected to a vertical signal line 24, and the gate of the selection transistor 203 is electrically connected to the pixel drive line 23 (see FIG. 1). The floating diffusion 103 of the pixel 12 and the amplification transistor 202 of the readout circuit 22 are electrically connected by a junction electrode, a through electrode, or the like.

[0024] When the transfer transistor 102 is turned on, it transfers the charge of the photodiode 101 to the floating diffusion 103. The reset transistor 201 resets the potential of the floating diffusion 103 to a predetermined potential. When the reset transistor 201 is turned on, it resets the potential of the floating diffusion 103 to the potential of the power supply line VDD. The selection transistor 203 controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor 202 generates, as the pixel signal, a signal (voltage signal) whose voltage corresponds to the level of the charge held in the floating diffusion 103. When the selection transistor 203 is turned on, the amplification transistor 202 amplifies the potential of the floating diffusion 103 and outputs a voltage corresponding to the amplified potential to the column signal processing circuit 34 via the vertical signal line 24. The reset transistor 201, the amplification transistor 202, and the selection transistor 203 are, for example, CMOS transistors.

[0025] 2A, the conversion efficiency switching transistor 204 may be provided between the source of the reset transistor 201 and the gate of the amplification transistor 202. Therefore, FIG. 2B shows an example in which the readout circuit 22 further includes the conversion efficiency switching transistor 204 and an additional capacitance 205.

[0026] The conversion efficiency switching transistor 204 shown in FIG. 2B is used to switch the conversion efficiency. Generally, signal charge is small when capturing images in dark locations. In this case, when converting charge to voltage, based on Q (charge amount) = C (capacity) × V (voltage), if the capacitance C of the floating diffusion 103 is large, the voltage V converted to voltage by the amplifier transistor 202 will be small. Therefore, a smaller capacitance C is advantageous. On the other hand, in bright locations, signal charge is large. Therefore, if the capacitance of the floating diffusion 103 is not large, the floating diffusion 103 will not be able to receive all the charge from the photodiode 101, resulting in saturation and, in some cases, whiteout in the image. Therefore, to switch the conversion efficiency, the circuit diagram shown in FIG. 2B includes a conversion efficiency switching transistor 204 and an additional capacitance 205. In more detail, when the conversion efficiency switching transistor 204 is turned on during shooting in a bright location, the gate capacitance of the conversion efficiency switching transistor 204 and the additional capacitance 205 are added, allowing the charge that could not be absorbed by the floating diffusion 103 to escape. On the other hand, when the conversion efficiency switching transistor 204 is turned off during shooting in a dark location, the capacitance of the entire floating diffusion 103 decreases and the voltage V increases, allowing the sensitivity to be increased. In this way, by switching the conversion efficiency switching transistor 204 on and off, the capacitance of the floating diffusion 103 can be made variable and the conversion efficiency can be switched.

[0027] <<2. Background that led to the inventors creating the embodiments of the present disclosure>> Next, the background that led to the inventors creating the embodiments of the present disclosure will be described with reference to Fig. 3. Fig. 3 is an explanatory diagram that explains the background that led to the embodiments of the present disclosure.

[0028] In order to achieve miniaturization, the imaging device 1 according to the comparative example has a stacked structure of three substrates 10, 20, and 30. In the imaging device 1 according to the comparative example, an electric field is generated between the stacked substrates, adversely affecting circuit operation, and there is a limit to how much the area of ​​the pixel transistors can be increased to reduce noise. As a result of having a stacked structure for miniaturization, the following three problems have arisen.

[0029] Before the imaging device 1 according to the comparative example was proposed, the pixel region 13, the readout circuit 22, and the logic circuit 32 were provided on the same surface of the same substrate. Later, in the imaging device 1, the pixel region 13, the readout circuit 22, and the logic circuit 32 were provided on different substrates, which made it possible to reduce the area of ​​the imaging device 1 without reducing the size of the pixel region 13. Furthermore, in recent years, as described above, by providing the pixel region 13 and the readout circuit 22 on different substrates, it has become possible to reduce the size of the imaging device 1 while improving the characteristics of the photodiode 101 and the pixel transistor (specifically, it has been possible to increase the saturation charge amount of the photodiode 101 and reduce noise in the pixel transistor).

[0030] On the other hand, a through electrode is required to electrically connect the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13). However, when fabricating such an electrode, the film thickness of the semiconductor substrate 21 in the substrate 20 (readout circuit 22) becomes an issue. Here, to electrically connect the readout circuit 22 and the pixel region 13, it is considered to provide a through electrode 42 that penetrates the semiconductor substrate 21 included in the substrate 20. In this case, as shown on the left side of FIG. 3 , if the semiconductor substrate 21 is thick, the through electrode 42 will be formed to extend deeply. Therefore, to prevent the through electrode 42 from tapering, it is necessary to reduce the aspect ratio of the through hole for providing the through electrode 42. Therefore, since there is a limit to how much the size (diameter) of the through electrode 42 can be reduced in a planar view, it is difficult to further reduce the area of ​​the substrate 20 and thereby make the imaging device 1 smaller. Note that in FIG. 3 , an insulating film 40 is provided between the substrate 10 and the substrate 20.

[0031] Therefore, in order to reduce the size of the through electrode 42, it is conceivable to thin the semiconductor substrate 21 included in the substrate 20. As the semiconductor substrate 21 is made thinner, the depth to which the through electrode 42 extends becomes shallower. As a result, even if the size of the through electrode 42 in a plan view is reduced, the aspect ratio of the through hole for providing the through electrode 42 does not increase, and tapering of the through electrode 42 is unlikely to occur.

[0032] Furthermore, if the semiconductor substrate 21 is thinned, the pixel transistors of the readout circuit 22 will have a configuration similar to that of an SOI (Silicon on Insulator) transistor. Therefore, in order to fabricate pixel transistors made of SOI transistors, it is conceivable to use an SOI substrate as the substrate 20. However, the SOI substrate has a problem in that it is expensive.

[0033] Therefore, the present inventors came up with the idea of ​​bonding a silicon substrate that will become semiconductor substrate 21 of substrate 20 to substrate 10 (pixel region 13) that will become a support substrate, and uniformly polishing the silicon substrate to thin it, thereby reducing the film thickness of semiconductor substrate 21 and using it as substrate 20 (readout circuit 22). In this case, as shown on the right side of Figure 3, the processing distance of the through hole of through electrode 42 that electrically connects readout circuit 22 and pixel region 13 is shortened, and the size (diameter) of the through hole can be reduced.

[0034] Furthermore, by doing this, the film thickness of the thinned semiconductor substrate 21 becomes the same as the thickness of the source and drain operating regions of the pixel transistor, making it less likely for leakage current to flow through the semiconductor substrate 21, thereby reducing the power consumption of the pixel transistor.

[0035] However, because the distance between the pixel transistors of the readout circuit 22 on the substrate 20 and the pixel region 13 on the substrate 10 is shortened, there is an increased likelihood that pixel signals from the pixel region 13 will affect the operation of the readout circuit 22, or that the operation signals from the readout circuit 22 will adversely affect the operation and pixel signals of the pixels 12 in the pixel region 13. For example, when a voltage is applied to an electrode (e.g., the gate of the transfer transistor 102) located below a pixel transistor, an electric field is generated from the electrode toward the pixel transistor above, and this electric field adversely affects the operation of the readout circuit 22. Up until now, in the imaging device 1, efforts have been made to avoid the above-mentioned adverse effects, such as adjusting the readout timing or providing a waiting time. However, such efforts make it difficult to increase the operation speed of the imaging device 1.

[0036] Therefore, the first challenge is to enable the imaging device 1 to operate at a higher speed and with higher performance while suppressing adverse effects that may occur between the photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22.

[0037] Furthermore, before the imaging device 1 according to the comparative example was proposed, the pixel region 13 and the readout circuit 22 were provided on the same surface of the same substrate, and therefore the signal lines for selecting the photodiode 101 and the signal lines for selecting the readout circuit 22 were electrically connected to the logic circuit 32 via a wiring layer on the same surface. In recent years, as described above, by providing the pixel region 13, the readout circuit 22, and the logic circuit 32 on different substrates, it has become possible to increase the area of ​​the photodiode 101 in the pixel region 13, and therefore the conversion efficiency of the photodiode 101 has improved.

[0038] Furthermore, it is required to increase the area (more specifically, the gate) of the amplification transistor 202, which converts the amount of charge from the photodiode 101 into a voltage signal, to reduce noise and minimize variation. Therefore, it was expected that providing the pixel region 13 and the readout circuit 22 on different substrates would enable the area of ​​the amplification transistor 202 to be increased. However, even when the pixel region 13 and the readout circuit 22 are provided on different substrates, there is a limit to how much the area of ​​pixel transistors such as the amplification transistor 202 can be increased. This is because the substrate 20 (readout circuit 22) has an electrode for a signal line that selects the photodiode 101.

[0039] Therefore, the second problem is to increase the area of ​​pixel transistors such as the amplifying transistor 202 in the imaging device 1 .

[0040] Furthermore, in the imaging device 1, increasing the number of pixels 12 increases the likelihood of unintended voltage drops. For example, when capturing a still image, it is necessary to empty (reset) the charge accumulated in the photodiode 101 after capturing the image. Therefore, in the imaging device 1, the transfer transistor 102 and the reset transistor 201 are turned on to empty the photodiode 101 and start capturing the image from that point. Furthermore, if the number of pixels 12 is large, the number of transistors that operate simultaneously for resetting also increases, making it more likely that a voltage drop will occur in the power line. Therefore, in the imaging device 1, measures such as extending the waiting time or designing the device to anticipate voltage drops in advance are necessary.

[0041] Furthermore, in the imaging device 1, there are cases where noise (voltage changes in an extremely short time) gets into the power supply line due to the influence of signal lines adjacent to the wiring layer. Therefore, in the imaging device 1, for example, multiple shots are taken and the most likely data is extracted from the data obtained from the multiple shots, thereby preventing the influence of noise from appearing in the image quality.

[0042] Therefore, the third problem is to suppress the effects of voltage drop and noise without having to take measures such as lengthening the waiting time, requiring multiple captures, or designing the imaging device 1 to take into account voltage drop. If these problems can be solved, the degree of freedom in operation and design of the imaging device 1 can be improved.

[0043] In view of the above circumstances, the present inventor has come up with the embodiments of the present disclosure described below. The details of the embodiments of the present disclosure created by the present inventor will be described below one by one.

[0044] <<3. First Embodiment>> <3.1 Detailed Configuration> First, in order to solve the first problem described above, the present inventor came up with the idea of ​​providing a conductor (first conductor) 401 that serves as a shield between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13). That is, in this embodiment, the conductor 401 functions as a shield, thereby suppressing adverse effects between the pixel region 13 and the readout circuit 22.

[0045] As described above, the imaging device 1 has a laminated structure of the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), i.e., two laminated silicon semiconductor substrates 11 and 21. Because the semiconductor substrates 11 and 21 are single-crystal silicon substrates, the imaging device 1 can form transistors with high mobility.

[0046] Furthermore, in SOI transistors, it is known that by thinning the BOX (buried oxide) layer, a bias can be applied to the silicon layer located below the BOX layer, creating an electric field and controlling the transistor's threshold voltage (Vth), just as in conventional MOS transistors. On the other hand, it is known that by thickening the BOX layer, the back bias is no longer applied, and the transistor's threshold voltage (Vth) becomes constant. Furthermore, when the transistor is off, impact ionization can cause leakage current to flow. This occurs when electrons collide from the source to the drain when the transistor is off, generating holes. These holes then accumulate at the bottom of the transistor. As a result, a parasitic bipolar transistor is formed, with the bottom, where the holes have accumulated, serving as the gate. This creates a potential difference between the base and emitter of the parasitic bipolar transistor, causing current to flow between the emitter and collector. Therefore, current flows even when the transistor is off. Therefore, by thinning the oxide film and applying a back bias to the silicon layer located below the conductive BOX layer, the potential difference between the base and emitter of the parasitic bipolar transistor can be set to 0 V, thereby reducing the current between the emitter and collector of the parasitic bipolar transistor. Furthermore, by applying a negative back bias, the threshold voltage Vth of the SOI transistor is lowered, making it easier to turn off the SOI transistor. Furthermore, when the BOX layer is thin, holes can pass through the barrier of the BOX layer with a certain probability due to the tunneling effect, thereby suppressing hole accumulation at the bottom. For this reason, in semiconductor devices using an SOI substrate, a silicon substrate is provided below the BOX layer to apply a back bias below the SOI transistor.

[0047] In this embodiment, as described above, the conductor 401 that functions as a shield is provided between the two substrates 10 and 20, but this conductor 401 can also function as an electrode for applying a back bias. That is, in this embodiment, it is possible to avoid providing an expensive single-crystal silicon substrate for applying a back bias. Details of such a first embodiment of the present disclosure will be described below.

[0048] An example of a detailed configuration of the imaging device 1 according to the first embodiment of the present disclosure will be described with reference to Fig. 4 and Figs. 5A to 5C. Fig. 4 is a plan view of the imaging device 1 according to the present embodiment. Fig. 5A is a cross-sectional view of the imaging device 1 taken along line A-A' in Fig. 4, Fig. 5B is a cross-sectional view of the imaging device 1 taken along line B-B' in Fig. 4, and Fig. 5C is a cross-sectional view of the imaging device 1 taken along line C-C' in Fig. 4. Note that, for ease of understanding, Fig. 4 shows the gate electrodes of the reset transistor 201 ("RST" in the figure), the amplification transistor 202 ("AMP" in the figure), the selection transistor 203 ("SEL" in the figure), and the conversion efficiency switching transistor 204 ("FDG" in the figure), as well as the conductor 401. Furthermore, for ease of understanding, FIG. 4 also shows a through electrode (Through Contact to Substrate: TCS) 410 ("TRG" in the drawing) that electrically connects the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20, a through electrode 410 ("Well" in the drawing) that electrically connects to the gate of the transfer transistor 102, a through electrode 410 ("FD" in the drawing) that electrically connects to the well of the silicon substrate 111 of the substrate 10, a through electrode 415 ("FD" in the drawing) that electrically connects to the floating diffusion 103 of the silicon substrate 111 of the substrate 10, and a through electrode (Contact to Silicon: CS) 420 ("contact" in the drawing) that electrically connects an electrode located above the transistor of the substrate 20 and the conductor 401.

[0049] 5A to 5C , the imaging device 1 according to this embodiment includes a substrate 10 (pixel region 13) and a substrate 20 (readout circuit 22), and the substrate 20 is stacked on the substrate 10. Note that in this embodiment, a substrate 30 (logic circuit 32) may be provided on the substrate 20.

[0050] In this embodiment, the substrate 10 has a silicon substrate 111, which is a semiconductor substrate made of silicon (Si), and a plurality of pixels 12 that perform photoelectric conversion are provided in the silicon substrate 111. The substrate 10 also has an interlayer insulating film 105 on the silicon substrate 111. Furthermore, an insulating film 302 is provided on the bonding surface of the interlayer insulating film 105 that bonds to the substrate 20.

[0051] In this embodiment, the substrate 20 includes a silicon substrate 311, which is a semiconductor substrate made of silicon. The pixel transistors (e.g., the reset transistor 201, the amplification transistor 202, the selection transistor 203, the conversion efficiency switching transistor 204, etc.) of the readout circuit 22 are provided on the silicon substrate 311. In FIGS. 5A and 5C , a transistor having a sidewall on its gate is illustrated as the pixel transistor. However, in this embodiment, the pixel transistor is not limited to a planar transistor having a sidewall, and may be, for example, a fin-type transistor having a vertical gate. The substrate 20 also includes an insulating film 301 provided below the silicon substrate 311, a conductor 401 provided below the insulating film 301, and an insulating film 302 provided below the conductor 401. The insulating film 302 of the substrate 20 faces the insulating film 302 of the substrate 10, and they are bonded to each other, thereby bonding the substrates 10 and 20 together. Furthermore, an interlayer insulating film 305 is provided above the pixel transistors of the substrate 20, and electrodes and the like are provided on the interlayer insulating film 305.

[0052] In the imaging device 1 according to this embodiment, a conductor 401 is provided on the substrate 20 (readout circuit 22) on the substrate 10 (pixel region 13) side. The conductor 401 is provided with a through electrode (CS) (second through electrode) 420 that electrically connects the conductor 401 to an electrode located above a transistor on the substrate 20. The through electrode 420 penetrates the silicon substrate 311 of the substrate 20. In this embodiment, the potential of the conductor 401 can be fixed by applying a predetermined potential (first potential) to the through electrode 420. Therefore, in this embodiment, even if a negative bias is applied to the gate of the transfer transistor 102 in the substrate 10 (pixel region 13), for example, the conductor 401 with a fixed potential functions as a shield, thereby suppressing adverse effects from the pixel region 13 on the readout circuit 22. As a result, this embodiment enables the readout circuit 22 to operate at higher speeds and with higher performance.

[0053] Furthermore, in this embodiment, even if the insulating film 301 is thinned and the pixel transistor is an SOI transistor, an increase in the threshold voltage of the pixel transistor can be controlled by the back bias effect of the conductor 401 to which a voltage can be applied. For example, when turning off the pixel transistor, the potential of the conductor 401 is set to a negative potential, thereby reducing the leakage current between the source and drain of the pixel transistor and achieving low power consumption.

[0054] Furthermore, in this embodiment, a through electrode (TCS) (first through electrode) 410 is provided that electrically connects between the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20. In detail, the through electrodes 410, 415 electrically connect from the electrode on the interlayer insulating film 305 of the substrate 20 to the silicon substrate 111 of the substrate 10, penetrating the silicon substrate 311 of the substrate 20 and the interlayer insulating film 105 of the substrate 10. Also, FIG. 5B shows the through electrode 415 that is electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10. Also, FIG. 5C shows the through electrode 410 that is electrically connected to the gate (first select gate) of the transfer transistor 102.

[0055] The conductor 401 has a pattern that covers the entire area below the pixel transistor of the readout circuit 22 while avoiding contact with the through electrodes 410, 415. In detail, as shown in FIG. 4 , the conductor 401 has cutouts (openings) 403 at locations where the through electrode 410 ("TRG" in the drawing) that is electrically connected to the gate of the transfer transistor 102, the through electrode 410 ("Well" in the drawing) that is electrically connected to the well of the silicon substrate 111 of the substrate 10, and the through electrode 415 ("FD" in the drawing) that is electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10 are located. By having such a shape, the conductor 401 surrounds these through electrodes 410, 415 and is prevented from making electrical contact with these through electrodes 410, 415.

[0056] As described above, in this embodiment, the conductor 401 is provided between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13). Therefore, in this embodiment, even if a negative bias is applied to the gate of the transfer transistor 102 in the substrate 10 (pixel region 13), the conductor 401, which has a fixed potential, functions as a shield and can suppress the influence of the pixel region 13 on the readout circuit 22. As a result, according to this embodiment, the readout circuit 22 can be operated at a higher speed and with higher performance. That is, in this embodiment, the first problem described above can be solved.

[0057] Furthermore, in this embodiment, even if the silicon substrate 311 is thinned and the pixel transistor is an SOI transistor, an increase in the threshold voltage of the pixel transistor can be controlled by the back bias effect of the conductor 401 to which a voltage can be applied. For example, when turning off the pixel transistor, the potential of the conductor 401 is set to a negative potential, thereby reducing the leakage current between the source and drain of the pixel transistor and achieving low power consumption.

[0058] In this embodiment, the imaging device 1 is not limited to the configurations shown in FIGS. 4 and 5A to 5C, but can be modified into various other configurations.

[0059] 6A to 6F, an example of a method for manufacturing the image pickup device 1 according to this embodiment will be described. Figures 6A to 6F are cross-sectional views illustrating steps in the method for manufacturing the image pickup device 1 according to this embodiment.

[0060] First, as shown in FIG. 6A, an insulating film 301 is formed on a silicon substrate 300 that will be the semiconductor substrate of the substrate 20, a conductor 401 is formed on the insulating film 301, and an insulating film 302 is formed on the conductor 401. The insulating film 301 is, for example, a silicon oxide film (SiO ２ The insulating film 301 may have a thickness of, for example, about 10 nm.

[0061] In this embodiment, the thickness of the insulating film 301 is not particularly limited, but in order to obtain the back bias effect, a thinner film is preferable. However, if the film thickness of the insulating film 301 is made too thin, the withstand voltage may not be ensured. Therefore, in this embodiment, the film thickness of the insulating film 301 may be determined depending on the voltage used in the imaging device 1.

[0062] In this embodiment, the material of the insulating film 301 is not particularly limited as long as it is an insulating film, but it is preferable to use a material with a low dielectric constant if it is desired to prevent the generation of parasitic capacitance with a large capacitance value between the transistor and the conductor 401. Conversely, in this embodiment, it is preferable to use a material with a high dielectric constant as the material for the insulating film 301 if it is desired to prevent the generation of parasitic capacitance with a large capacitance value between the transistor and the conductor 401. In the above example, a silicon oxide film with a low dielectric constant is selected as the material for the insulating film 301 because it is desired to prevent the generation of parasitic capacitance with a large capacitance value between the transistor and the conductor 401.

[0063] The material of the conductor 401 can be, for example, a polysilicon film. Furthermore, in this embodiment, since the polysilicon film has high resistance, it may be doped (implanted) with ions such as phosphorus (P) or boron (B). In the above example, a polysilicon film implanted with phosphorus is used as the material of the conductor 401. Note that, in this embodiment, the material of the conductor 401 is not particularly limited as long as it is a conductive film. However, in this embodiment, since the manufacturing process includes a step of performing high-temperature heat treatment, if a metal is used as the material of the conductor 401, it is preferable to use a high-melting-point metal. Specifically, the material of the conductor 401 can be, for example, tantalum (Ta), titanium (Ti), tungsten (W), or the like. Furthermore, when a high-melting-point metal is used as the material of the conductor 401, it becomes possible to function as a shield against not only electromagnetic waves but also visible light and infrared rays.

[0064] In this embodiment, the material of the insulating film 302 is not particularly limited as long as it is an insulating material. However, since the insulating film 302 will later become a bonding surface with the substrate 10, it is preferable to use a material suitable for bonding. In the above example, the material of the insulating film 302 is silicon nitride (Si ３ N ４ ) is selected.

[0065] As with the substrate 20, an insulating film 302 is also formed on the bonding surface of the substrate 10.

[0066] 6B, the substrates 10 and 20 are bonded together with the insulating films 302, which are the bonding surfaces, facing each other. In this embodiment, any existing bonding method can be used.

[0067] 6C, the silicon substrate 300 of the substrate 20 is scraped, polished, and flattened to thin the silicon substrate 300. The film thickness of the silicon substrate 300 after thinning may be, for example, about 200 nm to 500 nm. Furthermore, if it is desired to fully deplete the silicon substrate 300 during operation, it is preferable to thin the silicon substrate 300.

[0068] Furthermore, an SOI transistor can be formed in the substrate 20 using an existing method, thereby obtaining a configuration as shown in FIG. 6D . Note that in FIGS. 6D to 6F , the left side of the figures shows a region where a through electrode (CS) 420 electrically connected to the conductor 401 is formed, and the right side of the figures shows a region where a through electrode 410 (415) electrically connected to the substrate 10 is formed. In the process shown in FIG. 6D , in the region (right side) where the through electrode (TSC) 410 electrically connected to the substrate 10 is formed, a trench 412 that penetrates from the transistor side of the substrate 20 to the insulating film 302 is formed by etching or the like, and this portion becomes the notch 403 in the conductor 401. In the process shown in FIG. 6D , in the region (left side) where the through electrode 420 electrically connected to the conductor 401 is formed, a trench 413 that penetrates from the transistor side of the substrate 20 to the upper surface of the conductor 401 is formed by etching or the like.

[0069] 6E , an interlayer insulating film 305 is formed on the transistor so as to fill the trenches 412 and 413. Furthermore, the upper surface of the interlayer insulating film 305 is planarized, and a hard mask 501 is formed on the interlayer insulating film 305. Next, a resist 502 is formed on the hard mask 501, and patterning is performed. According to the pattern, etching is performed to a depth halfway through the thickness of the interlayer insulating film 305, thereby forming trenches 512 and 513.

[0070] Since the resist 502 does not have resistance to dry etching, a hard mask 501 is used here. The hard mask 501 can be a single film such as a silicon oxide film, a silicon nitride film, or an amorphous carbon film, or a combination of these. Note that, since existing methods can be used to form the gate contact and the source / drain contact, a description thereof will be omitted here.

[0071] Next, as shown in Fig. 6F, the hard mask 501 and the like are removed, trenches 512 and 513 are formed deeper, electrodes and the like are embedded in the deeply formed trenches 512 and 513, and the upper surfaces are flattened, thereby obtaining the structure shown in Fig. 6F. In this embodiment, for example, titanium can be formed as an adhesion layer in the trenches 512 and 513, and tungsten can be formed as an electrode.

[0072] Here, the through electrode (TCS) 410 and the through electrode (CS) 420 are described simultaneously, but in this embodiment, the through electrode (CS) 420 may be formed first, and then the through electrode (TCS) 410 may be formed, or the through electrode (TCS) 410 may be formed first, and then the through electrode (CS) 420 may be formed.

[0073] Furthermore, by providing electrodes on the upper surface, etc., it is possible to obtain the imaging device 1 according to this embodiment as shown in FIGS. 5A to 5C.

[0074] <<4. Second Embodiment>> Next, the background that led the inventor to create the second embodiment of the present disclosure will be described with reference to Fig. 7 and Fig. 8. Fig. 7 is an explanatory diagram that explains the background of this embodiment, and Fig. 8 is a plan view of the imaging device 1 according to the first embodiment of the present disclosure.

[0075] In the imaging device 1 according to the first embodiment of the present disclosure, many electrodes are provided within the pixel area in order to transmit a selection signal for selecting a column of the photodiodes 101 to be read out via the substrate 20 (readout circuit 22). Therefore, in the region of the substrate 20 that overlaps the pixel area, there is a limit to the area in which pixel transistors can be provided, making it difficult to increase the area of ​​the pixel transistors.

[0076] Here, reading of the pixels 12 will be briefly described with reference to Fig. 7. In Fig. 7, the vertical direction is referred to as "rows" and the horizontal direction is referred to as "columns", and the row of the pixels 12 to be read out is selected by the SEL signal line, and the column of the pixels 12 to be read out is selected by the TRG signal line (note that the imaging device 1 according to the embodiment of the present disclosure is not limited to the vertical direction being referred to as "rows" and the horizontal direction being referred to as "columns", and may be rotated by 90 degrees).

[0077] The logic circuit 32 is provided with an AD (analog-to-digital) conversion circuit that converts analog voltage values ​​into digital values, and is capable of converting the pixel signals, which are analog values ​​of the selected pixels 12, into digital values. For example, if only one AD conversion circuit is provided, it will take a long time to read the pixel signals. Also, for example, if an AD conversion circuit is provided for each column, simply selecting a row will allow the pixel signals of the pixels 12 in the corresponding row to be instantly converted into digital values. Furthermore, for example, if multiple AD conversion circuits are provided so that multiple rows can be converted, the conversion to digital values ​​will be even faster.

[0078] Signals for selecting these rows and columns are transmitted to the substrate 20 (readout circuit 22) via wiring in the substrate 30 (logic circuit) through electrodes (indicated by circles in FIG. 7) located outside the pixel area of ​​the substrate 10. The SEL signal is then transmitted to the gate (second select gate) of the select transistor 203 in the readout circuit 22 via wiring in the substrate 20 (readout circuit 22), and the TRG signal is also transmitted to the gate (first select gate) of the transfer transistor 102 in the pixel region 13 of the substrate 10 via wiring in the substrate 20 (readout circuit 22) and the through electrode 410 ("TRG" in FIG. 4).

[0079] FIG. 8 is a diagram in which boundary lines of pixels 12 are added to FIG. 4 described above. The dashed lines in FIG. 8 indicate boundaries between four pixels 12. Below, an example will be described in which four pixels 12 share one readout circuit 22. Note that this embodiment is not limited to four pixels 12 sharing one readout circuit 22; for example, eight pixels 12 or sixteen pixels 12 may share one readout circuit 22.

[0080] The through electrode 410 ("TRG" in FIG. 8) electrically connected to the gate of the transfer transistor 102 is not used by the readout circuit 22, but is connected to the substrate 10 (pixel region 13) via wiring of the readout circuit 22. Therefore, the region where the through electrode 410 ("TRG" in FIG. 8) electrically connected to the gate of the transfer transistor 102 is provided is a region that cannot be effectively used as a device by the substrate 20 (readout circuit 22).

[0081] Furthermore, since the through electrodes 410 electrically connected to the gates of the transfer transistors 102 are provided, there is a limit to the area in which pixel transistors can be provided in the region of the substrate 20 that overlaps the pixel area. This makes it difficult to increase the area of ​​the pixel transistors. In light of this situation, the present inventors have conducted extensive research to reduce the number of through electrodes 410 provided in the region of the substrate 20 that overlaps the pixel area, thereby increasing the area of ​​the pixel transistors, i.e., to solve the second problem described above. As a result, the present inventors have come up with the second embodiment of the present disclosure.

[0082] In a second embodiment of the present disclosure created by the present inventor, a portion of the through electrode 410 (TCS), for example, a through electrode 410 (first electrode) electrically connected to the gate of the transfer transistor 102, is provided outside the pixel area (more specifically, in an area that does not overlap with the pixel area). Furthermore, in this embodiment, the wiring (first wiring) to be connected to the through electrode 410 (TCS) is arranged in a wiring layer provided in the substrate 10 (pixel area 13) rather than in a wiring layer of the substrate 20 (readout circuit 22). By doing so, in this embodiment, the number of through electrodes 410 provided in the area of ​​the substrate 20 that overlaps with the pixel area can be reduced, thereby making it possible to increase the area of ​​the pixel transistor. The details of this embodiment created by the present inventor are described below.

[0083] An example of a detailed configuration of an imaging device 1 according to a second embodiment of the present disclosure will be described with reference to Figs. 9 to 14. Fig. 9 is a plan view of a main part of a wiring layer 120 according to this embodiment. Figs. 10 and 11 are plan views of a main part of the imaging device 1 according to this embodiment, and Fig. 12 is a cross-sectional view of the imaging device 1 according to this embodiment. Figs. 13 and 14 are explanatory diagrams for explaining this embodiment. Note that in the following description, explanations of points common to the first embodiment described above will be omitted.

[0084] 9 shows a wiring pattern in a wiring layer 120 (see FIG. 12 ) provided on the substrate 10 (pixel region 13). The wiring layer 120 is formed to include an interlayer insulating film 105 provided on the silicon substrate 111 of the substrate 10. Note that even in conventional imaging devices 1 in which the pixel region 13, readout circuit 22, and logic circuit 32 are provided on the same plane of the same substrate, it is common for the wiring layer 120 to be provided on the substrate 10, and therefore there is no technical problem with such a configuration in this embodiment as well.

[0085] In this embodiment, wiring electrically connected to the through electrode 410 ("TRG" in FIG. 9) electrically connected to the gate of the transfer transistor 102 and wiring electrically connected to the through electrode 410 ("Well" in FIG. 9) electrically connected to the well of the silicon substrate 111 of the substrate 10 are provided in a wiring layer 120 provided in the substrate 10 (pixel region 13). On the other hand, wiring (not shown) electrically connected to the gate of the selection transistor 203 of the readout circuit 22 is provided in the substrate 20 (readout circuit 22) as before. That is, in this embodiment, wiring electrically connected to each element is provided in different substrates depending on the position of the element to which the wiring is connected.

[0086] FIG. 10 shows electrodes provided in a region of the substrate 20 (readout circuit 22) overlapping the pixel area in the imaging device 1 according to this embodiment. As can be seen from FIG. 10 , the substrate 20 (readout circuit 22) only includes through-electrodes 415 ("FD" in FIG. 10 ) electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10, in addition to the gates of the pixel transistors (reset transistor 201, amplification transistor 202, selection transistor 203, and conversion efficiency switching transistor 204). Therefore, according to this embodiment, it is possible to further increase the area that can be used as the pixel transistor region within the pixel area (region overlapping the pixel area) of the substrate 20 (readout circuit 22). As a result, according to this embodiment, it is possible to increase the area of ​​the pixel transistor (specifically, the gate), thereby reducing noise and variation.

[0087] In addition, according to this embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area can be reduced, which allows for a greater distance between the wires of the readout circuit 22 provided in this region. As a result, according to this embodiment, crosstalk that occurs between wires (signals being transferred from one wire to another due to electromagnetic induction) is reduced, and the imaging device 1 can be operated at higher speed and with higher performance.

[0088] Furthermore, in this embodiment, SOI transistors are used as pixel transistors in the readout circuit 22, and a conductor 401 is provided to apply a back bias and to suppress adverse effects between photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22. As shown in FIG. 11 , the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area can be reduced, and therefore the area of ​​the cutout 403 in the conductor 401 to avoid the electrodes is reduced. That is, in this embodiment, the area of ​​the conductor 401 can be made larger than in the first embodiment. As a result, according to this embodiment, the shielding effect of the conductor 401 can be further improved.

[0089] Next, a cross-sectional view of the imaging device 1 according to this embodiment is shown in Fig. 12. In Fig. 12, the pixel area is shown on the right side and the outside of the pixel area is shown on the left side, and the substrate 30 (logic circuit 32) provided on the substrate 20 (readout circuit 22) is not shown.

[0090] The TRG signal is transmitted from the logic circuit 32 to the gate of the transfer transistor 102 via a through electrode 410 provided outside the pixel area and wiring in the wiring layer 120 of the substrate 10 (pixel region 13). Meanwhile, a through electrode 415 ("FD" in FIG. 10 ) electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10 is provided in the pixel area and electrically connects the floating diffusion 103 to the pixel transistor of the substrate 20 (readout circuit 22). Note that while FIG. 12 illustrates a planar transistor with a sidewall on the gate as the transfer transistor 102, this embodiment is not limited to this type of transistor. For example, the transfer transistor 102 may be a fin-type transistor with a vertical gate.

[0091] 12 , a plurality of wirings are stacked in an interlayer insulating film 305 of the substrate 20 (readout circuit 22). That is, the interlayer insulating film 305 functions as a wiring layer of the substrate 20. For example, a wiring (second wiring) that transmits a SEL signal and is electrically connected to the gate of the select transistor 203 of the readout circuit 22 is provided in the interlayer insulating film 305.

[0092] In this embodiment, as shown in Fig. 13, the through electrode 410 electrically connecting the substrate 10 and the substrate 30 for transmitting the TRG signal is preferably provided outside the pixel area ("TRG" in Fig. 13). Also, in this embodiment, as shown in Fig. 13, the electrode (not shown) electrically connecting the substrate 20 and the substrate 30 for transmitting the SEL signal is preferably also provided outside the pixel area ("SEL" in Fig. 13). Furthermore, the extension direction of the wiring electrically connecting the through electrode 410 electrically connecting the substrate 10 and the substrate 30 for transmitting the TRG signal is approximately perpendicular to the extension direction of the wiring connected to the electrode (not shown) electrically connecting the substrate 20 and the substrate 30 for transmitting the SEL signal.

[0093] In this embodiment, the through electrodes 410 ("TRG" in FIG. 14) that electrically connect the substrates 10 and 30 and the electrodes (not shown) ("SEL" in FIG. 14) that electrically connect the substrates 20 and 30 for transmitting the SEL signal may be provided in pairs so as to face each other across the pixel area, as shown in FIG. 14. The facing direction is not particularly limited, as shown in FIG. 14.

[0094] As described above, according to this embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area can be reduced, thereby increasing the area that can be used as the pixel transistor region. As a result, according to this embodiment, the area of ​​the pixel transistor (more specifically, the gate) can be increased, thereby reducing noise and variation. In other words, this embodiment can solve the second problem described above.

[0095] In addition, according to this embodiment, it is possible to increase the distance between the wirings of the readout circuit 22 provided in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area, As a result, according to this embodiment, crosstalk occurring between the wirings is reduced, and it is possible to operate the imaging device 1 at higher speed and with higher performance.

[0096] In this embodiment, the imaging device 1 is not limited to the forms shown in FIGS. 9 to 14, but can be modified into various forms.

[0097] <<5. Third Embodiment>> <5.1 Detailed Configuration> In the embodiments of the present disclosure described so far, the through electrodes (TCS) 410, 415 are used as elements that electrically connect the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20. In the third embodiment of the present disclosure, instead of the through electrodes (TCS) 410, 415 of the first embodiment, a bonding electrode 600 (see FIG. 15 ) provided on the bonding surface between the substrates 10 and 20 is used to electrically connect the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20.

[0098] Specifically, a bonding electrode 600 made of copper (Cu) surrounded by an insulating film is formed on the bonding surfaces of the substrates 10 and 20 by applying, for example, buried wiring technology (so-called damascene processing). Next, the two substrates 10 and 20 are arranged with their bonding surfaces facing each other, and the bonding electrodes 600 on each bonding surface are aligned with each other, stacking the two substrates 10 and 20. In this state, a heat treatment or the like is performed. In this manner, the two bonding electrodes 600 are bonded to each other, and the two substrates 10 and 20 are bonded together. That is, the bonding electrode 600 not only bonds the two substrates 10 and 20 together but also electrically connects the two substrates 10 and 20 together.

[0099] An example of a detailed configuration of the imaging device 1 according to the third embodiment of the present disclosure will be described below with reference to Fig. 15. Fig. 15 is a cross-sectional view of the imaging device 1 according to this embodiment. Note that in the following description, explanations of points common to the first and second embodiments will be omitted.

[0100] 15, the imaging device 1 according to this embodiment has a substrate 10 (pixel region 13), a substrate 20 (readout circuit 22), and a substrate 30 (logic circuit 32), with the substrate 20 being stacked on the substrate 10, and the substrate 30 being stacked on the substrate 20. In FIG. 15, the pixel area is shown on the right side, and the outside of the pixel area is shown on the left side.

[0101] In this embodiment, the substrate 10 has a silicon substrate 111 on which a plurality of pixels 12 that perform photoelectric conversion are provided, and further has a wiring layer 120 on the silicon substrate 111. An insulating film 302 (not shown in FIG. 15 ) is provided on the bonding surface of the wiring layer 120 that bonds to the substrate 20, and a conductor 401 (see the first embodiment described above) that functions as a shield is provided on the insulating film 302. Furthermore, in this embodiment, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 may serve as the bonding electrode 600.

[0102] In this embodiment, the substrate 20 has a silicon substrate 311 on which pixel transistors of the readout circuit 22 are provided, an insulating film 301 (not shown in FIG. 15 ) provided below the silicon substrate 311, and a conductor 401 that functions as a shield and is provided below the insulating film 301. Furthermore, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 on the substrate 20 side may serve as the bonding electrode 600.

[0103] In this embodiment, the bonding electrode 600 of the substrate 10 and the bonding electrode 600 of the substrate 20 are placed opposite each other and bonded to each other, thereby bonding the substrates 10 and 20 and electrically connecting the pixel region 13 of the substrate 10 to the readout circuit 22 of the substrate 20. Furthermore, in this embodiment, when the conductor 401 provided between the substrates 10 and 20 is used as the bonding electrode 600, it is possible to manufacture the imaging device 1 having a shield and bonded by the bonding electrode 600 without significantly changing the manufacturing process.

[0104] Furthermore, in this embodiment, the substrate 20 further includes an interlayer insulating film 305 provided on the silicon substrate 311 so as to cover the pixel transistors, and a wiring layer 220 provided on the interlayer insulating film 305. An insulating film (not shown) is provided on the bonding surface of the wiring layer 220 that bonds to the substrate 30, and a conductor 401 (see the first embodiment described above) that functions as a shield is provided on the insulating film. Furthermore, in this embodiment, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 may serve as the bonding electrode 600.

[0105] In this embodiment, the substrate 30 has a silicon substrate (not shown) on which the transistors of the logic circuit 32 are provided, an insulating film (not shown in FIG. 15 ) provided below the silicon substrate, and a conductor 401 that functions as a shield and is provided below the insulating film. Furthermore, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 on the substrate 30 side may serve as the bonding electrode 600.

[0106] In this embodiment, the bonding electrode 600 of the substrate 20 and the bonding electrode 600 of the substrate 30 are placed opposite each other and bonded to each other, thereby bonding the substrates 20 and 30 and electrically connecting the readout circuit 22 of the substrate 20 to the logic circuit 32 of the substrate 30. Furthermore, in this embodiment, when the conductor 401 provided between the substrates 20 and 30 is used as the bonding electrode 600, it is possible to manufacture the imaging device 1 having a shield and bonded by the bonding electrode 600 without significantly changing the manufacturing process.

[0107] When bonding substrates using such bonding electrodes 600, misalignment during bonding of the substrates results in misalignment between the bonding electrodes 600 that electrically connect the substrates. Therefore, if the area of ​​the bonding electrodes 600 is small, misalignment during bonding of the substrates makes it impossible to ensure electrical connection, ultimately resulting in a decrease in the yield of the imaging device 1. Therefore, in this embodiment, by utilizing the configuration of the second embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area can be reduced, thereby increasing the area of ​​the bonding electrodes 600. Therefore, according to this embodiment, even if misalignment occurs during bonding of the substrates, electrical connection between the bonding electrodes 600 can be easily ensured, thereby suppressing a decrease in the yield of the imaging device 1.

[0108] Furthermore, in this embodiment, the gates of the transfer transistors 102 on the same column can be electrically connected to the same wiring, so the wiring connected to the gates of the transfer transistors 102 can be extended outside the pixel area by the number of columns. In this embodiment, by devising the wiring in this way, the number of electrodes and wiring can be reduced. Therefore, within the pixel area, there are mainly only electrodes connecting the readout circuit 22 on the substrate 20 and the floating diffusion 103. As a result, in this embodiment, it is possible to further increase the area of ​​the pixel transistors of the readout circuit 22.

[0109] In this embodiment, the imaging device 1 is not limited to the form shown in FIG. 15, but can be modified into various forms.

[0110] 16A to 16C are cross-sectional views illustrating steps in the manufacturing method of the imaging device 1 according to this embodiment, and correspond to the cross-sectional views of FIG.

[0111] First, as shown in FIG. 16A , a support substrate 530 is attached to the surface of the substrate 20 (readout circuit 22) on the wiring layer 220 side. In this embodiment, the support substrate 530 is not necessarily required; if the substrate 30 (logic circuit 32) is already bonded to the substrate 30, the substrate 30 can be used as the support substrate 530. In this embodiment, since the substrate 20 (readout circuit 22) is thin, it is necessary to use a substrate that functions as the support substrate 530. In this embodiment, after the support substrate 530 is attached to the substrate 20 (readout circuit 22), a hard mask (not shown) is formed, a resist (not shown) is formed, the resist is patterned, and etching or the like is performed to form the bonding electrode 600. Furthermore, vias connecting to the bonding electrode 600 and the like are also formed by resist patterning, etching, and the like. Furthermore, in this embodiment, the conductor 401 can be formed when the bonding electrode 600 and the like are formed.

[0112] In this embodiment, the conductor 401 is described as being provided, but if the conductor 401 is not required, it is only necessary to add a hard mask or the like used when forming the bonding electrode 600, and therefore there is no need to significantly change the manufacturing process of the conventional imaging device 1.

[0113] Furthermore, in order to further improve the bonding of the bonding electrode 600, a film of tantalum is formed by sputtering as a seed (seed crystal) on the electrode that will become the bonding electrode 600. Furthermore, copper plating is performed, and after drying, planarization is performed by CMP (Chemical Mechanical Polishing), thereby forming the bonding electrode 600.

[0114] Furthermore, the substrate 10 (pixel region 13) is also processed in the same manner as the substrate 20, and the conductor 401 and the bonding electrode 600 are formed, thereby obtaining the configuration shown in FIG. 16B.

[0115] Furthermore, as shown in FIG. 16C , the bonding electrode 600 of the substrate 10 and the bonding electrode 600 of the substrate 20 are placed opposite each other and bonded to each other, thereby bonding the substrates 10 and 20 and electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20.

[0116] <<6. Fourth Embodiment>> <6.1 Detailed Configuration> First, an overview of the fourth embodiment of the present disclosure will be described with reference to Fig. 17. Fig. 17 is an explanatory diagram for explaining this embodiment.

[0117] In the embodiment of the present disclosure, two conductors (first and second conductors) 401, 402 (see FIG. 18 ) are provided between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), and these two conductors 401, 402 function as capacitors to suppress the temporary voltage drop caused by noise from the power supply during circuit operation. That is, in this embodiment, the third problem described above can be solved.

[0118] Specifically, in the imaging device 1, as shown on the right side of FIG. 17 , noise (a phenomenon in which voltage changes in an extremely short time) may be introduced into the power supply line due to the influence of signal lines adjacent to the wiring layer. In such cases, the noise may cause degradation of image quality. Therefore, in this embodiment, as shown on the left side of FIG. 17 , two conductors 401 and 402, which also function as the shields of the first embodiment, are provided. These conductors 401 and 402 are fixed to different potentials, causing these two conductors 401 and 402 to function like capacitors. As shown on the right side of FIG. 17 , the capacitor does not pass direct current but can pass alternating current, so that noise whose voltage changes in an extremely short time can be dropped to ground via the capacitor. As a result, in this embodiment, the power supply voltage (Vdd) can be maintained constant. Details of this fourth embodiment of the present disclosure are described below.

[0119] An example of a detailed configuration of an imaging device 1 according to a fourth embodiment of the present disclosure will be described with reference to Fig. 18 and Fig. 19. Fig. 18 is a plan view of the imaging device 1 according to this embodiment, and Fig. 19 is a plan view of a main part of the imaging device 1 according to this embodiment. Note that in the following description, a description of points common to the first to third embodiments will be omitted.

[0120] FIG. 18 shows a plan view of the pixel area of ​​the substrate 20 (readout circuit 22). The conductors 401 and 402 are provided below the pixel transistors of the substrate 20, with an insulating film 301 made of a dielectric film interposed between them. Specifically, the conductor 402 is located below the conductor 401 in a cross-sectional view of the imaging device 1. In FIG. 18, the conductors 401 and 402 are indicated by dashed and dashed lines, but because they are provided so as to substantially overlap, it is difficult to distinguish the difference in their shapes from FIG. 18. The shape of the conductor 401 differs from that of the conductor 402 in that it has a notch (opening) 404 to prevent a short circuit with the through electrode (third through electrode) 422 that penetrates the substrate 20 and is electrically connected to the conductor 402. In other words, the conductor 402 has a larger area than the conductor 401. Therefore, FIG. 19 shows plan views of the conductors 401 and 402.

[0121] The left side of Fig. 19 shows the conductor 402, and the right side of Fig. 19 shows the conductor 401. In the circled region B on the right side of Fig. 19, a notch 403 is located. The notch 403 is provided to prevent the conductor 401 from shorting out with the through electrode 422 that is electrically connected to the conductor 402. The through electrode 422 is a through electrode that penetrates the silicon substrate of the substrate 20, and the potential of the conductor 402 can be fixed by applying a predetermined potential (second potential) to the conductor 402. That is, in this embodiment, the conductors 401 and 402 can be fixed to different predetermined potentials.

[0122] As described above, in this embodiment, by providing two conductors 401 and 402 between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), these two conductors 401 and 402 function like capacitors, suppressing a temporary voltage drop caused by noise from the power supply during circuit operation, etc. In other words, this embodiment can solve the third problem described above. Furthermore, in this embodiment, as in the first embodiment described above, the conductors 401 and 402 have a fixed potential, which suppresses the influence between photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22, allowing the imaging device 1 to operate at a higher speed and with higher performance. In other words, this embodiment can solve the first problem described above.

[0123] 18 and 19, the imaging device 1 can be modified into various forms. For example, in this embodiment, the through electrodes (TCS) 410 and 415 may be used as the element electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20, as in the first embodiment. Alternatively, in this embodiment, the bonding electrode 600 provided on the bonding surface between the substrates 10 and 20 may be used as the element electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20, as in the third embodiment.

[0124] 20A to 20J, an example of a method for manufacturing the image pickup device 1 according to this embodiment will be described. Figures 20A to 20J are cross-sectional views illustrating steps in the method for manufacturing the image pickup device 1 according to this embodiment.

[0125] First, as shown in the leftmost part of FIG. 20A , a silicon substrate 300 that will become the silicon substrate 311 of the substrate 20 is cleaned. Next, as shown in the second part from the left of FIG. 20A , an insulating film 301 made of a silicon oxide film is formed on the surface of the silicon substrate 300 using a general thermal oxidation furnace. The thickness of the insulating film 301 can be, for example, approximately 10 nm. In this embodiment, the thickness of the insulating film 301 is not particularly limited. However, to obtain a back bias effect, a thinner insulating film 301 is preferable. However, if the insulating film 301 is too thin, the withstand voltage may be reduced. Therefore, in this embodiment, the thickness of the insulating film 301 may be determined depending on the voltage used in the imaging device 1. In this embodiment, the material of the insulating film 301 is not particularly limited as long as it is an insulating film. However, if a parasitic capacitance with a large capacitance value is to be prevented from occurring between the transistor and the conductor 401, it is preferable to use a material with a low dielectric constant. Conversely, in this embodiment, if it is desired to generate a parasitic capacitance with a large capacitance value between the transistor and the conductor 401, it is preferable to use a material with a high dielectric constant as the material for the insulating film 301. In the above example, since it is desired to prevent a parasitic capacitance with a large capacitance value from being generated between the transistor and the conductor 401, a silicon oxide film with a low dielectric constant is selected as the material for the insulating film 301.

[0126] Next, as shown in the third figure from the left in FIG. 20A , a conductor 401 is formed on the insulating film 301. The conductor 401 can be made of, for example, a polysilicon film. In this embodiment, since the polysilicon film has high resistance, it may be doped (implanted) with ions such as phosphorus or boron. In the example described above, a polysilicon film implanted with phosphorus is used as the material for the conductor 401. In this embodiment, the material for the conductor 401 is not particularly limited as long as it is a conductive film. However, since the manufacturing process in this embodiment includes a high-temperature heat treatment, if a metal is used as the material for the conductor 401, it is preferable to use a high-melting-point metal. Furthermore, when a high-melting-point metal is used, it is preferable to select a material for the conductor 401 from among Group 4, Group 5, and Group 6 elements whose linear expansion coefficient is close to that of silicon. More specifically, the conductor 401 can be made of, for example, tantalum (Ta), titanium (Ti), tungsten (W), hafnium (Hf), etc. In addition, in this embodiment, the conductor 401 is used as a capacitor, and therefore, in order to improve its performance as a capacitor that drops noise to ground, it is better to reduce the resistance of the conductor 401. Therefore, it is preferable to use, for example, tantalum as the material for the conductor 401.

[0127] Next, as shown on the right side of FIG. 20A , an insulating film 303 is formed on the conductor 401. In this embodiment, the material of the insulating film 303 is not particularly limited as long as it is an insulating material. In the above example, a silicon nitride film is selected as the material of the insulating film 302. Because a silicon nitride film has a higher dielectric constant than a silicon oxide film, when the conductors 401 and 402 sandwiching the insulating film 303 are to function as a capacitor, it is preferable to select a material with such a high dielectric constant as the material of the insulating film 303. Furthermore, while reducing the thickness of the insulating film 303 can increase the capacitance value of the capacitor, depending on the applied voltage, the capacitor may not be able to withstand the required voltage, resulting in breakdown. Therefore, it is preferable to select the material and thickness of the insulating film 303 depending on the applied voltage. In the above example, the thickness of the insulating film 302 is 7 nm.

[0128] Next, as shown on the left side of FIG. 20B , a conductor 402 is formed on the insulating film 303, and an insulating film 302 is formed on the conductor 402. Like the conductor 401, the material of the conductor 402 is not particularly limited as long as it is a conductive film, and for example, a polysilicon film can be used. Furthermore, in order to reduce the resistance of the conductor 402, the polysilicon film may be doped (injected) with ions such as phosphorus or boron. Like the insulating film 303, the material of the insulating film 302 is not particularly limited as long as it is an insulator, and for example, a silicon nitride film can be used.

[0129] Next, as shown in the second from the left in Fig. 20B, the silicon substrate 300 that will become the substrate 20 is inverted and bonded to the substrate 10. Furthermore, as shown in the third from the left in Fig. 20B, the silicon substrate 300 is thinned. Then, as shown in the right side of Fig. 20B, an insulating film (not shown) and a hard mask 501 are formed on the silicon substrate 300.

[0130] Next, as shown on the left side of FIG. 20C , the insulating film (not shown) and silicon substrate 300 are etched according to the pattern of the hard mask 501. Furthermore, as shown in the second from the left of FIG. 20C , the hard mask 501 is removed. Then, as shown in the third from the left of FIG. 20C , a polysilicon film 330 is formed above the silicon substrate 300. Next, as shown on the right side of FIG. 20C , a resist 502 is formed on the polysilicon film 330, and the polysilicon film 330 is etched according to the resist pattern to form a transistor. In this way, the configuration shown in FIG. 20D can be obtained. After this, through electrodes 420 and 422 for connecting to the conductors 401 and 402 are formed.

[0131] Next, the next step will be described. Fig. 20E shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line B-B' in Fig. 18. As shown in Fig. 20E, etching is performed until the upper surface of the conductor 402 is exposed, thereby forming a trench 514. Fig. 20F shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line A-A' in Fig. 18. Unlike Fig. 20E, in Fig. 20F, etching is performed until the upper surface of the conductor 401 is exposed, thereby forming a trench 516.

[0132] The next step will now be described. Figure 20G shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' in Figure 18. As shown in Figure 20G, an insulating film 332 made of an oxide film or the like is buried in the trench 514. At this time, the oxide film is applied using spin-on glass, and a thermal process is performed to flatten it, thereby obtaining the configuration shown in Figure 20G.

[0133] Next, the next step will be described. Figure 20H shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' in Figure 18. As shown in Figure 20H, an insulating film 332 is also formed on the transistor, and planarization is performed.

[0134] The next step will now be described. Fig. 20I shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line B-B' shown in Fig. 18. As shown in Fig. 20I, a through electrode 422 is formed so as to penetrate the insulating film 332 in the trench 514. Fig. 20J shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line C-C' shown in Fig. 18, at the same stage of the process as Fig. 20I. As shown in Fig. 20J, the through electrodes 420, 422 are not provided in this cross section.

[0135] <<7. Summary>> As described above, in each embodiment of the present disclosure, the performance of the imaging device (photodetector) 1 having a layered structure can be further improved.

[0136] Furthermore, the embodiments of the present disclosure are not limited to application to an imaging device 1 that captures an image by detecting the distribution of incident light intensity of visible light. For example, the present embodiments can be applied to a photodetector that detects the distribution of incident radiant energy such as ultraviolet light, infrared light, or X-rays. Furthermore, the present embodiments are not limited to application to imaging devices that capture images, and may be applied to distance measuring devices that measure distances using reflected light. Furthermore, the embodiments of the present disclosure may be applied to various semiconductor devices used for other purposes.

[0137] Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0138] Examples of the above-mentioned method include a PVD (Physical Vapor Deposition) method, a CVD (Chemical Vapor Deposition) method, and an ALD (Atomic Layer Deposition) method. Examples of PVD methods include vacuum deposition, EB (electron beam) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-DC (direct current) combined bias sputtering, ECR (electron cyclotron resonance) sputtering, facing target sputtering, high frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Furthermore, patterning methods include chemical etching such as shadow mask, laser transfer, and photolithography, and physical etching using ultraviolet light or laser. Additionally, planarization techniques include CMP (Chemical Mechanical Polishing), laser planarization, and reflow.

[0139] <<8. Application Examples>> <8.1 Application Examples to Electronic Devices> Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be applied to various electronic devices 900, such as imaging systems such as digital still cameras and digital video cameras, mobile phones with imaging functions, or other devices with imaging functions.

[0140] FIG. 21 is a block diagram showing an example of the configuration of an electronic device 900 incorporating the imaging device 1. As shown in FIG.

[0141] 21 , the electronic device 900 has an optical system 912, an imaging device 1, and a DSP (Digital Signal Processor) 914. Furthermore, in the electronic device 900, the DSP 914, a display device 915, an operation system 916, a memory 918, a recording device 919, and a power supply system 920 are connected via a bus 917. The electronic device 900 is capable of capturing still images and moving images.

[0142] The optical system 912 is configured to have one or more lenses, and guides image light (incident light) from a subject to the imaging device 1 and forms an image on the light receiving surface (sensor section) of the imaging device 1 .

[0143] The imaging device 1 may be any of the above-described configuration examples. Electrons are accumulated in the imaging device 1 for a certain period of time in accordance with an image formed on the light receiving surface via the optical system 912. A signal corresponding to the electrons accumulated in the imaging device 1 is then supplied to the DSP 914.

[0144] The DSP 914 performs various signal processing on the signal from the imaging device 1 to acquire an image, and temporarily stores the image data in a memory 918. The image data stored in the memory 918 is recorded in a recording device 919 or supplied to a display device 915 to display the image. In addition, an operation system 916 accepts various operations by the user and supplies operation signals to each block of the electronic device 900, and a power supply system 920 supplies the power necessary to drive each block of the electronic device 900.

[0145] The above describes an example configuration of electronic device 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be modified as appropriate depending on the technical level at the time of implementation.

[0146] 8.2 Application Example to Endoscopic Surgery System The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0147] FIG. 22 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0148] 22 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0149] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0150] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0151] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The image sensor photoelectrically converts the observation light to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0152] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0153] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0154] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing the surgical site, etc.

[0155] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0156] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0157] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0158] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0159] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0160] FIG. 23 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0161] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0162] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0163] The imaging unit 11402 may include one imaging element (a so-called single-chip type) or multiple imaging elements (a so-called multi-chip type). When the imaging unit 11402 is configured as a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured as a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0164] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0165] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0166] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0167] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0168] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0169] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0170] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0171] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0172] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0173] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0174] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0175] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0176] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0177] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the endoscope 11100 and the imaging unit 1140 of the camera head 11102, among the above-described configurations.

[0178] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0179] 8.3 Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0180] FIG. 24 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0181] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 24, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0182] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0183] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0184] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0185] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0186] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0187] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0188] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0189] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0190] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 24, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0191] FIG. 25 is a diagram showing an example of the installation position of the imaging unit 12031.

[0192] In FIG. 25, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0193] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0194] 25 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0195] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0196] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0197] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0198] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0199] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 and the like among the above-described components.

[0200] <<9. Supplementary Information>> Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0201] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0202] The present technology may also be configured as follows: (1) A photodetector comprising: a first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out electric charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area. (2) The photodetector according to (1), wherein the first substrate further has a first selection gate that selects a column of the photoelectric conversion elements from which the electric charges are read out from the plurality of photoelectric conversion elements in the pixel area, and the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode. (3) The photodetector according to (2), wherein the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode and a first wiring provided on the first substrate. (4) The photodetector according to (3), wherein the second substrate further has a second selection gate that selects a row of the photoelectric conversion elements from which the charge is read out from the plurality of photoelectric conversion elements in the pixel area, and the control circuit of the third substrate and the second selection gate of the second substrate are electrically connected via a second wiring provided on the second substrate. (5) The photodetector according to (4), wherein, when the photodetector is viewed from above, the extending direction of the first wiring is approximately perpendicular to the extending direction of the second wiring. (6) The photodetector according to any one of (1) to (5), wherein the second substrate and the first substrate are electrically connected via a first through electrode that penetrates a silicon layer of the second substrate. (7) The photodetector according to (6), further comprising a first conductor sandwiched between the first substrate and the second substrate by an insulating film.(8) The photodetector according to (7) above, wherein the first conductor has an opening surrounding the first through-electrode. (9) The photodetector according to (7) or (8) above, wherein a first potential is applied to the first conductor via a second through-electrode that penetrates the silicon layer of the second substrate. (10) The photodetector according to any one of (7) to (9) above, wherein the first conductor is made of polysilicon or a high-melting-point metal. (11) The photodetector according to (6) above, further comprising first and second conductors sandwiching a dielectric between the first substrate and the second substrate. (12) The photodetector according to (11) above, wherein the second conductor is located below the first conductor and has a larger area than the first conductor. (13) The photodetector according to (12) above, wherein a second potential is applied to the second conductor via a third through-electrode that penetrates the silicon layer of the second substrate, and wherein the first conductor has an opening that surrounds the third through-electrode. (14) The photodetector according to any one of (1) to (5) above, wherein the second substrate and the first substrate are electrically connected by bonding a bonding electrode provided on the bonding surfaces of the two. (15) The photodetector according to (14) above, wherein the bonding electrode is made of copper. (16) The photodetector according to (14) or (15) above, further comprising a first conductor sandwiched between the first substrate and the second substrate by an insulating film. (17) The photodetector according to (16) above, wherein the first conductor is made of the bonding electrode. (18) The photodetector according to (14) or (15), further comprising first and second conductors sandwiching a dielectric between the first substrate and the second substrate. (19) A photodetector comprising: a first substrate having a pixel area composed of a plurality of photoelectric conversion elements, a second substrate provided on the first substrate and having a readout circuit that reads out charges generated by the photoelectric conversion elements, and first and second conductors sandwiching a dielectric between the first substrate and the second substrate.(20) An electronic device equipped with a photodetector, the photodetector comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out electric charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.

[0203] REFERENCE SIGNS LIST 1 Imaging device 10, 20, 30 Substrate 11, 21, 31 Semiconductor substrate 12 Pixel 13 Pixel region 22 Readout circuit 23 Pixel drive line 24 Vertical signal line 32 Logic circuit 33 Vertical drive circuit 34 Column signal processing circuit 35 Horizontal drive circuit 36 ​​System control circuit 40, 301, 302, 303, 332 Insulating film 42, 410, 415, 420, 422 Through electrode 101 Photodiode 102 Transfer transistor 103 Floating diffusion 105, 305 Interlayer insulating film 201 Reset transistor 202 Amplifying transistor 203 Select transistor 204 Conversion efficiency switching transistor 205 Additional capacitance 111, 300, 311 Silicon substrate 120, 220 Wiring layer 330 Polysilicon film 401, 402 Conductor 403, 404 Notch 412, 413, 512, 513, 514, 516 Trench 501 Hard mask 502 Resist 530 Support substrate 600 Bonding electrode

Claims

1. A photodetection device comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out electric charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode electrically connecting the third substrate and the first substrate is provided in an area of ​​the second substrate that does not overlap with the pixel area.

2. The photodetection device described in claim 1, wherein the first substrate further has a first selection gate that selects a column of the photoelectric conversion elements from which the charge is to be read out from the plurality of photoelectric conversion elements in the pixel area, and the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode.

3. The photodetector device described in claim 2, wherein the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode and a first wiring provided on the first substrate.

4. The photodetection device described in claim 3, wherein the second substrate further has a second selection gate that selects a row of the photoelectric conversion elements from which the charge is to be read out from the plurality of photoelectric conversion elements in the pixel area, and the control circuit of the third substrate and the second selection gate of the second substrate are electrically connected via a second wiring provided on the second substrate.

5. The photodetector according to claim 4, wherein, when the photodetector is viewed from above, the direction in which the first wiring extends is substantially perpendicular to the direction in which the second wiring extends.

6. The photodetector according to claim 1, wherein the second substrate and the first substrate are electrically connected via a first through electrode that penetrates a silicon layer of the second substrate.

7. The photodetector device according to claim 6, further comprising a first conductor sandwiched between the first substrate and the second substrate by an insulating film.

8. The photodetector according to claim 7, wherein the first conductor has an opening surrounding the first through electrode.

9. The photodetector according to claim 7, wherein a first potential is applied to the first conductor via a second through electrode that penetrates the silicon layer of the second substrate.

10. The photodetector according to claim 7, wherein the first conductor is made of polysilicon or a high melting point metal.

11. The photodetector device of claim 6, further comprising first and second conductors sandwiching a dielectric between said first substrate and said second substrate.

12. The photodetector according to claim 11, wherein the second conductor is located below the first conductor and has a larger area than the first conductor.

13. The photodetector device of claim 12, wherein a second potential is applied to the second conductor via a third through-electrode that penetrates the silicon layer of the second substrate, and the first conductor has an opening that surrounds the third through-electrode.

14. The photodetector according to claim 1, wherein the second substrate and the first substrate are electrically connected by bonding electrodes provided on the bonding surfaces of the two substrates.

15. The photodetector device according to claim 14, wherein said junction electrode is made of copper.

16. The photodetector device according to claim 14, further comprising a first conductor sandwiched between the first substrate and the second substrate by an insulating film.

17. The photodetector device of claim 16, wherein the first conductor comprises the junction electrode.

18. The photodetector device of claim 14, further comprising first and second conductors sandwiching a dielectric between the first and second substrates.

19. A photodetection device comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out electric charges generated by the photoelectric conversion elements; and first and second conductors sandwiching a dielectric between the first substrate and the second substrate.

20. An electronic device equipped with a photodetection device, comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out electric charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.

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