Wiring board and mounting structure using same
The wiring board design addresses signal reflection and transmittance issues by incorporating a through-hole conductor with specific portions and overlapping connection regions, enhancing high-frequency signal performance.
Patent Information
- Application Number
- PCT/JP2024/033721
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-28
- Filing Date
- 2024-09-20
- Publication Date
- 2025-04-03
AI Technical Summary
Existing wiring boards experience signal reflection and reduced transmittance due to the branching of current at lands surrounding through-hole conductors, particularly affecting high-frequency signals above 20 GHz.
The wiring board design includes a through-hole conductor with a first portion on the inner wall surface of the through hole, a second portion connecting the first portion to the first wiring conductor, and a third portion connecting the first portion to the second wiring conductor, with overlapping connection regions on both surfaces to reduce signal branching and turbulence.
This design effectively reduces signal reflection and improves signal transmittance by limiting the signal path and reducing disturbances within the through-hole conductor, particularly for high-frequency signals.
Smart Images

Figure JP2024033721_03042025_PF_FP_ABST
Abstract
Description
Wiring board and mounting structure using same
[0001] The present invention relates to a wiring board and a mounting structure using the same.
[0002] In order to electrically connect the upper and lower surfaces of the wiring board, at least one through-hole is formed in the core insulating layer of the wiring board, as described in Patent Document 1. A through-hole conductor is located inside the through-hole, and electrically connects the upper and lower surfaces of the wiring board via the through-hole conductor. As described in Patent Document 1, the through-hole conductor and a wiring conductor (e.g., a signal wiring conductor) are usually connected via a land on the surface of the core insulating layer.
[0003] Japanese Patent Application Laid-Open No. 2003-332754
[0004] The wiring board according to the present disclosure includes a first insulating layer having a first surface and a second surface located opposite the first surface, a through hole penetrating the first insulating layer from the first surface to the second surface, a through hole conductor located on at least a portion of the inner wall surface of the through hole, a first wiring conductor extending to the first surface, and a second wiring conductor extending to the second surface. The first wiring conductor has a first connection region that connects to the through hole conductor or a first land located on the first surface and connected to the through hole conductor. The second wiring conductor has a second connection region that connects to the through hole conductor or a second land located on the second surface and connected to the through hole conductor. In a planar perspective view, the first region and the second region at least partially overlap.
[0005] A mounting structure according to the present disclosure includes the above-described wiring board and an electronic component located in a mounting area of the wiring board.
[0006] 2A and 2B are explanatory diagrams illustrating a wiring board according to an embodiment of the present disclosure. FIG. 2A is an enlarged explanatory diagram illustrating region X shown in FIG. 1 . FIG. 2B is an enlarged explanatory diagram illustrating a cross section taken along line S-S shown in FIG. 2A . FIG. 2C is a plan view of FIG. 2A as viewed from the direction of arrow A (note that the insulating layer is omitted in FIGS. 2A to 2C ). FIG. 3A is an enlarged explanatory diagram illustrating region Y shown in FIG. 1 . FIGS. 3B and 3C are enlarged explanatory diagrams illustrating a modified example of the through-hole conductor shown in FIG. 3A . FIGS. 3D and 3E are enlarged explanatory diagrams illustrating a modified example of the second wiring conductor shown in FIG. 3A (note that the insulating layer is omitted in FIGS. 3A to 3E ). FIGS. 4A to 4H are explanatory diagrams illustrating an embodiment of a method for forming a through-hole conductor located in region X shown in FIG. 1 . FIGS. 5A to 5D are explanatory diagrams illustrating an embodiment of a method for forming a through-hole conductor located in region Y shown in FIG. 1 . 6A to 6D are explanatory diagrams for explaining another embodiment of the method for forming a through-hole conductor located in region Y shown in FIG.
[0007] As described in Patent Document 1, the land is positioned so as to surround the opening of the through-hole. Therefore, the current (signal) flowing through the wiring conductor located on the surface of the core insulating layer branches to the left and right at the land. As a result, the branched signals collide when they converge, disrupting the signal flow and causing the signal to accumulate at the land, resulting in a localized increase in potential. When a signal accumulates at the land and the localized increase in potential occurs, subsequent signals are reflected, reducing signal transmittance. Such signal reflection is particularly likely to occur with high-frequency signals of 20 GHz or higher. Therefore, there is a demand for a wiring board that can reduce signal reflection at the through-hole conductor and improve signal transmittance.
[0008] The wiring board according to the present disclosure has a configuration as described in the section on means for solving the above problems, thereby reducing signal reflection at the through-hole conductors and improving signal transmittance.
[0009] A wiring board according to an embodiment of the present disclosure will be described with reference to Fig. 1. Fig. 1 is an explanatory diagram for describing a wiring board 1 according to an embodiment of the present disclosure. As shown in Fig. 1, the wiring board 1 according to the embodiment includes an insulating layer 2, a conductor layer 3, and a solder resist 4.
[0010] In the wiring board 1, the insulating layer 2 includes a first insulating layer 21, a second insulating layer 22, and a third insulating layer 23. The first insulating layer 21 has a first surface 211 and a second surface 212 located on the opposite side of the first surface 211. The first insulating layer 21 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more.
[0011] In the wiring substrate 1, the first insulating layer 21 corresponds to a core insulating layer. There are no particular limitations on the thickness of the first insulating layer 21. When the first insulating layer 21 corresponds to a core insulating layer, the first insulating layer 21 may have a thickness of, for example, 10 μm or more and 1500 μm or less.
[0012] The first insulating layer 21 may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the first insulating layer 21 may have an inorganic insulating filler dispersed therein. Examples of inorganic insulating fillers include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.
[0013] Build-up layers, in which conductor layers 3 and insulating layers 2 are alternately stacked, are located on the first surface 211 and the second surface 212 of the first insulating layer 21. Each build-up layer has at least two conductor layers 3 and at least one insulating layer 2. Of the insulating layers 2 constituting the build-up layers, the insulating layer 2 in contact with the first surface 211 corresponds to the second insulating layer 22, and the insulating layer 2 in contact with the second surface 212 corresponds to the third insulating layer 23.
[0014] The insulating layer 2 constituting the build-up layer is not particularly limited as long as it is made of an insulating material. As with the first insulating layer 21, examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more.
[0015] The insulating layers 2 constituting the build-up layer may be made of the same resin or different resins. The insulating layers 2 constituting the build-up layer and the first insulating layer 21 may be made of the same resin or different resins.
[0016] The thickness of the insulating layer 2 constituting the build-up layer is not particularly limited. The insulating layer 2 constituting the build-up layer may have a thickness of, for example, 1 μm or more and 200 μm or less. The insulating layers 2 constituting the build-up layer may have the same thickness or different thicknesses.
[0017] The insulating layer 2 constituting the build-up layer may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the insulating layer 2 constituting the build-up layer may have an inorganic insulating filler dispersed therein. Examples of inorganic insulating fillers include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Two or more types of inorganic insulating fillers may be used in combination. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.
[0018] The conductor layer 3 is not limited to a specific material as long as it is a conductor such as a metal. The conductor layer 3 is formed of, for example, a metal such as copper. The thickness of the conductor layer 3 is not particularly limited and is, for example, 1 μm or more and 50 μm or less. The "first wiring conductor 31" included in the conductor layer 3 extends to the first surface 211 of the first insulating layer 21 and is electrically connected to the through-hole conductor 2a described later. The "second wiring conductor 32" included in the conductor layer 3 extends to the second surface 212 of the first insulating layer 21 and is electrically connected to the through-hole conductor 2a described later.
[0019] There are power supply, ground, and signal conductor layers 3. For example, the first wiring conductor 31 and the second wiring conductor 32 may be signal wiring conductors.
[0020] Via-hole conductors 3a are located in the insulating layer 2 constituting the build-up layer, for electrically connecting the upper and lower surfaces of the insulating layer 2. The via-hole conductors 3a are located in via holes formed to penetrate the insulating layer 2. The via-hole conductors 3a are part of the conductor layer 3, and are made of a metal such as copper.
[0021] As shown in Fig. 1, a solder resist 4 may be located on the surface of the build-up layer. The solder resist 4 is made of a resin, such as an acrylic-modified epoxy resin. The solder resist 4 has openings for electrically connecting the conductor layer 3 to the electrodes of the element via solder 5. Examples of the element include a semiconductor integrated circuit element and an optoelectronic element.
[0022] A through-hole conductor 2a is located in the first insulating layer 21 to electrically connect the upper and lower surfaces of the first insulating layer 21. The through-hole conductor 2a is located in a through-hole 20 that penetrates from the first surface 211 to the second surface 212 of the first insulating layer 21. The through-hole conductor 2a is formed, for example, by metal plating such as copper plating. As shown in FIG. 2A , the through-hole conductor 2a is electrically connected to a first wiring conductor 31 located on the first surface 211 of the first insulating layer 21 and a second wiring conductor 32 located on the second surface 212 of the first insulating layer 21. FIG. 2A is an enlarged explanatory view illustrating region X shown in FIG. 1. The through-hole conductor 2a is located on the inner wall surface of the through-hole 20.
[0023] In addition to the through-hole conductor 2a, resin 2b is located in the through-hole 20. Resin 2b is located so as to be surrounded by the through-hole conductor 2a. Resin 2b is a filling resin that fills the space surrounded by the through-hole conductor 2a. There are no limitations on the resin 2b, and examples include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. Resin 2b is an optional component and may be used as needed.
[0024] 2A , the through-hole conductor 2a is connected to a first land 331 located on the first surface 211 and a second land 332 located on the second surface 212. The first insulating layer 21 is omitted from Fig. 2A . The first wiring conductor 31 is connected to the first land 331 and has a first connection region 31a connected to the first land 331. The second wiring conductor 32 is connected to the second land 332 and has a second connection region 32a connected to the second land 332.
[0025] As shown in Figures 2B and 2C, the first connection region 31a and the second connection region 32a at least partially overlap in a planar perspective view. Figure 2B is an enlarged explanatory diagram showing a cross section taken along line A-A in Figure 2A. Figure 2C is a plan view of region A shown in Figure 2A as viewed from the direction of arrow A. The first insulating layer 21 is also omitted in Figures 2B and 2C. In an embodiment of the present disclosure, the first connection region 31a and the second connection region 32a can be defined as regions surrounded by arcs and straight lines as shown in Figure 2C, for example, when a circular ring shape and a rectangular shape overlap.
[0026] When the first connection region 31a and the second connection region 32a are at least partially overlapped in a planar perspective view, for example, it is possible to reduce branching of a signal transmitted through the first wiring conductor 31 at the first land 331. This reduces signal disturbance in the through-hole conductor 2a. As a result, signal reflection is reduced and signal transmittance is improved.
[0027] 2A to 2C , in a planar perspective, at least one of the first virtual line L1 and the second virtual line L2 does not have to intersect with the central axis C of the through-hole conductor 2a. The first virtual line L1 is a virtual line that extends in the direction in which the first wiring conductor 31 extends. The second virtual line L2 is a virtual line that extends in the direction in which the second wiring conductor 32 extends. When at least one of the first virtual line L1 and the second virtual line L2 does not intersect with the central axis C and the first connection region 31a and the second connection region 32a at least partially overlap in a planar perspective, signal disturbance in the through-hole conductor 2a can be further reduced.
[0028] 2A to 2C, the first virtual line L1 and the second virtual line L2 are shown as thin dashed lines for convenience, but in reality, they have the same width as the first wiring conductor 31 and the second wiring conductor 32. In other words, "at least one of the first virtual line L1 and the second virtual line L2 does not intersect with the central axis C" means that when the first wiring conductor 31 and the second wiring conductor 32 are extended, at least one of them does not intersect with the central axis C.
[0029] 2A to 2C, the through-hole conductor 2a is connected to a first land 331 and a second land 332. However, the first land 331 and the second land 332 are not essential components, but are optional components. For example, as shown in FIG. 3A, the through-hole conductor 2a may be directly connected to the first wiring conductor 31 and the second wiring conductor 32. FIG. 3A is an enlarged explanatory view for explaining region Y shown in FIG. 1.
[0030] 3A includes a first portion 2a1, a second portion 2a2, and a third portion 2a3. The first portion 2a1 is located on at least a portion of the inner wall surface of the through hole 20. The second portion 2a2 is located between the first portion 2a1 and the first wiring conductor 31 and connects the first portion 2a1 and the first wiring conductor 31. The third portion 2a3 is located between the first portion 2a1 and the second wiring conductor 32 and connects the first portion 2a1 and the second wiring conductor 32.
[0031] In the first portion 2a1, a first end portion located on the first surface 211 side and a second end portion located on the second surface 212 side are located within the first insulating layer 21. The second portion 2a2 is located from a part of the first end portion to the first surface 211. The length of the second portion 2a2, i.e., the length from the first end portion to the first surface 211, is not limited and may be, for example, 0.01% to 30% of the thickness of the first insulating layer 21. In the second portion 2a2, the end portion opposite the first end portion is connected to a first connection region 31a of the first wiring conductor 31. In other words, the region of the first wiring conductor 31 that contacts the second portion 2a2 is the first connection region 31a.
[0032] The third portion 2a3 is located from a part of the second end portion to the second surface 212. The length of the third portion 2a3, i.e., the length from the second end portion to the second surface 212, is not limited and may be, for example, 0.01% to 30% of the thickness of the first insulating layer 21. The end of the third portion 2a3 opposite to the second end portion is connected to the second connection region 32a of the second wiring conductor 32. In other words, the region of the second wiring conductor 32 that contacts the second portion 2a2 is the second connection region 32a.
[0033] In the through-hole conductor 2a shown in FIG. 3A , the first portion 2a1 is located around the entire periphery of the inner wall surface of the through hole 20. However, as shown in FIGS. 3B and 3C , the first portion 2a1 does not have to be located around the entire periphery of the inner wall surface of the through hole 20. FIGS. 3B and 3C are enlarged explanatory views for explaining a modified example of the through-hole conductor 2a shown in FIG. 3A . As shown in FIGS. 3B and 3C , the first portion 2a1 may be located on only a portion of the inner wall surface of the through hole 20. By having the first portion 2a1 located on only a portion of the inner wall surface of the through hole 20, the signal path is limited. As a result, signal disturbance is reduced, and signal reflection in the through hole 20 is further reduced.
[0034] Furthermore, with regard to the positional relationship between the first wiring conductor 31 and the second wiring conductor 32, in Figures 2A and 3A to 3C, the first wiring conductor 31 and the second wiring conductor 32 extend linearly in opposite directions in a plan view. On the other hand, in Figure 3D, the first wiring conductor 31 and the second wiring conductor 32 extend linearly in the same direction in a plan view. In Figure 3E, the first wiring conductor 31 and the second wiring conductor 32 extend so as to intersect in a plan view. Figures 3D and 3E are enlarged explanatory views for explaining a modified example of the second wiring conductor 32 shown in Figure 3A. Even in an embodiment having a first land 331 and a second land 332, the first wiring conductor 31 and the second wiring conductor 32 may have the positional relationship shown in Figures 3D and 3E.
[0035] 3A to 3E, through-hole conductor 2a includes first portion 2a1, second portion 2a2, and third portion 2a3. However, through-hole conductor 2a may include first portion 2a1 and at least one of second portion 2a2 and third portion 2a3. That is, through-hole conductor 2a may include first portion 2a1 and second portion 2a2, or may include first portion 2a1 and third portion 2a3.
[0036] When through-hole conductor 2a includes first portion 2a1 and second portion 2a2, the second end of first portion 2a1 is positioned so as to be flush with second surface 212. When through-hole conductor 2a includes first portion 2a1 and third portion 2a3, the first end of first portion 2a1 is positioned so as to be flush with first surface 211.
[0037] When through-hole conductor 2a includes first portion 2a1 and at least one of second portion 2a2 and third portion 2a3, the signal transmission area is limited to the limited area of first portion 2a1 and third portion 2a3, thereby reducing signal branching and further reducing signal disturbance due to reflection.
[0038] Next, one embodiment of a method for forming the through-hole conductor 2a will be described with reference to Figures 4A to 4H, which are explanatory diagrams for explaining one embodiment of a method for forming the through-hole conductor 2a located in region X shown in Figure 1.
[0039] First, as shown in Fig. 4A, through holes 20 are formed so as to penetrate the top and bottom surfaces of the first insulating layer 21. The size and number of the through holes 20 are set appropriately depending on the size of the wiring board 1 to be finally obtained, etc. The through holes 20 are formed using, for example, a drill, a laser, a blast, etc. In order to remove resin residue, etc., a desmear process or the like is performed as necessary.
[0040] 4B , conductors 30 are formed on the first surface 211 and the second surface 212 of the first insulating layer 21 and on the inner wall surfaces of the through holes 20. The conductors 30 are formed, for example, by depositing a metal such as copper by plating such as electrolytic plating.
[0041] When the conductor 30 is formed by electrolytic plating, a seed layer may be formed on the first surface 211 and the second surface 212 of the first insulating layer 21 and the inner wall surface of the through hole 20 before the electrolytic plating is performed. The formation of the seed layer allows the electrolytic plating to adhere strongly to the first insulating layer 21. The seed layer is formed of a metal such as copper by, for example, electroless plating.
[0042] 4C, the resin 2b is filled into the through holes 20. The resin 2b is as described above, and a detailed description thereof will be omitted.
[0043] Next, as shown in Figures 4D and 4E, a resist 6 is formed to remove unnecessary portions of the formed conductor 30. Figure 4E is a plan view of region B shown in Figure 4D as viewed from the direction of arrow B. The resist 6 may be, for example, a dry film resist. The conductor 30 covered with the resist 6 is protected. As shown in Figures 4D and 4E, the resist 6 is formed to cover from the resin 2b to the conductor 30 around the periphery of the through-hole 20.
[0044] 4F, the conductor 30 not covered with the resist 6 is removed by, for example, etching. Then, as shown in FIG. 4G, the resist 6 is removed, and the first wiring conductor 31 and the first land 331 are formed on the first surface 211 of the first insulating layer 21, and the second wiring conductor 32 and the second land 332 are formed on the second surface 212.
[0045] After the resist 6 is removed, as shown in Fig. 4H, the second insulating layer 22 is formed on the first surface 211 of the first insulating layer 21 so as to cover the first wiring conductor 31 and the first land 331. The third insulating layer 23 is formed on the second surface 212 of the first insulating layer 21 so as to cover the second wiring conductor 32 and the second land 332.
[0046] Next, another embodiment of a method for forming the through-hole conductors 2a will be described with reference to Figures 5A to 5D. Figures 5A to 5D are explanatory diagrams illustrating one embodiment of a method for forming the through-hole conductors 2a located in region Y shown in Figure 1. A first land 331 and a second land 332 are formed on the periphery of the through-hole conductors 2a located in region X shown in Figure 1. On the other hand, the first land 331 and the second land 332 are not formed on the periphery of the through-hole conductors 2a located in region Y. In other words, the through-hole conductors 2a located in region Y are directly connected to the first wiring conductors 31 and the second wiring conductors 32 without the first land 331 and the second land 332 intervening.
[0047] The through-hole conductor 2a located in region Y is also as shown in FIGS. 4A to 4C up to the step of filling the through-hole 20 with resin 2b, and detailed description thereof will be omitted. After the step shown in FIG. 4C, a resist 6 is formed to remove unnecessary portions of the formed conductor 30, as shown in FIG. 5A. Unlike FIG. 4D, in FIG. 5A, the resist 6 is formed to cover a portion of the conductor 30 located on the inner wall surface of the through-hole 20 to prevent first lands 331 and second lands 332 from being formed around the periphery of the through-hole conductor 2a. The drawings indicated by arrows in FIG. 5A show a plan view of the first surface 211 side of the first insulating layer 21 and a plan view of the second surface 212 side of the first insulating layer 21.
[0048] 5B , the conductor 30 that is not covered with the resist 6 is removed by etching. Not only the conductor 30 formed on the first surface 211 and the second surface 212, but also a portion of the conductor 30 formed on the inner wall surface of the through hole 20 is removed.
[0049] 5C, resist 6 is removed. First wiring conductor 31 is directly connected to second portion 2a2 of through-hole conductor 2a, and second wiring conductor 32 is directly connected to third portion 2a3 of through-hole conductor 2a. First portion 2a1 of through-hole conductor 2a is located on the inner wall surface of through-hole 20.
[0050] After the resist 6 is removed, as shown in Fig. 5D, a second insulating layer 22 is formed on the first surface 211 of the first insulating layer 21 so as to cover the first wiring conductor 31. A third insulating layer 23 is formed on the second surface 212 of the first insulating layer 21 so as to cover the second wiring conductor 32.
[0051] 5C and 5D , the first wiring conductor 31 is directly connected to the second portion 2a2, and the second wiring conductor 32 is directly connected to the third portion 2a3. However, the first wiring conductor 31 may be directly connected to the second portion 2a2, and the second wiring conductor 32 may be directly connected to the first portion 2a1. Alternatively, the first wiring conductor 31 may be directly connected to the first portion 2a1, and the second wiring conductor 32 may be directly connected to the third portion 2a3.
[0052] 6A to 6D, a method for forming a through-hole conductor 2a in which the second portion 2a2 is connected to the first wiring conductor 31 and the first portion 2a1 is connected to the second wiring conductor 32 will be described. Figures 6A to 6D are explanatory diagrams for explaining another embodiment of a method for forming a through-hole conductor 2a located in region Y shown in Figure 1.
[0053] The process up to filling the through-hole 20 with resin 2b as described above is as shown in FIGS. 4A to 4C , and detailed description thereof will be omitted. After the process shown in FIG. 4C , a resist 6 is formed to remove unnecessary portions of the formed conductor 30, as shown in FIG. 6A . Unlike FIG. 4D , in FIG. 6A , the first land 331 and the second land 332 are prevented from being formed around the periphery of the through-hole conductor 2a. Therefore, the resist 6 on the first surface 211 side of the first insulating layer 21 is formed to cover a portion of the conductor 30 located on the inner wall surface of the through-hole 20. On the other hand, the resist 6 on the second surface 212 side of the first insulating layer 21 is formed to cover the resin 2b and the conductor 30 located on the inner wall surface of the through-hole 20. The drawings indicated by arrows in FIG. 6A show a plan view of the first surface 211 side and a plan view of the second surface 212 side.
[0054] 6B , the conductor 30 that is not covered with the resist 6 is removed by etching. Not only the conductor 30 formed on the first surface 211 and the second surface 212, but also a portion of the conductor 30 formed on the inner wall surface of the through hole 20 on the first surface 211 side is removed.
[0055] 6C, resist 6 is removed. First wiring conductor 31 is directly connected to second portion 2a2 of through-hole conductor 2a, and second wiring conductor 32 is directly connected to first portion 2a1 of through-hole conductor 2a. First portion 2a1 of through-hole conductor 2a is located on the inner wall surface of through-hole 20.
[0056] After the resist 6 is removed, as shown in Fig. 6D, a second insulating layer 22 is formed on the first surface 211 of the first insulating layer 21 so as to cover the first wiring conductor 31. A third insulating layer 23 is formed on the second surface 212 of the first insulating layer 21 so as to cover the second wiring conductor 32.
[0057] In the above-described method for forming through-hole conductor 2a, first portion 2a1 is formed around the entire periphery of the inner wall surface of through hole 20. However, as shown in Figures 3B and 3C, first portion 2a1 may be located on only a portion of the inner wall surface of through hole 20. For example, first portion 2a1 is formed on only a portion of the circumferential direction of the inner wall surface of through hole 20 by the following procedure.
[0058] Conductors 30 are formed on the first surface 211 and second surface 212 of the first insulating layer 21 and on the inner wall surfaces of the through-holes 20. A photosensitive etching resist film is then electrodeposited onto the surfaces of the conductors 30 located within the through-holes 20 by an electrodeposition coating method based on the same principle as electroplating. Next, a photomask and a light diffusion sheet are placed on the first surface 211 (or second surface 212), and the photosensitive etching resist film is exposed to ultraviolet light. The use of the light diffusion sheet increases the exposure intensity within the through-holes 20, stabilizing the finished shape of the pattern.
[0059] Next, the exposed photosensitive etching resist film is developed, and a portion of the conductor 30 located inside the through hole 20 is removed by etching. Through this procedure, a first portion 2a1 is formed on a part of the inner wall surface of the through hole 20 in the circumferential direction, as shown in Figures 3B and 3C.
[0060] A mounting structure according to an embodiment of the present disclosure includes a wiring board 1 according to an embodiment and an electronic component located in a mounting area of the wiring board 1. A conductor layer 3 in an opening of a solder resist 4 located on the surface of a build-up layer is connected to an electrode of the electronic component via solder 5. As described above, examples of the electronic component include a semiconductor integrated circuit element and an optoelectronic element. In the mounting structure according to an embodiment, the electronic component may be located on both surfaces of the wiring board 1, or the electronic component may be located on one surface and, for example, a motherboard may be located on the other surface.
[0061] The embodiments of the present disclosure have been described above. However, the invention according to the present disclosure is not limited to the above-described embodiments, and various modifications and improvements are possible within the scope of the present disclosure as shown in (1) to (9) below.
[0062] (1) A wiring board according to the present disclosure includes a first insulating layer having a first surface and a second surface located opposite the first surface, a through hole penetrating the first insulating layer from the first surface to the second surface, a through hole conductor located on at least a portion of the inner wall surface of the through hole, a first wiring conductor extending to the first surface, and a second wiring conductor extending to the second surface. The first wiring conductor has a first connection region that connects to the through hole conductor or a first land located on the first surface and connected to the through hole conductor. The second wiring conductor has a second connection region that connects to the through hole conductor or a second land located on the second surface and connected to the through hole conductor. In a planar perspective view, the first region and the second region at least partially overlap. (2) In the wiring board described in (1) above, when a virtual line extending in a direction in which the first wiring conductor extends in a planar perspective is defined as a first virtual line and a virtual line extending in a direction in which the second wiring conductor extends is defined as a second virtual line, at least one of the first virtual line and the second virtual line does not intersect with the central axis of the through-hole conductor. (3) In the wiring board described in (1) or (2) above, the through-hole conductor includes a first portion located on at least a portion of the inner wall surface, a second portion connecting the first portion to the first wiring conductor, and at least one of a third portion connecting the first portion to the second wiring conductor. In the first portion, at least one of a first end portion located on the first surface side and a second end portion located on the second surface side is located within the first insulating layer. The second portion is located from a portion of the first end portion to the first surface and is connected to a first region of the first wiring conductor. The third portion is located from a portion of the second end portion to the second surface and is connected to a second region of the second wiring conductor. (4) In the wiring board described in (3) above, the through-hole conductor includes both the second portion and the third portion. (5) In the wiring board described in (3) above, the first portion is located on a part of the inner wall surface. (6) In the wiring board described in (5) above, the through-hole conductor includes both the second portion and the third portion. (7) In the wiring board described in any of (1) to (6) above, a resin is further located in the through-hole to fill the portion other than the through-hole conductor. (8) In the wiring board described in any of (1) to (7) above, a second insulating layer is further located on the first surface and a third insulating layer is further located on the second surface.(9) A mounting structure according to the present disclosure includes the wiring board according to any one of (1) to (8) above, and an electronic component located in a mounting area of the wiring board.
[0063] REFERENCE SIGNS LIST 1 wiring board 2 insulating layer 20 through hole 2a through hole conductor 21 first insulating layer 211 first surface 212 second surface 2a1 first portion 2a2 second portion 2a3 third portion 2b resin 22 second insulating layer 23 third insulating layer 3 conductor layer 30 conductor 3a via hole conductor 31 first wiring conductor 31a first connection region 32 second wiring conductor 32a second connection region 331 first land 332 second land 4 solder resist 5 solder 6 resist
Claims
1. A wiring board comprising: a first insulating layer having a first surface and a second surface located opposite the first surface; a through hole penetrating the first insulating layer from the first surface to the second surface; a through hole conductor located on at least a portion of an inner wall surface of the through hole; a first wiring conductor extending on the first surface; and a second wiring conductor extending on the second surface, wherein the first wiring conductor has a first connection region connected to the through hole conductor or a first land located on the first surface and connected to the through hole conductor, and the second wiring conductor has a second connection region connected to the through hole conductor or a second land located on the second surface and connected to the through hole conductor, and wherein the first connection region and the second connection region at least partially overlap in a planar perspective.
2. The wiring board of claim 1, wherein, when viewed from above, a virtual line extending in the direction in which the first wiring conductor extends is defined as a first virtual line, and a virtual line extending in the direction in which the second wiring conductor extends is defined as a second virtual line, at least one of the first virtual line and the second virtual line does not intersect with the central axis of the through-hole conductor.
3. The wiring board according to claim 1 or 2, wherein the through-hole conductor includes a first portion located on at least a portion of the inner wall surface, a second portion connecting the first portion to the first wiring conductor, and at least one of a third portion connecting the first portion to the second wiring conductor, wherein in the first portion, at least one of a first end portion located on the first surface side and a second end portion located on the second surface side is located within the first insulating layer, the second portion is located from a portion of the first end portion to the first surface and is connected to the first connection region of the first wiring conductor, and the third portion is located from a portion of the second end portion to the second surface and is connected to the second connection region of the second wiring conductor.
4. The wiring board according to claim 3, wherein the through-hole conductor includes both the second portion and the third portion.
5. The wiring board according to claim 3, wherein said first portion is located on a portion of said inner wall surface.
6. The wiring board according to claim 5, wherein the through-hole conductor includes both the second portion and the third portion.
7. The wiring board according to claim 1, further comprising a resin filling the through-hole except for the through-hole conductor.
8. The wiring board according to claim 1, further comprising a second insulating layer on the first surface and a third insulating layer on the second surface.
9. A mounting structure comprising the wiring board according to any one of claims 1 to 8 and an electronic component located in a mounting area of the wiring board.
Citation Information
Patent Citations
Multilayer wiring board and its manufacturing method
JP1997181453A
Wiring board and producing method therefor
JP2002353588A
Wiring substrate and mounting structure having the same
JP2010177544A
Conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, semiconductor device assemblies including such vias, and accompanying methods
US20070194431A1