Substrate circuit, ultrasonic fingerprint recognition module, and electronic device

Abstract

Embodiments of the present application provide a substrate circuit, an ultrasonic fingerprint recognition module, and an electronic device, which are applied to the technical field of display. The substrate circuit comprise a row shift register array, a pixel array, and a column shift register array. The row shift register array comprises N row shift registers used for outputting row selection signals. The row shift registers operate using at least two different clock cycles. The column shift register array comprises M column shift registers used for outputting column selection signals. The column shift registers operate using at least two different clock cycles. The pixel array comprises N rows and M columns of pixel circuits. The N rows of pixel circuits are coupled to output ends of the N row shift registers on a one-to-one basis for receiving the row selection signals. The M columns of pixel circuits are coupled to output ends of the M column shift registers on a one-to-one basis for receiving the column selection signals.

Description

Substrate circuit, ultrasonic fingerprint recognition module and electronic equipment Technical Field

[0001] The present application relates to the field of display technology, and in particular to a substrate circuit, an ultrasonic fingerprint recognition module and an electronic device. Background Art

[0002] As market demands continue to evolve and smart terminal products continue to upgrade, fingerprint recognition technology is also constantly being updated and iterated. To date, fingerprint recognition technology used in smart terminals is mainly divided into three generations: capacitive fingerprint recognition technology, optical fingerprint recognition technology, and ultrasonic fingerprint recognition technology.

[0003] Compared to capacitive and optical fingerprint recognition technologies, ultrasonic fingerprint sensors are thinner and can be used on foldable screens. Under-screen fingerprint recognition is faster and eliminates light leakage and glare. Ultrasonic fingerprint recognition also boasts strong penetration, independent of the screen's inherent light transmittance. This allows for liveness detection and low-cost, large-area fingerprint recognition. It's also unaffected by external environmental factors like water droplets and dust particles, resulting in greater stability. Therefore, ultrasonic fingerprint recognition offers numerous advantages, making it particularly suitable for large-area fingerprint recognition.

[0004] In large-scale fingerprint recognition applications, the user experience can be greatly improved, including: improving the efficiency of fingerprint entry, achieving blind fingerprint unlocking without the need for precise finger placement during the unlocking process, reducing the miss rate, and improving the fingerprint recognition rate.

[0005] However, in large-scale ultrasonic fingerprint recognition applications, the substrate circuit used to read ultrasonic fingerprint signals suffers from low fingerprint signal reading efficiency. How to improve this problem has become a hot topic in the industry.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a substrate circuit, an ultrasonic fingerprint recognition module, and an electronic device, which are mainly used to improve the reading efficiency of fingerprint signals in large-area ultrasonic fingerprint recognition applications.

[0008] To achieve the above objectives, this application adopts the following technical solutions:

[0009] In a first aspect, embodiments of the present application provide a substrate circuit comprising: a row shift register array, a pixel array, and a column shift register array. The row shift register array includes N row shift registers, each of which includes at least one output terminal for outputting a row position select signal. The row shift registers operate using at least two different clock cycles. N is a positive integer. The column shift register array includes M column shift registers, each of which includes at least one output terminal for outputting a column position select signal. The column shift registers operate using at least two different clock cycles. M is a positive integer. The pixel array includes a plurality of pixel circuits in N rows and M columns. The pixel circuits in each row are coupled to the output terminals of each row shift register in a one-to-one correspondence, and the pixel circuits in each row are configured to receive the row position select signal from the correspondingly coupled row shift register. The pixel circuits in each column are coupled to the output terminals of each column shift register in a one-to-one correspondence, and the pixel circuits in each column are configured to receive the column position select signal from the correspondingly coupled column shift register.

[0010] The row shift register controls the activation of the pixel circuits in each row, while the column shift register controls the activation of the pixel circuits in each column, thus enabling flexible configuration of the pixel circuits' on / off switching. Based on the touch range of the fingerprint, different pixel circuit areas are specifically identified, including rows that need to be read, rows that do not need to be read, columns that need to be read, and columns that do not need to be read. Furthermore, the row and column shift register arrays use different operating clock cycles for pixel circuit areas with different reading requirements. This saves a significant amount of timing resources and enables efficient reading of fingerprint information over a large area.

[0011] In one possible design, the substrate circuitry further includes a readout circuit array comprising N rows and M columns of readout circuits, each of which is coupled to a pixel circuit in a one-to-one correspondence. Controlled by row and column select signals, the readout circuits read electrical signals from the corresponding coupled pixel circuits.

[0012] In one possible design, for N rows of pixel circuits, the row shift register operates with a clock cycle of t0 for rows that the readout circuit does not need to read. For N rows of pixel circuits, the row shift register operates with a clock cycle of t1 for rows that the readout circuit does need to read. Clock cycle t0 is smaller than clock cycle t1. Within the pixel circuit region, the row shift register operates with a shorter clock cycle for rows that do not need to be read, and with a longer clock cycle for rows that do need to be read. This reduces unnecessary timing resource waste in the row shift register.

[0013] In one possible design, for M columns of pixel circuits, the column shift register operates with a clock cycle of t2 for columns that the readout circuit does not need to read. For M columns of pixel circuits that the readout circuit does need to read, the column shift register operates with a clock cycle of t3. Clock cycle t2 is less than clock cycle t3. Within the pixel circuit region, the column shift register operates with a shorter clock cycle for columns that do not need to be read, and with a longer clock cycle for columns that do need to be read. This reduces unnecessary timing resources in the column shift register.

[0014] In one possible implementation, the substrate circuit is a thin-film field-effect transistor (TFT) substrate circuit, and each of the switch tubes is a thin-film field-effect transistor (TFT); or, the circuit substrate is a metal oxide transistor (CMOS) substrate circuit, and each of the switch tubes is a metal oxide transistor (CMOS). In an embodiment of the present application, an effective substrate circuit and corresponding switch tube type are provided. The TFT substrate circuit corresponds to the TFT switch tube, and the CMOS substrate circuit is better suited to various application scenarios.

[0015] In one possible design, a pixel circuit includes a first electrode, a plurality of transistors, and a PVDF piezoelectric film.

[0016] In one possible design, the row shift register includes a flip-flop, a NAND gate, and an inverter.

[0017] In a possible design, the coupling mode of the circuit structure of the column shift register is consistent with the coupling mode of the circuit structure of the row shift register.

[0018] In a possible design, the working phases of the pixel circuit are divided into an ultrasonic wave transmitting phase, an ultrasonic wave receiving phase, and a signal reading phase.

[0019] In one possible design, during the pixel circuit signal reading phase, when the row select signal of the row shift register and the column select signal of the column shift register are both valid, the reading circuit reads the electrical signal of the corresponding coupled pixel circuit.

[0020] In a second aspect, an embodiment of the present application provides an ultrasonic fingerprint recognition module, comprising the substrate circuit according to the first aspect, and an adhesive layer coupled to the substrate circuit.

[0021] In a third aspect, an embodiment of the present application further provides an electronic device comprising the ultrasonic fingerprint recognition module of the second aspect and a display screen. When the electronic device recognizes a touch operation on the display screen, the ultrasonic fingerprint recognition module recognizes fingerprint information.

[0022] It should be understood that the beneficial effects of the ultrasonic fingerprint recognition module provided in the second aspect of this application and the electronic device provided in the third aspect can be referred to the substrate circuit provided in the above-mentioned first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG1 is a schematic structural diagram of an exemplary electronic device provided in an embodiment of the present application;

[0024] FIG2 is a schematic structural diagram of an exemplary ultrasonic fingerprint recognition module provided in an embodiment of the present application;

[0025] FIG3 is a schematic structural diagram of a substrate circuit of an exemplary ultrasonic fingerprint recognition module provided in an embodiment of the present application;

[0026] FIG4 a is a schematic diagram of timing signals of an exemplary column selection circuit provided in an embodiment of the present application;

[0027] FIG4 b is a schematic diagram of timing signals of an exemplary gate drive circuit GOA provided in an embodiment of the present application;

[0028] FIG5 is a schematic structural diagram of a substrate circuit of another exemplary ultrasonic fingerprint recognition module provided in an embodiment of the present application;

[0029] FIG6 is a schematic structural diagram of an exemplary pixel circuit provided in an embodiment of the present application;

[0030] FIG7 is a flowchart of an exemplary large-area fingerprint reading process provided by an embodiment of the present application;

[0031] FIG8 is a schematic diagram of timing resource allocation of an exemplary row shift register provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0033] The terms "exemplary" or "for example" in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0034] The terms "coupling" and "connection" involved in the embodiments of this application should be understood in a broad sense. For example, they may refer to a physical direct connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0035] First, some basic concepts involved in the embodiments of this application are explained:

[0036] PVDF piezoelectric film: A soft, lightweight, high-toughness plastic film that can be made into components of various shapes and thicknesses as needed. Combined with microelectronics technology, it can support multifunctional sensing elements. PVDF piezoelectric film exhibits unique dielectric, piezoelectric, and thermoelectric effects. Compared with traditional piezoelectric materials (such as ceramic piezoelectric sheets), it has the advantages of wide frequency response, large dynamic range, high force point conversion sensitivity, good mechanical properties, high mechanical strength, and easy acoustic impedance matching. It also has the advantages of being lightweight, soft and non-brittle, impact-resistant, not susceptible to water and chemical contamination, and easy to manufacture into sheets or tubes of arbitrary shapes and varying areas.

[0037] TFT concept: The Chinese meaning is thin film transistor, which is a bit-selective switching device based on thin film materials. It is commonly used in the semiconductor display industry and is similar to the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) used in integrated circuits. TFT is usually a three-terminal device, namely the gate, source, and drain. TFT is generally used as a "voltage-controlled current" device. One of its most significant features is that it can adjust the current (Ids) between the source and drain by regulating the potential difference (Vgs) between the gate and drain, thereby achieving conduction or disconnection between the S / D.

[0038] Classification of TFT devices: Currently, the most commonly used classification method is based on the type of material used in the TFT active layer, i.e., the semiconductor layer. They can be roughly divided into four categories: (1) hydrogenated amorphous silicon TFT (a-Si:H TFT); (2) metal oxide TFT (metal oxide TFT, also referred to as oxide TFT); (3) organic TFT (organic TFT, also referred to as OTFT); and (4) low-temperature polycrystalline silicon TFT (LTPS TFT).

[0039] TFT circuits: By connecting multiple TFTs and combining them with appropriate voltage drive timing, a variety of circuit functions can be realized. One of the most significant advantages of TFTs is that they can be fabricated on glass substrates or even flexible substrates, a common production method in the semiconductor display industry, enabling large-area, high-precision patterning. Compared to traditional silicon-based integrated circuit chips, which typically need to be manufactured on small, high-purity silicon wafers, glass-based TFTs are a relatively low-cost method for producing high-precision integrated electronic circuits.

[0040] Ultrasonic fingerprint recognition technology primarily utilizes the different interfaces formed by the fingerprint path on the sensor surface. When ultrasound waves reach these interfaces, the varying acoustic impedances of the interfacial media cause the echo energy at these interfaces to vary. The ultrasonic fingerprint recognition module then detects the electrical signals generated by these varying echo energies, identifying fingerprint ridges and valleys, enabling fingerprint detection.

[0041] An embodiment of the present application provides an electronic device. The electronic device is, for example, a consumer electronic product, a home electronic product, a vehicle-mounted electronic product, a financial terminal product, and a communication electronic product. Among them, consumer electronic products include mobile phones, tablet computers, laptop computers, e-readers, personal computers (PCs), personal digital assistants (PDAs), desktop displays, smart wearable products (for example, smart watches, smart bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, etc. Home electronic products include smart door locks, televisions, remote controls, refrigerators, rechargeable small household appliances (for example, soymilk machines, sweeping robots), etc. Vehicle-mounted electronic products include car navigation systems, car high-density digital video discs (DVDs), etc. Financial terminal products include automated teller machines (ATMs), self-service terminals, etc. Communication electronic products include communication equipment such as servers, storage devices, radars, and base stations.

[0042] FIG1 is a block diagram of an electronic device according to an embodiment of the present invention. The electronic device 1 may include one or more of the following components: a processor 11 , a memory 12 , a display screen 13 , and an ultrasonic fingerprint recognition module 14 .

[0043] The processor 11 may include one or more processing cores. The processor 11 utilizes various interfaces and circuits to connect various components within the electronic device 1. It executes instructions, programs, code sets, or instruction sets stored in the memory 12, and accesses data stored in the memory 12 to perform various functions and process data in the electronic device 1. For example, the processor 11 may be implemented using at least one hardware form selected from the group consisting of a digital signal processing (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 11 may integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), a neural-network processing unit (NPU), an application processor (AP), and a modem. The CPU primarily processes the operating system, user interface, and application programs. The GPU is responsible for rendering and drawing the content displayed on the display screen 13. The NPU is used to implement artificial intelligence (AI) functions. The modem is used to handle wireless communications. It is understandable that the above-mentioned modem may not be integrated into the processor 11, but may be implemented by a separate chip.

[0044] The memory 12 may include a random access memory (RAM) or a read-only memory (ROM). For example, the memory 12 includes a non-transitory computer-readable storage medium (non-transitory computer-readable storage medium), and the memory 12 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 12 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing various method embodiments of the present application, etc. The data storage area may store data (such as audio data, a phone book), etc. created according to the use of the electronic device 1.

[0045] The display screen 13 is used to display images and videos. The display screen can be designed as a full screen, a curved screen, a special-shaped screen, a double-sided screen or a folding screen. It can also be designed as a combination of a full screen and a curved screen, or a combination of a special-shaped screen and a curved screen. It should be noted that the embodiment of the present application does not impose any specific restrictions on the material of the display screen 13. For example, the display screen can be a quantum dot light emitting diode (QLED) display device, or an active-matrix organic light emitting diode (AMOLED) display device, etc.

[0046] The ultrasonic fingerprint recognition module 14 is used to identify fingerprint information to unlock the electronic device, or to operate the electronic device by sliding a finger across the display screen using various gestures and touch actions. The ultrasonic fingerprint recognition module 14 can be attached below the target area of ​​the display screen 13. The size of the ultrasonic fingerprint recognition module 14 can be slightly larger than or equal to the target area, and is used to transmit ultrasonic waves to identify the user's fingerprint information.

[0047] It should also be noted that the ultrasonic fingerprint recognition module 14 is coupled to the bottom of the display screen 13 via an adhesive layer. For example, it can also be coupled to the bottom of other cover layers such as a glass cover plate or a metal cover plate via an adhesive layer. The ultrasonic fingerprint recognition module 14 can also be set inside the cover plate. The embodiment of the present application does not impose any specific restrictions on the material of the cover plate.

[0048] It should also be noted that the ultrasonic fingerprint recognition module 14 in the embodiment of the present application can also perform fingerprint recognition directly without being encapsulated or covered. For example, when there is no display screen or cover to encapsulate or cover the ultrasonic fingerprint recognition module, that is, when the ultrasonic fingerprint recognition module is set on a substrate and is directly exposed to the user's finger, the ultrasonic fingerprint recognition module can perform fingerprint recognition.

[0049] In addition, the ultrasonic fingerprint recognition module 14 provided in the embodiment of the present application can also be applied to various scenarios where ultrasonic waves are used to perform palm prints or even foot prints, for example: using the ultrasonic fingerprint recognition module 14 under the screen in the time clock machine to perform palm print recognition to complete the time clock, etc. The embodiment of the present application does not specifically limit this.

[0050] In some embodiments, as shown in FIG2 , there is shown a schematic diagram of the structure of the ultrasonic fingerprint recognition module 14. The core modules of the ultrasonic fingerprint recognition module 14 include: pixel electrodes, piezoelectric layers, and substrate circuits.

[0051] The pixel electrodes are located between the piezoelectric layer and the substrate circuit (i.e., the pixel circuit). In existing technical solutions, the pixel electrodes can be tin-indium oxide (ITO) electrodes, with a spacing of about 75 μm within the pixel electrodes and a spacing of about 5 μm between two adjacent ITO electrodes.

[0052] The piezoelectric material of the piezoelectric layer can be a material with piezoelectric effect such as polyvinylidene fluoride (PVDF). When the piezoelectric material polyvinylidene fluoride (PVDF) is under the action of stress, the internal polar crystals are deformed, and the electric dipoles are arranged in a specific direction, causing the internal positive and negative charge centers to no longer coincide, thereby generating an induced charge effect. This is usually called the positive piezoelectric effect. In contrast, if a voltage is input to the functional layer of the piezoelectric material polyvinylidene fluoride (PVDF), tension and contraction forces are generated inside the piezoelectric material according to the direction of the electric field, thereby generating vibrations, which is called the inverse piezoelectric effect. Ultrasonic fingerprint recognition technology uses the positive and inverse piezoelectric effects of piezoelectric materials to achieve fingerprint recognition.

[0053] When a finger is placed on the OLED screen surface, the ultrasonic fingerprint recognition module 14 begins operating. A specific high-frequency voltage signal is input to the functional layer of the piezoelectric material (PVDF), causing the piezoelectric material (PVDF) to vibrate periodically up and down at high frequencies, emitting ultrasonic waves. These waves pass through the screen and reach the finger on the OLED screen surface.

[0054] Because the fingerprint of a finger has valleys and ridges, when it comes into contact with the OLED screen, the ridge area will be in close contact with the OLED screen, while there will be an air layer in the valley area. When the ultrasonic wave reaches the finger position, it will produce different reflection effects due to the different media of the object in contact (finger or air layer). Among them, the finger in the ridge area will absorb part of the ultrasonic wave and reflect part of the ultrasonic wave, while the air layer in the valley area reflects almost all of the ultrasonic wave. Therefore, the ultrasonic echo intensities reflected by the finger in the ridge area and the air layer in the valley area are different. The reflected ultrasonic echoes of different intensities pass through the OLED screen again, reach the piezoelectric layer, and stimulate the piezoelectric material of the piezoelectric layer, polyvinylidene fluoride (PVDF), to generate induced charges. At this time, since the ultrasonic echo energies reflected back from the ridge area and the valley area are different, the induced charges generated by the piezoelectric material of the piezoelectric layer, polyvinylidene fluoride (PVDF), are also different.

[0055] These differential induced charges are processed by the substrate circuit to generate a fingerprint grayscale image, which can be compared with existing fingerprint data to achieve effective fingerprint identification.

[0056] Based on this, the substrate circuit is the core module in the ultrasonic fingerprint recognition module 14, and its specific circuit structure design has always been a research hotspot in the industry.

[0057] Currently, in some embodiments, the structure of the substrate circuit of the ultrasonic fingerprint recognition module 14 is shown in FIG3 , including a pixel unit array, a gate driving circuit, and a column selection circuit.

[0058] The pixel array is located in the fingerprint sensing area. During the ultrasonic echo reception phase, the pixel array converts the received ultrasonic echo signal into an electrical signal. The gate drive circuit and column selection circuit sequentially control the pixel array's signal reading, ultimately achieving fingerprint information collection.

[0059] The pixel unit array includes multiple pixel circuits in several rows and columns, and each of the multiple pixel circuits includes a bit selection switch tube and a read switch tube. The pixel circuit is turned on if and only if the bit selection switch tube and the read switch tube in the pixel circuit are turned on at the same time. The control signal output by the gate drive circuit is used to control the bit selection switch tube of the pixel circuit in each row, that is, the bit selection switch tubes of the pixel circuits in the same row are controlled by the same control signal output by the gate drive circuit. The control signal output by the column selection circuit is used to control the read switch tube of the pixel circuit in each column, that is, the read switch tubes of the pixel circuits in the same column are controlled by the same control signal output by the column selection circuit.

[0060] Gate Driver On Array (GOA). In large-area fingerprint reading applications, the pixel array contains tens of thousands or even hundreds of thousands of pixel circuits. With so many pixel circuits, it is impossible to collect data from all rows of pixel circuits simultaneously. Therefore, it is necessary to partition the circuits according to a specific working sequence to achieve serial data collection.

[0061] The specific operating principle is as follows: Since each pixel circuit in the pixel unit array includes several bit-selective switching devices, the gate drive circuit GOA provides gate control signals to the bit-selective switching devices in the pixel circuit. Under the influence of the gate control signals output by the gate drive circuit GOA, the bit-selective switching devices switch between on and off states. The on and off states of the bit-selective switching devices affect the on and off states of the pixel circuits in that row. Another factor affecting the on and off state of the pixel circuits is the read switch. Specifically, the gate drive circuit GOA can scan and drive the pixel circuits in the pixel unit array row by row, and determine which row of pixel circuits in the pixel unit array is on and which row of pixel circuits is off.

[0062] The gate drive circuit GOA includes multiple triggers and several logic gate circuits. First, under the combined action of the initial signal, clock signal, and other external circuit control signals, a pulse control signal that shifts row by row is generated. This pulse control signal is sent to the gate drive circuit GOA. Under the action of this pulse control signal, the gate drive circuit GOA begins to scan and drive the pixel circuits in the pixel unit array row by row, starting from the first row of pixel circuits and scanning all the way to the last row of pixel circuits. The trigger to which the pulse control signal shifts row by row indicates which row of pixel circuits the gate drive circuit GOA scans. When the gate drive circuit GOA scans a certain row of pixel circuits, the gate control signal it outputs is sent to the bit-selective switch tube device of the pixel circuit in that row, and the bit-selective switch tube device is turned on. In this way, the gate drive circuit GOA can realize the row-by-row acquisition function of the ultrasonic echo signal.

[0063] The column selection area (CSA) is used to collect electrical signals from pixel circuits in different columns. The column selection area provides gate control signals to the readout switches in the pixel circuits. Under the influence of the gate control signals output by the column selection area, the readout switches switch between on and off states. The on and off states of the readout switches affect the on and off states of the pixel circuits in that column. The pixel circuit is only turned on when both the bit selection switch and the readout switch in the pixel circuit are turned on simultaneously.

[0064] All pixel circuits in the Pixel unit array are divided into 8 equal parts according to columns, and the number of pixel circuits contained in each part is equal. If the number of columns NUM of pixel circuits in the Pixel unit array is not a multiple of 8, then the number of pixel circuits contained in each of the first 7 parts is NUM / 8, and the number of pixel circuits included in the eighth part is NUM%8+NUM / 8.

[0065] Among them, the column selection circuit mainly includes 38 decoder (Decoder 3 Translate 8, DEC 3T8) and multiplexer (Multiplexer, Mux).

[0066] The internal circuit structure of the 38 decoder includes a NAND gate, a NOR gate, and two NOT gates. The three input signals of the 38 decoder are the first input signal terminal INB0, the second input signal terminal INB1, and the third input signal terminal INB2. The input level values ​​of the first input signal terminal INB0, the second input signal terminal INB1, and the third input signal terminal INB2 include eight selection options: 000, 001, 010, 011, ..., 110, and 111, corresponding to the division of the M columns of pixel circuits into eight equal columns in the pixel unit array. The output signals of the 38 decoder's eight output terminals (Vo1, Vo2, Vo3, ..., Vo8) are used to control the on / off of the pixel circuits in the corresponding columns.

[0067] The multiplexer is used to select the pixel circuit in the column portion to be read from the eight column portions, and output the electrical signal of the pixel circuit in the column portion as the output signal of the multiplexer to the subsequent imaging chip CMOS for signal reading.

[0068] As shown in Figure 4a, the eight output terminals of the 38-bit decoder are each coupled to the readout switches of all pixel circuits in the same column, controlling the on / off switching of the readout switches and, in turn, affecting the switching of the pixel circuits. For example, the first output terminal Vo1 of the 38-bit decoder is coupled to the readout switches of all pixel circuits in the first column. When the input levels of the first input signal terminal INB0, the second input signal terminal INB1, and the third input signal terminal INB2 are 000, the first output terminal Vo1 of the 38-bit decoder is active. Simultaneously, the readout switches of all pixel circuits in the first column coupled to the first output terminal Vo1 are turned on. At this point, if the bit select switches of some pixel circuits in the first column are also turned on by the gate control signal provided by the gate drive circuit GOA, the pixel circuits are fully activated and their current signals are transmitted to the subsequent imaging chip CMOS for reading, ultimately forming a grayscale image of the fingerprint. This image is then compared with existing fingerprint data to achieve effective fingerprint recognition.

[0069] In summary, for a pixel unit array comprising N rows and M columns of pixel circuits, the gate drive circuit GOA first selects the pixel circuits in the i-th row to be read (0≤i≤N, sequentially selected from the first row to the Nth row for reading). The bit select switches in the pixel circuits in that row provide gate control signals, turning on all the bit select switches in the pixel circuits in that row. Furthermore, the 38 decoder selects the column portions to be read (sequentially selected from the first column portion to the eighth column portion for reading). Specifically, the 38 decoder provides gate control signals for the read switches in the pixel circuits in the selected column portions, turning on all the read switches in the pixel circuits in that column portion. The pixel circuit is turned on only when both the bit select switches and read switches in the pixel circuit are turned on. The electrical signal from the pixel circuit is then transmitted to the imaging chip CMOS for reading.

[0070] The following is an introduction to the circuit timing of the substrate circuit design.

[0071] In the pixel array, only one row of pixel circuits is selected during each selection cycle and read sequentially from row 1 to row N. After a row of pixel circuits is selected, pixel circuits in each column are selected sequentially from column 1 to column 8 and read sequentially.

[0072] As shown in Figure 4b, a silicon-based CMOS IC first inputs a start signal STV and a clock signal CLK to the gate driver circuit GOA. Upon receiving valid start signal STV and clock signal CLK, the first trigger D1 begins outputting a valid control signal to the pixel circuits in the first row. The gates of the bit select switches in the pixel circuits in the first row receive the valid control signal, turning them on.

[0073] After selecting the pixel circuits in the first row, the silicon-based CMOS IC inputs a start signal STV and a clock signal CLK to the column selection circuit, which sequentially reads the electrical signals from columns 1 to M in the pixel circuits in the first row. After all the electrical signals from the pixel circuits in the first row are read, the valid control signal output by the first flip-flop D1 in the gate drive circuit GOA is transmitted to the input of the second flip-flop D2. The second flip-flop D2 then outputs a valid control signal to the pixel circuits in the second row. Simultaneously, the output of the first flip-flop D1 outputs an inactive level. This means that the pixel circuits in the first row and the first flip-flop D1 are turned off, while the pixel circuits in the second row and the second flip-flop D2 are turned on.

[0074] Similarly, after selecting the pixel circuits in the second row, the silicon-based CMOS IC inputs the start signal STV and the clock signal CLK to the column selection circuit, which then sequentially reads the electrical signals from columns 1 to M in the pixel circuits in the second row, ultimately completing the reading of all electrical signals from the pixel circuits in the second row. This process continues in this manner, ultimately completing the reading of signals from all pixel circuits in the entire pixel unit array.

[0075] FIG4b shows a schematic diagram of the timing signal of the gate drive circuit GOA in the technical solution. In the technical solution, the clock signals of all triggers in the gate drive circuit GOA adopt a fixed period. Moreover, in each selection and reading of the column-divided pixel circuit, the clock signal of the column selection circuit also adopts a fixed period. For example, the clock period of all triggers in the gate drive circuit GOA is t0, and the clock period of the column selection circuit is n0. Taking the number of pixel circuits in the Pixel pixel unit array as 100*100 as an example, assuming that all columns are divided into 10 column portions, then in each group of column portions, it is necessary to complete the signal reading of 10 columns of pixel circuits, then t0≥10*n0, and the total time to complete the entire fingerprint signal reading is 100*t0.

[0076] However, in current solutions, the clock cycles of the gate driver circuit (GOA) and column select circuits are fixed, and the imaging chip CMOS must ensure that it can successfully read pixel circuit signals within a specific clock cycle. Therefore, both the gate driver circuit (GOA) and column select circuits typically have long operating clock cycles. This results in a significant consumption of timing resources, especially for inactive areas where fingerprints are not present.

[0077] According to the above design, it is necessary to perform a full range of electrical signal reading for the pixel circuits from row 1 to row N and column 1 to column M. If the application scenario is to read fingerprint information of a small area, for example, in the pixel unit array, the number of pixel circuits is 100 rows and 100 columns. The 100 columns of pixel circuits are divided into 10 columns, and each column has 10 columns of pixel circuits that need to be read. Assuming that it takes 5μs to complete the reading of the pixel circuits of each column, then the reading time of the pixel circuits of each row is 50μs, and the reading time of the pixel circuits of 100 rows is 5ms.

[0078] However, for large-area fingerprint information reading, since the area that needs to be read is large, a large amount of timing resources are consumed. For example, in large-area fingerprint information reading applications, the Pixel pixel unit array usually includes 300*200 pixel circuits, and the pixel circuits of 10 columns are still selected as one column equal part, with a total of 20 column equal parts. Assuming that it still takes 5μs to complete the reading of the pixel circuits of each column equal part, it takes 100μs to complete the reading of the pixel circuits of all columns in the same row, that is, it takes 100μs to complete the reading of the pixel circuits of a row. There are a total of 300 rows of pixel circuits, so it takes a total of 30ms to complete the reading of the entire Pixel pixel unit array.

[0079] As can be seen, the time required is much longer than that of small-area fingerprint recognition. In addition to the large number of pixel circuits that need to be read, large-area fingerprint information reading applications also require algorithmic operations such as multi-frame fusion. This will result in a longer and more time-consuming fingerprint reading of large areas, which in turn reduces the efficiency of large-area fingerprint recognition.

[0080] In fact, in actual unlocking, there is no need to read the signals of all pixel circuits in the entire large area.

[0081] Based on this, the embodiment of the present application proposes a new structural design scheme for the substrate circuit, as shown in Figure 5. It includes: a pixel array, a row shift register array, and a column shift register array. Using the substrate circuit provided by the embodiment of the present application, the pixel circuit areas that need to be read and the pixel circuit areas that do not need to be read are specifically distinguished according to the touch range of the finger fingerprint. In addition, for different pixel circuit areas, the row shift register array and the column shift register array use different working clock cycles, thereby saving a large amount of timing resources and realizing high-efficiency reading of large-area fingerprint information.

[0082] The row shift register array includes N row shift registers, each of the N row shift registers includes at least one output terminal for outputting a row position selection signal; the row shift registers operate using at least two different clock cycles; N is a positive integer.

[0083] The column shift register array includes M column shift registers, each of the M column shift registers includes at least one output terminal for outputting a column bit selection signal; the column shift registers operate using at least two different clock cycles; M is a positive integer.

[0084] The pixel array may include a plurality of pixel circuits in N rows and M columns. As shown in FIG5 , the pixel circuits in each row are coupled to the output terminals of each row shift register in a one-to-one correspondence, and the pixel circuits in each row are configured to receive a row bit select signal from the corresponding coupled row shift register. The electrical signals of the pixel circuits in the row are sequentially read by the readout circuit only when the row bit select signal of the row shift register to which the pixel circuits in the row are coupled is valid.

[0085] The pixel circuits in each column are coupled to the output terminals of each column shift register in a one-to-one correspondence. The pixel circuits in each column are used to receive a column bit selection signal from the correspondingly coupled column shift register.

[0086] The substrate circuit also includes a read circuit array, which includes multiple read circuits in N rows and M columns, each of which is coupled one-to-one with each pixel circuit; the read circuit reads the electrical signal of the corresponding coupled pixel circuit under the control of the row select signal and the column select signal.

[0087] First, the row select signal of the row shift register selects the row of pixel circuits to be read. After the pixel circuits in row K are selected (K is any positive integer between 1 and N, 1≤K≤N), the column select signal of the column shift register sequentially selects the pixel circuits in each column within row K for reading. Assuming that the column select signal of the column shift register coupled to the pixel circuit in column L is valid, the read circuit will read the electrical signal of the pixel circuit in column N of row K.

[0088] The following is an analysis and illustration based on a specific pixel circuit structure.

[0089] As shown in FIG6 , an exemplary pixel circuit structure provided in an embodiment of the present application is shown. The pixel circuit includes an ultrasonic transceiver module, a reading module, and a setting module.

[0090] The ultrasonic transceiver module includes a fifth transistor M5, a diode M6, and a PVDF piezoelectric film. The two electrodes of the PVDF piezoelectric film are an ITO electrode and an Ag electrode. The ITO electrode is coupled to the cathode of the diode M6 and the second electrode of the fifth transistor M5.

[0091] The reading module includes a first transistor M1, a second transistor M2 and a fourth transistor M4. The gate PE of the first transistor M1 is coupled to the ITO electrode, and the first electrode of the second transistor M2, the first electrode of the fourth transistor M4 and the second electrode of the third transistor M3 are all coupled.

[0092] The setting module includes a third transistor M3 , wherein a second electrode of the third transistor M3 is coupled to a first electrode of the fourth transistor M4 and a first electrode of the second transistor M2 .

[0093] It is worth noting that the exemplary pixel circuit structure provided in the embodiments of the present application is only for the purpose of explanation, and the purpose, technical solution and beneficial effects of the present invention are further described in detail. It should be understood that the structure of the pixel circuit described above is only a specific implementation method of the present invention and is not used to limit the scope of protection of the present invention. Any modification, equivalent replacement, improvement, etc. of the pixel circuit made on the basis of the technical solution of the present invention should be included in the scope of protection of the present invention.

[0094] The working sequence of the above pixel circuit can be divided into three stages: ultrasonic emission stage, ultrasonic reception stage and signal reading stage. In these three stages, the specific working process of the pixel circuit is as follows:

[0095] S1, ultrasonic emission stage:

[0096] When the reset signal RST_SEL is active, the fifth transistor M5 turns on, and the bias voltage Dbias is fixed at 3V (for example, this voltage value can be adjusted accordingly based on subsequent circuit requirements). The fixed level of the bias voltage Dbias is transmitted to the ITO electrode via the fifth transistor M5, and thus the ITO electrode also has a fixed level. At this time, a fixed-frequency, variable-amplitude AC voltage signal Tx is applied to the Ag electrode of the PVDF piezoelectric film. Therefore, a fixed-frequency, variable-amplitude AC voltage signal exists between the Ag electrode and the ITO electrode. Under the action of the variable-amplitude AC voltage signal, a varying electric field is formed between the Ag electrode and the ITO electrode. The frequency of the electric field varies at the same frequency as the frequency of the AC voltage signal Tx.

[0097] PVDF piezoelectric film exhibits both piezoelectric and inverse piezoelectric effects. Under the influence of a varying electric field, the film vibrates periodically, with the frequency of the vibration matching that of the field. When the vibration frequency of the PVDF film exceeds 20kHz, this periodic mechanical vibration generates ultrasonic waves that propagate around the film. These waves can undergo transmission, reflection, and absorption.

[0098] S2, ultrasonic receiving stage:

[0099] When an ultrasonic wave is emitted and contacts a medium, it reflects, creating an ultrasonic echo. Detecting this echo is the ultrasonic reception phase. During this phase, the fifth transistor M5 is turned off, and the Ag electrode is grounded. The transmitted ultrasonic signal is reflected off the finger surface, forming an ultrasonic echo signal Rx. This ultrasonic echo signal Rx has the same frequency as the AC voltage signal Tx during the ultrasonic transmission phase, but its signal strength is much lower, primarily because the ultrasonic wave is severely attenuated after reflection from the medium.

[0100] When the ultrasonic echo signal Rx reflected by the finger reaches the surface of the PVDF piezoelectric film, its acoustic intensity generates a periodic mechanical force on the surface. Due to the piezoelectric effect, this periodic mechanical force generates a periodic induced electrical signal on the ITO electrode of the PVDF piezoelectric film. At the moment when the bias voltage Dbias increases from its initial value of 3V to 5V, diode M6 turns on. At this moment, bias voltage Dbias detects the periodic induced electrical signal generated on the ITO electrode through diode M6, subsequently generating a stable DC voltage signal at the gate PE of the first transistor M1. This DC voltage signal represents the information of the periodic induced electrical signal on the ITO electrode and the ultrasonic echo signal. This completes the ultrasonic wave reception process. The next step is the electrical signal reading phase.

[0101] S3, signal reading stage:

[0102] The electrical signal reading stage is divided into three stages: reset before reading (Read out RST), signal reading (Read out) and read out end (Read out End).

[0103] S3.1, Read out RST stage:

[0104] This stage is an auxiliary stage before the Read out stage. Due to the large area of ​​the ultrasonic sensing area, the electrical signal in the sensing area can only be led out in four directions: up, down, left, and right. This will cause the electrically connected wiring to be relatively long, so that the parasitic capacitance of the wiring will be very large. The parasitic capacitance directly affects the transmission and transfer of charge on the Readline wiring, and thus affects the transmission delay of the electrical signal. Therefore, before Read out, it is necessary to turn on the third transistor M3 on the Readline wiring and adjust the voltage on the Readline wiring to the reset voltage VREF. At this time, the Read out RST stage is completed and the third transistor M3 is turned off.

[0105] It is worth noting that the Read out RST phase should be time-controlled as much as possible, and the next phase, Read out, should be entered as quickly as possible. This is mainly because the gate PE terminal of the first transistor M1 is coupled to the cathode of the diode M6, and the diode M6 has a reverse leakage current of less than 1pA. If the Read out phase is not entered quickly, the DC voltage signal at the gate PE terminal of the first transistor M1 will gradually decrease over time. Ultimately, during the Read out phase, the electrical signal collected by the read circuit will be distorted.

[0106] S3.2, Read out stage:

[0107] The pixel array may include N rows of pixel circuits. Each row of pixel circuits is coupled to the output of each row shift register in a one-to-one correspondence. Specifically, the gate ROW_SEL terminals of the second transistors M2 in the pixel circuits are coupled to the output of the row shift registers in a one-to-one correspondence. The row shift registers output row select signals. Under the control of the row select signals, the second transistors M2 of the pixel circuits correspondingly coupled to the row shift registers are either turned on or off.

[0108] When the row select signal output by the K-th row shift register is valid (K is any positive integer between 1 and N, 1≤K≤N), the second transistors M2 of all pixel circuits in the K-th row coupled thereto are turned on.

[0109] The pixel array may include M columns of pixel circuits. Each column of pixel circuits is coupled to the output terminal of each column shift register in a one-to-one correspondence. Specifically, the gate READ terminal of the fourth transistor M4 in the pixel circuit is coupled to the output terminal of the column shift register in a one-to-one correspondence. The column shift register outputs a column position select signal. Under the control of the column position select signal, the fourth transistor M4 of the pixel circuit corresponding to the column shift register is either turned on or off.

[0110] When the row select signal output by the Lth row shift register is valid (L is any positive integer between 1 and M, 1≤L≤M), the fourth transistors M4 of all pixel circuits in the Lth column coupled thereto are turned on.

[0111] The entire branch of the reading module (including the first transistor M1, the second transistor M2, and the fourth transistor M4) is turned on only when both the second transistor M2 and the fourth transistor M4 of the pixel circuit are turned on (for example, the pixel circuit of the Kth row and the Lth column). At this time, the voltage signal at the gate PE terminal of the first transistor M1 generates a transfer current Ids through the first transistor M1. The transfer current Ids is then output to the reading circuit and the silicon-based processing chip through the second transistor M2 and the fourth transistor M4. After being collected by the analog-to-digital converter (ADC) circuit in the silicon-based processing chip, the specific value of the voltage signal at the gate PE terminal of the first transistor M1 is obtained. By further comparing it with the voltage values ​​of the voltage signals collected by other pixel circuits, it is determined whether the fingerprint corresponding to the pixel circuit signal at that point is a ridge line or a valley line. The voltage signal at the gate PE terminal of the first transistor M1 collected by the pixel circuit represents information of the ultrasonic echo signal. The ultrasonic echo signal reflected in the valley area has a greater intensity, and the ultrasonic echo signal reflected in the ridge area has a smaller intensity. Ultrasonic echo signals of different intensities act on the ITO electrode to generate different intensities of induced electrical signals. Correspondingly, the voltage signal intensities at the gate PE terminal of the first transistor M1 collected by different pixel circuits are also different.

[0112] Different from the prior art solutions, in the process of reading the electrical signal of the pixel circuit, both the row shift register and the column shift register operate in at least two different clock cycles.

[0113] Typically, during large-area fingerprint reading, a finger's fingerprint cannot cover the entire sensing area. Therefore, during the pixel circuit reading process, it is not necessary to read the pixel circuits in all rows and columns. The reading circuit needs to read the pixel circuits in the valid sensing area that are touched by the finger; the reading circuit does not need to perform any processing on the pixel circuits in the invalid sensing area that are not touched by the finger. This reduces the time consumed during large-area fingerprint reading.

[0114] Therefore, for the valid sensing area that needs to be read and is touched by a finger, the row shift register and column shift register operate with a longer clock cycle, outputting row and column select signals to the corresponding pixel circuits, respectively. The read circuit reads the pixel circuit electrical signals based on the row and column select signals. For the invalid sensing area that does not need to be read and is not touched by a finger, the row shift register and column shift register operate with a shorter clock cycle, iterating quickly, and the read circuit does not need to perform any operation or processing.

[0115] For example, the pixel array includes N rows and M columns of pixel circuits. Figure 7 shows a workflow diagram for the large-area fingerprint reading process provided by an embodiment of the present application. When a finger touches the screen, the touch chip first determines whether the touched area belongs to a specific fingerprint sensing area. If the touch chip determines that the touch location belongs to a specific fingerprint sensing area, it activates the ultrasonic fingerprint recognition module 14. The touch chip identifies the specific location touched by the finger and sends the location and coordinate information to the fingerprint CMOS IC. Based on the location and coordinate information, the fingerprint CMOS IC identifies which rows and columns of pixel circuits need to be read and which rows and columns do not. Different target signals are generated for pixel circuits with different reading requirements and sent to the row and column shift registers of the substrate circuit. These different target signals represent different operating clock cycle information. The row and column shift registers in the substrate circuit receive the target signals from the fingerprint CMOS IC, thereby completing the efficient reading of fingerprint information.

[0116] Assume that the effective fingerprint sensing area only covers the pixel circuits from rows a to b and columns c to d. As shown in Figure 8, the row shift register operates using two different clock cycles: the first clock cycle t1 and the second clock cycle t2. The first clock cycle t1 is much shorter than the second clock cycle t2.

[0117] The sensing area where the pixel circuits in rows 1 to a are located does not contain any fingerprint information. Therefore, the row shift registers coupled to the pixel circuits in rows 1 to a operate at the first clock cycle t1. During this period, the reading circuit does not need to read the electrical signals of the pixel circuits. Therefore, the row shift registers iteratively shift quickly under the action of a high-frequency, short-cycle clock.

[0118] The sensing area where the pixel circuits in rows a through b are located contains fingerprint information. Therefore, the row shift registers coupled to the pixel circuits in rows a through b operate using the second clock cycle t2. During this period, the readout circuit combines the row select signal from the row shift register with the column select signal from the column shift register to sequentially read the electrical signals from the pixel circuits in the columns and rows covered by the fingerprint information. Therefore, the row shift register requires a longer clock cycle to operate, ensuring that the readout circuit reads all the electrical signals from the pixel circuits to be read within a single clock cycle.

[0119] The sensing area where the pixel circuits in rows b to N are located does not contain any fingerprint information. Therefore, the row shift registers coupled to the pixel circuits in rows b to N operate using the first clock cycle t1. During this period, the reading circuit does not need to read the electrical signals of the pixel circuits. Therefore, the row shift registers iteratively shift quickly under the action of a high-frequency, short-cycle clock.

[0120] Similarly, as shown in Figure 8, the effective sensing area covered by the fingerprint is the pixel circuits from rows a to b and from columns c to d. The column shift register also operates using two different clock cycles: the third clock cycle t3 and the fourth clock cycle t4. The third clock cycle t3 is much shorter than the fourth clock cycle t4.

[0121] The sensing area where the pixel circuits in columns 1 to c are located does not contain any fingerprint information. Therefore, the column shift registers coupled to the pixel circuits in columns 1 to c operate using the third clock cycle t3. During this period, the reading circuit does not need to read the electrical signals from the pixel circuits. Therefore, the column shift registers iteratively shift rapidly under the action of a high-frequency, short-cycle clock.

[0122] The sensing area where the pixel circuits in columns c through d are located contains fingerprint information. Therefore, the column shift registers coupled to the pixel circuits in columns c through d operate using the fourth clock cycle t4. During this period, the readout circuit combines the row select signal from the row shift register with the column select signal from the column shift register to sequentially read the electrical signals from the pixel circuits in the columns and rows covered by the fingerprint information. Therefore, the column shift register requires a longer clock cycle to operate, ensuring that the readout circuit reads the electrical signals from all the pixel circuits to be read within a single clock cycle.

[0123] The sensing area where the pixel circuits in columns c to M are located does not contain any fingerprint information. Therefore, the column shift registers coupled to the pixel circuits in columns c to M operate using the third clock cycle t3. During this period, the reading circuit does not need to read the electrical signals from the pixel circuits. Therefore, the column shift registers iteratively shift rapidly under the action of a high-frequency, short-cycle clock.

[0124] By adopting the solution provided by the embodiments of this application, the time required to identify large-area fingerprint information can be greatly reduced. This is because large-area fingerprints typically have tens of thousands or even hundreds of thousands of pixels. If a traditional solution is used, the row and column shift registers must scan from beginning to end to complete the reading of a single fingerprint image frame. However, the coverage area of ​​a finger fingerprint is limited and typically cannot fully cover the entire sensing area. Therefore, when the shift register scans into an inactive sensing area not touched by the finger, a significant amount of timing resources is consumed.

[0125] If the solution provided by the embodiments of the present application is adopted, the readout circuit only needs to read the electrical signals of the pixel circuits in the area touched by the finger. For the pixel circuits in the area not touched by the finger, the row shift register and column shift register coupled thereto both use a shorter clock cycle. However, for the pixel circuits in the area touched by the finger, the row shift register and column shift register coupled thereto both use a longer clock cycle, making it easier for the readout circuit to sequentially read the electrical signals of the pixel circuits in this area.

[0126] S3.3, Read out End stage:

[0127] After the current pixel circuit's electrical signal is collected, the second transistor M2 and the fourth transistor M4 are turned off, entering the Read out End phase, and preparing to enter the next pixel circuit collection cycle. After the above five phases, the signals of all pixel circuits are gradually collected.

[0128] The present invention provides an ultrasonic fingerprint recognition module, comprising a substrate circuit as described in the above-mentioned related embodiments shown in Figures 5 to 8, and an adhesive layer coupled to the substrate circuit.

[0129] The present application also provides an electronic device comprising a display screen and the ultrasonic fingerprint recognition module described in the embodiment shown in FIG2 . Upon detecting a touch operation on the display screen, the electronic device identifies fingerprint information based on the ultrasonic fingerprint recognition module. The ultrasonic fingerprint recognition module may be located within or beneath the display screen, which is not specifically limited in this application.

[0130] It should be understood that the beneficial effects of the ultrasonic fingerprint recognition module or electronic device provided in the embodiments of the present application can be referred to the substrate circuit involved in the relevant embodiments shown in Figures 2 to 8 above, and will not be repeated here.

[0131] The present application also provides an apparatus comprising one or more processors and one or more memories. The one or more memories are coupled to the one or more processors and are configured to store computer program code, the computer program code comprising computer instructions. When the one or more processors execute the computer instructions, the electronic device executes the above-mentioned related method steps to implement the image sensor operating method of the above-mentioned embodiment.

[0132] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0133] Through the description of the above implementation methods, technical personnel in the relevant field can understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0134] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0135] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0136] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0137] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0138] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0139] The above content is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A substrate circuit, characterized in that: include: a row shift register array, a pixel array, and a column shift register array; The row shift register array includes N row shift registers, each of the N row shift registers includes at least one output terminal for outputting a row position selection signal; the row shift register operates using at least two different clock cycles; N is a positive integer; The column shift register array includes M column shift registers, each of the M column shift registers includes at least one output terminal for outputting a column position selection signal; the column shift register operates using at least two different clock cycles; M is a positive integer; The pixel array includes a plurality of pixel circuits in N rows and M columns; The pixel circuit of each row is coupled to the output end of each row shift register in a one-to-one correspondence, and the pixel circuit of each row is used to receive the row position selection signal of the corresponding coupled row shift register; the pixel circuit of each column is coupled to the output end of each column shift register in a one-to-one correspondence, and the pixel circuit of each column is used to receive the column position selection signal of the corresponding coupled column shift register.

2. The substrate circuit according to claim 1, characterized in that: The substrate circuit also includes a reading circuit array, which includes a plurality of reading circuits in N rows and M columns, each of which is coupled one-to-one with each of the pixel circuits; the reading circuit reads the electrical signal of the correspondingly coupled pixel circuit under the control of the row position selection signal and the column position selection signal.

3. The substrate circuit according to claim 1 or 2, characterized in that: In the N rows of pixel circuits, for rows that the reading circuit does not need to read, the clock cycle of the row shift register is t0; in the N rows of pixel circuits, for rows that the reading circuit needs to read, the clock cycle of the row shift register is t1; wherein the value of the clock cycle t0 is less than the clock cycle t1.

4. The substrate circuit according to any one of claims 1 to 3, characterized in that: In the pixel circuit of the M columns, for the columns that the reading circuit does not need to read, the clock cycle of the column shift register is t2; in the pixel circuit of the M columns, for the columns that the reading circuit needs to read, the clock cycle of the column shift register is t3; wherein the value of the clock cycle t2 is less than the clock cycle t3.

5. The substrate circuit according to any one of claims 1 to 4, characterized in that: The substrate circuit is a thin film field effect transistor (TFT) substrate circuit, and each of the switch tubes is a thin film field effect transistor (TFT); or, The substrate circuit is a metal oxide transistor (CMOS) substrate circuit, and each of the switch tubes is a metal oxide transistor (CMOS).

6. The substrate circuit according to any one of claims 1 to 5, characterized in that: The pixel circuit includes a first electrode and a plurality of transistors.

7. The substrate circuit according to any one of claims 1 to 6, characterized in that: The row shift register includes a trigger, a NAND gate and an inverter.

8. The substrate circuit according to any one of claims 1 to 7, characterized in that: The coupling mode of the circuit structure of the column shift register is consistent with the coupling mode of the circuit structure of the row shift register.

9. The substrate circuit according to any one of claims 1 to 8, characterized in that: The working phases of the pixel circuit are divided into an ultrasonic wave transmitting phase, an ultrasonic wave receiving phase and a signal reading phase.

10. The substrate circuit according to any one of claims 1 to 9, characterized in that: In the signal reading stage of the pixel circuit, when the row bit selection signal of the row shift register and the column bit selection signal of the column shift register are both valid, the reading circuit reads the electrical signal of the corresponding coupled pixel circuit.

11. An ultrasonic fingerprint recognition module, characterized in that: It comprises a substrate circuit as described in any one of claims 1 to 10, and an adhesive layer; the adhesive layer is coupled to the substrate circuit.

12. An electronic device, characterized in that: It comprises the ultrasonic fingerprint recognition module as claimed in claim 11, and a display screen; when the electronic device recognizes a touch operation acting on the display screen, the fingerprint information is recognized based on the ultrasonic fingerprint recognition module.

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