Method for generating occupancy map and computing device for performing method

By employing a hybrid CPU-GPU approach with a shared ray space and BVH for efficient light tracking, the method addresses the inefficiencies of CPU-based PVM in 3D mapping, resulting in faster and more accurate occupancy map generation for robot applications.

WO2025095256A1PCT designated stage expired Publication Date: 2025-05-08EWHA UNIV IND COLLABORATION FOUND
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Patent Information

Application Number
PCT/KR2024/007060
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-30
Filing Date
2024-05-24
Publication Date
2025-05-08

AI Technical Summary

Technical Problem

CPU-based probabilistic volumetric mapping (PVM) for 3D mapping in robot applications is inefficient when dealing with wide sensor ranges or large input point cloud data, leading to slow voxel occupancy identification.

Method used

A hybrid approach combining CPU and GPU processing to improve PVM performance, utilizing a three-dimensional shared ray space with a uniform grid for ray-tracing, and a bounding volume hierarchy (BVH) for efficient light tracking and voxel classification.

Benefits of technology

This approach significantly accelerates the generation of accurate occupancy maps by optimizing CPU-GPU collaboration, reducing processing time, and enhancing the reliability of 3D mapping in robot applications.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed is a method for generating an occupancy map. The method for generating an occupancy map may include the steps of: setting, through a first processor of a serial processing method, a three-dimensional shared ray space having a grid shape of a uniform interval for ray-tracing on the basis of a position of a robot; constructing, through a second processor of a parallel processing method, a bounding volume hierarchy (BVH) for the set shared ray space; classifying, through the second processor by using the ray-tracing, an occupancy state of a voxel, intersecting with a ray, among voxels included in the shared ray space on the basis of the constructed BVH; and updating, through the first processor, an occupancy map in the form of an octree by performing probabilistic volumetric mapping (PVM) on the basis of the occupancy state of the classified voxel.
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Description

Method for generating an occupancy map and a computing device for performing the method

[0001] The present invention relates to a method for generating an occupancy map using ray tracing and a computing device for performing the method for generating the occupancy map.

[0002] 3D mapping reconstructs spatial data collected by sensors into a virtual space resembling the real world, and can have a critical impact on the reliability and safety of robot deployment. 3D mapping has diverse robotic applications, including 3D mapping for large-scale indoor spaces, real-time mapping for underground exploration, and Simultaneous Localization and Mapping (SLAM).

[0003] For these robotic applications, it is important to perform 3D mapping quickly, and for this purpose, Probabilistic Volumetric Mapping (PVM), which uses voxels to represent space, can be used.

[0004] However, the conventional central processing unit (CPU)-based PVM had a problem in that it took a lot of time to identify the occupancy status of each voxel through ray tracing when the sensor's sensing range was wide or the size of the input point cloud data was large.

[0005] The present invention can provide a method and device for generating an occupancy map through PVM using ray tracing.

[0006] The present invention can provide a method and device for generating an occupancy map more quickly and accurately by improving the performance of a PVM through a hybrid approach combining a CPU and a graphics processing unit (GPU).

[0007] However, technical challenges are not limited to the technical challenges described above, and other technical challenges may exist.

[0008] A method for generating an occupancy map according to an embodiment of the present invention may include the steps of: establishing a three-dimensional shared ray space having a grid shape with uniform spacing for ray tracing based on a position of a robot through a first processor of a serial processing method; constructing a bounding volume hierarchy (BVH) for the established shared ray space through a second processor of a parallel processing method; classifying, through the second processor, an occupancy state of a voxel intersected by a ray by ray tracing among voxels included in the shared ray space based on the constructed BVH; and updating, through the first processor, an occupancy map in an octree shape by performing probabilistic volumetric mapping (PVM) based on the occupancy state of the classified voxel.

[0009] The step of setting the shared ray space may set the shared ray space segmented into voxels of the uniform size based on the maximum measurement range and frequency size of the sensor used to perform the ray tracing.

[0010] The step of constructing the above BVH can construct a two-level BVH by instantiating the above-described shared light space using a basic BVH of a preset size.

[0011] The step of classifying the occupancy state of the above voxel can encode the occupancy state of the voxel through two bits.

[0012] The step of classifying the occupancy status of the above voxel can classify the occupancy status of the voxel as occupied if the bit value of the least significant bit (LSB) of the two bits is encoded as 1.

[0013] The step of classifying the occupancy status of the above voxel can classify the occupancy status of the voxel as free if the bit value of the Most Significant Bit (MSB) of the two bits is encoded as 1.

[0014] The step of updating the above occupancy map can update the occupancy status of the voxel to occupied if both the most significant bit and the least significant bit indicating the occupancy status of the voxel are encoded as 1.

[0015] A method for generating an occupancy map performed by a first processor in a serial processing manner according to one embodiment of the present invention may include the steps of: identifying an occupancy state for a voxel intersected by a ray among voxels included in a shared ray space based on a BVH for the shared ray space constructed by a second processor in a parallel processing manner; and updating an occupancy map in an octree form according to bit values ​​of two bits representing the identified occupancy state.

[0016] The above shared ray space can be subdivided into voxels of uniform size based on the maximum measurement range and frequency of the sensor used to perform ray tracing.

[0017] The above BVH can be constructed as a two-level BVH by instantiating the shared ray space using a basic BVH of a preset size.

[0018] The occupancy state of a voxel intersected by the above ray can be classified as one of (i) Unknown, (ii) Occupied, (iii) Free, and (iv) Occupied or Free based on the bit value of the LSB and the bit value of the MSB among the two bits.

[0019] The step of updating the above occupancy map can update the occupancy status for the voxel to occupied if both the LSB and MSB indicating the occupancy status of the voxel are encoded as 1.

[0020] According to one embodiment of the present invention, a computing device includes one or more processors; and a memory for loading or storing a program executed by the processors, wherein the program may include instructions for performing an operation of setting a three-dimensional shared ray space having a grid shape with uniform spacing for ray tracing based on a position of a robot through a first processor in a serial processing manner, an operation of constructing a BVH for the set shared ray space through a second processor in a parallel processing manner, an operation of classifying an occupancy state of a voxel intersected by a ray by ray tracing among voxels included in the shared ray space based on the constructed BVH through the second processor, and an operation of updating an occupancy map in an octree form by performing a PVM based on the occupancy state of the classified voxels through the first processor.

[0021] The first processor can set a shared ray space segmented into voxels of uniform size based on the maximum measurement range and frequency of the sensor used to perform the ray tracing.

[0022] The second processor can construct a two-level BVH by instantiating the set shared light space using a basic BVH of a preset size.

[0023] The second processor can classify the occupancy state of the voxel by encoding the occupancy state of the voxel through two bits.

[0024] The second processor can classify the occupancy status of the voxel as occupied if the bit value of the LSB among the two bits is encoded as 1.

[0025] The second processor can classify the occupancy status of the voxel as free if the bit value of the MSB among the two bits is encoded as 1.

[0026] The first processor can determine the occupancy status of the voxel as occupied and update the occupancy map when both the LSB and the MSB indicating the occupancy status of the voxel are encoded as 1.

[0027] According to one embodiment of the present invention, an occupancy map can be generated through PVM using ray tracing.

[0028] According to one embodiment of the present invention, the performance of PVM can be improved through a hybrid approach combining CPU and GPU, thereby generating an occupancy map more quickly and accurately.

[0029] FIG. 1 is a diagram illustrating a configuration of a computing device according to one embodiment of the present invention.

[0030] FIG. 2 is a flowchart illustrating a method for generating an occupancy map according to an embodiment of the present invention.

[0031] FIGS. 3A and 3B are diagrams illustrating a method for mapping voxels into ray space based on the current position of a robot according to one embodiment of the present invention.

[0032] FIG. 4a and FIG. 4b are diagrams illustrating a BVH construction method using BVH instancing according to one embodiment of the present invention.

[0033] FIGS. 5A to 5C are drawings showing a method for determining the occupancy status of a voxel according to one embodiment of the present invention.

[0034] FIG. 6a and FIG. 6b are drawings showing a method for setting a shared light space according to one embodiment of the present invention.

[0035] Specific structural or functional descriptions of the embodiments are disclosed for illustrative purposes only and may be modified and implemented in various forms. Therefore, the actual implementation is not limited to the specific embodiments disclosed, and the scope of this specification includes modifications, equivalents, or alternatives within the technical concepts described in the embodiments.

[0036] Although terms such as "first" or "second" may be used to describe various components, these terms should be interpreted solely to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component.

[0037] When it is said that a component is "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but there may also be other components in between.

[0038] Singular expressions include plural expressions unless the context clearly dictates otherwise. In this document, phrases such as "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can each include any one of the items listed together in that phrase, or all possible combinations thereof. In this specification, it should be understood that the terms "comprises" or "has" and the like are intended to specify the presence of a described feature, number, step, operation, component, part, or combination thereof, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0039] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art. Terms defined in commonly used dictionaries should be interpreted to have a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0040] Hereinafter, embodiments will be described in detail with reference to the attached drawings. In the description with reference to the attached drawings, identical components are assigned the same reference numerals regardless of the drawing numbers, and redundant descriptions thereof will be omitted.

[0041]

[0042] FIG. 1 is a diagram illustrating a configuration of a computing device according to one embodiment of the present invention.

[0043] As illustrated in FIG. 1, a computing device (100) may include one or more processors (110) and a memory (120) for loading or storing a program (130) executed by the processors (110). The components included in the computing device (100) of FIG. 1 are merely examples, and a person skilled in the art to which the present invention pertains will recognize that other general components may be included in addition to the components illustrated in FIG. 1.

[0044] The processor (110) controls the overall operation of each component of the computing device (100). The processor (110) may be configured to include at least one of a CPU (Central Processing Unit), an MPU (Micro Processor Unit), an MCU (Micro Controller Unit), a GPU (Graphics Processing Unit), an NPU (Neural Processing Unit), a DSP (Digital Signal Processor), or any other type of processor well known in the art of the present invention. In addition, the processor (110) may perform operations for at least one application or program for executing methods / operations according to various embodiments of the present invention. The computing device (100) may include one or more processors.

[0045] The memory (120) stores one or more combinations of various data, instructions, and information used by components (e.g., processor (110)) included in the computing device (100). The memory (120) may include volatile memory and / or non-volatile memory.

[0046] The program (130) may include one or more actions in which methods / operations according to various embodiments of the present invention are implemented, and may be stored in the memory (120) in software form. Here, the actions correspond to commands implemented in the program (130). For example, the program (130) may include instructions for performing an operation of setting a three-dimensional shared ray space having a grid shape with uniform spacing for ray tracing based on the position of the robot through a first processor in a serial processing manner, an operation of constructing a bounding volume hierarchy (BVH) for the set shared ray space through a second processor in a parallel processing manner, an operation of classifying an occupancy state of voxels intersected by rays by ray tracing among voxels included in the shared ray space based on the constructed BVH through the second processor, and an operation of updating an occupancy map in an octree form by performing probabilistic volumetric mapping (PVM) based on the occupancy state of the classified voxels through the first processor.

[0047] When the program (130) is loaded into the memory (120), the processor (110) can perform methods / operations according to various embodiments of the present invention by executing a plurality of operations to implement the program (130).

[0048] The execution screen of the program (130) can be displayed through the display (140). In the case of FIG. 1, the display (140) is represented as a separate device connected to the computing device (100). However, in the case of a computing device (100) such as a terminal that a user can carry, such as a smartphone or tablet, the display (140) can be a component of the computing device (100). The screen displayed on the display (140) can be before inputting information into the program or the result of executing the program.

[0049]

[0050] FIG. 2 is a flowchart illustrating a method for generating an occupancy map according to an embodiment of the present invention.

[0051] The occupancy map generation method illustrated in FIG. 2 is performed by the processor (110) of the computing device (100) illustrated in FIG. 1. At this time, the processor (110) may include a first processor (e.g., CPU) of a serial processing method and a second processor (e.g., GPU) of a parallel processing method.

[0052] In step (210), the first processor can set up a three-dimensional shared ray space having a grid shape with even spacing for ray tracing based on the position of the robot. At this time, the robot can include various sensors such as an RGB-D camera or LiDAR to collect point cloud data for generating an occupancy map. The robot can output rays for ray tracing to a shared ray space in a geometric shape such as a triangle or an axis-aligned bounding box (AABB) through the sensor.

[0053] The first processor can transform the 3D voxels of the octree into a 3D shared ray space for ray tracing of rays output into the shared ray space. At this time, rather than transforming all voxels of the octree into the shared ray space for ray tracing, the first processor can transform only leaf-level voxels that can intersect with the rays output for ray tracing based on the current position of the robot into the shared ray space. These leaf-level voxels can be used to update the probabilistic occupancy state of the octree in a bottom-up manner.

[0054] FIGS. 3A and 3B are diagrams illustrating a method for mapping voxels into ray space based on the current position of a robot according to one embodiment of the present invention. As an example, FIGS. 3A and 3B illustrate a method for mapping voxels into ray space using a quadtree instead of an octree for simplicity of explanation.

[0055] First, the first processor can identify a bounding volume (330) surrounding the current position (310) of the robot and the point cloud data (320) collected by the ray, as shown in FIG. 3A, and determine the minimum number of voxels of the leaf level including the identified bounding volume (330). The voxels can be mapped to a shared ray space required for ray tracing by the second processor, and this shared ray space can be stored and managed by the second processor. In addition, the second processor can build a bounding volume hierarchy (BVH) later using the shared ray space. However, if the size of the BVH is large, the construction time and traverse time of the BVH increase, which may result in a decrease in the ray tracing speed. Therefore, the first processor can optimize the number of voxels mapped to the shared ray space to the minimum in order to solve this problem.

[0056] The first processor can identify voxels corresponding to the minimum number of voxels of the leaf level determined in this way as candidate voxels likely to intersect the ray, and set the ray space (340) using the identified candidate voxels.

[0057] For example, referring to Fig. 3a, all candidate voxels within the ray space can be subject to a probabilistic occupancy update of the quadtree because they are all intersected by the ray. Referring to Fig. 3b, the candidate voxels can be specific leaf nodes among the 16 leaf nodes of the quadtree, and the quadtree whose leaf node status has changed in this way can have its probabilistic occupancy updated in a bottom-up manner.

[0058] The first processor can upload the ray space (340) set in this manner to the second processor for ray tracing. At this time, the second processor may be a dedicated ray tracing GPU, such as an RTX GPU, which exhibits fast performance in large-scale parallel ray imaging. However, the type of GPU is merely one example and is not limited to the above example.

[0059] In step (220), the second processor may build a bounding volume hierarchy (BVH) for the shared ray space established by the first processor. Large-scale scanning environments or high-resolution sensors may induce a large number of candidate voxels, which may significantly impact the BVH construction performance as well as the memory consumption of the second processor.

[0060] To solve these problems, the second processor of the present invention can utilize BVH instancing to efficiently build a BVH for a shared ray space in terms of computation time and memory usage for building a BVH.

[0061] Figures 4a and 4b are diagrams illustrating a BVH construction method using BVH instancing according to one embodiment of the present invention. More specifically, the second processor may use a two-level BVH to implement BVH instancing.

[0062] More specifically, referring to FIGS. 4a and 4b, the second processor can build a basic BVH by grouping a shared ray space of a preset size (e.g., a 2 × 2 shared ray space) into bottom level acceleration structures (BLAS).

[0063] The second processor can then more efficiently build a BVH for a large shared ray space (e.g., a 4 × 4 shared ray space) by instantiating the basic BVH built in this way into a Top Level Acceleration Structure (TLAS).

[0064] That is, since the shared ray space provided by the present invention is composed of voxels of the same size, the second processor generates one optimized basic BVH, and instances of TLAS commonly reference the optimized BLAS, i.e., the basic BVH, to build the BVH required for ray tracing, thereby reducing the BVH construction time and providing optimization of memory usage.

[0065] In step (230), the second processor can classify the occupancy status of voxels intersected by rays obtained by ray shooting among voxels included in the shared ray space based on the constructed BVH. At this time, rays obtained by ray shooting can be output in large quantities in parallel from the sensor origin to each point in the scanned point cloud data.

[0066] More specifically, the second processor can encode the occupancy status of a voxel using two bits. For example, if the bit value of the least significant bit (LSB) of the two bits is 1, the second processor can classify the occupancy status of the corresponding voxel as "occupied," meaning that an object exists.

[0067] As another example, the second processor can classify the occupancy state of the voxel as Free, meaning an empty state in which no object exists, if the bit value of the Most Significant Bit (MSB) of the two bits is 1.

[0068] Accordingly, each voxel can be classified into one of four occupancy states: (i) 00 (Unknown), (ii) 01 (Occupied), (iii) 10 (Free), and (iv) 11 (Occupied or Free), and the occupancy state of such voxels can be transmitted from the second processor to the first processor.

[0069] In step (240), the first processor can update the occupancy map in the octree form by performing PVM based on the occupancy state of the voxel classified by the second processor. More specifically, if the most significant bit and the least significant bit indicating the occupancy state of the voxel are both encoded as 0, the first processor can update the occupancy state of the corresponding voxel in the octree form occupancy map to Unknown.

[0070] Alternatively, the first processor can update the occupancy status of the voxel to Occupied in the occupancy map in the octree form if the most significant bit indicating the occupancy status of the voxel is encoded as 0 and the least significant bit as 1.

[0071] Alternatively, the first processor can update the occupancy status of the voxel to Free in the occupancy map in the octree form if the most significant bit indicating the occupancy status of the voxel is encoded as 1 and the least significant bit as 0.

[0072] Meanwhile, voxels included in the shared ray space can be simultaneously classified as occupied and free by different rays. For example, referring to FIG. 5A, a voxel (510) included in a portion (500) of the shared ray space can be classified as occupied by the first ray (520). However, the voxel (510) can be classified as free by the second ray (530) and the third ray (540).

[0073] Therefore, referring to FIG. 5b, the voxel (510) can be encoded by the second processor so that both the most significant bit and the least significant bit can be 1 so that the occupancy state can indicate both occupied and free.

[0074] The first processor of the present invention can interpret occupied status as being prioritized over free status when both the most significant bit and the least significant bit are encoded as 1, such that the occupancy status of a voxel is interpreted as both occupied and free. That is, when both the most significant bit and the least significant bit indicating the occupancy status of a voxel are encoded as 1, the first processor can update the occupancy status of the corresponding voxel (510) to occupied status, as shown in FIG. 5c.

[0075]

[0076] FIG. 6a and FIG. 6b are drawings showing a method for setting a shared light space according to one embodiment of the present invention.

[0077] The ray space in which ray tracing is performed can change whenever the position of the robot including the sensor changes. For example, if the sensor performs scanning at three different positions, as shown in Fig. 6a, the first processor can establish three independent ray spaces, which requires the second processor to build a BVH for each of the three independent ray spaces. However, in this case, since the position of the sensor can be arbitrarily increased, both the number of ray spaces and the BVH construction time can increase, which can lead to problems.

[0078] To address this issue, the first processor of the present invention can define a shared light space as illustrated in FIG. 6b. During a sensor scan, the sensor location becomes the origin of the coordinate axes in sensor coordinates, and the coordinate axes may tilt depending on the inclination of the sensor. In these sensor coordinates, the sensor has a coordinate value of (0,0,0), and each point cloud collected by the sensor can have its coordinate value determined in the corresponding sensor coordinates.

[0079] The first processor can define a shared light space by gathering all sensor locations as the origin on global coordinates, as shown in Fig. 6a. Since the global coordinates are a voxelized space, the gathered sensor locations can be slightly translated by considering the sensor locations within the voxelized space in the sensor coordinates, rather than (0,0,0). At this time, the slope of the coordinate system does not change.

[0080] As a result, the intersecting voxels obtained from ray shooting on the sensor coordinates and ray shooting on the global coordinates can be the same, with only the location changed.

[0081] The first processor can pre-calculate this shared light space based on the sensor's maximum measurement range and frequency. The sensor's maximum measurement range refers to the length and spread of the light beam, while the frequency refers to the number of point clouds collected by the sensor. Therefore, the first processor can predict the space where point clouds may exist and pre-define the shared light space accordingly.

[0082] If the sensor locations are known in advance (e.g., the detection trajectory is pre-planned), the primary processor can more accurately determine the extent of the shared ray space. In this case, the secondary processor can pre-compute and cache the BVH for the shared ray space, and then reuse the same BVH for various sensor locations.

[0083] This strategy of sharing BVHs for shared ray spaces can significantly reduce the memory usage required to set up the shared ray space as well as the BVH construction time of the second processor.

[0084]

[0085] The embodiments described above may be implemented using hardware components, software components, and / or a combination of hardware components and software components. For example, the devices, methods, and components described in the embodiments may be implemented using a general-purpose computer or a special-purpose computer, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and software applications running on the operating system. Furthermore, the processing device may access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.

[0086] Software may include a computer program, code, instructions, or a combination of one or more of these, and may configure a processing device to perform a desired operation or may independently or collectively command the processing device. The software and / or data may be stored in any type of machine, component, physical device, virtual equipment, computer storage medium, or device for interpretation by the processing device or for providing instructions or data to the processing device. The software may also be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on a computer-readable recording medium.

[0087] The method according to the embodiment may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may store program commands, data files, data structures, etc., alone or in combination, and the program commands recorded on the medium may be those specially designed and configured for the embodiment or may be known and available to those skilled in the art of computer software. Examples of the computer-readable recording medium include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and hardware devices specially configured to store and execute program commands, such as ROMs, RAMs, and flash memories. Examples of program commands include not only machine language codes such as those generated by a compiler, but also high-level language codes that can be executed by a computer using an interpreter, etc.

[0088] The hardware device described above may be configured to operate as one or more software modules to perform the operations of the embodiment, and vice versa.

[0089] Although the embodiments described above have been described with limited drawings, those skilled in the art will appreciate that various technical modifications and variations can be applied based on the described embodiments. For example, appropriate results can still be achieved even if the described techniques are performed in a different order than described, and / or components of the described systems, structures, devices, circuits, etc. are combined or combined in a different manner than described, or are replaced or substituted with other components or equivalents.

[0090] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims described below.

Claims

1. In the method of creating an occupancy map, A step of setting a three-dimensional shared ray space having a grid shape with uniform spacing for ray tracing based on the position of the robot through a first processor of a serial processing method; A step of constructing a bounding volume hierarchy (BVH) for the set shared ray space through a second processor of a parallel processing method; A step of classifying the occupancy status of voxels intersected by the ray by ray tracing among voxels included in the shared ray space based on the constructed BVH through the second processor; and A step of updating an occupancy map in the form of an octree by performing probabilistic volumetric mapping (PVM) based on the occupancy status of the classified voxels through the first processor. A method for generating an occupancy map including:

2. In paragraph 1, The steps of setting the shared light space are as follows: An occupancy map generation method for setting a shared ray space segmented into voxels of uniform size based on the maximum measurement range and frequency size of a sensor used to perform the above ray tracing.

3. In paragraph 1, The steps for constructing the above BVH are: A method for generating an occupancy map by constructing a two-level BVH by instancing the shared light space set above using a basic BVH of a preset size.

4. In paragraph 1, The step of classifying the occupancy status of the above voxel is: A method for generating an occupancy map by encoding the occupancy state of the voxel through two bits.

5. In paragraph 4, The step of classifying the occupancy status of the above voxel is: A method for generating an occupancy map that classifies the occupancy status of the voxel as occupied when the bit value of the least significant bit (LSB) of the two bits above is encoded as 1.

6. In paragraph 4, The step of classifying the occupancy status of the above voxel is: A method for generating an occupancy map that classifies the occupancy status of the voxel as free when the bit value of the most significant bit (MSB) among the two bits above is encoded as 1.

7. In paragraph 4, The steps to update the above occupancy map are: A method for generating an occupancy map that updates the occupancy status of the voxel to occupied when both the most significant bit and the least significant bit indicating the occupancy status of the voxel are encoded as 1.

8. In a method for generating an occupancy map performed by a first processor of a serial processing method, A step of identifying an occupancy state for a voxel intersected by a ray among voxels included in the shared ray space based on a bounding volume hierarchy (BVH) for the shared ray space constructed by a second processor in a parallel processing manner; and A step of updating an occupancy map in the form of an octree according to the bit values ​​of two bits indicating the identified occupancy status. A method for generating an occupancy map including:

9. In paragraph 8, The above shared light space is, A method for generating an occupancy map segmented into voxels of uniform size based on the maximum measurement range and frequency of a sensor used to perform ray tracing.

10. In paragraph 8, The above BVH is, A method for generating an occupancy map constructed in two levels by instancing the above shared light space using a basic BVH of a preset size.

11. In paragraph 8, The occupancy status of the voxel intersected by the above ray is A method for generating an occupancy map classified into one of (i) Unknown, (ii) Occupied, (iii) Free, and (iv) Occupied or Free based on the bit value of the least significant bit (LSB) and the bit value of the most significant bit (MSB) among the two bits above.

12. In paragraph 11, The steps to update the above occupancy map are: A method for generating an occupancy map that updates the occupancy status of the voxel to occupied when both the least significant bit and the most significant bit indicating the occupancy status of the voxel are encoded as 1.

13. In computing devices, one or more processors; and Including a memory for loading or storing a program executed by the above processor, The above program is, A computing device comprising instructions for performing an operation of establishing a three-dimensional shared ray space having a grid shape with uniform spacing for ray tracing based on the position of a robot through a first processor in a serial processing manner, an operation of constructing a bounding volume hierarchy (BVH) for the established shared ray space through a second processor in a parallel processing manner, an operation of classifying an occupancy state of voxels intersected by rays by ray tracing among voxels included in the shared ray space based on the constructed BVH through the second processor, and an operation of updating an occupancy map in an octree form by performing probabilistic volumetric mapping (PVM) based on the occupancy state of the classified voxels through the first processor.

14. In paragraph 13, The above first processor, A computing device that sets up a shared ray space segmented into voxels of uniform size based on the maximum measurement range and frequency size of the sensor used to perform the above ray tracing.

15. In paragraph 13, The second processor, A computing device that constructs a two-level BVH by instancing the shared light space set above using a basic BVH of a preset size.

16. In paragraph 13, The second processor, A computing device that classifies the occupancy state of a voxel by encoding the occupancy state of the voxel through two bits.

17. In paragraph 16, The second processor, A computing device that classifies the occupancy status of the voxel as occupied when the bit value of the least significant bit (LSB) of the two bits above is encoded as 1.

18. In paragraph 16, The second processor, A computing device that classifies the occupancy status of the voxel as free when the bit value of the most significant bit (MSB) of the two bits above is encoded as 1.

19. In paragraph 16, The above first processor, A computing device that determines the occupancy status of the voxel as occupied and updates the occupancy map when both the least significant bit and the most significant bit indicating the occupancy status of the voxel are encoded as 1.

Citation Information

Patent Citations

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  • Methods and systems for constructing ray tracing acceleration structures

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