Apparatus including linear amplifier for improving stability and operating method thereof

Abstract

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate than a 4G communication system such as LTE. According to various embodiments of the present disclosure, a method performed by a linear amplifier in a wireless communication system may include the steps of: obtaining a first signal including an input signal and a second signal including a feedback signal of the linear amplifier; identifying the difference between the first signal and the second signal; generating at least one output pulse on the basis of the difference; and transmitting, on the basis of the at least one output pulse, a third signal for controlling the operation of at least one first transistor or at least one second transistor.

Description

Device including linear amplifier for improving stability and method of operation thereof

[0001] The present disclosure relates generally to wireless communication systems, and more particularly to a linear amplifier and a device including the same for improving slew rate and stability in a wireless communication system.

[0002] Looking back at the evolution of wireless communication over successive generations, technologies have primarily been developed for human-facing services such as voice, multimedia, and data. With the commercialization of the 5G (5th Generation) communication system, an explosive increase in connected devices is expected to be connected to communication networks. Examples of networked objects include vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction equipment, and factory equipment. Mobile devices are also expected to evolve into diverse form factors, such as augmented reality glasses, virtual reality headsets, and holographic devices. In the 6G (6th Generation) era, efforts are being made to develop improved 6G communication systems to connect hundreds of billions of devices and objects and provide diverse services. For this reason, 6G communication systems are often referred to as "beyond 5G."

[0003] The 6G communication system, expected to be realized around 2030, will have a maximum transmission speed of terabytes (i.e., 1,000 gigabits) per second (bps) and a wireless latency of 100 microseconds (μsec). In other words, compared to 5G, the transmission speed in a 6G communication system will be 50 times faster and the wireless latency will be reduced to one-tenth.

[0004] To achieve these high data rates and ultra-low latency, 6G communication systems are being considered for implementation in the terahertz (THz) band (e.g., from 95 gigahertz (GHz) to 3 terahertz (THz)). Compared to the millimeter wave (mmWave) band introduced in 5G, the terahertz band is expected to have more severe path loss and atmospheric absorption, making it more important to develop technologies that can guarantee signal reach, or coverage. Key technologies to ensure coverage include Radio Frequency (RF) components, antennas, new waveforms that offer better coverage than Orthogonal Frequency Division Multiplexing (OFDM), beamforming, and multiple antenna transmission technologies such as massive Multiple-Input and Multiple-Output (MIMO), Full Dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas. In addition, new technologies such as metamaterial-based lenses and antennas, high-dimensional spatial multiplexing using Orbital Angular Momentum (OAM), and Reconfigurable Intelligent Surface (RIS) are being discussed to improve the coverage of terahertz band signals.

[0005] In addition, in order to improve frequency efficiency and system network, 6G communication systems are developing full duplex technology that utilizes the same frequency resources at the same time for uplink and downlink; network technology that integrates satellites and HAPS (High-Altitude Platform Stations); network structure innovation technology that supports mobile base stations and enables optimization and automation of network operation; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that utilizes AI (Artificial Intelligence) from the design stage and internalizes end-to-end AI support functions to realize system optimization; and next-generation distributed computing technology that realizes services with complexity that exceeds the limits of terminal computing capabilities by utilizing ultra-high-performance communication and computing resources (Mobile Edge Computing (MEC), cloud, etc.). In addition, efforts are being made to further strengthen connectivity between devices, further optimize networks, promote softwareization of network entities, and increase the openness of wireless communications through the design of new protocols to be used in 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe use of data, and the development of technologies for maintaining privacy.

[0006] Research and development of these 6G communication systems are expected to enable a new level of hyper-connected experience through the hyper-connectivity of 6G communication systems, which encompass not only connections between things but also connections between people and things. Specifically, 6G communication systems are expected to enable services such as truly immersive eXtended Reality (XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as remote surgery, industrial automation, and emergency response, which are provided through 6G communication systems through enhanced security and reliability, will be applied in diverse fields such as industry, medicine, automobiles, and home appliances.

[0007] In particular, in addition to the terahertz band, which has high free path loss or performance issues of transistor devices, the upper-midband band (e.g., 7-24 GHz) between the FR1 and FR2 bands has also been selected as a major candidate for the 6G wireless communication system band, and thus, technologies for ensuring coverage of such high frequency bands are increasingly required.

[0008] The present disclosure relates generally to wireless communication systems, and more particularly to a linear amplifier and a device including the same for improving slew rate and stability in a wireless communication system.

[0009] According to various embodiments of the present disclosure, an object is to provide a device and method capable of effectively providing a service in a wireless communication system.

[0010] The technical problems to be achieved in this document are not limited to the technical problems mentioned above, and other technical problems not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the present invention belongs from the description below.

[0011] According to various embodiments of the present disclosure, in a wireless communication system, a method performed by a linear amplifier may include the steps of obtaining a first signal including an input signal and a second signal including a feedback signal of the linear amplifier, identifying a difference value between the first signal and the second signal, generating at least one output pulse based on the difference value, and transmitting a third signal controlling an operation of at least one first transistor or at least one second transistor based on the at least one output pulse.

[0012] According to various embodiments of the present disclosure, in a wireless communication system, a linear amplifier may include a transceiver, and a controller coupled to the transceiver, wherein the controller may be configured to obtain a first signal including an input signal and a second signal including a feedback signal of the linear amplifier, identify a difference value between the first signal and the second signal, generate at least one output pulse based on the difference value, and transmit a third signal controlling an operation of at least one first transistor or at least one second transistor based on the at least one output pulse.

[0013] The present disclosure provides an electronic device and method capable of effectively providing a service in a wireless communication system.

[0014] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.

[0015] FIG. 1 illustrates a wireless communication system according to embodiments of the present disclosure.

[0016] FIG. 2 illustrates an example of the structure of an electronic device according to embodiments of the present disclosure.

[0017] FIG. 3 illustrates the structure of a supply modulator including a linear amplifier according to embodiments of the present disclosure.

[0018] FIG. 4a illustrates the structure and characteristics of an operational amplifier including a voice feedback network and a Miller compensation network according to embodiments of the present disclosure.

[0019] FIG. 4b illustrates an example of characteristics according to various linear amplifier structures according to embodiments of the present disclosure.

[0020] FIG. 4c illustrates an example of a linear amplifier structure including an I_q controller according to embodiments of the present disclosure.

[0021] FIG. 4d illustrates an example of a linear amplifier structure for slew rate enhancement (SRE) according to embodiments of the present disclosure.

[0022] FIG. 5 illustrates the structure and characteristics of a linear amplifier including a control unit for sensing a feedback signal according to embodiments of the present disclosure.

[0023] FIG. 6 illustrates a specific structure of a linear amplifier including a control unit and a transistor for sensing a feedback signal according to embodiments of the present disclosure.

[0024] FIG. 7 illustrates a specific effect of a linear amplifier including a control unit for sensing a feedback signal according to embodiments of the present disclosure.

[0025] FIG. 8A illustrates an example of an operational flow for improving the efficiency of a power amplifier through sensing of a feedback signal according to embodiments of the present disclosure.

[0026] FIG. 8b illustrates another example of an operational flow for improving the efficiency of a power amplifier through sensing of a feedback signal according to embodiments of the present disclosure.

[0027] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. It should be noted that, where possible, identical components are represented by identical reference numerals throughout the drawings. Furthermore, detailed descriptions of well-known functions and configurations that may obscure the gist of the present invention will be omitted.

[0028] In describing the embodiments herein, descriptions of technical details that are well-known in the technical field to which the present invention pertains and are not directly related to the present invention will be omitted. This is to avoid obscuring the gist of the present invention by omitting unnecessary explanations and to convey the gist more clearly.

[0029] For the same reason, some components in the attached drawings are exaggerated, omitted, or schematically depicted. Furthermore, the dimensions of each component do not entirely reflect its actual size. Identical or corresponding components in each drawing are assigned the same reference numbers.

[0030] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various different forms. These embodiments are provided only to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Like reference numerals designate like elements throughout the specification.

[0031] At this time, it will be understood that each block of the processing flow diagrams and combinations of the flow diagrams can be performed by computer program instructions. These computer program instructions can be installed in a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing equipment, so that the instructions executed by the processor of the computer or other programmable data processing equipment create a means for performing the functions described in the flow diagram block(s). These computer program instructions can also be stored in a computer-available or computer-readable memory that can direct a computer or other programmable data processing equipment to implement the functions in a specific manner, so that the instructions stored in the computer-available or computer-readable memory can also produce a manufactured item that includes an instruction means for performing the functions described in the flow diagram block(s). Since the computer program instructions may be installed on a computer or other programmable data processing device, a series of operational steps may be performed on the computer or other programmable data processing device to create a computer-executable process, and the instructions that cause the computer or other programmable data processing device to perform the steps for performing the functions described in the flowchart block(s) may also provide steps for performing the functions described in the flowchart block(s).

[0032] Additionally, each block may represent a module, segment, or portion of code that contains one or more executable instructions for performing a specific logical function(s). It should also be noted that in some alternative implementation examples, the functions described in the blocks may occur out of order. For example, two blocks depicted in succession may actually be executed substantially concurrently, or the blocks may sometimes be executed in reverse order, depending on their respective functions.

[0033] Here, the term '~ part' used in this embodiment means software or hardware components such as FPGA (field programmable gate array) or ASIC (application specific integrated circuit), and the '~ part' performs certain roles. However, the '~ part' is not limited to software or hardware. The '~ part' may be configured to be on an addressable storage medium and may be configured to play one or more processors. Therefore, as an example, the '~ part' includes components such as software components, object-oriented software components, class components, and task components, processes, functions, properties, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functions provided within the components and '~ parts' may be combined into a smaller number of components and '~ parts' or further separated into additional components and '~ parts'. Additionally, the components and '~parts' may be implemented to play one or more central processing units (CPUs) within the device or secure multimedia card.

[0034] The embodiments of the present disclosure described below may also be applied to other communication systems with similar technical backgrounds or channel types. Furthermore, the embodiments of the present disclosure may be applied to other communication systems with some modifications, as determined by a person skilled in the art, without significantly departing from the scope of the present disclosure.

[0035] In the following description, terms used to identify connection nodes, terms referring to network entities or network functions (NFs), terms referring to messages, terms referring to interfaces between network objects, terms referring to various identification information, etc. are examples provided for convenience of explanation. Therefore, the present invention is not limited to the terms described below, and other terms referring to objects having equivalent technical meanings may be used.

[0036] For convenience of explanation, some terms and names defined in the 3rd generation partnership project long-term evolution (3GPP) standards may be used. However, the present invention is not limited to the terms and names described herein, and can be equally applied to systems conforming to other standards. In particular, the present disclosure can be applied to the 3GPP 5th generation mobile communication standards (e.g., 5GS and NR).

[0037] Figure 1 illustrates a wireless communication system according to embodiments of the present disclosure. Figure 1 illustrates a base station (110), a terminal (120), and a terminal (130) as some of the nodes utilizing a wireless channel in the wireless communication system. While Figure 1 illustrates only one base station, other base stations identical to or similar to base station (110) may be included.

[0038] The base station (110) is a network infrastructure that provides wireless access to terminals (120, 130). The base station (110) has coverage defined as a certain geographical area based on the distance at which a signal can be transmitted. In addition to the base station, the base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', '5th generation node', 'wireless point', 'transmission and reception point (TRP)', or other terms having equivalent technical meanings.

[0039] Each of the terminal (120) and the terminal (130) is a device used by a user and communicates with the base station (110) via a wireless channel. In some cases, at least one of the terminal (120) and the terminal (130) may be operated without the involvement of the user. That is, at least one of the terminal (120) and the terminal (130) is a device that performs machine type communication (MTC) and may not be carried by the user. Each of the terminal (120) and the terminal (130) may be referred to as a 'user equipment (UE)', a 'mobile station', a 'subscriber station', a 'customer premises equipment (CPE)', a 'remote terminal', a 'wireless terminal', an 'electronic device', a 'user device', or other terms having an equivalent technical meaning thereto.

[0040] The base station (110), the terminal (120), and the terminal (130) can transmit and receive wireless signals in the millimeter wave (mmWave) band (e.g., 28 GHz, 30 GHz, 38 GHz, 60 GHz). At this time, in order to improve channel gain, the base station (110), the terminal (120), and the terminal (130) can perform beamforming. Here, the beamforming can include transmission beamforming and reception beamforming. That is, the base station (110), the terminal (120), and the terminal (130) can provide directionality to a transmission signal or a reception signal. To this end, the base station (110) and the terminals (120, 130) can select serving beams (112, 113, 121, 131) through a beam search or beam management procedure. After serving beams (112, 113, 121, 131) are selected, subsequent communication can be performed through resources that are in a QCL (quasi co-located) relationship with the resources that transmitted the serving beams (112, 113, 121, 131).

[0041] According to one embodiment of the present disclosure, a supply modulator (SM) or linear amplifier for improving the efficiency of a power amplifier may be used in an electronic device that transmits or receives a signal in the mmWave band. For example, when the base station (110) of FIG. 1 transmits or receives a signal in the mmWave band, the supply modulator or linear amplifier disposed in the base station (110) may include all or part of the structure of the amplifier according to various embodiments of the present disclosure. As another example, when the terminals (120, 130) of FIG. 1 transmit or receive a signal in the mmWave band, the supply modulator or linear amplifier disposed in the terminals (120, 130) may include all or part of the structure of the amplifier according to one embodiment of the present disclosure.

[0042] FIG. 2 illustrates an example of the structure of an electronic device according to embodiments of the present disclosure. The electronic device of FIG. 2 may include an electronic device disposed in the base station or terminal of FIG. 1 described above. In addition, the electronic device including each configuration of FIG. 2 may include a linear amplifier, a supply modulator, or a power amplifier according to various embodiments of the present disclosure.

[0043] Referring to FIG. 2, an example of the functional structure of an electronic device (or hardware device) according to embodiments of the present disclosure is illustrated. Terms such as "unit" and "device" used hereinafter mean a unit that processes at least one function or operation, which may be implemented by hardware, software, or a combination of hardware and software. According to one embodiment, the electronic device includes a communication unit (210), a storage unit (230), and a control unit (220).

[0044] The communication unit (210) performs functions for transmitting and receiving signals or data via a wireless channel. For example, the communication unit (210) may, of course, perform functions for transmitting and receiving signals or data via a wired channel. However, the communication unit (210) is not limited thereto, and of course, the communication unit (210) may include a configuration for lines for transmitting and receiving various signals between various units (e.g., amplifiers) of the present disclosure and other circuit units.

[0045] The communication unit (210) transmits and receives signals as described above. According to one embodiment, the communication unit (210) can transmit and receive signals between circuits or network units. Accordingly, all or part of the communication unit (210) may be referred to as a transmitter, a receiver, or a transceiver. In addition, in the following description, transmission and reception performed through lines and wireless or wired channels are used to mean that the communication unit (210) performs the processing described above.

[0046] The storage unit (230) stores data such as basic programs, application programs, and setting information for the operation of the electronic device. The storage unit (230) may be composed of volatile memory, non-volatile memory, or a combination of volatile and non-volatile memory. In addition, the storage unit (230) may provide stored data upon request from the control unit (220).

[0047] The control unit (220) controls the overall operations of the electronic device (including circuit units such as amplifiers). For example, the control unit (220) transmits and receives signals through the communication unit (210). In addition, the control unit (220) records and reads data in the storage unit (230). To this end, the control unit (220) may include at least one processor (or controller) or microprocessor, or may be a part of a processor. According to various embodiments, the control unit (220) may control various circuit units to identify and generate signals transmitted and received. For example, the control unit (220) may control each circuit unit to perform operations according to various embodiments described below.

[0048] According to various embodiments, the electronic device illustrated in FIG. 2 may include a programmable hardware device or a logical software device. For example, the electronic device may include at least one of various programmable circuit devices (such as an application specific integrated circuit (ASIC), a network interface controller (NIC), an intelligence processing unit (IPU), a data processing unit (DPU), a central processing unit (CPU), etc.).

[0049] Hereinafter, according to various embodiments of the present disclosure, the electronic device may be replaced with various expressions having substantially the same meaning while including various circuit units that operate to achieve the effects of the present disclosure, such as a hardware device, a linear amplifier, a supply modulator, a first device, or a second device.

[0050] FIG. 3 illustrates the structure of a supply modulator including a linear amplifier according to embodiments of the present disclosure.

[0051] A transmitter in a wireless communication system may include a power amplifier (PA) to enhance the output of a generated signal. In particular, in recent wireless communication systems, where the frequency of signal transmission and reception has increased with technological advancements, which may lead to coverage issues, a power amplifier that amplifies signals to high output power is considered an essential circuit unit (e.g., circuit block) for transmitting signals over long distances, particularly in terminals or base stations.

[0052] Currently, active research is being conducted on various power amplifier structures to improve the efficiency of power amplifiers. For example, terminals or base stations can expect improved power amplification efficiency by deploying improved power amplifier structures such as Doherty power amplifiers and Class-J power amplifiers. In addition, recent research is focusing not only on the structure of the power amplifier itself, but also on envelope tracking (ET), which modulates the signal supplied to the power amplifier according to the input envelope signal applied to the power amplifier rather than a fixed signal. Here, envelope tracking refers to a technology for adjusting the bias voltage of the amplifier by tracking the amplitude of the RF (radio frequency) signal, and can refer to a technology for preventing efficiency reduction due to increased peak-to-average power ratio (PAPR). In particular, in order to support ultra-high-speed communication in 5G, a design with a signal bandwidth (BW) of 100 MHz is required, and envelope tracking technology related to such high bandwidth is currently being actively commercialized.

[0053] Referring to FIG. 3, in order to apply the above-described ET technology to a power amplifier (320), a supply modulator (SM) (310), which is a type of power management integrated circuit (PMIC), may be essential. More specifically, a hybrid SM may be used as an optimal structure that considers not only the efficiency of the power amplifier but also the efficiency of the supply modulator for applying the ET technology. Here, the hybrid SM (310) may include a switching amplifier (SW) (316) with low processing speed but high efficiency, a linear amplifier (LA) (312) with fast processing speed but low efficiency, and a feedback system that can efficiently and optimally control the above components depending on the situation. For example, the supply modulator (310) for applying the ET technology may operate by including a linear amplifier (LA) (312), a switching amplifier (316), and a control block (314). Furthermore, among them, the linear amplifier (312) may include an input stage that operates based on a constant g_m according to an input envelope signal for rail-to-rail input output (RRIO) operation to maximize the output amplitude, and an output stage having a Class-AB amplifier.

[0054] For 6G communications, which are expected to have faster communication speeds than the current 5G, envelope tracking technology operating in a band of 100 MHz or higher is required. In other words, when the input envelope signal of the power amplifier changes rapidly, the speed and efficiency of the linear amplifier that can cover it can be the most important factors in designing this. In particular, for ET technology that can be applied to 100 MHz or higher, a linear amplifier design method optimized for 6G systems is required. As key factors for the efficiency of such linear amplifiers, several indicators can be considered, such as gain bandwidth product (GBW), phase margin (PM) for stability, slew rate (SR), quiescent current (IQ), and direct current (DC) gain. The above-mentioned key factors may be in a trade-off relationship that organically influences each other. In addition, it goes without saying that overshoot or undershoot of signal efficiency according to the feedback system can also be considered as a major factor for stability.

[0055] As described above, various structures or methods for constructing more efficient supply modulators according to various embodiments of the present disclosure may be proposed. Below, FIGS. 4A to 4D illustrate linear amplifier structures through modifications or combinations of general network structures.

[0056] FIG. 4A illustrates the structure and characteristics of an operational amplifier including a negative feedback network and a Miller compensation network according to embodiments of the present disclosure. More specifically, FIG. 4A illustrates examples of a circuit structure in which the operational amplifier (e.g., including a linear amplifier) ​​described above includes a network (410) including elements for negative feedback and a network (420) including elements for applying a Miller compensation technique. In addition, FIG. 4A illustrates a first Bode plot (405) illustrating the amplitude and phase of an expected voltage when the operational amplifier includes the negative feedback network (410) or the Miller compensation network (420), and a time-amplitude graph (415) illustrating a damping effect according to a damping ratio over time.

[0057] Negative feedback network

[0058] First, a voice feedback network including a voice feedback element may be considered. The voice feedback network may be a technique or structure that is generally applicable to the circuit of a general amplifier element.

[0059] Referring to the negative feedback network structure (410), a negative feedback signal may be required for controlling an operational amplifier (OP Amp). Here, the reason why the negative feedback signal is used is because the signal of the OP Amp may oscillate when a positive feedback signal is applied at an operating frequency having a gain. More specifically, the negative feedback network may include a passive element (β) having an optimal value to increase PM, which is an important indicator of stability, and to improve 3-dB BW and DC gain of the closed-loop. Here, the passive element (β) may include at least one of a resistor and a capacitor.

[0060] Referring to the first Bode plot (405), the horizontal axis represents the frequency band, and the vertical axis represents the magnitude and phase of the voltage according to the frequency band. Accordingly, the characteristics of the open loop transfer function for each network are depicted. Considering the voltage gain (e.g., the uncompensated dotted line) for each frequency band of a general linear amplifier, when the value of the passive element (β) of the voice feedback network structure (410) is adjusted, the dotted line of (1 / β=1), where the voltage magnitude is depicted as 0 dB, may move upward. Accordingly, an effect may occur in terms of stability and gain improvement, but the value of the closed loop BW may decrease.

[0061] However, since the GBW value that a linear amplifier generally requires is 2 to 2.5 times or more the system bandwidth of the input signal, the linear amplifier may require a GBW value of 200 or 400 MHz for a system bandwidth of 100 or 200 MHz or more of a 6G system. Therefore, the reduction in the closed-root BW value caused by the addition of the passive element (β) of the voice feedback network structure (410) may not be suitable for a linear amplifier structure for a high bandwidth such as a 6G system. For example, in order to obtain the closed-root BW of the linear amplifier as the unity gain BW (e.g., the frequency when the gain of the amplifier is 1 or 0 dB), it may be advantageous in a 6G system to determine the value of the passive element (β) as 1.

[0062] Miller Compensation Network

[0063] Miller compensation technique may be a commonly used technique in the circuit structure of operational amplifiers with negative feedback elements.

[0064] Referring to the Miller compensation network structure (420), the linear amplifier may include a capacitor (C_c) for the Miller effect and a resistor (R_z) for zero cancellation between the input and output nodes of the output stage amplifier (M7). Here, the Miller effect may refer to an effect in which the equivalent input capacitance of the inverting voltage amplifier increases due to the amplification of the capacitance effect between the input and output nodes.

[0065] Referring to the first board plot (405), the horizontal axis shows the frequency band, and the vertical axis shows the magnitude and phase of the voltage according to the frequency band.

[0066] The voltage magnitude or phase (e.g., uncompensated dotted line) of a typical linear amplifier by frequency band may indicate the characteristics before applying Miller compensation. Here, PM may indicate a margin value indicating how far the phase value of the frequency band corresponding to the unity gain value when the voltage is 0 dB is away from -180 degrees when the value of the passive element (β) is 1. In this case, the closer the phase value is to -180 degrees, the more the amplifier oscillates, and thus, a higher PM value may indicate improved stability. Accordingly, referring to the voltage magnitude or phase (e.g., Miller-compensated solid line) of the linear amplifier to which Miller compensation is applied in the first Bode plot (405), the Miller compensation network structure (420) may secure an improved PM value of 45 degrees, although the GBW value may be somewhat lowered. For example, referring to the first Bode plot (405), the Miller compensation and zero cancellation network can secure stability and improved PM values ​​by increasing the distance between two extreme values ​​(e.g., P1 and P2) where the voltage gain changes significantly.

[0067] The importance of the damping ratio (or braking ratio) (ζ) can be explained with reference to the time-amplitude graph (415). The time-amplitude graph (415) shows a ripple pattern, a slew rate (SR), and a settling time according to the ζ value. Here, the ζ value can be an important indicator for the stability of the amplifier, and in particular, can be a value that can correspond to the PM. For example, when ζ = 1, it can generally mean a PM of about 76 degrees. In addition, the slew rate can be an indicator of how quickly the output voltage can respond and change to the input signal.

[0068] Referring to the time-amplitude graph (415), the cases of under-braking, critical braking, and over-braking and the slew rate according to the ζ value during the stabilization time are shown. In addition, the time-amplitude graph (415) shows cases where overshoot and undershoot occur in the case of under-braking.

[0069] In one embodiment, when ζ<1, which is expressed as a damping ratio, it may be an under damped situation, in which the slew rate may be improved, but a ripple pattern that causes a significant overshoot or undershoot may occur. This ripple pattern may affect the stability of the entire system and may also adversely affect the linearity of the power amplifier and the error vector magnitude (EVM) of the transceiver. Conversely, when ζ=1 through the Miller compensation network (e.g., when the PM is improved from 60 to 80 degrees), it may be a critically damped situation, in which the slew rate is somewhat reduced, but the overshoot or undershoot is also reduced, so that a stable system characteristic can be obtained. In addition, when ζ>1 (e.g., when the PM value is 80 degrees or higher), it may be an over damped situation, in which the ripple pattern may almost disappear, but the slew rate may be significantly reduced.

[0070] Below, FIG. 4b specifically illustrates changes in various factor values ​​that occur according to a linear amplifier including the above-described voice feedback network (410) or Miller compensation network (420).

[0071] FIG. 4B illustrates an example of characteristics according to various linear amplifier structures according to embodiments of the present disclosure. FIG. 4B illustrates a second Bode plot (425) showing closed-loop gain and PM versus frequency band according to a Miller compensation network, a third Bode plot (435) showing open-loop gain and PM versus frequency band according to the number of transistors, and a fourth Bode plot (445) showing open-loop gain versus time according to the number of transistors.

[0072] Referring to the second Bode plot (425), compared to the characteristics of a network without Miller compensation technology applied (e.g., depicted by a dotted line), when Miller compensation technology is applied (e.g., depicted by a solid line), the PM value can be sufficiently compensated from 32 degrees (e.g., based on the R frequency) to 74 degrees (e.g., based on the B frequency), but the GBW value can be significantly reduced from 744 MHz (e.g., based on a closed-loop gain of 0 dB and the R frequency) to 303 MHz (e.g., based on an open-loop gain of 0 dB and the B frequency). As described above with respect to the voice feedback network structure, a wide system bandwidth of 100, 200, or 400 MHz may be required for a feed modulator for a 6G system, and thus the GBW value and slew rate of the linear amplifier included in the feed modulator can have a significant impact on the speed of the entire feed modulator.

[0073] Therefore, the voice feedback network structure may be difficult to use due to the trade-off relationship between PM and GBW values. Furthermore, while the Miller compensation network structure may secure improved PM values, it may not secure GBW values ​​sufficiently compared to the values ​​required by 6G systems, as shown in the second Bode plot (425).

[0074] Based on the above, a method of increasing the size (e.g., the value) of the transistor (TR) may be considered. More specifically, when adjusting the value of the transistor of the Class-AB amplifier included in the output stage of the linear amplifier, overshoot may be reduced, and thus a configuration of a linear amplifier utilizing the same may be considered. For example, the third Bode plot (435) and the fourth Bode plot (445) illustrate the open loop gain according to frequency, and the PM value or the output voltage according to time, respectively, when adjusting the size of the transistor.

[0075] However, as shown in the fourth Bode plot (445), when the transistor size increases (e.g., solid line), the overshoot may decrease compared to when the transistor size decreases (e.g., dotted line), but the slew rate may also decrease. In addition, as shown in the third Bode plot (435), as the transistor value decreases (e.g., from the dotted line with an open-loop gain of 0 dB and an R frequency reference to the solid line with a closed-loop gain of 0 dB and a P frequency reference), the value of the GBW may decrease.

[0076] As described above, a voice feedback network or Miller compensation network alone may have difficulty meeting the GBW, PM, or slew rate requirements of a 6G system. Accordingly, various linear amplifier structures considered to address these issues are specifically described in FIGS. 4c and 4d.

[0077] FIG. 4C illustrates an example of a linear amplifier structure including an I_q controller according to embodiments of the present disclosure. More specifically, FIG. 4C illustrates a structure (430) of a linear amplifier including an I_q controller.

[0078] I q quiescent current controller

[0079] I_q(quiescent current) can generally mean standby current, which can mean the current used when the device is not performing a task (for example, when the output current of a regulator is 0). More specifically, I_q can mean the current that is leaking from the Class-AB amplifier, which is the output stage, but is not supplying current to the load when an intermediate value is input to the input of the linear amplifier. A distinct concept, standby current, can mean the current used when the device is in 'standby' mode (for example, when the LDO (low droupout) is turned off).

[0080] Referring to FIG. 4c, a linear amplifier (430) including an I_q controller (e.g., a quiescent current controller) that controls current based on the I_q current is illustrated. Since the I_q and slew rate described above are in a trade-off relationship, the I_q controller can additionally adjust the linear amplifier to be less sensitive to PVT (process, voltage, and temperature) changes. For example, the I_q controller can implement a slew rate that is insensitive to voltage (V_LA) and temperature changes of the linear amplifier by adaptively adjusting the transistor size (or number) of a positive metal oxide semiconductor (PMOS) or a negative metal oxide semiconductor (NOMS) arranged in the output stage. In addition, referring to the linear amplifier structure (430) of FIG. 4c, the above-described effect can be further improved by simultaneously controlling the number of PMOS and NMOS by applying a controller voltage (V_cnt) to the transistors of the output stage amplifier.

[0081] However, even in the case of a linear amplifier (430) including an I_q controller, there may be a limitation that it is difficult to obtain the slew rate physically required for a 6G system through only controlling I_q. In particular, as shown in the fourth Bode plot (445) of Fig. 4b, it is difficult to expect an effective slew rate improvement from a technique for reducing overshoot and undershoot by simultaneously changing the size or number of transistors of an output stage amplifier, and also, due to the limitation of simultaneously changing the transistors, it may be difficult to adaptively adjust the number of each transistor according to the input signal.

[0082] FIG. 4D illustrates an example of a linear amplifier structure for slew rate enhancement (SRE) according to embodiments of the present disclosure. More specifically, FIG. 4D illustrates various structures (440, 450) of a linear amplifier including a slew rate enhancement (or improvement) unit.

[0083] slew rate enhancement (SRE) unit

[0084] As a key technology for improving the slew rate, a slew rate improvement technique through direct current injection can be considered.

[0085] As a method for improving the slew rate, the first method (440) may include a structure in which an SRE unit is combined to control the amount of current of a current source (e.g., current tail) of an input stage of a linear amplifier according to an input. For example, this may be explained as a method of controlling the amount of current applied to the input stage. However, according to the first method (440), since the slew rate is improved by using the current source of the input stage, direct current injection is required, which may require a very large current. In addition, from a hardware perspective, there is a problem in that a fairly large middle stage may be required accordingly. In addition, the method of increasing the size of the current source may have a problem of noise generation, which may cause additional problems.

[0086] As another structure, the second method (450) can perform maximum current selection through an SRE unit that is connected to an intermediate stage rather than an input stage and supplies current. While this can achieve an optimal GBW value, there may be limitations since GBW is ultimately expressed as a ratio of currents.

[0087] Both of the above-described structures can incorporate techniques to improve slew rate through current sources. However, current sources alone may present physical limitations in achieving GBW, and simply using a large current source can lead to issues such as noise or voltage headroom.

[0088] To address the limitations of the aforementioned structures, another approach (not shown) may include connecting additional capacitors to the output stage for the Miller effect. However, as specifically described in Fig. 4b, the Miller compensation network may also have physical limitations and, due to trade-offs with factors such as GBW, may not be effective in satisfying GBW and PM values ​​for signals with bandwidths exceeding 100 MHz.

[0089] As described above, there may be various structures for improving linear amplifiers to improve the efficiency of power amplifiers, but these structures have a problem in that they do not satisfy important characteristic factors of ET technology for 6G systems. Various embodiments of the present disclosure propose a structure of a high-speed linear amplifier that satisfies elements with complex trade-off relationships having organic relationships such as GBW, slew rate, stability (e.g., PM, ripple, overshoot / undershoot), and quiescent current (I_q) for ET for 6G systems, and a method for generating and processing signals accordingly.

[0090] According to various embodiments of the present disclosure, the linear amplifier may further include a slew rate and stability controller (SSC). According to one embodiment, the SSC may determine to control on / off of a PMOS transistor or an NMOS transistor of an output stage output stage amplifier according to a rising or falling signal difference value. However, the SSC is only an example, and in the following description, as long as the above components perform substantially the same function, they may be described by various names such as a first / second control unit, an SSC controller, an SSC controller, an SSC switch, a sensing block, a sensing unit, a transistor control unit, etc.

[0091] By further including an SSC, the linear amplifier according to the present disclosure can not only improve the slew rate, but also have a significantly higher slew rate and a wider GBW (e.g., a larger GBW value) optimized for 6G systems. Furthermore, since the PM value and overshoot / undershoot can be simultaneously adjusted, stability can be improved and the I_q value can be optimally secured. Hereinafter, the structure of the linear amplifier including the SSC according to the present disclosure and the signal processing method therefor are specifically illustrated through FIGS. 5 to 8b.

[0092] FIG. 5 illustrates the structure and characteristics of a linear amplifier including a control unit for sensing a feedback signal according to embodiments of the present disclosure. More specifically, referring to FIG. 5 , the structure of a linear amplifier (510) including SSCs (505a, 505b) and a characteristic graph (520) thereof are illustrated.

[0093] Referring to FIG. 5, a linear amplifier (510) according to various embodiments of the present disclosure may include an input stage including an Operational Transconductance Amplifier (OTA) (525), and an output stage including a Class-AB amplifier (535). Here, the amplifier (535) of the output stage may include PMOS transistors (515a, 615a) that transmit (e.g., push) current in the output direction and NMOS transistors (515b, 615b) that receive (e.g., pull) current in the output direction.

[0094] According to one embodiment, for stable operation of the linear amplifier (510), the output node of the linear amplifier (510) may be connected as negative feedback to the negative input terminal (e.g., IN- node) of the input stage. For example, a feedback signal transmitted from the output node of the linear amplifier (510) may be delivered to the input stage (e.g., IN- node of the input stage) as a negative feedback signal. The reason for connecting as negative feedback here may be to prevent oscillation of input signal amplification, as described above with reference to FIG. 4A. The above-described feedback system may have a wide GBW characteristic, and may be required to operate as a unit gain buffer to control the envelope signal applied to the positive input terminal (e.g., IN+ node) and the signal from the output terminal (e.g., OUT node) to have the same output. Therefore, the above-described feedback system needs to be connected through the output terminal and the negative input terminal without passive components such as resistors or capacitors that are commonly used.

[0095] Various embodiments of the present disclosure propose a method of comparing a difference value between a signal applied to a positive input terminal (e.g., IN+), which is an envelope signal, and a signal applied to a negative input terminal (e.g., IN-), which is a feedback signal, based on the feedback system described above, and adjusting the number of NMOS or PMOS of an output stage accordingly.

[0096] Referring to FIG. 5, a graph (520) of characteristics based on a linear amplifier (510) including an SSC is illustrated. According to one embodiment, the linear amplifier (510) can generate an output pulse based on a result of comparing a difference value between an input signal (e.g., an envelope signal, a signal applied to a positive input terminal) and a feedback signal (e.g., a signal applied to a negative input terminal) and a reference voltage value (V_ref). At this time, with reference to the characteristic graph (520), signal characteristics of a linear amplifier without a pulse generating operation of the SSC (first line), signal characteristics of a linear amplifier without a pulse generating operation of the SSC but with an increased number of transistors (second line), and signal characteristics of a linear amplifier including a pulse generating operation of the SSC (third line) are illustrated. However, the graph (520) of the signal characteristics shows an example of a case where the difference value is rising (e.g., rising), and is a characteristic that senses the difference value based on the SSC unit for rising (hereinafter, rising SSC or rising SSC). As described below, IN- shows an example of the characteristic of an envelope signal, and IN+ shows an example of the characteristic of a feedback signal, but is not limited thereto.

[0097] Referring to the graph (520) of the signal characteristics, the rising SSC (e.g., the rising control pulse generator) can identify the difference in the voltage output according to the input current (e.g., the signal input to the IN- terminal of the rising SSC sensor) and the feedback current (e.g., the signal input to the IN+ terminal of the rising SSC sensor) based on the reference voltage V_ref1, and turn on the PMOS transistor to increase the output current of the output stage by the difference. According to one embodiment, the operation of turning on or off the PMOS transistor or the NMOS transistor may be expressed in various ways, such as an operation of controlling on / off, an operation of transmitting a signal for on / off, etc. In the case of the first conductor, since the overshoot due to the feedback signal is shown to be significantly high, the result of the second conductor can be derived by increasing the transistor size. However, in the case of the second conductor, the characteristic of the overshoot can also be reduced, but a result that is significantly reduced compared to the first conductor in terms of the slew rate can be derived. Accordingly, referring to the third conductor, as shown in the graph (520) of the signal characteristics, the rising SSC sequentially identifies the difference values ​​of the signals based on V_ref1, V_ref2, and V_ref3, and accordingly, each PMOS can be turned on in stages, and an output pulse that increases the output current can be generated. In this way, by adaptively adjusting the number of transistors, the linear amplifier can generate a stable output signal with a high slew rate and low overshoot characteristics.

[0098] Thus, when designing a power amplifier optimized for a 6G system, it is difficult to compensate for the PM value with Miller compensation alone, and various existing techniques may have limitations in satisfying high slew rates and wide GBW. Therefore, a design method of a linear amplifier, which is the core of the hybrid SM of ET technology, to improve the efficiency of the power amplifier as described above is specifically described. Through the structure of the linear amplifier according to various embodiments of the present disclosure, it is possible to secure a high slew rate and wide GBW, cover the fast operation of the supply modulator, and additionally secure a high PM value of the feedback system without a significant loss in GBW. In addition, the embodiments of the present disclosure can separately detect and operate the rising and falling cases, which can also bring about the effect of reducing the standby current. Hereinafter, the specific structure and signal generation step of the linear amplifier and SSC described above in FIG. 6 are described.

[0099] FIG. 6 illustrates a specific structure of a linear amplifier including a control unit and a transistor for sensing a feedback signal according to embodiments of the present disclosure. Specifically, the linear amplifier according to various embodiments of the present disclosure may include an input stage (610), an intermediate stage (620), and an output stage (630). In addition, the linear amplifier may further include at least one of a rising control pulse generator (605a) or a falling control pulse generator (605b) capable of identifying a difference value of a signal and generating a pulse output signal in case of a power rise or fall. Hereinafter, for convenience, the rising control pulse generator may be expressed as a rising SSC, or the falling control pulse generator may be expressed as a falling SSC, and the SSC may include a switch that switches the control pulse generator and the transistor.

[0100] According to various embodiments of the present disclosure, the SSC control unit may be described in more detail, wherein the rising control pulse generator (605a) or the falling control pulse generator (605b) may include at least one of a sensor block (e.g., a subtractor) capable of identifying a difference value between an envelope signal (hereinafter, an input signal) and a feedback signal, a comparator (e.g., a comparator) capable of comparing the difference value with a reference voltage V_ref, or a switch (e.g., a control pulse generator, a PMOS switch (606a) / NMOS switch (606b), etc.) capable of controlling such a unit and generating and transmitting a control signal and an output pulse signal that can turn on and off each transistor. In addition, the output stage (630) of the linear amplifier may include at least one PMOS transistor (615a) or at least one NMOS transistor (615b) whose on / off is controlled by receiving a control signal for controlling on / off from each SSC. In one embodiment, the rising control pulse generator can connect the negative input terminal (IN-) of the subtractor to the positive input terminal (IN+) of the linear amplifier, and can connect the positive input terminal (IN+) of the subtractor to the negative input terminal (IN-) of the linear amplifier. Conversely, the falling control pulse generator can connect the positive input terminal (IN+) of the subtractor to the positive input terminal (IN+) of the linear amplifier, and can connect the negative input terminal (IN-) of the subtractor to the negative input terminal (IN-) of the linear amplifier.

[0101] In one embodiment, the linear amplifier may first identify whether the power is rising or falling. Alternatively, whether the power is rising or falling may be identified by identifying a signal difference value by a rising control pulse generator or a falling control pulse generator.

[0102] In one embodiment, in the case of a power increase, the increase control pulse generator (e.g., a sensor or a subtractor of the increase control pulse generator) can identify the difference value between the envelope signal (hereinafter, the input signal) and the output feedback signal. Similarly, in the case of a power decrease, the decrease control pulse generator (e.g., a sensor or a subtractor of the decrease control pulse generator) can identify the difference value between the envelope signal and the output feedback signal.

[0103] In one embodiment, the rising control pulse generator or the falling control pulse generator may transmit the output of the subtractor, which is the identified difference value, to the comparator. The comparator may compare the difference value between the input signal and the feedback signal through a reference voltage (V_ref) having a predetermined value, and may generate an output pulse signal as an output value based on the comparison. In one embodiment, the output pulse signal may be generated by a unit (such as a control pulse generator or a PMOS / NMOS switch) arranged separately from the comparator.

[0104] According to one embodiment, for a rising control pulse generator, at least one output pulse signal for raising an output may be generated, and for a falling control pulse generator, at least one output pulse signal for lowering an output may be generated. The at least one output pulse signal thus generated may be applied to a switch block (e.g., a switch of an SSC) (606a, 606b) to control the gate of each transistor (605a, 605b) to turn on and off.

[0105] In one embodiment, the number of comparators may be determined based on the number of steps (or levels) required for the entire system, which is determined based on the size of the envelope signal. The number of output pulse signals may also be determined based on the number of one or more comparators determined in this manner.

[0106] According to one embodiment, in a rising sensing situation, at least one PMOS transistor of the output stage may be turned on in response to at least one pulse signal transmitted from switch (606a), or in a falling sensing situation, at least one NMOS transistor of the output stage may be turned on in response to at least one pulse signal transmitted from switch (606b).

[0107] According to one embodiment, in order to maximize the slew rate, the number of at least one transistor can be turned on to the maximum. Subsequently, at least one PMOS transistor or at least one NMOS transistor can be controlled to be sequentially turned off depending on the difference value of the signals according to the reference voltage (V_ref) applied to the comparator. Accordingly, the slew rate can be maximized while overshoot or undershoot can be minimized, and since the number of transistors is adaptively determined, stability including the PM value can also be optimized. In addition, since the PMOS transistor and the NMOS transistor can be controlled separately depending on the rising or falling situation, the standby current can be reduced by requiring only a smaller transistor size than when controlling the PMOS and NMOS simultaneously. Hereinafter, specific characteristics and effects of a linear amplifier according to various embodiments of the present disclosure will be described with reference to FIG. 7.

[0108] FIG. 7 illustrates a specific effect of a linear amplifier including a control unit for sensing a feedback signal according to embodiments of the present disclosure.

[0109] Referring to Fig. 7, the first conductor (701) shows the result of setting the value and size of the transistor of the output stage based on the requirements of the 6G system. When the size of the transistor is optimized, a high slew rate can be obtained, but the problem of overshoot or undershoot may occur. In addition, the slew rate can be expressed as a value of I (current) / C (capacitance), and as the size of the transistor increases, the value of g_m (e.g., transconductance) increases, so a large current value can be obtained. However, when it exceeds a critical value, a larger capacitance value can be derived, so the slew rate can decrease.

[0110] Referring to Fig. 7, the third conductor (705) shows the result of simultaneously controlling the PMOS transistor and NMOS transistor of the output stage. When controlling PMOS / NMOS transistors simultaneously in this way, the occurrence of overshoot or undershoot can be resolved, but in order to reduce the ripple pattern in this way, a larger transistor is required, and accordingly, the size of the capacitance arranged in the output stage inevitably increases, which may cause a problem of a lower slew rate.

[0111] Referring to FIG. 7, the second conductive line (703) illustrates the results obtained when using a linear amplifier according to various embodiments of the present disclosure. More specifically, the second conductive line (703) illustrates the output voltage when, in a rising sensing situation, a first output pulse signal (Out↑) is generated that controls the on / off of at least one PMOS transistor, and in a falling sensing situation, a second output pulse signal (Out↓) ​​is generated that controls the on / off of at least one NMOS transistor, according to embodiments of the present disclosure. In this way, by adjusting the transistors of PMOS or NMOS, the slew rate can be optimized, while at the same time, PM can be secured to reduce ripple pattern phenomena such as overshoot or undershoot.

[0112] TR size of Class-AB amplifier W*F*M [um]Slew Rate[MV / s]I_q[mA]GBW[MHz]PM[°]TR size ↑withoutSSCPMOS: 28u*15*4089018320075NMOS: 10u*15*25withSSCPMOS: 28u*15*18152010747060NMOS: 10u*15*15

[0113] Table 1 described above illustrates an example of important indicator values ​​derived when simultaneously controlling PMOS / NMOS transistors, such as the third conductor (705), and when using the SSC according to embodiments of the present disclosure, such as the second conductor (703). According to one embodiment, among the sizes of TRs in Table 1 described above, W may represent width, F may represent the number of fingers, and M may represent a multiplier.

[0114] In general, based on the Sine Wave (0.2-3.0V Range), the required slew rate value for a band of 100 MHz or more may be 700 MV / s, and the required slew rate value for a band of 200 MHz or more may be 1400 MV / s.

[0115] Referring to Table 1, in the case of the third conductor (705), the PM value can be appropriately secured to solve the problem of overshoot or undershoot, but the slew rate value required in the high frequency band described above may not be satisfied. However, in the case of the second conductor (703) according to the embodiments of the present disclosure, the value of GBW having an open loop characteristic indicating the operating speed of the linear amplifier can cover a signal bandwidth of 200 MHz or more, and while the PM is secured, an improved slew rate value can be derived, and in addition, the rising situation and the falling situation can be individually managed / regulated to derive a result in which only a small standby current is generated.

[0116] FIG. 8A illustrates an example of an operational flow for improving the efficiency of a power amplifier through sensing of a feedback signal according to embodiments of the present disclosure. More specifically, FIG. 8A illustrates examples of various operations (810, 820) of a linear amplifier including an SSC control unit according to various embodiments of the present disclosure described above.

[0117] Referring to the operation flow (810) of the first type of the linear amplifier, according to one embodiment, a linear amplifier may obtain an envelope signal (e.g., an input signal) and a feedback signal obtained by performing linear amplification thereon. Here, in order to minimize oscillation of the linear amplifier, the feedback signal may include a negative feedback signal.

[0118] According to one embodiment, the SSC control unit (hereinafter, interchangeably referred to as SSC or control unit, etc.) connected to the linear amplifier can sense the difference between the input signal and the feedback signal. According to one embodiment, the SSC can include a rising SSC (e.g., a rising control pulse generator) and a falling SSC (e.g., a falling control pulse generator), and in the case of a rising situation, a sensor (or subtractor) (811a) of the rising SSC can identify a difference value between the input signal (e.g., applied as IN- in the case of a rising situation) and the feedback signal (e.g., applied as IN+ in the case of a rising situation), and in the case of a falling situation, a sensor (or subtractor) (811b) of the falling SSC can identify a difference value between the input signal and the feedback signal. According to one embodiment, although not shown, the linear amplifier may further include a separate block controlled to identify a rising situation or a falling situation based on the acquired input signal and feedback signal.

[0119] According to one embodiment, based on the difference value between the identified input signal and the feedback signal, a plurality of comparison units (e.g., comparators, comparators, etc.) (813a, 813b) may each generate an output pulse for controlling the on / off of the transistor. According to one embodiment, the number of the plurality of comparison units may be determined based on the steps (or levels) required for the entire system according to the size of the envelope signal.

[0120] According to one embodiment, the output pulses generated by the plurality of comparison units can be input to the plurality of switches (or controllers) (815a, 815b), and the plurality of switches can transmit a control voltage to control the number of transistors corresponding to each of them based on the control voltage. For example, the plurality of switches can transmit a control signal to the output stage for controlling at least one PMOS transistor or NMOS transistor to turn on and off, thereby adjusting the number of each transistor. According to one embodiment, although FIG. 8A illustrates that the plurality of switches exist separately, alternatively, even if there is no physical unit for separate transistor switching, the output pulses by the plurality of comparison units (813a, 813b) or the control signals therefor can be directly transmitted to the output stage, so that the operations of each transistor can be controlled.

[0121] Referring to the operation flow (820) of the first-second type, according to one embodiment, the linear amplifier may obtain an envelope signal (e.g., an input signal) and a feedback signal obtained by performing linear amplification thereon. Here, in order to minimize oscillation of the linear amplifier, the feedback signal may include a negative feedback signal.

[0122] According to one embodiment, the SSC control unit (hereinafter, interchangeably referred to as SSC or control unit, etc.) connected to the linear amplifier can sense the difference between the input signal and the feedback signal. According to one embodiment, the SSC can include a rising SSC (e.g., a rising control pulse generator) and a falling SSC (e.g., a falling control pulse generator), and in the case of a rising situation, a sensor (or subtractor) (821a) of the rising SSC can identify a difference value between the input signal (e.g., applied as IN- in the case of a rising situation) and the feedback signal (e.g., applied as IN+ in the case of a rising situation), and in the case of a falling situation, a sensor (or subtractor) (821b) of the falling SSC can identify a difference value between the input signal and the feedback signal. According to one embodiment, although not shown, the linear amplifier may further include a separate block controlled to identify a rising situation or a falling situation based on the acquired input signal and feedback signal.

[0123] According to one embodiment, based on the difference value between the identified input signal and the feedback signal, the comparison unit (e.g., comparator, comparator, etc.) (823a, 823b) can generate an output pulse for controlling the on / off of the transistor, respectively. According to one embodiment, the operation flow (820) of the first-second type includes an operation for performing modulation on the pulse width, so that the amplitude of the signal required for the entire system can be covered depending on the size of the envelope signal by performing only the operation of a single comparison unit.

[0124] According to one embodiment, the output pulse generated by the comparison unit can be transmitted to a pulse amplitude modulator (825a, 825b), and the pulse amplitude modulator (825a, 825b) can modulate the amplitude of the output pulse according to each SSC. For example, the pulse amplitude modulator can perform modulation to increase the length of the output pulse signal, thereby enabling the on / off control of the transistor with only a single pulse signal, thereby reducing unnecessary overhead and power waste.

[0125] According to one embodiment, the output pulse modulated by the pulse amplitude modulator (825a, 825b) can be input to the switch (or controller) (827a, 827b), and the switch can transmit a control voltage to control the corresponding transistor based on the control voltage. Here, the switch can be a single unit for each SSC or transistor. For example, the switch can transmit a control signal to the output stage for controlling at least one PMOS transistor or NMOS transistor to turn on and off, thereby adjusting the number of each transistor. According to one embodiment, although FIG. 8A illustrates that the switch exists separately, even if there is no physical unit for separate transistor switching, the modulated output pulse by the pulse amplitude modulator (825a, 825b) or the control signal therefor can be directly transmitted to the output stage, so that the operations of each transistor can be controlled.

[0126] According to various embodiments of the present disclosure, the types of operation flows illustrated in the above-described FIG. 8A are merely examples and are not limited thereto, and additions, modifications, or deletions of various operations and structures described in FIGS. 5 to 7 may be further made. For example, various embodiments of the present disclosure may further include some of the various linear amplifier structures of the above-described FIGS. 4A to 4D, and may further include at least one of a passive element for a negative feedback network, at least one element for Miller compensation, or a circuit element for SRE to operate together.

[0127] FIG. 8B illustrates another example of an operational flow for improving the efficiency of a power amplifier through sensing of a feedback signal according to embodiments of the present disclosure. More specifically, FIG. 8B illustrates another example of various operations (830, 840) of a linear amplifier including an SSC control unit according to various embodiments of the present disclosure described above.

[0128] Referring to the operation flow (830) of the second type 1, according to one embodiment, the linear amplifier may obtain an envelope signal (e.g., an input signal) and a feedback signal obtained by performing linear amplification thereon. Here, in order to minimize oscillation of the linear amplifier, the feedback signal may include a negative feedback signal.

[0129] In one embodiment, an SSC control unit (hereinafter, interchangeably referred to as SSC or control unit, etc.) connected to a linear amplifier can sense the difference between an input signal and a feedback signal. In one embodiment, the SSC can include a single SSC regardless of a rising or falling situation, and a sensor (or subtractor) (831) of the SSC can identify the difference value between the input signal and the feedback signal based on the difference between the input signal and the feedback signal.

[0130] According to one embodiment, based on the difference value between the identified input signal and the feedback signal, a plurality of comparison units (e.g., comparators, comparators, etc.) (833) may each generate an output pulse for controlling the on / off of the transistor. According to one embodiment, the number of the plurality of comparison units may be determined based on the steps (or levels) required for the entire system according to the size of the envelope signal.

[0131] According to one embodiment, at least one generated output pulse may be input to a rising / falling classifier (hereinafter, “classifier”) (835). According to one embodiment, the classifier (835) may also obtain a difference value between an input signal identified by a sensor (831) of the SSC and a feedback signal. Based on the obtained difference value, the classifier (835) may identify whether the difference between the input signal and the feedback signal is a rising or falling situation (or an amount of change in the difference value). The classifier (835) may process the input at least one output pulse based on the identified situation. According to one embodiment, when the classifier (835) identifies a rising situation based on the difference value, the classifier (835) may transmit signals for at least one output pulse to at least one PMOS switch (or controller) (837a). In one embodiment, if the classifier identifies a falling condition based on the difference value, it can transmit signals for at least one output pulse to at least one NMOS switch (or controller) (837b).

[0132] According to one embodiment, the output pulse transmitted from the rising / falling classifier (835) may be input to a plurality of switches (or controllers) (837a, 837b), and the plurality of switches may transmit a control voltage to control the number of transistors corresponding to each of them based on the control voltage. For example, the plurality of switches may transmit a control signal to the output stage for controlling the turning on and off of at least one PMOS transistor or NMOS transistor, thereby adjusting the number of transistors of each of them. According to one embodiment, although FIG. 8b illustrates that the plurality of switches exist separately, alternatively, even if there is no physical unit for separate transistor switching, the output pulse processed by the plurality of comparison units (833) or the classifier (835) or the control signal corresponding thereto may be directly transmitted to the output stage, so that the operations of each transistor may be controlled.

[0133] Referring to the operation flow (840) of the second type of the second embodiment, the linear amplifier may obtain an envelope signal (e.g., an input signal) and a feedback signal obtained by performing linear amplification thereon. Here, in order to minimize oscillation of the linear amplifier, the feedback signal may include a negative feedback signal.

[0134] In one embodiment, an SSC control unit (hereinafter, interchangeably referred to as SSC or control unit, etc.) connected to a linear amplifier can sense the difference between an input signal and a feedback signal. In one embodiment, the SSC can include a single SSC regardless of a rising or falling situation, and a sensor (or subtractor) (841) of the SSC can identify the difference value between the input signal and the feedback signal based on the difference between the input signal and the feedback signal.

[0135] According to one embodiment, based on the difference value between the identified input signal and the feedback signal, the comparison unit (e.g., comparator, comparator, etc.) (843) can generate an output pulse for controlling the on / off of each transistor. According to one embodiment, the operation flow (840) of the second type includes an operation for performing modulation on the pulse width, so that the amplitude of the signal required for the entire system can be covered depending on the size of the envelope signal by performing only the operation of a single comparison unit.

[0136] According to one embodiment, the output pulse generated by the comparison unit can be transmitted to a pulse amplitude modulator (845), which can modulate the amplitude of the output pulse according to each SSC. For example, the pulse amplitude modulator can perform modulation to increase the length of the output pulse signal, thereby enabling the on / off control of the transistor with only a single pulse signal, thereby reducing unnecessary overhead and power waste.

[0137] According to one embodiment, the modulated at least one output pulse may be input to a rising / falling classifier (hereinafter, “classifier”) (847). According to one embodiment, the classifier (847) may also obtain a difference value between the input signal identified by the sensor (841) of the SSC and the feedback signal. Based on the obtained difference value, the classifier (847) may identify whether the difference between the input signal and the feedback signal is a rising or falling situation (or an amount of change in the difference value). The classifier (847) may process the input at least one output pulse based on the identified situation. According to one embodiment, when the classifier (847) identifies a rising situation based on the difference value, the classifier (847) may transmit signals for the at least one output pulse to at least one PMOS switch (or controller) (849a). In one embodiment, if the classifier identifies a falling condition based on the difference value, it can transmit signals for at least one output pulse to at least one NMOS switch (or controller) (849b).

[0138] According to one embodiment, the output pulse transmitted from the rising / falling classifier (847) may be input to a switch (or controller) (849a, 849b), and the switch may transmit a control voltage to control the corresponding transistor based on the control voltage. Here, the switch may be a single unit for each transistor. For example, the switch may transmit a control signal to the output stage for controlling at least one PMOS transistor or NMOS transistor to turn on and off, thereby adjusting the number of each transistor. According to one embodiment, although FIG. 8b illustrates that the switch exists separately, even if there is no physical unit for separate transistor switching, the output pulse modulated by the pulse amplitude modulator (845) or processed by the classifier (847) or the control signal accordingly may be directly transmitted to the output stage, so that the operations of each transistor may be controlled.

[0139] According to various embodiments of the present disclosure, the types of operation flows illustrated in the above-described FIG. 8b are merely examples and are not limited thereto, and additions, modifications, or deletions of various operations and structures described in FIGS. 5 to 7 may be further made. For example, various embodiments of the present disclosure may further include some of the various linear amplifier structures of the above-described FIGS. 4a to 4d, and may further include at least one of a passive element for a negative feedback network, at least one element for Miller compensation, or a circuit element for SRE to operate together.

[0140] It should be noted that the aforementioned configuration diagrams, examples of control / data signal transmission methods, examples of operational procedures, and configuration diagrams are not intended to limit the scope of the present disclosure. For example, not all components, entities, or operational steps described in the embodiments of the present disclosure should be construed as essential components for implementing the disclosure, and implementations may be made without detracting from the essence of the disclosure even if only some components are included. Furthermore, each embodiment may be combined and operated as needed. For example, parts of the methods proposed in the present disclosure may be combined to operate network entities and terminals.

[0141] The operations of the base station, terminal, or electronic device described above can be realized by providing a memory device storing the corresponding program code in any component within the base station or terminal device. For example, the control unit of the base station or terminal device can execute the operations described above by reading and executing the program code stored in the memory device using a processor or CPU (Central Processing Unit).

[0142] The various components and modules of the entity, base station or terminal device described in this specification may be operated using hardware circuits, such as logic circuits based on complementary metal oxide semiconductors, firmware, software and / or hardware and firmware and / or software embedded in a machine-readable medium. For example, various electrical structures and methods may be implemented using electrical circuits such as transistors, logic gates and application-specific semiconductors.

[0143] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors within an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure.

[0144] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage device, compact disc ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage device, magnetic cassette. Or, they may be stored in memories composed of some or all of these combinations. In addition, each configuration memory may be included in multiple numbers.

[0145] Additionally, the program may be stored in an attachable storage device that is accessible via a communication network such as the Internet, an intranet, a local area network (LAN), a wide local area network (WLAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device performing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device performing an embodiment of the present disclosure.

[0146] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.

[0147] While the detailed description of the present disclosure has described specific embodiments, it should be understood that various modifications are possible without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be determined not only by the scope of the claims described below but also by equivalents thereof. For example, it will be apparent to those skilled in the art to which the present disclosure pertains that other modifications based on the technical idea of ​​the present disclosure are possible. In addition, the respective embodiments may be combined and operated as needed. For example, parts of the methods proposed in the present disclosure may be combined to operate a base station and a terminal. In addition, although the above embodiments have been presented based on a 5G, NR system, other modifications based on the technical idea of ​​the above embodiments may be implemented in other systems such as LTE, LTE-A, and LTE-A-Pro systems.

[0148] While the detailed description of this disclosure has described specific embodiments, it should be understood that various modifications are possible without departing from the scope of this disclosure. Therefore, the scope of this disclosure should not be limited to the described embodiments, but should be defined not only by the scope of the claims described below, but also by equivalents thereof.

Claims

1. In a wireless communication system, a linear amplifier is Transceiver; and Including a controller coupled with the above transceiver, The above controller, Obtaining a first signal including an input signal and a second signal including a feedback signal of the linear amplifier, Identify the difference value between the first signal and the second signal, Generating at least one output pulse based on the above difference value, and A linear amplifier configured to transmit a third signal controlling the operation of at least one first transistor or at least one second transistor based on at least one output pulse.

2. In claim 1, the controller, further configured to modulate the amplitude of at least one output pulse; A linear amplifier wherein the third signal is determined based on at least one of the modulated output pulses.

3. In claim 1, the controller, Further configured to identify a change in a difference value between the first signal and the second signal based on at least one output pulse generated above, The third signal is a linear amplifier determined according to the identified change amount.

4. In claim 1, A linear amplifier wherein the number of the at least one first transistor or the number of the at least one second transistor is determined based on a difference value between the first signal and the second signal.

5. In claim 1, wherein at least one of the first transistors comprises a PMOS (positive metal oxide semiconductor) transistor, and A linear amplifier wherein at least one of the second transistors comprises a negative metal oxide semiconductor (NMOS) transistor.

6. In claim 1, The feedback signal of the above linear amplifier is a linear amplifier including a negative feedback signal.

7. In claim 1, the controller, Further configured to identify the amount of change in the difference value between the first signal and the second signal, If the above change amount is positive, the at least one output pulse is generated by the first control unit, or A linear amplifier in which at least one output pulse is generated by a second control unit when the above change amount is negative.

8. In claim 7, If at least one output pulse is generated by the first control unit, the third signal is used to control the at least one first transistor to operate, or A linear amplifier, wherein the third signal is used to control the at least one second transistor to operate when the at least one output pulse is generated by the second control unit.

9. In claim 7, The first control unit comprises a negative input terminal to which the first signal is transmitted and a positive input terminal to which the second signal is transmitted, and The second control unit is a linear amplifier including a positive input terminal to which the first signal is transmitted and a negative input terminal to which the second signal is transmitted.

10. In claim 7, the first control unit or the second control unit, A sensor for sensing the above change amount; and A linear amplifier comprising a comparator unit for generating at least one output pulse.

11. In a wireless communication system, a method performed by a linear amplifier, A step of obtaining a first signal including an input signal and a second signal including a feedback signal of the linear amplifier; A step of identifying a difference value between the first signal and the second signal; generating at least one output pulse based on the difference value; and A method comprising the step of transmitting a third signal controlling the operation of at least one first transistor or at least one second transistor based on at least one output pulse.

12. In claim 11, the method comprises: further comprising a step of modulating the amplitude of at least one output pulse; A method wherein the third signal is determined based on at least one of the modulated output pulses.

13. In claim 11, the method comprises: Further comprising a step of identifying a change in a difference value between the first signal and the second signal based on at least one output pulse generated above, The third signal is determined according to the identified change amount.

14. In claim 11, A method wherein the number of at least one first transistor or the number of at least one second transistor is determined based on a difference value between the first signal and the second signal.

15. In claim 11, wherein at least one of the first transistors comprises a PMOS (positive metal oxide semiconductor) transistor, and A method wherein at least one of the second transistors comprises a negative metal oxide semiconductor (NMOS) transistor.

Images