Light-emitting element drive device, light-emitting system, backlight, and display device

Abstract

A light-emitting element drive device (1) includes: a voltage monitor unit (12) configured to monitor a voltage of a connection terminal (CH) for each switch (SW) that was turned on and to hold a monitor result; and a control signal generation unit (13) configured to update a control signal (Ifb) used for feedback control of a power supply voltage (Vout) in a power supply circuit (3) on the basis of the held monitor result, when the monitor result is held for all light-emitting units (LL).

Description

Light-emitting element driving device, light-emitting system, backlight, and display device

[0001] The present disclosure relates to a light emitting element driving device.

[0002] Conventionally, Patent Document 1 discloses a light-emitting element driving device that has multiple channels of connection terminals to be connected to a light-emitting unit consisting of one or more light-emitting elements, and is configured to be able to supply drive current to the light-emitting unit via the connection terminals for each channel.

[0003] International Publication No. 2022 / 153668

[0004] [Summary] A power supply voltage output from a power supply circuit is commonly applied to the light-emitting units of the multiple channels. The light-emitting element drive device includes an FB terminal for supplying a feedback signal to the power supply circuit, and a control block having a function of adjusting the power supply voltage via the FB terminal based on the voltage of the connection terminal of each channel.

[0005] An object of the present disclosure is to provide a light emitting element driving device that can appropriately control the power supply voltage supplied to a light emitting unit.

[0006] A light-emitting element driving device according to one aspect of the present disclosure is a light-emitting element driving device used in a light-emitting system in which at least one channel of a light-emitting unit including at least one light-emitting element is provided, and a plurality of groups each consisting of the light-emitting unit of at least one channel are provided, and the light-emitting element driving device comprises: a connection terminal configured to be connectable to the low potential end of the light-emitting unit of at least one channel, a switch control unit configured to be able to control the on / off of a switch connected between the high potential end of the light-emitting unit in each of the groups and an application terminal of a power supply voltage output from a power supply circuit, a current driver configured to supply a driving current to the light-emitting unit via the connection terminal, a voltage monitoring unit configured to monitor the voltage of the connection terminal for each of the switches that is turned on and hold the monitoring results, and a control signal generation unit configured to update a control signal used for feedback control of the power supply voltage in the power supply circuit based on the held monitoring results when the monitoring results for all the light-emitting units are held.

[0007] FIG. 1 is a diagram illustrating a configuration of a light-emitting system according to an embodiment of the present disclosure. FIG. 2 is a timing chart illustrating an example of time-division light-emitting operation. FIG. 3 is a diagram illustrating a first embodiment of a configuration related to feedback control in a light-emitting element driving device. FIG. 4 is a diagram illustrating a circuit configuration of a constant current circuit. FIG. 5 is a diagram illustrating a configuration related to feedback control according to a modified example of the first embodiment. FIG. 6 is a diagram illustrating a second embodiment of a configuration related to feedback control. FIG. 7 is a diagram illustrating a third embodiment of a configuration related to feedback control. FIG. 8 is a diagram illustrating a fourth embodiment of a configuration related to feedback control. FIG. 9 is a diagram illustrating an example of the configuration of a liquid crystal display device. FIG. 10 is a diagram illustrating an example of an in-vehicle display. FIG. 11 is a diagram illustrating a configuration of a light-emitting system according to a first comparative example. FIG. 12 is a diagram illustrating a configuration of a light-emitting system according to a second comparative example.

[0008] DETAILED DESCRIPTION Exemplary embodiments of the present disclosure will now be described with reference to the drawings.

[0009] <First Comparative Example> Before describing the embodiments of the present disclosure, a comparative example will be described for comparison. Fig. 11 is a diagram showing the configuration of a light-emitting system SYS11 according to the first comparative example. The light-emitting system SYS11 includes a light-emitting element driving device 101, a power supply circuit 201, and light-emitting units LL1 to LLn.

[0010] The light-emitting element driving device 101 is a semiconductor device configured to be able to drive light-emitting units LL1 to LLn of multiple channels (n channels). Each of the light-emitting units LL1 to LLn includes one or more light-emitting elements. In the example of FIG. 11, the light-emitting elements are LEDs (light-emitting diodes). In the following description, the light-emitting elements are described as LEDs as an example. In other words, the light-emitting element driving device functions as an LED driving device.

[0011] The light-emitting element driving device 101 has connection terminals CH1 to CHn as external terminals for establishing electrical connection with the outside. The cathodes of the light-emitting units LL1 to LLn are connected to the connection terminals CH1 to CHn, respectively. The light-emitting element driving device 101 has current drivers DRV1 to DRVn. The current drivers DRV1 to DRVn are connected to the connection terminals CH1 to CHn, respectively. The current drivers DRV1 to DRVn generate drive currents that flow to the light-emitting units LL1 to LLn, respectively, via the connection terminals CH1 to CHn, respectively.

[0012] The power supply circuit 201 includes a DC / DC converter 201A and feedback resistors R11 and R12. The DC / DC converter 201A converts an input voltage, which is a DC voltage (not shown), into a power supply voltage (output voltage) Vout, which is also a DC voltage. The feedback resistors R11 and R12 are connected in series between an application terminal of the power supply voltage Vout and a ground terminal (an application terminal to which ground potential is applied), and generate a feedback voltage Vfb by dividing the power supply voltage Vout. The DC / DC converter 201A controls the power supply voltage Vout so that the feedback voltage Vfb matches a predetermined reference voltage. The power supply voltage Vout is applied in common to the anodes of the light-emitting units LL1 to LLn.

[0013] The power supply voltage Vout is controlled to a fixed voltage by the power supply circuit 201A. Here, the Vf (forward voltage) of each of the light-emitting units LL1 to LLn has a temperature characteristic that changes with temperature, and even at the same temperature, there is variation in the voltage value. The higher the temperature, the lower the Vf. Note that the Vf of the light-emitting unit LL is determined by the Vf of the light-emitting elements (LEDs) that make up the light-emitting unit LL. For example, if the light-emitting unit LL is configured by connecting four light-emitting elements in series, the Vf of the light-emitting unit LL is Vf = 4 × Vf_LED, where Vf_LED is the Vf of the light-emitting element.

[0014] The set value of the power supply voltage Vout is set taking into consideration the set value Vset of each terminal voltage of the connection terminals CH1 to CHn, the temperature characteristics of Vf, and the above-mentioned variations. Specifically, assuming that the maximum value of Vf is Vf_Max, Vout is set to be equal to or greater than Vf_Max+Vset. For example, in the case where the light-emitting unit LL is configured with four light-emitting elements connected in series as described above, if the maximum value of Vf_LED is 3.3 V, then Vf_Max = 3.3 × 4, and if Vset = 0.9 V, then Vout is set to be equal to or greater than 3.3 × 4 + 0.9 = 14.1 V.

[0015] However, because the power supply voltage Vout is a fixed voltage, if the temperature rises and Vf drops, the terminal voltage of the connection terminals CH1 to CHn rises, resulting in increased loss and heat generation in the light-emitting element driving device 101. For example, in the above example, if the high temperature causes Vf_Max = 2.7 x 4 = 10.8 V, the terminal voltage of the connection terminals CH1 to CHn becomes 14.1 - 10.8 = 3.3 V, and assuming a drive current of 50 mA and 24 channels, the loss is 3.3 V x 50 mA x 24 = 3.96 W. Note that this assumes that Vf is equal between channels. However, in reality, variations in Vf between channels also affect loss.

[0016] 12 is a diagram showing the configuration of a light emitting system SYS12 according to a second comparative example. The light emitting system SYS12 differs from the first comparative example (FIG. 11) in the light emitting element driving device 102.

[0017] The light emitting element driving device 102 differs from the light emitting element driving device 101 (Figure 11) of the first comparative example in that it has an FB (feedback) control unit 102A, an FB current generation unit 102B, and an FB terminal as an external terminal.

[0018] The FB control unit 102A monitors the terminal voltages of the connection terminals CH1 to CHn and issues a current command value to the FB current generation unit 102B. The FB current generation unit 102B is configured as a constant current circuit and controls the FB current Ifb to the current command value. The FB terminal is connected to a node N20 to which feedback resistors R11 and R12 are connected. The FB current Ifb is extracted from the node N20 and flows through the FB current generation unit 102B via the FB terminal. A feedback voltage Vfb is generated in accordance with the FB current Ifb.

[0019] The FB control unit 102A constantly monitors the terminal voltages of the connection terminals CH1 to CHn and issues commands to the FB current generation unit 102B, and if all of the terminal voltages are sufficient, it lowers the current command value and reduces the power supply voltage Vout.On the other hand, if any of the terminal voltages is insufficient, it raises the current command value and increases the power supply voltage Vout.

[0020] Through this control, the terminal voltage of each of the connection terminals CH1 to CHn is controlled to the set value Vset. Therefore, the power supply voltage Vout = Vset + Vf, and Vout changes with temperature. For example, under the condition that Vf is equal between channels, Vset = 0.9 V, the drive current = 50 mA, and the number of channels = 24, the loss is 0.9 V x 50 mA x 24 = 1.08 W, regardless of the temperature characteristics. This allows for a reduction in loss compared to the first comparative example.

[0021] However, in the second comparative example, the FB control unit 102A constantly monitors the terminal voltages of the connection terminals CH1 to CHn and issues commands to the FB current generation unit 102B, and if the number of channels is large, there is a risk that ripples will occur in the power supply voltage Vout, causing instability.

[0022] <Configuration of Light-Emitting System> In view of the above-described problems, the following embodiment of the present disclosure is implemented: Fig. 1 is a diagram showing the configuration of a light-emitting system SYS according to an embodiment of the present disclosure.

[0023] The light emitting system SYS includes a light emitting element driving device 1, an MCU (Micro Controller Unit) 2 that controls the light emitting element driving device 1, a plurality of light emitting units LL that are driven by the light emitting element driving device 1, and a power supply circuit 3 that outputs a power supply voltage Vout. The power supply voltage Vout is a positive DC voltage. The light emitting element driving device 1 has a terminal VINSW that receives the power supply voltage Vout as an external terminal, and is driven based on the power supply voltage Vout. Note that a current setting resistor R ＩＳＥＴ are also included in the components of the light emitting system SYS.

[0024] When the multiple light-emitting units provided in the light-emitting system SYS are not distinguished from one another, each light-emitting unit is referred to as a light-emitting unit LL. Each light-emitting unit LL is composed of one or more light-emitting elements (LEDs). For example, each light-emitting unit LL is composed of a series circuit of multiple light-emitting elements. However, each light-emitting unit LL may be composed of a parallel circuit of multiple light-emitting elements, or a single light-emitting unit LL may include a combination of a series circuit of multiple light-emitting elements and a parallel circuit of multiple light-emitting elements. Furthermore, one light-emitting unit LL may be composed of a single light-emitting element. Each light-emitting unit LL has a high-potential end (anode) and a low-potential end (cathode), and each light-emitting element forming the light-emitting unit LL has a forward direction extending from the high-potential end toward the low-potential end.

[0025] Here, it is assumed that a total of (24 × 8) light-emitting units LL are provided in the light-emitting system SYS as the plurality of light-emitting units LL, and the total (24 × 8) light-emitting units LL are represented by the symbols "LL[1,1] to LL[24,8]." Any one of the light-emitting units LL[1,1] to LL[24,8] is expressed as light-emitting unit LL[i,j], where i is an integer that satisfies "1≦i≦24" and j is an integer that satisfies "1≦j≦8." In the light-emitting system SYS and the light-emitting element drive device 1, first to 24th channels are set, and light-emitting units LL[i,1] to LL[i,8] belong to the i-th channel. Furthermore, light-emitting units LL[1,1] to LL[24,8] can be classified into first to eighth groups, and light-emitting units LL[1,j] to LL[24,j] belong to the j-th group.

[0026] The light-emitting element driving device 1 is provided with connection terminals CH[1] to CH

[24] equal to the total number of channels. The connection terminal CH[i] belongs to the i-th channel. The connection terminal CH[i] is a light-emitting unit connection terminal to which the light-emitting units LL[i,1] to LL[i,8] belonging to the i-th channel should be connected. When the connection terminals CH[1] to CH

[24] are not to be distinguished from one another, each connection terminal may be referred to as a connection terminal CH.

[0027] The light-emitting system SYS is provided with switches SW[1] to SW[8] equal to the total number of groups. Switch SW[j] corresponds to the jth group. One end of each of the switches SW[1] to SW[8] is commonly connected to the application terminal of the power supply voltage Vout. The other end of the switch SW[j] is commonly connected to the high-potential ends of the light-emitting units LL[1,j] to LL[24,j] belonging to the jth group. The low-potential ends of the light-emitting units LL[i,1] to LL[i,8] belonging to the i-th channel are commonly connected to a wiring 8[i]. The wiring 8[i] is connected to a connection terminal CH[i].

[0028] The light emitting element driving device 1 includes a driver block 10 and a control block 11. The driver block 10 includes current drivers DRV[1] to DRV

[24] . The current driver DRV[i] belongs to the i-th channel. That is, the driver block 10 includes a current driver for each channel. When the 24 current drivers provided for each channel are not to be distinguished from one another, each current driver may be referred to as a current driver DRV. The current drivers DRV[1] to DRV

[24] have the same configuration and function. In each channel, the current driver DRV[i] includes a constant current circuit, and in normal light emitting operation, under the control of the control block 11, a drive current I flows from the connection terminal CH[i] toward the ground end. ＬＥＤ [i] flows through the connection terminal CH[1]. ＬＥＤ When [1] flows through the light emitting unit LL[1,j], the light emitting unit LL[1,j] emits light, and a driving current I ＬＥＤ When [2] flows through the light emitting unit LL[2,j], the light emitting unit LL[2,j] emits light. The same applies to other drive currents and other light emitting units.

[0029] The control block 11 comprehensively controls the operation of each component within the light-emitting element driving device 1. The light-emitting element driving device 1 is provided with terminals GC[1] to GC[8] as external terminals connected to the control terminals of the switches SW[1] to SW[8]. The control block 11 can individually turn the switches SW[1] to SW[8] on or off via the terminals GC[1] to GC[8]. For example, a P-channel MOSFET (metal-oxide-semiconductor field-effect transistor) can be used as each of the switches SW[1] to SW[8]. In this case, the power supply voltage Vout is supplied to the source of each MOSFET serving as the switches SW[1] to SW[8], the drain of the MOSFET serving as the switch SW[j] is commonly connected to the high-potential terminal of each of the light-emitting units LL[1,j] to LL[24,j], and the control block 11 controls the gate voltage of each MOSFET serving as the switches SW[1] to SW[8] through terminals GC[1] to GC[8]. Furthermore, during normal light-emitting operation, the control block 11 has the function of adjusting the power supply voltage Vout output from the power supply circuit 3 through terminal FB (feedback terminal) based on the terminal voltages of the connection terminals CH[1] to CH

[24] . Such feedback control will be described in detail later.

[0030] The light-emitting element driving device 1 and the MCU 2 are capable of two-way communication via a communication wiring. This two-way communication allows the MCU 2 to send any command to the light-emitting element driving device 1, and the light-emitting element driving device 1 to send a response signal to the received command to the MCU 2. Any communication method may be used between the light-emitting element driving device 1 and the MCU 2, and may be, for example, one that complies with SPI (Serial Peripheral Interface).

[0031] The light emitting element driving device 1 is also provided with a terminal GND and a terminal ISET as external terminals. The terminal GND is connected to the ground terminal. A current setting resistor R ＩＳＥＴ A current setting resistor R ＩＳＥＴ One end of the resistor R is connected to the terminal ISET. ＩＳＥＴThe other end of the control block 11 is connected to the ground terminal. ＩＳＥＴ Based on the value of and the command from MCU2, the drive current I ＬＥＤ [1] to I ＬＥＤ The size of

[24] can be set individually.

[0032] A time-division light-emitting operation, which is one type of normal light-emitting operation, will be described with reference to Fig. 2. Fig. 2 is a timing chart showing an example of the time-division light-emitting operation. In Fig. 2, from the top to bottom, there are a synchronization signal VSYNC, gate voltages PGATE1 to PGATE8 of the switches SW[1] to SW[8], and a drive current I ＬＥＤ [1] to I ＬＥＤ 24] and DAC (Digital-to-Analog Converter) data FBDAC. The DAC data FBDAC will be described later. The switch SW is configured with a P-channel MOSFET.

[0033] In the time-division light emission operation, a unit period Tu having a predetermined length is set. The unit period Tu is set repeatedly at a predetermined cycle. Furthermore, each unit period Tu is divided into eight parts to set a first division period T1 to an eighth division period T8. In the control block 11, during each of the first division period T1 to the eighth division period T8, the gate voltages PGATE1 to PGATE8 are set to a low level, and the switches SW[1] to SW[8] are set to an on state. That is, during the jth division period, of the switches SW[1] to SW[8], only the switch SW[j] is set to an on state, and the other seven switches are set to an off state (the gate voltage PGATE is set to a high level). Therefore, during the jth division period, the power supply voltage Vout is supplied only to the high potential end of the light-emitting units LL[1,j] to LL[24,j] of the jth group out of the first to eighth groups via the switch SW[j], and only the light-emitting units LL[1,j] to LL[24,j] are able to emit light.

[0034] The control block 11 PWM-drives the current driver DRV for each channel in each of the first to eighth divided periods T1 to T8. PWM is an abbreviation for pulse width modulation. In the PWM drive in each divided period, a drive current IＬＥＤ The time width (in other words, the time length) during which the drive current I ＬＥＤ [1] to I ＬＥＤ The time width during which

[24] is supplied is individually PWM controlled. As a result, the corresponding light-emitting unit LL emits pulsed light in each divided period, and the average luminance of the total (24 x 8) light-emitting units LL is individually adjusted through the control of the time width.

[0035] For example, when a light-emitting block composed of light-emitting units LL[1,1] to LL[24,8] is used as a light source for a display panel (display screen) such as a liquid crystal display panel, the unit period Tu may be set in synchronization with a vertical synchronization signal externally supplied to the light-emitting element drive device 1. In this case, the unit period Tu is repeatedly set at the cycle of the vertical synchronization signal. The entire display area of ​​the display panel is then divided into multiple divided areas (e.g., 24 x 8 divided areas), and each light-emitting unit LL is assigned to each divided area. Then, by adjusting the light-emitting brightness of the corresponding light-emitting unit LL according to the brightness of the image to be displayed in each display area, local dimming (local light control) for the total number of divided areas is possible. Local dimming improves the contrast of the image and reduces power consumption.

[0036] Next, various embodiments will be described regarding feedback control of the power supply voltage Vout in the light-emitting element driving device 1 according to an embodiment of the present disclosure. Fig. 3 is a diagram showing a first embodiment of a configuration related to feedback control in the light-emitting element driving device 1.

[0037] 3, a voltage monitor unit 12 and an FB control signal generator 13 are provided in a control block 11 in the light-emitting element drive device 1. The voltage monitor unit 12 monitors the terminal voltages Vt[1] to Vt

[24] of the connection terminals CH[1] to CH

[24] and stores the monitoring results.

[0038] The voltage monitor unit 12 includes a minimum voltage determination unit 121 and a latch block 122. The minimum voltage determination unit 121 includes a minimum voltage selection unit 121A and a comparator 121B. The minimum voltage selection unit 121A selects the minimum voltage among the terminal voltages Vt[1] to Vt

[24] and outputs a minimum voltage Vmin. The comparator 121B compares the minimum voltage Vmin with a reference voltage Vref and outputs a comparison output Cp as the comparison result. The minimum voltage Vmin is applied to the inverting input terminal (-) of the comparator 121B, and the reference voltage Vref is applied to the non-inverting input terminal (+). As a result, if the minimum voltage Vmin is equal to or greater than the reference voltage Vref, the comparison output Cp is low level, and if the minimum voltage Vmin is lower than the reference voltage Vref, the comparison output Cp is high level. The reference voltage Vref corresponds to the set value of the terminal voltages Vt[1] to Vt

[24] .

[0039] The latch block 122 has latch units LT[1] to LT[8]. The latch units LT[1] to LT[8] correspond to the first to eighth groups. The comparison output Cp is commonly input to the latch units LT[1] to LT[8]. Furthermore, switch signals SS[1] to SS[8] are input to each of the latch units LT[1] to LT[8]. The switch signals SS[1] to SS[8] are signals that indicate the on / off states of the switches SW[1] to SW[8], respectively. When the switch SW is in the on state, the switch signal SS is at an on level (e.g., a high level), and when the switch SW is in the off state, the switch signal SS is at an off level (e.g., a low level). In other words, when the gate signal PGATEj (FIG. 2) is at a low level, the switch signal SS[j] is at an on level, and when the gate signal PGATEj is at a high level, the switch signal SS[j] is at an off level.

[0040] The voltage monitor unit 12 also includes an AND circuit 123. The PWM signals Spwm2[1] to Spwm2

[24] are input to the AND circuit 123. The PWM signals Spwm2[1] to Spwm2

[24] correspond to the first to twenty-fourth channels. As shown in FIG. 1, current drivers DRV[1] to DRV

[24] are provided corresponding to the first to twenty-fourth channels. The current drivers DRV[1] to DRV

[24] are PWM-controlled by the PWM signals Spwm1[1] to Spwm1

[24] , respectively. The PWM signals Spwm2[1] to Spwm2

[24] are synchronized with the PWM signals Spwm1[1] to Spwm1

[24] , respectively. That is, when the PWM signals Spwm1[1] to Spwm1

[24] are each at a high level, the PWM signals Spwm2[1] to Spwm2

[24] are each at a high level, and when the PWM signals Spwm1[1] to Spwm1

[24] are each at a low level, the PWM signals Spwm2[1] to Spwm2

[24] are each at a low level. When the PWM signals Spwm1[1] to Spwm1

[24] are each at a high level, the current drivers DRV[1] to DRV

[24] supply drive currents, and when the PWM signals Spwm1[1] to Spwm1

[24] are each at a low level, the supply of drive currents by the current drivers DRV[1] to DRV

[24] is stopped. The PWM signals Spwm1[1] to Spwm1

[24] and the PWM signals Spwm2[1] to Spwm2

[24] may be the same signal or may be separate signals.

[0041] The FB control signal generation unit 13 includes an OR circuit 131, a DAC 132, and a constant current circuit 133. The outputs of the latch units LT[1] to LT[8] are input to the OR circuit 131. The OR circuit 131 takes the logical sum of the outputs of the latch units LT[1] to LT[8] and outputs the result as output OUT1 to the DAC 132. The DAC 132 sets DAC data (digital value) (FBDAC in FIG. 2) according to the output OUT1 of the OR circuit 131, converts the set DAC data into an analog voltage VA, and outputs it to the constant current circuit 133. In the example of FIG. 2, the DAC data FBDAC is, for example, 8-bit data. The DAC 132 also receives a synchronization signal VSYNC (FIG. 2), which will be described later.

[0042] The constant current circuit 133 generates a constant current, FB current Ifb, in response to an analog voltage VA serving as a current command value. The FB current Ifb flows via a terminal FB. FIG. 4 illustrates the circuit configuration of the constant current circuit 133. The constant current circuit 133 includes an error amplifier 133A, an output transistor 133B, and a resistor 133C. The analog voltage VA output from the DAC 132 is applied to a non-inverting input terminal (+) of the error amplifier 133A. The output terminal of the error amplifier 133A is connected to the gate of an output transistor 133B, which is an N-channel MOSFET. The source of the output transistor 133B is connected to one terminal of a resistor 133C, along with the inverting input terminal (-) of the error amplifier 133A. The other terminal of the resistor 133C is connected to ground. The drain of the output transistor 133B is connected to the terminal FB.

[0043] As shown in FIG. 4, the power supply circuit 3 (also shown in FIG. 1) includes a DC / DC converter 3A and feedback resistors R1 to R3. The feedback resistors R1 to R3 are connected in series between an application terminal for a power supply voltage Vout output from the DC / DC converter 3A and a ground terminal. Specifically, the application terminal for the power supply voltage Vout is connected to one end of the feedback resistor R1. The other end of the feedback resistor R1 is connected to one end of a feedback resistor R2 at a node N1. The other end of the feedback resistor R2 is connected to one end of a feedback resistor R3 at a node N2. The other end of the feedback resistor R3 is connected to the ground terminal. The node N1 is connected to a terminal FB. With this configuration, the FB current Ifb generated by the constant current circuit 133 in response to the analog voltage VA is drawn from the node N1 via the terminal FB. A feedback voltage Vfb is generated at the node N2 in response to the FB current Ifb. The DC / DC converter 3A controls the power supply voltage Vout so that the feedback voltage Vfb coincides with a predetermined reference voltage.

[0044] 3, each of the latch units LT[1] to LT[8] captures and holds the comparison output Cp when each of the switch signals SS[1] to SS[8] is at a high level and the output AOUT1 of the AND circuit 123 is at a high level. When each of the switch signals S[1] to S[8] is at a low level or when the output AOUT1 is at a low level, the captured signal is held. That is, when the switch SW[j] is in the on state and drive current is supplied to all channels from channel 1 to channel 24, the comparison output Cp is captured by the latch unit LT[j]. Because the comparison output Cp is a logic signal that can be at a high level or a low level, the signal held by the latch unit LT is also at a high level or a low level.

[0045] The signals captured and held in each of the latch units LT[1] to LT[8] are input to the OR circuit 131. When the output OUT1 of the OR circuit 131 is at a low level, this indicates that the comparison outputs Cp are at a low level for all of the first to eighth groups. In other words, it is detected in all of the first to eighth groups that the minimum voltage Vmin of the terminal voltages Vt[1] to Vt

[24] for the 24 channels is equal to or greater than the reference voltage Vref, indicating that the terminal voltages Vt are sufficient for all of the (24 channels x 8 groups) light-emitting units LL.

[0046] On the other hand, when the output OUT1 of the OR circuit 131 is at a high level, this indicates that the comparison output Cp is at a high level for at least one of the groups 1 to 8. In other words, it is detected in at least one of the groups 1 to 8 that the minimum voltage Vmin of the terminal voltages Vt[1] to Vt

[24] for the 24 channels is lower than the reference voltage Vref, indicating that the terminal voltage Vt is insufficient for at least one of the light-emitting units LL in the number of (24 channels x 8 groups).

[0047] Here, the operation will be explained with reference to FIG. 2. When the unit period Tu starts, the switch SW[1] of the first group is turned on, the first period T1 starts, and the driving current I for 24 channels is ＬＥＤ [1] to I ＬＥＤ

[24] PWM control is performed. In the first period T1, the comparison output Cp is captured and held by the latch unit LT[1]. After the first period T1, the switch SW[2] of the second group is turned on, and the second period T2 begins. In the second period T2, the comparison output Cp is captured and held by the latch unit LT[2]. Thereafter, the comparison output Cp is captured and held in the same manner until the eighth period T8. The next unit period Tu begins when the synchronization signal VSYNC rises and then falls.

[0048] The DAC 132 updates the DAC data according to the output OUT1 when the synchronization signal VSYNC rises and then falls. Specifically, when the output OUT1 is at a low level, the DAC data is updated to decrease the analog voltage VA. When the output OUT1 is at a high level, the DAC data is updated to increase the analog voltage VA. When the DAC data is updated, the value of the FB current Ifb is updated. Thereafter, the same operation is repeated for each unit period Tu.

[0049] Therefore, if the terminal voltage Vt is sufficient for all of the light-emitting units LL (24 channels x 8 groups), the power supply voltage Vout is controlled to decrease, and if the terminal voltage Vt is insufficient for at least one of the light-emitting units LL, the power supply voltage Vout is controlled to increase. As a result, the terminal voltage Vt for all of the light-emitting units LL (24 channels x 8 groups) is controlled to be equal to or higher than the set value. Because the terminal voltage Vt is controlled to be equal to or higher than the set value regardless of temperature, losses can be suppressed.

[0050] In particular, in this embodiment, all of the light-emitting units LL (24 channels x 8 groups) are monitored during the unit period Tu, and the monitoring results are stored before the value of the FB current Ifb for controlling the power supply voltage Vout is updated at the start of the next unit period Tu. This prevents ripples from occurring in the power supply voltage Vout, thereby improving the stability of the power supply voltage Vout.

[0051] Fig. 5 is a diagram showing a configuration related to feedback control according to a modified example of the first embodiment. The configuration shown in Fig. 5 differs from the first embodiment in that the polarity of the input terminal of the comparator 121B is reversed and the OR circuit 131 in the FB control signal generation unit 13 is replaced with an AND circuit 134.

[0052] The signals captured and held in each of the latch units LT[1] to LT[8] are input to the AND circuit 134. When the output AOUT2 of the AND circuit 134 is at a high level, this indicates that the comparison outputs Cp are at a high level for all of the first to eighth groups. In other words, it is detected in all of the first to eighth groups that the smallest voltage Vmin of the 24 channel terminal voltages Vt[1] to Vt

[24] is equal to or greater than the reference voltage Vref, indicating that the terminal voltages Vt are sufficient for all of the (24 channels x 8 groups) light-emitting units LL.

[0053] On the other hand, when the output AOUT2 of the AND circuit 134 is at a low level, this indicates that the comparison output Cp is at a low level for at least one of the first to eighth groups. In other words, it is detected in at least one of the first to eighth groups that the minimum voltage Vmin of the terminal voltages Vt[1] to Vt

[24] for the 24 channels is lower than the reference voltage Vref, indicating that the terminal voltage Vt is insufficient for at least one of the (24 channels x 8 groups) light-emitting units LL.

[0054] When the output AOUT2 is at a high level, the DAC 132 updates the DAC data in a direction to decrease the analog voltage VA. When the output AOUT2 is at a low level, the DAC 132 updates the DAC data in a direction to increase the analog voltage VA. Even with this modification, the same effects as in the first embodiment can be achieved.

[0055] Second Embodiment Fig. 6 is a diagram showing a second embodiment of a configuration related to feedback control. In the configuration shown in Fig. 6, a control block 11 is provided with a voltage monitor unit 14 and an FB control signal generator 15.

[0056] The voltage monitor unit 14 includes a comparison block 141 and latch blocks 142[1] to 142[8]. The comparison block 141 includes comparators 141[1] to 141

[24] . The comparators 141[1] to 141

[24] correspond to the first to twenty-fourth channels. The comparators 141[1] to 141

[24] compare the terminal voltages Vt[1] to Vt

[24] with a reference voltage Vref, respectively, and output comparison outputs Cp[1] to Cp

[24] . The terminal voltages Vt[1] to Vt

[24] are applied to the inverting input terminals of the comparators 141[1] to 141

[24] , and the reference voltage Vref is applied to the non-inverting input terminals of the comparators 141[1] to 141

[24] .

[0057] Latch blocks 142[1] to 142[8] correspond to the first to eighth groups. Latch blocks 142[1] to 142[8] have latch units LT[1] to Lt

[24] , respectively. Latch units LT[1] to Lt

[24] correspond to the first to twenty-fourth channels.

[0058] The comparison output Cp[i] is input to the latch unit LT[i] in each of the latch blocks 142[1] to 142[8]. The switch signal SS[j] is input to the latch units LT[1] to Lt

[24] in the latch block 142[j]. The PWM signal Spwm2[i] is input to the latch unit LT[i] in each of the latch blocks 142[1] to 142[8].

[0059] The latch unit LT[i] in the latch block 142[j] is turned on when the switch signal SS[j] is at a high level (i.e., the switch SW[j] is in an on state) and the PWM signal Spwm2[i] is at a high level (i.e., the drive current I ＬＥＤ 2, the comparison outputs are captured and held by latch blocks 142[1] to 142[8] in each of the time division periods T1 to T8.

[0060] The FB control signal generation unit 15 has OR circuits 151[1] to 151[8], an OR circuit 152, a DAC 153, and a constant current circuit 154. The OR circuit[j] receives signals held by the latch units LT[1] to Lt

[24] in the latch block 142[j]. The OR circuit 152 receives the outputs of the OR circuits 151[1] to 151[8]. The OR circuit 152 outputs an output OUT2 to the DAC 153.

[0061] When the output OUT2 is at a low level, it indicates that all comparison outputs Cp (24 channels x 8 groups) held by the latch blocks 142[1] to 142[8] are at a low level, which means that the terminal voltages Vt are sufficient for all of the light-emitting units LL (24 channels x 8 groups).

[0062] On the other hand, when the output OUT2 is at a high level, it indicates that at least one of the comparison outputs Cp (24 channels x 8 groups) held by the latch blocks 142[1] to 142[8] is at a high level, which indicates that the terminal voltage Vt is insufficient for at least one of the light-emitting units LL (24 channels x 8 groups).

[0063] When the output OUT2 is at a low level, the DAC 153 updates the DAC data in a direction to decrease the analog voltage VA. When the output OUT2 is at a high level, the DAC 153 updates the DAC data in a direction to increase the analog voltage VA. This embodiment also achieves the same effects as the first embodiment. However, the first embodiment is more advantageous in terms of circuit area.

[0064] In this embodiment, if the polarities of the input terminals of the comparators 141[1] to 141

[24] are reversed, the OR circuits 151[1] to 151[8] and the OR circuit 152 may be replaced with AND circuits.

[0065] 7 is a diagram showing a third embodiment of a configuration related to feedback control. In the configuration shown in Fig. 7, a control block 11 is provided with a voltage monitor unit 16 and an FB control signal generator 17.

[0066] The voltage monitor unit 16 has sample and hold blocks (hereinafter referred to as SH blocks) 161[1] to 161[8]. The sample and hold blocks 161[1] to 161[8] have sample and hold units SH[1] to SH

[24] , respectively.

[0067] The SH blocks 161[1] to 161[8] correspond to the first to eighth groups. The sample-and-hold units SH[1] to SH

[24] correspond to the first to twenty-fourth channels.

[0068] The terminal voltage Vt[i] is input to the sample-and-hold unit SH[i] in each of the SH blocks 161[1] to 161[8]. The switch signal SS[j] is input to the sample-and-hold units SH[1] to SH

[24] in the SH block 161[j]. The PWM signal Spwm2[i] is input to the sample-and-hold unit SH[i] in each of the SH blocks 161[1] to 161[8].

[0069] The sample-and-hold unit SH[i] in the SH block 161[j] is configured to detect when the switch signal SS[j] is at a high level (i.e., the switch SW[j] is in an on state) and the PWM signal Spwm2[i] is at a high level (i.e., the drive current I ＬＥＤ Then, when the PWM signal Spwm2[i] is at a low level (i.e., the drive current I ＬＥＤ 2, the terminal voltage Vt is sampled and held by the SH blocks 161[1] to 161[8] in each of the time division periods T1 to T8.

[0070] The FB control signal generation unit 17 includes minimum voltage selection units 171[1] to 171[8], comparators 172[1] to 172[8], an OR circuit 173, a DAC 174, and a constant current circuit 175.

[0071] The minimum voltage selection unit 171[j] receives as input the voltages held by the sample-and-hold units SH[1] to SH

[24] in the SH block 161[j]. The minimum voltage selection unit 171[j] selects and outputs the minimum voltage from the input voltages. The comparator 172[j] compares the voltage output from the minimum voltage selection unit 171[j] with a reference voltage Vref, and outputs a comparison output Cp[j]. The comparison outputs Cp[1] to Cp[8] are input to the OR circuit 173. The OR circuit 173 outputs an output OUT3 to the DAC 174.

[0072] When the output OUT3 is at a low level, all of the comparison outputs Cp[1] to Cp[8] are at a low level, indicating that all of the voltages output from the minimum voltage selection units 171[1] to 171[8] are equal to or greater than the reference voltage Vref, i.e., that all of the terminal voltages Vt for (24 channels x 8 groups) are equal to or greater than the set value.

[0073] On the other hand, when the output OUT3 is at a high level, it indicates that at least one of the comparison outputs Cp[1] to Cp[8] is at a high level and at least one of the voltages output from the minimum voltage selection units 171[1] to 171[8] is smaller than the reference voltage Vref. In other words, it indicates that at least one of the terminal voltages Vt for (24 channels x 8 groups) is smaller than the set value.

[0074] When the output OUT3 is at a low level, the DAC 174 updates the DAC data in a direction that decreases the analog voltage VA. When the output OUT3 is at a high level, the DAC data is updated in a direction that increases the analog voltage VA. This embodiment also achieves the same effects as the first embodiment. In this way, the monitoring result held by the voltage monitor unit is not limited to a logic signal such as the output of a comparator, and may be a terminal voltage as in this embodiment.

[0075] In this embodiment, if the polarities of the input terminals of the comparators 172[1] to 172[8] are reversed, the OR circuit 173 may be replaced with an AND circuit.

[0076] 8 is a diagram showing a fourth embodiment of the configuration related to feedback control. This embodiment differs from the third embodiment in the FB control signal generator 19.

[0077] The FB control signal generation unit 19 includes comparison blocks 191[1] to 191[8], OR circuits 192[1] to 192[8], an OR circuit 193, a DAC 194, and a constant current circuit 195.

[0078] Each of the comparison blocks 191[1] to 191[8] has a comparator CMP[1] to CMP

[24] . The comparator CMP[i] in the comparison block 191[j] compares the held voltage output from the sample-and-hold unit SH[i] in the SH block[j] with a reference voltage Vref. The outputs of the comparators CMP[1] to CMP

[24] in the comparison block 191[j] are input to the OR circuit 192[j]. The outputs of the OR circuits 192[1] to 192[8] are input to the OR circuit 193. The OR circuit 193 outputs an output OUT4 to the DAC 194.

[0079] When output OUT4 is at a low level, all outputs of comparators CMP[1] to CMP

[24] in comparison blocks 191[1] to 191[8] are at a low level, indicating that all terminal voltages Vt for (24 channels x 8 groups) are greater than or equal to the set value.

[0080] On the other hand, when the output OUT4 is at a high level, it indicates that the output of at least one of the comparators CMP[1] to CMP

[24] in the comparison blocks 191[1] to 191[8] is at a high level, and that at least one of the terminal voltages Vt for (24 channels x 8 groups) is smaller than the set value.

[0081] When the output OUT4 is at a low level, the DAC 194 updates the DAC data in a direction to decrease the analog voltage VA. When the output OUT4 is at a high level, the DAC 194 updates the DAC data in a direction to increase the analog voltage VA. This embodiment also achieves the same effects as the first embodiment. However, the third embodiment is more advantageous in terms of circuit area.

[0082] In this embodiment, if the polarities of the input terminals of the comparators CMP[1] to CMP

[24] are reversed, the OR circuits 192[1] to 192[8] and the OR circuit 193 may be replaced with AND circuits.

[0083] <Application to Liquid Crystal Display Device (LCD)> A liquid crystal display device will be described as an example of an application of the light emitting element driving device according to the embodiment described above. An example of the configuration of a liquid crystal display device is shown in Fig. 9. The configuration shown in Fig. 9 is a so-called direct type configuration.

[0084] 9 includes a backlight 41 and a liquid crystal panel 42. The backlight 41 is an illumination device (an example of a light-emitting device) that illuminates the liquid crystal panel 42 from behind. The backlight 41 includes a light source unit 411, a phosphor sheet 412, a diffusion plate 413, and optical sheets 414.

[0085] The light source unit 411 includes a light-emitting unit LL ( FIG. 1 ) and a substrate on which the light-emitting unit is mounted. The light-emitting element driving device for driving the light-emitting unit LL can be the same as that of the embodiment described above. The light-emitting unit LL emits blue light (monochromatic), for example. The phosphor sheet 412 transmits a portion of the blue light from the light source unit 411 and absorbs another portion of the blue light to emit yellow light. The backlight 41 combines the monochromatic light-emitting unit LL with the phosphor sheet 412 to emit a synthesized white light. The diffuser 413 diffuses the light from the phosphor sheet 412. The optical sheets 414 apply a predetermined optical effect to the light from the diffuser 413 and emit it toward the liquid crystal panel 42.

[0086] The light emitting sections LL are arranged in a matrix in accordance with the divided display areas of the liquid crystal panel 42. The brightness of each light emitting section LL is adjusted by PWM driving, making local dimming possible.

[0087] <Regarding In-Vehicle Displays> The liquid crystal display device to which the light-emitting element driving device according to the above-described embodiment is applied is particularly suitable for use as an in-vehicle display. The in-vehicle display is provided on the dashboard in front of the driver's seat of a vehicle, for example, as in the in-vehicle display Y shown in Fig. 10. The in-vehicle display Y can display various images such as car navigation information, captured images of the area behind the vehicle, a speedometer, a tachometer, a fuel gauge, a fuel consumption meter, and a shift position, and can convey various information to the user.

[0088] The screens of in-vehicle displays are becoming larger and larger, but the light-emitting element driving device according to the embodiment described above allows a single light-emitting element driving device to control a large number of light-emitting sections (divided display areas), thereby significantly reducing the number of light-emitting element driving devices installed and the mounting area.

[0089] <Others> In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present invention should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0090] For example, the FB control signal generated by the FB control signal generating unit in the above-described embodiment was an FB current drawn from a node to which a feedback resistor in a power supply circuit is connected, but is not limited to this. For example, the FB control signal may be a control signal for varying a reference voltage to be compared with a feedback voltage in a DC / DC converter.

[0091] <Additional Notes> As described above, a light-emitting element driving device (1) according to an aspect of the present disclosure is a light-emitting element driving device used in a light-emitting system (SYS) in which at least one channel of a light-emitting unit (LL) including at least one light-emitting element is provided, and a plurality of groups each made up of the light-emitting unit of at least one channel are provided, and the light-emitting element driving device includes connection terminals (CH) configured to be connectable to low potential ends of the light-emitting units of at least one channel, a switch control unit (20) configured to be able to control the on / off of switches (SW) connected between high potential ends of the light-emitting units in each of the groups and an application terminal to which a power supply voltage (Vout) output from a power supply circuit (3) is applied, and a drive current (I) is supplied to the light-emitting unit via the connection terminals. ＬＥＤ ), a voltage monitor unit (12) configured to monitor the voltage of the connection terminal for each of the switches turned on and hold the monitoring results, and a control signal generator (13) configured to update a control signal (Ifb) used for feedback control of the power supply voltage in the power supply circuit based on the monitoring results when the monitoring results for all of the light-emitting units are held (first configuration, FIG. 3).

[0092] According to this configuration, when the terminal voltage of the connection terminal is controlled, it is possible to suppress the occurrence of ripples in the power supply voltage and stabilize the power supply voltage.

[0093] In the first configuration, the voltage monitor unit (12) may have a minimum voltage determination unit (121) including: a first minimum voltage selection unit (121A) configured to select and output the minimum voltage among the terminal voltages of the connection terminals of all channels; and a first comparator (121B) configured to compare the output of the first minimum voltage selection unit with a first reference voltage, and the monitoring result may be the output of the first comparator (second configuration, FIG. 3).

[0094] Also, in the second configuration, the voltage monitor unit may have a first latch block (122) configured to hold the monitoring result, the first latch block having a plurality of first latch units (LT) provided corresponding to a plurality of the groups, and the first latch units may be configured to take in and hold the output of the first comparator based on a switch signal (SS) indicating the on / off of the switch and a current state signal (Spwm2) indicating the on / off of the drive current (third configuration).

[0095] In addition, in the third configuration, the control signal generating unit (13) may have a logic circuit (131) configured to receive outputs from the first latch units, and the control signal may be updated based on the output of the logic circuit (fourth configuration).

[0096] In addition, in the first configuration, the voltage monitor unit (14) may have a first comparison block (141) including a second comparator (141[i]) provided at least one corresponding to at least one channel and configured to compare the terminal voltage of the connection terminal for each channel with a second reference voltage, and the monitoring result may be an output of the second comparator (fifth configuration, FIG. 6).

[0097] Furthermore, in the fifth configuration, the voltage monitor unit (14) may have a second latch block (142) configured to hold the monitoring results and provided in plurality corresponding to the plurality of groups, each of the second latch blocks having at least one second latch unit (LT) provided corresponding to at least one channel, and the second latch unit may be configured to take in and hold the output of the second comparator based on a switch signal indicating the on / off of the switch and a current state signal indicating the on / off of the drive current (sixth configuration, FIG. 6).

[0098] In addition, in the sixth configuration, the control signal generating unit (15) may have logic circuits (151, 152) configured to receive outputs from the second latch units, and the control signal may be updated based on the output of the logic circuits (seventh configuration, FIG. 6).

[0099] In addition, in the first configuration, the voltage monitor unit (16) may have a plurality of sample-and-hold blocks (161) provided corresponding to a plurality of the groups, each of the sample-and-hold blocks having at least one sample-and-hold unit (SH) provided corresponding to at least one channel, and each of the sample-and-hold units may be configured to sample and hold the terminal voltage of the connection terminal of the corresponding channel based on a switch signal indicating the on / off of the switch and a current state signal indicating the on / off of the drive current (eighth configuration, FIG. 7).

[0100] Furthermore, in the eighth configuration, the control signal generating unit (17) may have: a plurality of second minimum voltage selecting units (171) provided corresponding to the plurality of groups; a plurality of third comparators (172) provided corresponding to the plurality of groups; and a logic circuit (173), wherein the second minimum voltage selecting units select and output the minimum voltage from the outputs of the respective corresponding sample-and-hold blocks; the third comparators compare the outputs of the respective corresponding second minimum voltage selecting units with a third reference voltage; the outputs of the respective third comparators are input to the logic circuits; and the control signal is updated based on the output of the logic circuit (ninth configuration, FIG. 7).

[0101] Also, in the eighth configuration, the control signal generating unit (19) may have: a plurality of second comparison blocks (191) provided corresponding to a plurality of the groups; and logic circuits (192, 193), wherein the second comparison blocks each have at least one fourth comparator (CMP) provided corresponding to at least one channel, the fourth comparators each compare the output from the corresponding sample-and-hold unit with a fourth reference voltage, and the outputs of the fourth comparators are input to the logic circuits, and the control signal may be updated based on the output of the logic circuits (tenth configuration, FIG. 8).

[0102] Furthermore, in any one of the fourth, seventh, ninth and tenth configurations, the control signal generating unit (13) may have a DA converter (132) configured to update digital data based on the output of the logic circuit, the DA converter updates the digital data based on a synchronization signal (VSYNC) that defines the start of a unit period during which the plurality of switches are sequentially turned on, and the control signal may be updated based on an analog signal (VA) output from the DA converter (eleventh configuration, FIG. 3).

[0103] In addition, in the eleventh configuration, the power supply circuit (3) may have feedback resistors (R2, R3) connected between the application terminal of the power supply voltage and the ground terminal, and the control signal generating unit (13) may have a constant current circuit (133) configured to generate, as the control signal, a current signal (Ifb) extracted from a node (N1) at which the feedback resistors are connected, based on the analog signal (VA) (twelfth configuration, FIG. 4).

[0104] Furthermore, a light-emitting system (SYS) according to one aspect of the present disclosure includes a light-emitting element driving device (1) having any one of the first to twelfth configurations described above, the light-emitting unit (LL), and the power supply circuit (3) (thirteenth configuration, FIG. 1).

[0105] Furthermore, a backlight (41) according to one aspect of the present disclosure includes a light-emitting element driving device (1) having any one of the first to twelfth configurations described above, a light source section (411) having the light-emitting sections (LL) arranged in a matrix, and at least one optical member (412 to 414) into which light emitted from the light source section is incident (fourteenth configuration, FIG. 9).

[0106] Furthermore, a display device (X) according to one aspect of the present disclosure includes a backlight (41) of the above-described fourteenth configuration and a display panel (42) onto which light emitted from the backlight is incident (fifteenth configuration).

[0107] The present disclosure can be used, for example, in vehicle displays.

[0108] 1 Light emitting element driving device 3 Power supply circuit 3A DC / DC converter 8 Wiring 10 Driver block 11 Control block 12 Voltage monitor unit 13 FB control signal generating unit 14 Voltage monitor unit 15 FB control signal generating unit 16 Voltage monitor unit 17 FB control signal generating unit 19 FB control signal generating unit 20 Control block 41 Backlight 42 Liquid crystal panel 101 Light emitting element driving device 102 Light emitting element driving device 102A FB control unit 102B FB current generating unit 121 Minimum voltage determination unit 121A Minimum voltage selection unit 121B Comparator 122 Latch block 123 AND circuit 131 OR circuit 132 DA converter 133 Constant current circuit 133A Error amplifier 133B Output transistor 133C Resistor 134 AND circuit 141 Comparison block 142 Latch block 151 OR circuit 152 OR circuit 153 DA converter 154 Constant current circuit 161 Sample and hold block 171 Minimum voltage selection unit 172 Comparator 173 OR circuit 174 DA converter 175 Constant current circuit 191 Comparison block 192 OR circuit 193 OR circuit 194 DA converter 195 Constant current circuit 201 Power supply circuit 201A DC / DC converter 411 Light source unit 412 Phosphor sheet 413 Diffusion plate 414 Optical sheets DRV Current driver LL Light-emitting unit LT Latch unit R11, R12 Feedback resistors R1 to R3 Feedback resistors RESET Current setting resistor SH Sample and hold unit SW Switch SYS Light-emitting system SYS11 Light-emitting system SYS12 Light-emitting system X Liquid crystal display device Y In-vehicle display

Claims

1. A light-emitting element driving device used in a light-emitting system in which at least one channel of a light-emitting unit including at least one light-emitting element is provided, and a plurality of groups each consisting of the light-emitting unit of at least one channel are provided, comprising: a connection terminal configured to be connectable to a low potential end of the light-emitting unit of at least one channel, a switch control unit configured to be able to control the on / off of a switch connected between a high potential end of the light-emitting unit in each of the groups and an application terminal of a power supply voltage output from a power supply circuit, a current driver configured to supply a driving current to the light-emitting unit via the connection terminal, a voltage monitoring unit configured to monitor the voltage of the connection terminal for each of the switches turned on and to hold the monitoring results, and a control signal generating unit configured to update a control signal used for feedback control of the power supply voltage in the power supply circuit based on the held monitoring results when the monitoring results for all the light-emitting units are held.

2. The light-emitting element driving device of claim 1, wherein the voltage monitor unit has a minimum voltage determination unit including: a first minimum voltage selection unit configured to select and output the minimum voltage of the terminal voltages of the connection terminals of all channels; and a first comparator configured to compare the output of the first minimum voltage selection unit with a first reference voltage, and the monitoring result is the output of the first comparator.

3. The light-emitting element driving device of claim 2, wherein the voltage monitor section has a first latch block configured to hold the monitoring result, the first latch block has a plurality of first latch sections provided corresponding to a plurality of the groups, and the first latch sections each capture and hold the output of the first comparator based on a switch signal indicating the on / off state of the switch and a current state signal indicating the on / off state of the drive current.

4. The light-emitting element driving device according to claim 3, wherein the control signal generating section has a logic circuit configured to receive the outputs from the respective first latch sections, and the control signal is updated based on the output of the logic circuit.

5. The light-emitting element driving device according to claim 1, wherein the voltage monitor section has a first comparison block including a second comparator provided at least one corresponding to at least one channel and configured to compare the terminal voltage of the connection terminal for each channel with a second reference voltage, and the monitoring result is an output of the second comparator.

6. The light-emitting element driving device of claim 5, wherein the voltage monitor section has a second latch block configured to hold the monitor result and provided in a plurality of second latch blocks corresponding to a plurality of the groups, the second latch block has at least one second latch section provided corresponding to at least one channel, and the second latch section captures and holds the output of the second comparator based on a switch signal indicating the on / off state of the switch and a current state signal indicating the on / off state of the drive current.

7. The light-emitting element driving device according to claim 6, wherein the control signal generating section has a logic circuit configured to receive the outputs from the second latch sections, and the control signal is updated based on the output of the logic circuit.

8. The light-emitting element driving device of claim 1, wherein the voltage monitor section has a plurality of sample-and-hold blocks provided corresponding to a plurality of the groups, each of the sample-and-hold blocks having at least one sample-and-hold section provided corresponding to at least one channel, and each of the sample-and-hold sections samples and holds the terminal voltage of the connection terminal of the corresponding channel based on a switch signal indicating the on / off state of the switch and a current state signal indicating the on / off state of the drive current.

9. The light-emitting element driving device of claim 8, wherein the control signal generating unit has: a plurality of second minimum voltage selecting units provided corresponding to a plurality of the groups; a plurality of third comparators provided corresponding to a plurality of the groups; and a logic circuit, wherein the second minimum voltage selecting units select and output a minimum voltage from among outputs from the respective corresponding sample-and-hold blocks; the third comparators compare the outputs of the respective corresponding second minimum voltage selecting units with a third reference voltage; the outputs of the respective third comparators are input to the logic circuits; and the control signal is updated based on the output of the logic circuit.

10. The light-emitting element driving device of claim 8, wherein the control signal generating unit has: a plurality of second comparison blocks provided corresponding to a plurality of the groups; and a logic circuit; the second comparison blocks each have at least one fourth comparator provided corresponding to at least one channel; the fourth comparators compare the output from the corresponding sample-and-hold unit with a fourth reference voltage; the outputs of the respective fourth comparators are input to the logic circuits; and the control signal is updated based on the output of the logic circuit.

11. A light-emitting element driving device as described in any one of claims 4, 7, 9 and 10, wherein the control signal generating unit has a DA converter configured to update digital data based on the output of the logic circuit, the DA converter updates the digital data based on a synchronization signal that defines the start of a unit period during which the multiple switches are sequentially turned on, and the control signal is updated based on an analog signal output from the DA converter.

12. The light-emitting element driving device of claim 11, wherein the power supply circuit has a feedback resistor connected between an application terminal of the power supply voltage and a ground terminal, and the control signal generating unit has a constant current circuit configured to generate, as the control signal, a current signal extracted from a node at which the feedback resistors are connected based on the analog signal.

13. A light emitting system comprising the light emitting element driving device according to any one of claims 1 to 12, the light emitting unit, and the power supply circuit.

14. A backlight comprising: a light-emitting element driving device according to any one of claims 1 to 12; a light source section having the light-emitting sections arranged in a matrix; and at least one optical member into which the light emitted from the light source section is incident.

15. A display device comprising: a backlight according to claim 14; and a display panel onto which the light emitted from the backlight is incident.

Images