Method and apparatus for reducing power consumption, and electronic device

Abstract

A method and apparatus for reducing power consumption, and an electronic device. Operation strategies are assigned to two cores of an electronic device, the core of a first part of a plurality of cores executes a calculation task with a high-performance strategy, and the core of a second part of the plurality of cores executes the calculation task with a high-energy-efficiency strategy. Upon receiving a power capping request, the electronic device can first reduce the power consumption of the core of the second part without reducing the power consumption of the core of the first part, thereby not affecting the calculation task executed by the core of the first part, and ensuring that the performance of the electronic device is not reduced.

Description

Method, device and electronic device for reducing power consumption

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on December 14, 2023, with application number 202311729956.0 and application name “A method, device and electronic device for reducing power consumption”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present invention relates to the technical field of power consumption capping, and in particular to a method, device and electronic equipment for reducing power consumption. Background Art

[0003] Power capping technology limits the power consumption of electronic devices. During normal operation, electronic devices consume significant amounts of power, even exceeding their designed power consumption. This can lead to overload, damage, and significant energy waste. Therefore, power capping technology precisely controls parameters such as current and voltage in electronic devices, limiting their power consumption, protecting them from overload, extending their lifespan, and reducing energy consumption.

[0004] In large-scale data centers / clusters, servers can use power capping technology to limit power consumption and prevent sudden loads or traffic spikes from causing server power consumption to rise, potentially leading to insufficient rack power, impacting device stability and even causing unexpected downtime and reboots. However, if excessive power consumption triggers power capping, all computing tasks are indiscriminately restricted, resulting in reduced server performance.

[0005] Summary of the Invention

[0006] To address the aforementioned issues, embodiments of the present application provide a method for reducing power consumption. When power capping is triggered, the power consumption of cores processing computing tasks that are insensitive to performance variations can be preferentially reduced to ensure that the performance of the electronic device is not degraded. Furthermore, the present application also provides a power consumption reduction apparatus and electronic device corresponding to the power consumption reduction method.

[0007] To this end, the following technical solutions are adopted in the embodiments of the present application:

[0008] In a first aspect, an embodiment of the present application provides a method for reducing power consumption, wherein the method is performed by an electronic device including multiple cores, and the method is executed by a target core among the multiple cores, including: executing computing tasks with a first operating strategy on the cores of a first part of the multiple cores, and executing computing tasks with a second operating strategy on the cores of a second part of the multiple cores; the first operating strategy is used to instruct the cores of the first part to execute computing tasks with a high-performance strategy, and the second operating strategy instructs the cores of the second part to execute computing tasks with a high-energy-efficiency strategy; after receiving an energy efficiency capping request, reducing the power consumption of the cores of the second part.

[0009] In this embodiment, the electronic device divides the core operation strategies into two types: a first portion of the multiple cores can execute computing tasks using a high-performance strategy, while a second portion of the multiple cores can execute computing tasks using a high-efficiency strategy. Upon receiving a power capping request, the electronic device can prioritize reducing the power consumption of the second portion of cores over the first portion of cores. This does not affect the computing tasks executed by the first portion of cores, ensuring that the performance of the electronic device is not degraded.

[0010] In one embodiment, after receiving the energy efficiency capping request and before reducing the power consumption of the core of the second part, the method also includes: detecting the load of the electronic device and sending the load of the electronic device to the control end; the control end is used to detect whether the load of the electronic device is greater than a set threshold, and if the load of the electronic device is greater than the set threshold, send the energy efficiency capping request to the target core.

[0011] In this implementation, electronic devices can detect their own load in real time and upload this load to a higher-level control terminal. The control terminal, combined with the coordinated working status of multiple electronic devices, determines the threshold for triggering the energy efficiency capping function for the current electronic device. When the load on the electronic device exceeds the set threshold, the control terminal can send an energy efficiency capping request to the electronic device, triggering the energy efficiency capping function to prevent damage to the electronic device due to excessive energy consumption.

[0012] In one embodiment, the executing of computing tasks by using a first operation strategy for the cores of a first part of the multiple cores and a second operation strategy for the cores of a second part of the multiple cores specifically includes: determining a current application scenario of the electronic device according to the load of the electronic device; associating the application scenario of the electronic device with the load of the electronic device; determining the number of cores of the first part and the number of cores of the second part according to a pre-stored allocation ratio of cores corresponding to the application scenario of the electronic device; and determining the number of cores of the first part and the number of cores of the second part according to the number of cores of the first part and the number of cores of the second part among the multiple cores.

[0013] In this embodiment, the electronic device obtains the cores of each chip within the electronic device and ranks each core according to its performance. The electronic device then allocates the cores to perform computing tasks using either the first or second operating strategy, based on the core allocation ratio corresponding to the current application scenario of the electronic device. This allows each core to operate at optimal performance and energy efficiency, thereby improving the performance and energy efficiency of the electronic device.

[0014] In one embodiment, after receiving the energy efficiency capping request and before reducing the power consumption of the core of the second part, the method further includes: obtaining multiple computing tasks of the electronic device; and according to set rules, allocating the multiple computing tasks to the task queues of the core of the first part and the core of the second part, respectively.

[0015] In one embodiment, the multiple computing tasks are respectively assigned to the task queues of the core of the first part and the core of the second part according to the set rules, specifically including: determining the performance priority and energy efficiency priority of the multiple computing tasks based on the attribute information of the multiple computing tasks and the labels of the multiple computing tasks; the attribute information includes one or more of execution time and load, and the label includes one or more of importance level and energy efficiency weight value; inputting the performance priority and energy efficiency priority of the multiple computing tasks into the scheduling objective function to obtain the task feature vectors of the multiple computing tasks; based on the task feature vectors of the multiple computing tasks, the multiple computing tasks are respectively assigned to the task queues of the core of the first part and the core of the second part.

[0016] In this embodiment, the electronic device obtains computing tasks and calculates the performance priority and energy efficiency priority of each computing task. After converting the performance priority and energy efficiency priority of the computing tasks into numerical task feature vectors, the electronic device can assign computing tasks with different task feature vectors to task queues of cores with different operating strategies. This accurately assigns computing tasks that are sensitive to performance changes to cores executing computing tasks using a first operating strategy, and assigns other computing tasks to cores executing computing tasks using a second operating strategy, thereby improving the efficiency of the electronic device in executing different types of computing tasks.

[0017] In one embodiment, after receiving the energy efficiency capping request, before reducing the power consumption of the core of the second part, the method further includes: dividing the core of the second part into multiple power consumption reduction levels; different power consumption reduction levels indicate different degrees of energy consumption reduction of the core of the second part; after receiving the energy efficiency capping request, reducing the power consumption of the core of the second part specifically includes: after receiving the energy efficiency capping request, reducing the power consumption of the core of the second part to a first power consumption reduction level; the multiple power consumption reduction levels include the first power consumption reduction level.

[0018] In this embodiment, when the electronic device evaluates the power consumption of a core executing a computing task using the second operating policy, it may classify the power consumption reduction that can be achieved for the core executing the computing task using the second operating policy into multiple levels. The electronic device may reduce the power consumption of the core executing the computing task using the second operating policy to different levels based on the number of energy efficiency capping requests received, thereby preventing the power consumption of the core executing the computing task using the second operating policy from being reduced excessively, thereby reducing the performance of the electronic device.

[0019] In one embodiment, the method also includes: after receiving the energy efficiency capping request for the second time, reducing the power consumption of the core of the second part to a second reduced power consumption level; the multiple reduced power consumption levels include the second reduced power consumption level, and the second reduced power consumption level reduces the energy consumption of the core of the second part to a greater extent than the first reduced power consumption level.

[0020] In this embodiment, when the load of the electronic device is still relatively large after the energy consumption of the core of the second part is reduced, the power consumption of the core of the second part can be further reduced to reduce the load of the electronic device and avoid damage to the electronic device due to excessive energy consumption.

[0021] In one embodiment, the method further includes: detecting the power consumption of the core of the second part; when the power consumption of the core of the second part is less than or equal to the set power consumption, converting some or all of the cores of the first part to perform computing tasks according to the second operating strategy.

[0022] In this embodiment, when reducing the power consumption of the cores of the second part of the electronic device cannot reduce the load of the electronic device, some or all of the cores in the first part can be converted to perform computing tasks with the second operating strategy, and only the power consumption of the converted cores can be reduced to minimize the impact on the performance of the electronic device.

[0023] In the second aspect, an embodiment of the present application provides a device for reducing power consumption, including: a first processing unit, used to execute computing tasks with a first operating strategy for the cores of a first part of the multiple cores, and with a second operating strategy for the cores of a second part of the multiple cores; the first operating strategy is used to instruct the cores of the first part to execute computing tasks with a high-performance strategy, and the second operating strategy is used to instruct the cores of the second part to execute computing tasks with a high-efficiency strategy; a second processing unit, used to reduce the power consumption of the cores of the second part after receiving an energy efficiency capping request.

[0024] In one embodiment, the first processing unit is further used to detect the load of the electronic device and send the load of the electronic device to the control end; the control end is used to detect whether the load of the electronic device is greater than a set threshold, and when the load of the electronic device is greater than the set threshold, send the energy efficiency capping request to the target core.

[0025] In one embodiment, the first processing unit is specifically used to determine the current application scenario of the electronic device based on the load of the electronic device; the application scenario of the electronic device is associated with the load of the electronic device; according to the pre-stored core allocation ratio corresponding to the application scenario of the electronic device, the number of cores of the first part and the number of cores of the second part are determined; the multiple cores are determined according to the number of cores of the first part and the number of cores of the second part.

[0026] In one embodiment, the second processing unit is further configured to obtain a plurality of computing tasks of the electronic device; and allocate the plurality of computing tasks to the task queues of the core of the first part and the core of the second part respectively according to set rules.

[0027] In one embodiment, the second processing unit is specifically used to determine the performance priority and energy efficiency priority of the multiple computing tasks based on the attribute information of the multiple computing tasks and the labels of the multiple computing tasks; the attribute information includes one or more of execution time and load, and the labels include one or more of importance level and energy efficiency weight value; the performance priority and energy efficiency priority of the multiple computing tasks are input into the scheduling objective function to obtain the task feature vectors of the multiple computing tasks; based on the task feature vectors of the multiple computing tasks, the multiple computing tasks are respectively allocated to the task queues of the core of the first part and the core of the second part.

[0028] In one embodiment, the second processing unit is further used to divide the system into multiple power consumption reduction levels; different power consumption reduction levels indicate different degrees of energy consumption reduction of the core of the second part; after receiving the energy efficiency capping request, the power consumption of the core of the second part is reduced to a first power consumption reduction level; the multiple power consumption reduction levels include the first power consumption reduction level.

[0029] In one embodiment, the second processing unit is further used to reduce the power consumption of the core of the second part to a second reduced power consumption level after receiving the energy efficiency capping request for the second time; the multiple reduced power consumption levels include the second reduced power consumption level, and the second reduced power consumption level reduces the energy consumption of the core of the second part to a greater extent than the first reduced power consumption level.

[0030] In one embodiment, the second processing unit is further used to detect the power consumption of the core of the second part; when the power consumption of the core of the second part is less than or equal to the set power consumption, some or all of the cores of the first part are converted into performing computing tasks according to the second operating strategy.

[0031] In a third aspect, an embodiment of the present application provides an electronic device, comprising: at least one memory; and at least one processor, the processor being configured to execute instructions stored in the memory so that the electronic device executes various possible implementations of the first aspect.

[0032] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, comprising computer program instructions. When the computer program instructions are executed by an electronic device, the electronic device executes the various possible implementations of the first aspect.

[0033] In a fifth aspect, an embodiment of the present application provides a computer program product comprising instructions, characterized in that the computer program product stores instructions that, when executed by an electronic device, enable the electronic device to implement various possible implementation embodiments of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The following is a brief introduction to the drawings required for describing the embodiments or prior art.

[0035] FIG1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0036] FIG2 is a schematic structural diagram of a power consumption reduction system provided in an embodiment of the present application;

[0037] FIG3 is a flow chart of a method for reducing power consumption provided in an embodiment of the present application;

[0038] FIG4 is a schematic structural diagram of a device for reducing power consumption provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0040] The term "and / or" as used herein describes an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. The symbol " / " as used herein indicates that the related objects are in an "or" relationship, for example, A / B means either A or B.

[0041] The terms "first" and "second" in this specification and claims are used to distinguish different objects rather than to describe a specific order of objects. For example, "first response message" and "second response message" are used to distinguish different response messages rather than to describe a specific order of response messages.

[0042] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0043] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more, for example, multiple processing units means two or more processing units, etc.; multiple elements means two or more elements, etc.

[0044] FIG1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. As shown in FIG1 , electronic device 100 includes an application 110, an operating system 120, a basic input / output system (BIOS) 130, and hardware components 140. The electronic device 100 may be a server, computer, desktop computer, laptop computer, drone, tablet computer, smartphone, new energy vehicle, base station, router, network switch, game console, or other device.

[0045] Application programs 110 are computer programs that perform one or more specific tasks. Installed on operating system 120, applications 110 interact with users, creating and executing tasks upon receiving user commands. Each application 110 runs in an independent process and has its own address space.

[0046] The operating system 120 is a set of interrelated system software programs that manage and control computer operations, run hardware and software resources, and provide public services to organize user interactions. The operating system 120 schedules various resource modules of the electronic device 100, including hardware and software devices, data, and information. Using a computer operating system can reduce the workload of manual resource allocation, reduce user intervention in computer operations, and significantly improve the computer's intelligent operating efficiency. The operating system 120 can be a Linux system, a real-time operating system (RTOS), or other systems.

[0047] BIOS 130 is an industry-standard firmware interface. It is a set of programs embedded in a read-only memory (ROM) chip on the computer's motherboard. It stores the computer's most important basic input and output routines, the post-boot self-test program, and the system startup program. The primary function of BIOS 130 is to provide the lowest-level, most direct hardware configuration and control for the computer. BIOS 130 does not directly control hardware components 140, but rather provides an abstraction layer and directly controls them.

[0048] The hardware component 140 includes various hardware components of the electronic device 100, such as an accelerator, a graphics processing unit (GPU), a central processing unit (CPU), a neural processing unit (NPU), etc. The hardware component 140 is used to support the normal operation of the electronic device 100.

[0049] The operating system 120 kernel is the core component of the operating system 120, responsible for managing system resources and providing various services. The operating system 120 divides its operating memory into two parts: kernel space and user space. User space refers to the space where user program code runs. Kernel space refers to the space where kernel code runs. When a process runs in user space, the process is in "user mode." A process in user mode is also called a user mode process. When a process runs in kernel space, the process is in "kernel mode." A process in kernel mode is also called a kernel mode process.

[0050] In the design of operating system 120, user mode refers to a non-privileged execution state. The operating system 120 kernel prohibits code in this state from performing potentially dangerous operations, such as writing system configuration files, killing other users' processes, or restarting the system. Kernel mode refers to a privileged execution state. The operating system 120 kernel can perform any operation on code in this state.

[0051] FIG2 is a schematic diagram of a power consumption reduction system according to an embodiment of the present invention. As shown in FIG2 , the power consumption reduction system 200 includes a user state 210 and a kernel state 220 .

[0052] User state 210 can add an intelligent power capping service 211. Intelligent power capping service 211 can run independently to intelligently manage its own power capping. Intelligent power capping service 211 can also connect to the cluster node management service through the cluster local agent to complete power capping management for the entire cluster at the data center level.

[0053] In an embodiment of the present application, the intelligent power consumption capping service 211 can divide the cores of the first part of the cores of different specifications of each chip into a performance domain based on the current application scenario of the electronic device 100 and the rule parameters of each core of each chip, so as to enable the cores of the first part to operate at the best performance state, and divide the cores of the second part into an energy efficiency domain so as to enable the cores of the second part to operate at the best energy efficiency state. The core of the chip refers to an integrated circuit. An integrated circuit is a network of tiny wires and electronic components composed of electronic components such as transistors, capacitors, and resistors, which is realized by integrating many electronic components on a single chip. The core part of the chip is the network of electronic components and wires therein, which are precisely manufactured, arranged and connected on a silicon substrate, so that the chip can achieve specific functions, such as processing information, storing data or performing computing tasks. The core of the chip can be the core in a GPU, the core in a CPU, the core in an NPU, etc.

[0054] The performance domain and energy efficiency domain are artificial divisions of chips managed by the operating system (OS). The cores in the first part generally run computing tasks that are sensitive to performance fluctuations, such as those sensitive to various quality of service (QoS) indicators such as latency and bandwidth, to ensure that the performance of these performance-sensitive tasks is not affected. The cores in the second part generally run computing tasks other than those executed by the cores in the first part to ensure optimal energy efficiency of electronic device 100.

[0055] The intelligent power consumption capping service 211 can configure different operating strategies for the performance domain and the energy efficiency domain, so that the cores of the first part or the cores of the second part perform computing tasks with the same operating strategy. The operating strategy refers to the state parameters of the core when performing computing tasks, such as the main frequency, idle strategy, maximum power consumption, etc. In an embodiment of the present application, the intelligent power consumption capping service 211 can configure a first operating strategy for the performance domain and a second operating strategy for the energy efficiency domain. Among them, the first operating strategy instructs the core to perform computing tasks with a high-performance strategy, that is, to allow the cores of the first part to perform computing tasks in the state of the highest performance. The second operating strategy instructs the core to perform computing tasks with a high-energy-efficiency strategy, that is, the cores of the second part perform computing tasks in the state of the highest energy efficiency value.

[0056] In one embodiment, the intelligent power capping service 211 can configure operating policies for the performance domain and the energy efficiency domain, including the main frequency, idle policy, and voltage. A first operating policy includes a main frequency of 2.5 GHz, an idle policy where the core is not in an idle state, and a rated voltage of 1.5 V. A second operating policy includes a main frequency of 1.0 GHz, an idle policy where the core is in a shallow sleep state, and a rated voltage of 1.2 V.

[0057] The intelligent power consumption capping service 211 can obtain various computing tasks for electronic devices from the system service set. The system service set stores computing tasks generated by electronic devices performing various functions. Computing tasks can be categorized into input / output (I / O) path tasks, background value-added tasks, background analysis tasks, and management-plane data transmission tasks. I / O path tasks refer to the processes within a computer system that process input and output, enabling the computer to interact and communicate with the external environment and implement data input and output functions. I / O path tasks can include file copying, file moving, data import / export, and network transmission. Background value-added tasks refer to tasks performed in the background of the computer system to increase the system's functionality, performance, and efficiency, thereby improving the system's functionality, security, performance, and user experience while reducing the manual workload required of users. Background value-added tasks can include data cleaning and processing, scheduled tasks, cache management, and security monitoring and protection. Background analysis tasks refer to data analysis tasks performed in the background of the computer system. Background analysis tasks can use specific algorithms and techniques to process, mine, and analyze data to gain potential insights or provide useful information. Backend analysis tasks can include data mining, fault detection and prediction, user behavior analysis, and data quality analysis and repair. Management-plane data transmission tasks refer to the tasks and processes used to transmit and exchange management information in computer network management. These tasks typically involve communication between network devices and management systems to enable management operations such as monitoring, configuration, and troubleshooting. Management-plane data transmission tasks can include user management, configuration management, log management, monitoring management, task scheduling, statistical reporting, and data backup / restore.

[0058] After receiving each computing task, the smart power capping service 211 can identify and compile attribute information for each computing task. This attribute information can include the time and load of the computing task. Typically, the computing resources of the electronic device 100 are limited, as is the number of computing tasks that can be executed simultaneously. Therefore, the smart power capping service 211 can tag each computing task with various types of tags and sequentially execute each computing task based on one or more types of tags. For example, the smart power capping service 211 can tag each computing task with a priority tag based on its sensitivity to performance changes. Tasks with high performance sensitivity are tagged with a high priority tag, allowing them to be executed first. Tasks with low or no performance sensitivity are tagged with a low priority tag, eliminating the need for prioritization. For another example, the smart power capping service 211 can tag each computing task with an energy efficiency weight value based on the energy efficiency of the task being executed. Tasks with high energy efficiency values ​​are tagged with tags with larger energy efficiency weight values, allowing them to be executed first. The computing task with low energy efficiency value is marked with a tag with a relatively small energy efficiency weight value, so that the computing task does not need to be executed first. As well as other tags, this application does not list them one by one here.

[0059] The intelligent power consumption capping service 211 can determine the performance priority and energy efficiency priority of a computing task based on the attribute information and various types of tags of the computing task. In the embodiment of the present application, computing tasks with high performance priority are generally executed by the cores of the first part. Computing tasks with low performance priority are generally executed by the cores of the second part. Computing tasks with high energy efficiency priority are generally executed by the cores of the first part. Computing tasks with low energy efficiency priority are generally executed by the cores of the second part.

[0060] After obtaining the performance priority and energy efficiency priority of each computing task, the intelligent power consumption capping service 211 can use the scheduling objective function to perform scheduling calculations on the performance priority and energy efficiency priority of the computing task to obtain the task feature vector (task feature vector) of each computing task. A task feature vector is a method of converting the key attributes and characteristics of a computing task into a numerical form so that a machine learning model or algorithm can process and analyze it. In the embodiment of the present application, the task feature vector is composed of two features: performance priority and energy efficiency priority. The performance priority feature represents the sensitivity of the computing task to performance changes and is used to describe the quantitative value of the performance requirement of the computing task. The larger the numerical value of the performance priority feature, the higher the priority of the computing task. The smaller the numerical value of the performance priority feature, the lower the priority of the computing task. The energy efficiency priority feature represents the energy efficiency of the computing task and is used to describe the quantitative value of the energy efficiency requirement of the computing task. The larger the numerical value of the energy efficiency priority feature, the higher the priority of the computing task. The smaller the numerical value of the energy efficiency priority feature, the lower the priority of the computing task.

[0061] The intelligent power capping service 211 can configure the allocation ratio of computing tasks for the performance domain and the energy efficiency domain. The allocation ratio of computing tasks is generally related to the application scenario of the electronic device 100. In different application scenarios, the number of computing tasks that need to be processed using the first operation strategy and the second operation strategy varies. The intelligent power capping service 211 can configure different allocation ratios for the performance domain and the energy efficiency domain based on the different application scenarios of the electronic device 100.

[0062] After the intelligent power consumption capping service 211 calculates the task feature vectors of each computing task, it can sort each computing task according to the size of the task feature vector. Then, the intelligent power consumption capping service 211 allocates each computing task to the performance domain and the energy efficiency domain according to the allocation ratio of the computing tasks corresponding to the current application scenario of the electronic device, so that computing tasks with different performance requirements can be allocated to the processing queue of the core of the corresponding performance for processing. In the process of allocating computing tasks, the intelligent power consumption capping service 211 allocates computing tasks with large task feature vector values ​​to the performance domain, and allocates computing tasks with small task feature vector values ​​to the energy efficiency domain.

[0063] In addition, the intelligent power capping service 211 can allocate computing tasks to cores with high affinity based on the affinity between the computing tasks and the cores. In one embodiment, the computing tasks for image processing have a relatively high affinity for the GPU cores, so the intelligent power capping service 211 can preferentially allocate the computing tasks for image processing to the GPU cores. In one embodiment, the computing tasks for training neural networks have an extremely high affinity for the NPU cores, so the intelligent power capping service 211 can preferentially allocate the computing tasks for training neural networks to the NPU cores. And other embodiments.

[0064] The intelligent power capping service 211 can configure the core allocation ratio for the performance domain and the energy efficiency domain. The core allocation ratio is generally determined based on factors such as the load of the electronic device 100 during the initialization phase and the application scenario. In different application scenarios, the computing power required to process computing tasks in the performance domain and the energy efficiency domain is different. The intelligent power capping service 211 can determine the number of cores in the performance domain and the energy efficiency domain based on the computing power of a single core, the total computing power required by the performance domain, and the total computing power required by the energy efficiency domain, thereby obtaining the core allocation ratio under different application scenarios.

[0065] During the initialization phase of the electronic device 100, the intelligent power consumption capping service 211 obtains the cores of each chip inside the electronic device and sorts each core according to the performance of each core. Then, the intelligent power consumption capping service 211 allocates multiple cores of the electronic device 100 to the performance domain and energy efficiency domain according to the core allocation ratio corresponding to the current application scenario of the electronic device 100, so that each core operates in the best performance state and energy efficiency state. In the process of allocating cores, the intelligent power consumption capping service 211 allocates high-performance cores to the performance domain and low-performance cores to the energy efficiency domain. The chip can be a CPU, DPU, network card, etc.

[0066] The intelligent power capping service 211 detects the relationship between the computing power of the cores of the first part and the computing power of the computing tasks assigned to the performance domain, and can dynamically adjust the number of cores in the first part. In one case, when the intelligent power capping service 211 detects that the computing power of the cores of the first part is less than the computing power of the computing tasks assigned to the performance domain, the cores of the second part can be migrated to the performance domain. In another case, when the intelligent power capping service 211 detects that the computing power of the cores of the first part is greater than the computing power of the computing tasks assigned to the performance domain, some cores can be migrated to the energy efficiency domain to reduce the power consumption of the electronic device 100.

[0067] When the intelligent power consumption capping service 211 migrates a core from the performance domain to the energy efficiency domain, or from the energy efficiency domain to the performance domain, it is necessary to migrate the computing tasks in the core's task queue to the task queues of other cores, causing the core to generate additional computing overhead and increase power consumption. In an embodiment of the present application, the intelligent power consumption capping service 211 preferentially adjusts the number of computing tasks in the performance domain and the energy efficiency domain so that the computing power of the cores of the first part remains the same as the computing power of the computing tasks allocated to the performance domain. In one case, when the intelligent power consumption capping service 211 detects that the computing power of the cores of the first part is less than the computing power of the computing tasks allocated to the performance domain, it can migrate some of the computing tasks to the energy efficiency domain. In another case, when the intelligent power consumption capping service 211 detects that the computing power of the cores of the first part is greater than the computing power of the computing tasks allocated to the performance domain, it can migrate some of the computing tasks in the energy efficiency domain to the performance domain.

[0068] In an embodiment of the present application, the kernel state 220 can detect the load of the electronic device 100 in real time and upload its own load to the control end. The control end can be a host device that controls the electronic device 100, and can be a baseboard management controller (BMC), a computer, a laptop, etc. After receiving the load of the electronic device 100, the control end determines whether the load of the electronic device 100 is less than a set threshold. In one case, when the control end detects that the load of the electronic device 100 is less than the set threshold, it is considered that the working state of the electronic device 100 is normal, and the power consumption control of the electronic device 100 does not need to be performed. In another case, when the control end detects that the load of the electronic device 100 is greater than or equal to the set threshold, it is considered that the working state of the electronic device 100 is abnormal, and a power consumption capping request can be sent to the electronic device 100 to instruct the electronic device 100 to start the power consumption capping function.

[0069] After receiving the power capping request, the intelligent power capping service 211 may prioritize reducing the energy consumption of the cores in the second portion to reduce the load on the electronic device 100. The intelligent power capping service 211 may reduce the energy consumption of the cores in the second portion by reducing the main frequency, reducing the voltage, or taking the cores offline. In an embodiment of the present application, the intelligent power capping service 211 may divide the process of reducing the energy consumption of the cores in the second portion into multiple energy consumption reduction levels, each energy consumption reduction level indicating a different degree of energy consumption reduction for the cores in the second portion.

[0070] In one embodiment, assume that the rated frequency of the cores in the second portion is 1.0 GHz, the rated voltage of the cores in the second portion is 1.5 V, and the number of cores in the second portion is 10. The intelligent power capping service 211 can divide the cores into three energy consumption reduction levels. The first energy consumption reduction level defines the main frequency of the cores in the second portion as 0.8 GHz, the rated voltage of the cores as 1.2 V, and the number of cores offline as 2. The second energy consumption reduction level defines the main frequency of the cores in the second portion as 0.5 GHz, the rated voltage of the cores as 1.0 V, and the number of cores offline as 5. The third energy consumption reduction level defines the main frequency of the cores in the second portion as 0.2 GHz, the rated voltage of the cores as 0.5 V, and the number of cores offline as 9. The intelligent power capping service 211 reduces the power consumption of the cores in the second portion to an extreme level, while keeping a few cores online to prevent the system from becoming inoperable after all cores are offline.

[0071] When the smart power capping service 211 receives the power capping request, it may reduce the second portion of cores to the first reduced power consumption level. If the second portion of cores is already at the first reduced power consumption level, the smart power capping service 211 may reduce the second portion of cores to the second reduced power consumption level upon receiving another power capping request. And so on.

[0072] If the cores of the second part are already in the third reduced energy consumption level, the intelligent power consumption capping service 211 can reduce the power consumption of the cores of the first part after receiving the power consumption capping request, so as to reduce the load of the electronic device 100. In the embodiment of the present application, the intelligent power consumption capping service 211 reduces the power consumption of the cores of the first part in a different way from the cores of the second part. In the process of reducing the energy consumption of the cores of the first part by the intelligent power consumption capping service 211, some or all of the cores in the first part can be operated with the second operating strategy, thereby reducing the power consumption of the electronic device. The intelligent power consumption capping service 211 makes some or all of the cores in the first part operate with the second operating strategy, which can avoid reducing the power consumption of all the cores in the first part, resulting in all computing tasks allocated to the performance domain being affected.

[0073] During the core migration process, the intelligent power capping service 211 may define multiple energy consumption reduction levels, each of which represents the number of cores to be migrated in the first portion. In one embodiment, assuming the number of cores in the first portion is 10, the intelligent power capping service 211 may define three energy consumption reduction levels. The first energy consumption reduction level defines the number of cores to be migrated as 3. The second energy consumption reduction level also defines the number of cores to be migrated as 3. The fourth energy consumption reduction level defines the number of cores to be migrated as 4.

[0074] When the intelligent power consumption capping service 211 determines that the power consumption of the cores in the second part has been reduced to the limit state, the intelligent power consumption capping service 211 can reduce the cores in the first part to the first reduced energy consumption level after receiving the power consumption capping request again. At this time, the three cores in the first part selected will migrate the computing tasks on their queues to other core queues, and then work according to the second operation strategy. And so on. If all the cores in the first part are migrated to the energy efficiency domain, the intelligent power consumption capping service 211 can shut down the electronic device 100 after receiving the power consumption capping request to prevent the electronic device 100 from being damaged due to excessive load.

[0075] In an embodiment of the present application, the intelligent power consumption capping service 211 can divide the cores into performance domains and energy efficiency domains, and allocate the cores of each chip to the performance domain and the energy efficiency domain. The intelligent power consumption capping service 211 can allocate computing tasks that are sensitive to performance changes to the performance domain, and other computing tasks to the energy efficiency domain. After receiving the power consumption capping request, the intelligent power consumption capping service 211 can give priority to reducing the power consumption of the cores of the second part, and will not reduce the computing tasks that are allocated to the performance domain, thereby ensuring that the performance of the electronic device 100 will not be reduced. If reducing the power consumption of the cores of the second part cannot reduce the load of the electronic device 100, some or all of the cores in the first part will operate with the second operating strategy, and only reduce the power consumption of the cores that have switched operating strategies, thereby minimizing the impact on the performance of the electronic device 100.

[0076] FIG3 is a flow chart of a method for reducing power consumption provided in an embodiment of the present application. As shown in FIG3 , the method can be executed by a processor of the electronic device 100 described above, and the specific implementation process is as follows:

[0077] S301 : The processor allocates the cores of the electronic device 100 to the performance domain and the energy efficiency domain respectively.

[0078] The processor can divide the cores of different specifications on each chip into performance domains and energy efficiency domains based on the current application scenario of electronic device 100 and the regulatory parameters of each core of each chip, so that each core can operate at optimal performance and energy efficiency. Cores in the performance domain generally run computing tasks that are sensitive to performance changes to ensure that the performance of these computing tasks is not affected. Cores in the second domain generally run computing tasks in addition to those performed by the cores in the first domain to ensure optimal energy efficiency of electronic device 100.

[0079] The processor can configure different operating policies for the performance domain and the energy efficiency domain, allowing the cores in the first or second domain to execute computing tasks using the same operating policy. The operating policy refers to the state parameters of the core when executing computing tasks, such as the main frequency, idle strategy, and maximum power consumption.

[0080] The processor can configure the core allocation ratio for the performance domain and the energy efficiency domain. The core allocation ratio is generally determined based on factors such as the load of the electronic device 100 during the initialization phase and the application scenario. The computing power required to process computing tasks in the performance domain and the energy efficiency domain varies in different application scenarios. The processor can determine the number of cores in the performance domain and the energy efficiency domain based on the computing power of a single core, the total computing power required by the performance domain, and the total computing power required by the energy efficiency domain, thereby determining the core allocation ratio for different application scenarios.

[0081] During the initialization phase of the electronic device 100, the processor obtains the cores of each chip within the electronic device and sorts the cores according to their performance. The processor then allocates the multiple cores of the electronic device 100 to performance domains and energy efficiency domains based on the core allocation ratio corresponding to the current application scenario of the electronic device 100, allowing each core to operate at optimal performance and energy efficiency. During the core allocation process, the processor allocates high-performance cores to the performance domain and low-performance cores to the energy efficiency domain.

[0082] S302: The processor allocates current computing tasks of the electronic device 100 to performance domains and energy efficiency domains.

[0083] The processor can obtain various computing tasks of the electronic device from the system business center. After obtaining each computing task, the processor can identify and count the attribute information of each computing task. The attribute information can be the time and load for executing the computing task. Generally, the computing resources of the electronic device 100 are limited, and the number of computing tasks executed at the same time is also limited, so the processor can mark various types of tags on each computing task, and execute each computing task in sequence according to one or several types of tags. The processor can mark priority tags on each computing task according to the degree to which each computing task is sensitive to performance changes. Computing tasks with high sensitivity to performance changes are marked with high-priority tags, so that the computing tasks are executed first. Computing tasks with low sensitivity to performance changes or insensitive to performance changes are marked with low-priority tags, so that the computing tasks do not need to be executed first.

[0084] The processor can tag each computing task with an energy efficiency weight value based on the energy efficiency of the computing task being executed. Computing tasks with high energy efficiency values ​​are tagged with tags with relatively large energy efficiency weight values, giving priority to these computing tasks. Computing tasks with low energy efficiency values ​​are tagged with tags with relatively small energy efficiency weight values, eliminating the need for priority execution for these computing tasks. Other tags are not listed here.

[0085] The processor can determine the performance priority and energy efficiency priority of the computing task based on the attribute information of the computing task and various types of tags. In the embodiment of the present application, computing tasks with high performance priority are generally executed by the core of the first part. Computing tasks with low performance priority are generally executed by the core of the second part. Computing tasks with high energy efficiency priority are generally executed by the core of the first part. Computing tasks with low energy efficiency priority are generally executed by the core of the second part.

[0086] After the processor obtains the performance priority and energy efficiency priority of each computing task, it can use the scheduling objective function to perform scheduling calculations on the performance priority and energy efficiency priority of the computing task to obtain the task feature vector of each computing task. The performance priority feature represents the sensitivity of the computing task to performance changes and is used to describe the quantitative value of the performance requirement of the computing task. The larger the value of the performance priority feature, the higher the priority of the computing task. The smaller the value of the performance priority feature, the lower the priority of the computing task. The energy efficiency priority feature represents the energy efficiency of the computing task and is used to describe the quantitative value of the energy efficiency requirement of the computing task. The larger the value of the energy efficiency priority feature, the higher the priority of the computing task. The smaller the value of the energy efficiency priority feature, the lower the priority of the computing task.

[0087] The processor can configure the allocation ratio of computing tasks for the performance domain and the energy efficiency domain. The allocation ratio of computing tasks is generally related to the application scenario of the electronic device 100. In different application scenarios, the number of computing tasks that need to be processed using the first operation strategy and the second operation strategy varies. The processor can configure different allocation ratios for the performance domain and the energy efficiency domain based on the different application scenarios of the electronic device 100.

[0088] After the processor calculates the task feature vectors of each computing task, it can sort the computing tasks according to the size of the task feature vectors. Then, the processor allocates each computing task to the performance domain and the energy efficiency domain according to the allocation ratio of computing tasks corresponding to the current application scenario of the electronic device, so that computing tasks with different performance requirements can be allocated to the processing queue of the core of the corresponding performance for processing. In the process of allocating computing tasks, the processor allocates computing tasks with large task feature vector values ​​to the performance domain, and allocates computing tasks with small task feature vector values ​​to the energy efficiency domain.

[0089] In addition, the processor can allocate computing tasks to cores with high affinity based on the affinity between the computing tasks and the cores. In one embodiment, the computing tasks for image processing have a relatively high affinity for the GPU cores, so the processor can preferentially allocate the computing tasks for image processing to the GPU cores. In one embodiment, the computing tasks for training neural networks have a very high affinity for the NPU cores, so the processor can preferentially allocate the computing tasks for training neural networks to the NPU cores. And other embodiments.

[0090] The processor detects the relationship between the computing power of the cores in the first portion and the computing power of the computing tasks assigned to the performance domain and can dynamically adjust the number of cores in the first portion. In one case, when the processor detects that the computing power of the cores in the first portion is less than the computing power of the computing tasks assigned to the performance domain, the cores in the second portion can be migrated to the performance domain. In another case, when the processor detects that the computing power of the cores in the first portion is greater than the computing power of the computing tasks assigned to the performance domain, some cores can be migrated to the energy efficiency domain to reduce the power consumption of the electronic device 100.

[0091] When the processor migrates a core from the performance domain to the energy efficiency domain, or from the energy efficiency domain to the performance domain, it needs to migrate the computing tasks in the core's task queue to the task queues of other cores, causing the core to generate additional computing overhead and increase power consumption. In an embodiment of the present application, the processor preferentially adjusts the number of computing tasks in the performance domain and the energy efficiency domain so that the computing power of the cores of the first part remains the same as the computing power of the computing tasks allocated to the performance domain. In one case, when the processor detects that the computing power of the cores of the first part is less than the computing power of the computing tasks allocated to the performance domain, it can migrate some of the computing tasks to the energy efficiency domain. In another case, when the processor detects that the computing power of the cores of the first part is greater than the computing power of the computing tasks allocated to the performance domain, it can migrate some of the computing tasks in the energy efficiency domain to the performance domain.

[0092] S303: The processor sends the load of the electronic device 100 to the control end in real time.

[0093] S304: After receiving the power consumption capping request, the processor starts the power consumption capping function.

[0094] The processor can detect the load of the electronic device 100 in real time and upload its own load to the control end. After receiving the load of the electronic device 100, the control end determines whether the load of the electronic device 100 is less than the set threshold. In one case, when the control end detects that the load of the electronic device 100 is less than the set threshold, it is considered that the working state of the electronic device 100 is normal, and the power consumption of the electronic device 100 does not need to be controlled. In another case, when the control end detects that the load of the electronic device 100 is greater than or equal to the set threshold, it is considered that the working state of the electronic device 100 is abnormal, and a power consumption capping request can be sent to the electronic device 100 to instruct the electronic device 100 to start the power consumption capping function.

[0095] At step S305, the processor detects whether the energy efficiency of the cores of the second portion is greater than the set energy consumption. In one case, if the processor determines that the energy consumption of the cores of the second portion is greater than the set energy consumption, step S306 is executed. In another case, if the processor determines that the energy consumption of the cores of the second portion is less than or equal to the set energy consumption, step S307 is executed.

[0096] S306: The processor reduces the energy consumption of the core of the second part.

[0097] S307, the processor reduces the energy consumption of the core of the first part.

[0098] After receiving the power consumption capping request, the processor may prioritize reducing the energy consumption of the cores in the second portion to reduce the load on the electronic device 100. The processor may reduce the energy consumption of the cores in the second portion by reducing the main frequency, reducing the voltage, or taking the cores offline. The processor may divide the energy consumption of the cores in the second portion into multiple energy consumption reduction levels, each indicating a different degree of energy consumption reduction for the cores in the second portion.

[0099] When the processor receives the power capping request for the first time, it may reduce the second portion of cores to the first reduced power consumption level. If the second portion of cores is already at the first reduced power consumption level, the smart power capping service 211 may reduce the second portion of cores to the second reduced power consumption level upon receiving the power capping request again. And so on.

[0100] When the processor determines that the power consumption of the cores of the second part has been reduced to a limit state, the processor can reduce the power consumption of the cores of the first part after receiving the power consumption capping request, so as to reduce the load of the electronic device 100. The way in which the processor reduces the power consumption of the cores of the first part is different from that of the cores of the second part. In the process of reducing the energy consumption of the cores of the first part, the processor can operate some or all of the cores in the first part with the second operating strategy, thereby reducing the power consumption of the cores migrated to the energy efficiency domain. The processor operates some or all of the cores in the first part with the second operating strategy, which can avoid reducing the power consumption of all the cores in the first part, resulting in all computing tasks allocated to the performance domain being affected.

[0101] During the core migration process, the processor can divide the cores into multiple energy consumption reduction levels, and each energy consumption reduction level represents the number of cores in the first part that have been migrated. When the processor determines that the power consumption of the cores in the second part has been reduced to the limit state, the processor can reduce the cores in the first part to the first energy consumption reduction level after receiving the power consumption capping request again. At this time, the three cores in the selected first part will migrate the computing tasks on their queues to other core queues, and then work according to the second operation strategy. And so on. If all the cores in the first part are migrated to the energy efficiency domain, the processor can shut down the electronic device 100 after receiving the power consumption capping request to prevent the electronic device 100 from being damaged due to excessive load.

[0102] In an embodiment of the present application, the processor can divide the cores into performance domains and energy efficiency domains, and allocate the cores of each chip to the performance domain and the energy efficiency domain. The processor can allocate computing tasks that are sensitive to performance changes to the performance domain, and allocate other computing tasks to the energy efficiency domain. After receiving the power consumption capping request, the processor can give priority to reducing the power consumption of the cores in the second part, and will not reduce the computing tasks that are allocated to the performance domain, thereby ensuring that the performance of the electronic device 100 will not be reduced. If reducing the power consumption of the cores in the second part cannot reduce the load of the electronic device 100, some or all of the cores in the first part will operate with the second operating strategy, and only reduce the power consumption of the cores that switch the operating strategy, so as to minimize the impact on the performance of the electronic device 100.

[0103] FIG4 is a schematic diagram of the structure of a device for reducing power consumption provided in an embodiment of the present application. As shown in FIG4 , the device for reducing power consumption 400 can be divided into a first processing unit 410 and a second processing unit 420 according to the execution function. The functions performed by each unit of the device for reducing power consumption 400 are as follows:

[0104] The first processing unit 410 is configured to cause a first portion of the plurality of cores to execute computing tasks using a first operating policy, and a second portion of the plurality of cores to execute computing tasks using a second operating policy. The first operating policy instructs the first portion of the cores to execute computing tasks using a high-performance policy. The second operating policy instructs the second portion of the cores to execute computing tasks using a high-efficiency policy. The second processing unit 420 is configured to reduce the power consumption of the second portion of the cores upon receiving an energy efficiency capping request.

[0105] In one embodiment, the first processing unit 410 is further configured to detect the load of the electronic device and send the load of the electronic device to the control terminal. The control terminal is configured to detect whether the load of the electronic device is greater than a set threshold and, if the load of the electronic device is greater than the set threshold, send an energy efficiency capping request to the target core.

[0106] In one embodiment, the first processing unit 410 is specifically configured to determine the current application scenario of the electronic device based on the load of the electronic device. The application scenario of the electronic device is associated with the load of the electronic device. The first processing unit 410 is specifically configured to determine the number of cores in the first part and the number of cores in the second part according to the pre-stored core allocation ratio corresponding to the application scenario of the electronic device. The first processing unit 410 is specifically configured to determine the number of cores in the first part and the number of cores in the second part according to the number of cores in the first part and the number of cores in the second part.

[0107] In one embodiment, the second processing unit 420 is further configured to obtain multiple computing tasks of the electronic device and to distribute the multiple computing tasks to the task queues of the cores of the first part and the cores of the second part according to a set rule.

[0108] In one embodiment, the second processing unit 420 is specifically used to determine the performance priority and energy efficiency priority of multiple computing tasks based on the attribute information of the multiple computing tasks and the labels of the multiple computing tasks. The attribute information includes one or more of execution time and load. The label includes one or more of importance level and energy efficiency weight value. The second processing unit 420 is specifically used to input the performance priority and energy efficiency priority of the multiple computing tasks into the scheduling objective function to obtain the task feature vectors of the multiple computing tasks. The second processing unit 420 is specifically used to allocate the multiple computing tasks to the task queues of the core of the first part and the core of the second part respectively based on the task feature vectors of the multiple computing tasks.

[0109] In one embodiment, the second processing unit 420 is further configured to divide the processor into multiple power consumption reduction levels. Different power consumption reduction levels indicate different degrees of energy consumption reduction for the cores in the second portion. The second processing unit 420 is specifically configured to, upon receiving the energy efficiency capping request, reduce the power consumption of the cores in the second portion to a first power consumption reduction level. The multiple power consumption reduction levels include the first power consumption reduction level.

[0110] In one embodiment, the second processing unit 420 is further configured to, upon receiving the energy efficiency capping request for the second time, reduce the power consumption of the second portion of cores to a second reduced power consumption level. The plurality of reduced power consumption levels includes the second reduced power consumption level. The second reduced power consumption level reduces the energy consumption of the second portion of cores to a greater extent than the first reduced power consumption level.

[0111] In one embodiment, the second processing unit 420 is further configured to detect the power consumption of the cores in the second portion. The second processing unit 420 is further configured to switch some or all of the cores in the first portion to execute computing tasks using the second operation strategy when the power consumption of the cores in the second portion is less than or equal to a set power consumption.

[0112] An embodiment of the present application also provides an electronic device, which includes a processor. The processor can execute the technical solutions shown in Figures 1 to 3 and the above-mentioned corresponding protections, so that the electronic device has the technical effects of the above-mentioned technical solutions.

[0113] A computer-readable storage medium is also provided in an embodiment of the present application, including computer program instructions. When the computer program instructions are executed by an electronic device, the computing device executes any one of the methods described in Figures 1-3 and the corresponding descriptions.

[0114] An embodiment of the present application also provides a computer program product containing instructions, characterized in that the computer program product stores instructions, and when the instructions are executed by an electronic device, the electronic device implements any one of the methods recorded in Figures 1 to 3 and the corresponding description content.

[0115] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of this application.

[0116] In addition, various aspects or features of the embodiments of the present application can be implemented as methods, devices or products using standard programming and / or engineering techniques. The term "product" as used in this application covers computer programs that can be accessed from any computer-readable device, carrier or medium. For example, computer-readable media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks or tapes, etc.), optical disks (e.g., compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards and flash memory devices (e.g., erasable programmable read-only memories (EPROMs), cards, sticks or key drives, etc.). In addition, the various storage media described herein may represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing and / or carrying instructions and / or data.

[0117] In the above embodiment, the device 400 for reducing power consumption in Figure 4 can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., an SSD).

[0118] It should be understood that in various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0119] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0120] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0121] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0122] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, a server, or an access network device, etc.) to execute all or part of the steps of the method described in each embodiment of the embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0123] The above is only a specific implementation of the embodiment of the present application, but the protection scope of the embodiment of the present application is not limited to this. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in the embodiment of the present application, and they should all be covered by the protection scope of the embodiment of the present application.

Claims

1. A method for reducing power consumption, characterized in that: The method comprises a plurality of cores in an electronic device, and the method is executed by a target core among the plurality of cores, and comprises: The first part of the cores among the plurality of cores is used to execute computing tasks with a first operation strategy, and the second part of the cores among the plurality of cores is used to execute computing tasks with a second operation strategy; the first operation strategy is used to instruct the first part of the cores to execute computing tasks with a high-performance strategy, and the second operation strategy is used to instruct the second part of the cores to execute computing tasks with a high-energy-efficiency strategy; After receiving the energy efficiency capping request, the power consumption of the core of the second part is reduced.

2. The method according to claim 1, characterized in that After receiving the energy efficiency capping request, before reducing the power consumption of the core of the second part, the method further includes: Detect the load of the electronic device and send the load of the electronic device to the control end; the control end is used to detect whether the load of the electronic device is greater than a set threshold, and when the load of the electronic device is greater than the set threshold, send the energy efficiency capping request to the target core.

3. The method according to claim 1 or 2, characterized in that: The step of executing the computing task using a first part of the cores of the plurality of cores with a first operation strategy and executing the computing task using a second part of the cores of the plurality of cores with a second operation strategy specifically includes: Determining a current application scenario of the electronic device according to the load of the electronic device; the application scenario of the electronic device is associated with the load of the electronic device; Determining the number of cores in the first part and the number of cores in the second part according to a pre-stored core allocation ratio corresponding to an application scenario of the electronic device; The plurality of cores are determined according to the number of cores in the first part and the number of cores in the second part, so as to determine the cores in the first part and the cores in the second part.

4. The method according to any one of claims 1 to 3, characterized in that: After receiving the energy efficiency capping request, before reducing the power consumption of the core of the second part, the method further includes: Acquire multiple computing tasks of the electronic device; According to a set rule, the plurality of computing tasks are respectively allocated to the task queues of the cores of the first part and the task queues of the cores of the second part.

5. The method according to claim 4, characterized in that The allocating the plurality of computing tasks to the task queues of the core of the first part and the core of the second part respectively according to the set rule specifically includes: Determine the performance priority and energy efficiency priority of the multiple computing tasks based on the attribute information of the multiple computing tasks and the labels of the multiple computing tasks; the attribute information includes one or more of execution time and load, and the label includes one or more of importance level and energy efficiency weight value; Inputting the performance priorities and energy efficiency priorities of the plurality of computing tasks into a scheduling objective function to obtain task feature vectors of the plurality of computing tasks; Based on the task feature vectors of the multiple computing tasks, the multiple computing tasks are respectively allocated to the task queues of the cores of the first part and the cores of the second part.

6. The method according to any one of claims 1 to 5, characterized in that: After receiving the energy efficiency capping request, before reducing the power consumption of the core of the second part, the method further includes: Dividing into a plurality of power consumption reduction levels; different power consumption reduction levels indicate different degrees of energy consumption reduction of the core of the second part; After receiving the energy efficiency capping request, reducing the power consumption of the core of the second part specifically includes: After receiving the energy efficiency capping request, the power consumption of the core of the second part is reduced to a first reduced power consumption level; the multiple reduced power consumption levels include the first reduced power consumption level.

7. The method according to claim 6, characterized in that The method further comprises: After receiving the energy efficiency capping request for the second time, the power consumption of the core of the second part is reduced to a second reduced power consumption level; the multiple reduced power consumption levels include the second reduced power consumption level, and the second reduced power consumption level reduces the energy consumption of the core of the second part to a greater extent than the first reduced power consumption level.

8. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: detecting power consumption of a core of the second part; When the power consumption of the cores of the second part is less than or equal to the set power consumption, part or all of the cores of the first part are converted to execute computing tasks according to the second operation strategy.

9. A device for reducing power consumption, characterized in that: include: A first processing unit, configured to execute computing tasks on a first portion of the cores of the plurality of cores using a first operation strategy, and on a second portion of the cores of the plurality of cores using a second operation strategy; The first operation strategy is used to instruct the core of the first part to perform computing tasks with a high-performance strategy, and the second operation strategy is used to instruct the core of the second part to perform computing tasks with a high-energy-efficiency strategy; The second processing unit is configured to reduce the power consumption of the core of the second part after receiving the energy efficiency capping request.

10. The device according to claim 9, characterized in that The first processing unit is also used to Detect the load of the electronic device and send the load of the electronic device to the control end; the control end is used to detect whether the load of the electronic device is greater than a set threshold, and when the load of the electronic device is greater than the set threshold, send the energy efficiency capping request to the target core.

11. The device according to claim 9 or 10, characterized in that The first processing unit is specifically configured to Determining a current application scenario of the electronic device according to the load of the electronic device; the application scenario of the electronic device is associated with the load of the electronic device; Determining the number of cores in the first part and the number of cores in the second part according to a pre-stored core allocation ratio corresponding to an application scenario of the electronic device; The plurality of cores are determined according to the number of cores in the first part and the number of cores in the second part, so as to determine the cores in the first part and the cores in the second part.

12. The device according to any one of claims 9 to 11, characterized in that: The second processing unit is also used for Acquire multiple computing tasks of the electronic device; According to a set rule, the plurality of computing tasks are respectively allocated to the task queues of the cores of the first part and the task queues of the cores of the second part.

13. The device according to claim 12, characterized in that The second processing unit is specifically configured to Determine the performance priority and energy efficiency priority of the multiple computing tasks based on the attribute information of the multiple computing tasks and the labels of the multiple computing tasks; the attribute information includes one or more of execution time and load, and the label includes one or more of importance level and energy efficiency weight value; Inputting the performance priorities and energy efficiency priorities of the plurality of computing tasks into a scheduling objective function to obtain task feature vectors of the plurality of computing tasks; Based on the task feature vectors of the multiple computing tasks, the multiple computing tasks are respectively allocated to the task queues of the cores of the first part and the cores of the second part.

14. The device according to any one of claims 9 to 13, characterized in that: The second processing unit is also used for Dividing into a plurality of power consumption reduction levels; different power consumption reduction levels indicate different degrees of energy consumption reduction of the core of the second part; After receiving the energy efficiency capping request, the power consumption of the core of the second part is reduced to a first reduced power consumption level; the multiple reduced power consumption levels include the first reduced power consumption level.

15. The device according to any one of claims 9 to 14, characterized in that: The second processing unit is also used for After receiving the energy efficiency capping request for the second time, the power consumption of the core of the second part is reduced to a second reduced power consumption level; the multiple reduced power consumption levels include the second reduced power consumption level, and the second reduced power consumption level reduces the energy consumption of the core of the second part to a greater extent than the first reduced power consumption level.

16. The device according to any one of claims 9 to 15, characterized in that: The second processing unit is also used for detecting power consumption of a core of the second part; When the power consumption of the cores of the second part is less than or equal to the set power consumption, part or all of the cores of the first part are converted to execute computing tasks according to the second operation strategy.

17. An electronic device, characterized in that: include: at least one memory; At least one processor, wherein the processor is configured to execute instructions stored in the memory so that the electronic device executes the method according to any one of claims 1 to 8.

18. A computer-readable storage medium, characterized in that: The method comprises computer program instructions, and when the computer program instructions are executed by an electronic device, the computing device performs the method as claimed in any one of claims 1 to 8.

19. A computer program product comprising instructions, characterized in that The computer program product stores instructions, and when the instructions are executed by an electronic device, the electronic device implements the method according to any one of claims 1 to 8.

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