An assembly for integrating a micro-optical device

Abstract

The subject matter of the present disclosure is directed to an assembly (100) for integrating a micro-optical device (10), comprising a waveguide (WG) chip and a substrate. The waveguide chip (20) has opposing first and second facets (22a, 22b) and at least one second waveguide (21) disposed therein between the first and second facets (22a, 22b). The second waveguide (21) is arranged between a first cladding (23) and a second cladding (24), wherein the first cladding (23) and the at least one second waveguide (21) have a common flat surface (25). The second cladding (24) may only cover a part of the common flat surface (25) such that the first cladding (23) comprises at least one free surface part (26a) beside the second cladding (24) which is free from the second cladding (23). The substrate (30) comprises a substrate base (31) and at least one first pedestal (32) being vertically arranged between the substrate base (31) and the at least one waveguide chip. The at least one first pedestal (32) is configured to vertically align the butt-coupling between the second waveguide (21) of the waveguide chip with a first waveguide (11) of a micro-optical device (10), which is supported by the second pedestals 35. At least one, preferably each, of the at least one free surface part (26a) of the first cladding (23) may contact a respective first pedestal (32).

Description

[0001]PVARO001WO / 10.12.202412024156103_PVARO001WO_HEP_20241210090335An assembly for integrating a micro-optical device The subject matter of the present disclosure is directed to an assembly for integrating a micro-optical device, such as a Pho- 5 tonic Integrated Circuit (PIC), comprising a waveguide (WG) chip and a substrate, and a method for manufacturing an assembly to integrate at least one micro-optical device. The technique disclosed herein provides micron or sub-micron 10 precision, in particular for coupling a fiber containing element such as a multi-channel fiber array to the PIC of such an assem- bly or for coupling multiple PICs to each other using a wave- guide chip. 15 Space must be used efficiently when assembling complex optical subassemblies or modules having highly integrated Photonic Inte- grated Circuits (PICs). Coupling of light into these PICs to / from external fibers presents a particular challenge. Fiber coupling is typically achieved using active alignment, which is20 expensive, time consuming, and can take up value space in an as- sembly. Current solutions to achieve fiber coupling involve either (i) actively aligning the PICs directly to fiber blocks, or (ii) us- 25 ing individual V-groove arrays aligned to the PICs using active alignment techniques or less accurate passive techniques. Active alignment techniques are time consuming and require expensive equipment, whereas passive alignment techniques can result in larger coupling losses, and hence lower performance. 30 US11543592 B2 discloses an assembly comprising at least one pho- tonic integrated circuit (PIC) chip. The at least one PIC chipPVARO001WO / 10.12.202422024156103_PVARO001WO_HEP_20241210090335has a first surface and has at least one first waveguide for op- tical signals. The assembly further comprises a substrate and at least one waveguide (WG) chip. 5 The at least one waveguide (WG) chip has first and second facets and a second surface. The second surface has second bumpers af- fixable to the first bumpers on the first side of the substrate. The at least one WG chip has at least one second waveguide dis- posed therein between the first and second facets. 10 The at least one second waveguide at the second facet is config- ured to couple the optical signals with the at least one first waveguide of the at least one PIC chip. 15 The substrate has a first side with first bumpers. The first bumpers are affixable adjacent the first surface of the at least one PIC chip. The first surface of the PIC chip has a plurality of second bumpers affixable to the first bumpers. One or more stands are vertically arranged between the substrate and at 20 least one of the at least one WG chip and the at least one PIC, the one or more stands being configured to horizontally align the butt-coupling between the at least one second waveguide of the at least one WG chip with the at least one first waveguide of the at least one PIC chip. The horizontal position of the 25 second waveguide on the substrate is defined by the respective stands and by the position of the waveguide within the waveguide chip which might be difficult to be spotted. The subject matter of the present disclosure is directed to an 30 assembly for integrating at least one micro-optical device and a method to overcoming, or at least reducing the effects of the problems set forth above and in particular to allow an easy andPVARO001WO / 10.12.202432024156103_PVARO001WO_HEP_20241210090335precise positioning of a micro-optical device with respect to a waveguide chip. The object is achieved by the characteristics of the independent 5 claims. An assembly for integrating at least one micro-optical device, in particular a photonic integrated circuit (PIC) chip, com- prises at least one waveguide chip and a substrate for receiving 10 the at least micro-optical device. Within this context the substrate is a carrier substrate which allows electrical and / or optical connections, such as an optical platform, an Electro-Optical Circuit Board (EOCB) or an Electro- 15 Optical Printed Circuit Board (EOPCB). The at least one micro-optical device has at least a first face and comprises at least one first waveguide for optical signals. 20 The at least one waveguide chip has opposing first and second facets and may have opposing third and fourth facets. The at least one waveguide chip has at least one second waveguide dis- posed therein between the first and second facets. 25 The first facet is configured to butt-couple to the first face of the at least one micro-optical device, at least one of the at least one second waveguide at the first facet is being config- ured to butt-couple optical signals with at least one of the at least one first waveguide of the at least one micro-optical de- 30 vice. The number of the first and the second waveguides and the lateral distances between the waveguides may correspond to each other.PVARO001WO / 10.12.202442024156103_PVARO001WO_HEP_20241210090335Thus, the waveguide chip is made for a functional optical con- nection with the micro-optical device. The at least one waveguide chip comprises a first cladding and a 5 second cladding. The at least one second waveguide is arranged between the first cladding and the second cladding. The at least one second waveguide is arranged such that the first cladding and the at least one second waveguide have a common flat sur- face, preferably disposed in a plane. 10 A process for forming such a waveguide chip is for example dis- closed in European Patent EP 2 219 059 B1. The second cladding only covers a part of the common flat sur- 15 face such that the first cladding comprises at least one free surface part beside the second cladding which is free from the second cladding. Alternatively or additionally, the first clad- ding only covers a part of the second cladding such that the second cladding comprises at least one free surface part beside 20 the first cladding which is free from the first cladding. Preferably, the waveguide chip either comprises at least two free surface parts of the first cladding or at least two free surface parts of the second cladding. 25 Preferably, the second waveguide is arranged in a waveguide plane defined by the boundary between the first and the second cladding which coincides with the free surface parts. 30 The substrate for receiving the at least one micro-optical de- vice is in contact with the at least one waveguide chip.PVARO001WO / 10.12.202452024156103_PVARO001WO_HEP_20241210090335The substrate comprises a substrate base and at least one, pref- erably monolithically integrated, first pedestal being verti- cally arranged between the substrate base and the at least one waveguide chip and preferably in contact with the substrate base 5 and the waveguide chip. Within this application vertical means a direction perpendicular to the bottom surface of the substrate base. Analogously, a hor- izontal direction or an x- and an y direction are parallel to 10 the bottom surface of the substrate base. Within this application a single pedestal may be formed as a pillar or, alternatively, the pedestal may be formed as a frame, for example comprising at least one horizontally arranged bar. 15 One or a number of pillars and / or frames may be arranged on the substrate base to carry the waveguide chip. In particular, the top surface of the at least one first pedes- 20 tal defines a first plane parallel to a bottom surface of the substrate base, preferably the top surfaces of all first pedes- tals define the first plane. The one or more first pedestals are configured to vertically25 align the butt-coupling between the at least one second wave- guide of the at least one waveguide chip with the at least one first waveguide of the at least one micro-optical device, in particular by providing a defined vertical position of the sec- ond waveguides. 30 The one or more first pedestals preferably are configured to horizontally align the waveguide chip, such that for example thePVARO001WO / 10.12.202462024156103_PVARO001WO_HEP_20241210090335at least one second waveguide at the first facet and / or at the second facet is parallel to the bottom of the substate base. At least one, preferably each, of the at least one free surface 5 part of the first cladding or at least one, preferably each, of the at least one free surface part of the second cladding con- tacts a respective first pedestal. As the first pedestals contact the free surface, the first plane10 may coincide with the waveguide plane, which preferably is par- allel to the bottom surface of the substrate base. The vertical position of the second wave guide is hence defined by the verti- cal position of the top surface of the pedestals. 15 Thus, vertical positioning of the waveguide chip is very easy, because the waveguide chip has only to be put on the first ped- estals to bring the first facet and the second waveguide into a defined vertical position. 20 Pedestals can be formed on or in a substrate with a high preci- sion. Hence, the vertical positioning of the waveguide chip is not only easy but also very precise. In order to realize highest precision, the pedestals can be mon- 25 olithically integrated, for example by a lithographic or etching process, or can be produced using additive methods such as im- printing. The pedestals may have a vertical length of a few micrometres up 30 to 1mm. The height of the pedestals, or rather the depth of cavities be- tween the pedestals is not crucial. They need to generate enoughPVARO001WO / 10.12.202472024156103_PVARO001WO_HEP_20241210090335space to fit the waveguide chip, in particular the second clad- ding, and preferably the micro-optical device, in particular the interposer, into them without them touching the substrate sur- face. 5 The overall precision of aligning a PIC to the waveguide chip is in the range ±0.5µm to ±1µm. A vertical positioning can be achieved with a precision of 10 ±500nm. A micro-optical device may be added to the assembly and may be placed on the substrate. This can be done in a conventional way by providing bumpers which have a vertical extension to verti- 15 cally align the micro-optical device with the waveguide chip, for example by active alignment using an optical loop back. Preferably, the substrate may comprise at least one second ped- estal for receiving at least one micro-optical device, wherein 20 the at least one second pedestal is configured for contacting at least one micro-optical device. In particular, the top surface of the at least one second pedes- tal defines a second plane parallel to a bottom surface of the25 substrate base. Preferably, the top surfaces of all second ped- estals define the second plane. Preferably, the second plane is parallel to a first plane defined by first pedestals. The one or more second pedestals are preferably configured to30 vertically align the butt-coupling between the at least one sec- ond waveguide of the at least one waveguide chip with the atPVARO001WO / 10.12.202482024156103_PVARO001WO_HEP_20241210090335least one first waveguide of the at least one micro-optical de- vice, in particular by providing a defined vertical position of the first waveguides. 5 The one or more second pedestals are preferably configured to horizontally align the micro-optical device, such that for exam- ple the first waveguide is parallel to the bottom of the sub- strate at least at the first face. 10 Preferably, the second plane is arranged in a vertical position such that the micro-optical device can be simply put on the sec- ond pedestals and the first waveguide has the appropriate verti- cal position to vertical align with the second waveguide. 15 An assembly may be provided with second pedestals of different kind, in particular of different vertical lengths and / or differ- ent horizontal extensions, to allow placement of micro-optical devices of respective different kinds on the assembly. 20 Different assemblies with respective different second pedestals may be provided to allow placement of micro-optical devices of respective different kinds on a respective assembly. The difference in height between the at least one second pedes- 25 tal and the at least one first pedestal provides to position the waveguide of the waveguide chip exactly on the same height as the waveguide of the micro-optical device. The height difference of the different kinds of pedestals, in30 particular the height difference between the first and the sec- ond plane, may have a precision of less than 20%, preferably less than 5%.PVARO001WO / 10.12.202492024156103_PVARO001WO_HEP_20241210090335The height difference between first and second pedestals, in particular the height difference between the first and the sec- ond plane, may be in a range between 100nm to 6µm. 5 The height difference may have a precision of less than ±100nm, preferably less than + / -12nm, in particular depending on the ab- solute height difference. For example, a height difference of 250nm can be etched with a 10 precision of less than ±50nm, preferably less than ±12nm. The substrate may comprise at least further pedestals, for exam- ple third, fourth and / or fifth pedestals, of different types having different vertical lengths and / or different horizontal 15 extensions for receiving further micro-optical devices. In particular, the upper surfaces of pedestals of a respective type may define a plane parallel to the bottom of the substrate. The height difference between each type of pedestal, in particu- 20 lar the height difference between two planes each defined by pedestals of a particular type, may be in a range between 100nm to 6µm. The absolute and the relative position, in particular vertical 25 position, of each plane may be determined and fixed reliably and accurately. As a result, micro-optical devices of different types can be placed exactly in relation to each other without much effort. 30 Once the waveguide chip and / or the micro-optical device is put on a respective pedestal, the waveguide chip and / or the micro- optical device may have to be laterally moved in order to 2024156103_PVARO001WO_HEP_2024121009033510 achieve an appropriate position in in x-y- direction. The move- ment may take place under visual control. Preferably the at least one first and / or second pedestal has an 5 extension in x- and / or in y-direction, preferably of at least 5- 500µm, which allows a lateral shifting of the waveguide chip and / or the micro-optical device. The substrate may comprise at least one shoulder for x-y align- 10 ment. The shoulder may be in butt-coupling contact with the first, second, third and / or fourth facet of at least one wave- guide chip and / or may be configured to butt-couple to a lateral face of the micro-optical device. 15 The shoulder may be part of the substrate which has a vertical extension larger than the pedestals. When positioning the wave- guide chip and / or the micro-optical device, the waveguide chip and / or the micro-optical device may be put on the respective first or second pedestals and may then horizontally be moved un- 20 til the waveguide chip and / or the micro-optical device is in butt coupling contact with the shoulder. The at least one shoulder may be formed by a third pedestal hav- ing a larger vertical extent than the first and / or second pedes- 25 tal. The at least one shoulder may be formed as a part of a first and / or second pedestal. A first pedestal provides for a vertical positioning of the waveguide chip and may at the same time provide for a lateral arrangement of a micro-optical de- vice. A second pedestal provides for a vertical positioning of a30 micro-optical device and may at the same time provide for a lat- eral arrangement of the waveguide chip. 2024156103_PVARO001WO_HEP_2024121009033511 The shoulder may have at least one lateral extension to allow a shift of the waveguide chip and / or the micro-optical device along the shoulder. 5 A shoulder may provide for a guidance during lateral translation and / or for a stop. At least one free surface part may comprise at least one refer- ence mark. 10 The reference mark may be captured visually and / or optically and may be used for visually or optically supported positioning, in particular for finding an appropriate lateral position of the waveguide chip on the substrate during placement of the wave- 15 guide chip. The reference mark may protrude and may point away from the first cladding or from the second cladding. 20 A surface part of the substrate and / or at least one of the at least one first pedestal may comprise an opening for receiving the reference mark. Additionally or alternatively, the reference mark may form an 25 opening for receiving at least one of the at least one first pedestal or a corresponding reference mark arranged on the sub- strate. A surface part of the substrate and / or at least one of the at 30 least one second pedestal may comprise an opening for receiving a reference mark, positioned on a micro-optical device. 2024156103_PVARO001WO_HEP_2024121009033512 Additionally or alternatively, a reference mark on a micro-opti- cal device may form an opening for receiving at least one of the at least one second pedestal or a corresponding reference mark 5 arranged on the substrate. A reference mark pointing away from a surface and able for being received in a corresponding opening provides for a precise posi- tioning in x-y direction and prevents lateral movement after the 10 positioning. The reference mark may have a specific form, for example a cir- cular, annular or cruciform cross section, which only allows to be received by a suitable opening having an appropriate form. 15 The substrate and / or the at least one waveguide chip, and in particular a micro-optical device, may comprise an optical marker for x-y alignment. The optical marker may be captured visually and / or optically and may be used for visually or opti-20 cally supported positioning, in particular for finding an appro- priate lateral position of the waveguide chip and / or the micro- optical device during placement on the substrate. The optical markers in the substrate are preferably monolithically inte- grated and fabricated in the same process as the pillars to 25 achieve the highest position accuracy. The optical markers on the at least one waveguide chip are fabricated of the same mate- rial and in the same process as the waveguides to achieve the highest position accuracy. 30 The placement of the markers on the PIC may be integrated in the fabrication process by the manufacturer. They may be placed on the top and / or bottom side of the PIC and may be made to be vis- ible in the microscope of a pick and place machine. 2024156103_PVARO001WO_HEP_2024121009033513 The substrate may comprise at least one trench for receiving an adhesive. 5 The trench may be arranged for receiving an adhesive for fixa- tion of the waveguide chip and / or of at least one micro-optical device. Preferably, there are two trenches with two depths, one for the 10 waveguide chip and one for the micro-optical device. But there may be also only one trench with one depth for both parts. Nei- ther the second cladding nor the interposer must touch the bot- tom plane of the trench(es) so that waveguide chip and the mi- cro-optical device rest only supported on the pedestals. 15 In particular, the trench may be arranged between a plurality of first pedestals and / or between a plurality of second pedestals or a first and / or a second pedestal, in particular if formed as a frame, may surround the trench. 20 The trench may have a vertical extension to allow receiving an appropriate amount of adhesive and / or an electronic component bonded to a micro-optical device, preferably the trench has ver- tical extension between 20µm and 400µm and / or a lateral exten- 25 sion between 500µm and 50mm. The assembly may comprise an adhesive for fixation of the wave- guide chip and / or of at least one micro-optical device, prefera- bly arranged in a trench. 30 The assembly may comprise at least one micro-optical device, in particular a photonic integrated circuit (PIC) chip and / or an electrical interposer. 2024156103_PVARO001WO_HEP_2024121009033514 In particular, the at least one micro-optical device may be ar- ranged on at least one second pedestal arranged on the substrate such that the second pedestal contacts the micro-optical device, 5 in particular as described above, and may be in butt-coupling contact with the waveguide chip. As the first and / or the second pedestals are formed with a high precision, the functional optical contact between the waveguide 10 chip and the micro-optical device is highly reliable. The assembly may comprise an electrical interposer bonded to a photonic integrated circuit chip being in contact with at least one second pedestal. 15 The electrical interposer may be arranged in a trench of the substrate. The electrical interposer may be fixed to the PIC and may be 20 placed inside of the trench but having no contact to the trench itself. The adhesive may be placed between the bottom of the trench and the electrical interposer. It may also flow around the electrical interposer and / or into the space between inter- poser and PIC. So, the electrical interposer may be embedded in 25 adhesive. The electrical interposer preferably may be bonded to the PIC before the assembly. 30 It is possible that no interposer is needed. In that case the PIC is bonded to the substrate with the adhesive in the trench. The assembly may comprise at least one fiber containing element, such as a fiber block, a fiber-ribbon or a single fiber, wherein 2024156103_PVARO001WO_HEP_2024121009033515 the at least one second waveguide at the second facet of the at least one waveguide chip is configured to couple optical signals with the at least one fiber containing element. 5 The fiber containing element may provide for optically connect- ing the assembly. The fiber containing element may be bonded to the waveguide chip and / or to the substrate. 10 The fiber containing element may be actively aligned using an optical loop back on the at least one waveguide chip. Alternatively, the fiber containing element may be placed on the 15 substrate by passive alignment, using pedestals and / or shoulders on the substrate, similar as described above for the at least one waveguide chip and the at least one micro-optical device. The substrate may comprise electrically conductive paths, pref-20 erably for contacting the micro-optical device and / or an elec- trical interposer. In particular, the substrate may comprise a printed circuit board (PCB). The electrically conductive path may comprise materials such as copper and / or nickel and / or gold. 25 The substrate may comprise silicon and / or glass and / or resin and / or a PCB material, such as FR4. Pedestals and / or shoulders may be formed from silicon and / or glass and / or resin. 30 The assembly may further comprise a cooling element, in particu- lar at least one cooling rip or a Peltier element. The substrate 2024156103_PVARO001WO_HEP_2024121009033516 may be arranged on the cooling element and / or the cooling ele- ment may be arranged on the side of the substate which is oppo- site to the side which carries the waveguide chip. 5 The object is also achieved by a method for manufacturing an as- sembly to integrate at least one micro-optical device, in par- ticular a photonic integrated circuit chip. Preferably the as- sembly to integrate at least one micro-optical device is an as- sembly as described above. 10 The at least one micro-optical device has at least a first face and has at least one first waveguide for optical signals. The method comprises the following steps. 15 At least one waveguide chip is provided, which has opposing first and second facets and opposing third and fourth facets is provided. The at least one waveguide chip has at least one sec- ond waveguide disposed therein, such that there is connection 20 for transferring optical signals between the first facet and the second facet. The first facet is configured to butt-couple to the first face of the at least one micro-optical device. The at least one sec- 25 ond waveguide at the first facet is configured to butt-couple the optical signals with the at least one first waveguide of the at least one micro-optical device. The at least one waveguide chip comprises a first cladding and a30 second cladding and the at least one second waveguide is ar- ranged between the first cladding and the second cladding, wherein the first cladding and the at least one second waveguide have a common flat surface. The second cladding only covers a 2024156103_PVARO001WO_HEP_2024121009033517 part of the common flat surface such that the first cladding comprises at least one free surface part beside the second clad- ding which is free from the second cladding. Alternatively or additionally, the first cladding only covers a part of the sec- 5 ond cladding such that the second cladding comprises at least one free surface part beside the first cladding which is free form the first cladding. Such a waveguide chip may be provided by a method as for example 10 disclosed in EP 2 219 059 B1. A substrate for receiving the at least micro-optical device and the at least one waveguide chip is provided. 15 The substrate comprises a substrate base and one or more, pref- erably monolithically integrated, first pedestals. The one or more first pedestals are configured to vertically align the butt-coupling between the at least one second wave- 20 guide of the at least one waveguide chip with the at least one first waveguide of the at least one micro-optical device. In particular, the top surfaces of the at least one first pedes- tal, preferably the top surfaces of all first pedestals being in 25 contact with one waveguide chip, define a first plane parallel to a bottom surface of the substrate base. In a further step the at least one waveguide chip is placed on the substrate, such that at least one, preferably each, of the30 least one free surface part contacts a respective first pedes- tal. 2024156103_PVARO001WO_HEP_2024121009033518 As the free surface parts contact a respective first pedestal further steps for a vertical alignment are not necessary, such as providing bumpers of an appropriate dimension, dosing an ap- propriate amount of adhesive or bumper material and measuring 5 the vertical position of the waveguide chip or the relative po- sition of the waveguide chip with respect to the substrate or the micro optical device. The substrate may comprise one or more, preferably monolithi-10 cally integrated, second pedestals. In particular, the top sur- faces of the at least one second pedestal, preferably the top surfaces of all second pedestals for carrying one micro optical device, define a second plane parallel to a bottom surface of the substrate base. Preferably the second pedestals are of dif- 15 ferent kind, in particular of different vertical lengths, as compared to the first pedestals. Preferably, the height of the second pedestals differs from the height of the first pedestals in such a way, that there is dif- 20 ference in height between the first plane and the second plane. There may be a difference in height between the second pedestal and the first pedestal in such a way that the waveguide of the waveguide chip is exactly on the same height as the waveguide of 25 the micro-optical device. The method may comprise the step of providing the at least first pedestal and preferably at least one second pedestal on the sub- strate by monolithically integration or by using an additive 30 method, in particular imprinting. A difference in height between the second pedestal and the first pedestal provides for the waveguide of the waveguide chip being 2024156103_PVARO001WO_HEP_2024121009033519 exactly on the same height as the waveguide of the micro-opti- cal device. The method may comprise the step of placing at least one micro- 5 optical device on the substrate, in particular such that the mi- cro-optical device contacts at least one second pedestal. Ver- tical alignment of the micro-optical device is as easy as the vertical alignment of the waveguide chip. 10 The method may comprise the step of aligning the one waveguide chip and / or the one micro-optical device along the x-y direc- tion. The waveguide chip and / or the micro-optical device may be later-15 ally moved along one or more shoulders arranged on the sub- strate. The waveguide chip and / or the micro-optical device may be later- ally moved first along a first direction along a shoulder and / or20 until a stop occurs at a second shoulder. Subsequently the wave- guide chip and / or the micro-optical device may be laterally moved along a second direction along the second shoulder and / or until a stop occurs. 25 The first and the second direction preferably are perpendicular to each other and may correspond to an x- and an y- direction, being parallel to the bottom plane of the substrate and being perpendicular to the vertical or z-direction. 30 The waveguide chip and / or the micro-optical device may be posi- tioned along the x-y direction using at least one reference mark arranged on the waveguide (WG) chip and / or using at least one reference mark arranged on the substrate. 2024156103_PVARO001WO_HEP_2024121009033520 The reference mark may be received by a respective opening of the counterpart. 5 Once the reference mark is received by a respective opening, the waveguide chip and / or the micro-optical device may not be moved anymore and have a fixed position in x and y direction. The reference mark and the respective opening are designed such 10 that they do not change the vertical position defined by the first and / or second pedestals. The waveguide chip and / or the micro-optical device may be posi- tioned along the x-y direction using at least one optical marker 15 arranged in the substrate and / or on the waveguide chip and / or on the micro-optical device. The waveguide chip and / or the micro-optical device may be moved under visual or optical control until the optical marker has20 reached an intended position relative to the substrate or to an- other element placed on the substrate. The at least one waveguide chip and / or the one micro-optical de- vice may be fixed to the substrate, in particular by providing 25 an adhesive and preferably by placing the adhesive in a trench arranged in the substrate. Placement and lateral movement may be performed by a conven- tional pick and place tool, preferably by a tool reaching accu- 30 racies of less than ±1µm, preferably of less than ±0.5µm. Further advantageous aspects of the invention are explained in the following by means of exemplary embodiments and the figure. 2024156103_PVARO001WO_HEP_2024121009033521 In the drawing, in a schematic manner: Figure 1: shows a schematic illustration of a first example of a waveguide chip according to the invention; 5 Figure 2: shows a schematic illustration of a second example of a waveguide chip according to the invention; Figure 3: shows a schematic illustration of a first example of an assembly according to the invention in a first cross-sectional view; 10 Figure 4: shows a schematic illustration of the first exam- ple of an assembly according to the invention in a second cross-sectional view; Figure 5: shows a schematic illustration of the first exam- ple of an assembly according to the invention in 15 top view; Figure 6: shows a schematic illustration of details of pos- sible connections between a substrate and a wave- guide chip; Figure 7: shows a schematic illustration of details of pos-20 sible connections between a substrate and a micro- optical device; Figure 8: shows a schematic illustration of a second example of an assembly according to the invention in a first side view; 25 Figure 9: shows a schematic illustration of methods steps of a first example of a method according to the in- vention; Figure 10: shows a schematic illustration of methods steps of a second example of a method according to the in- 30 vention; Figure 11: shows a schematic illustration of a third example of an assembly according to the invention in a second cross-sectional view. 2024156103_PVARO001WO_HEP_2024121009033522 Figure 1 shows a schematic illustration of a first example of a 5 waveguide chip 20 according to the invention in a cross-sec- tional view in an y-z plane. The waveguide chip 20 has opposing first and second facets 22a, 22b (see figures 4, 5) and opposing third and fourth facets 22c,10 22d. The waveguide chip 20 has several second waveguides 21 dis- posed therein between the first and second facets 22a, 22b (see figures 4, 5). The waveguide chip 20 comprises a first cladding 23 and a second 15 cladding 24. The second waveguides 21 are arranged between the first cladding 23 and the second cladding 24, wherein the first cladding 23 and the second waveguides 21 have a common flat sur- face 25. 20 In this example the second cladding 24 only covers a part of the common flat surface 25 such that the first cladding 23 comprises two free surface parts 26a beside the second cladding 24 which are free from the second cladding 23. 25 Figure 2 shows a schematic illustration of a second example of a waveguide chip 20 according to the invention in a cross-sec- tional view in an y-z plane. The second example of a waveguide chip 20 is similar to the fist example shown in figure 1. In the second example the first cladding 23 only covers a part of the 30 second cladding 24 such that the second cladding 24 comprises two free surface parts 26b beside the first cladding 23 which are free from the first cladding 23. 2024156103_PVARO001WO_HEP_2024121009033523 For both the first example as shown in figure 1 and the second example shown in figure 2 the free surface parts 26a, 26b coin- cide with the common flat surface 25 and therefore define the vertical (in z-direction) position of the second waveguides 21. 5 Figure 3 shows a schematic illustration of a first example of an assembly 100 according to the invention in a in a second cross- sectional view in an y-z plane. 10 The assembly comprises a waveguide chip 20, as show in figure 1, and a substrate 30 for receiving a micro-optical device 10 (see figure 4). The substrate 30 is in contact with the waveguide chip 20. 15 The substrate 30 comprises a substrate base 31 and four mono- lithically integrated first pedestals 32 being vertically ar- ranged between the substrate base 31 and the waveguide chip 20. 20 Generally, there can be any number of pedestals 32, 35. In par- ticular, the first pedestals 32 may be formed as a horizontally connected frame as shown in figure 9 or as a plurality of sepa- rate pillars as shown in figure 10. 25 Each, of the free surface parts 26a of the first cladding 23 contacts a respective first pedestal 32. The top surfaces 33 of the first pedestal 32 define a first plane parallel to a bottom surface 34 of the substrate base 31, 30 where the first plane coincides with the common flat surface 25. 2024156103_PVARO001WO_HEP_2024121009033524 Thus, the design of the waveguide chip 20 having second wave- guides 21 with free surface parts 26a forming a common flat sur- face 25 and the design of the substrate having first pedestals 32 with a flat upper surface 33 being in contact with the free 5 surface parts 26a define the vertical position of the second waveguides 21. The assembly comprises a trench 39a for receiving an adhesive 40 for fixing the waveguide chip 20. 10 The trench 39a is arranged between the first pedestals 32. Figure 4 shows a schematic illustration of the first example of an assembly 100 according to the invention in a second cross- 15 sectional view in an x-z plane. The assembly further comprises a micro-optical device 10 having a first face 12 and a first waveguides 11 for optical signals. 20 The first facet 22a of the waveguide chip 20 is configured to butt-couple to the first face 12 of the micro-optical device 10. The substrate 30 comprises second pedestals 35 for receiving and contacting a micro-optical device 10. The top surfaces of the25 second pedestals 35 define a second plane 36b parallel to a bot- tom surface 34 of the substrate base 31. The micro-optical device 10 contacts the second pedestals 35. 30 The first pedestals 32 and the second pedestals 35 are config- ured to vertically align the butt-coupling between the at least one second waveguide 21 of the at least one waveguide chip with 2024156103_PVARO001WO_HEP_2024121009033525 the at least one first waveguide 11 of the micro-optical device 10. The second plane 36b is arranged such that the first waveguides 5 11 at the first face 12 have a vertical position which coincides with the vertical position of the at least one second waveguide 21 of the at least one waveguide chip at the face 22a. The ver- tical position of the at least one second waveguides 21 is de- fined by a first plane defined by the top surfaces 33 of the 10 first pedestals 32. The micro-optical device 10 is a photonic integrated circuit (PIC) chip, which is bonded to an interposer 70. 15 The substrate 30 comprises a second trench 39b which receives the interposer 70 and adhesive 40 for fixing the interposer 70 together with the micro-optical device 10 to the substrate 30. The adhesive 40 fixes the package of the interposer 70 and the 20 PIC 10 to the substrate 30. It may also flow between the PIC 10 and the interposer 70 but those are already bonded (fixed) to- gether. When manufacturing the assembly, first a substrate 30 may be 25 formed. Trenches 39a, 39b and second pedestals 35 may be formed from a flat blank by a subtracting method such as etching. Also, base parts 32a of first pedestals 32 may be formed by a subtracting method, top parts 32b protruding from the original 30 surface of the blank may be subsequently formed by an additive method such as imprinting, 3D printing or other deposition method such as PVD (physical vapor deposition) or CVD (chemical vapor deposition). 2024156103_PVARO001WO_HEP_2024121009033526 Alternatively, initially, a top most layer of a few microns thickness of silicon dioxide may be thermally grown on a silicon substrate 30 to form a flat blank or it may be applied for exam- 5 ple by a PVD or a CVD process. The layer thickness is very well controlled in all of these methods which is why they are suited for very precise thin layers. Alternatively, this layer may be etched completely away when 10 forming the first pedestals 32 but not for the second pedestals 35. The thickness of the spacer layer 32b is very well con- trolled / controllable. The thickness of the layer may for example be adapted to the vertical position of the first waveguide 11 within the micro-optical device 10 and / or to the vertical posi- 15 tion of the second waveguide 21 within the waveguide chip 20. Additionally, reference marks 38c (see figure 6) may be inte- grated in the one waveguide chip 20 or added by the additive method. 20 The reference marks 38c can be made of cladding material or even core material. In that case they are fabricated in the same pro- cess as the other structures. Or they can be added by additive manufacturing. 25 Figure 5 shows a schematic illustration of the first example of an assembly according to the invention in top view. The second waveguides 21 (see also figures 1 and 3) at the first 30 facet 22a are configured to butt-couple the optical signals with the first waveguide 11 (see figure 4) of the micro-optical de- vice 10. 2024156103_PVARO001WO_HEP_2024121009033527 The assembly 100 comprises at least one fiber containing element 50, in this example a fiber block, is bonded to the waveguide chip 20. 5 Alternatively, the fiber containing element 50 may be fixed to the substrate to make the bond mechanically more durable. The second waveguides 21 at the second facet 22b of the wave- guide chip 20 are configured to couple optical signals with the 10 fiber containing element 50. The substrate 30 comprises electrically conductive paths 42 for contacting the micro-optical device 10 and / or the interposer 70. 15 The substrate 30 and the waveguide chip 20 comprise optical markers 41 for x-y alignment under visual control. In this example, the optical markers 41 do not need to function as mechanical stoppers but may be flat as they are used under 20 visual control. However, the waveguide chip 20 may alternatively or additionally comprise reference marks 28a, 28b and / or 28c as shown in figure 6. 25 Figure 6 shows a schematic illustration of details of examples of possible connections between first pedestals 32 of substrate 30 and a waveguide chip 20. 30 The free surface part 26a, 26b may comprise a reference mark 28a and a surface of the substrate 30, in this case of a first ped- estal 32, may comprises an opening 38a for receiving the refer- ence mark 28a. 2024156103_PVARO001WO_HEP_2024121009033528 A reference mark 28b on the free surface part 26a, 26b of the waveguide chip 20 may form an opening 38b for receiving a first pedestal 32. 5 Alternatively, an opening 28c may be formed in the free surface part 26a, 26b of the waveguide chip 20 for receiving a reference mark 38c, arranged in a first pedestal 32. 10 In each example the top surface of the first pedestal 32 con- tacts the free surface part 26a, 26b. Reference marks 28a, 28b, 28c and respective openings 38a, 38b, 38c are designed for x-y alignment under mechanical control. 15 The z-alignment is solely defined by the vertical position of the second plane 36b, respectively by the second pedestals 35 which may differ in height from the first pedestals 32 by ΔH (see for example figure 11). 20 Figure 7 shows a schematic illustration of details of examples of possible connections between a substrate 30 and a micro-opti- cal device 10. 25 The micro-optical device 10 may comprise a reference mark 28a, a second pedestal 35 of the substrate 30 may comprises an open- ing 38a for receiving the reference mark 28a. A reference mark 28b on the micro-optical device 10 may form an 30 opening 38b for receiving a second pedestal 35. 2024156103_PVARO001WO_HEP_2024121009033529 Alternatively, an opening 28c may be formed in the micro-optical device 10 for receiving a reference mark 38c, arranged in a sec- ond pedestal 35. 5 In each example the top surface of the second pedestal 35 con- tacts the micro-optical device 10. Thus, the pedestals define the vertical position whereas the reference marks define a lateral position. 10 Figure 8 shows a schematic illustration of a second example of an assembly 100 according to the invention in a first side view. The second example is similar to the first example shown in fig- ure 4, but the substrate 31 is placed on a cooling element 60. 15 Figure 9 shows a schematic illustration of methods steps of a first example of a method according to the invention for manu- facturing an assembly 100 as shown in figure 4. 20 A substrate 30 is provided and a waveguide chip 20 is provided, which is placed on the substrate in a first step I. In a further step II a micro-optical device 10 is placed on the substrate. In this example the waveguide chip 20 is deposited on first ped- 25 estals 32 which are formed as a frame on a substrate base 31. The micro-optical device 10 is deposited on second pedestals 35 formed as cylindrical columns. 30 Figure 10 shows a schematic illustration of methods steps of a second example of a method according to the invention, similar to figure 9. 2024156103_PVARO001WO_HEP_2024121009033530 In the second example a substrate 30 is provided having four first pedestals 32 which are formed as pillars and which are ar- ranged on a substrate base 31. 5 Figure 11 shows a schematic illustration of the third example of an assembly 100 according to the invention in a second cross- sectional view in an x-z plane. The assembly further comprises a micro-optical device 10 having 10 a first face 12 and a first waveguide 11 for optical signals. It is supported by second pedestals 35. The assembly further comprises a waveguide chip 20 with a second waveguide 21 for optical signals embedded in a first cladding 2315 and a second cladding 24 with partial openings. The first clad- ding 23 and the second waveguide 21 comprises common flat sur- face 25 arranged in a precise plane which is in supporting con- tact with first pedestals 32. 20 A first facet 22a of the waveguide chip 20 is configured to butt-couple to the first face 12 of the micro-optical device 10. Substrate 30 comprises first pedestals 32 for receiving and con- tacting a waveguide chip 20. The top surfaces of the first ped- 25 estals 32 define a first plane 36a parallel to a bottom surface 34. The substrate 30 comprises second pedestals 35 for receiving and contacting a micro-optical device 10. The top surfaces of the30 second pedestals 35 define a second plane 36b parallel to a bot- tom surface 34. 2024156103_PVARO001WO_HEP_2024121009033531 The height of first pedestals 32 and the height of the second pedestals 35 generate a difference of height ΔH of the first plane 36a and the second plane 36b, in such a way that the sec- ond waveguide 21 of the waveguide chip 20 is exactly on the same 5 height as the first waveguide 11 of the micro-optical device 10. The substrate 30 may comprise further pedestals of different heights (not shown in the figure) for horizontally aligning waveguides of further micro-optical devices. 10

Claims

2024156103_PVARO001WO_HEP_2024121009033532 Claims 1. An assembly (100) for integrating at least one micro-opti- cal device (10), in particular a photonic integrated cir- 5 cuit (PIC) chip, the at least one micro-optical device (10) having at least a first face (12) and having at least one first waveguide (11) for optical signals, the assembly (100) comprising 10 - at least one waveguide chip (20) having opposing first and second facets (22a, 22b) and opposing third and fourth facets (22c, 22d), the at least one waveguide chip (20) having at least one second waveguide (21) disposed therein between the first and second facets (22a, 22b), 15 the first facet (22a) being configured to butt-couple to the first face (12) of the at least one micro-optical de- vice (10), the at least one second waveguide (21) at the first facet (22a) being configured to butt-couple the op- tical signals with the at least one first waveguide (11) 20 of the at least one micro-optical device (10), the at least one waveguide chip (20) comprising a first cladding (23) and a second cladding (24) and the at least one second waveguide (21) being arranged between the first cladding (23) and the second cladding (24), wherein25 the first cladding (23) and the at least one second wave- guide (21) have a common flat surface (25), wherein the second cladding (24) only covers a part of the common flat surface (25) such that the first cladding (23) com- 30 prises at least one free surface part (26a) beside the second cladding (24) which is free from the second clad- ding (23), and / or2024156103_PVARO001WO_HEP_2024121009033533 the first cladding (23) only covers a part of the second cladding (24) such that the second cladding (24) com- prises at least one free surface part (26b) beside the first cladding (23) which is free from the first cladding 5 (23), - a substrate (30) for receiving the at least one micro-op- tical device (10) and being in contact with the at least one waveguide chip (20), the substrate (30) comprising a10 substrate base (31) and at least one, preferably mono- lithically integrated, first pedestal (32) being verti- cally arranged between the substrate base (31) and the at least one waveguide chip, in particular the top surfaces (33) of the respective first pedestal defining a first15 plane (36a) parallel to a bottom surface (34) of the sub- strate base (31), the at least one first pedestal (32) being configured to vertically align the butt-coupling between the at least one second waveguide (21) of the at least one waveguide 20 chip with the at least one first waveguide (11) of the at least one micro-optical device (10), - wherein at least one, preferably each, of the at least one free surface part (26a) of the first cladding (23) or at least one, preferably each, of the at least one free 25 surface part (26b) of the second cladding (24) contacts a respective first pedestal (32).

2. The assembly (100) according to claim 1, wherein the sub- strate (30) comprises at least one second pedestal (35) for 30 receiving at least one micro-optical device (10), the at least one second pedestal (35) being configured for con- tacting at least one micro-optical device (10), in particu- lar the top surfaces of the at least one second pedestal2024156103_PVARO001WO_HEP_2024121009033534 (35) defining a second plane (36b) parallel to a bottom surface (34) of the substrate base (31), wherein preferably the second pedestal (35) is of different kind, in particu- lar of different vertical lengths. 5 3. The assembly (100) according to claim 1, wherein the sub- strate (30) comprises at least one shoulder (37) for x-y alignment, in butt-coupling contact with the first, second, third and / or fourth facet of at least one waveguide chip 10 (20) and / or configured to butt-couple to a lateral face of the micro-optical device (10).

4. The assembly (100) according to claim 1, wherein at least one free surface part (26a, 26b) comprises at least one 15 reference mark (28), and in particular a surface of the substrate (30) and / or at least one of the at least one first pedestal (32) and / or at least one second pedestal (35) comprises an opening (38a) for receiving a 20 reference mark (28a), and / or a reference mark (28b) on the waveguide chip (20) and / or on the micro-optical device (10) forms an opening (28b) for receiving at least one of the at least one first pedestal 25 (32) or a second pedestal (35) or a corresponding reference mark (38c) arranged on the substrate (30).

5. The assembly (100) according to claim 1, wherein the sub- strate (30) and / or the at least one waveguide chip (20), 30 and in particular a micro-optical device (10), comprises an optical marker (41) for x-y alignment.2024156103_PVARO001WO_HEP_2024121009033535 6. The assembly (100) according to claim 1, wherein the sub- strate comprises at least one trench (39a; 39b) for receiv- ing an adhesive (40) for fixation of at least one micro-op- tical device (10) and / or the at least one waveguide chip 5 (20) and / or an interposer (70), in particular the trench (39a; 39b) being arranged between a plurality of first pedestals (32) and / or between a plurality of second pedestals (35) 10 and / or a first (32) and / or a second pedestal (35) surrounding a trench (39a; 39b).

7. The assembly (100) according to claim 1, wherein the assem- 15 bly (100) comprises at least one micro-optical device (10), in particular a photonic integrated circuit (PIC) chip and / or an electrical interposer (70), in particular ar- ranged on at least one second pedestal (35) arranged on the substrate (30). 20 8. The assembly (100) according to claim 6, wherein the assem- bly (100) comprises an electrical interposer (70) bonded to a photonic integrated circuit chip (10) being in contact with at least one second pedestal (35), more preferably the 25 electrical interposer (70) is arranged in a trench (39a; 39b) of the substrate (30).

9. The assembly (100) according to claim 1, wherein the assem- bly (100) comprises at least one fiber containing element30 (50), such as a fiber block or fiber-ribbon or single fi- ber, wherein the at least one second waveguide (21) at the sec- ond facet (22b) of the at least one waveguide chip (20) is2024156103_PVARO001WO_HEP_2024121009033536 configured to couple optical signals with the at least one fiber containing element (50), wherein in particular the fiber containing element (50) is bonded to the waveguide chip (20) and / or to the substrate (30). 5 10. The assembly (100) according to claim 1, wherein the substrate (30) comprises electrically conductive paths (42), preferably for contacting the micro-optical device (10) and / or electrical interposer (70), and in particular a 10 printed circuit board.

11. Method for manufacturing an assembly (100) to integrate at least one micro-optical device (10), in particular a photonic integrated circuit (PIC) chip, the at least one 15 micro-optical device (10) having at least a first face (12) and having at least one first waveguide (11) for optical signals, preferably according to at least one of the pre- ceding claims, comprising the steps of 20 - providing at least one waveguide chip (20) having oppos- ing first and second facets (22a, 22b) and opposing third and fourth facets (22c, 22d), the at least one waveguide chip (20) having at least one second waveguide (21) dis- posed therein and / or positioned between the first and 25 second facets (22a, 22b), the first facet (22a) being configured to butt-couple to the first face (12) of the at least one micro-optical de- vice (10) , the at least one second waveguide (21) at the first facet being configured to butt-couple the optical 30 signals with the at least one first waveguide (11) of the at least one micro-optical device (10) , wherein the at least one waveguide chip (20) comprises a first cladding2024156103_PVARO001WO_HEP_2024121009033537 (23) and a second cladding (24) and the at least one sec- ond waveguide (21) is arranged between the first cladding (23) and the second cladding (24), wherein the first cladding (23) and the at least one second waveguide (21) 5 have a common flat surface (25) and wherein the second cladding (24) only covers a part of the common flat surface (25) such that the first cladding (23) com- prises at least one free surface part (26a) beside the10 second cladding (24) which is free from the second clad- ding (24), and / or first cladding (23) only covers a part of the sec- ond cladding (24) such that the second cladding (24) com- prises at least one free surface part (26b) beside the 15 first cladding (23) which is free form the first cladding (23), - providing a substrate for receiving the at least one mi- cro-optical device (10) and the at least one waveguide chip (20); the substrate (30) comprising a substrate base20 (31) and one or more, preferably monolithically inte- grated, first pedestals (32), the one or more first ped- estals being configured to vertically align the butt-cou- pling between the at least one second waveguide (21) of the at least one waveguide chip (20) with the at least25 one first waveguide (11) of the at least one micro-opti- cal device (10), in particular the top surfaces of the at least one first pedestal defining a first plane parallel to a bottom surface (34) of the substrate base (31), - the substrate (30) preferably comprising one or more, 30 preferably monolithically integrated, second pedestals (35), in particular the top surfaces of the at least one second pedestal (35) defining a second plane parallel to a bottom surface (34) of the substrate base (31), wherein2024156103_PVARO001WO_HEP_2024121009033538 preferably the second pedestal is of different kind, in particular of different vertical lengths, - placing the at least one waveguide chip (20) on the sub- strate (30), such that at least one, preferably each, of 5 the least one free surface part contacts a respective first pedestal.

12. Method according to claim 11 comprising providing the at least first pedestal (32) and preferably at least one10 second pedestal (35) on the substrate (30) by monolithi- cally integration and / or by using an additive method, in particular imprinting.

13. Method according to claim 11 or 12 comprising the step 15 of placing at least one micro-optical device (10) on the substrate (30), in particular such that the micro-optical device (10) contacts at least one second pedestal (35).

14. Method according to claim 11, 12 or 13 comprising the 20 step of aligning the one waveguide chip (20) and / or the one micro-optical device (10) along the x-y direction, prefera- bly - along one or more shoulders arranged on the substrate (30) 25 and / or - using at least one reference mark (28a, 28b, 28c) ar- ranged on the waveguide chip (20) and / or - using at least one reference mark arranged on the sub- 30 strate (30) and / or2024156103_PVARO001WO_HEP_2024121009033539 - using at least one optical marker (41) arranged in the substrate (30) and / or on the waveguide chip (20) and / or on the micro-optical device (10). 5 15. Method according to claim 11, 12 or 13 comprising the step of fixing the one waveguide chip (20) and / or the one micro-optical device (10) to the substrate (30), in partic- ular by providing an adhesive (40) and preferably placing the adhesive (40) in a trench (39a; 39b) arranged in the 10 substrate (30).

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