Light detection device

Abstract

[Problem] To provide a light detection device that makes it possible to reduce chip size without deteriorating imaging quality. [Solution] A pixel array part of this light detection device has an effective pixel region having a plurality of pixels and a light shielding region disposed around the effective pixel region. The light shielding region has a process dummy region in which a plurality of dummy pixels are disposed in order to suppress processing variations, an effective optical black region for generating a black level reference signal in the plurality of pixels, an ineffective optical black region disposed between the effective pixel region and the effective optical black region without generating the reference signal, and a specific function transistor region having a transistor for executing a specific function. The process dummy region and / or the ineffective optical black region is disposed so as to avoid a region where the specific function transistor region is not present.

Description

Photodetector

[0001] The present disclosure relates to a light detection device.

[0002] Photodetection devices such as image sensors tend to have an increasing number of pixels as miniaturization technology advances. Photodetection devices typically have multiple pixels arranged around an effective pixel area for purposes other than imaging. For example, a technique for providing an optical black area in a light-shielding area around the effective pixel area to suppress blackout is known (see Patent Document 1).

[0003] Furthermore, since a light-shielding member is placed in the light-shielding region that is arranged around the effective pixel region, a step is formed near the boundary between the effective pixel region and the light-shielding pixel region, and since this step causes the shape and size of the pixels near the outer edge of the effective pixel region to become uneven, dummy pixels may be placed along the outer edge of the effective pixel region.

[0004] International Publication No. 2012-144181

[0005] Providing an optical black area or dummy pixels around the effective pixel area increases the chip size, reduces the chip yield, and increases the chip cost. In particular, photodetectors used in mobile applications are required to minimize the chip size without degrading the imaging quality.

[0006] Therefore, the present disclosure provides a photodetector device that allows the chip size to be reduced without degrading electrical characteristics such as imaging quality.

[0007] In order to solve the above problems, according to the present disclosure, there is provided a photodetector device comprising: a pixel array section having a plurality of pixels arranged in a first direction and a second direction intersecting each other; and a guard ring region arranged to surround the pixel array section, wherein the pixel array section has: an effective pixel region having a plurality of pixels; and a light-shielding region arranged around the effective pixel region, wherein the light-shielding region has: a process dummy region in which a plurality of dummy pixels are arranged to suppress process variations; an effective optical black region that generates a reference signal for a black level in the plurality of pixels; a no-object optical black region that does not generate the reference signal and is arranged between the effective pixel region and the effective optical black region; and a specific function transistor region having transistors that perform a specific function, wherein at least one of the process dummy region or the no-object optical black region is arranged to avoid a region where the specific function transistor region is not present.

[0008] At least one of the process dummy area or the irrelevant optical black area may be arranged to avoid a first pixel group that is arranged along the first direction and does not include the transistor, or a second pixel group that is arranged along the second direction and does not include the transistor.

[0009] The specific function transistor region is not arranged on at least one side of the effective pixel region, and at least one of the process dummy region or the no-question optical black region is arranged on at least one side of the effective pixel region on which the specific function transistor region is arranged, and may not be arranged on other sides of the effective pixel region on which the specific function transistor region is not arranged.

[0010] In the area surrounding the effective pixel area where at least one of the process dummy area or the non-issue optical black area is not arranged, the guard ring area may be arranged so as to be in contact with the process dummy area or the non-issue optical black area, or so as to be in contact with the effective pixel area.

[0011] The specific function transistor region may be disposed in a part of the no-interest optical black region.

[0012] The transistors in the specific function transistor region may be provided in a dummy source follower circuit that sets the voltage level of a signal line that transmits pixel signals photoelectrically converted by the plurality of pixels to a reference voltage level, a high illuminance correction circuit that corrects the voltage level of the signal line under high illuminance, or a fault detection circuit for the plurality of pixels.

[0013] The pixel array section may have an opening dummy pixel area that is disposed between the effective pixel area and the light-shielding area and has the same pixel structure as the effective pixel area.

[0014] Each of the plurality of pixels has a photoelectric conversion element that accumulates charge according to the amount of incident light, and at least a portion of the effective pixel area and the light-shielding area has a light-shielding member arranged along the boundary between two adjacent pixels, and the light-shielding area has an overflow area that discharges charge that overflows due to photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light-shielding member, and the photoelectric conversion element of a pixel that has the light-shielding member may not have the overflow area.

[0015] Each of the plurality of pixels has a photoelectric conversion element that accumulates charge according to the amount of incident light, and at least a portion of the effective pixel area and the light-shielding area has a light-shielding member arranged along the boundary between two adjacent pixels, and the light-shielding area may have an overflow area that discharges charge overflowing due to photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light-shielding member, the area of ​​which is larger than the area of ​​the overflow area provided for the photoelectric conversion element of a pixel that has the light-shielding member.

[0016] Each of the plurality of pixels has a photoelectric conversion element that accumulates an electric charge according to the amount of incident light, and a color filter that is arranged in the light incident direction from the photoelectric conversion element, and the color filter may not be arranged in a part of the light-shielding area on the effective pixel area side.

[0017] The color filter may not be disposed in a region extending from an opening dummy pixel region disposed between the effective pixel region and the light-shielding region to a portion of the light-shielding region.

[0018] Each of the plurality of pixels may have an on-chip lens arranged in a light incident direction relative to the color filter, and may have a light-shielding film covering a surface of the on-chip lens of a pixel not having the color filter in the light-shielding region.

[0019] Each of the plurality of pixels has a photoelectric conversion element that accumulates an electric charge according to the amount of incident light, a color filter that is arranged in the light incident direction relative to the photoelectric conversion element, and an on-chip lens that is arranged in the light incident direction relative to the color filter, and the color filter of a specific color may be arranged in a part of the light-shielding area on the effective pixel area side.

[0020] The color filters may have different thicknesses for each color, and the color filter of the color with the thinnest thickness may be disposed in a part of the light-shielding region on the effective pixel region side.

[0021] According to the present disclosure, there is provided a photodetector device comprising: a pixel array section having a plurality of pixels arranged in a two-dimensional direction; and a guard ring region arranged to surround the pixel array section, wherein the pixel array section has: an effective pixel region having the plurality of pixels; an effective optical black region arranged around the effective pixel region and generating a reference signal for a black level in the plurality of pixels; and a contact region supplying a reference voltage to the effective optical black region, wherein the effective optical black region has a plurality of sides in a planar view, and the contact region is arranged so as not to face at least a portion of at least one side of the effective optical black region in a planar view, or is arranged so that the distance from one side of the effective optical black region is greater than the distance from sides other than the one side in a planar view.

[0022] The effective optical black area has, in a planar view, a first side, a second side, a third side, and a fourth side, the first side being arranged on the opposite side to the effective pixel area and not facing the contact area, or facing the contact area at a distance greater than the second side and the fourth side, the second side and the fourth side being arranged facing the contact area, and the third side being arranged facing the effective pixel area.

[0023] The effective optical black area may have, in a planar view, a first side, a second side, a third side, and a fourth side, the first side being arranged on the opposite side from the effective pixel area, only a portion of the first side being arranged opposite the contact area, the second side and the fourth side being arranged opposite the contact area, and the third side being arranged opposite the effective pixel area.

[0024] a plurality of the effective optical black areas are provided, each facing a different side of the effective pixel area in a plan view, and the contact area is arranged so as not to face at least a part of a plurality of sides of the effective optical black areas in a plan view;

[0025] The contact area may not be disposed opposite a portion of one side of the effective optical black area in a plan view, but may be disposed opposite the effective optical black area other than the portion of the one side.

[0026] The optical black area may include a non-essential optical black area that is arranged on both longitudinal ends of the effective optical black area and does not generate the reference signal, and the contact area may not be arranged opposite a portion of one side of the effective optical black area in a planar view, but may be arranged opposite the non-essential optical black area other than the portion of the one side.

[0027] 4A , 4B , 4C , 4D , 4E , 4F , 4G , 4H ... 27 is a cross-sectional view of a photodetector according to a fourth embodiment. FIG. 28 is a planar layout view of a photodetector according to the fourth embodiment. FIG. 29 is a cross-sectional view of a photodetector according to a fifth embodiment. FIG. 29 is a planar layout view of a photodetector according to a fifth embodiment. FIG. 30 is a cross-sectional view of a photodetector according to a sixth embodiment. FIG. 31 is a cross-sectional view of a photodetector according to a seventh embodiment. FIG. 32 is a cross-sectional view of a photodetector according to an eighth embodiment. FIG. 33 is a planar layout view of a first substrate of a photodetector according to a ninth embodiment. FIG. 34 is a cross-sectional view of a first substrate of a photodetector according to the ninth embodiment. FIG. 35 is a cross-sectional view comparing the cross-sectional structure of the first substrate according to the ninth embodiment with the cross-sectional structure of the first substrate according to a comparative example. FIG. 36 is a planar layout view showing an example of the location of an OPB contact. FIG. 37 is a cross-sectional view taken along line A-A of FIG. 23. FIG. 38 is a simplified planar layout view of a photodetector according to a tenth embodiment. FIG. 39 is a cross-sectional view taken along line A-A of FIG. 35. FIG. 39 is a planar layout view in which the width of the effective OPB region is thinner than in FIGS. 23 and 25. FIG. 39 is a cross-sectional view taken along line A-A of FIG. 36. FIG. 39 is a planar layout view showing an example in which a first effective OPB region and a second effective OPB region are arranged opposite each other on two sides of an effective pixel region. 32 is a planar layout diagram of a photodetector according to an eleventh embodiment. 33 is a planar layout diagram of a photodetector according to a modification of the eleventh embodiment. 34 is a planar layout diagram of a photodetector according to a twelfth embodiment. 35 is a cross-sectional view taken along line AA in FIG. 32.34 is a cross-sectional view according to a modification of FIG. 33. FIG. 35 is a planar layout diagram of a light detection device according to a first modification of the twelfth embodiment. FIG. 36 is a planar layout diagram of a light detection device according to a second modification of the twelfth embodiment. FIG. 37 is a planar layout diagram of a light detection device according to a third modification of the twelfth embodiment. FIG. 38 is a planar layout diagram of a light detection device according to a fourth modification of the twelfth embodiment. FIG. 39 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 39 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. FIG. 39 is a block diagram showing an example of a schematic configuration of an in-vivo information acquisition system.

[0028] Hereinafter, an embodiment of a photodetector will be described with reference to the drawings. The following description will focus on the main components of the photodetector, but the photodetector may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0029] Fig. 1 is a block diagram showing a schematic configuration of a photodetector 1 according to the present disclosure. The photodetector 1 shown in Fig. 1 shows a schematic configuration of an image sensor. Note that the photodetector 1 according to the present disclosure is not necessarily limited to an image sensor that acquires gradation information photoelectrically converted at each pixel to generate a captured image, but can also be applied to an event-based vision sensor (EVS) that detects event information at each pixel to generate an event image.

[0030] As shown in FIG. 1 , the photodetector 1 includes a pixel array unit 11 and a peripheral circuit unit. The photodetector 1 further includes a signal processing unit 16 and a data storage unit 17. The signal processing unit 16 and the data storage unit 17 may be mounted on the same substrate as the pixel array unit 11, the vertical drive unit 12, etc., or may be disposed on a separate substrate. Note that the processing of the signal processing unit 16 and the data storage unit 17 may be performed by an external signal processing unit, such as a DSP (Digital Signal Processor) circuit, provided on a semiconductor chip separate from the photodetector 1. The peripheral circuit unit includes, for example, a vertical drive unit 12, a column processing unit 13, a horizontal drive unit 14, a system control unit 15, the signal processing unit 16, and the data storage unit 17, and can be broadly divided into control circuits and logic circuits, as described below.

[0031] The pixel array section 11 has a configuration in which unit pixels 21, each having a photoelectric conversion section that generates and accumulates electric charges according to the amount of received light, are two-dimensionally arranged in a matrix in row and column directions. Here, the row direction refers to the pixel rows of the pixel array section 11, i.e., the row direction, and the column direction refers to the pixel columns of the pixel array section 11, i.e., the column direction. A specific circuit configuration of the unit pixels 21 will be described later. Hereinafter, the unit pixels 21 may be abbreviated to pixel 21.

[0032] In the pixel array section 11, pixel drive wiring 22 as row signal lines is wired along the row direction for each pixel row, and vertical signal lines VSL as column signal lines are wired along the column direction for each pixel column. The pixel drive wiring 22 transmits drive signals for driving when reading out signals from the unit pixels 21. Although each pixel drive wiring 22 is illustrated as a single wire in FIG. 1 , the number of pixel drive wirings 22 is not limited to one. One end of the pixel drive wiring 22 is connected to an output terminal of the vertical drive section 12 corresponding to each row.

[0033] The vertical drive unit 12 is configured with a shift register, an address decoder, etc., and drives each unit pixel 21 of the pixel array unit 11 simultaneously for all pixels or in row units, etc. The vertical drive unit 12, together with the system control unit 15, configures a drive unit that controls the operation of each unit pixel 21 of the pixel array unit 11. Although the specific configuration of the vertical drive unit 12 is not shown in the figure, it generally has two scan systems: a read scan system and a sweep scan system.

[0034] The readout scanning system sequentially selects and scans the unit pixels 21 of the pixel array section 11 row by row to read out signals from the unit pixels 21. The signals read out from the unit pixels 21 are analog signals. The sweep scanning system performs sweep scanning on a readout row to be read out by the readout scanning system, the sweep scanning preceding the readout scanning by an exposure time.

[0035] The sweep scanning by this sweep scanning system sweeps out unnecessary charges from the photoelectric conversion units of the unit pixels 21 in the readout row, thereby resetting the photoelectric conversion units of each unit pixel 21. Then, by sweeping out (resetting) the unnecessary charges by this sweep scanning system, a so-called electronic shutter operation is performed. Here, the electronic shutter operation refers to the operation of discarding the charges in the photoelectric conversion units and starting new exposure (starting charge accumulation).

[0036] The signal read by the readout scanning system corresponds to the amount of light received after the immediately preceding readout operation or electronic shutter operation. The exposure period of the unit pixel 21 is the period from the readout timing of the immediately preceding readout operation or the sweep timing of the electronic shutter operation to the readout timing of the current readout operation.

[0037] The signals output from each unit pixel 21 in a pixel row selected and scanned by the vertical drive unit 12 are input to the column processing unit 13 through each vertical signal line VSL for each pixel column. The column processing unit 13 performs predetermined signal processing on the signals output from each unit pixel 21 in the selected row through the vertical signal line VSL for each unit pixel column in the pixel array unit 11, and temporarily holds the pixel signals after signal processing.

[0038] Specifically, the column processing unit 13 performs at least noise removal processing, such as CDS (Correlated Double Sampling) processing or DDS (Double Data Sampling) processing, as signal processing. For example, CDS processing removes reset noise and pixel-specific fixed pattern noise such as threshold variations of the amplification transistor in the unit pixel. In addition to noise removal processing, the column processing unit 13 also has, for example, an AD (analog-digital) conversion function, and converts analog pixel signals into digital signals and outputs them.

[0039] The horizontal driving unit 14 is configured with a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 13. By selective scanning by this horizontal driving unit 14, pixel signals that have been signal-processed for each unit circuit in the column processing unit 13 are sequentially output.

[0040] The system control unit 15 is composed of a timing generator that generates various timing signals, and controls the driving of the vertical driving unit 12, column processing unit 13, and horizontal driving unit 14 based on the various timings generated by the timing generator.

[0041] The signal processing unit 16 has at least an arithmetic processing function and performs various signal processing such as arithmetic processing on the pixel signals output from the column processing unit 13. The data storage unit 17 temporarily stores data necessary for the signal processing in the signal processing unit 16. The pixel signals processed in the signal processing unit 16 are converted into a predetermined format and output from the output unit 18 to the outside of the photodetector device 1.

[0042] 2 is a block diagram showing the configuration around the vertical signal line VSL of the photodetector 1 according to the present disclosure. As shown in FIG. 2, a vertical signal line VSL is provided for each pixel column of the pixel array section 11. As will be described later, each unit pixel 21 included in the pixel column has a photoelectric conversion element PD and a pixel circuit 21a. The photoelectric conversion element PD generates charges according to the amount of incident light. The pixel circuit 21a reads out the charges generated by the photoelectric conversion element PD in one exposure operation, for example, in multiple batches, and outputs a pixel signal whose signal level changes to multiple levels according to the read-out charges to a signal line.

[0043] The plurality of vertical signal lines VSL are connected to a column processing section 13. A DAC (Digital to Analog Converter) 27 is connected to the column processing section 13. The column processing section 13 has a comparator 28 and a counter 29 for each vertical signal line VSL.

[0044] Each comparator 28 compares the pixel signal on the corresponding vertical signal line VSL with the reference signal output from the DAC 27. When the signal levels of the pixel signal and the reference signal match, the signal level of the output signal of the comparator 28 transitions. When the signal level of the output signal of each comparator 28 transitions, the corresponding counter 29 ends its counting operation. The count value of the counter 29 is a value obtained by AD converting the signal level of the pixel signal.

[0045] Each vertical signal line VSL may be connected to at least one of a dummy SF (Source Follower) circuit 2, a sunspot compensation circuit 3, an effective OPB circuit 4, or a fault detection circuit 5, as necessary. The dummy SF circuit 2 is used to reset the vertical signal line VSL to a predetermined voltage level. The sunspot compensation circuit 3 corrects the voltage level of the vertical signal line VSL so that it does not become extremely low when receiving high-intensity light. The effective OPB circuit 4 is a circuit that generates a black level reference signal and supplies it to the vertical signal line VSL. The fault detection circuit 5 detects a fault in any pixel connected to the corresponding vertical signal line VSL.

[0046] In addition, an OFD (Overflow Drain) region 6R may be provided around the pixel array section 11. The OFD circuit 6 is connected to the photoelectric conversion element PD of each pixel in the pixel array section, and the OFD circuit 6 is provided for each vertical signal line VSL, and the OFD circuit 6 drains the charge overflowing from the photoelectric conversion element PD of each pixel connected to the corresponding vertical signal line VSL to the power supply voltage VDD node.

[0047] Although the photodetector 1 according to the present disclosure can be constructed using a single substrate, the chip size can be reduced by stacking multiple substrates. FIG. 3 is a diagram showing an example of the stacked structure of the photodetector 1 according to the present disclosure. In the example of FIG. 3, the photodetector 1 according to the present disclosure is constructed by stacking a first substrate 7 and a second substrate 8. For example, the pixel array unit 11 shown in FIG. 1 is disposed on the first substrate 7. For example, the peripheral circuit unit 9 including the vertical drive unit 12, column processing unit 13, horizontal drive unit 14, and the like other than the pixel array unit 11 shown in FIG. 1 is disposed on the second substrate 8. As described above, the peripheral circuit unit 9 is broadly divided into a logic circuit 9a and a control circuit 9b.

[0048] The photodetector 1 according to the present disclosure can also be configured by stacking three or more substrates. For example, when three substrates (first to third substrates) are stacked, the photoelectric conversion element PD and transfer transistor of each pixel in the pixel array unit 11 are arranged on the first substrate, the pixel transistor of each pixel is arranged on the second substrate, and the peripheral circuit unit 9 is arranged on the third substrate.

[0049] Fig. 4A is a planar layout diagram of a first example of the first substrate 7 in Fig. 3. The first substrate 7 has an effective pixel region 41, an opening dummy region 42, a no-interest OPB (Optical Black) region 43, an OFD region 6R, an effective OPB region 44, a process dummy region 45, a first guard ring region 46, and a second guard ring region 47.

[0050] The effective pixel region 41 is disposed, for example, in the center of the first substrate 7. The effective pixel region 41 is a region in which a plurality of pixels that generate pixel signals based on photoelectrically converted charges are arranged in a two-dimensional direction. In this specification, an example will be described in which a plurality of pixels are arranged in a first direction X and a second direction Y that intersect with each other. The first direction X is, for example, the row direction, and the second direction Y is, for example, the column direction.

[0051] The opening dummy region 42 is arranged to surround the effective pixel region 41. The opening dummy region 42 has a plurality of pixels having the same pixel structure as the effective pixel region 41. The plurality of pixels in the opening dummy region 42 are not shielded from light, but do not generate pixel signals.

[0052] The non-interested OPB region 43 is shielded from light by a light-shielding member and is arranged to surround the opening dummy region 42. An effective OPB region 44 and an OPD region are arranged in part of the non-interested OPB region 43. The effective OPB region 44 has a plurality of pixel circuits that generate a black level reference signal. The OPD region has a plurality of pixel circuits that discharge charge overflowing from the photoelectric conversion elements PD of the pixels in the effective pixel region 41. The non-interested OPB region 43 has the same pixel circuits as the effective OPB region 44, but is not used for the purpose of generating a black level reference signal.

[0053] In addition, a specific function transistor region 48 is provided in a portion of the unspecified OPB region 43. The specific function transistor region 48 includes, for example, at least one of the dummy SF circuit 2, the sunspot compensation circuit 3, and the fault detection circuit 5, as shown in FIG. 2 . The specific circuits provided in the specific function transistor region 48 are not limited to the dummy SF circuit 2, the sunspot compensation circuit 3, and the fault detection circuit 5, and may include circuits with other functions. For example, the specific function transistor region 48 may include the OFD circuit 6 described above, or a circuit that adjusts the voltage level of the vertical signal line VSL depending on the illuminance. The specific function transistor region 48 may be located anywhere. While FIG. 4A illustrates an example in which the specific function transistor region 48 is arranged along the first direction X, the specific function transistor region 48 may also be arranged along the second direction Y.

[0054] The process dummy region 45 is arranged so as to surround the non-questionable OPB region 43. The process dummy region 45 is an area where a plurality of dummy pixels are arranged mainly to suppress variations in the process.

[0055] The first guard ring region 46 is a P-type well region that is arranged to surround the process dummy region 45 .

[0056] The second guard ring region 47 is an N-type well region that is arranged to surround the first guard ring region 46 .

[0057] Outside the second guard ring region 47 of the first substrate 7, there are provided an N-type well region 49 in which a MOS capacitor is arranged, a joint portion 50 for transmitting signals to the stacked second substrate 8, and a pad portion 51.

[0058] The non-interest OPB region 43, the effective OPB region 44, and the process dummy region 45 in FIG. 4A are covered with a light-shielding member, and therefore may be referred to as light-shielding regions in this specification.

[0059] The planar layout of Fig. 4A is an example, and various modifications are possible. For example, Fig. 4B is a planar layout diagram in which the chip size is reduced compared to Fig. 4A.

[0060] 4B, the non-interested OPB regions 43 and the process dummy regions 45 are arranged on both sides of the effective pixel region 41 in the second direction Y, but are not arranged on both sides in the first direction X. Also, the second guard ring regions 47 are omitted.

[0061] FIG. 5 is a circuit diagram showing an example of a pixel circuit 21a of each pixel 21 in an effective pixel area 41. In this specification, each pixel 21 in the effective pixel area 41 shown in FIG. 5 may be referred to as an effective pixel. Each effective pixel outputs a pixel signal based on photoelectrically converted charge. FIG. 5 shows an example of a pixel circuit 21a of a pixel 21, and various modifications are possible. The pixel 21 in FIG. 5 includes two photoelectric conversion elements PD (hereinafter referred to as a first photodiode PD1 and a second photodiode PD2), a first transfer transistor 31, a first floating diffusion region (hereinafter referred to as a first FD) 32, an amplifier transistor (AMP) 33, a selection transistor 34, a conversion efficiency switching transistor 35, a reset transistor 36, a second floating diffusion region (hereinafter referred to as a second FD) 37, a second transfer transistor 38, a discharge transistor 39, and a charge holding unit FC. In this specification, at least a portion of the pixel in FIG. 5 , excluding the photodiode PD, may be referred to as the pixel circuit 21a.

[0062] A reset transistor 36, a conversion efficiency switching transistor 35, and a first transfer transistor 31 are connected in series between the cathode of the first photodiode PD1 and the power supply voltage VDD node. The drain of the first transfer transistor 31 is connected to a first FD 32. The first FD 32 is connected to the source of the conversion efficiency switching transistor 35 and the gate of the amplification transistor 33.

[0063] The drain of the conversion efficiency switching transistor 35 is connected to the second FD 37. The second FD 37 is connected to the source of the reset transistor 36 and the source of the second transfer transistor 38.

[0064] The drain of the second transfer transistor 38 is connected to the cathode of the second photodiode PD2 and to one end of the second charge holding unit FC. The other end of the second charge holding unit FC is applied with a voltage FCVDD. The voltage FCVDD is a voltage that switches between a high-level voltage and a low-level voltage.

[0065] The first FD 32 and the second FD 37 hold the accumulated charge of the first photodiode PD1 or the second photodiode PD2.

[0066] When the reset transistor 36 is turned on, the conversion efficiency switching transistor 35 is also turned on, so that the charges held in both the first FD 32 and the second FD 37 are discharged to the power supply voltage VDD node via the reset transistor 36.

[0067] The capacitances of the first FD 32, the second FD 37, the first charge holding unit EC, and the second charge holding unit FC have a relationship of, for example, first FD 32<second FD 37<second charge holding unit FC, with the second charge holding unit FC having the largest capacitance and the first FD 32 having the smallest capacitance. The second charge holding unit FC is formed of, for example, a MOS capacitance, a MIM (Metal Insulator Metal) capacitance, or a wiring capacitance.

[0068] 2, a dummy SF circuit 2 may be connected to the vertical signal line VSL. Fig. 6 is a circuit diagram showing an example of the dummy SF circuit 2. Note that the specific circuit configuration of the dummy SF circuit 2 is not limited to that shown in Fig. 6, and various modified examples are applicable.

[0069] As shown in FIG. 6 , one or more dummy SF circuits 2 are connected to one vertical signal line VSL. The larger the load on the vertical signal line VSL, the more dummy SF circuits 2 need to be connected to the vertical signal line VSL. Each dummy SF circuit 2 has two transistors 52 and 53 connected in series between the power supply voltage VDD node and the vertical signal line VSL. The drain of transistor 52 is connected to the VDD node, and the source of transistor 52 is connected to the drain of transistor 53. The source of transistor 53 is connected to the vertical signal line VSL. By controlling the gate voltages of transistors 52 and 53, when both transistors 52 and 53 are turned on, the corresponding vertical signal line VSL can be set to voltage VDD.

[0070] As shown in Fig. 2, a sunspot correction circuit 3 may be connected to the vertical signal line VSL. Fig. 7 is a circuit diagram showing an example of the sunspot correction circuit 3. Note that the specific circuit configuration of the sunspot correction circuit 3 is not limited to that shown in Fig. 7, and various modified examples are applicable.

[0071] As shown in FIG. 7 , one or more sunspot correction circuits 3 are connected to one vertical signal line VSL. The greater the load on the vertical signal line VSL, the more sunspot correction circuits 3 must be connected to the vertical signal line VSL. Each sunspot correction circuit 3 basically has a circuit configuration similar to that of the dummy SF circuit 2. That is, each sunspot correction circuit 3 has two transistors 54 and 55 connected in series between the power supply voltage VDD node and the vertical signal line VSL. The drain of transistor 54 is connected to the VDD node, and the source of transistor 54 is connected to the drain of transistor 55. The source of transistor 55 is connected to the vertical signal line VSL. A common signal is input to the gates of all transistors 54. By controlling the gate voltages of transistors 54 and 55, when both transistors 54 and 55 are turned on, the corresponding vertical signal line VSL can be set to voltage VDD. When high-intensity light is incident, the sunspot correction circuit 3 turns on both the transistors 54 and 55, correcting the voltage level of the vertical signal line VSL so that it does not drop too much.

[0072] FIG. 8 is a circuit diagram showing an example of an effective OPB circuit 4 arranged in an effective OPB area 44. In the effective OPB area 44, one or more effective OPB circuits 4 are arranged for each vertical signal line VSL. As shown in FIG. 8, the effective OPB circuit 4 basically has the same circuit configuration as the effective pixel 21 shown in FIG. 5. Therefore, in FIG. 8, the transistors 31, 33 to 36, and 38 constituting the effective OPB circuit 4 are assigned the same reference numerals as in FIG. 5. Because the effective OPB circuit 4 is light-shielded, the first photodiode PD1 and the second photodiode PD2 in the effective OPB circuit 4 do not perform photoelectric conversion. Therefore, the effective OPB circuit 4 supplies a black-level pixel signal (reference signal) to the vertical signal line VSL. In this specification, the effective OPB circuit 4 shown in FIG. 8 may be referred to as a pixel circuit.

[0073] 9 is a circuit diagram showing an example of a process dummy pixel 45px arranged in the process dummy region 45. The process dummy pixel 45px is not connected to the vertical signal line VSL, but is arranged, for example, in correspondence with each of the multiple vertical signal lines VSL. That is, in the process dummy region 45, one or more process dummy pixels 45px are arranged for each vertical signal line VSL.

[0074] The process dummy pixel 45px basically has the same circuit configuration as the effective pixel shown in FIG. 5. Therefore, in FIG. 9, the transistors 31, 33 to 36, and 38 constituting the process dummy pixel 45px are assigned the same reference numerals as in FIG. 5. However, the signals input to the gates of at least some of the transistors in the process dummy pixel 45px differ from those in FIG. 5. For example, the gates of at least some of the transistors in the process dummy pixel 45px are set to the ground voltage VSS. Furthermore, the source of the selection transistor 34 in the process dummy pixel 45px is not connected to the vertical signal line VSL. Therefore, even if the first and second photodiodes PD1 and PD2 in the process dummy pixel 45px perform photoelectric conversion, pixel signals based on the charges generated by the photoelectric conversion are not supplied to the vertical signal line VSL.

[0075] The process dummy pixels 45px may be arranged by a plurality of pixels along each pixel row in the effective pixel region 41. Similarly, the process dummy pixels 45px may be arranged by a plurality of pixels along each pixel column in the effective pixel region 41.

[0076] FIG. 10 is a planar layout diagram of a plurality of process dummy pixels 45px arranged in the process dummy region 45. There are several possible variations in the planar layout of the process dummy region 45. FIG. 10A is a planar layout diagram of process dummy pixels 45px according to a first example in the process dummy region 45. In the first example, a plurality of process dummy pixels 45px are arranged along the second direction Y for each of a plurality of pixel columns. In FIG. 10A , the upper side of the second direction Y is the outer peripheral edge side of the first substrate 7, and the lower side is the effective pixel region 41 side. Because the process dummy pixels 45px are arranged on the outer peripheral side of the first substrate 7, the shape of the process dummy pixels 45px becomes more irregular the closer they are to the outer peripheral edge.

[0077] 10B is a planar layout diagram of the process dummy pixels 45px according to a second example in the process dummy region 45. In the second example, the number of process dummy pixels 45px aligned in the second direction Y is reduced compared to the first example. This allows the width of the process dummy region 45 to be narrowed, thereby reducing the chip size.

[0078] 10C is a planar layout diagram of a third example of process dummy pixels 45px in the process dummy region 45. In the third example, the number of process dummy pixels 45px aligned in the second direction Y is further reduced compared to the second example. This allows the width of the process dummy region 45 to be further narrowed, and the chip size to be further reduced.

[0079] 11 is a planar layout diagram of a photodetector 1 according to a first embodiment. The right side of Fig. 11 shows the planar layout of the photodetector 1 according to the first embodiment, and the left side of Fig. 11 shows the planar layout of a photodetector 1 according to a comparative example. The photodetector 1 according to the comparative example basically conforms to the planar layout of Fig. 4A.

[0080] The photodetector 1 according to the first embodiment and the comparative example includes a non-interest OPB region 43 arranged to surround the effective pixel region 41, and a process dummy region 45 arranged to surround the non-interest OPB region 43. Note that the opening dummy region 42 arranged between the effective pixel region 41 and the non-interest OPB region 43 is omitted in FIG.

[0081] A specific function transistor region (specific function Tr region) 48 is arranged in a part of the unrelated OPB region 43. The specific function transistor region 48 is, for example, an region including at least one of the dummy SF circuit 2, the sunspot correction circuit 3, or the fault detection circuit 5, as described above. Although omitted in FIG. 11 , a valid OPB region 44 is arranged in a part of the unrelated OPB region 43.

[0082] 11, the specific function transistor regions 48 are arranged to face two of the four sides of the rectangular effective pixel region 41. More specifically, in the example of Fig. 11, the four sides of the effective pixel region 41 in plan view are called first to fourth sides 41a to 41d, and the specific function transistor regions 48 are arranged to face each of the first side 41a and the second side 41b of the effective pixel region 41. Fig. 11 is just an example, and the locations of the specific function transistor regions 48 may vary.

[0083] In the photodetector 1 according to the first embodiment, the process dummy regions 45 are not arranged on the third side 41 c and the fourth side 41 d of the effective pixel region 41, where the specific function transistor regions 48 are not arranged. In other words, the process dummy regions 45 are arranged only on the pixel row and pixel column sides where the specific function transistor regions 48 are arranged.

[0084] The process dummy region 45 is a region in which a plurality of process dummy pixels 45px identical or similar to each circuit are arranged so as to prevent disturbance in the shape and size of each circuit in the specific function transistor region 48. More specifically, it is necessary to provide a process dummy pixel 45px in the same row or column as each circuit in the specific function transistor region 48 in order to prevent disturbance in each circuit in the specific function transistor region 48. More preferably, as shown in Figures 10A to 10C, two or more process dummy pixels 45px are provided in the same pixel row or pixel column as each circuit in the specific function transistor region 48. On the other hand, no process dummy pixel 45px is provided in pixel rows or pixel columns in which the specific function transistor region 48 is not provided.

[0085] As a result, as shown in FIG. 11, the chip size of the photodetector 1 according to the first embodiment can be reduced compared to the comparative example.

[0086] In addition, opening dummy pixels are arranged in pixel rows or pixel columns where no process dummy region 45 is arranged, and since the opening dummy pixels substitute for the process dummy pixels 45px, there is no risk of adversely affecting the effective pixels even if the process dummy pixels 45px are omitted.

[0087] As described above, in this embodiment, the process dummy regions 45 are arranged so as to avoid regions where no specific function transistor regions 48 exist. That is, the process dummy regions 45 are arranged so as to avoid a first pixel group (e.g., pixel row) that does not include a specific function transistor, or so as to avoid a second pixel group (e.g., pixel column) that does not include a specific function transistor. This means that the process dummy regions 45 are arranged in pixel rows and pixel columns where specific function transistors are arranged, but are not arranged in pixel rows and pixel columns where specific function transistors are not arranged.

[0088] Furthermore, the process dummy regions 45 are not arranged in the effective pixel regions 41 where the specific function transistor regions 48 are not arranged, but are arranged in the effective pixel regions 41 where the specific function transistor regions 48 are arranged. In the region around the effective pixel region 41 where the process dummy regions 45 are not arranged, a guard ring region that contacts the no-interest optical black region 43 is arranged.

[0089] As a result, according to the first embodiment, it is only necessary to arrange the process dummy area 45 along only a portion of the side of the non-questioned OPB area 43, and the circuit scale of the process dummy area 45 can be reduced, thereby reducing the chip size.

[0090] Second Embodiment Fig. 12 is a planar layout diagram of a photodetector 1 according to a second embodiment. The right side of Fig. 12 shows the planar layout of the photodetector 1 according to the second embodiment, and the left side of Fig. 12 shows the planar layout of the photodetector 1 according to the above-described comparative example.

[0091] In the photodetector 1 according to the second embodiment, the unrelated OPB regions 43 are not arranged on the third and fourth sides of the effective pixel region 41 where the specific function transistor regions 48 are not arranged. In other words, the unrelated OPB regions 43 are arranged only on the first and second sides where the specific function transistor regions 48 are arranged.

[0092] As described above, since the specific function transistor region 48 includes the effective OPB region 44, if the effective OPB region 44 does not exist, it is not necessary to provide the indifferent OPB region 43.

[0093] As described above, in the second embodiment, the unrelated OPB region 43 is arranged so as to avoid regions where no specific function transistor region 48 is present. That is, the unrelated OPB region 43 is arranged so as to avoid a first pixel group (e.g., a pixel row) that does not include a specific function transistor, or is arranged so as to avoid a second pixel group (e.g., a pixel column) that does not include a specific function transistor. This means that the unrelated OPB region 43 is arranged in pixel rows and pixel columns where specific function transistors are arranged, but is not arranged in pixel rows and pixel columns where no specific function transistors are arranged.

[0094] Furthermore, the non-interested OPB region 43 is not disposed in the effective pixel region 41 where the specific function transistor region 48 is not disposed, but is disposed in the effective pixel region 41 where the specific function transistor region 48 is disposed. In the region around the effective pixel region 41 where the non-interested OPB region 43 is not disposed, a guard ring region is disposed so as to contact the process dummy pixel 45.

[0095] As a result, according to the second embodiment, it is only necessary to arrange the irrelevant OPB area 43 along only a portion of the sides of the effective pixel area 41, and the circuit scale of the irrelevant OPB area 43 can be reduced, thereby enabling a reduction in chip size.

[0096] 13 is a planar layout diagram of a photodetector 1 according to a third embodiment. The right side of Fig. 13 shows the planar layout of the photodetector 1 according to the third embodiment, and the left side of Fig. 13 shows the planar layout of the photodetector 1 according to the above-described comparative example.

[0097] In the photodetector 1 according to the third embodiment, the unrelated OPB region 43 and the process dummy region 45 are not arranged on the third side 41c and the fourth side 41d of the effective pixel region 41, where the specific function transistor region 48 is not arranged. In other words, the unrelated OPB region 43 and the process dummy region 45 are arranged only on the first side 41a and the second side 41b, where the specific function transistor region 48 is arranged.

[0098] As described above, in the third embodiment, the process dummy regions 45 and the unrelated OPB regions 43 are arranged so as to avoid regions where no specific function transistor regions 48 exist. That is, the process dummy regions 45 and the unrelated OPB regions 43 are arranged so as to avoid a first pixel group (e.g., pixel row) that does not include a specific function transistor or a second pixel group (e.g., pixel column) that does not include a specific function transistor. This means that the process dummy regions 45 and the unrelated OPB regions 43 are arranged in pixel rows and pixel columns where specific function transistors are arranged, and the process dummy regions 45 and the unrelated OPB regions 43 are not arranged in pixel rows and pixel columns where no specific function transistors are arranged.

[0099] As a result, in the third embodiment, the chip size can be further reduced compared to the first and second embodiments.

[0100] 14 is a cross-sectional view of a photodetector 1 according to a fourth embodiment. Fig. 14 shows a cross-sectional structure of the periphery of the effective pixel region 41 and the light-shielding region 60 on the first substrate 7 of the photodetector 1 according to the fourth embodiment. As described above, the light-shielding region 60 is a region including the no-question OPB region 43 and the process dummy region 45.

[0101] As shown in FIG. 14 , the first substrate 7 of the photodetector 1 according to the fourth embodiment has a structure in which a photoelectric conversion region 61, a color filter 62, a protective film 63, and an on-chip lens 64 are stacked. The photoelectric conversion region 61 is divided into pixels, and deep trench isolation (DTI) regions 65 extending in the stacking direction along the boundaries of the pixels are arranged. The isolation regions 65 shown in FIG. 14 are arranged to penetrate the photoelectric conversion region 61. The isolation regions 65 are formed of a metal material such as tungsten (W) and have the function of absorbing light from adjacent pixels. In this specification, the isolation regions 65 formed of a light-shielding material may be referred to as a light-shielding member.

[0102] Furthermore, a light-shielding member 66 is disposed on the light-incident surface side of the photoelectric conversion region 61 in the light-shielding region 60. The light-shielding member 66 is formed of the same material as the element isolation region 65.

[0103] Fig. 15 is a planar layout diagram of the photodetector 1 according to the fourth embodiment. The right side of Fig. 15 shows the planar layout of the photodetector 1 according to the fourth embodiment, and the left side of Fig. 15 shows the planar layout of the photodetector 1 according to a comparative example.

[0104] The photodetector 1 according to the comparative example has an OFD region 6R arranged in a part of the non-interest OPB region 43. In the OFD region 6R, a plurality of OFD circuits 6, each provided for each vertical signal line VSL, are arranged. Each OFD circuit 6 is a circuit for discharging charge overflowing from the photoelectric conversion element PD of each pixel to the power supply voltage VDD node, and is mainly used for discharging charge due to light leaking from adjacent pixels.

[0105] 14 , when an element isolation region 65 extending in the stacking direction is arranged along the boundary between pixels in the photoelectric conversion region 61, the element isolation region 65 can block light from adjacent pixels, eliminating the need for an OFD circuit 6. Therefore, in the fourth embodiment, as shown on the right side of FIG. 15 , an OFD region 6R is not provided in the unintentional OPB region 43. Even if the OFD region 6R is omitted, a guard ring region 46 having a well structure is arranged around the unintentional OPB region 43 as shown in FIG. 4 , and unnecessary charges can be discharged by applying, for example, a power supply voltage to the well of the guard ring region 46.

[0106] Thus, in the fourth embodiment, when an element isolation region 65 penetrating the photoelectric conversion region 61 is arranged along the pixel boundary of the photoelectric conversion region 61, the OFD region 6R is not arranged within the non-questionable OPB region 43, so that the chip size can be reduced without reducing the discharge performance of charges leaking from adjacent pixels.

[0107] 16 is a cross-sectional view of a photodetector 1 according to a fifth embodiment. Fig. 16 shows a cross-sectional structure of the periphery of the effective pixel region 41 and the light-shielding region 60 on the first substrate 7 of the photodetector 1 according to the fifth embodiment.

[0108] As shown in Figure 16, the photoelectric conversion region 61 of the photodetector 1 according to the fifth embodiment includes an isolation region 65a having a shorter length in the stacking direction than that shown in Figure 14. The isolation region 65a is formed of a light-shielding material such as tungsten (W). The isolation region 65a in the fifth embodiment does not penetrate the photoelectric conversion region 61, and there is a risk that light leaking from adjacent pixels may enter the surface of the photoelectric conversion region 61 opposite the light incident surface. For this reason, it is not desirable to completely remove the OFD circuit 6 within the OFD region 6R. However, since the isolation region 65a is disposed on the light incident surface side of the photoelectric conversion region 61, it is expected that light leakage from adjacent pixels will be small, and therefore the number of OFD circuits 6 may be small.

[0109] Fig. 17 is a planar layout diagram of the photodetector 1 according to the fifth embodiment. The right side of Fig. 17 shows the planar layout of the photodetector 1 according to the fifth embodiment, and the left side of Fig. 17 shows the planar layout of the photodetector 1 according to a comparative example.

[0110] The photodetector 1 according to the comparative example includes an OFD region 6R having OFD circuits 6 for a plurality of pixels in each of a plurality of pixel columns arranged in the first direction X and extending in the second direction Y. In contrast, the photodetector 1 according to the fifth embodiment includes an OFD region 6R having OFD circuits 6 for fewer pixels (e.g., one pixel) than the photodetector 1 according to the comparative example. In the photodetector 1 according to the fifth embodiment, light from adjacent pixels enters only the surface of the photoelectric conversion region 61 opposite the light incident surface, and the number of OFD circuits 6 can be reduced compared to the comparative example in which there is no element isolation region 65a.

[0111] Thus, in the fifth embodiment, when the element isolation region 65a arranged at the pixel boundary position of the photoelectric conversion region 61 does not penetrate the photoelectric conversion region 61, charge from adjacent pixels can be discharged with a smaller number of OFD circuits 6 than when the element isolation region 65a is not present, thereby reducing the size of the OFD region 6R and ultimately reducing the chip size.

[0112] Sixth Embodiment Fig. 18 is a cross-sectional view of a photodetector 1 according to a sixth embodiment. Fig. 18 shows the cross-sectional structure of the periphery of a light-shielding region 60 in the first substrate 7 of the photodetector 1 according to the sixth embodiment. The right side of Fig. 18 shows the cross-sectional structure of the photodetector 1 according to the sixth embodiment, and the left side shows the cross-sectional structure of a photodetector 1 according to a comparative example.

[0113] The first substrate 7 of the photodetector 1 according to the comparative example has a structure in which a photoelectric conversion region 61, a color filter 62, a protective film 63, and an on-chip lens 64 are stacked. A light-shielding member 66 is disposed between the light incident surface of the photoelectric conversion region 61 and the color filter 62 in the non-interest OPB region 43 of the light-shielding region 60. On the other hand, the light-shielding member 66 is not disposed on the light incident surface side of the opening dummy region 42 disposed between the effective pixel region 41 and the non-interest OPB region 43. Therefore, a step 68 corresponding to the thickness of the light-shielding member 66 is formed in the protective film 63 covering the effective pixel region 41 and the light-shielding region 60. This step 68 may cause distortion in the shapes and sizes of the opening dummy pixels in the opening dummy region 42 and the pixels in the effective pixel region 41, which may adversely affect the electrical characteristics of the photodetector 1.

[0114] Therefore, in the photodetector 1 according to the sixth embodiment, as shown on the right side of FIG. 18 , the color filter 62 is not disposed in at least a portion of the unspecified OPB region 43 on the opening dummy region 42 side. Removing the color filter 62 reduces the step 68 in the protective film 63 caused by the provision of the light-shielding member 66. Because the light-shielding member 66 and the color filter 62 are disposed on the guard ring region 46 side of the unspecified OPB region 43, the step 68 in the protective film 63 moves toward the guard ring region 46. That is, in the sixth embodiment, the step 68 in the protective film 63 is formed at a location away from the opening dummy region 42, making it less likely that the shapes and sizes of the opening dummy pixels in the opening dummy region 42 and the pixels in the effective pixel region 41 will be distorted than in the comparative example. Furthermore, in this embodiment, the surface of the on-chip lens 64 disposed above the portion where the color filter 62 is omitted is covered with a light-shielding film 69.

[0115] In this way, in the sixth embodiment, in order to remove the color filter 62 in a portion of the non-issue OPB region 43 on the opening dummy region 42 side, the step 68 in the protective film 63 caused by the provision of the light-shielding member 66 can be shifted to a position away from the opening dummy region 42, and the step 68 in the protective film 63 does not cause any disturbance in the shape and size of the pixels in the effective pixel region 41, thereby preventing a deterioration in the electrical characteristics of the photodetector 1.

[0116] Seventh Embodiment Fig. 19 is a cross-sectional view of a photodetector 1 according to a seventh embodiment. Fig. 19 shows a cross-sectional structure of the periphery of the light-shielding region 60 on the first substrate 7 of the photodetector 1 according to the seventh embodiment. In the sixth embodiment, the color filters 62 on the opening dummy region 42 side of the unspecified OPB region 43 were removed. However, since the color filters 62 have different thicknesses for each color, the seventh embodiment is characterized in that the thinnest color filter 62a is disposed on the opening dummy region 42 side of the unspecified OPB region 43. This reduces the step 68 in the protective film 63 formed by disposing the light-shielding member 66 in the unspecified OPB region 43, and prevents distortion in the shape and size of the opening dummy pixels in the opening dummy region 42 and the pixels in the effective pixel region 41.

[0117] Eighth Embodiment Fig. 20 is a cross-sectional view of a photodetector 1 according to an eighth embodiment. Fig. 20 shows a cross-sectional structure of the periphery of a light-shielding region 60 on the first substrate 7 of the photodetector 1 according to the eighth embodiment. In the eighth embodiment, a color filter 62a having the thinnest thickness is disposed in the same layer as the light-shielding member 66 in a part of the no-question OPB region 43 on the opening dummy region 42 side. This allows the step 68 of the protective film 63 to be shifted to a position away from the opening dummy region 42, and prevents the step 68 from disturbing the shape and size of the effective pixels in the effective pixel region 41.

[0118] Ninth Embodiment FIG. 21A is a plan view of the first substrate 7 of a photodetector 1 according to a ninth embodiment, and FIG. 21B is a cross-sectional view. The photodetector 1 according to the ninth embodiment has a structure in which the first substrate 7 and the second substrate 8 are stacked as shown in FIG. 3 . In this case, as shown in FIG. 4A , two types of guard ring regions (first guard ring region 46 and second guard ring region 47) may be provided, with the first guard ring region 46 made of a P-type well region disposed inside the second guard ring region 47 made of an N-type well region. Alternatively, as shown in FIG. 4B , the second guard ring region 47 may be omitted. Therefore, in the photodetector 1 according to the ninth embodiment, the outer periphery of the process dummy region 45 is a guard ring region made of a P-type well region 46. As a result, the P-type well region 46 that forms the guard ring region of the pixel region 70 (hereinafter referred to as the pixel region 70) inside the process dummy region 45 is in contact with the N-type well region 71 of the peripheral circuit section 9, and the P-type well region 72 is arranged outside the N-type well region 71, resulting in a structure that allows the chip size to be reduced.

[0119] 22 is a cross-sectional view comparing the cross-sectional structure of the first substrate 7 according to the ninth embodiment with the cross-sectional structure of the first substrate 7 according to a comparative example. The upper side of FIG. 22 shows the cross-sectional structure of the ninth embodiment, and the lower side shows the cross-sectional structure of the comparative example. In the comparative example, a first guard ring region 46 made of a P-type well region is arranged so as to contact the outer periphery of the process dummy region 45, and an N-type well region 47 is arranged outside the first guard ring region 46. The peripheral circuit unit 9 also has a P-type well region 73 arranged so as to contact the N-type well region 47 of the pixel region, an N-type well region 74 arranged outside the P-type well region 75, and so on.

[0120] In contrast to this, in the ninth embodiment, a guard ring region made of a P-type well region 46 is arranged on the outer periphery of the pixel region 70. The peripheral circuit section 9 also has an N-type well region 71 arranged so as to be in contact with the P-type well region 46 of the pixel region 70, and a P-type well region 72 arranged outside thereof.

[0121] In this way, in the ninth embodiment, a guard ring region of the P-type well region 46 is arranged on the outer edge of the pixel region, and a guard ring region of the N-type well region 47 is not arranged, so the structure of the peripheral circuit section 9 can be simplified and the chip size can be reduced compared to the comparative example.

[0122] 4A and 4B , an unrelated OPB region 43 is disposed outside the effective pixel region 41, and an effective OPB region 44 is disposed in a portion of the unrelated OPB region 43. An OPB contact (hereinafter also referred to as OCN) 80 is disposed outside the effective OPB region 44 to define a reference voltage level (e.g., a ground voltage level) of the effective OPB region 44. The OPB contact 80 is formed of a metal material with excellent conductivity. In this specification, the metal material for the OPB contact 80 is referred to as an OPB metal 83.

[0123] 23 is a planar layout diagram showing an example of the location of the OPB contact 80. Fig. 23 shows an example in which the OPB contact 80 is arranged so as to surround the effective pixel area 41 and the effective OPB area 44 in order to suppress fluctuations in the reference voltage level of the effective OPB area 44.

[0124] 24 is a cross-sectional view taken along line A-A in FIG. 23 . The OPB contact 80 bonds an OPB metal 83 disposed on a silicon layer 81 via an insulating layer 82 to the silicon layer 81, which is the base material of the first substrate 7. However, there is a risk of hydrogen diffusing into the first substrate 7 from the bonding interface between the OPB contact 80 and the first substrate 7. The diffused hydrogen penetrates the effective OPB region 44, causing a dark current step within the effective OPB region 44. The dark current step refers to variation in the likelihood of dark current generation in the effective OPB region 44. The occurrence of a dark current step can cause degradation of the electrical characteristics of the photodetector 1.

[0125] Fig. 25 is a simplified planar layout diagram of the photodetector 1 according to the tenth embodiment, and Fig. 26 is a cross-sectional view taken along line A-A in Fig. 25. As shown in Fig. 25, the OPB contact 80 according to the tenth embodiment is not disposed in an area facing some sides of the effective OPB region 44. In the case of Fig. 25, of the first to fourth sides 44a, 44b, 44c, and 44d of the rectangular effective OPB region 44, the OPB contact 80 is not disposed on the side facing the first side 44a, which is disposed on the opposite side from the effective pixel region 41. On the other hand, the OPB contact 80 is disposed on the sides facing the second side 44b and the fourth side 44d.

[0126] 23 , when the OPB contact 80 is provided in the region facing the first side 44 a of the effective OPB region 44, it is necessary to increase the width of the effective OPB region 44 in advance in anticipation of hydrogen diffused from the OPB contact 80 into the first substrate 7 penetrating into the effective OPB region 44. In contrast, when the OPB contact 80 is not disposed on the side facing the first side 44 a of the effective OPB region 44 as in the tenth embodiment, hydrogen does not penetrate from the side facing the first side 44 a of the effective OPB region 44, and the width of the effective OPB region 44 can be made thinner accordingly.

[0127] Fig. 27 is a planar layout diagram in which the width of the effective OPB region 44 is thinner than in Fig. 23 and Fig. 25, and Fig. 28 is a cross-sectional view taken along line A-A in Fig. 27. By reducing the width of the effective OPB region 44, the chip size can be further reduced.

[0128] 25 to 28 show examples in which the effective OPB region 44 is arranged opposite only one side of the effective pixel region 41, but there may be cases in which multiple effective OPB regions 44 are arranged opposite two or more sides of the effective pixel region 41. Fig. 29 is a planar layout diagram showing an example in which a first effective OPB region 44-1 and a second effective OPB region 44-2 are arranged opposite two sides of the effective pixel region 41. In the case of Fig. 29, no OPB contact 80 is arranged on the side opposite each side of the first effective OPB region 44-1 and the second effective OPB region 44-2.

[0129] As described above, in the tenth embodiment, the OPB contact 80 is not disposed in a region facing at least a part of the side of the effective OPB region 44, so that even if hydrogen diffuses from the OPB contact 80 to the first substrate 7, the hydrogen will not cause a dark current step in the effective OPB region 44. Also, because the OPB contact 80 is not disposed on the side facing one side of the effective OPB region 44, it is possible to reduce the chip size of the photo-detecting device 1. Furthermore, because hydrogen does not penetrate from the side facing the first side 44a of the effective OPB region 44, the width of the effective OPB region 44 can be made thinner, and the chip size of the photo-detecting device 1 can be further reduced.

[0130] 30 is a planar layout diagram of a photodetector 1 according to an eleventh embodiment. The photodetector 1 according to the eleventh embodiment is characterized in that the OPB contacts 80 are not arranged in a region facing a part of the first side 44 a of the effective OPB region 44. That is, as shown in FIG. 30 , the OPB contacts 80 are arranged in a region facing near both ends of the first side 44 a of the effective OPB region 44, but the OPB contacts 80 are not arranged in a region facing near the center of the first side 44 a.

[0131] 31 is a planar layout diagram of a photodetector 1 according to a modification of the 11th embodiment. The photodetector 1 according to the modification of the 11th embodiment is characterized in that it has a first effective OPB region 44-1 and a second effective OPB region 44-2 arranged along two sides of the effective pixel region 41, and no OPB contact 80 is arranged on the side facing a part of each side of the first effective OPB region 44-1 and the second effective OPB region 44-2.

[0132] In this way, in the 11th embodiment, the OPB contact 80 is not arranged on at least a portion of one side of the effective OPB region 44, so that, as in the 10th embodiment, no dark current step occurs in the effective OPB region 44 and the chip size can be reduced.

[0133] Twelfth Embodiment A twelfth embodiment is characterized in that an OPB contact 80 is disposed at a distance on the side opposite to one side of the effective OPB region 44 .

[0134] Fig. 32 is a planar layout diagram of the photodetector 1 according to the twelfth embodiment, and Fig. 33 is a cross-sectional view taken along line A-A in Fig. 32. The photodetector 1 according to the twelfth embodiment includes an OPB contact 80 disposed so as to surround the effective pixel region 41 and the effective OPB region 44. As shown in an enlarged view on the left side of Fig. 32, the distance between the OPB contact 80 and the effective OPB region 44 is not constant, and the distance d+X between the first side 44a of the effective OPB region 44 and the OPB contact 80 is greater than the distance d between the second side 44b and the fourth side 44d of the effective OPB region 44 and the OPB contact 80.

[0135] As a result, on the side opposite the first edge 44a of the effective OPB region 44, as shown in Figure 33, the distance that hydrogen diffused from the OPB contact 80 to the first substrate 7 travels to reach the effective OPB region 44 is longer, making it less likely that a dark current step will occur in the effective OPB region 44.

[0136] Fig. 34 is a cross-sectional view according to a modification of Fig. 33. By arranging a plurality of periodic structures of P-type well regions 84a and N-type well regions 84b between the first side 44a of the effective OPB region 44 and the OPB contact 80 on the side opposite to the first side 44a, hydrogen diffused from the OPB contact 80 into the first substrate 7 is less likely to reach the effective OPB region 44, and a dark current step is less likely to occur in the effective OPB region 44.

[0137] 35 is a planar layout diagram of a photodetector 1 according to a first modified example of the twelfth embodiment. In the first modified example of the twelfth embodiment, the distance between the OPB contact 80 and a part of the first side 44a of the effective OPB region 44 is increased. In this case, too, if the region where the distance from the OPB contact 80 is increased is longer than the region where the distance is not increased, a dark current step is less likely to occur in the effective OPB region 44.

[0138] 36 is a planar layout diagram of a photodetector 1 according to a second modified example of the twelfth embodiment. In the second modified example of the twelfth embodiment, uninterested OPB regions 43 are arranged on both end sides of a first side 44 a of an effective OPB region 44. An OPB contact 80 is arranged on the side of the uninterested OPB region 43 facing the first side 44 a. No OPB contact 80 is arranged on the side of the effective OPB region 44 facing the first side 44 a.

[0139] 37 is a planar layout diagram of a photodetector 1 according to a third modified example of the twelfth embodiment. In the third modified example of the twelfth embodiment, a first effective OPB region 44-1 and a second effective OPB region 44-2 are arranged along two sides of the effective pixel region 41, and uninterested OPB regions 43 are arranged on both end sides of the first effective OPB region 44-1 and the second effective OPB region 44-2. An OPB contact 80 is arranged on the side facing these uninterested OPB regions 43. No OPB contact 80 is arranged on the side facing each side of the first effective OPB region 44-1 and the second effective OPB region 44-2.

[0140] 38 is a planar layout diagram of a photodetector 1 according to a fourth modified example of the twelfth embodiment. In the fourth modified example of the twelfth embodiment, an uninterested OPB region 43 is arranged on one end side in the longitudinal direction of the effective OPB region 44. An OPB contact 80 is arranged close to the uninterested OPB region 43 on the side facing the first side 44 a. An OPB contact 80 is arranged at a distance from the effective OPB region 44 on the side facing the first side 44 a.

[0141] As described above, in the twelfth embodiment, the OPB contact 80 is arranged at a distance on the side facing at least one side of the effective OPB region 44, making it difficult for a dark current step to occur in the effective OPB region 44. Furthermore, in the region of the effective OPB region 44 where the OPB contact 80 is arranged closely, the non-essential OPB region 43 is arranged instead of the effective OPB region 44, making it difficult for the region to be affected by a dark current step.

[0142] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0143] FIG. 39 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0144] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 39, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0145] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0146] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0147] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0148] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0149] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0150] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0151] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0152] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0153] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 39, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0154] FIG. 40 is a diagram showing an example of the installation position of the imaging unit 12031.

[0155] In FIG. 40, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0156] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0157] 40 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0158] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0159] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0160] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0161] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0162] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the imaging unit 12031 and the like in the above-described configuration.

[0163] <Application Example to Intra-Vivo Information Acquisition System> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0164] FIG. 41 is a block diagram showing an example of a schematic configuration of a system for acquiring in-vivo information of a patient using a capsule endoscope, to which the technology according to the present disclosure (the present technology) can be applied.

[0165] The in-vivo information acquisition system 10001 includes a capsule endoscope 10100 and an external control device 10200 .

[0166] The capsule endoscope 10100 is swallowed by a patient during an examination. The capsule endoscope 10100 has an imaging function and a wireless communication function, and moves through the inside of organs such as the stomach and intestines by peristaltic movement or the like until it is naturally expelled from the patient, sequentially capturing images of the inside of the organs (hereinafter also referred to as in-vivo images) at predetermined intervals, and sequentially wirelessly transmitting information about the in-vivo images to an external control device 10200 outside the body.

[0167] The external control device 10200 comprehensively controls the operation of the in-vivo information acquisition system 10001. The external control device 10200 also receives information about the in-vivo images transmitted from the capsule endoscope 10100, and generates image data for displaying the in-vivo images on a display device (not shown) based on the received information about the in-vivo images.

[0168] In this way, the in-vivo information acquisition system 10001 can obtain in-vivo images of the state inside the patient's body at any time from the time the capsule endoscope 10100 is swallowed until it is expelled.

[0169] The configurations and functions of the capsule endoscope 10100 and the external control device 10200 will be described in more detail.

[0170] The capsule endoscope 10100 has a capsule-shaped housing 10101, which houses a light source unit 10111, an imaging unit 10112, an image processing unit 10113, a wireless communication unit 10114, a power supply unit 10115, a power supply unit 10116, and a control unit 10117.

[0171] The light source unit 10111 is composed of a light source such as an LED (light emitting diode), and irradiates the imaging field of the imaging unit 10112 with light.

[0172] The imaging unit 10112 is composed of an imaging element and an optical system consisting of multiple lenses provided in front of the imaging element. Reflected light (hereinafter referred to as observation light) of light irradiated onto the body tissue to be observed is collected by the optical system and incident on the imaging element. In the imaging unit 10112, the imaging element photoelectrically converts the incident observation light, generating an image signal corresponding to the observation light. The image signal generated by the imaging unit 10112 is provided to the image processing unit 10113.

[0173] The image processing unit 10113 is configured with processors such as a CPU (Central Processing Unit) and a GPU (Graphics Processing Unit), and performs various signal processing on the image signal generated by the imaging unit 10112. The image processing unit 10113 provides the image signal that has been subjected to the signal processing to the wireless communication unit 10114 as RAW data.

[0174] The wireless communication unit 10114 performs predetermined processing such as modulation on the image signal that has been subjected to signal processing by the image processing unit 10113, and transmits the image signal to the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 also receives a control signal related to drive control of the capsule endoscope 10100 from the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 provides the control signal received from the external control device 10200 to the control unit 10117.

[0175] The power supply unit 10115 is composed of an antenna coil for receiving power, a power regeneration circuit that regenerates power from the current generated in the antenna coil, a boost circuit, etc. The power supply unit 10115 generates power using the principle of so-called contactless charging.

[0176] The power supply unit 10116 is configured by a secondary battery and stores the power generated by the power supply unit 10115. In Fig. 41, to avoid cluttering the drawing, arrows and the like indicating the destinations of the power supply unit 10116 are omitted, but the power stored in the power supply unit 10116 is supplied to the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the control unit 10117 and can be used to drive these units.

[0177] The control unit 10117 is composed of a processor such as a CPU, and appropriately controls the operation of the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the power supply unit 10115 in accordance with control signals transmitted from the external control device 10200.

[0178] The external control device 10200 is configured with a processor such as a CPU or a GPU, or a microcomputer or control board equipped with a processor and a storage element such as a memory. The external control device 10200 controls the operation of the capsule endoscope 10100 by transmitting a control signal to the control unit 10117 of the capsule endoscope 10100 via the antenna 10200A. In the capsule endoscope 10100, for example, the light irradiation conditions of the light source unit 10111 for the observation object can be changed by the control signal from the external control device 10200. Furthermore, the imaging conditions (e.g., the frame rate and exposure value of the imaging unit 10112) can be changed by the control signal from the external control device 10200. Furthermore, the control signal from the external control device 10200 can change the content of processing in the image processing unit 10113 and the conditions for transmitting image signals from the wireless communication unit 10114 (e.g., the transmission interval, the number of transmitted images, etc.).

[0179] The external control device 10200 also performs various image processing on the image signal transmitted from the capsule endoscope 10100 to generate image data for displaying the captured in-vivo image on a display device. The image processing can include various signal processing such as development processing (demosaic processing), image quality improvement processing (band enhancement processing, super-resolution processing, NR (Noise Reduction) processing, and / or image stabilization processing), and / or enlargement processing (electronic zoom processing). The external control device 10200 controls the driving of the display device to display the captured in-vivo image based on the generated image data. Alternatively, the external control device 10200 may record the generated image data in a recording device (not shown) or print it out on a printing device (not shown).

[0180] The above describes an example of an in-vivo information acquisition system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, any of the light source unit 10111 to the control unit 10117 in the configuration described above.

[0181] The present technology may be configured as follows: (1) A photodetector device including: a pixel array section having a plurality of pixels arranged in a first direction and a second direction intersecting each other; and a guard ring region arranged to surround the pixel array section, wherein the pixel array section has: an effective pixel region having a plurality of pixels; and a light-shielding region arranged around the effective pixel region, wherein the light-shielding region has: a process dummy region in which a plurality of dummy pixels are arranged to suppress process variations, an effective optical black region that generates a reference signal for a black level of the plurality of pixels, a no-interest optical black region that does not generate the reference signal and is arranged between the effective pixel region and the effective optical black region, and a specific function transistor region having transistors that perform a specific function, wherein at least one of the process dummy region or the no-interest optical black region is arranged to avoid a region where the specific function transistor region is not present. (2) The photodetector according to (1), wherein at least one of the process dummy region or the don't care optical black region is arranged to avoid a first pixel group arranged along the first direction and not including the transistor, or a second pixel group arranged along the second direction and not including the transistor. (3) The photodetector according to (1) or (2), wherein the specific function transistor region is not arranged on at least one side of the effective pixel region, and at least one of the process dummy region or the don't care optical black region is arranged on at least one side of the effective pixel region on which the specific function transistor region is arranged, and is not arranged on another side of the effective pixel region on which the specific function transistor region is not arranged. (4) The photodetector according to any one of (1) to (3), wherein, in a region around the effective pixel region where at least one of the process dummy region or the don't care optical black region is not arranged, the guard ring region is arranged so as to contact the process dummy region or the don't care optical black region, or so as to contact the effective pixel region.(5) The photodetector according to any one of (1) to (4), wherein the specific function transistor region is arranged in a part of the no-concern optical black region. (6) The photodetector according to any one of (1) to (5), wherein the transistors in the specific function transistor region are provided in a dummy source follower circuit that sets a voltage level of a signal line that transmits pixel signals photoelectrically converted by the plurality of pixels to a reference voltage level, a high-illuminance correction circuit that corrects the voltage level of the signal line under high illuminance, or a fault detection circuit for the plurality of pixels. (7) The photodetector according to any one of (1) to (6), wherein the pixel array unit has an open dummy pixel region that is arranged between the effective pixel region and the light-shielding region and has the same pixel structure as the effective pixel region. (8) The photodetector device according to any one of (1) to (7), wherein each of the plurality of pixels has a photoelectric conversion element that accumulates electric charge according to the amount of incident light, and at least a portion of the effective pixel area and the light-shielding area has a light-shielding member arranged along the boundary between two adjacent pixels, and the light-shielding area has an overflow area that discharges electric charge overflowing due to photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light-shielding member, and does not have the overflow area for the photoelectric conversion element of a pixel that has the light-shielding member. (9) The photodetector according to any one of (1) to (7), wherein each of the plurality of pixels has a photoelectric conversion element that accumulates a charge according to the amount of incident light, at least a portion of the effective pixel area and the light-shielding area has a light-shielding member arranged along the boundary between two adjacent pixels, and the light-shielding area has an overflow area that discharges charge overflowing due to photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light-shielding member, the area of ​​the overflow area being larger than the area of ​​the overflow area provided for the photoelectric conversion element of a pixel that has the light-shielding member. (10) The photodetector according to any one of (1) to (9), wherein each of the plurality of pixels has a photoelectric conversion element that accumulates a charge according to the amount of incident light, and a color filter that is arranged in a light incident direction relative to the photoelectric conversion element, and the color filter is not arranged in a portion of the light-shielding area on the effective pixel area side.(11) The photodetector according to (10), wherein the color filter is not arranged in a region extending from an opening dummy pixel region arranged between the effective pixel region and the light-shielding region to a portion of the light-shielding region. (12) The photodetector according to (10) or (11), wherein each of the plurality of pixels has an on-chip lens arranged in a light incident direction relative to the color filter, and a light-shielding film covering a surface of the on-chip lens of a pixel in the light-shielding region that does not have the color filter. (13) The photodetector according to any one of (1) to (9), wherein each of the plurality of pixels has a photoelectric conversion element that accumulates a charge according to the amount of incident light, a color filter arranged in a light incident direction relative to the photoelectric conversion element, and an on-chip lens arranged in the light incident direction relative to the color filter, and wherein the color filter of a specific color is arranged in a portion of the light-shielding region on the effective pixel region side. (14) The photodetector according to (13), wherein the color filters have different thicknesses for each color, and the color filter of the color with the thinnest thickness is arranged in a part of the light-shielding region on the effective pixel region side. (15) A photodetector comprising: a pixel array section having a plurality of pixels arranged in a two-dimensional direction, and a guard ring region arranged to surround the pixel array section, wherein the pixel array section has: an effective pixel region having the plurality of pixels, an effective optical black region arranged around the effective pixel region and generating a reference signal for a black level in the plurality of pixels, and a contact region supplying a reference voltage to the effective optical black region, wherein the effective optical black region has a plurality of sides in a planar view, and the contact region is arranged so as not to face at least a part of at least one side of the effective optical black region in a planar view, or is arranged so that the distance from one side of the effective optical black region is greater than the distance from the other sides in a planar view.(16) The photodetector according to (15), wherein the effective optical black area has a first side, a second side, a third side, and a fourth side in a plan view, the first side is located on the opposite side to the effective pixel area and does not face the contact area or faces the contact area at a distance greater than the second and fourth sides, the second and fourth sides are located facing the contact area, and the third side is located facing the effective pixel area. (17) The photodetector according to (15), wherein the effective optical black area has a first side, a second side, a third side, and a fourth side in a plan view, the first side is located on the opposite side to the effective pixel area and faces the contact area only at a portion of the first side, the second side and the fourth side are located facing the contact area, and the third side is located facing the effective pixel area. (18) The photodetector according to any one of (15) to (17), wherein a plurality of the effective optical black areas are provided facing different sides of the effective pixel area in a plan view, and the contact area is arranged so as not to face at least a portion of a plurality of sides of the plurality of effective optical black areas in a plan view. (19) The photodetector according to any one of (15) to (18), wherein the contact area is not arranged to face a portion of one side of the effective optical black area in a plan view, and is arranged to face the effective optical black area other than the portion of the one side. (20) The photodetector according to (19), further comprising: a don't care optical black area that does not generate the reference signal, and is arranged on both ends of the effective optical black area in a longitudinal direction, and the contact area is not arranged to face a portion of one side of the effective optical black area in a plan view, and is arranged to face the don't care optical black area other than the portion of the one side.

[0182] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents.

[0183] 1 Photodetector, 2 Dummy SF circuit, 3 Sunspot correction circuit, 4 Effective OPB circuit, 5 Fault detection circuit, 6 OFD circuit, 6R OFD area, 7 First substrate, 8 Second substrate, 9 Peripheral circuit section, 9a Logic circuit, 9b Control circuit, 11 Pixel array section, 12 Vertical drive section, 13 Column processing section, 14 Horizontal drive section, 15 System control section, 16 Signal processing section, 17 Data storage section, 18 Output section, 21 Pixel, 21a Pixel circuit, 22 Pixel drive wiring, 28 Comparator, 29 Counter, 31 First transfer transistor, 32 First FD, 33 Amplification transistor, 34 Selection transistor, 35 Conversion efficiency switching transistor, 36 Reset transistor, 37 Second FD, 38 Second transfer transistor, 39 Discharge transistor, 41 Effective pixel area, 41a First side, 41b Second side, 41c Third side, 41d Fourth side, 42 Opening dummy region, 43 Unrelated OPB region, 44 Effective OPB region, 44a First side, 44b Second side, 44c Third side, 44d Fourth side, 45 Process dummy region, 45px Process dummy pixel, 46 First guard ring region, 47 Second guard ring region, 48 Specific function transistor region, 49 N-type well region, 50 Junction portion, 51 Pad portion, 60 Light-shielding region, 61 Photoelectric conversion region, 62 Color filter, 62a Color filter, 63 Protective film, 64 On-chip lens, 65 Element isolation region, 65a Element isolation region, 66 Light-shielding member, 68 Step, 69 Light-shielding film, 70 Pixel region, 71 N-type well region, 72 P-type well region, 73 P-type well region, 74 N-type well region, 75 P-type well region, 80 OPB contact, 81 silicon layer, 82 insulating layer, 83 OPB metal, 84a P-type well region, 84b N-type well region

Claims

1. A photodetection device comprising: a pixel array portion having a plurality of pixels arranged in a first direction and a second direction intersecting each other; and a guard ring region disposed so as to surround the pixel array portion, wherein the pixel array portion includes: an effective pixel region having a plurality of pixels; a light-shielding region disposed around the effective pixel region, the light-shielding region including: a process dummy region in which a plurality of dummy pixels are arranged to suppress process variations; an effective optical black region that generates a reference signal for a black level in the plurality of pixels; an optical black region of no concern that is disposed between the effective pixel region and the effective optical black region without generating the reference signal; and a specific function transistor region having transistors that execute a specific function, and at least one of the process dummy region or the optical black region of no concern is disposed avoiding a region where the specific function transistor region does not exist.

2. The photodetection device according to claim 1, wherein at least one of the process dummy region or the optical black region of no concern is disposed avoiding a first pixel group arranged along the first direction and not including the transistor or a second pixel group arranged along the second direction and not including the transistor.

3. The photodetection device according to claim 1, wherein on at least one side of the effective pixel region, the specific function transistor region is not disposed, and at least one of the process dummy region or the optical black region of no concern is disposed on at least one side of the effective pixel region where the specific function transistor region is disposed and is not disposed on the other side of the effective pixel region where the specific function transistor region is not disposed.

4. The photodetection device according to claim 1, wherein in a region where at least one of the process dummy region or the optical black region of no concern is not disposed among regions around the effective pixel region, the guard ring region is disposed so as to be in contact with the process dummy region or the optical black region of no concern or in contact with the effective pixel region.

5. The photodetection device according to claim 1, wherein the specific function transistor region is disposed in a part of the optical black region of no concern.

6. The transistor in the specific function transistor region is a dummy source follower circuit that sets the voltage level of a signal line for transmitting a pixel signal photoelectrically converted by the plurality of pixels to a reference voltage level, a high illuminance correction circuit that corrects the voltage level of the signal line at high illuminance, or a failure detection circuit for the plurality of pixels. The photodetection device according to claim 1.

7. The pixel array unit is disposed between the effective pixel region and the light shielding region and has an opening dummy pixel region having the same pixel structure as the effective pixel region. The photodetection device according to claim 1.

8. Each of the plurality of pixels has a photoelectric conversion element that accumulates charges corresponding to the amount of incident light. At least a part of the effective pixel region and the light shielding region has a light shielding member disposed along the boundary between two adjacent pixels. The light shielding region has an overflow region that discharges charges overflowed by the photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light shielding member, and does not have the overflow region with respect to the photoelectric conversion element of a pixel that has the light shielding member. The photodetection device according to claim 1.

9. Each of the plurality of pixels has a photoelectric conversion element that accumulates charges corresponding to the amount of incident light. At least a part of the effective pixel region and the light shielding region has a light shielding member disposed along the boundary between two adjacent pixels. The light shielding region has an area of the overflow region that discharges charges overflowed by the photoelectric conversion of the photoelectric conversion element of a pixel that does not have the light shielding member wider than the area of the overflow region provided for the photoelectric conversion element of a pixel that has the light shielding member. The photodetection device according to claim 1.

10. Each of the plurality of pixels has a photoelectric conversion element that accumulates charges corresponding to the amount of incident light, and a color filter disposed in the light incident direction with respect to the photoelectric conversion element. A part of the light shielding region on the effective pixel region side does not have the color filter disposed therein. The photodetection device according to claim 1.

11. The color filter is not disposed in a part of the region within the light shielding region from the opening dummy pixel region disposed between the effective pixel region and the light shielding region. The photodetection device according to claim 10.

12. Each of the plurality of pixels has an on-chip lens disposed in the light incident direction with respect to the color filter, and has a light-shielding film that covers the surface of the on-chip lens of the pixel having no color filter in the light-shielding region. The photodetection device according to claim 10.

13. Each of the plurality of pixels has a photoelectric conversion element that accumulates charges according to the amount of incident light, a color filter disposed in the light incident direction with respect to the photoelectric conversion element, and an on-chip lens disposed in the light incident direction with respect to the color filter. A specific color color filter is disposed in a part of the light-shielding region on the effective pixel region side. The photodetection device according to claim 1.

14. The color filter has a different thickness for each color, and a color filter having the thinnest thickness is disposed in a part of the light-shielding region on the effective pixel region side. The photodetection device according to claim 13.

15. A pixel array unit having a plurality of pixels arranged in a two-dimensional direction, and a guard ring region arranged so as to surround the pixel array unit. The pixel array unit includes an effective pixel region having the plurality of pixels, and an effective optical black region arranged around the effective pixel region and generating a reference signal for the black level in the plurality of pixels. And a contact region that supplies a reference voltage to the effective optical black region. The effective optical black region has a plurality of sides in plan view. The contact region is arranged so as not to face at least a part of at least one side of the effective optical black region in plan view, or the distance from one side of the effective optical black region in plan view is larger than the distance from the other sides. A photodetection device arranged as described above.

16. The effective optical black region has a first side, a second side, a third side, and a fourth side in plan view. The first side is arranged on the side opposite to the effective pixel region and does not face the contact region, or faces the contact region at a distance larger than the second side and the fourth side. The second side and the fourth side are arranged to face the contact region. The third side is arranged to face the effective pixel region. The photodetection device according to claim 15.

17. The effective optical black region has a first side, a second side, a third side, and a fourth side in a plan view. The first side is disposed on the side opposite to the effective pixel region. Only a part of the first side is disposed opposite to the contact region. The second side and the fourth side are disposed opposite to the contact region. The third side is disposed opposite to the effective pixel region. The photodetection device according to claim 15.

18. A plurality of the effective optical black regions are provided so as to face different sides of the effective pixel region in a plan view. The contact region is disposed so as not to face at least a part of a plurality of sides of the plurality of effective optical black regions in a plan view. The photodetection device according to claim 15.

19. The contact region is not disposed opposite to a part of one side of the effective optical black region in a plan view, and is disposed opposite to the effective optical black region except for the part of the one side. The photodetection device according to claim 15.

20. It includes non - consideration optical black regions that are disposed at both ends in the longitudinal direction of the effective optical black region and do not generate the reference signal. The contact region is not disposed opposite to a part of one side of the effective optical black region in a plan view, and is disposed opposite to the non - consideration optical black region except for the part of the one side. The photodetection device according to claim 19.

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