Touch display panel and touch display device

Abstract

Disclosed in embodiments of the present application are a touch display panel and a touch display device. The touch display panel in the embodiments of the present application is provided with a demultiplexing circuit; the demultiplexing circuit is located in a frame region, and the demultiplexing circuit comprises multiple signal output lines and multiple signal input lines; each signal output line is correspondingly connected to a touch electrode by means of a first connecting pad or a second connecting pad, and each signal input line is configured to be connected to a detection pad; and the number of the signal input lines is smaller than the number of the signal output lines.

Description

Touch display panel and touch display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a touch display panel and a touch display device. Background Art

[0002] In related technologies, AMOLED on-cell displays are widely used in various interactive electronic devices due to their high durability, long lifespan, and multi-touch support. AMOLED on-cell displays require panel inspection before module assembly to detect defects in the front-end design. Since panel inspection typically involves probing test pads to detect continuity, this requires additional inspection circuitry on the panel, which occupies a significant amount of space within the panel's frame routing area.

[0003] Currently, the touch control solutions for AMOLED on-cell displays all use a mutual capacitance design. The detection pads in the touch detection circuit include a first detection pad that is connected one-to-one to the drive electrode and a second detection pad that is connected one-to-one to the sense electrode. This results in a large number of detection pads in the touch detection circuit. SUMMARY OF THE INVENTION

[0004] Embodiments of the present application provide a touch display panel and a touch display device, which can reduce the number of detection pads required for the touch display panel.

[0005] In one aspect, an embodiment of the present application provides a touch display panel, comprising a display area and a frame area located on at least one side of the display area, comprising:

[0006] a plurality of touch electrodes, wherein the touch electrodes are located in the display area;

[0007] a first connection pad group, the first connection pad group being located in the border area, the first connection pad group including a first connection pad and a second connection pad spaced apart from the first connection pad, the first connection pad being configured to connect to an output pin of a chip, the second connection pad being configured to connect to an input pin of the chip, and the touch electrode being correspondingly connected to one of the first connection pad and the second connection pad;

[0008] A demultiplexing circuit, the demultiplexing circuit is located in the border area, the demultiplexing circuit includes multiple signal output lines and multiple signal input lines, one of the signal output lines is connected to one of the touch electrodes through one of the first connection pads or the second connection pad, and one of the signal input lines is configured to connect to a detection pad, and the number of the signal input lines is less than the number of the signal output lines.

[0009] On the other hand, an embodiment of the present application further provides a touch display device, which includes the touch display panel and the touch display chip as described in any one of the above embodiments, and the touch display chip is bound and connected to the first connection pad group. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] FIG1 is a schematic diagram of an orthographic projection structure of an OLED on-cell display provided by the related art;

[0011] FIG2 is a schematic diagram of a partial structure of a non-display area of ​​an OLED on-cell display provided by the related art when the display is in a flat state;

[0012] FIG3 is a schematic diagram of an orthographic projection structure of a touch display panel provided in an embodiment of the present application;

[0013] FIG4 is a schematic structural diagram of a non-display area of ​​a touch display panel provided by an embodiment of the present application when the touch display panel is in a flattened state;

[0014] FIG5 is a schematic diagram of a partial structure of a non-display area of ​​a touch display panel provided by an embodiment of the present application when the touch display panel is in a flat state;

[0015] FIG6 is an enlarged view of portion A in FIG5 ;

[0016] FIG7 is a schematic structural diagram of two demultiplexing circuits of a touch display panel provided in an embodiment of the present application;

[0017] FIG8 is a circuit diagram of a demultiplexing circuit and touch electrodes of a touch display panel provided in an embodiment of the present application;

[0018] FIG9 is a timing diagram of the demultiplexing circuit in FIG8 ;

[0019] FIG10 is another partial structural diagram of the non-display area of ​​the touch display panel provided by an embodiment of the present application when in a flat state;

[0020] FIG11 is a schematic cross-sectional view of a non-display area of ​​a touch display panel provided in an embodiment of the present application when the touch display panel is in a flattened state;

[0021] FIG12 is another cross-sectional structural diagram of the non-display area of ​​the touch display panel provided by an embodiment of the present application when in a flattened state;

[0022] FIG13 is a schematic structural diagram of a touch display device provided in an embodiment of the present application. Modes for Carrying Out the Invention

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as labels and do not impose numerical requirements or establish an order.

[0024] The embodiments of the present application provide a touch display panel and a touch display device, which are described in detail below. It should be noted that the order of description of the following embodiments does not limit the preferred order of the embodiments.

[0025] As shown in Figures 1 and 2, in the related art of OLED on-cell displays, a touch structure is provided on the display panel. The touch structure includes touch electrodes TR and touch traces TP connected one-to-one to the touch electrodes TR. The touch electrodes TR in the column direction are drive electrodes, and the touch electrodes TR in the row direction are sensing electrodes. Each touch trace TP is connected to a transfer pad ZJ. The touch detection circuit includes a detection pad JC that is connected one-to-one to the touch trace TP via the transfer pad ZJ. This results in a larger number of detection pads JC in the touch detection circuit, resulting in a larger layout area for the detection circuit. Since the detection pads JC are removed after detection, they are represented by dotted lines.

[0026] The touch display panel of the embodiment of the present application is provided with a first connection pad group and a demultiplexing circuit. The first connection pad group includes a first connection pad and a second connection pad spaced apart from the first connection pad. The first connection pad is provided as an output pin for connecting to a chip, and the second connection pad is provided as an input pin for connecting to the chip. A touch electrode is correspondingly connected to one of the first connection pad and the second connection pad. The demultiplexing circuit is located in the border area. The demultiplexing circuit includes multiple signal output lines and multiple signal input lines. A signal output line is correspondingly connected to a touch electrode via a first connection pad or a second connection pad. A signal input line is provided as a connection to a detection pad. The number of signal input lines is less than the number of signal output lines. In other words, the embodiment of the present application reduces the number of signal input lines by providing a demultiplexing circuit, thereby reducing the number of detection pads.

[0027] On the other hand, the reduction in the number of detection pads and transfer pads reduces the electromagnetic shielding area of ​​the flexible circuit board and increases the space utilization of the touch display panel.

[0028] An embodiment of the present application provides a touch display panel, comprising a display area and a frame area located on at least one side of the display area, comprising:

[0029] a plurality of touch electrodes, wherein the touch electrodes are located in the display area;

[0030] a first connection pad group, the first connection pad group being located in the border area, the first connection pad group including a first connection pad and a second connection pad spaced apart from the first connection pad, the first connection pad being configured to connect to an output pin of a chip, the second connection pad being configured to connect to an input pin of the chip, and the touch electrode being correspondingly connected to one of the first connection pad and the second connection pad;

[0031] A demultiplexing circuit, the demultiplexing circuit is located in the border area, the demultiplexing circuit includes multiple signal output lines and multiple signal input lines, one of the signal output lines is connected to one of the touch electrodes through one of the first connection pads or the second connection pad, and one of the signal input lines is configured to connect to a detection pad, and the number of the signal input lines is less than the number of the signal output lines.

[0032] Optionally, in some embodiments of the present application, the touch display panel further includes a second connection pad group, the second connection pad group is arranged on a side of the first connection pad group away from the display area, the second connection pad group includes a plurality of adapter pads and at least two third connection pads, and one of the signal input lines is connected to the detection pad via one of the adapter pads;

[0033] The touch display panel further includes a power line, and one of the power lines is correspondingly connected to at least two of the third connection pads.

[0034] Optionally, in some embodiments of the present application, the width of the power trace is greater than the sum of the widths of at least two of the third connection pads.

[0035] Optionally, in some embodiments of the present application, the power supply line includes a cathode line and a positive voltage supply line, one cathode line is connected to at least two of the third connection pads, and one positive voltage supply line is connected to at least two of the third connection pads.

[0036] Optionally, in some embodiments of the present application, the number of the third connection pads correspondingly connected to the cathode wiring is greater than the number of the third connection pads correspondingly connected to the positive voltage power supply wiring.

[0037] Optionally, in some embodiments of the present application, the width of the cathode trace is greater than the sum of the widths of all the third connection pads connected to it, the width of the positive voltage power supply trace is greater than the sum of the widths of all the third connection pads connected to it, and the width of the cathode trace is greater than the width of the positive voltage power supply trace.

[0038] Optionally, in some embodiments of the present application, the touch display panel also includes a second connection pad group, which is arranged on a side of the first connection pad group away from the display area, and the second connection pad group includes a plurality of the detection pads and a third connection pad. The touch display panel includes a power line, and the power line is correspondingly connected to the third connection pad, and the width of the detection pad is greater than the width of the third connection pad.

[0039] Optionally, in some embodiments of the present application, the second connection pad group further includes a control pad, a plurality of the control pads are arranged on one side of the detection pad, one of the control pads is connected to a control end of the demultiplexing circuit through a transfer pad, the control pad is used to access the control signal, and the width of the control pad is greater than the width of the third connection pad.

[0040] Optionally, in some embodiments of the present application, the demultiplexing circuit further includes at least two thin film transistors;

[0041] In one of the demultiplexing circuits, the input electrodes of all the thin film transistors are connected to one of the signal input lines, the output electrode of each of the thin film transistors is correspondingly connected to one of the signal output lines, and the gate electrode of each of the thin film transistors is correspondingly connected to one of the control signal lines;

[0042] In the orthographic projection pattern of the touch display panel, the demultiplexing circuit is arranged between the first connection pad and the second connection pad, or arranged on one side of the first connection pad group.

[0043] Optionally, in some embodiments of the present application, when the touch display panel is in a normal display state, the thin film transistor of the demultiplexing circuit is in a closed state.

[0044] Optionally, in some embodiments of the present application, the touch display panel includes:

[0045] a substrate and a buffer layer, wherein the buffer layer is disposed on the substrate;

[0046] an active layer, the active layer being disposed on the buffer layer;

[0047] a first insulating layer, wherein the first insulating layer covers the active layer and the buffer layer;

[0048] a first metal layer, the first metal layer being arranged on a side of the first insulating layer away from the substrate, the first metal layer comprising a gate, a first connecting line, and a second connecting line;

[0049] a second insulating layer, the second insulating layer covering the first metal layer and the first insulating layer;

[0050] a second metal layer, the second metal layer being arranged on a side of the second insulating layer away from the substrate, the second metal layer comprising a first bottom portion, a first electrode, a second electrode, a third connecting line, a fourth connecting line, and a fifth connecting line;

[0051] a metal stack, the metal stack including a sixth connection line connecting a first middle portion provided on the first bottom portion and a side of the second insulating layer away from the substrate;

[0052] a third insulating layer and a third metal layer, the third insulating layer covering the metal stack, the second metal layer, and the second insulating layer, the third insulating layer having a first opening exposing the first middle portion, the third metal layer including a first top portion, the first top portion being connected and disposed on the first middle portion and within the first opening;

[0053] The active layer, the gate, the first electrode, and the second electrode form the thin film transistor; the first bottom portion, the first middle portion, and the first top portion are stacked to form the first connection pad; the first connection line is connected to the third connection line to form the signal output line; and the fourth connection line, the second connection line, the fifth connection line, and the sixth connection line are sequentially connected to form the signal input line.

[0054] The first bottom portion is connected to one end of the first connecting line through a first via, the other end of the first connecting line is connected to the third connecting line through a second via, the third connecting line is connected to the first electrode, the first electrode is connected to one side of the active layer through a third via, the second electrode is connected to the other side of the active layer through another third via, the fourth connecting line is connected to the second electrode and to one end of the second connecting line through a fourth via, the other end of the second connecting line is connected to the fifth connecting line through a fifth via, and the sixth connecting line is connected to the fifth connecting line.

[0055] Correspondingly, an embodiment of the present application further provides a touch display device, which includes the touch display panel and the touch display chip as described in any one of the above embodiments, and the touch display chip is bound and connected to the first connection pad group.

[0056] The touch display panel of the present embodiment is provided with a demultiplexing circuit. The demultiplexing circuit is located in the border area. The demultiplexing circuit includes multiple signal output lines and multiple signal input lines. Each signal output line is connected to a touch electrode via a first connection pad or a second connection pad, and each signal input line is configured to connect to a detection pad. The number of signal input lines is less than the number of signal output lines. In other words, the provision of the demultiplexing circuit in the present embodiment reduces the number of signal input lines, thereby reducing the number of detection pads.

[0057] Referring to Figures 3, 4, and 5, an embodiment of the present application provides a touch display panel 100 comprising a display area AA and a border area NA located on at least one side of the display area AA. The touch display panel 100 includes touch electrodes CK, a first connection pad group DP, and a demultiplexing circuit DE. The border area NA also includes a bending area BD.

[0058] A plurality of touch electrodes CK are located in the display area AA.

[0059] The first connection pad group DP is located in the border area NA. The first connection pad group DP includes a first connection pad D1 and a second connection pad D2 spaced apart from the first connection pad D1. The first connection pad D1 is configured to connect to the output pin of the chip IC, and the second connection pad D2 is configured to connect to the input pin of the chip IC. A touch electrode CK is connected to one of the first connection pad D1 and the second connection pad D2.

[0060] Multiple demultiplexing circuits DE are located in the border area NA. The demultiplexing circuits DE include multiple signal output lines 11 and multiple signal input lines 12. Each signal output line 11 is connected to a touch electrode CK via a first connection pad D1 or a second connection pad D2, and each signal input line 12 is connected to a detection pad CT. The number of signal input lines 12 is less than the number of signal output lines 11.

[0061] The touch display panel 100 of the present embodiment is provided with a demultiplexing circuit DE, which is located in the border area NA. The demultiplexing circuit DE includes multiple signal output lines 11 and multiple signal input lines 12. Each signal output line 11 is connected to a touch electrode CK via a first connection pad D1 or a second connection pad D2, and each signal input line 12 is configured to connect to a detection pad CT. The number of signal input lines 12 is less than the number of signal output lines 11. In other words, the provision of the demultiplexing circuit DE in the present embodiment reduces the number of signal input lines 12, thereby reducing the number of detection pads CT.

[0062] On the other hand, the reduction in the number of detection pads CT and transfer pads E1 reduces the electromagnetic shielding area of ​​the flexible circuit board and also increases the space utilization of the touch display panel.

[0063] When the touch display panel 100 is assembled as a finished product, the demultiplexing circuit DE, the first connection pad group DP and the chip IC are bent to the back side of the display area AA through the bending area BD.

[0064] The touch control mode formed by the multiple touch electrodes CK can be mutual capacitance or self-capacitance. Optionally, the touch electrodes CK include drive electrodes tx and sense electrodes rx. A drive electrode tx is connected to a first connection pad D1 via a touch trace p1, and a sense electrode rx is connected to another first connection pad D1 via another touch trace p1.

[0065] Optionally, in some embodiments, a driving electrode tx may be connected to a second connection pad D2 via a touch trace p1, and a sensing electrode rx may be connected to a second connection pad D2 via another touch trace p1. Alternatively, a driving electrode tx may be connected to one of a first connection pad D1 and a second connection pad D2 via a touch trace p1, and a sensing electrode rx may be connected to the other of the first connection pad D1 and the second connection pad D2 via another touch trace p1.

[0066] Optionally, the chip IC can be a touch chip or a touch display chip. In order to save layout space and simplify circuits, the chip IC is a touch display chip.

[0067] Optionally, the touch line p1 extends from the display area AA to the frame area NA and is connected to the first connection pad D1. In the frame area NA, the touch line p1 is located between the chip IC and the display area AA.

[0068] In the border area NA, touch trace p1 includes a first segment p11, a second segment p12, and a third segment p13. From the display area AA toward the chip IC, the first segment p11, the second segment p12, and the third segment p13 are connected in sequence, with the third segment p13 connected to the first connection pad D1. The third segment p13 extends parallel to the direction y of the first segment p11, and the second segment p12 intersects the directions of the first segment p11 and the third segment p13, respectively.

[0069] The first line segment p11 passes through the bend BD and is located on the chip IC. The second line segment p12 and the third line segment p13 are located between the bend BD and the chip IC. Based on the central axis of the long side ic1 of the chip IC, the distance from the first line segment p11 to the central axis is greater than the distance from the third line segment p12 to the central axis.

[0070] Optionally, the extension direction y of the first line segment p11 is perpendicular to the long axis direction of the bending area BD, or the extension direction y of the first line segment p11 is perpendicular to the arrangement direction of multiple first connection pads D1, or the extension direction y of the first line segment p11 is perpendicular to the extension direction of the long side ic1 of the rectangular chip IC.

[0071] Furthermore, the straight-line distance between the end of the second line segment p12 connected to the first line segment p11 and the end connected to the third line segment p13 is the diagonal distance. Within the frame area NA, the diagonal distance of the second line segment p12 decreases from both sides of the display panel 100 toward the central axis of the long side ic1 of the chip IC to conserve wiring space.

[0072] It should be noted that in this embodiment, for ease of understanding, Figures 4 and 5 show the detection pad CT and the control pad CN. However, after the touch test is completed, the detection pad CT and the control pad CN will be removed. Of course, in some embodiments, the detection pad CT may also be retained.

[0073] 5 to 7 , in one embodiment of the present application, a demultiplexing circuit DE includes at least two thin film transistors TFT.

[0074] In a demultiplexing circuit DE, the input electrodes of all thin film transistors TFT are connected to a signal input line 12 , the output electrode of each thin film transistor TFT is correspondingly connected to a signal output line 11 , and the gate electrode of each thin film transistor TFT is correspondingly connected to a control signal line 14 .

[0075] In the orthographic projection pattern of the touch display panel 100 , the demultiplexing circuit DE is disposed between the first connection pad D1 and the second connection pad D2 , or disposed on at least one side of the first connection pad group DP.

[0076] Optionally, the demultiplexing circuit DE may be disposed between the first connection pad D1 and the second connection pad D2 , that is, the chip IC and the demultiplexing circuit DE may overlap, thereby saving layout space of the demultiplexing circuit DE.

[0077] 8 and 9 , the embodiment of the present application is described by taking a demultiplexing circuit DE having four signal output lines 11 and one signal input line 12 as an example, but the invention is not limited thereto.

[0078] It should be understood that the driving electrodes tx in the same column or row are sequentially connected to form a driving channel, and the sensing electrodes rx in the same row or column are sequentially connected to form a sensing channel.

[0079] For example, every four driving electrode channels are connected to a demultiplexing circuit DE, and each driving electrode channel is connected to a thin film transistor TFT; every four sensing electrode channels are also connected to a demultiplexing circuit DE, and each sensing electrode channel is connected to a thin film transistor TFT.

[0080] For example, the first to fourth drive electrode channels tx1 to tx4 are connected to a corresponding demultiplexing circuit DE, and the fifth to eighth drive electrode channels tx5 to tx8 are connected to a corresponding demultiplexing circuit DE. The first drive electrode channel tx1 and the fifth drive electrode channel tx5 are connected to the first control signal line txm1, the second drive electrode channel tx2 and the sixth drive electrode channel tx6 are connected to the second control signal line txm2, the third drive electrode channel tx3 and the seventh drive electrode channel tx7 are connected to the third control signal line txm3, and the fourth drive electrode channel tx4 and the eighth drive electrode channel tx8 are connected to the fourth control signal line txm4.

[0081] The first sensing electrode channel rx1 to the fourth sensing electrode channel rx4 are each connected to a demultiplexing circuit DE, and the fifth sensing electrode channel rx5 to the eighth sensing electrode channel rx8 are each connected to a demultiplexing circuit DE. The first sensing electrode channel rx1 and the fifth sensing electrode channel rx5 are connected to the fifth control signal line rxm1, the second sensing electrode channel rx2 and the sixth sensing electrode channel rx6 are connected to the sixth control signal line rxm2, the third sensing electrode channel rx3 and the seventh sensing electrode channel rx7 are connected to the seventh control signal line rxm3, and the fourth sensing electrode channel rx4 and the eighth sensing electrode channel rx8 are connected to the eighth control signal line rxm4.

[0082] When performing touch detection, the first step is to input a low level to turn on the thin-film transistors TFT corresponding to the first control signal line txm1 and the fifth control signal line rxm1, and turn on the first drive electrode channel tx1, the fifth drive electrode channel tx5, the first sensing electrode channel rx1, and the fifth sensing electrode channel rx5. The capacitance values ​​of four nodes, namely, the first drive electrode channel tx1 and the first sensing electrode channel rx1, the first drive electrode channel tx1 and the fifth sensing electrode channel rx5, the fifth drive electrode channel tx5 and the first sensing electrode channel rx1, and the fifth drive electrode channel tx5 and the fifth sensing electrode channel rx5, can be detected to determine whether the four nodes are open or short-circuited.

[0083] Step 2: Maintain the first control signal line txm1 at a low level, the fifth control signal line rxm1 at a high level, and the sixth control signal line rxm2 at a low level, thereby shutting down the first sensing electrode channel rx1 and the fifth sensing electrode channel rx5 and opening the second sensing electrode channel rx2 and the sixth sensing electrode channel rx6. Detect the capacitance values ​​of four nodes: the first drive electrode channel tx1 and the second sensing electrode channel rx2, the first drive electrode channel tx1 and the sixth sensing electrode channel rx6, the fifth drive electrode channel tx5 and the second sensing electrode channel rx2, and the fifth drive electrode channel tx5 and the sixth sensing electrode channel rx6. In short, maintain the first control signal line txm1 at a low level, then sequentially turn on the thin-film transistors TFT corresponding to the seventh control signal line rxm3 and the eighth control signal line rxm4, until the capacitance values ​​of all nodes on the first drive electrode channel tx1 and the fifth drive electrode channel tx5 are detected.

[0084] Step 3: The first control signal line txm1 is connected to a high level, the first drive electrode channel tx1 and the fifth drive electrode channel tx5 are turned off, the second control signal line txm2 is connected to a low level, the second drive electrode channel tx2 and the sixth drive electrode channel tx6 are turned on, and the capacitance value of each node on the second drive electrode channel tx2 and the sixth drive electrode channel tx6 is detected similarly. Then, the capacitance value of each node on the drive electrode channel controlled by the next control signal line is detected until the capacitance values ​​of all nodes of the touch display panel are detected.

[0085] It should be noted that the thin film transistor TFT can also be turned on when connected to a high level and turned off when connected to a low level. The gate of the thin film transistor TFT is the control terminal of the demultiplexing circuit DE. The gate of the thin film transistor TFT is electrically connected to the control pad CN through the control signal line 14.

[0086] In addition, after the touch detection is performed, the detection pads CT and the control pads CN may be removed or may remain on the touch display panel 100 .

[0087] In one embodiment of the present application, when the touch display panel 100 is in a normal display state, the thin film transistor TFT of the demultiplexing circuit DE is in an off state.

[0088] It should be understood that after touch detection, the demultiplexing circuit DE is a floating circuit, which will cause certain interference to the normal display of the touch display panel 100. Therefore, by turning off the thin film transistor TFT of the demultiplexing circuit DE, the interference risk of the demultiplexing circuit DE on the touch display is reduced.

[0089] Optionally, compared with turning off the thin film transistor TFT connected to a low level and turning off the thin film transistor TFT connected to a high level, the thin film transistor TFT has a better anti-leakage effect and can better reduce the interference risk of the demultiplexing circuit DE on the touch display.

[0090] Continuing with Figures 4 and 5 , in one embodiment of the present application, the touch display panel 100 further comprises a second connection pad group EP, which is disposed on a side of the first connection pad group DP away from the display area AA. The second connection pad group EP includes a plurality of adapter pads E1 and at least two third connection pads E2. A signal input line 12 is connected to the detection pad CT via one of the adapter pads E1.

[0091] The touch display panel 100 further includes power traces 13 , and one power trace 13 is correspondingly connected to at least two third connection pads E2 .

[0092] This embodiment reduces the number of transfer pads E1 and detection pads CT through the demultiplexing circuit DE, thereby leaving more space for arranging more third connection pads E2, so that the power line 13 is connected to more third connection pads E2, thereby achieving the effect of reducing impedance and improving display brightness.

[0093] In one embodiment of the present application, the width of the power trace 13 is greater than the sum of the widths of at least two third connection pads E2 .

[0094] It should be understood that the reduction in the number of adapter pads E1 and detection pads CT also reduces the number of wiring lines connecting the two, further saving wiring space and allowing the width of the power line 13 to be set larger to reduce impedance.

[0095] Optionally, the power supply trace 13 includes a cathode trace 131 and a positive voltage supply trace 132. A cathode trace 131 is connected to at least two third connection pads E2. A positive voltage supply trace 132 is connected to at least two third connection pads E2.

[0096] The cathode wiring 131 is used to connect to the cathode of the organic light emitting diode, and the positive voltage power supply wiring 132 provides a positive voltage for the pixel circuit.

[0097] The cathode trace 131 and the positive voltage supply trace 132 are both connected to at least two third connection pads E2 to reduce the impedance of the cathode trace 131 and the positive voltage supply trace 132 .

[0098] In this embodiment, an appropriate number of third connection pads E2 can be provided according to the actual space saved.

[0099] In one embodiment of the present application, the number of third connection pads E2 connected to the cathode traces 131 is greater than the number of third connection pads E2 connected to the positive voltage supply traces 132. This configuration can further reduce the impedance of the cathode traces 131 and improve the display effect of the touch display panel 100.

[0100] In one embodiment of the present application, the width h1 of the cathode trace 131 is greater than the sum of the widths h2 of all third connection pads E2 connected thereto. The width h3 of the positive voltage supply trace 132 is greater than the sum of the widths h2 of all third connection pads E2 connected thereto. The width h1 of the cathode trace 131 is greater than the width h3 of the positive voltage supply trace 132.

[0101] The width of the cathode line 131 is set to be greater than the width of the positive voltage supply line 132 , so as to further reduce the impedance of the cathode line 131 and improve the display effect of the touch display panel 100 .

[0102] Optionally, the number of cathode traces 131 is greater than the number of positive voltage supply traces 132 , and all cathode traces 131 are electrically connected to each other to reduce cathode impedance and improve the display effect of the touch display panel 100 .

[0103] Optionally, in some embodiments, the saved space may be utilized to increase the width of the connection pads in the second connection pad group EP to improve the yield rate of binding with the flexible circuit board.

[0104] In one embodiment, the second connection pad group EP further includes a control pad CN. A plurality of control pads CN are arranged on one side of the detection pad CT, and a control signal line 14 is connected to a control pad CN via a transfer pad E1. The control pad CN is used to receive control signals.

[0105] Optionally, referring to Figure 10, an embodiment of the present application can also utilize the saved space to increase the width of the adapter pad so that the size of the adapter pad matches the detection probe, thereby using part of the adapter pad as the detection pad CT and part of the adapter pad as the control pad CN, without the need to set up an additional touch detection circuit. For example, the touch display panel 100 also includes a second connection pad group EP, and the second connection pad group EP is arranged on the side of the first connection pad group DP away from the display area AA. The second connection pad group EP includes a plurality of detection pads CT and a third connection pad E2. The touch display panel 100 includes a power line 13, and the power line 13 is correspondingly connected to the third connection pad E2. The width h4 of the detection pad CT is greater than the width h2 of the third connection pad E2.

[0106] Optionally, the second connection pad group EP includes a plurality of control pads CN, and one control pad CN is correspondingly connected to one signal control line 14. The width of the control pad CN is greater than the width h2 of the third connection pad E2.

[0107] 11 and 12 , in one embodiment of the present application, the touch display panel 100 includes a substrate 111 , a buffer layer 112 , an active layer 113 , a first insulating layer 114 , a first metal layer 115 , a second insulating layer 116 , a second metal layer 117 , a metal stack Dc, a third insulating layer 118 , and a third metal layer 119 .

[0108] The buffer layer 112 is disposed on the substrate 111. The active layer 113 is disposed on the buffer layer 112. The first insulating layer 114 covers the active layer 113 and the buffer layer 112.

[0109] The first metal layer 115 is disposed on a side of the first insulating layer 114 away from the substrate 111. The first metal layer 115 includes a gate g1, a first connection line g2, and a second connection line g3. The second insulating layer 116 covers the first metal layer 115 and the first insulating layer 114.

[0110] The second metal layer 117 is disposed on a side of the second insulating layer 116 away from the substrate 111. The second metal layer 117 includes a first bottom portion s1, a first electrode s2, a second electrode s3, a third connection line s4, a fourth connection line s5, and a fifth connection line s6.

[0111] The metal stack Dc includes a first middle portion d1 connected to the first bottom portion s1 and a sixth connection line d2 disposed on a side of the second insulating layer 116 away from the substrate 111 .

[0112] The third insulating layer 118 covers the metal stack Dc, the second metal layer 117, and the second insulating layer 116. A first opening k1 is defined in the third insulating layer 118, exposing the first central portion d1. The third metal layer 119 includes a first top portion z1, which is connected to the first central portion d1 and disposed within the first opening k1.

[0113] The active layer 113, gate g1, first electrode s2, and second electrode s3 form a thin-film transistor (TFT). The first bottom portion s1, first middle portion d1, and first top portion z1 are stacked to form a first connection pad D1. The first connection line g2 is connected to the third connection line s4 to form a signal output line 11. The fourth connection line s5, second connection line g3, fifth connection line s6, and sixth connection line d2 are sequentially connected to form a signal input line 12.

[0114] The first bottom portion s1 is connected to one end of the first connection line g2 through a first via r1. The other end of the first connection line g2 is connected to a third connection line s4 through a second via r2. The third connection line s4 is connected to the first electrode s2. The first electrode s2 is connected to one side of the active layer 113 through a third via r3. The second electrode s3 is connected to the other side of the active layer 113 through another third via r3. A fourth connection line s5 is connected to the second electrode s3 and to one end of the second connection line g3 through a fourth via r4. The other end of the second connection line g3 is connected to a fifth connection line s6 through a fifth via r5. A sixth connection line d2 is connected to the fifth connection line s6.

[0115] Optionally, the metal stack Dc is formed by stacking at least two metal layers.

[0116] Optionally, the first metal layer 115 further includes a seventh connecting line g4. The second metal layer 117 further includes a second bottom portion s7, an eighth connecting line s8, and a third bottom portion S9. The metal stack Dc further includes a second middle portion d3, a third middle portion d4, and a ninth connecting line d5. The third metal layer 119 further includes a second top portion z2 and a third top portion z3.

[0117] The second bottom portion s7, the second middle portion d3, and the second top portion z2 are stacked to form the transfer pad E1. The structure of the third connection pad E2 is similar to or identical to that of the transfer pad E1. The third bottom portion s9, the third middle portion d4, and the third top portion z3 are stacked to form the detection pad CT. The second bottom portion s7 is connected to the seventh connection line g4 via the sixth via r6. The seventh connection line g4 is connected to the eighth connection line s8 via the seventh via r7. The eighth connection line s8 is connected to the ninth connection line d5, and the ninth connection line d5 is connected to the third middle portion z2. The seventh connection line g4, the eighth connection line s8, and the ninth connection line d5 are connected to form the detection trace 15.

[0118] The first connection pad D1 , the third connection pad E2 , the transfer pad E1 and the detection pad CT are all formed by stacking multiple layers of metal to reduce their impedance, increase their thickness and improve their compressive strength.

[0119] Please refer to Figure 13. Accordingly, the embodiment of the present application further provides a touch display device 1000, which includes the touch display panel 100 and the touch display chip IC as described in any of the above embodiments, and the touch display chip IC is bound and connected to the first connection pad group DP.

[0120] The structure of the touch display panel 100 of the touch display device 1000 of this embodiment is similar to or the same as that of the touch display panel 100 of the above-mentioned embodiment, and thus will not be described in detail here.

[0121] In the touch display device 1000 of the embodiment of the present application, the touch display panel 100 is provided with a demultiplexing circuit DE, which is located in the border area NA. The demultiplexing circuit DE includes multiple signal output lines 11 and multiple signal input lines 12. Each signal output line 11 is connected to a touch electrode CK via a first connection pad D1 or a second connection pad D2, and each signal input line 12 is configured to connect to a detection pad CT. The number of signal input lines 12 is less than the number of signal output lines 11. In other words, the embodiment of the present application reduces the number of signal input lines 12 by providing the demultiplexing circuit DE, thereby reducing the number of detection pads CT.

[0122] The above is a detailed introduction to a touch display panel and a touch display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A touch display panel comprising a display area and a frame area located on at least one side of the display area, comprising: a plurality of touch electrodes, wherein the touch electrodes are located in the display area; a first connection pad group, the first connection pad group being located in the border area, the first connection pad group including a first connection pad and a second connection pad spaced apart from the first connection pad, the first connection pad being configured to connect to an output pin of a chip, the second connection pad being configured to connect to an input pin of the chip, and the touch electrode being correspondingly connected to one of the first connection pad and the second connection pad; A demultiplexing circuit, the demultiplexing circuit is located in the border area, the demultiplexing circuit includes multiple signal output lines and multiple signal input lines, one of the signal output lines is connected to one of the touch electrodes through one of the first connection pads or the second connection pad, and one of the signal input lines is configured to connect to a detection pad, and the number of the signal input lines is less than the number of the signal output lines.

2. The touch display panel according to claim 1, wherein: The touch display panel further includes a second connection pad group, which is arranged on a side of the first connection pad group away from the display area, the second connection pad group including a plurality of adapter pads and at least two third connection pads, and one of the signal input lines is connected to the detection pad via one of the adapter pads; The touch display panel further includes a power line, and one of the power lines is correspondingly connected to at least two of the third connection pads.

3. The touch display panel according to claim 2, wherein: The width of the power line is greater than the sum of the widths of at least two of the third connection pads.

4. The touch display panel according to claim 2, wherein: The power supply trace includes a cathode trace and a positive voltage supply trace, one cathode trace is correspondingly connected to at least two of the third connection pads, and one positive voltage supply trace is correspondingly connected to at least two of the third connection pads.

5. The touch display panel according to claim 4, wherein: The number of the third connection pads correspondingly connected to the cathode wiring is greater than the number of the third connection pads correspondingly connected to the positive voltage power supply wiring.

6. The touch display panel according to claim 5, wherein: The width of the cathode trace is greater than the sum of the widths of all the third connection pads connected thereto, the width of the positive voltage supply trace is greater than the sum of the widths of all the third connection pads connected thereto, and the width of the cathode trace is greater than the width of the positive voltage supply trace.

7. The touch display panel according to claim 1, wherein: The touch display panel also includes a second connection pad group, which is arranged on a side of the first connection pad group away from the display area. The second connection pad group includes a plurality of detection pads and a third connection pad. The touch display panel includes a power line, which is correspondingly connected to the third connection pad. The width of the detection pad is greater than the width of the third connection pad.

8. The touch display panel according to claim 7, wherein: The second connection pad group also includes a control pad, multiple control pads are arranged on one side of the detection pad, one control pad is connected to a control end of the demultiplexing circuit through a transfer pad, the control pad is used to access the control signal, and the width of the control pad is greater than the width of the third connection pad.

9. The touch display panel according to claim 1, wherein: The demultiplexing circuit includes at least two thin film transistors; In one of the demultiplexing circuits, the input electrodes of all the thin film transistors are connected to one of the signal input lines, the output electrode of each of the thin film transistors is correspondingly connected to one of the signal output lines, and the gate electrode of each of the thin film transistors is correspondingly connected to one of the control signal lines; In the orthographic projection pattern of the touch display panel, the demultiplexing circuit is disposed between the first connection pad and the second connection pad, or is disposed on at least one side of the first connection pad group.

10. The touch display panel according to claim 9, wherein: When the touch display panel is in a normal display state, the thin film transistor of the demultiplexing circuit is in a closed state.

11. The touch display panel according to claim 9, wherein: The touch display panel includes: a substrate and a buffer layer, wherein the buffer layer is disposed on the substrate; an active layer, the active layer being disposed on the buffer layer; a first insulating layer, wherein the first insulating layer covers the active layer and the buffer layer; a first metal layer, the first metal layer being arranged on a side of the first insulating layer away from the substrate, the first metal layer comprising a gate, a first connecting line, and a second connecting line; a second insulating layer, the second insulating layer covering the first metal layer and the first insulating layer; a second metal layer, the second metal layer being arranged on a side of the second insulating layer away from the substrate, the second metal layer comprising a first bottom portion, a first electrode, a second electrode, a third connecting line, a fourth connecting line, and a fifth connecting line; a metal stack, the metal stack including a sixth connection line connecting a first middle portion provided on the first bottom portion and a side of the second insulating layer away from the substrate; a third insulating layer and a third metal layer, the third insulating layer covering the metal stack, the second metal layer, and the second insulating layer, the third insulating layer having a first opening exposing the first middle portion, the third metal layer including a first top portion, the first top portion being connected and disposed on the first middle portion and within the first opening; The active layer, the gate, the first electrode, and the second electrode form the thin film transistor; the first bottom portion, the first middle portion, and the first top portion are stacked to form the first connection pad; the first connection line is connected to the third connection line to form the signal output line; and the fourth connection line, the second connection line, the fifth connection line, and the sixth connection line are sequentially connected to form the signal input line. The first bottom portion is connected to one end of the first connecting line through a first via, the other end of the first connecting line is connected to the third connecting line through a second via, the third connecting line is connected to the first electrode, the first electrode is connected to one side of the active layer through a third via, the second electrode is connected to the other side of the active layer through another third via, the fourth connecting line is connected to the second electrode and to one end of the second connecting line through a fourth via, the other end of the second connecting line is connected to the fifth connecting line through a fifth via, and the sixth connecting line is connected to the fifth connecting line.

12. The touch display panel according to claim 1, wherein: The touch electrodes include driving electrodes and sensing electrodes. One of the driving electrodes is connected to one of the first connection pads through a touch wiring, and one of the sensing electrodes is connected to another of the first connection pads through another of the touch wirings.

13. The touch display panel according to claim 12, wherein: The touch line extends from the display area to the frame area and is connected to the first connection pad. In the frame area, the touch line is located between the chip and the display area.

14. The touch display panel according to claim 13, wherein: In the border area, the touch line includes a first line segment, a second line segment and a third line segment. In the direction from the display area to the chip, the first line segment, the second line segment and the third line segment are connected in sequence. The third line segment is connected to the first connection pad. The extension direction of the third line segment is parallel to the extension direction of the first line segment. The second line segment intersects with the extension directions of the first line segment and the third line segment respectively.

15. The touch display panel according to claim 14, wherein: The first line segment passes through the bending area and is located on the chip, the second line segment and the third line segment are located between the bending area and the chip IC, and based on the central axis of the long side of the chip, the distance from the first line segment to the central axis is greater than the distance from the third line segment to the central axis.

16. The touch display panel according to claim 15, wherein: An extending direction of the first line segment is perpendicular to an extending direction of a long side of the rectangular chip.

17. The touch display panel according to claim 16, wherein: The straight-line distance of the second line segment from one end connected to the first line segment to one end connected to the third line segment is the oblique distance. In the frame area, the oblique distance of the second line segment decreases from both sides of the display panel toward the central axis of the long side of the chip.

18. The touch display panel according to claim 1, wherein: The chip is a touch display chip.

19. A touch display device comprising a touch display panel and a touch display chip, wherein the touch display panel comprises a display area and a frame area located on at least one side of the display area, and the touch display panel comprises: a plurality of touch electrodes, wherein the touch electrodes are located in the display area; a first connection pad group, the first connection pad group being located in the border area, the first connection pad group including a first connection pad and a second connection pad spaced apart from the first connection pad, the first connection pad being connected to an output pin of the touch display chip, the second connection pad being connected to an input pin of the touch display chip, and the touch electrode being correspondingly connected to one of the first connection pad and the second connection pad; A demultiplexing circuit, the demultiplexing circuit is located in the border area, the demultiplexing circuit includes multiple signal output lines and multiple signal input lines, one of the signal output lines is connected to one of the touch electrodes through one of the first connection pads or the second connection pad, and one of the signal input lines is configured to connect to a detection pad, and the number of the signal input lines is less than the number of the signal output lines.

20. The touch display device according to claim 19, wherein: The touch display panel further includes a second connection pad group, which is arranged on a side of the first connection pad group away from the display area, the second connection pad group including a plurality of adapter pads and at least two third connection pads, and one of the signal input lines is connected to the detection pad via one of the adapter pads; The touch display panel further includes a power line, and one of the power lines is correspondingly connected to at least two of the third connection pads.

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